./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/locks/test_locks_13.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 551b0097 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/locks/test_locks_13.c -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 8fd6142dd23f608c3bc9ae24389b4aee583128e9e6b549483298584de0c08ecd --- Real Ultimate output --- This is Ultimate 0.3.0-?-551b009-m [2025-01-10 07:14:19,989 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-01-10 07:14:20,049 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2025-01-10 07:14:20,062 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-01-10 07:14:20,062 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-01-10 07:14:20,082 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-01-10 07:14:20,083 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-01-10 07:14:20,083 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-01-10 07:14:20,083 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-01-10 07:14:20,084 INFO L153 SettingsManager]: * Use memory slicer=true [2025-01-10 07:14:20,084 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-01-10 07:14:20,084 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-01-10 07:14:20,084 INFO L153 SettingsManager]: * Use SBE=true [2025-01-10 07:14:20,084 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-01-10 07:14:20,084 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-01-10 07:14:20,085 INFO L153 SettingsManager]: * Use old map elimination=false [2025-01-10 07:14:20,085 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-01-10 07:14:20,085 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-01-10 07:14:20,085 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-01-10 07:14:20,085 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-01-10 07:14:20,085 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-01-10 07:14:20,085 INFO L153 SettingsManager]: * sizeof long=4 [2025-01-10 07:14:20,085 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-01-10 07:14:20,085 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-01-10 07:14:20,086 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-01-10 07:14:20,086 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-01-10 07:14:20,086 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-01-10 07:14:20,086 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-01-10 07:14:20,086 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-01-10 07:14:20,086 INFO L153 SettingsManager]: * sizeof long double=12 [2025-01-10 07:14:20,086 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-01-10 07:14:20,086 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-01-10 07:14:20,086 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-01-10 07:14:20,087 INFO L153 SettingsManager]: * Use constant arrays=true [2025-01-10 07:14:20,087 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2025-01-10 07:14:20,087 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-01-10 07:14:20,087 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-01-10 07:14:20,087 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-01-10 07:14:20,087 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-01-10 07:14:20,087 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 8fd6142dd23f608c3bc9ae24389b4aee583128e9e6b549483298584de0c08ecd [2025-01-10 07:14:20,386 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-01-10 07:14:20,395 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-01-10 07:14:20,399 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-01-10 07:14:20,402 INFO L270 PluginConnector]: Initializing CDTParser... [2025-01-10 07:14:20,402 INFO L274 PluginConnector]: CDTParser initialized [2025-01-10 07:14:20,404 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/locks/test_locks_13.c [2025-01-10 07:14:21,982 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/8f4324669/b554fef473fc45dea593842ab9560401/FLAGc8bdaad49 [2025-01-10 07:14:22,258 INFO L384 CDTParser]: Found 1 translation units. [2025-01-10 07:14:22,258 INFO L180 CDTParser]: Scanning /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/locks/test_locks_13.c [2025-01-10 07:14:22,268 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/8f4324669/b554fef473fc45dea593842ab9560401/FLAGc8bdaad49 [2025-01-10 07:14:22,281 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/8f4324669/b554fef473fc45dea593842ab9560401 [2025-01-10 07:14:22,284 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-01-10 07:14:22,285 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-01-10 07:14:22,286 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-01-10 07:14:22,286 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-01-10 07:14:22,290 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-01-10 07:14:22,291 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.01 07:14:22" (1/1) ... [2025-01-10 07:14:22,292 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@13611fbc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:22, skipping insertion in model container [2025-01-10 07:14:22,294 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.01 07:14:22" (1/1) ... [2025-01-10 07:14:22,310 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-01-10 07:14:22,469 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-01-10 07:14:22,482 INFO L200 MainTranslator]: Completed pre-run [2025-01-10 07:14:22,510 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-01-10 07:14:22,524 INFO L204 MainTranslator]: Completed translation [2025-01-10 07:14:22,525 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:22 WrapperNode [2025-01-10 07:14:22,526 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-01-10 07:14:22,527 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-01-10 07:14:22,527 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-01-10 07:14:22,527 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-01-10 07:14:22,533 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:22" (1/1) ... [2025-01-10 07:14:22,540 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:22" (1/1) ... [2025-01-10 07:14:22,558 INFO L138 Inliner]: procedures = 12, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 168 [2025-01-10 07:14:22,559 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-01-10 07:14:22,559 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-01-10 07:14:22,559 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-01-10 07:14:22,559 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-01-10 07:14:22,569 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:22" (1/1) ... [2025-01-10 07:14:22,569 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:22" (1/1) ... [2025-01-10 07:14:22,570 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:22" (1/1) ... [2025-01-10 07:14:22,582 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-01-10 07:14:22,583 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:22" (1/1) ... [2025-01-10 07:14:22,583 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:22" (1/1) ... [2025-01-10 07:14:22,586 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:22" (1/1) ... [2025-01-10 07:14:22,587 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:22" (1/1) ... [2025-01-10 07:14:22,590 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:22" (1/1) ... [2025-01-10 07:14:22,591 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:22" (1/1) ... [2025-01-10 07:14:22,591 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:22" (1/1) ... [2025-01-10 07:14:22,593 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-01-10 07:14:22,593 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2025-01-10 07:14:22,594 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2025-01-10 07:14:22,594 INFO L274 PluginConnector]: RCFGBuilder initialized [2025-01-10 07:14:22,595 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:22" (1/1) ... [2025-01-10 07:14:22,599 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-01-10 07:14:22,611 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-10 07:14:22,627 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-01-10 07:14:22,631 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-01-10 07:14:22,651 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-01-10 07:14:22,652 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-01-10 07:14:22,652 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-01-10 07:14:22,652 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-01-10 07:14:22,702 INFO L234 CfgBuilder]: Building ICFG [2025-01-10 07:14:22,704 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2025-01-10 07:14:22,896 INFO L? ?]: Removed 30 outVars from TransFormulas that were not future-live. [2025-01-10 07:14:22,897 INFO L283 CfgBuilder]: Performing block encoding [2025-01-10 07:14:22,906 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-01-10 07:14:22,906 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2025-01-10 07:14:22,907 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.01 07:14:22 BoogieIcfgContainer [2025-01-10 07:14:22,907 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2025-01-10 07:14:22,909 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-01-10 07:14:22,909 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-01-10 07:14:22,913 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-01-10 07:14:22,914 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-01-10 07:14:22,914 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 10.01 07:14:22" (1/3) ... [2025-01-10 07:14:22,915 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@98bea61 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 10.01 07:14:22, skipping insertion in model container [2025-01-10 07:14:22,915 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-01-10 07:14:22,915 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:22" (2/3) ... [2025-01-10 07:14:22,915 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@98bea61 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 10.01 07:14:22, skipping insertion in model container [2025-01-10 07:14:22,915 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-01-10 07:14:22,916 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.01 07:14:22" (3/3) ... [2025-01-10 07:14:22,917 INFO L363 chiAutomizerObserver]: Analyzing ICFG test_locks_13.c [2025-01-10 07:14:22,962 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-01-10 07:14:22,963 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-01-10 07:14:22,963 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-01-10 07:14:22,963 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-01-10 07:14:22,963 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-01-10 07:14:22,964 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-01-10 07:14:22,964 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-01-10 07:14:22,964 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-01-10 07:14:22,969 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 49 states, 48 states have (on average 1.8541666666666667) internal successors, (89), 48 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:22,984 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 41 [2025-01-10 07:14:22,985 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:22,985 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:22,991 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:22,991 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:22,991 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-01-10 07:14:22,992 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 49 states, 48 states have (on average 1.8541666666666667) internal successors, (89), 48 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:22,995 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 41 [2025-01-10 07:14:22,995 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:22,995 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:22,996 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:22,997 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:23,003 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-01-10 07:14:23,004 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume !(0 != main_~p9~0#1);" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-01-10 07:14:23,008 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:23,008 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2025-01-10 07:14:23,014 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:23,015 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [181670240] [2025-01-10 07:14:23,015 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:23,015 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:23,076 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:23,087 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:23,087 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:23,087 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:23,088 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:23,091 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:23,095 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:23,095 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:23,095 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:23,113 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:23,116 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:23,117 INFO L85 PathProgramCache]: Analyzing trace with hash 743062837, now seen corresponding path program 1 times [2025-01-10 07:14:23,117 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:23,117 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [332555424] [2025-01-10 07:14:23,117 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:23,117 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:23,129 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-01-10 07:14:23,144 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-01-10 07:14:23,145 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:23,145 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:14:23,253 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:14:23,254 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:14:23,254 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [332555424] [2025-01-10 07:14:23,254 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [332555424] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:14:23,255 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:14:23,259 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-01-10 07:14:23,259 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1341818950] [2025-01-10 07:14:23,260 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:14:23,262 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:14:23,263 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:14:23,283 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:14:23,284 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:14:23,285 INFO L87 Difference]: Start difference. First operand has 49 states, 48 states have (on average 1.8541666666666667) internal successors, (89), 48 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:23,313 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:14:23,314 INFO L93 Difference]: Finished difference Result 91 states and 165 transitions. [2025-01-10 07:14:23,315 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 91 states and 165 transitions. [2025-01-10 07:14:23,317 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 81 [2025-01-10 07:14:23,322 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 91 states to 83 states and 133 transitions. [2025-01-10 07:14:23,324 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 83 [2025-01-10 07:14:23,324 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 83 [2025-01-10 07:14:23,324 INFO L73 IsDeterministic]: Start isDeterministic. Operand 83 states and 133 transitions. [2025-01-10 07:14:23,325 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:14:23,325 INFO L218 hiAutomatonCegarLoop]: Abstraction has 83 states and 133 transitions. [2025-01-10 07:14:23,336 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states and 133 transitions. [2025-01-10 07:14:23,348 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 83. [2025-01-10 07:14:23,350 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 83 states, 83 states have (on average 1.6024096385542168) internal successors, (133), 82 states have internal predecessors, (133), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:23,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 133 transitions. [2025-01-10 07:14:23,352 INFO L240 hiAutomatonCegarLoop]: Abstraction has 83 states and 133 transitions. [2025-01-10 07:14:23,353 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:14:23,359 INFO L432 stractBuchiCegarLoop]: Abstraction has 83 states and 133 transitions. [2025-01-10 07:14:23,359 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-01-10 07:14:23,359 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 83 states and 133 transitions. [2025-01-10 07:14:23,361 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 81 [2025-01-10 07:14:23,361 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:23,361 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:23,361 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:23,361 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:23,361 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-01-10 07:14:23,361 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume !(0 != main_~p9~0#1);" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-01-10 07:14:23,362 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:23,362 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 2 times [2025-01-10 07:14:23,362 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:23,362 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [251025871] [2025-01-10 07:14:23,362 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-01-10 07:14:23,362 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:23,378 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:23,381 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:23,381 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-01-10 07:14:23,381 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:23,382 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:23,384 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:23,389 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:23,392 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:23,393 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:23,395 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:23,398 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:23,399 INFO L85 PathProgramCache]: Analyzing trace with hash 883611447, now seen corresponding path program 1 times [2025-01-10 07:14:23,399 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:23,399 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1761523782] [2025-01-10 07:14:23,399 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:23,399 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:23,411 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-01-10 07:14:23,425 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-01-10 07:14:23,429 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:23,430 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:14:23,484 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:14:23,485 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:14:23,485 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1761523782] [2025-01-10 07:14:23,485 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1761523782] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:14:23,485 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:14:23,485 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-01-10 07:14:23,485 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [730413967] [2025-01-10 07:14:23,485 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:14:23,487 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:14:23,487 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:14:23,488 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:14:23,488 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:14:23,488 INFO L87 Difference]: Start difference. First operand 83 states and 133 transitions. cyclomatic complexity: 52 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:23,512 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:14:23,512 INFO L93 Difference]: Finished difference Result 162 states and 258 transitions. [2025-01-10 07:14:23,512 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 162 states and 258 transitions. [2025-01-10 07:14:23,515 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 160 [2025-01-10 07:14:23,516 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 162 states to 162 states and 258 transitions. [2025-01-10 07:14:23,516 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 162 [2025-01-10 07:14:23,517 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 162 [2025-01-10 07:14:23,517 INFO L73 IsDeterministic]: Start isDeterministic. Operand 162 states and 258 transitions. [2025-01-10 07:14:23,517 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:14:23,518 INFO L218 hiAutomatonCegarLoop]: Abstraction has 162 states and 258 transitions. [2025-01-10 07:14:23,518 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states and 258 transitions. [2025-01-10 07:14:23,524 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 162. [2025-01-10 07:14:23,524 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 162 states, 162 states have (on average 1.5925925925925926) internal successors, (258), 161 states have internal predecessors, (258), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:23,526 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 258 transitions. [2025-01-10 07:14:23,526 INFO L240 hiAutomatonCegarLoop]: Abstraction has 162 states and 258 transitions. [2025-01-10 07:14:23,526 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:14:23,527 INFO L432 stractBuchiCegarLoop]: Abstraction has 162 states and 258 transitions. [2025-01-10 07:14:23,527 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-01-10 07:14:23,527 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 162 states and 258 transitions. [2025-01-10 07:14:23,529 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 160 [2025-01-10 07:14:23,529 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:23,529 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:23,529 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:23,530 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:23,530 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-01-10 07:14:23,530 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume !(0 != main_~p9~0#1);" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-01-10 07:14:23,530 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:23,530 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 3 times [2025-01-10 07:14:23,531 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:23,531 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [321624762] [2025-01-10 07:14:23,531 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-01-10 07:14:23,531 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:23,535 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:23,538 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:23,538 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-01-10 07:14:23,538 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:23,538 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:23,540 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:23,541 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:23,541 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:23,541 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:23,545 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:23,546 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:23,546 INFO L85 PathProgramCache]: Analyzing trace with hash 749597941, now seen corresponding path program 1 times [2025-01-10 07:14:23,546 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:23,546 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [613726200] [2025-01-10 07:14:23,546 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:23,546 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:23,556 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-01-10 07:14:23,561 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-01-10 07:14:23,564 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:23,564 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:14:23,611 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:14:23,611 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:14:23,614 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [613726200] [2025-01-10 07:14:23,615 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [613726200] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:14:23,615 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:14:23,615 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-01-10 07:14:23,615 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2103050139] [2025-01-10 07:14:23,615 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:14:23,615 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:14:23,615 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:14:23,616 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:14:23,616 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:14:23,616 INFO L87 Difference]: Start difference. First operand 162 states and 258 transitions. cyclomatic complexity: 100 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:23,648 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:14:23,648 INFO L93 Difference]: Finished difference Result 318 states and 502 transitions. [2025-01-10 07:14:23,648 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 318 states and 502 transitions. [2025-01-10 07:14:23,651 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 316 [2025-01-10 07:14:23,657 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 318 states to 318 states and 502 transitions. [2025-01-10 07:14:23,659 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 318 [2025-01-10 07:14:23,660 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 318 [2025-01-10 07:14:23,660 INFO L73 IsDeterministic]: Start isDeterministic. Operand 318 states and 502 transitions. [2025-01-10 07:14:23,664 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:14:23,664 INFO L218 hiAutomatonCegarLoop]: Abstraction has 318 states and 502 transitions. [2025-01-10 07:14:23,664 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 318 states and 502 transitions. [2025-01-10 07:14:23,679 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 318 to 318. [2025-01-10 07:14:23,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 318 states, 318 states have (on average 1.578616352201258) internal successors, (502), 317 states have internal predecessors, (502), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:23,686 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 318 states to 318 states and 502 transitions. [2025-01-10 07:14:23,689 INFO L240 hiAutomatonCegarLoop]: Abstraction has 318 states and 502 transitions. [2025-01-10 07:14:23,690 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:14:23,691 INFO L432 stractBuchiCegarLoop]: Abstraction has 318 states and 502 transitions. [2025-01-10 07:14:23,691 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-01-10 07:14:23,691 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 318 states and 502 transitions. [2025-01-10 07:14:23,693 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 316 [2025-01-10 07:14:23,694 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:23,694 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:23,694 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:23,694 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:23,695 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-01-10 07:14:23,695 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume !(0 != main_~p9~0#1);" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-01-10 07:14:23,695 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:23,696 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 4 times [2025-01-10 07:14:23,696 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:23,696 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [314484176] [2025-01-10 07:14:23,696 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-01-10 07:14:23,696 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:23,702 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-01-10 07:14:23,704 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:23,705 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-01-10 07:14:23,705 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:23,705 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:23,706 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:23,711 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:23,711 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:23,711 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:23,713 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:23,715 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:23,716 INFO L85 PathProgramCache]: Analyzing trace with hash -1055840393, now seen corresponding path program 1 times [2025-01-10 07:14:23,716 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:23,716 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1782127574] [2025-01-10 07:14:23,716 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:23,716 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:23,722 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-01-10 07:14:23,751 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-01-10 07:14:23,751 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:23,751 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:14:23,772 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:14:23,772 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:14:23,772 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1782127574] [2025-01-10 07:14:23,772 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1782127574] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:14:23,772 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:14:23,772 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-01-10 07:14:23,772 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1915758643] [2025-01-10 07:14:23,773 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:14:23,773 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:14:23,773 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:14:23,773 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:14:23,773 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:14:23,774 INFO L87 Difference]: Start difference. First operand 318 states and 502 transitions. cyclomatic complexity: 192 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:23,792 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:14:23,792 INFO L93 Difference]: Finished difference Result 626 states and 978 transitions. [2025-01-10 07:14:23,793 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 626 states and 978 transitions. [2025-01-10 07:14:23,797 INFO L131 ngComponentsAnalysis]: Automaton has 16 accepting balls. 624 [2025-01-10 07:14:23,801 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 626 states to 626 states and 978 transitions. [2025-01-10 07:14:23,801 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 626 [2025-01-10 07:14:23,802 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 626 [2025-01-10 07:14:23,802 INFO L73 IsDeterministic]: Start isDeterministic. Operand 626 states and 978 transitions. [2025-01-10 07:14:23,803 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:14:23,804 INFO L218 hiAutomatonCegarLoop]: Abstraction has 626 states and 978 transitions. [2025-01-10 07:14:23,804 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 626 states and 978 transitions. [2025-01-10 07:14:23,819 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 626 to 626. [2025-01-10 07:14:23,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 626 states, 626 states have (on average 1.5623003194888179) internal successors, (978), 625 states have internal predecessors, (978), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:23,826 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 626 states to 626 states and 978 transitions. [2025-01-10 07:14:23,826 INFO L240 hiAutomatonCegarLoop]: Abstraction has 626 states and 978 transitions. [2025-01-10 07:14:23,827 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:14:23,827 INFO L432 stractBuchiCegarLoop]: Abstraction has 626 states and 978 transitions. [2025-01-10 07:14:23,827 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-01-10 07:14:23,827 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 626 states and 978 transitions. [2025-01-10 07:14:23,831 INFO L131 ngComponentsAnalysis]: Automaton has 16 accepting balls. 624 [2025-01-10 07:14:23,831 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:23,831 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:23,831 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:23,831 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:23,832 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-01-10 07:14:23,832 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume !(0 != main_~p9~0#1);" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-01-10 07:14:23,832 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:23,832 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 5 times [2025-01-10 07:14:23,832 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:23,832 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [80032925] [2025-01-10 07:14:23,833 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-01-10 07:14:23,833 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:23,836 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:23,837 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:23,837 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-01-10 07:14:23,837 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:23,838 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:23,839 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:23,840 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:23,840 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:23,840 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:23,841 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:23,846 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:23,846 INFO L85 PathProgramCache]: Analyzing trace with hash -836985675, now seen corresponding path program 1 times [2025-01-10 07:14:23,846 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:23,846 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1769531017] [2025-01-10 07:14:23,846 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:23,846 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:23,855 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-01-10 07:14:23,857 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-01-10 07:14:23,860 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:23,860 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:14:23,896 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:14:23,897 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:14:23,897 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1769531017] [2025-01-10 07:14:23,897 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1769531017] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:14:23,898 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:14:23,898 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-01-10 07:14:23,898 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1357397192] [2025-01-10 07:14:23,898 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:14:23,898 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:14:23,898 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:14:23,903 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:14:23,903 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:14:23,903 INFO L87 Difference]: Start difference. First operand 626 states and 978 transitions. cyclomatic complexity: 368 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:23,931 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:14:23,931 INFO L93 Difference]: Finished difference Result 1234 states and 1906 transitions. [2025-01-10 07:14:23,931 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1234 states and 1906 transitions. [2025-01-10 07:14:23,947 INFO L131 ngComponentsAnalysis]: Automaton has 32 accepting balls. 1232 [2025-01-10 07:14:23,962 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1234 states to 1234 states and 1906 transitions. [2025-01-10 07:14:23,965 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1234 [2025-01-10 07:14:23,967 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1234 [2025-01-10 07:14:23,970 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1234 states and 1906 transitions. [2025-01-10 07:14:23,973 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:14:23,973 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1234 states and 1906 transitions. [2025-01-10 07:14:23,974 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1234 states and 1906 transitions. [2025-01-10 07:14:24,011 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1234 to 1234. [2025-01-10 07:14:24,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1234 states, 1234 states have (on average 1.5445705024311183) internal successors, (1906), 1233 states have internal predecessors, (1906), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:24,029 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1234 states to 1234 states and 1906 transitions. [2025-01-10 07:14:24,029 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1234 states and 1906 transitions. [2025-01-10 07:14:24,029 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:14:24,030 INFO L432 stractBuchiCegarLoop]: Abstraction has 1234 states and 1906 transitions. [2025-01-10 07:14:24,030 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-01-10 07:14:24,030 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1234 states and 1906 transitions. [2025-01-10 07:14:24,040 INFO L131 ngComponentsAnalysis]: Automaton has 32 accepting balls. 1232 [2025-01-10 07:14:24,043 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:24,044 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:24,044 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:24,044 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:24,044 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-01-10 07:14:24,044 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume !(0 != main_~p9~0#1);" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-01-10 07:14:24,045 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:24,045 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 6 times [2025-01-10 07:14:24,045 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:24,045 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1034455894] [2025-01-10 07:14:24,045 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-01-10 07:14:24,045 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:24,052 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:24,054 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:24,055 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-01-10 07:14:24,055 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:24,055 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:24,056 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:24,058 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:24,058 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:24,059 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:24,060 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:24,061 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:24,061 INFO L85 PathProgramCache]: Analyzing trace with hash -414283849, now seen corresponding path program 1 times [2025-01-10 07:14:24,061 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:24,061 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2038578938] [2025-01-10 07:14:24,061 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:24,061 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:24,065 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-01-10 07:14:24,067 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-01-10 07:14:24,067 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:24,067 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:14:24,083 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:14:24,083 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:14:24,084 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2038578938] [2025-01-10 07:14:24,084 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2038578938] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:14:24,084 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:14:24,084 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-01-10 07:14:24,084 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2072519813] [2025-01-10 07:14:24,084 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:14:24,084 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:14:24,084 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:14:24,085 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:14:24,085 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:14:24,085 INFO L87 Difference]: Start difference. First operand 1234 states and 1906 transitions. cyclomatic complexity: 704 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:24,106 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:14:24,106 INFO L93 Difference]: Finished difference Result 2434 states and 3714 transitions. [2025-01-10 07:14:24,107 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2434 states and 3714 transitions. [2025-01-10 07:14:24,125 INFO L131 ngComponentsAnalysis]: Automaton has 64 accepting balls. 2432 [2025-01-10 07:14:24,138 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2434 states to 2434 states and 3714 transitions. [2025-01-10 07:14:24,138 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2434 [2025-01-10 07:14:24,140 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2434 [2025-01-10 07:14:24,140 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2434 states and 3714 transitions. [2025-01-10 07:14:24,144 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:14:24,144 INFO L218 hiAutomatonCegarLoop]: Abstraction has 2434 states and 3714 transitions. [2025-01-10 07:14:24,146 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2434 states and 3714 transitions. [2025-01-10 07:14:24,181 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2434 to 2434. [2025-01-10 07:14:24,185 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2434 states, 2434 states have (on average 1.5258833196384551) internal successors, (3714), 2433 states have internal predecessors, (3714), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:24,195 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2434 states to 2434 states and 3714 transitions. [2025-01-10 07:14:24,195 INFO L240 hiAutomatonCegarLoop]: Abstraction has 2434 states and 3714 transitions. [2025-01-10 07:14:24,196 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:14:24,196 INFO L432 stractBuchiCegarLoop]: Abstraction has 2434 states and 3714 transitions. [2025-01-10 07:14:24,196 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-01-10 07:14:24,196 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 2434 states and 3714 transitions. [2025-01-10 07:14:24,208 INFO L131 ngComponentsAnalysis]: Automaton has 64 accepting balls. 2432 [2025-01-10 07:14:24,208 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:24,208 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:24,209 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:24,209 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:24,209 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-01-10 07:14:24,209 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume !(0 != main_~p9~0#1);" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-01-10 07:14:24,209 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:24,209 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 7 times [2025-01-10 07:14:24,209 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:24,210 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [643878547] [2025-01-10 07:14:24,210 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-01-10 07:14:24,210 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:24,212 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:24,213 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:24,213 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:24,213 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:24,214 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:24,214 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:24,215 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:24,215 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:24,215 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:24,217 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:24,217 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:24,217 INFO L85 PathProgramCache]: Analyzing trace with hash -1231932299, now seen corresponding path program 1 times [2025-01-10 07:14:24,217 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:24,217 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [581900342] [2025-01-10 07:14:24,217 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:24,217 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:24,255 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-01-10 07:14:24,257 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-01-10 07:14:24,258 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:24,258 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:14:24,283 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:14:24,283 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:14:24,283 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [581900342] [2025-01-10 07:14:24,283 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [581900342] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:14:24,283 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:14:24,283 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-01-10 07:14:24,283 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2093223871] [2025-01-10 07:14:24,283 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:14:24,284 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:14:24,284 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:14:24,284 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:14:24,284 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:14:24,284 INFO L87 Difference]: Start difference. First operand 2434 states and 3714 transitions. cyclomatic complexity: 1344 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:24,312 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:14:24,312 INFO L93 Difference]: Finished difference Result 4802 states and 7234 transitions. [2025-01-10 07:14:24,313 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4802 states and 7234 transitions. [2025-01-10 07:14:24,337 INFO L131 ngComponentsAnalysis]: Automaton has 128 accepting balls. 4800 [2025-01-10 07:14:24,354 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4802 states to 4802 states and 7234 transitions. [2025-01-10 07:14:24,355 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 4802 [2025-01-10 07:14:24,357 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 4802 [2025-01-10 07:14:24,358 INFO L73 IsDeterministic]: Start isDeterministic. Operand 4802 states and 7234 transitions. [2025-01-10 07:14:24,363 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:14:24,363 INFO L218 hiAutomatonCegarLoop]: Abstraction has 4802 states and 7234 transitions. [2025-01-10 07:14:24,365 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4802 states and 7234 transitions. [2025-01-10 07:14:24,410 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4802 to 4802. [2025-01-10 07:14:24,416 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4802 states, 4802 states have (on average 1.5064556434818825) internal successors, (7234), 4801 states have internal predecessors, (7234), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:24,428 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4802 states to 4802 states and 7234 transitions. [2025-01-10 07:14:24,431 INFO L240 hiAutomatonCegarLoop]: Abstraction has 4802 states and 7234 transitions. [2025-01-10 07:14:24,432 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:14:24,432 INFO L432 stractBuchiCegarLoop]: Abstraction has 4802 states and 7234 transitions. [2025-01-10 07:14:24,432 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-01-10 07:14:24,432 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 4802 states and 7234 transitions. [2025-01-10 07:14:24,462 INFO L131 ngComponentsAnalysis]: Automaton has 128 accepting balls. 4800 [2025-01-10 07:14:24,463 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:24,463 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:24,463 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:24,463 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:24,463 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-01-10 07:14:24,463 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-01-10 07:14:24,464 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:24,464 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 8 times [2025-01-10 07:14:24,464 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:24,464 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [737663410] [2025-01-10 07:14:24,464 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-01-10 07:14:24,464 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:24,466 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:24,467 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:24,467 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-01-10 07:14:24,467 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:24,468 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:24,509 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:24,510 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:24,510 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:24,510 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:24,513 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:24,514 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:24,514 INFO L85 PathProgramCache]: Analyzing trace with hash 1374091255, now seen corresponding path program 1 times [2025-01-10 07:14:24,514 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:24,514 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1475936009] [2025-01-10 07:14:24,514 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:24,514 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:24,517 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-01-10 07:14:24,518 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-01-10 07:14:24,518 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:24,518 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:14:24,532 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:14:24,533 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:14:24,533 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1475936009] [2025-01-10 07:14:24,533 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1475936009] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:14:24,533 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:14:24,533 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-01-10 07:14:24,533 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1375519112] [2025-01-10 07:14:24,533 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:14:24,533 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:14:24,533 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:14:24,533 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:14:24,533 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:14:24,533 INFO L87 Difference]: Start difference. First operand 4802 states and 7234 transitions. cyclomatic complexity: 2560 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:24,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:14:24,574 INFO L93 Difference]: Finished difference Result 9474 states and 14082 transitions. [2025-01-10 07:14:24,574 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 9474 states and 14082 transitions. [2025-01-10 07:14:24,612 INFO L131 ngComponentsAnalysis]: Automaton has 256 accepting balls. 9472 [2025-01-10 07:14:24,657 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 9474 states to 9474 states and 14082 transitions. [2025-01-10 07:14:24,658 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9474 [2025-01-10 07:14:24,666 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9474 [2025-01-10 07:14:24,667 INFO L73 IsDeterministic]: Start isDeterministic. Operand 9474 states and 14082 transitions. [2025-01-10 07:14:24,683 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:14:24,683 INFO L218 hiAutomatonCegarLoop]: Abstraction has 9474 states and 14082 transitions. [2025-01-10 07:14:24,692 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9474 states and 14082 transitions. [2025-01-10 07:14:24,864 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9474 to 9474. [2025-01-10 07:14:24,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9474 states, 9474 states have (on average 1.486383787207093) internal successors, (14082), 9473 states have internal predecessors, (14082), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:24,911 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9474 states to 9474 states and 14082 transitions. [2025-01-10 07:14:24,911 INFO L240 hiAutomatonCegarLoop]: Abstraction has 9474 states and 14082 transitions. [2025-01-10 07:14:24,912 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:14:24,912 INFO L432 stractBuchiCegarLoop]: Abstraction has 9474 states and 14082 transitions. [2025-01-10 07:14:24,912 INFO L338 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2025-01-10 07:14:24,912 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 9474 states and 14082 transitions. [2025-01-10 07:14:24,992 INFO L131 ngComponentsAnalysis]: Automaton has 256 accepting balls. 9472 [2025-01-10 07:14:24,992 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:24,992 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:24,993 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:24,993 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:24,993 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-01-10 07:14:24,993 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-01-10 07:14:24,993 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:24,993 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 9 times [2025-01-10 07:14:24,993 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:24,993 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1494210920] [2025-01-10 07:14:24,994 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-01-10 07:14:24,994 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:24,996 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:24,997 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:24,998 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-01-10 07:14:24,998 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:24,998 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:24,999 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:24,999 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:24,999 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:24,999 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:25,001 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:25,001 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:25,001 INFO L85 PathProgramCache]: Analyzing trace with hash -214256647, now seen corresponding path program 1 times [2025-01-10 07:14:25,002 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:25,002 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1284527676] [2025-01-10 07:14:25,002 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:25,002 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:25,005 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-01-10 07:14:25,007 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-01-10 07:14:25,007 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:25,007 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:14:25,021 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:14:25,022 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:14:25,022 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1284527676] [2025-01-10 07:14:25,022 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1284527676] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:14:25,022 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:14:25,022 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-01-10 07:14:25,022 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [629825738] [2025-01-10 07:14:25,022 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:14:25,023 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:14:25,023 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:14:25,023 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:14:25,023 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:14:25,023 INFO L87 Difference]: Start difference. First operand 9474 states and 14082 transitions. cyclomatic complexity: 4864 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:25,086 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:14:25,086 INFO L93 Difference]: Finished difference Result 18690 states and 27394 transitions. [2025-01-10 07:14:25,086 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 18690 states and 27394 transitions. [2025-01-10 07:14:25,201 INFO L131 ngComponentsAnalysis]: Automaton has 512 accepting balls. 18688 [2025-01-10 07:14:25,288 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 18690 states to 18690 states and 27394 transitions. [2025-01-10 07:14:25,288 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18690 [2025-01-10 07:14:25,306 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18690 [2025-01-10 07:14:25,307 INFO L73 IsDeterministic]: Start isDeterministic. Operand 18690 states and 27394 transitions. [2025-01-10 07:14:25,340 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:14:25,340 INFO L218 hiAutomatonCegarLoop]: Abstraction has 18690 states and 27394 transitions. [2025-01-10 07:14:25,356 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18690 states and 27394 transitions. [2025-01-10 07:14:25,695 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18690 to 18690. [2025-01-10 07:14:25,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18690 states, 18690 states have (on average 1.4657035848047084) internal successors, (27394), 18689 states have internal predecessors, (27394), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:25,796 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18690 states to 18690 states and 27394 transitions. [2025-01-10 07:14:25,797 INFO L240 hiAutomatonCegarLoop]: Abstraction has 18690 states and 27394 transitions. [2025-01-10 07:14:25,798 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:14:25,799 INFO L432 stractBuchiCegarLoop]: Abstraction has 18690 states and 27394 transitions. [2025-01-10 07:14:25,799 INFO L338 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2025-01-10 07:14:25,799 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 18690 states and 27394 transitions. [2025-01-10 07:14:25,996 INFO L131 ngComponentsAnalysis]: Automaton has 512 accepting balls. 18688 [2025-01-10 07:14:25,996 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:25,997 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:25,997 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:25,997 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:25,997 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-01-10 07:14:25,998 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-01-10 07:14:25,998 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:25,998 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 10 times [2025-01-10 07:14:25,998 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:25,998 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1520446939] [2025-01-10 07:14:25,998 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-01-10 07:14:25,999 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:26,001 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-01-10 07:14:26,003 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:26,004 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-01-10 07:14:26,005 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:26,005 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:26,006 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:26,007 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:26,007 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:26,007 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:26,008 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:26,008 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:26,008 INFO L85 PathProgramCache]: Analyzing trace with hash -1235325001, now seen corresponding path program 1 times [2025-01-10 07:14:26,009 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:26,009 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1751651785] [2025-01-10 07:14:26,009 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:26,009 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:26,011 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-01-10 07:14:26,013 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-01-10 07:14:26,013 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:26,013 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:14:26,026 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:14:26,026 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:14:26,026 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1751651785] [2025-01-10 07:14:26,026 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1751651785] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:14:26,026 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:14:26,027 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-01-10 07:14:26,027 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [17157656] [2025-01-10 07:14:26,027 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:14:26,027 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:14:26,027 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:14:26,027 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:14:26,028 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:14:26,028 INFO L87 Difference]: Start difference. First operand 18690 states and 27394 transitions. cyclomatic complexity: 9216 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:26,112 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:14:26,112 INFO L93 Difference]: Finished difference Result 36866 states and 53250 transitions. [2025-01-10 07:14:26,112 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 36866 states and 53250 transitions. [2025-01-10 07:14:26,401 INFO L131 ngComponentsAnalysis]: Automaton has 1024 accepting balls. 36864 [2025-01-10 07:14:26,708 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 36866 states to 36866 states and 53250 transitions. [2025-01-10 07:14:26,709 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 36866 [2025-01-10 07:14:26,777 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 36866 [2025-01-10 07:14:26,779 INFO L73 IsDeterministic]: Start isDeterministic. Operand 36866 states and 53250 transitions. [2025-01-10 07:14:26,831 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:14:26,831 INFO L218 hiAutomatonCegarLoop]: Abstraction has 36866 states and 53250 transitions. [2025-01-10 07:14:26,869 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36866 states and 53250 transitions. [2025-01-10 07:14:27,268 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36866 to 36866. [2025-01-10 07:14:27,319 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36866 states, 36866 states have (on average 1.4444203330982477) internal successors, (53250), 36865 states have internal predecessors, (53250), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:27,407 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36866 states to 36866 states and 53250 transitions. [2025-01-10 07:14:27,408 INFO L240 hiAutomatonCegarLoop]: Abstraction has 36866 states and 53250 transitions. [2025-01-10 07:14:27,408 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:14:27,409 INFO L432 stractBuchiCegarLoop]: Abstraction has 36866 states and 53250 transitions. [2025-01-10 07:14:27,409 INFO L338 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2025-01-10 07:14:27,409 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 36866 states and 53250 transitions. [2025-01-10 07:14:27,512 INFO L131 ngComponentsAnalysis]: Automaton has 1024 accepting balls. 36864 [2025-01-10 07:14:27,512 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:27,512 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:27,513 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:27,513 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:27,513 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-01-10 07:14:27,513 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-01-10 07:14:27,514 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:27,514 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 11 times [2025-01-10 07:14:27,514 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:27,514 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2015179638] [2025-01-10 07:14:27,514 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-01-10 07:14:27,515 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:27,518 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:27,521 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:27,522 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-01-10 07:14:27,522 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:27,523 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:27,524 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:27,524 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:27,524 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:27,524 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:27,527 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:27,528 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:27,528 INFO L85 PathProgramCache]: Analyzing trace with hash 1779778617, now seen corresponding path program 1 times [2025-01-10 07:14:27,528 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:27,528 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [609344429] [2025-01-10 07:14:27,528 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:27,528 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:27,533 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-01-10 07:14:27,535 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-01-10 07:14:27,535 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:27,536 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:14:27,552 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:14:27,553 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:14:27,553 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [609344429] [2025-01-10 07:14:27,553 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [609344429] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:14:27,553 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:14:27,553 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-01-10 07:14:27,553 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1952782839] [2025-01-10 07:14:27,553 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:14:27,554 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:14:27,554 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:14:27,554 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:14:27,554 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:14:27,555 INFO L87 Difference]: Start difference. First operand 36866 states and 53250 transitions. cyclomatic complexity: 17408 Second operand has 3 states, 2 states have (on average 14.0) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:28,012 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:14:28,012 INFO L93 Difference]: Finished difference Result 72706 states and 103426 transitions. [2025-01-10 07:14:28,012 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 72706 states and 103426 transitions. [2025-01-10 07:14:28,480 INFO L131 ngComponentsAnalysis]: Automaton has 2048 accepting balls. 72704 [2025-01-10 07:14:28,812 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 72706 states to 72706 states and 103426 transitions. [2025-01-10 07:14:28,816 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 72706 [2025-01-10 07:14:28,886 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 72706 [2025-01-10 07:14:28,887 INFO L73 IsDeterministic]: Start isDeterministic. Operand 72706 states and 103426 transitions. [2025-01-10 07:14:28,995 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:14:28,998 INFO L218 hiAutomatonCegarLoop]: Abstraction has 72706 states and 103426 transitions. [2025-01-10 07:14:29,046 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72706 states and 103426 transitions. [2025-01-10 07:14:30,148 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72706 to 72706. [2025-01-10 07:14:30,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 72706 states, 72706 states have (on average 1.4225235881495337) internal successors, (103426), 72705 states have internal predecessors, (103426), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:30,458 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72706 states to 72706 states and 103426 transitions. [2025-01-10 07:14:30,458 INFO L240 hiAutomatonCegarLoop]: Abstraction has 72706 states and 103426 transitions. [2025-01-10 07:14:30,459 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:14:30,459 INFO L432 stractBuchiCegarLoop]: Abstraction has 72706 states and 103426 transitions. [2025-01-10 07:14:30,459 INFO L338 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2025-01-10 07:14:30,459 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 72706 states and 103426 transitions. [2025-01-10 07:14:30,755 INFO L131 ngComponentsAnalysis]: Automaton has 2048 accepting balls. 72704 [2025-01-10 07:14:30,755 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:30,755 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:30,757 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:30,757 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:30,761 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-01-10 07:14:30,761 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-01-10 07:14:30,761 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:30,761 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 12 times [2025-01-10 07:14:30,761 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:30,761 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [193169110] [2025-01-10 07:14:30,761 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-01-10 07:14:30,762 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:30,765 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:30,770 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:30,770 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-01-10 07:14:30,770 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:30,770 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:30,771 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:30,772 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:30,775 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:30,775 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:30,777 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:30,777 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:30,777 INFO L85 PathProgramCache]: Analyzing trace with hash 768661367, now seen corresponding path program 1 times [2025-01-10 07:14:30,778 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:30,778 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [273561749] [2025-01-10 07:14:30,778 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:30,778 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:30,780 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-01-10 07:14:30,782 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-01-10 07:14:30,782 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:30,782 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:30,782 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:30,782 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-01-10 07:14:30,787 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-01-10 07:14:30,787 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:30,787 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:30,795 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:30,795 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:30,795 INFO L85 PathProgramCache]: Analyzing trace with hash 1812563001, now seen corresponding path program 1 times [2025-01-10 07:14:30,795 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:30,795 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1528474541] [2025-01-10 07:14:30,795 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:30,796 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:30,799 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-01-10 07:14:30,804 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-01-10 07:14:30,804 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:30,804 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:30,805 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:30,806 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-01-10 07:14:30,811 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-01-10 07:14:30,811 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:30,811 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:30,819 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:31,421 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:31,422 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:31,423 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:31,423 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:31,423 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:31,426 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:31,427 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:31,427 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:31,427 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:31,456 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 10.01 07:14:31 BoogieIcfgContainer [2025-01-10 07:14:31,457 INFO L131 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2025-01-10 07:14:31,458 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-01-10 07:14:31,458 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-01-10 07:14:31,458 INFO L274 PluginConnector]: Witness Printer initialized [2025-01-10 07:14:31,458 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.01 07:14:22" (3/4) ... [2025-01-10 07:14:31,460 INFO L143 WitnessPrinter]: Generating witness for non-termination counterexample [2025-01-10 07:14:31,491 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/witness.graphml [2025-01-10 07:14:31,491 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-01-10 07:14:31,491 INFO L158 Benchmark]: Toolchain (without parser) took 9206.86ms. Allocated memory was 142.6MB in the beginning and 1.7GB in the end (delta: 1.5GB). Free memory was 112.4MB in the beginning and 1.1GB in the end (delta: -973.1MB). Peak memory consumption was 571.2MB. Max. memory is 16.1GB. [2025-01-10 07:14:31,492 INFO L158 Benchmark]: CDTParser took 0.27ms. Allocated memory is still 201.3MB. Free memory is still 122.3MB. There was no memory consumed. Max. memory is 16.1GB. [2025-01-10 07:14:31,492 INFO L158 Benchmark]: CACSL2BoogieTranslator took 240.37ms. Allocated memory is still 142.6MB. Free memory was 111.9MB in the beginning and 100.4MB in the end (delta: 11.6MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-01-10 07:14:31,492 INFO L158 Benchmark]: Boogie Procedure Inliner took 32.19ms. Allocated memory is still 142.6MB. Free memory was 100.4MB in the beginning and 98.9MB in the end (delta: 1.5MB). There was no memory consumed. Max. memory is 16.1GB. [2025-01-10 07:14:31,492 INFO L158 Benchmark]: Boogie Preprocessor took 33.54ms. Allocated memory is still 142.6MB. Free memory was 98.9MB in the beginning and 97.6MB in the end (delta: 1.3MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-01-10 07:14:31,492 INFO L158 Benchmark]: RCFGBuilder took 313.25ms. Allocated memory is still 142.6MB. Free memory was 97.6MB in the beginning and 82.1MB in the end (delta: 15.5MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-01-10 07:14:31,493 INFO L158 Benchmark]: BuchiAutomizer took 8548.37ms. Allocated memory was 142.6MB in the beginning and 1.7GB in the end (delta: 1.5GB). Free memory was 82.1MB in the beginning and 1.1GB in the end (delta: -1.0GB). Peak memory consumption was 537.6MB. Max. memory is 16.1GB. [2025-01-10 07:14:31,493 INFO L158 Benchmark]: Witness Printer took 33.36ms. Allocated memory is still 1.7GB. Free memory was 1.1GB in the beginning and 1.1GB in the end (delta: 3.1MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-01-10 07:14:31,494 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.27ms. Allocated memory is still 201.3MB. Free memory is still 122.3MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 240.37ms. Allocated memory is still 142.6MB. Free memory was 111.9MB in the beginning and 100.4MB in the end (delta: 11.6MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 32.19ms. Allocated memory is still 142.6MB. Free memory was 100.4MB in the beginning and 98.9MB in the end (delta: 1.5MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 33.54ms. Allocated memory is still 142.6MB. Free memory was 98.9MB in the beginning and 97.6MB in the end (delta: 1.3MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * RCFGBuilder took 313.25ms. Allocated memory is still 142.6MB. Free memory was 97.6MB in the beginning and 82.1MB in the end (delta: 15.5MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * BuchiAutomizer took 8548.37ms. Allocated memory was 142.6MB in the beginning and 1.7GB in the end (delta: 1.5GB). Free memory was 82.1MB in the beginning and 1.1GB in the end (delta: -1.0GB). Peak memory consumption was 537.6MB. Max. memory is 16.1GB. * Witness Printer took 33.36ms. Allocated memory is still 1.7GB. Free memory was 1.1GB in the beginning and 1.1GB in the end (delta: 3.1MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 11 terminating modules (11 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.11 modules have a trivial ranking function, the largest among these consists of 3 locations. The remainder module has 72706 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 8.4s and 12 iterations. TraceHistogramMax:1. Analysis of lassos took 1.5s. Construction of modules took 0.0s. Büchi inclusion checks took 6.0s. Highest rank in rank-based complementation 0. Minimization of det autom 11. Minimization of nondet autom 0. Automata minimization 3.0s AutomataMinimizationTime, 11 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations. Non-live state removal took 1.8s Buchi closure took 0.1s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 587 SdHoareTripleChecker+Valid, 0.1s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 587 mSDsluCounter, 1835 SdHoareTripleChecker+Invalid, 0.1s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 708 mSDsCounter, 22 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 57 IncrementalHoareTripleChecker+Invalid, 79 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 22 mSolverCounterUnsat, 1127 mSDtfsCounter, 57 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont1 unkn0 SFLI11 SFLT0 conc0 concLT0 SILN0 SILU0 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - LassoShapedNonTerminationArgument [Line: 50]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite program execution. Stem: [L8] int p1 = __VERIFIER_nondet_int(); [L9] int lk1; [L11] int p2 = __VERIFIER_nondet_int(); [L12] int lk2; [L14] int p3 = __VERIFIER_nondet_int(); [L15] int lk3; [L17] int p4 = __VERIFIER_nondet_int(); [L18] int lk4; [L20] int p5 = __VERIFIER_nondet_int(); [L21] int lk5; [L23] int p6 = __VERIFIER_nondet_int(); [L24] int lk6; [L26] int p7 = __VERIFIER_nondet_int(); [L27] int lk7; [L29] int p8 = __VERIFIER_nondet_int(); [L30] int lk8; [L32] int p9 = __VERIFIER_nondet_int(); [L33] int lk9; [L35] int p10 = __VERIFIER_nondet_int(); [L36] int lk10; [L38] int p11 = __VERIFIER_nondet_int(); [L39] int lk11; [L41] int p12 = __VERIFIER_nondet_int(); [L42] int lk12; [L44] int p13 = __VERIFIER_nondet_int(); [L45] int lk13; [L48] int cond; Loop: [L51] cond = __VERIFIER_nondet_int() [L52] COND FALSE !(cond == 0) [L55] lk1 = 0 [L57] lk2 = 0 [L59] lk3 = 0 [L61] lk4 = 0 [L63] lk5 = 0 [L65] lk6 = 0 [L67] lk7 = 0 [L69] lk8 = 0 [L71] lk9 = 0 [L73] lk10 = 0 [L75] lk11 = 0 [L77] lk12 = 0 [L79] lk13 = 0 [L83] COND FALSE !(p1 != 0) [L87] COND FALSE !(p2 != 0) [L91] COND FALSE !(p3 != 0) [L95] COND FALSE !(p4 != 0) [L99] COND FALSE !(p5 != 0) [L103] COND FALSE !(p6 != 0) [L107] COND FALSE !(p7 != 0) [L111] COND FALSE !(p8 != 0) [L115] COND FALSE !(p9 != 0) [L119] COND FALSE !(p10 != 0) [L123] COND FALSE !(p11 != 0) [L127] COND FALSE !(p12 != 0) [L131] COND FALSE !(p13 != 0) [L137] COND FALSE !(p1 != 0) [L142] COND FALSE !(p2 != 0) [L147] COND FALSE !(p3 != 0) [L152] COND FALSE !(p4 != 0) [L157] COND FALSE !(p5 != 0) [L162] COND FALSE !(p6 != 0) [L167] COND FALSE !(p7 != 0) [L172] COND FALSE !(p8 != 0) [L177] COND FALSE !(p9 != 0) [L182] COND FALSE !(p10 != 0) [L187] COND FALSE !(p11 != 0) [L192] COND FALSE !(p12 != 0) [L197] COND FALSE !(p13 != 0) End of lasso representation. - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 50]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L8] int p1 = __VERIFIER_nondet_int(); [L9] int lk1; [L11] int p2 = __VERIFIER_nondet_int(); [L12] int lk2; [L14] int p3 = __VERIFIER_nondet_int(); [L15] int lk3; [L17] int p4 = __VERIFIER_nondet_int(); [L18] int lk4; [L20] int p5 = __VERIFIER_nondet_int(); [L21] int lk5; [L23] int p6 = __VERIFIER_nondet_int(); [L24] int lk6; [L26] int p7 = __VERIFIER_nondet_int(); [L27] int lk7; [L29] int p8 = __VERIFIER_nondet_int(); [L30] int lk8; [L32] int p9 = __VERIFIER_nondet_int(); [L33] int lk9; [L35] int p10 = __VERIFIER_nondet_int(); [L36] int lk10; [L38] int p11 = __VERIFIER_nondet_int(); [L39] int lk11; [L41] int p12 = __VERIFIER_nondet_int(); [L42] int lk12; [L44] int p13 = __VERIFIER_nondet_int(); [L45] int lk13; [L48] int cond; Loop: [L51] cond = __VERIFIER_nondet_int() [L52] COND FALSE !(cond == 0) [L55] lk1 = 0 [L57] lk2 = 0 [L59] lk3 = 0 [L61] lk4 = 0 [L63] lk5 = 0 [L65] lk6 = 0 [L67] lk7 = 0 [L69] lk8 = 0 [L71] lk9 = 0 [L73] lk10 = 0 [L75] lk11 = 0 [L77] lk12 = 0 [L79] lk13 = 0 [L83] COND FALSE !(p1 != 0) [L87] COND FALSE !(p2 != 0) [L91] COND FALSE !(p3 != 0) [L95] COND FALSE !(p4 != 0) [L99] COND FALSE !(p5 != 0) [L103] COND FALSE !(p6 != 0) [L107] COND FALSE !(p7 != 0) [L111] COND FALSE !(p8 != 0) [L115] COND FALSE !(p9 != 0) [L119] COND FALSE !(p10 != 0) [L123] COND FALSE !(p11 != 0) [L127] COND FALSE !(p12 != 0) [L131] COND FALSE !(p13 != 0) [L137] COND FALSE !(p1 != 0) [L142] COND FALSE !(p2 != 0) [L147] COND FALSE !(p3 != 0) [L152] COND FALSE !(p4 != 0) [L157] COND FALSE !(p5 != 0) [L162] COND FALSE !(p6 != 0) [L167] COND FALSE !(p7 != 0) [L172] COND FALSE !(p8 != 0) [L177] COND FALSE !(p9 != 0) [L182] COND FALSE !(p10 != 0) [L187] COND FALSE !(p11 != 0) [L192] COND FALSE !(p12 != 0) [L197] COND FALSE !(p13 != 0) End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2025-01-10 07:14:31,507 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM)