./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/locks/test_locks_14-1.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 551b0097 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/locks/test_locks_14-1.c -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 1e1f6c8a80d54f6d4b7b413368cc99af6eca243b930331d178961d851b56afbd --- Real Ultimate output --- This is Ultimate 0.3.0-?-551b009-m [2025-01-10 07:14:20,079 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-01-10 07:14:20,151 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2025-01-10 07:14:20,156 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-01-10 07:14:20,156 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-01-10 07:14:20,184 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-01-10 07:14:20,186 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-01-10 07:14:20,187 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-01-10 07:14:20,187 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-01-10 07:14:20,187 INFO L153 SettingsManager]: * Use memory slicer=true [2025-01-10 07:14:20,189 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-01-10 07:14:20,189 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-01-10 07:14:20,189 INFO L153 SettingsManager]: * Use SBE=true [2025-01-10 07:14:20,189 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-01-10 07:14:20,190 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-01-10 07:14:20,190 INFO L153 SettingsManager]: * Use old map elimination=false [2025-01-10 07:14:20,190 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-01-10 07:14:20,190 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-01-10 07:14:20,190 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-01-10 07:14:20,190 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-01-10 07:14:20,190 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-01-10 07:14:20,190 INFO L153 SettingsManager]: * sizeof long=4 [2025-01-10 07:14:20,190 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-01-10 07:14:20,191 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-01-10 07:14:20,191 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-01-10 07:14:20,191 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-01-10 07:14:20,191 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-01-10 07:14:20,191 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-01-10 07:14:20,191 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-01-10 07:14:20,191 INFO L153 SettingsManager]: * sizeof long double=12 [2025-01-10 07:14:20,192 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-01-10 07:14:20,192 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-01-10 07:14:20,192 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-01-10 07:14:20,192 INFO L153 SettingsManager]: * Use constant arrays=true [2025-01-10 07:14:20,192 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2025-01-10 07:14:20,192 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-01-10 07:14:20,193 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-01-10 07:14:20,193 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-01-10 07:14:20,193 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-01-10 07:14:20,193 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 1e1f6c8a80d54f6d4b7b413368cc99af6eca243b930331d178961d851b56afbd [2025-01-10 07:14:20,474 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-01-10 07:14:20,483 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-01-10 07:14:20,487 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-01-10 07:14:20,488 INFO L270 PluginConnector]: Initializing CDTParser... [2025-01-10 07:14:20,489 INFO L274 PluginConnector]: CDTParser initialized [2025-01-10 07:14:20,490 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/locks/test_locks_14-1.c [2025-01-10 07:14:21,915 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/4897397e5/9af9200f7379414483222068f605a8eb/FLAG9db5476d0 [2025-01-10 07:14:22,207 INFO L384 CDTParser]: Found 1 translation units. [2025-01-10 07:14:22,208 INFO L180 CDTParser]: Scanning /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/locks/test_locks_14-1.c [2025-01-10 07:14:22,219 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/4897397e5/9af9200f7379414483222068f605a8eb/FLAG9db5476d0 [2025-01-10 07:14:22,240 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/4897397e5/9af9200f7379414483222068f605a8eb [2025-01-10 07:14:22,243 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-01-10 07:14:22,245 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-01-10 07:14:22,246 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-01-10 07:14:22,246 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-01-10 07:14:22,251 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-01-10 07:14:22,253 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.01 07:14:22" (1/1) ... [2025-01-10 07:14:22,254 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5fff48e2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:22, skipping insertion in model container [2025-01-10 07:14:22,254 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.01 07:14:22" (1/1) ... [2025-01-10 07:14:22,280 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-01-10 07:14:22,440 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-01-10 07:14:22,458 INFO L200 MainTranslator]: Completed pre-run [2025-01-10 07:14:22,488 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-01-10 07:14:22,503 INFO L204 MainTranslator]: Completed translation [2025-01-10 07:14:22,505 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:22 WrapperNode [2025-01-10 07:14:22,505 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-01-10 07:14:22,506 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-01-10 07:14:22,506 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-01-10 07:14:22,506 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-01-10 07:14:22,512 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:22" (1/1) ... [2025-01-10 07:14:22,521 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:22" (1/1) ... [2025-01-10 07:14:22,538 INFO L138 Inliner]: procedures = 12, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 179 [2025-01-10 07:14:22,540 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-01-10 07:14:22,541 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-01-10 07:14:22,541 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-01-10 07:14:22,541 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-01-10 07:14:22,548 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:22" (1/1) ... [2025-01-10 07:14:22,548 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:22" (1/1) ... [2025-01-10 07:14:22,550 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:22" (1/1) ... [2025-01-10 07:14:22,567 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-01-10 07:14:22,569 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:22" (1/1) ... [2025-01-10 07:14:22,569 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:22" (1/1) ... [2025-01-10 07:14:22,574 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:22" (1/1) ... [2025-01-10 07:14:22,575 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:22" (1/1) ... [2025-01-10 07:14:22,579 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:22" (1/1) ... [2025-01-10 07:14:22,580 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:22" (1/1) ... [2025-01-10 07:14:22,582 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:22" (1/1) ... [2025-01-10 07:14:22,583 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-01-10 07:14:22,584 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2025-01-10 07:14:22,584 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2025-01-10 07:14:22,584 INFO L274 PluginConnector]: RCFGBuilder initialized [2025-01-10 07:14:22,588 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:22" (1/1) ... [2025-01-10 07:14:22,596 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-01-10 07:14:22,609 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-10 07:14:22,628 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-01-10 07:14:22,632 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-01-10 07:14:22,655 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-01-10 07:14:22,656 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-01-10 07:14:22,656 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-01-10 07:14:22,656 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-01-10 07:14:22,718 INFO L234 CfgBuilder]: Building ICFG [2025-01-10 07:14:22,719 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2025-01-10 07:14:22,919 INFO L? ?]: Removed 32 outVars from TransFormulas that were not future-live. [2025-01-10 07:14:22,919 INFO L283 CfgBuilder]: Performing block encoding [2025-01-10 07:14:22,927 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-01-10 07:14:22,927 INFO L312 CfgBuilder]: Removed 1 assume(true) statements. [2025-01-10 07:14:22,928 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.01 07:14:22 BoogieIcfgContainer [2025-01-10 07:14:22,928 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2025-01-10 07:14:22,928 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-01-10 07:14:22,929 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-01-10 07:14:22,933 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-01-10 07:14:22,933 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-01-10 07:14:22,934 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 10.01 07:14:22" (1/3) ... [2025-01-10 07:14:22,935 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2b19411e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 10.01 07:14:22, skipping insertion in model container [2025-01-10 07:14:22,935 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-01-10 07:14:22,935 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 07:14:22" (2/3) ... [2025-01-10 07:14:22,935 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2b19411e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 10.01 07:14:22, skipping insertion in model container [2025-01-10 07:14:22,935 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-01-10 07:14:22,935 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.01 07:14:22" (3/3) ... [2025-01-10 07:14:22,937 INFO L363 chiAutomizerObserver]: Analyzing ICFG test_locks_14-1.c [2025-01-10 07:14:22,976 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-01-10 07:14:22,976 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-01-10 07:14:22,977 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-01-10 07:14:22,977 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-01-10 07:14:22,977 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-01-10 07:14:22,978 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-01-10 07:14:22,978 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-01-10 07:14:22,978 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-01-10 07:14:22,983 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 52 states, 51 states have (on average 1.8627450980392157) internal successors, (95), 51 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:22,999 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 44 [2025-01-10 07:14:23,000 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:23,001 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:23,007 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:23,007 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:23,007 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-01-10 07:14:23,007 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 52 states, 51 states have (on average 1.8627450980392157) internal successors, (95), 51 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:23,011 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 44 [2025-01-10 07:14:23,012 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:23,012 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:23,013 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:23,013 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:23,019 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-01-10 07:14:23,020 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume !(0 != main_~p9~0#1);" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-01-10 07:14:23,025 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:23,026 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 1 times [2025-01-10 07:14:23,032 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:23,033 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1779686745] [2025-01-10 07:14:23,034 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:23,034 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:23,088 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:23,098 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:23,098 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:23,098 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:23,099 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:23,102 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:23,104 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:23,105 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:23,105 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:23,119 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:23,121 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:23,122 INFO L85 PathProgramCache]: Analyzing trace with hash -379535847, now seen corresponding path program 1 times [2025-01-10 07:14:23,122 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:23,122 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [197601583] [2025-01-10 07:14:23,122 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:23,122 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:23,136 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-01-10 07:14:23,152 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-01-10 07:14:23,153 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:23,153 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:14:23,264 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:14:23,264 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:14:23,264 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [197601583] [2025-01-10 07:14:23,266 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [197601583] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:14:23,266 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:14:23,267 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-01-10 07:14:23,267 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [553334040] [2025-01-10 07:14:23,267 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:14:23,270 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:14:23,272 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:14:23,294 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:14:23,294 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:14:23,296 INFO L87 Difference]: Start difference. First operand has 52 states, 51 states have (on average 1.8627450980392157) internal successors, (95), 51 states have internal predecessors, (95), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 10.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:23,343 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:14:23,343 INFO L93 Difference]: Finished difference Result 97 states and 177 transitions. [2025-01-10 07:14:23,344 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 97 states and 177 transitions. [2025-01-10 07:14:23,349 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 87 [2025-01-10 07:14:23,358 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 97 states to 89 states and 143 transitions. [2025-01-10 07:14:23,360 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 89 [2025-01-10 07:14:23,364 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 89 [2025-01-10 07:14:23,364 INFO L73 IsDeterministic]: Start isDeterministic. Operand 89 states and 143 transitions. [2025-01-10 07:14:23,365 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:14:23,365 INFO L218 hiAutomatonCegarLoop]: Abstraction has 89 states and 143 transitions. [2025-01-10 07:14:23,375 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states and 143 transitions. [2025-01-10 07:14:23,389 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 89. [2025-01-10 07:14:23,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 89 states, 89 states have (on average 1.6067415730337078) internal successors, (143), 88 states have internal predecessors, (143), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:23,394 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 143 transitions. [2025-01-10 07:14:23,396 INFO L240 hiAutomatonCegarLoop]: Abstraction has 89 states and 143 transitions. [2025-01-10 07:14:23,397 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:14:23,400 INFO L432 stractBuchiCegarLoop]: Abstraction has 89 states and 143 transitions. [2025-01-10 07:14:23,401 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-01-10 07:14:23,401 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 89 states and 143 transitions. [2025-01-10 07:14:23,402 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 87 [2025-01-10 07:14:23,405 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:23,405 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:23,406 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:23,406 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:23,406 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-01-10 07:14:23,406 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume !(0 != main_~p9~0#1);" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-01-10 07:14:23,407 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:23,407 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 2 times [2025-01-10 07:14:23,407 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:23,407 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1114682796] [2025-01-10 07:14:23,407 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-01-10 07:14:23,407 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:23,413 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:23,416 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:23,416 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-01-10 07:14:23,416 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:23,416 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:23,418 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:23,420 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:23,420 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:23,420 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:23,422 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:23,423 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:23,423 INFO L85 PathProgramCache]: Analyzing trace with hash 1543692187, now seen corresponding path program 1 times [2025-01-10 07:14:23,423 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:23,423 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [371090230] [2025-01-10 07:14:23,425 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:23,425 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:23,433 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-01-10 07:14:23,448 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-01-10 07:14:23,448 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:23,448 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:14:23,502 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:14:23,503 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:14:23,503 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [371090230] [2025-01-10 07:14:23,503 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [371090230] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:14:23,503 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:14:23,503 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-01-10 07:14:23,503 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1176719100] [2025-01-10 07:14:23,503 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:14:23,503 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:14:23,503 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:14:23,504 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:14:23,504 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:14:23,504 INFO L87 Difference]: Start difference. First operand 89 states and 143 transitions. cyclomatic complexity: 56 Second operand has 3 states, 3 states have (on average 10.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:23,528 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:14:23,528 INFO L93 Difference]: Finished difference Result 174 states and 278 transitions. [2025-01-10 07:14:23,528 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 174 states and 278 transitions. [2025-01-10 07:14:23,533 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 172 [2025-01-10 07:14:23,537 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 174 states to 174 states and 278 transitions. [2025-01-10 07:14:23,539 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 174 [2025-01-10 07:14:23,539 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 174 [2025-01-10 07:14:23,541 INFO L73 IsDeterministic]: Start isDeterministic. Operand 174 states and 278 transitions. [2025-01-10 07:14:23,542 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:14:23,542 INFO L218 hiAutomatonCegarLoop]: Abstraction has 174 states and 278 transitions. [2025-01-10 07:14:23,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states and 278 transitions. [2025-01-10 07:14:23,551 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 174. [2025-01-10 07:14:23,552 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 174 states, 174 states have (on average 1.5977011494252873) internal successors, (278), 173 states have internal predecessors, (278), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:23,554 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 278 transitions. [2025-01-10 07:14:23,555 INFO L240 hiAutomatonCegarLoop]: Abstraction has 174 states and 278 transitions. [2025-01-10 07:14:23,556 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:14:23,556 INFO L432 stractBuchiCegarLoop]: Abstraction has 174 states and 278 transitions. [2025-01-10 07:14:23,556 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-01-10 07:14:23,557 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 174 states and 278 transitions. [2025-01-10 07:14:23,558 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 172 [2025-01-10 07:14:23,558 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:23,559 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:23,559 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:23,559 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:23,559 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-01-10 07:14:23,559 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume !(0 != main_~p9~0#1);" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-01-10 07:14:23,564 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:23,564 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 3 times [2025-01-10 07:14:23,564 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:23,564 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [615425940] [2025-01-10 07:14:23,564 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-01-10 07:14:23,564 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:23,569 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:23,572 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:23,572 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-01-10 07:14:23,572 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:23,572 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:23,574 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:23,577 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:23,578 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:23,578 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:23,580 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:23,581 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:23,581 INFO L85 PathProgramCache]: Analyzing trace with hash 1605731801, now seen corresponding path program 1 times [2025-01-10 07:14:23,581 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:23,581 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [616212169] [2025-01-10 07:14:23,581 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:23,582 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:23,588 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-01-10 07:14:23,593 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-01-10 07:14:23,593 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:23,593 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:14:23,633 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:14:23,633 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:14:23,633 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [616212169] [2025-01-10 07:14:23,633 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [616212169] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:14:23,633 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:14:23,633 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-01-10 07:14:23,634 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [819833516] [2025-01-10 07:14:23,634 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:14:23,634 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:14:23,634 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:14:23,635 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:14:23,635 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:14:23,635 INFO L87 Difference]: Start difference. First operand 174 states and 278 transitions. cyclomatic complexity: 108 Second operand has 3 states, 3 states have (on average 10.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:23,662 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:14:23,662 INFO L93 Difference]: Finished difference Result 342 states and 542 transitions. [2025-01-10 07:14:23,662 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 342 states and 542 transitions. [2025-01-10 07:14:23,665 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 340 [2025-01-10 07:14:23,668 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 342 states to 342 states and 542 transitions. [2025-01-10 07:14:23,668 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 342 [2025-01-10 07:14:23,669 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 342 [2025-01-10 07:14:23,669 INFO L73 IsDeterministic]: Start isDeterministic. Operand 342 states and 542 transitions. [2025-01-10 07:14:23,671 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:14:23,671 INFO L218 hiAutomatonCegarLoop]: Abstraction has 342 states and 542 transitions. [2025-01-10 07:14:23,671 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 342 states and 542 transitions. [2025-01-10 07:14:23,699 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 342 to 342. [2025-01-10 07:14:23,703 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 342 states, 342 states have (on average 1.5847953216374269) internal successors, (542), 341 states have internal predecessors, (542), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:23,705 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 342 states to 342 states and 542 transitions. [2025-01-10 07:14:23,705 INFO L240 hiAutomatonCegarLoop]: Abstraction has 342 states and 542 transitions. [2025-01-10 07:14:23,709 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:14:23,709 INFO L432 stractBuchiCegarLoop]: Abstraction has 342 states and 542 transitions. [2025-01-10 07:14:23,709 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-01-10 07:14:23,710 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 342 states and 542 transitions. [2025-01-10 07:14:23,712 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 340 [2025-01-10 07:14:23,712 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:23,712 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:23,713 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:23,713 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:23,713 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-01-10 07:14:23,713 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume !(0 != main_~p9~0#1);" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-01-10 07:14:23,714 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:23,714 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 4 times [2025-01-10 07:14:23,714 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:23,714 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1140109148] [2025-01-10 07:14:23,714 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-01-10 07:14:23,714 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:23,721 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-01-10 07:14:23,726 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:23,726 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-01-10 07:14:23,726 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:23,726 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:23,728 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:23,733 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:23,733 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:23,733 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:23,735 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:23,740 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:23,740 INFO L85 PathProgramCache]: Analyzing trace with hash 1746280411, now seen corresponding path program 1 times [2025-01-10 07:14:23,740 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:23,740 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [697817246] [2025-01-10 07:14:23,740 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:23,740 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:23,749 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-01-10 07:14:23,756 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-01-10 07:14:23,757 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:23,757 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:14:23,804 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:14:23,805 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:14:23,805 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [697817246] [2025-01-10 07:14:23,805 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [697817246] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:14:23,805 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:14:23,805 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-01-10 07:14:23,805 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [707627892] [2025-01-10 07:14:23,805 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:14:23,805 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:14:23,805 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:14:23,806 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:14:23,806 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:14:23,806 INFO L87 Difference]: Start difference. First operand 342 states and 542 transitions. cyclomatic complexity: 208 Second operand has 3 states, 3 states have (on average 10.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:23,835 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:14:23,835 INFO L93 Difference]: Finished difference Result 674 states and 1058 transitions. [2025-01-10 07:14:23,835 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 674 states and 1058 transitions. [2025-01-10 07:14:23,842 INFO L131 ngComponentsAnalysis]: Automaton has 16 accepting balls. 672 [2025-01-10 07:14:23,848 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 674 states to 674 states and 1058 transitions. [2025-01-10 07:14:23,848 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 674 [2025-01-10 07:14:23,849 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 674 [2025-01-10 07:14:23,850 INFO L73 IsDeterministic]: Start isDeterministic. Operand 674 states and 1058 transitions. [2025-01-10 07:14:23,854 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:14:23,855 INFO L218 hiAutomatonCegarLoop]: Abstraction has 674 states and 1058 transitions. [2025-01-10 07:14:23,856 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 674 states and 1058 transitions. [2025-01-10 07:14:23,872 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 674 to 674. [2025-01-10 07:14:23,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 674 states, 674 states have (on average 1.5697329376854599) internal successors, (1058), 673 states have internal predecessors, (1058), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:23,876 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 674 states to 674 states and 1058 transitions. [2025-01-10 07:14:23,876 INFO L240 hiAutomatonCegarLoop]: Abstraction has 674 states and 1058 transitions. [2025-01-10 07:14:23,876 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:14:23,879 INFO L432 stractBuchiCegarLoop]: Abstraction has 674 states and 1058 transitions. [2025-01-10 07:14:23,879 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-01-10 07:14:23,880 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 674 states and 1058 transitions. [2025-01-10 07:14:23,883 INFO L131 ngComponentsAnalysis]: Automaton has 16 accepting balls. 672 [2025-01-10 07:14:23,884 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:23,884 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:23,884 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:23,884 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:23,884 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-01-10 07:14:23,884 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume !(0 != main_~p9~0#1);" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-01-10 07:14:23,885 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:23,885 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 5 times [2025-01-10 07:14:23,885 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:23,885 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1055007960] [2025-01-10 07:14:23,885 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-01-10 07:14:23,885 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:23,889 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:23,890 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:23,891 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-01-10 07:14:23,891 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:23,891 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:23,895 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:23,896 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:23,896 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:23,896 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:23,901 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:23,901 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:23,901 INFO L85 PathProgramCache]: Analyzing trace with hash 1612266905, now seen corresponding path program 1 times [2025-01-10 07:14:23,901 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:23,901 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1354669855] [2025-01-10 07:14:23,901 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:23,901 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:23,912 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-01-10 07:14:23,917 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-01-10 07:14:23,921 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:23,922 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:14:23,939 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:14:23,939 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:14:23,939 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1354669855] [2025-01-10 07:14:23,939 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1354669855] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:14:23,939 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:14:23,940 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-01-10 07:14:23,940 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1651726869] [2025-01-10 07:14:23,940 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:14:23,940 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:14:23,940 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:14:23,940 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:14:23,941 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:14:23,941 INFO L87 Difference]: Start difference. First operand 674 states and 1058 transitions. cyclomatic complexity: 400 Second operand has 3 states, 3 states have (on average 10.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:23,962 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:14:23,962 INFO L93 Difference]: Finished difference Result 1330 states and 2066 transitions. [2025-01-10 07:14:23,963 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1330 states and 2066 transitions. [2025-01-10 07:14:23,974 INFO L131 ngComponentsAnalysis]: Automaton has 32 accepting balls. 1328 [2025-01-10 07:14:23,984 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1330 states to 1330 states and 2066 transitions. [2025-01-10 07:14:23,985 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1330 [2025-01-10 07:14:23,987 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1330 [2025-01-10 07:14:23,987 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1330 states and 2066 transitions. [2025-01-10 07:14:23,989 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:14:23,989 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1330 states and 2066 transitions. [2025-01-10 07:14:23,990 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1330 states and 2066 transitions. [2025-01-10 07:14:24,017 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1330 to 1330. [2025-01-10 07:14:24,020 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1330 states, 1330 states have (on average 1.5533834586466166) internal successors, (2066), 1329 states have internal predecessors, (2066), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:24,025 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1330 states to 1330 states and 2066 transitions. [2025-01-10 07:14:24,027 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1330 states and 2066 transitions. [2025-01-10 07:14:24,027 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:14:24,028 INFO L432 stractBuchiCegarLoop]: Abstraction has 1330 states and 2066 transitions. [2025-01-10 07:14:24,028 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-01-10 07:14:24,029 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1330 states and 2066 transitions. [2025-01-10 07:14:24,036 INFO L131 ngComponentsAnalysis]: Automaton has 32 accepting balls. 1328 [2025-01-10 07:14:24,036 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:24,036 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:24,038 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:24,038 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:24,039 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-01-10 07:14:24,039 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume !(0 != main_~p9~0#1);" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-01-10 07:14:24,039 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:24,039 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 6 times [2025-01-10 07:14:24,040 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:24,040 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [832739720] [2025-01-10 07:14:24,040 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-01-10 07:14:24,040 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:24,043 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:24,047 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:24,047 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-01-10 07:14:24,047 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:24,047 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:24,050 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:24,051 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:24,052 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:24,052 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:24,054 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:24,054 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:24,054 INFO L85 PathProgramCache]: Analyzing trace with hash -193171429, now seen corresponding path program 1 times [2025-01-10 07:14:24,054 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:24,054 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1884244187] [2025-01-10 07:14:24,054 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:24,054 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:24,065 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-01-10 07:14:24,067 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-01-10 07:14:24,067 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:24,067 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:14:24,094 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:14:24,094 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:14:24,094 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1884244187] [2025-01-10 07:14:24,094 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1884244187] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:14:24,094 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:14:24,094 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-01-10 07:14:24,094 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [926775325] [2025-01-10 07:14:24,094 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:14:24,094 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:14:24,094 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:14:24,095 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:14:24,095 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:14:24,095 INFO L87 Difference]: Start difference. First operand 1330 states and 2066 transitions. cyclomatic complexity: 768 Second operand has 3 states, 3 states have (on average 10.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:24,131 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:14:24,132 INFO L93 Difference]: Finished difference Result 2626 states and 4034 transitions. [2025-01-10 07:14:24,132 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2626 states and 4034 transitions. [2025-01-10 07:14:24,157 INFO L131 ngComponentsAnalysis]: Automaton has 64 accepting balls. 2624 [2025-01-10 07:14:24,173 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2626 states to 2626 states and 4034 transitions. [2025-01-10 07:14:24,173 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2626 [2025-01-10 07:14:24,176 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2626 [2025-01-10 07:14:24,176 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2626 states and 4034 transitions. [2025-01-10 07:14:24,183 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:14:24,183 INFO L218 hiAutomatonCegarLoop]: Abstraction has 2626 states and 4034 transitions. [2025-01-10 07:14:24,185 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2626 states and 4034 transitions. [2025-01-10 07:14:24,244 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2626 to 2626. [2025-01-10 07:14:24,248 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2626 states, 2626 states have (on average 1.5361766945925361) internal successors, (4034), 2625 states have internal predecessors, (4034), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:24,259 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2626 states to 2626 states and 4034 transitions. [2025-01-10 07:14:24,259 INFO L240 hiAutomatonCegarLoop]: Abstraction has 2626 states and 4034 transitions. [2025-01-10 07:14:24,259 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:14:24,261 INFO L432 stractBuchiCegarLoop]: Abstraction has 2626 states and 4034 transitions. [2025-01-10 07:14:24,261 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-01-10 07:14:24,261 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 2626 states and 4034 transitions. [2025-01-10 07:14:24,275 INFO L131 ngComponentsAnalysis]: Automaton has 64 accepting balls. 2624 [2025-01-10 07:14:24,276 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:24,276 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:24,277 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:24,277 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:24,278 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-01-10 07:14:24,278 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume !(0 != main_~p9~0#1);" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-01-10 07:14:24,278 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:24,278 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 7 times [2025-01-10 07:14:24,278 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:24,279 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1813935833] [2025-01-10 07:14:24,279 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-01-10 07:14:24,279 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:24,282 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:24,284 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:24,284 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:24,284 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:24,289 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:24,290 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:24,291 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:24,291 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:24,291 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:24,293 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:24,293 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:24,293 INFO L85 PathProgramCache]: Analyzing trace with hash 25683289, now seen corresponding path program 1 times [2025-01-10 07:14:24,293 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:24,293 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2053570341] [2025-01-10 07:14:24,294 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:24,294 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:24,301 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-01-10 07:14:24,306 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-01-10 07:14:24,307 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:24,307 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:14:24,341 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:14:24,341 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:14:24,341 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2053570341] [2025-01-10 07:14:24,341 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2053570341] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:14:24,341 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:14:24,341 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-01-10 07:14:24,341 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1660218976] [2025-01-10 07:14:24,341 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:14:24,341 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:14:24,341 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:14:24,342 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:14:24,342 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:14:24,342 INFO L87 Difference]: Start difference. First operand 2626 states and 4034 transitions. cyclomatic complexity: 1472 Second operand has 3 states, 3 states have (on average 10.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:24,377 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:14:24,377 INFO L93 Difference]: Finished difference Result 5186 states and 7874 transitions. [2025-01-10 07:14:24,378 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 5186 states and 7874 transitions. [2025-01-10 07:14:24,418 INFO L131 ngComponentsAnalysis]: Automaton has 128 accepting balls. 5184 [2025-01-10 07:14:24,447 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 5186 states to 5186 states and 7874 transitions. [2025-01-10 07:14:24,448 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5186 [2025-01-10 07:14:24,453 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 5186 [2025-01-10 07:14:24,453 INFO L73 IsDeterministic]: Start isDeterministic. Operand 5186 states and 7874 transitions. [2025-01-10 07:14:24,463 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:14:24,463 INFO L218 hiAutomatonCegarLoop]: Abstraction has 5186 states and 7874 transitions. [2025-01-10 07:14:24,468 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5186 states and 7874 transitions. [2025-01-10 07:14:24,572 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5186 to 5186. [2025-01-10 07:14:24,582 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5186 states, 5186 states have (on average 1.5183185499421519) internal successors, (7874), 5185 states have internal predecessors, (7874), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:24,603 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5186 states to 5186 states and 7874 transitions. [2025-01-10 07:14:24,603 INFO L240 hiAutomatonCegarLoop]: Abstraction has 5186 states and 7874 transitions. [2025-01-10 07:14:24,604 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:14:24,605 INFO L432 stractBuchiCegarLoop]: Abstraction has 5186 states and 7874 transitions. [2025-01-10 07:14:24,605 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-01-10 07:14:24,605 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 5186 states and 7874 transitions. [2025-01-10 07:14:24,631 INFO L131 ngComponentsAnalysis]: Automaton has 128 accepting balls. 5184 [2025-01-10 07:14:24,631 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:24,631 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:24,631 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:24,631 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:24,632 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-01-10 07:14:24,632 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-01-10 07:14:24,632 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:24,632 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 8 times [2025-01-10 07:14:24,632 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:24,632 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1598275378] [2025-01-10 07:14:24,632 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-01-10 07:14:24,632 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:24,635 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:24,636 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:24,636 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-01-10 07:14:24,637 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:24,637 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:24,638 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:24,640 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:24,640 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:24,640 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:24,642 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:24,643 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:24,643 INFO L85 PathProgramCache]: Analyzing trace with hash 448385115, now seen corresponding path program 1 times [2025-01-10 07:14:24,644 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:24,644 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [3982118] [2025-01-10 07:14:24,644 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:24,644 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:24,649 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-01-10 07:14:24,650 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-01-10 07:14:24,650 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:24,651 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:14:24,681 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:14:24,682 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:14:24,682 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [3982118] [2025-01-10 07:14:24,683 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [3982118] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:14:24,683 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:14:24,683 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-01-10 07:14:24,683 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [478909837] [2025-01-10 07:14:24,683 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:14:24,683 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:14:24,683 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:14:24,684 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:14:24,685 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:14:24,685 INFO L87 Difference]: Start difference. First operand 5186 states and 7874 transitions. cyclomatic complexity: 2816 Second operand has 3 states, 3 states have (on average 10.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:24,739 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:14:24,739 INFO L93 Difference]: Finished difference Result 10242 states and 15362 transitions. [2025-01-10 07:14:24,739 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 10242 states and 15362 transitions. [2025-01-10 07:14:24,847 INFO L131 ngComponentsAnalysis]: Automaton has 256 accepting balls. 10240 [2025-01-10 07:14:24,895 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 10242 states to 10242 states and 15362 transitions. [2025-01-10 07:14:24,896 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10242 [2025-01-10 07:14:24,906 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10242 [2025-01-10 07:14:24,907 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10242 states and 15362 transitions. [2025-01-10 07:14:24,925 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:14:24,925 INFO L218 hiAutomatonCegarLoop]: Abstraction has 10242 states and 15362 transitions. [2025-01-10 07:14:24,934 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10242 states and 15362 transitions. [2025-01-10 07:14:25,130 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10242 to 10242. [2025-01-10 07:14:25,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10242 states, 10242 states have (on average 1.4999023628197619) internal successors, (15362), 10241 states have internal predecessors, (15362), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:25,260 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10242 states to 10242 states and 15362 transitions. [2025-01-10 07:14:25,260 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10242 states and 15362 transitions. [2025-01-10 07:14:25,261 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:14:25,266 INFO L432 stractBuchiCegarLoop]: Abstraction has 10242 states and 15362 transitions. [2025-01-10 07:14:25,266 INFO L338 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2025-01-10 07:14:25,266 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10242 states and 15362 transitions. [2025-01-10 07:14:25,312 INFO L131 ngComponentsAnalysis]: Automaton has 256 accepting balls. 10240 [2025-01-10 07:14:25,312 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:25,312 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:25,313 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:25,313 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:25,313 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-01-10 07:14:25,313 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-01-10 07:14:25,314 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:25,314 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 9 times [2025-01-10 07:14:25,314 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:25,314 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [713254862] [2025-01-10 07:14:25,314 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-01-10 07:14:25,314 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:25,318 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:25,319 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:25,320 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-01-10 07:14:25,320 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:25,320 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:25,321 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:25,322 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:25,322 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:25,322 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:25,323 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:25,324 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:25,324 INFO L85 PathProgramCache]: Analyzing trace with hash -1240558627, now seen corresponding path program 1 times [2025-01-10 07:14:25,324 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:25,324 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1388635520] [2025-01-10 07:14:25,324 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:25,325 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:25,330 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-01-10 07:14:25,333 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-01-10 07:14:25,333 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:25,333 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:14:25,358 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:14:25,359 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:14:25,359 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1388635520] [2025-01-10 07:14:25,359 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1388635520] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:14:25,359 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:14:25,359 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-01-10 07:14:25,359 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [574201926] [2025-01-10 07:14:25,359 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:14:25,359 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:14:25,359 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:14:25,360 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:14:25,360 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:14:25,360 INFO L87 Difference]: Start difference. First operand 10242 states and 15362 transitions. cyclomatic complexity: 5376 Second operand has 3 states, 3 states have (on average 10.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:25,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:14:25,442 INFO L93 Difference]: Finished difference Result 20226 states and 29954 transitions. [2025-01-10 07:14:25,442 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 20226 states and 29954 transitions. [2025-01-10 07:14:25,559 INFO L131 ngComponentsAnalysis]: Automaton has 512 accepting balls. 20224 [2025-01-10 07:14:25,730 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 20226 states to 20226 states and 29954 transitions. [2025-01-10 07:14:25,731 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20226 [2025-01-10 07:14:25,751 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20226 [2025-01-10 07:14:25,752 INFO L73 IsDeterministic]: Start isDeterministic. Operand 20226 states and 29954 transitions. [2025-01-10 07:14:25,781 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:14:25,781 INFO L218 hiAutomatonCegarLoop]: Abstraction has 20226 states and 29954 transitions. [2025-01-10 07:14:25,799 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20226 states and 29954 transitions. [2025-01-10 07:14:26,037 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20226 to 20226. [2025-01-10 07:14:26,086 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20226 states, 20226 states have (on average 1.4809650944329082) internal successors, (29954), 20225 states have internal predecessors, (29954), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:26,154 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20226 states to 20226 states and 29954 transitions. [2025-01-10 07:14:26,154 INFO L240 hiAutomatonCegarLoop]: Abstraction has 20226 states and 29954 transitions. [2025-01-10 07:14:26,155 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:14:26,157 INFO L432 stractBuchiCegarLoop]: Abstraction has 20226 states and 29954 transitions. [2025-01-10 07:14:26,157 INFO L338 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2025-01-10 07:14:26,157 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 20226 states and 29954 transitions. [2025-01-10 07:14:26,266 INFO L131 ngComponentsAnalysis]: Automaton has 512 accepting balls. 20224 [2025-01-10 07:14:26,267 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:26,267 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:26,268 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:26,268 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:26,268 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-01-10 07:14:26,268 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-01-10 07:14:26,269 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:26,269 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 10 times [2025-01-10 07:14:26,270 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:26,270 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2099304337] [2025-01-10 07:14:26,270 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-01-10 07:14:26,270 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:26,273 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-01-10 07:14:26,278 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:26,278 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-01-10 07:14:26,278 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:26,278 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:26,279 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:26,281 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:26,282 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:26,282 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:26,287 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:26,288 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:26,288 INFO L85 PathProgramCache]: Analyzing trace with hash 1060263963, now seen corresponding path program 1 times [2025-01-10 07:14:26,288 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:26,288 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1612183976] [2025-01-10 07:14:26,288 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:26,288 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:26,293 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-01-10 07:14:26,295 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-01-10 07:14:26,297 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:26,297 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:14:26,328 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:14:26,329 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:14:26,329 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1612183976] [2025-01-10 07:14:26,329 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1612183976] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:14:26,329 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:14:26,329 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-01-10 07:14:26,329 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1036579070] [2025-01-10 07:14:26,329 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:14:26,329 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:14:26,330 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:14:26,330 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:14:26,330 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:14:26,331 INFO L87 Difference]: Start difference. First operand 20226 states and 29954 transitions. cyclomatic complexity: 10240 Second operand has 3 states, 3 states have (on average 10.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:26,552 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:14:26,552 INFO L93 Difference]: Finished difference Result 39938 states and 58370 transitions. [2025-01-10 07:14:26,552 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 39938 states and 58370 transitions. [2025-01-10 07:14:26,737 INFO L131 ngComponentsAnalysis]: Automaton has 1024 accepting balls. 39936 [2025-01-10 07:14:26,934 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 39938 states to 39938 states and 58370 transitions. [2025-01-10 07:14:26,934 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 39938 [2025-01-10 07:14:26,961 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 39938 [2025-01-10 07:14:26,961 INFO L73 IsDeterministic]: Start isDeterministic. Operand 39938 states and 58370 transitions. [2025-01-10 07:14:26,998 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:14:26,998 INFO L218 hiAutomatonCegarLoop]: Abstraction has 39938 states and 58370 transitions. [2025-01-10 07:14:27,026 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39938 states and 58370 transitions. [2025-01-10 07:14:27,592 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39938 to 39938. [2025-01-10 07:14:27,645 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39938 states, 39938 states have (on average 1.4615153487906254) internal successors, (58370), 39937 states have internal predecessors, (58370), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:27,747 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39938 states to 39938 states and 58370 transitions. [2025-01-10 07:14:27,747 INFO L240 hiAutomatonCegarLoop]: Abstraction has 39938 states and 58370 transitions. [2025-01-10 07:14:27,748 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:14:27,749 INFO L432 stractBuchiCegarLoop]: Abstraction has 39938 states and 58370 transitions. [2025-01-10 07:14:27,749 INFO L338 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2025-01-10 07:14:27,749 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 39938 states and 58370 transitions. [2025-01-10 07:14:27,873 INFO L131 ngComponentsAnalysis]: Automaton has 1024 accepting balls. 39936 [2025-01-10 07:14:27,873 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:27,873 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:27,873 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:27,873 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:27,874 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-01-10 07:14:27,874 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-01-10 07:14:27,874 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:27,874 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 11 times [2025-01-10 07:14:27,874 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:27,874 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1843330513] [2025-01-10 07:14:27,875 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-01-10 07:14:27,875 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:27,879 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:27,880 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:27,880 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-01-10 07:14:27,881 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:27,881 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:27,882 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:27,884 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:27,884 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:27,884 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:27,887 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:27,888 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:27,889 INFO L85 PathProgramCache]: Analyzing trace with hash -528083939, now seen corresponding path program 1 times [2025-01-10 07:14:27,889 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:27,889 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [432053325] [2025-01-10 07:14:27,889 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:27,890 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:27,894 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-01-10 07:14:27,896 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-01-10 07:14:27,897 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:27,897 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:14:27,920 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:14:27,920 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:14:27,920 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [432053325] [2025-01-10 07:14:27,920 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [432053325] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:14:27,920 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:14:27,920 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-01-10 07:14:27,920 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1772950438] [2025-01-10 07:14:27,921 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:14:27,921 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:14:27,921 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:14:27,921 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:14:27,921 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:14:27,922 INFO L87 Difference]: Start difference. First operand 39938 states and 58370 transitions. cyclomatic complexity: 19456 Second operand has 3 states, 3 states have (on average 10.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:28,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:14:28,206 INFO L93 Difference]: Finished difference Result 78850 states and 113666 transitions. [2025-01-10 07:14:28,206 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 78850 states and 113666 transitions. [2025-01-10 07:14:28,580 INFO L131 ngComponentsAnalysis]: Automaton has 2048 accepting balls. 78848 [2025-01-10 07:14:28,764 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 78850 states to 78850 states and 113666 transitions. [2025-01-10 07:14:28,765 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 78850 [2025-01-10 07:14:28,808 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 78850 [2025-01-10 07:14:28,808 INFO L73 IsDeterministic]: Start isDeterministic. Operand 78850 states and 113666 transitions. [2025-01-10 07:14:28,959 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:14:28,959 INFO L218 hiAutomatonCegarLoop]: Abstraction has 78850 states and 113666 transitions. [2025-01-10 07:14:28,989 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 78850 states and 113666 transitions. [2025-01-10 07:14:29,709 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 78850 to 78850. [2025-01-10 07:14:29,791 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 78850 states, 78850 states have (on average 1.4415472415979709) internal successors, (113666), 78849 states have internal predecessors, (113666), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:30,204 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 78850 states to 78850 states and 113666 transitions. [2025-01-10 07:14:30,205 INFO L240 hiAutomatonCegarLoop]: Abstraction has 78850 states and 113666 transitions. [2025-01-10 07:14:30,209 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:14:30,209 INFO L432 stractBuchiCegarLoop]: Abstraction has 78850 states and 113666 transitions. [2025-01-10 07:14:30,209 INFO L338 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2025-01-10 07:14:30,209 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 78850 states and 113666 transitions. [2025-01-10 07:14:30,572 INFO L131 ngComponentsAnalysis]: Automaton has 2048 accepting balls. 78848 [2025-01-10 07:14:30,572 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:30,572 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:30,574 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:30,574 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:30,574 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-01-10 07:14:30,574 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-01-10 07:14:30,574 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:30,574 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 12 times [2025-01-10 07:14:30,574 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:30,575 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1824328275] [2025-01-10 07:14:30,575 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-01-10 07:14:30,575 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:30,578 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:30,579 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:30,579 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-01-10 07:14:30,579 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:30,579 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:30,581 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:30,581 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:30,581 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:30,582 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:30,585 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:30,587 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:30,587 INFO L85 PathProgramCache]: Analyzing trace with hash -1549152293, now seen corresponding path program 1 times [2025-01-10 07:14:30,587 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:30,587 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [267223405] [2025-01-10 07:14:30,587 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:30,587 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:30,595 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-01-10 07:14:30,600 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-01-10 07:14:30,601 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:30,601 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 07:14:30,620 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 07:14:30,620 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 07:14:30,620 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [267223405] [2025-01-10 07:14:30,621 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [267223405] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 07:14:30,621 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 07:14:30,621 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-01-10 07:14:30,621 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [915655656] [2025-01-10 07:14:30,621 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 07:14:30,621 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 07:14:30,621 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 07:14:30,622 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 07:14:30,622 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 07:14:30,622 INFO L87 Difference]: Start difference. First operand 78850 states and 113666 transitions. cyclomatic complexity: 36864 Second operand has 3 states, 2 states have (on average 15.0) internal successors, (30), 3 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:31,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 07:14:31,121 INFO L93 Difference]: Finished difference Result 155650 states and 221186 transitions. [2025-01-10 07:14:31,121 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 155650 states and 221186 transitions. [2025-01-10 07:14:31,725 INFO L131 ngComponentsAnalysis]: Automaton has 4096 accepting balls. 155648 [2025-01-10 07:14:32,322 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 155650 states to 155650 states and 221186 transitions. [2025-01-10 07:14:32,322 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 155650 [2025-01-10 07:14:32,408 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 155650 [2025-01-10 07:14:32,409 INFO L73 IsDeterministic]: Start isDeterministic. Operand 155650 states and 221186 transitions. [2025-01-10 07:14:32,510 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 07:14:32,511 INFO L218 hiAutomatonCegarLoop]: Abstraction has 155650 states and 221186 transitions. [2025-01-10 07:14:32,571 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 155650 states and 221186 transitions. [2025-01-10 07:14:34,068 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 155650 to 155650. [2025-01-10 07:14:34,181 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 155650 states, 155650 states have (on average 1.4210472213299068) internal successors, (221186), 155649 states have internal predecessors, (221186), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 07:14:34,607 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155650 states to 155650 states and 221186 transitions. [2025-01-10 07:14:34,607 INFO L240 hiAutomatonCegarLoop]: Abstraction has 155650 states and 221186 transitions. [2025-01-10 07:14:34,608 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 07:14:34,608 INFO L432 stractBuchiCegarLoop]: Abstraction has 155650 states and 221186 transitions. [2025-01-10 07:14:34,608 INFO L338 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2025-01-10 07:14:34,608 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 155650 states and 221186 transitions. [2025-01-10 07:14:35,104 INFO L131 ngComponentsAnalysis]: Automaton has 4096 accepting balls. 155648 [2025-01-10 07:14:35,105 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 07:14:35,105 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 07:14:35,106 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 07:14:35,106 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 07:14:35,107 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_~cond~0#1;" [2025-01-10 07:14:35,107 INFO L754 eck$LassoCheckResult]: Loop: "havoc main_#t~nondet18#1;main_~cond~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p14~0#1);" [2025-01-10 07:14:35,107 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:35,107 INFO L85 PathProgramCache]: Analyzing trace with hash 963, now seen corresponding path program 13 times [2025-01-10 07:14:35,107 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:35,107 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [57218466] [2025-01-10 07:14:35,108 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-01-10 07:14:35,108 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:35,110 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:35,112 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:35,112 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:35,112 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:35,112 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:35,113 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:35,113 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:35,113 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:35,113 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:35,115 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:35,115 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:35,116 INFO L85 PathProgramCache]: Analyzing trace with hash 1465951325, now seen corresponding path program 1 times [2025-01-10 07:14:35,116 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:35,116 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1214569502] [2025-01-10 07:14:35,116 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:35,116 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:35,119 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-01-10 07:14:35,120 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-01-10 07:14:35,121 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:35,121 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:35,121 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:35,122 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-01-10 07:14:35,123 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-01-10 07:14:35,123 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:35,123 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:35,129 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:35,130 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 07:14:35,130 INFO L85 PathProgramCache]: Analyzing trace with hash -366925665, now seen corresponding path program 1 times [2025-01-10 07:14:35,130 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 07:14:35,130 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [722423766] [2025-01-10 07:14:35,130 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 07:14:35,130 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 07:14:35,133 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 32 statements into 1 equivalence classes. [2025-01-10 07:14:35,135 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 32 of 32 statements. [2025-01-10 07:14:35,135 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:35,135 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:35,135 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:35,136 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 32 statements into 1 equivalence classes. [2025-01-10 07:14:35,137 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 32 of 32 statements. [2025-01-10 07:14:35,137 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:35,137 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:35,145 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 07:14:35,778 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:35,780 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:35,780 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:35,780 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:35,780 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 07:14:35,787 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 07:14:35,789 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 07:14:35,789 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 07:14:35,790 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 07:14:35,824 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 10.01 07:14:35 BoogieIcfgContainer [2025-01-10 07:14:35,824 INFO L131 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2025-01-10 07:14:35,825 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-01-10 07:14:35,825 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-01-10 07:14:35,825 INFO L274 PluginConnector]: Witness Printer initialized [2025-01-10 07:14:35,826 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.01 07:14:22" (3/4) ... [2025-01-10 07:14:35,828 INFO L143 WitnessPrinter]: Generating witness for non-termination counterexample [2025-01-10 07:14:35,911 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/witness.graphml [2025-01-10 07:14:35,912 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-01-10 07:14:35,912 INFO L158 Benchmark]: Toolchain (without parser) took 13668.46ms. Allocated memory was 142.6MB in the beginning and 9.4GB in the end (delta: 9.2GB). Free memory was 112.2MB in the beginning and 7.9GB in the end (delta: -7.8GB). Peak memory consumption was 1.4GB. Max. memory is 16.1GB. [2025-01-10 07:14:35,912 INFO L158 Benchmark]: CDTParser took 0.32ms. Allocated memory is still 201.3MB. Free memory is still 124.3MB. There was no memory consumed. Max. memory is 16.1GB. [2025-01-10 07:14:35,913 INFO L158 Benchmark]: CACSL2BoogieTranslator took 259.48ms. Allocated memory is still 142.6MB. Free memory was 112.2MB in the beginning and 100.5MB in the end (delta: 11.7MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-01-10 07:14:35,913 INFO L158 Benchmark]: Boogie Procedure Inliner took 34.23ms. Allocated memory is still 142.6MB. Free memory was 100.5MB in the beginning and 99.1MB in the end (delta: 1.5MB). There was no memory consumed. Max. memory is 16.1GB. [2025-01-10 07:14:35,913 INFO L158 Benchmark]: Boogie Preprocessor took 42.46ms. Allocated memory is still 142.6MB. Free memory was 99.1MB in the beginning and 97.3MB in the end (delta: 1.8MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-01-10 07:14:35,915 INFO L158 Benchmark]: RCFGBuilder took 343.72ms. Allocated memory is still 142.6MB. Free memory was 97.3MB in the beginning and 81.0MB in the end (delta: 16.3MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-01-10 07:14:35,915 INFO L158 Benchmark]: BuchiAutomizer took 12896.12ms. Allocated memory was 142.6MB in the beginning and 9.4GB in the end (delta: 9.2GB). Free memory was 81.0MB in the beginning and 7.9GB in the end (delta: -7.8GB). Peak memory consumption was 1.4GB. Max. memory is 16.1GB. [2025-01-10 07:14:35,915 INFO L158 Benchmark]: Witness Printer took 86.38ms. Allocated memory is still 9.4GB. Free memory was 7.9GB in the beginning and 7.9GB in the end (delta: 99.2kB). There was no memory consumed. Max. memory is 16.1GB. [2025-01-10 07:14:35,917 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.32ms. Allocated memory is still 201.3MB. Free memory is still 124.3MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 259.48ms. Allocated memory is still 142.6MB. Free memory was 112.2MB in the beginning and 100.5MB in the end (delta: 11.7MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 34.23ms. Allocated memory is still 142.6MB. Free memory was 100.5MB in the beginning and 99.1MB in the end (delta: 1.5MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 42.46ms. Allocated memory is still 142.6MB. Free memory was 99.1MB in the beginning and 97.3MB in the end (delta: 1.8MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * RCFGBuilder took 343.72ms. Allocated memory is still 142.6MB. Free memory was 97.3MB in the beginning and 81.0MB in the end (delta: 16.3MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * BuchiAutomizer took 12896.12ms. Allocated memory was 142.6MB in the beginning and 9.4GB in the end (delta: 9.2GB). Free memory was 81.0MB in the beginning and 7.9GB in the end (delta: -7.8GB). Peak memory consumption was 1.4GB. Max. memory is 16.1GB. * Witness Printer took 86.38ms. Allocated memory is still 9.4GB. Free memory was 7.9GB in the beginning and 7.9GB in the end (delta: 99.2kB). There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 12 terminating modules (12 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.12 modules have a trivial ranking function, the largest among these consists of 3 locations. The remainder module has 155650 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 12.8s and 13 iterations. TraceHistogramMax:1. Analysis of lassos took 1.6s. Construction of modules took 0.1s. Büchi inclusion checks took 9.7s. Highest rank in rank-based complementation 0. Minimization of det autom 12. Minimization of nondet autom 0. Automata minimization 5.1s AutomataMinimizationTime, 12 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations. Non-live state removal took 2.7s Buchi closure took 0.2s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 688 SdHoareTripleChecker+Valid, 0.2s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 688 mSDsluCounter, 2150 SdHoareTripleChecker+Invalid, 0.1s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 832 mSDsCounter, 24 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 62 IncrementalHoareTripleChecker+Invalid, 86 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 24 mSolverCounterUnsat, 1318 mSDtfsCounter, 62 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont1 unkn0 SFLI12 SFLT0 conc0 concLT0 SILN0 SILU0 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - LassoShapedNonTerminationArgument [Line: 53]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite program execution. Stem: [L8] int p1 = __VERIFIER_nondet_int(); [L9] int lk1; [L11] int p2 = __VERIFIER_nondet_int(); [L12] int lk2; [L14] int p3 = __VERIFIER_nondet_int(); [L15] int lk3; [L17] int p4 = __VERIFIER_nondet_int(); [L18] int lk4; [L20] int p5 = __VERIFIER_nondet_int(); [L21] int lk5; [L23] int p6 = __VERIFIER_nondet_int(); [L24] int lk6; [L26] int p7 = __VERIFIER_nondet_int(); [L27] int lk7; [L29] int p8 = __VERIFIER_nondet_int(); [L30] int lk8; [L32] int p9 = __VERIFIER_nondet_int(); [L33] int lk9; [L35] int p10 = __VERIFIER_nondet_int(); [L36] int lk10; [L38] int p11 = __VERIFIER_nondet_int(); [L39] int lk11; [L41] int p12 = __VERIFIER_nondet_int(); [L42] int lk12; [L44] int p13 = __VERIFIER_nondet_int(); [L45] int lk13; [L47] int p14 = __VERIFIER_nondet_int(); [L48] int lk14; [L51] int cond; Loop: [L54] cond = __VERIFIER_nondet_int() [L55] COND FALSE !(cond == 0) [L58] lk1 = 0 [L60] lk2 = 0 [L62] lk3 = 0 [L64] lk4 = 0 [L66] lk5 = 0 [L68] lk6 = 0 [L70] lk7 = 0 [L72] lk8 = 0 [L74] lk9 = 0 [L76] lk10 = 0 [L78] lk11 = 0 [L80] lk12 = 0 [L82] lk13 = 0 [L84] lk14 = 0 [L88] COND FALSE !(p1 != 0) [L92] COND FALSE !(p2 != 0) [L96] COND FALSE !(p3 != 0) [L100] COND FALSE !(p4 != 0) [L104] COND FALSE !(p5 != 0) [L108] COND FALSE !(p6 != 0) [L112] COND FALSE !(p7 != 0) [L116] COND FALSE !(p8 != 0) [L120] COND FALSE !(p9 != 0) [L124] COND FALSE !(p10 != 0) [L128] COND FALSE !(p11 != 0) [L132] COND FALSE !(p12 != 0) [L136] COND FALSE !(p13 != 0) [L140] COND FALSE !(p14 != 0) [L146] COND FALSE !(p1 != 0) [L151] COND FALSE !(p2 != 0) [L156] COND FALSE !(p3 != 0) [L161] COND FALSE !(p4 != 0) [L166] COND FALSE !(p5 != 0) [L171] COND FALSE !(p6 != 0) [L176] COND FALSE !(p7 != 0) [L181] COND FALSE !(p8 != 0) [L186] COND FALSE !(p9 != 0) [L191] COND FALSE !(p10 != 0) [L196] COND FALSE !(p11 != 0) [L201] COND FALSE !(p12 != 0) [L206] COND FALSE !(p13 != 0) [L211] COND FALSE !(p14 != 0) End of lasso representation. - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 53]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L8] int p1 = __VERIFIER_nondet_int(); [L9] int lk1; [L11] int p2 = __VERIFIER_nondet_int(); [L12] int lk2; [L14] int p3 = __VERIFIER_nondet_int(); [L15] int lk3; [L17] int p4 = __VERIFIER_nondet_int(); [L18] int lk4; [L20] int p5 = __VERIFIER_nondet_int(); [L21] int lk5; [L23] int p6 = __VERIFIER_nondet_int(); [L24] int lk6; [L26] int p7 = __VERIFIER_nondet_int(); [L27] int lk7; [L29] int p8 = __VERIFIER_nondet_int(); [L30] int lk8; [L32] int p9 = __VERIFIER_nondet_int(); [L33] int lk9; [L35] int p10 = __VERIFIER_nondet_int(); [L36] int lk10; [L38] int p11 = __VERIFIER_nondet_int(); [L39] int lk11; [L41] int p12 = __VERIFIER_nondet_int(); [L42] int lk12; [L44] int p13 = __VERIFIER_nondet_int(); [L45] int lk13; [L47] int p14 = __VERIFIER_nondet_int(); [L48] int lk14; [L51] int cond; Loop: [L54] cond = __VERIFIER_nondet_int() [L55] COND FALSE !(cond == 0) [L58] lk1 = 0 [L60] lk2 = 0 [L62] lk3 = 0 [L64] lk4 = 0 [L66] lk5 = 0 [L68] lk6 = 0 [L70] lk7 = 0 [L72] lk8 = 0 [L74] lk9 = 0 [L76] lk10 = 0 [L78] lk11 = 0 [L80] lk12 = 0 [L82] lk13 = 0 [L84] lk14 = 0 [L88] COND FALSE !(p1 != 0) [L92] COND FALSE !(p2 != 0) [L96] COND FALSE !(p3 != 0) [L100] COND FALSE !(p4 != 0) [L104] COND FALSE !(p5 != 0) [L108] COND FALSE !(p6 != 0) [L112] COND FALSE !(p7 != 0) [L116] COND FALSE !(p8 != 0) [L120] COND FALSE !(p9 != 0) [L124] COND FALSE !(p10 != 0) [L128] COND FALSE !(p11 != 0) [L132] COND FALSE !(p12 != 0) [L136] COND FALSE !(p13 != 0) [L140] COND FALSE !(p14 != 0) [L146] COND FALSE !(p1 != 0) [L151] COND FALSE !(p2 != 0) [L156] COND FALSE !(p3 != 0) [L161] COND FALSE !(p4 != 0) [L166] COND FALSE !(p5 != 0) [L171] COND FALSE !(p6 != 0) [L176] COND FALSE !(p7 != 0) [L181] COND FALSE !(p8 != 0) [L186] COND FALSE !(p9 != 0) [L191] COND FALSE !(p10 != 0) [L196] COND FALSE !(p11 != 0) [L201] COND FALSE !(p12 != 0) [L206] COND FALSE !(p13 != 0) [L211] COND FALSE !(p14 != 0) End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2025-01-10 07:14:36,267 WARN L435 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Forcibly destroying the process [2025-01-10 07:14:36,268 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM)