./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test10-2.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 551b0097 Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test10-2.i -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 9a343b75818c5d561b79c31bb62e9abdd9bdb0bf3f01f7efa313d9ef0f4204f4 --- Real Ultimate output --- This is Ultimate 0.3.0-?-551b009-m [2025-01-10 08:24:38,442 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-01-10 08:24:38,504 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2025-01-10 08:24:38,509 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-01-10 08:24:38,510 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-01-10 08:24:38,536 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-01-10 08:24:38,537 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-01-10 08:24:38,537 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-01-10 08:24:38,537 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-01-10 08:24:38,538 INFO L153 SettingsManager]: * Use memory slicer=true [2025-01-10 08:24:38,538 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-01-10 08:24:38,539 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-01-10 08:24:38,539 INFO L153 SettingsManager]: * Use SBE=true [2025-01-10 08:24:38,539 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-01-10 08:24:38,539 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-01-10 08:24:38,539 INFO L153 SettingsManager]: * Use old map elimination=false [2025-01-10 08:24:38,539 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-01-10 08:24:38,540 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-01-10 08:24:38,540 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-01-10 08:24:38,540 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-01-10 08:24:38,540 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-01-10 08:24:38,540 INFO L153 SettingsManager]: * sizeof long=4 [2025-01-10 08:24:38,540 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-01-10 08:24:38,540 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-01-10 08:24:38,540 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-01-10 08:24:38,540 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-01-10 08:24:38,540 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-01-10 08:24:38,540 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-01-10 08:24:38,540 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-01-10 08:24:38,541 INFO L153 SettingsManager]: * sizeof long double=12 [2025-01-10 08:24:38,541 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-01-10 08:24:38,541 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-01-10 08:24:38,541 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-01-10 08:24:38,541 INFO L153 SettingsManager]: * Use constant arrays=true [2025-01-10 08:24:38,541 INFO L151 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2025-01-10 08:24:38,541 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-01-10 08:24:38,541 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-01-10 08:24:38,542 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-01-10 08:24:38,542 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-01-10 08:24:38,542 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 9a343b75818c5d561b79c31bb62e9abdd9bdb0bf3f01f7efa313d9ef0f4204f4 [2025-01-10 08:24:38,811 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-01-10 08:24:38,819 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-01-10 08:24:38,821 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-01-10 08:24:38,822 INFO L270 PluginConnector]: Initializing CDTParser... [2025-01-10 08:24:38,823 INFO L274 PluginConnector]: CDTParser initialized [2025-01-10 08:24:38,824 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test10-2.i [2025-01-10 08:24:39,959 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/722d5347f/4d8f0e6247a246258a6dacf0d3f6dca1/FLAGb95e1bf23 [2025-01-10 08:24:40,319 INFO L384 CDTParser]: Found 1 translation units. [2025-01-10 08:24:40,319 INFO L180 CDTParser]: Scanning /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test10-2.i [2025-01-10 08:24:40,339 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/722d5347f/4d8f0e6247a246258a6dacf0d3f6dca1/FLAGb95e1bf23 [2025-01-10 08:24:40,555 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/722d5347f/4d8f0e6247a246258a6dacf0d3f6dca1 [2025-01-10 08:24:40,557 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-01-10 08:24:40,558 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-01-10 08:24:40,559 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-01-10 08:24:40,559 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-01-10 08:24:40,562 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-01-10 08:24:40,562 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.01 08:24:40" (1/1) ... [2025-01-10 08:24:40,563 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@192bcea3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 08:24:40, skipping insertion in model container [2025-01-10 08:24:40,563 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 10.01 08:24:40" (1/1) ... [2025-01-10 08:24:40,598 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-01-10 08:24:41,033 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-01-10 08:24:41,048 INFO L200 MainTranslator]: Completed pre-run [2025-01-10 08:24:41,186 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-01-10 08:24:41,216 INFO L204 MainTranslator]: Completed translation [2025-01-10 08:24:41,217 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 08:24:41 WrapperNode [2025-01-10 08:24:41,218 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-01-10 08:24:41,218 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-01-10 08:24:41,218 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-01-10 08:24:41,219 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-01-10 08:24:41,223 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 08:24:41" (1/1) ... [2025-01-10 08:24:41,265 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 08:24:41" (1/1) ... [2025-01-10 08:24:41,346 INFO L138 Inliner]: procedures = 177, calls = 558, calls flagged for inlining = 11, calls inlined = 38, statements flattened = 3662 [2025-01-10 08:24:41,346 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-01-10 08:24:41,347 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-01-10 08:24:41,347 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-01-10 08:24:41,347 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-01-10 08:24:41,355 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 08:24:41" (1/1) ... [2025-01-10 08:24:41,355 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 08:24:41" (1/1) ... [2025-01-10 08:24:41,401 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 08:24:41" (1/1) ... [2025-01-10 08:24:41,525 INFO L175 MemorySlicer]: Split 528 memory accesses to 3 slices as follows [2, 420, 106]. 80 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0, 0]. The 94 writes are split as follows [0, 90, 4]. [2025-01-10 08:24:41,525 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 08:24:41" (1/1) ... [2025-01-10 08:24:41,525 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 08:24:41" (1/1) ... [2025-01-10 08:24:41,568 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 08:24:41" (1/1) ... [2025-01-10 08:24:41,572 INFO L184 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 08:24:41" (1/1) ... [2025-01-10 08:24:41,586 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 08:24:41" (1/1) ... [2025-01-10 08:24:41,593 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 08:24:41" (1/1) ... [2025-01-10 08:24:41,600 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 08:24:41" (1/1) ... [2025-01-10 08:24:41,612 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-01-10 08:24:41,613 INFO L112 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2025-01-10 08:24:41,613 INFO L270 PluginConnector]: Initializing RCFGBuilder... [2025-01-10 08:24:41,613 INFO L274 PluginConnector]: RCFGBuilder initialized [2025-01-10 08:24:41,613 INFO L184 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 08:24:41" (1/1) ... [2025-01-10 08:24:41,618 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-01-10 08:24:41,637 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-01-10 08:24:41,651 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-01-10 08:24:41,658 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-01-10 08:24:41,675 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2025-01-10 08:24:41,675 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2025-01-10 08:24:41,675 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#2 [2025-01-10 08:24:41,675 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2025-01-10 08:24:41,675 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2025-01-10 08:24:41,676 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#2 [2025-01-10 08:24:41,676 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#0 [2025-01-10 08:24:41,676 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#1 [2025-01-10 08:24:41,676 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#2 [2025-01-10 08:24:41,676 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#0 [2025-01-10 08:24:41,676 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#1 [2025-01-10 08:24:41,676 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#2 [2025-01-10 08:24:41,676 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2025-01-10 08:24:41,676 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-01-10 08:24:41,676 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#0 [2025-01-10 08:24:41,676 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#1 [2025-01-10 08:24:41,676 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#2 [2025-01-10 08:24:41,676 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2025-01-10 08:24:41,676 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#0 [2025-01-10 08:24:41,676 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#1 [2025-01-10 08:24:41,676 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#2 [2025-01-10 08:24:41,676 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2025-01-10 08:24:41,676 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-01-10 08:24:41,676 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2025-01-10 08:24:41,676 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#2 [2025-01-10 08:24:41,676 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-01-10 08:24:41,676 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-01-10 08:24:41,928 INFO L234 CfgBuilder]: Building ICFG [2025-01-10 08:24:41,930 INFO L260 CfgBuilder]: Building CFG for each procedure with an implementation [2025-01-10 08:24:41,932 WARN L773 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2025-01-10 08:24:42,003 WARN L773 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2025-01-10 08:24:42,017 WARN L773 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2025-01-10 08:24:44,288 INFO L? ?]: Removed 918 outVars from TransFormulas that were not future-live. [2025-01-10 08:24:44,288 INFO L283 CfgBuilder]: Performing block encoding [2025-01-10 08:24:44,318 INFO L307 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-01-10 08:24:44,319 INFO L312 CfgBuilder]: Removed 77 assume(true) statements. [2025-01-10 08:24:44,319 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.01 08:24:44 BoogieIcfgContainer [2025-01-10 08:24:44,320 INFO L131 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2025-01-10 08:24:44,320 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-01-10 08:24:44,320 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-01-10 08:24:44,324 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-01-10 08:24:44,324 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-01-10 08:24:44,324 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 10.01 08:24:40" (1/3) ... [2025-01-10 08:24:44,325 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@53293239 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 10.01 08:24:44, skipping insertion in model container [2025-01-10 08:24:44,326 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-01-10 08:24:44,326 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 10.01 08:24:41" (2/3) ... [2025-01-10 08:24:44,326 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@53293239 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 10.01 08:24:44, skipping insertion in model container [2025-01-10 08:24:44,326 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-01-10 08:24:44,326 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 10.01 08:24:44" (3/3) ... [2025-01-10 08:24:44,327 INFO L363 chiAutomizerObserver]: Analyzing ICFG uthash_SFH_test10-2.i [2025-01-10 08:24:44,374 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-01-10 08:24:44,374 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-01-10 08:24:44,374 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-01-10 08:24:44,374 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-01-10 08:24:44,374 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-01-10 08:24:44,374 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-01-10 08:24:44,374 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-01-10 08:24:44,374 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-01-10 08:24:44,380 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 1121 states, 1113 states have (on average 1.6163522012578617) internal successors, (1799), 1113 states have internal predecessors, (1799), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-01-10 08:24:44,433 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 1017 [2025-01-10 08:24:44,434 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 08:24:44,434 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 08:24:44,439 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 08:24:44,439 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 08:24:44,439 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-01-10 08:24:44,441 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 1121 states, 1113 states have (on average 1.6163522012578617) internal successors, (1799), 1113 states have internal predecessors, (1799), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-01-10 08:24:44,451 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 1017 [2025-01-10 08:24:44,452 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 08:24:44,452 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 08:24:44,452 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 08:24:44,452 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 08:24:44,457 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite608#1.base, main_#t~ite608#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-01-10 08:24:44,457 INFO L754 eck$LassoCheckResult]: Loop: "call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;" "call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false;" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume !true;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-01-10 08:24:44,461 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:24:44,461 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 1 times [2025-01-10 08:24:44,466 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:24:44,466 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [331010023] [2025-01-10 08:24:44,466 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 08:24:44,467 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:24:44,521 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:24:44,533 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:24:44,533 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:24:44,533 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:24:44,533 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 08:24:44,541 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:24:44,545 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:24:44,545 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:24:44,545 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:24:44,566 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 08:24:44,567 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:24:44,567 INFO L85 PathProgramCache]: Analyzing trace with hash -1351819707, now seen corresponding path program 1 times [2025-01-10 08:24:44,568 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:24:44,568 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [902245551] [2025-01-10 08:24:44,568 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 08:24:44,568 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:24:44,581 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 8 statements into 1 equivalence classes. [2025-01-10 08:24:44,587 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-01-10 08:24:44,587 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:24:44,587 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 08:24:44,633 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 08:24:44,634 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 08:24:44,634 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [902245551] [2025-01-10 08:24:44,634 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [902245551] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 08:24:44,634 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 08:24:44,634 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-01-10 08:24:44,635 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1433387064] [2025-01-10 08:24:44,635 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 08:24:44,641 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 08:24:44,642 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 08:24:44,658 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2025-01-10 08:24:44,658 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2025-01-10 08:24:44,661 INFO L87 Difference]: Start difference. First operand has 1121 states, 1113 states have (on average 1.6163522012578617) internal successors, (1799), 1113 states have internal predecessors, (1799), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Second operand has 2 states, 2 states have (on average 4.0) internal successors, (8), 2 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 08:24:44,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 08:24:44,713 INFO L93 Difference]: Finished difference Result 1105 states and 1609 transitions. [2025-01-10 08:24:44,716 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1105 states and 1609 transitions. [2025-01-10 08:24:44,730 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 645 [2025-01-10 08:24:44,747 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1105 states to 1086 states and 1590 transitions. [2025-01-10 08:24:44,748 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1086 [2025-01-10 08:24:44,750 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1086 [2025-01-10 08:24:44,752 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1086 states and 1590 transitions. [2025-01-10 08:24:44,756 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 08:24:44,760 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1086 states and 1590 transitions. [2025-01-10 08:24:44,773 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1086 states and 1590 transitions. [2025-01-10 08:24:44,814 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1086 to 1086. [2025-01-10 08:24:44,816 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1086 states, 1079 states have (on average 1.4624652455977758) internal successors, (1578), 1078 states have internal predecessors, (1578), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-01-10 08:24:44,819 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1086 states to 1086 states and 1590 transitions. [2025-01-10 08:24:44,820 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1086 states and 1590 transitions. [2025-01-10 08:24:44,821 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-01-10 08:24:44,823 INFO L432 stractBuchiCegarLoop]: Abstraction has 1086 states and 1590 transitions. [2025-01-10 08:24:44,823 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-01-10 08:24:44,823 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1086 states and 1590 transitions. [2025-01-10 08:24:44,827 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 645 [2025-01-10 08:24:44,827 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 08:24:44,827 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 08:24:44,828 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 08:24:44,828 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 08:24:44,828 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite608#1.base, main_#t~ite608#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-01-10 08:24:44,829 INFO L754 eck$LassoCheckResult]: Loop: "call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;" "call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "havoc main_~_ha_hashv~1#1;" "goto;" "havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem183#1 := read~int#1(main_~_hj_key~1#1.base, 9 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 65536 * (main_#t~mem183#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem184#1 := read~int#1(main_~_hj_key~1#1.base, 8 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 256 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem185#1 := read~int#1(main_~_hj_key~1#1.base, 7 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 16777216 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem186#1 := read~int#1(main_~_hj_key~1#1.base, 6 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 65536 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem187#1 := read~int#1(main_~_hj_key~1#1.base, 5 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 256 * (main_#t~mem187#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem188#1 := read~int#1(main_~_hj_key~1#1.base, 4 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + (if main_#t~mem188#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem188#1 % 256 % 4294967296 else main_#t~mem188#1 % 256 % 4294967296 - 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise194#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-01-10 08:24:44,830 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:24:44,830 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 2 times [2025-01-10 08:24:44,830 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:24:44,830 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [650706639] [2025-01-10 08:24:44,830 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-01-10 08:24:44,830 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:24:44,844 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:24:44,854 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:24:44,855 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-01-10 08:24:44,855 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:24:44,855 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 08:24:44,870 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:24:44,874 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:24:44,874 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:24:44,874 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:24:44,882 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 08:24:44,882 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:24:44,882 INFO L85 PathProgramCache]: Analyzing trace with hash -1739601470, now seen corresponding path program 1 times [2025-01-10 08:24:44,882 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:24:44,882 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1543018994] [2025-01-10 08:24:44,883 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 08:24:44,883 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:24:44,921 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 77 statements into 1 equivalence classes. [2025-01-10 08:24:44,941 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 77 of 77 statements. [2025-01-10 08:24:44,942 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:24:44,942 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 08:24:45,330 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 08:24:45,330 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 08:24:45,330 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1543018994] [2025-01-10 08:24:45,330 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1543018994] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 08:24:45,330 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 08:24:45,330 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-01-10 08:24:45,330 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2138429768] [2025-01-10 08:24:45,330 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 08:24:45,331 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 08:24:45,331 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 08:24:45,331 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-01-10 08:24:45,331 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-01-10 08:24:45,331 INFO L87 Difference]: Start difference. First operand 1086 states and 1590 transitions. cyclomatic complexity: 515 Second operand has 5 states, 5 states have (on average 15.4) internal successors, (77), 5 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 08:24:45,470 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 08:24:45,473 INFO L93 Difference]: Finished difference Result 1089 states and 1586 transitions. [2025-01-10 08:24:45,473 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1089 states and 1586 transitions. [2025-01-10 08:24:45,480 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 648 [2025-01-10 08:24:45,489 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1089 states to 1089 states and 1586 transitions. [2025-01-10 08:24:45,490 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1089 [2025-01-10 08:24:45,491 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1089 [2025-01-10 08:24:45,493 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1089 states and 1586 transitions. [2025-01-10 08:24:45,495 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 08:24:45,495 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1089 states and 1586 transitions. [2025-01-10 08:24:45,500 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1089 states and 1586 transitions. [2025-01-10 08:24:45,512 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1089 to 1086. [2025-01-10 08:24:45,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1086 states, 1079 states have (on average 1.4559777571825765) internal successors, (1571), 1078 states have internal predecessors, (1571), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-01-10 08:24:45,516 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1086 states to 1086 states and 1583 transitions. [2025-01-10 08:24:45,516 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1086 states and 1583 transitions. [2025-01-10 08:24:45,519 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-01-10 08:24:45,519 INFO L432 stractBuchiCegarLoop]: Abstraction has 1086 states and 1583 transitions. [2025-01-10 08:24:45,519 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-01-10 08:24:45,519 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1086 states and 1583 transitions. [2025-01-10 08:24:45,522 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 645 [2025-01-10 08:24:45,523 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 08:24:45,523 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 08:24:45,523 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 08:24:45,523 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 08:24:45,524 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite608#1.base, main_#t~ite608#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-01-10 08:24:45,524 INFO L754 eck$LassoCheckResult]: Loop: "call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;" "call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "havoc main_~_ha_hashv~1#1;" "goto;" "havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise194#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-01-10 08:24:45,524 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:24:45,524 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 3 times [2025-01-10 08:24:45,524 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:24:45,525 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1508467570] [2025-01-10 08:24:45,525 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-01-10 08:24:45,525 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:24:45,536 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:24:45,539 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:24:45,540 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-01-10 08:24:45,540 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:24:45,540 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 08:24:45,547 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:24:45,550 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:24:45,553 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:24:45,554 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:24:45,565 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 08:24:45,569 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:24:45,569 INFO L85 PathProgramCache]: Analyzing trace with hash 1326799182, now seen corresponding path program 1 times [2025-01-10 08:24:45,569 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:24:45,569 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1973339075] [2025-01-10 08:24:45,569 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 08:24:45,569 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:24:45,610 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 77 statements into 1 equivalence classes. [2025-01-10 08:24:45,624 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 77 of 77 statements. [2025-01-10 08:24:45,624 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:24:45,624 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 08:24:45,741 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 08:24:45,742 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 08:24:45,742 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1973339075] [2025-01-10 08:24:45,742 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1973339075] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 08:24:45,742 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 08:24:45,742 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-01-10 08:24:45,742 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1990154840] [2025-01-10 08:24:45,742 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 08:24:45,742 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 08:24:45,742 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 08:24:45,743 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-01-10 08:24:45,743 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-01-10 08:24:45,743 INFO L87 Difference]: Start difference. First operand 1086 states and 1583 transitions. cyclomatic complexity: 508 Second operand has 3 states, 3 states have (on average 25.666666666666668) internal successors, (77), 3 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 08:24:45,790 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 08:24:45,791 INFO L93 Difference]: Finished difference Result 1092 states and 1589 transitions. [2025-01-10 08:24:45,791 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1092 states and 1589 transitions. [2025-01-10 08:24:45,796 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 651 [2025-01-10 08:24:45,801 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1092 states to 1092 states and 1589 transitions. [2025-01-10 08:24:45,801 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1092 [2025-01-10 08:24:45,802 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1092 [2025-01-10 08:24:45,803 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1092 states and 1589 transitions. [2025-01-10 08:24:45,804 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 08:24:45,804 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1092 states and 1589 transitions. [2025-01-10 08:24:45,806 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1092 states and 1589 transitions. [2025-01-10 08:24:45,815 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1092 to 1092. [2025-01-10 08:24:45,816 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1092 states, 1085 states have (on average 1.4534562211981568) internal successors, (1577), 1084 states have internal predecessors, (1577), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-01-10 08:24:45,819 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1092 states to 1092 states and 1589 transitions. [2025-01-10 08:24:45,820 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1092 states and 1589 transitions. [2025-01-10 08:24:45,820 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-01-10 08:24:45,820 INFO L432 stractBuchiCegarLoop]: Abstraction has 1092 states and 1589 transitions. [2025-01-10 08:24:45,820 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-01-10 08:24:45,820 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1092 states and 1589 transitions. [2025-01-10 08:24:45,824 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 651 [2025-01-10 08:24:45,824 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 08:24:45,824 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 08:24:45,825 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 08:24:45,825 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 08:24:45,825 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite608#1.base, main_#t~ite608#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-01-10 08:24:45,825 INFO L754 eck$LassoCheckResult]: Loop: "call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;" "call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "havoc main_~_ha_hashv~1#1;" "goto;" "havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise194#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-01-10 08:24:45,826 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:24:45,826 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 4 times [2025-01-10 08:24:45,826 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:24:45,826 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [742093203] [2025-01-10 08:24:45,826 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-01-10 08:24:45,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:24:45,836 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-01-10 08:24:45,840 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:24:45,840 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-01-10 08:24:45,840 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:24:45,840 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 08:24:45,845 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:24:45,847 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:24:45,847 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:24:45,847 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:24:45,854 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 08:24:45,855 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:24:45,855 INFO L85 PathProgramCache]: Analyzing trace with hash 1342317900, now seen corresponding path program 1 times [2025-01-10 08:24:45,855 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:24:45,855 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [94345160] [2025-01-10 08:24:45,855 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 08:24:45,855 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:24:45,883 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 77 statements into 1 equivalence classes. [2025-01-10 08:24:46,014 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 77 of 77 statements. [2025-01-10 08:24:46,014 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:24:46,015 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 08:24:46,435 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 08:24:46,435 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 08:24:46,435 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [94345160] [2025-01-10 08:24:46,436 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [94345160] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 08:24:46,436 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 08:24:46,436 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-01-10 08:24:46,436 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [597088991] [2025-01-10 08:24:46,437 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 08:24:46,437 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 08:24:46,437 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 08:24:46,437 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-01-10 08:24:46,437 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2025-01-10 08:24:46,438 INFO L87 Difference]: Start difference. First operand 1092 states and 1589 transitions. cyclomatic complexity: 508 Second operand has 8 states, 8 states have (on average 9.625) internal successors, (77), 8 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 08:24:47,175 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 08:24:47,175 INFO L93 Difference]: Finished difference Result 1143 states and 1652 transitions. [2025-01-10 08:24:47,175 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1143 states and 1652 transitions. [2025-01-10 08:24:47,181 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 702 [2025-01-10 08:24:47,186 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1143 states to 1143 states and 1652 transitions. [2025-01-10 08:24:47,186 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1143 [2025-01-10 08:24:47,188 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1143 [2025-01-10 08:24:47,188 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1143 states and 1652 transitions. [2025-01-10 08:24:47,189 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 08:24:47,189 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1143 states and 1652 transitions. [2025-01-10 08:24:47,190 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1143 states and 1652 transitions. [2025-01-10 08:24:47,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1143 to 1135. [2025-01-10 08:24:47,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1135 states, 1128 states have (on average 1.4441489361702127) internal successors, (1629), 1127 states have internal predecessors, (1629), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-01-10 08:24:47,204 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1135 states to 1135 states and 1641 transitions. [2025-01-10 08:24:47,205 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1135 states and 1641 transitions. [2025-01-10 08:24:47,205 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-01-10 08:24:47,206 INFO L432 stractBuchiCegarLoop]: Abstraction has 1135 states and 1641 transitions. [2025-01-10 08:24:47,206 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-01-10 08:24:47,206 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1135 states and 1641 transitions. [2025-01-10 08:24:47,211 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 694 [2025-01-10 08:24:47,211 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 08:24:47,211 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 08:24:47,212 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 08:24:47,212 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 08:24:47,212 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite608#1.base, main_#t~ite608#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-01-10 08:24:47,213 INFO L754 eck$LassoCheckResult]: Loop: "call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;" "call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "havoc main_~_ha_hashv~1#1;" "goto;" "havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise194#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-01-10 08:24:47,214 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:24:47,214 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 5 times [2025-01-10 08:24:47,214 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:24:47,214 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1947744757] [2025-01-10 08:24:47,214 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-01-10 08:24:47,214 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:24:47,227 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:24:47,230 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:24:47,230 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-01-10 08:24:47,230 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:24:47,230 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 08:24:47,235 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:24:47,237 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:24:47,237 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:24:47,237 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:24:47,246 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 08:24:47,246 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:24:47,246 INFO L85 PathProgramCache]: Analyzing trace with hash -1285673955, now seen corresponding path program 1 times [2025-01-10 08:24:47,247 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:24:47,247 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1715830930] [2025-01-10 08:24:47,247 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 08:24:47,247 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:24:47,283 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 78 statements into 1 equivalence classes. [2025-01-10 08:24:47,317 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 78 of 78 statements. [2025-01-10 08:24:47,320 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:24:47,320 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 08:24:47,586 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 08:24:47,586 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 08:24:47,586 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1715830930] [2025-01-10 08:24:47,586 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1715830930] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 08:24:47,586 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 08:24:47,586 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-01-10 08:24:47,586 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [514402301] [2025-01-10 08:24:47,586 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 08:24:47,587 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 08:24:47,587 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 08:24:47,587 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-01-10 08:24:47,587 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2025-01-10 08:24:47,587 INFO L87 Difference]: Start difference. First operand 1135 states and 1641 transitions. cyclomatic complexity: 517 Second operand has 8 states, 8 states have (on average 9.75) internal successors, (78), 8 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 08:24:48,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 08:24:48,243 INFO L93 Difference]: Finished difference Result 1146 states and 1656 transitions. [2025-01-10 08:24:48,243 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1146 states and 1656 transitions. [2025-01-10 08:24:48,249 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 705 [2025-01-10 08:24:48,254 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1146 states to 1146 states and 1656 transitions. [2025-01-10 08:24:48,254 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1146 [2025-01-10 08:24:48,255 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1146 [2025-01-10 08:24:48,255 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1146 states and 1656 transitions. [2025-01-10 08:24:48,256 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 08:24:48,256 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1146 states and 1656 transitions. [2025-01-10 08:24:48,258 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1146 states and 1656 transitions. [2025-01-10 08:24:48,266 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1146 to 1136. [2025-01-10 08:24:48,267 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1136 states, 1129 states have (on average 1.4446412754650133) internal successors, (1631), 1128 states have internal predecessors, (1631), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-01-10 08:24:48,270 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1136 states to 1136 states and 1643 transitions. [2025-01-10 08:24:48,270 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1136 states and 1643 transitions. [2025-01-10 08:24:48,271 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-01-10 08:24:48,271 INFO L432 stractBuchiCegarLoop]: Abstraction has 1136 states and 1643 transitions. [2025-01-10 08:24:48,272 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-01-10 08:24:48,272 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1136 states and 1643 transitions. [2025-01-10 08:24:48,275 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 695 [2025-01-10 08:24:48,276 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 08:24:48,276 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 08:24:48,277 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 08:24:48,277 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 08:24:48,277 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite608#1.base, main_#t~ite608#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-01-10 08:24:48,277 INFO L754 eck$LassoCheckResult]: Loop: "call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;" "call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "havoc main_~_ha_hashv~1#1;" "goto;" "havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise194#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-01-10 08:24:48,278 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:24:48,278 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 6 times [2025-01-10 08:24:48,278 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:24:48,278 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1640526226] [2025-01-10 08:24:48,278 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-01-10 08:24:48,278 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:24:48,287 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:24:48,290 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:24:48,290 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-01-10 08:24:48,290 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:24:48,291 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 08:24:48,295 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:24:48,296 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:24:48,296 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:24:48,296 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:24:48,304 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 08:24:48,305 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:24:48,305 INFO L85 PathProgramCache]: Analyzing trace with hash -641930641, now seen corresponding path program 1 times [2025-01-10 08:24:48,306 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:24:48,306 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [967870956] [2025-01-10 08:24:48,306 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 08:24:48,306 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:24:48,334 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 78 statements into 1 equivalence classes. [2025-01-10 08:24:48,341 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 78 of 78 statements. [2025-01-10 08:24:48,342 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:24:48,342 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 08:24:48,406 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 08:24:48,406 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 08:24:48,406 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [967870956] [2025-01-10 08:24:48,406 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [967870956] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 08:24:48,406 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 08:24:48,407 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-01-10 08:24:48,407 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [636742511] [2025-01-10 08:24:48,407 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 08:24:48,407 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 08:24:48,408 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 08:24:48,408 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-01-10 08:24:48,408 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-01-10 08:24:48,408 INFO L87 Difference]: Start difference. First operand 1136 states and 1643 transitions. cyclomatic complexity: 518 Second operand has 4 states, 4 states have (on average 19.5) internal successors, (78), 4 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 08:24:48,449 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 08:24:48,450 INFO L93 Difference]: Finished difference Result 1042 states and 1507 transitions. [2025-01-10 08:24:48,450 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1042 states and 1507 transitions. [2025-01-10 08:24:48,454 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 601 [2025-01-10 08:24:48,458 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1042 states to 1042 states and 1507 transitions. [2025-01-10 08:24:48,458 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1042 [2025-01-10 08:24:48,459 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1042 [2025-01-10 08:24:48,459 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1042 states and 1507 transitions. [2025-01-10 08:24:48,460 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 08:24:48,460 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1042 states and 1507 transitions. [2025-01-10 08:24:48,461 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1042 states and 1507 transitions. [2025-01-10 08:24:48,468 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1042 to 1042. [2025-01-10 08:24:48,469 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1042 states, 1035 states have (on average 1.4444444444444444) internal successors, (1495), 1034 states have internal predecessors, (1495), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-01-10 08:24:48,471 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1042 states to 1042 states and 1507 transitions. [2025-01-10 08:24:48,471 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1042 states and 1507 transitions. [2025-01-10 08:24:48,472 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-01-10 08:24:48,472 INFO L432 stractBuchiCegarLoop]: Abstraction has 1042 states and 1507 transitions. [2025-01-10 08:24:48,472 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-01-10 08:24:48,472 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1042 states and 1507 transitions. [2025-01-10 08:24:48,475 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 601 [2025-01-10 08:24:48,475 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 08:24:48,475 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 08:24:48,476 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 08:24:48,476 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 08:24:48,476 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite608#1.base, main_#t~ite608#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-01-10 08:24:48,476 INFO L754 eck$LassoCheckResult]: Loop: "call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;" "call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "havoc main_~_ha_hashv~1#1;" "goto;" "havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise194#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-01-10 08:24:48,476 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:24:48,476 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 7 times [2025-01-10 08:24:48,477 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:24:48,477 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [114745091] [2025-01-10 08:24:48,477 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-01-10 08:24:48,477 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:24:48,484 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:24:48,486 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:24:48,486 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:24:48,486 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:24:48,486 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 08:24:48,489 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:24:48,490 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:24:48,490 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:24:48,490 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:24:48,496 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 08:24:48,497 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:24:48,497 INFO L85 PathProgramCache]: Analyzing trace with hash -1517949647, now seen corresponding path program 1 times [2025-01-10 08:24:48,497 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:24:48,497 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1772079824] [2025-01-10 08:24:48,497 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 08:24:48,497 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:24:48,521 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 78 statements into 1 equivalence classes. [2025-01-10 08:24:48,537 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 78 of 78 statements. [2025-01-10 08:24:48,538 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:24:48,538 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 08:24:48,890 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 08:24:48,890 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 08:24:48,890 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1772079824] [2025-01-10 08:24:48,890 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1772079824] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 08:24:48,890 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 08:24:48,890 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-01-10 08:24:48,890 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [235065565] [2025-01-10 08:24:48,890 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 08:24:48,891 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 08:24:48,891 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 08:24:48,891 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-01-10 08:24:48,891 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2025-01-10 08:24:48,891 INFO L87 Difference]: Start difference. First operand 1042 states and 1507 transitions. cyclomatic complexity: 476 Second operand has 7 states, 7 states have (on average 11.142857142857142) internal successors, (78), 7 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 08:24:49,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 08:24:49,221 INFO L93 Difference]: Finished difference Result 1047 states and 1513 transitions. [2025-01-10 08:24:49,221 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1047 states and 1513 transitions. [2025-01-10 08:24:49,229 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 606 [2025-01-10 08:24:49,238 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1047 states to 1047 states and 1513 transitions. [2025-01-10 08:24:49,238 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1047 [2025-01-10 08:24:49,239 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1047 [2025-01-10 08:24:49,242 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1047 states and 1513 transitions. [2025-01-10 08:24:49,244 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 08:24:49,244 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1047 states and 1513 transitions. [2025-01-10 08:24:49,245 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1047 states and 1513 transitions. [2025-01-10 08:24:49,261 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1047 to 1046. [2025-01-10 08:24:49,266 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1046 states, 1039 states have (on average 1.4436958614051973) internal successors, (1500), 1038 states have internal predecessors, (1500), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-01-10 08:24:49,268 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1046 states to 1046 states and 1512 transitions. [2025-01-10 08:24:49,271 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1046 states and 1512 transitions. [2025-01-10 08:24:49,272 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-01-10 08:24:49,272 INFO L432 stractBuchiCegarLoop]: Abstraction has 1046 states and 1512 transitions. [2025-01-10 08:24:49,272 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-01-10 08:24:49,272 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1046 states and 1512 transitions. [2025-01-10 08:24:49,280 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 605 [2025-01-10 08:24:49,280 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 08:24:49,280 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 08:24:49,280 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 08:24:49,280 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 08:24:49,281 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite608#1.base, main_#t~ite608#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-01-10 08:24:49,281 INFO L754 eck$LassoCheckResult]: Loop: "call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;" "call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "havoc main_~_ha_hashv~1#1;" "goto;" "havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise194#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-01-10 08:24:49,281 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:24:49,281 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 8 times [2025-01-10 08:24:49,281 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:24:49,281 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [585733022] [2025-01-10 08:24:49,281 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-01-10 08:24:49,285 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:24:49,302 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:24:49,303 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:24:49,303 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-01-10 08:24:49,303 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:24:49,303 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 08:24:49,307 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:24:49,308 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:24:49,308 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:24:49,308 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:24:49,314 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 08:24:49,314 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:24:49,314 INFO L85 PathProgramCache]: Analyzing trace with hash -1381318528, now seen corresponding path program 1 times [2025-01-10 08:24:49,314 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:24:49,314 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1219834198] [2025-01-10 08:24:49,314 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 08:24:49,314 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:24:49,340 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 79 statements into 1 equivalence classes. [2025-01-10 08:24:49,361 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 79 of 79 statements. [2025-01-10 08:24:49,361 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:24:49,361 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 08:24:49,657 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 08:24:49,657 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 08:24:49,658 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1219834198] [2025-01-10 08:24:49,658 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1219834198] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 08:24:49,658 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 08:24:49,658 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-01-10 08:24:49,658 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [501012878] [2025-01-10 08:24:49,658 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 08:24:49,659 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 08:24:49,659 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 08:24:49,659 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-01-10 08:24:49,659 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2025-01-10 08:24:49,659 INFO L87 Difference]: Start difference. First operand 1046 states and 1512 transitions. cyclomatic complexity: 477 Second operand has 9 states, 9 states have (on average 8.777777777777779) internal successors, (79), 9 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 08:24:50,089 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 08:24:50,089 INFO L93 Difference]: Finished difference Result 1057 states and 1526 transitions. [2025-01-10 08:24:50,090 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1057 states and 1526 transitions. [2025-01-10 08:24:50,093 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 616 [2025-01-10 08:24:50,096 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1057 states to 1057 states and 1526 transitions. [2025-01-10 08:24:50,096 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1057 [2025-01-10 08:24:50,097 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1057 [2025-01-10 08:24:50,097 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1057 states and 1526 transitions. [2025-01-10 08:24:50,098 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 08:24:50,098 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1057 states and 1526 transitions. [2025-01-10 08:24:50,100 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1057 states and 1526 transitions. [2025-01-10 08:24:50,107 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1057 to 1054. [2025-01-10 08:24:50,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1054 states, 1047 states have (on average 1.4422158548233046) internal successors, (1510), 1046 states have internal predecessors, (1510), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-01-10 08:24:50,110 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1054 states to 1054 states and 1522 transitions. [2025-01-10 08:24:50,110 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1054 states and 1522 transitions. [2025-01-10 08:24:50,111 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-01-10 08:24:50,111 INFO L432 stractBuchiCegarLoop]: Abstraction has 1054 states and 1522 transitions. [2025-01-10 08:24:50,111 INFO L338 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2025-01-10 08:24:50,111 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1054 states and 1522 transitions. [2025-01-10 08:24:50,114 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 613 [2025-01-10 08:24:50,114 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 08:24:50,114 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 08:24:50,114 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 08:24:50,114 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 08:24:50,114 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite608#1.base, main_#t~ite608#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-01-10 08:24:50,115 INFO L754 eck$LassoCheckResult]: Loop: "call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;" "call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "havoc main_~_ha_hashv~1#1;" "goto;" "havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise194#1;assume main_#t~bitwise194#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-01-10 08:24:50,115 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:24:50,115 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 9 times [2025-01-10 08:24:50,115 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:24:50,116 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [498503236] [2025-01-10 08:24:50,116 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-01-10 08:24:50,116 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:24:50,124 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:24:50,125 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:24:50,125 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-01-10 08:24:50,125 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:24:50,125 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 08:24:50,129 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:24:50,130 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:24:50,130 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:24:50,130 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:24:50,136 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 08:24:50,136 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:24:50,136 INFO L85 PathProgramCache]: Analyzing trace with hash 1835624634, now seen corresponding path program 1 times [2025-01-10 08:24:50,137 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:24:50,137 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1841411486] [2025-01-10 08:24:50,137 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 08:24:50,137 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:24:50,162 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 80 statements into 1 equivalence classes. [2025-01-10 08:24:50,413 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 80 of 80 statements. [2025-01-10 08:24:50,414 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:24:50,414 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 08:24:51,109 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 08:24:51,110 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 08:24:51,110 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1841411486] [2025-01-10 08:24:51,110 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1841411486] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 08:24:51,110 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 08:24:51,110 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2025-01-10 08:24:51,111 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1110768032] [2025-01-10 08:24:51,111 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 08:24:51,111 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 08:24:51,111 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 08:24:51,111 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-01-10 08:24:51,111 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2025-01-10 08:24:51,112 INFO L87 Difference]: Start difference. First operand 1054 states and 1522 transitions. cyclomatic complexity: 479 Second operand has 13 states, 13 states have (on average 6.153846153846154) internal successors, (80), 13 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 08:25:03,496 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2025-01-10 08:25:04,083 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 08:25:04,084 INFO L93 Difference]: Finished difference Result 1126 states and 1623 transitions. [2025-01-10 08:25:04,084 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1126 states and 1623 transitions. [2025-01-10 08:25:04,087 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 685 [2025-01-10 08:25:04,090 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1126 states to 1126 states and 1623 transitions. [2025-01-10 08:25:04,090 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1126 [2025-01-10 08:25:04,092 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1126 [2025-01-10 08:25:04,092 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1126 states and 1623 transitions. [2025-01-10 08:25:04,094 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 08:25:04,094 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1126 states and 1623 transitions. [2025-01-10 08:25:04,099 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1126 states and 1623 transitions. [2025-01-10 08:25:04,118 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1126 to 1060. [2025-01-10 08:25:04,119 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1060 states, 1053 states have (on average 1.4415954415954415) internal successors, (1518), 1052 states have internal predecessors, (1518), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-01-10 08:25:04,124 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1060 states to 1060 states and 1530 transitions. [2025-01-10 08:25:04,124 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1060 states and 1530 transitions. [2025-01-10 08:25:04,128 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2025-01-10 08:25:04,128 INFO L432 stractBuchiCegarLoop]: Abstraction has 1060 states and 1530 transitions. [2025-01-10 08:25:04,129 INFO L338 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2025-01-10 08:25:04,129 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1060 states and 1530 transitions. [2025-01-10 08:25:04,131 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 619 [2025-01-10 08:25:04,131 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 08:25:04,131 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 08:25:04,132 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 08:25:04,132 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 08:25:04,132 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite608#1.base, main_#t~ite608#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-01-10 08:25:04,133 INFO L754 eck$LassoCheckResult]: Loop: "call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;" "call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "havoc main_~_ha_hashv~1#1;" "goto;" "havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise193#1 := 0;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise194#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-01-10 08:25:04,133 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:25:04,133 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 10 times [2025-01-10 08:25:04,133 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:25:04,133 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2095773459] [2025-01-10 08:25:04,133 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-01-10 08:25:04,133 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:25:04,141 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-01-10 08:25:04,143 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:25:04,143 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-01-10 08:25:04,143 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:25:04,143 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 08:25:04,146 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:25:04,147 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:25:04,147 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:25:04,147 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:25:04,152 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 08:25:04,153 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:25:04,153 INFO L85 PathProgramCache]: Analyzing trace with hash -1483909610, now seen corresponding path program 1 times [2025-01-10 08:25:04,153 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:25:04,153 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1422662163] [2025-01-10 08:25:04,153 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 08:25:04,153 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:25:04,178 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 80 statements into 1 equivalence classes. [2025-01-10 08:25:04,195 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 80 of 80 statements. [2025-01-10 08:25:04,196 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:25:04,196 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 08:25:04,413 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 08:25:04,413 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 08:25:04,413 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1422662163] [2025-01-10 08:25:04,413 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1422662163] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 08:25:04,413 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 08:25:04,414 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-01-10 08:25:04,414 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1815209053] [2025-01-10 08:25:04,414 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 08:25:04,414 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 08:25:04,414 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 08:25:04,414 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-01-10 08:25:04,414 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2025-01-10 08:25:04,414 INFO L87 Difference]: Start difference. First operand 1060 states and 1530 transitions. cyclomatic complexity: 481 Second operand has 7 states, 7 states have (on average 11.428571428571429) internal successors, (80), 7 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 08:25:04,645 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 08:25:04,645 INFO L93 Difference]: Finished difference Result 1063 states and 1533 transitions. [2025-01-10 08:25:04,645 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1063 states and 1533 transitions. [2025-01-10 08:25:04,648 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 622 [2025-01-10 08:25:04,651 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1063 states to 1063 states and 1533 transitions. [2025-01-10 08:25:04,651 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1063 [2025-01-10 08:25:04,652 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1063 [2025-01-10 08:25:04,652 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1063 states and 1533 transitions. [2025-01-10 08:25:04,653 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 08:25:04,654 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1063 states and 1533 transitions. [2025-01-10 08:25:04,655 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1063 states and 1533 transitions. [2025-01-10 08:25:04,661 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1063 to 1063. [2025-01-10 08:25:04,662 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1063 states, 1056 states have (on average 1.4403409090909092) internal successors, (1521), 1055 states have internal predecessors, (1521), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-01-10 08:25:04,664 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1063 states to 1063 states and 1533 transitions. [2025-01-10 08:25:04,664 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1063 states and 1533 transitions. [2025-01-10 08:25:04,665 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-01-10 08:25:04,665 INFO L432 stractBuchiCegarLoop]: Abstraction has 1063 states and 1533 transitions. [2025-01-10 08:25:04,665 INFO L338 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2025-01-10 08:25:04,665 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1063 states and 1533 transitions. [2025-01-10 08:25:04,667 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 622 [2025-01-10 08:25:04,667 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 08:25:04,667 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 08:25:04,667 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 08:25:04,667 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 08:25:04,667 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite608#1.base, main_#t~ite608#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-01-10 08:25:04,668 INFO L754 eck$LassoCheckResult]: Loop: "call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;" "call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "havoc main_~_ha_hashv~1#1;" "goto;" "havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise194#1;assume main_#t~bitwise194#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 65536 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise197#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-01-10 08:25:04,668 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:25:04,668 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 11 times [2025-01-10 08:25:04,668 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:25:04,668 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [213609659] [2025-01-10 08:25:04,668 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-01-10 08:25:04,668 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:25:04,676 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:25:04,677 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:25:04,677 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-01-10 08:25:04,677 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:25:04,677 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 08:25:04,679 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:25:04,680 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:25:04,680 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:25:04,680 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:25:04,685 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 08:25:04,686 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:25:04,686 INFO L85 PathProgramCache]: Analyzing trace with hash 961509547, now seen corresponding path program 1 times [2025-01-10 08:25:04,686 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:25:04,686 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [457073912] [2025-01-10 08:25:04,686 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 08:25:04,686 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:25:04,709 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 81 statements into 1 equivalence classes. [2025-01-10 08:25:04,807 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 81 of 81 statements. [2025-01-10 08:25:04,807 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:25:04,808 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 08:25:05,263 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 08:25:05,264 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 08:25:05,264 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [457073912] [2025-01-10 08:25:05,264 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [457073912] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 08:25:05,264 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 08:25:05,264 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2025-01-10 08:25:05,264 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1355751847] [2025-01-10 08:25:05,264 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 08:25:05,265 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 08:25:05,265 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 08:25:05,265 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-01-10 08:25:05,265 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2025-01-10 08:25:05,265 INFO L87 Difference]: Start difference. First operand 1063 states and 1533 transitions. cyclomatic complexity: 481 Second operand has 13 states, 13 states have (on average 6.230769230769231) internal successors, (81), 13 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 08:25:06,102 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 08:25:06,103 INFO L93 Difference]: Finished difference Result 1131 states and 1628 transitions. [2025-01-10 08:25:06,103 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1131 states and 1628 transitions. [2025-01-10 08:25:06,106 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 690 [2025-01-10 08:25:06,110 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1131 states to 1131 states and 1628 transitions. [2025-01-10 08:25:06,110 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1131 [2025-01-10 08:25:06,111 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1131 [2025-01-10 08:25:06,111 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1131 states and 1628 transitions. [2025-01-10 08:25:06,113 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 08:25:06,113 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1131 states and 1628 transitions. [2025-01-10 08:25:06,114 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1131 states and 1628 transitions. [2025-01-10 08:25:06,122 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1131 to 1064. [2025-01-10 08:25:06,124 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1064 states, 1057 states have (on average 1.4408703878902553) internal successors, (1523), 1056 states have internal predecessors, (1523), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-01-10 08:25:06,127 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1064 states to 1064 states and 1535 transitions. [2025-01-10 08:25:06,127 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1064 states and 1535 transitions. [2025-01-10 08:25:06,127 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2025-01-10 08:25:06,128 INFO L432 stractBuchiCegarLoop]: Abstraction has 1064 states and 1535 transitions. [2025-01-10 08:25:06,128 INFO L338 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2025-01-10 08:25:06,128 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1064 states and 1535 transitions. [2025-01-10 08:25:06,131 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 623 [2025-01-10 08:25:06,131 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 08:25:06,131 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 08:25:06,132 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 08:25:06,132 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 08:25:06,132 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite608#1.base, main_#t~ite608#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-01-10 08:25:06,133 INFO L754 eck$LassoCheckResult]: Loop: "call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;" "call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "havoc main_~_ha_hashv~1#1;" "goto;" "havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise194#1;assume main_#t~bitwise194#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 32 % 4294967296;main_#t~bitwise198#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-01-10 08:25:06,133 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:25:06,133 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 12 times [2025-01-10 08:25:06,134 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:25:06,134 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [32611100] [2025-01-10 08:25:06,134 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-01-10 08:25:06,134 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:25:06,142 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:25:06,144 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:25:06,144 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-01-10 08:25:06,144 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:25:06,144 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 08:25:06,147 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:25:06,148 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:25:06,148 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:25:06,148 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:25:06,154 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 08:25:06,154 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:25:06,154 INFO L85 PathProgramCache]: Analyzing trace with hash -799893313, now seen corresponding path program 1 times [2025-01-10 08:25:06,154 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:25:06,155 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [633805803] [2025-01-10 08:25:06,155 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 08:25:06,155 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:25:06,177 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 81 statements into 1 equivalence classes. [2025-01-10 08:25:06,293 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 81 of 81 statements. [2025-01-10 08:25:06,293 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:25:06,294 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 08:25:07,648 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 08:25:07,649 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 08:25:07,649 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [633805803] [2025-01-10 08:25:07,649 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [633805803] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 08:25:07,649 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 08:25:07,649 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-01-10 08:25:07,650 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2121452447] [2025-01-10 08:25:07,650 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 08:25:07,650 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 08:25:07,650 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 08:25:07,650 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-01-10 08:25:07,650 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2025-01-10 08:25:07,650 INFO L87 Difference]: Start difference. First operand 1064 states and 1535 transitions. cyclomatic complexity: 482 Second operand has 10 states, 10 states have (on average 8.1) internal successors, (81), 10 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 08:25:08,191 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 08:25:08,192 INFO L93 Difference]: Finished difference Result 1059 states and 1526 transitions. [2025-01-10 08:25:08,192 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1059 states and 1526 transitions. [2025-01-10 08:25:08,194 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 618 [2025-01-10 08:25:08,197 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1059 states to 1059 states and 1526 transitions. [2025-01-10 08:25:08,197 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1059 [2025-01-10 08:25:08,198 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1059 [2025-01-10 08:25:08,198 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1059 states and 1526 transitions. [2025-01-10 08:25:08,199 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 08:25:08,200 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1059 states and 1526 transitions. [2025-01-10 08:25:08,201 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1059 states and 1526 transitions. [2025-01-10 08:25:08,208 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1059 to 1057. [2025-01-10 08:25:08,209 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1057 states, 1050 states have (on average 1.44) internal successors, (1512), 1049 states have internal predecessors, (1512), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-01-10 08:25:08,210 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1057 states to 1057 states and 1524 transitions. [2025-01-10 08:25:08,211 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1057 states and 1524 transitions. [2025-01-10 08:25:08,211 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-01-10 08:25:08,211 INFO L432 stractBuchiCegarLoop]: Abstraction has 1057 states and 1524 transitions. [2025-01-10 08:25:08,211 INFO L338 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2025-01-10 08:25:08,212 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1057 states and 1524 transitions. [2025-01-10 08:25:08,213 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 616 [2025-01-10 08:25:08,213 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 08:25:08,213 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 08:25:08,214 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 08:25:08,214 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 08:25:08,214 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite608#1.base, main_#t~ite608#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-01-10 08:25:08,214 INFO L754 eck$LassoCheckResult]: Loop: "call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;" "call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "havoc main_~_ha_hashv~1#1;" "goto;" "havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise193#1 := 0;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise194#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-01-10 08:25:08,214 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:25:08,215 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 13 times [2025-01-10 08:25:08,215 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:25:08,215 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1828582011] [2025-01-10 08:25:08,215 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-01-10 08:25:08,215 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:25:08,222 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:25:08,223 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:25:08,223 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:25:08,223 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:25:08,223 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 08:25:08,226 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:25:08,227 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:25:08,227 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:25:08,227 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:25:08,232 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 08:25:08,232 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:25:08,232 INFO L85 PathProgramCache]: Analyzing trace with hash -326077381, now seen corresponding path program 1 times [2025-01-10 08:25:08,232 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:25:08,233 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [707280074] [2025-01-10 08:25:08,233 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 08:25:08,233 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:25:08,254 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 81 statements into 1 equivalence classes. [2025-01-10 08:25:08,266 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 81 of 81 statements. [2025-01-10 08:25:08,267 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:25:08,267 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 08:25:08,427 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 08:25:08,428 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 08:25:08,428 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [707280074] [2025-01-10 08:25:08,428 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [707280074] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 08:25:08,428 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 08:25:08,428 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-01-10 08:25:08,428 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [732511834] [2025-01-10 08:25:08,428 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 08:25:08,428 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 08:25:08,428 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 08:25:08,429 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-01-10 08:25:08,429 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2025-01-10 08:25:08,429 INFO L87 Difference]: Start difference. First operand 1057 states and 1524 transitions. cyclomatic complexity: 478 Second operand has 9 states, 9 states have (on average 9.0) internal successors, (81), 9 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 08:25:08,876 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 08:25:08,876 INFO L93 Difference]: Finished difference Result 1067 states and 1536 transitions. [2025-01-10 08:25:08,876 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1067 states and 1536 transitions. [2025-01-10 08:25:08,879 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 626 [2025-01-10 08:25:08,882 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1067 states to 1067 states and 1536 transitions. [2025-01-10 08:25:08,882 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1067 [2025-01-10 08:25:08,882 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1067 [2025-01-10 08:25:08,883 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1067 states and 1536 transitions. [2025-01-10 08:25:08,884 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 08:25:08,884 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1067 states and 1536 transitions. [2025-01-10 08:25:08,885 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1067 states and 1536 transitions. [2025-01-10 08:25:08,891 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1067 to 1057. [2025-01-10 08:25:08,892 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1057 states, 1050 states have (on average 1.44) internal successors, (1512), 1049 states have internal predecessors, (1512), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-01-10 08:25:08,894 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1057 states to 1057 states and 1524 transitions. [2025-01-10 08:25:08,894 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1057 states and 1524 transitions. [2025-01-10 08:25:08,894 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-01-10 08:25:08,895 INFO L432 stractBuchiCegarLoop]: Abstraction has 1057 states and 1524 transitions. [2025-01-10 08:25:08,895 INFO L338 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2025-01-10 08:25:08,895 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1057 states and 1524 transitions. [2025-01-10 08:25:08,897 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 616 [2025-01-10 08:25:08,897 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 08:25:08,897 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 08:25:08,897 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 08:25:08,897 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 08:25:08,897 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite608#1.base, main_#t~ite608#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-01-10 08:25:08,898 INFO L754 eck$LassoCheckResult]: Loop: "call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;" "call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "havoc main_~_ha_hashv~1#1;" "goto;" "havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise193#1;assume main_#t~bitwise193#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise194#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-01-10 08:25:08,898 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:25:08,898 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 14 times [2025-01-10 08:25:08,898 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:25:08,898 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2114521367] [2025-01-10 08:25:08,898 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-01-10 08:25:08,898 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:25:08,906 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:25:08,907 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:25:08,907 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-01-10 08:25:08,907 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:25:08,907 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 08:25:08,910 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:25:08,910 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:25:08,910 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:25:08,911 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:25:08,916 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 08:25:08,916 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:25:08,916 INFO L85 PathProgramCache]: Analyzing trace with hash -514272809, now seen corresponding path program 1 times [2025-01-10 08:25:08,916 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:25:08,916 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1336347206] [2025-01-10 08:25:08,916 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 08:25:08,916 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:25:08,938 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 81 statements into 1 equivalence classes. [2025-01-10 08:25:08,968 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 81 of 81 statements. [2025-01-10 08:25:08,968 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:25:08,968 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 08:25:09,171 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 08:25:09,171 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 08:25:09,171 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1336347206] [2025-01-10 08:25:09,171 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1336347206] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 08:25:09,171 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 08:25:09,171 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-01-10 08:25:09,172 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2078754690] [2025-01-10 08:25:09,172 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 08:25:09,172 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 08:25:09,172 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 08:25:09,172 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-01-10 08:25:09,172 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2025-01-10 08:25:09,172 INFO L87 Difference]: Start difference. First operand 1057 states and 1524 transitions. cyclomatic complexity: 478 Second operand has 10 states, 10 states have (on average 8.1) internal successors, (81), 10 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 08:25:09,621 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 08:25:09,622 INFO L93 Difference]: Finished difference Result 1067 states and 1536 transitions. [2025-01-10 08:25:09,622 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1067 states and 1536 transitions. [2025-01-10 08:25:09,625 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 626 [2025-01-10 08:25:09,627 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1067 states to 1067 states and 1536 transitions. [2025-01-10 08:25:09,627 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1067 [2025-01-10 08:25:09,628 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1067 [2025-01-10 08:25:09,628 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1067 states and 1536 transitions. [2025-01-10 08:25:09,629 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 08:25:09,629 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1067 states and 1536 transitions. [2025-01-10 08:25:09,630 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1067 states and 1536 transitions. [2025-01-10 08:25:09,637 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1067 to 1057. [2025-01-10 08:25:09,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1057 states, 1050 states have (on average 1.44) internal successors, (1512), 1049 states have internal predecessors, (1512), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-01-10 08:25:09,640 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1057 states to 1057 states and 1524 transitions. [2025-01-10 08:25:09,640 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1057 states and 1524 transitions. [2025-01-10 08:25:09,640 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-01-10 08:25:09,641 INFO L432 stractBuchiCegarLoop]: Abstraction has 1057 states and 1524 transitions. [2025-01-10 08:25:09,641 INFO L338 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2025-01-10 08:25:09,641 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1057 states and 1524 transitions. [2025-01-10 08:25:09,642 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 616 [2025-01-10 08:25:09,643 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 08:25:09,643 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 08:25:09,643 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 08:25:09,643 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 08:25:09,643 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite608#1.base, main_#t~ite608#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-01-10 08:25:09,643 INFO L754 eck$LassoCheckResult]: Loop: "call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;" "call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "havoc main_~_ha_hashv~1#1;" "goto;" "havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise194#1;assume main_#t~bitwise194#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise196#1 := main_~_hj_i~1#1;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-01-10 08:25:09,644 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:25:09,644 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 15 times [2025-01-10 08:25:09,644 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:25:09,644 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2039430347] [2025-01-10 08:25:09,644 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-01-10 08:25:09,644 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:25:09,651 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:25:09,652 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:25:09,652 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-01-10 08:25:09,652 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:25:09,652 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 08:25:09,655 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:25:09,656 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:25:09,656 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:25:09,656 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:25:09,661 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 08:25:09,661 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:25:09,661 INFO L85 PathProgramCache]: Analyzing trace with hash -2102642706, now seen corresponding path program 1 times [2025-01-10 08:25:09,661 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:25:09,662 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [841456684] [2025-01-10 08:25:09,662 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 08:25:09,662 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:25:09,683 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 82 statements into 1 equivalence classes. [2025-01-10 08:25:09,809 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 82 of 82 statements. [2025-01-10 08:25:09,809 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:25:09,809 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 08:25:10,274 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 08:25:10,274 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 08:25:10,274 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [841456684] [2025-01-10 08:25:10,274 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [841456684] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 08:25:10,274 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 08:25:10,274 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-01-10 08:25:10,274 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [685980256] [2025-01-10 08:25:10,274 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 08:25:10,274 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 08:25:10,274 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 08:25:10,274 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-01-10 08:25:10,275 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2025-01-10 08:25:10,275 INFO L87 Difference]: Start difference. First operand 1057 states and 1524 transitions. cyclomatic complexity: 478 Second operand has 10 states, 10 states have (on average 8.2) internal successors, (82), 10 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 08:25:10,776 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 08:25:10,813 INFO L93 Difference]: Finished difference Result 1073 states and 1544 transitions. [2025-01-10 08:25:10,814 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1073 states and 1544 transitions. [2025-01-10 08:25:10,816 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 632 [2025-01-10 08:25:10,819 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1073 states to 1073 states and 1544 transitions. [2025-01-10 08:25:10,819 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1073 [2025-01-10 08:25:10,819 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1073 [2025-01-10 08:25:10,819 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1073 states and 1544 transitions. [2025-01-10 08:25:10,820 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 08:25:10,820 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1073 states and 1544 transitions. [2025-01-10 08:25:10,821 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1073 states and 1544 transitions. [2025-01-10 08:25:10,827 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1073 to 1063. [2025-01-10 08:25:10,828 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1063 states, 1056 states have (on average 1.4384469696969697) internal successors, (1519), 1055 states have internal predecessors, (1519), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-01-10 08:25:10,830 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1063 states to 1063 states and 1531 transitions. [2025-01-10 08:25:10,830 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1063 states and 1531 transitions. [2025-01-10 08:25:10,833 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-01-10 08:25:10,835 INFO L432 stractBuchiCegarLoop]: Abstraction has 1063 states and 1531 transitions. [2025-01-10 08:25:10,835 INFO L338 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2025-01-10 08:25:10,835 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1063 states and 1531 transitions. [2025-01-10 08:25:10,837 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 622 [2025-01-10 08:25:10,837 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 08:25:10,837 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 08:25:10,837 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 08:25:10,837 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 08:25:10,837 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite608#1.base, main_#t~ite608#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-01-10 08:25:10,838 INFO L754 eck$LassoCheckResult]: Loop: "call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;" "call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "havoc main_~_ha_hashv~1#1;" "goto;" "havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise193#1 := 0;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise194#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise196#1 := main_~_hj_i~1#1;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-01-10 08:25:10,838 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:25:10,838 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 16 times [2025-01-10 08:25:10,838 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:25:10,838 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2024208277] [2025-01-10 08:25:10,838 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-01-10 08:25:10,839 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:25:10,849 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-01-10 08:25:10,851 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:25:10,851 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-01-10 08:25:10,851 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:25:10,851 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 08:25:10,854 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:25:10,855 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:25:10,855 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:25:10,855 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:25:10,865 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 08:25:10,866 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:25:10,866 INFO L85 PathProgramCache]: Analyzing trace with hash -1135709642, now seen corresponding path program 1 times [2025-01-10 08:25:10,866 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:25:10,866 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [92653562] [2025-01-10 08:25:10,866 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 08:25:10,866 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:25:10,898 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 82 statements into 1 equivalence classes. [2025-01-10 08:25:10,975 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 82 of 82 statements. [2025-01-10 08:25:10,975 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:25:10,975 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 08:25:11,411 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 08:25:11,411 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 08:25:11,411 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [92653562] [2025-01-10 08:25:11,411 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [92653562] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 08:25:11,411 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 08:25:11,411 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2025-01-10 08:25:11,411 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1976983530] [2025-01-10 08:25:11,412 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 08:25:11,412 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 08:25:11,412 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 08:25:11,412 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2025-01-10 08:25:11,412 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=88, Unknown=0, NotChecked=0, Total=110 [2025-01-10 08:25:11,412 INFO L87 Difference]: Start difference. First operand 1063 states and 1531 transitions. cyclomatic complexity: 479 Second operand has 11 states, 11 states have (on average 7.454545454545454) internal successors, (82), 11 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 08:25:11,920 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 08:25:11,920 INFO L93 Difference]: Finished difference Result 1079 states and 1552 transitions. [2025-01-10 08:25:11,920 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1079 states and 1552 transitions. [2025-01-10 08:25:11,923 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 638 [2025-01-10 08:25:11,925 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1079 states to 1079 states and 1552 transitions. [2025-01-10 08:25:11,925 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1079 [2025-01-10 08:25:11,926 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1079 [2025-01-10 08:25:11,926 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1079 states and 1552 transitions. [2025-01-10 08:25:11,927 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 08:25:11,927 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1079 states and 1552 transitions. [2025-01-10 08:25:11,928 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1079 states and 1552 transitions. [2025-01-10 08:25:11,933 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1079 to 1073. [2025-01-10 08:25:11,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1073 states, 1066 states have (on average 1.4362101313320825) internal successors, (1531), 1065 states have internal predecessors, (1531), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-01-10 08:25:11,936 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1073 states to 1073 states and 1543 transitions. [2025-01-10 08:25:11,936 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1073 states and 1543 transitions. [2025-01-10 08:25:11,938 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2025-01-10 08:25:11,939 INFO L432 stractBuchiCegarLoop]: Abstraction has 1073 states and 1543 transitions. [2025-01-10 08:25:11,939 INFO L338 stractBuchiCegarLoop]: ======== Iteration 17 ============ [2025-01-10 08:25:11,939 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1073 states and 1543 transitions. [2025-01-10 08:25:11,941 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 632 [2025-01-10 08:25:11,941 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 08:25:11,941 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 08:25:11,941 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 08:25:11,941 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 08:25:11,941 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite608#1.base, main_#t~ite608#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-01-10 08:25:11,942 INFO L754 eck$LassoCheckResult]: Loop: "call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;" "call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "havoc main_~_ha_hashv~1#1;" "goto;" "havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise193#1;assume main_#t~bitwise193#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise194#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-01-10 08:25:11,942 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:25:11,942 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 17 times [2025-01-10 08:25:11,942 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:25:11,942 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1519604385] [2025-01-10 08:25:11,942 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-01-10 08:25:11,942 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:25:11,951 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:25:11,952 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:25:11,952 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-01-10 08:25:11,952 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:25:11,953 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 08:25:11,955 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:25:11,956 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:25:11,956 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:25:11,956 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:25:11,961 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 08:25:11,961 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:25:11,961 INFO L85 PathProgramCache]: Analyzing trace with hash -332107622, now seen corresponding path program 1 times [2025-01-10 08:25:11,961 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:25:11,961 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1788764708] [2025-01-10 08:25:11,961 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 08:25:11,961 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:25:11,984 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 82 statements into 1 equivalence classes. [2025-01-10 08:25:12,041 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 82 of 82 statements. [2025-01-10 08:25:12,041 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:25:12,042 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 08:25:12,278 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 08:25:12,278 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 08:25:12,278 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1788764708] [2025-01-10 08:25:12,278 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1788764708] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 08:25:12,278 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 08:25:12,278 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-01-10 08:25:12,278 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [9868695] [2025-01-10 08:25:12,278 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 08:25:12,278 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 08:25:12,278 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 08:25:12,279 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-01-10 08:25:12,279 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2025-01-10 08:25:12,279 INFO L87 Difference]: Start difference. First operand 1073 states and 1543 transitions. cyclomatic complexity: 481 Second operand has 8 states, 8 states have (on average 10.25) internal successors, (82), 8 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 08:25:12,632 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 08:25:12,632 INFO L93 Difference]: Finished difference Result 1076 states and 1545 transitions. [2025-01-10 08:25:12,632 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1076 states and 1545 transitions. [2025-01-10 08:25:12,635 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 635 [2025-01-10 08:25:12,639 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1076 states to 1076 states and 1545 transitions. [2025-01-10 08:25:12,639 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1076 [2025-01-10 08:25:12,640 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1076 [2025-01-10 08:25:12,640 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1076 states and 1545 transitions. [2025-01-10 08:25:12,641 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 08:25:12,641 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1076 states and 1545 transitions. [2025-01-10 08:25:12,642 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1076 states and 1545 transitions. [2025-01-10 08:25:12,648 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1076 to 1073. [2025-01-10 08:25:12,649 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1073 states, 1066 states have (on average 1.4352720450281427) internal successors, (1530), 1065 states have internal predecessors, (1530), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-01-10 08:25:12,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1073 states to 1073 states and 1542 transitions. [2025-01-10 08:25:12,651 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1073 states and 1542 transitions. [2025-01-10 08:25:12,651 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-01-10 08:25:12,652 INFO L432 stractBuchiCegarLoop]: Abstraction has 1073 states and 1542 transitions. [2025-01-10 08:25:12,652 INFO L338 stractBuchiCegarLoop]: ======== Iteration 18 ============ [2025-01-10 08:25:12,652 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1073 states and 1542 transitions. [2025-01-10 08:25:12,654 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 632 [2025-01-10 08:25:12,654 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 08:25:12,654 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 08:25:12,654 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 08:25:12,654 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 08:25:12,654 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite608#1.base, main_#t~ite608#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-01-10 08:25:12,655 INFO L754 eck$LassoCheckResult]: Loop: "call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;" "call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "havoc main_~_ha_hashv~1#1;" "goto;" "havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise193#1;assume main_#t~bitwise193#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise194#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise196#1 := main_~_hj_i~1#1;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-01-10 08:25:12,655 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:25:12,655 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 18 times [2025-01-10 08:25:12,655 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:25:12,655 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1359206573] [2025-01-10 08:25:12,656 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-01-10 08:25:12,656 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:25:12,663 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:25:12,664 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:25:12,665 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-01-10 08:25:12,665 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:25:12,665 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 08:25:12,667 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:25:12,668 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:25:12,668 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:25:12,668 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:25:12,673 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 08:25:12,674 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:25:12,674 INFO L85 PathProgramCache]: Analyzing trace with hash 1620166682, now seen corresponding path program 1 times [2025-01-10 08:25:12,674 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:25:12,674 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1156628695] [2025-01-10 08:25:12,674 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 08:25:12,674 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:25:12,701 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 82 statements into 1 equivalence classes. [2025-01-10 08:25:12,735 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 82 of 82 statements. [2025-01-10 08:25:12,735 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:25:12,735 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 08:25:13,000 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 08:25:13,000 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 08:25:13,000 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1156628695] [2025-01-10 08:25:13,000 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1156628695] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 08:25:13,000 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 08:25:13,000 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2025-01-10 08:25:13,000 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [557682634] [2025-01-10 08:25:13,001 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 08:25:13,001 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 08:25:13,001 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 08:25:13,002 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2025-01-10 08:25:13,002 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=90, Unknown=0, NotChecked=0, Total=110 [2025-01-10 08:25:13,002 INFO L87 Difference]: Start difference. First operand 1073 states and 1542 transitions. cyclomatic complexity: 480 Second operand has 11 states, 11 states have (on average 7.454545454545454) internal successors, (82), 11 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 08:25:13,607 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 08:25:13,607 INFO L93 Difference]: Finished difference Result 1086 states and 1560 transitions. [2025-01-10 08:25:13,607 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1086 states and 1560 transitions. [2025-01-10 08:25:13,609 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 645 [2025-01-10 08:25:13,612 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1086 states to 1086 states and 1560 transitions. [2025-01-10 08:25:13,612 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1086 [2025-01-10 08:25:13,612 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1086 [2025-01-10 08:25:13,612 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1086 states and 1560 transitions. [2025-01-10 08:25:13,613 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 08:25:13,613 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1086 states and 1560 transitions. [2025-01-10 08:25:13,614 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1086 states and 1560 transitions. [2025-01-10 08:25:13,619 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1086 to 1073. [2025-01-10 08:25:13,620 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1073 states, 1066 states have (on average 1.4352720450281427) internal successors, (1530), 1065 states have internal predecessors, (1530), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-01-10 08:25:13,622 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1073 states to 1073 states and 1542 transitions. [2025-01-10 08:25:13,622 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1073 states and 1542 transitions. [2025-01-10 08:25:13,623 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2025-01-10 08:25:13,624 INFO L432 stractBuchiCegarLoop]: Abstraction has 1073 states and 1542 transitions. [2025-01-10 08:25:13,624 INFO L338 stractBuchiCegarLoop]: ======== Iteration 19 ============ [2025-01-10 08:25:13,624 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1073 states and 1542 transitions. [2025-01-10 08:25:13,625 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 632 [2025-01-10 08:25:13,626 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 08:25:13,626 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 08:25:13,626 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 08:25:13,626 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 08:25:13,626 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite608#1.base, main_#t~ite608#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-01-10 08:25:13,626 INFO L754 eck$LassoCheckResult]: Loop: "call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;" "call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "havoc main_~_ha_hashv~1#1;" "goto;" "havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise193#1;assume main_#t~bitwise193#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise194#1 := 0;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-01-10 08:25:13,627 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:25:13,627 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 19 times [2025-01-10 08:25:13,627 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:25:13,627 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1764259903] [2025-01-10 08:25:13,627 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-01-10 08:25:13,627 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:25:13,635 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:25:13,636 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:25:13,636 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:25:13,636 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:25:13,636 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 08:25:13,639 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:25:13,639 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:25:13,640 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:25:13,640 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:25:13,645 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 08:25:13,646 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:25:13,646 INFO L85 PathProgramCache]: Analyzing trace with hash 520534305, now seen corresponding path program 1 times [2025-01-10 08:25:13,646 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:25:13,646 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1350565310] [2025-01-10 08:25:13,646 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 08:25:13,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:25:13,718 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 82 statements into 1 equivalence classes. [2025-01-10 08:25:13,785 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 82 of 82 statements. [2025-01-10 08:25:13,785 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:25:13,785 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 08:25:14,014 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 08:25:14,014 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 08:25:14,014 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1350565310] [2025-01-10 08:25:14,015 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1350565310] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 08:25:14,015 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 08:25:14,015 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-01-10 08:25:14,015 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1601379879] [2025-01-10 08:25:14,015 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 08:25:14,015 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 08:25:14,015 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 08:25:14,015 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-01-10 08:25:14,015 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=42, Unknown=0, NotChecked=0, Total=56 [2025-01-10 08:25:14,016 INFO L87 Difference]: Start difference. First operand 1073 states and 1542 transitions. cyclomatic complexity: 480 Second operand has 8 states, 8 states have (on average 10.25) internal successors, (82), 8 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 08:25:14,432 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 08:25:14,432 INFO L93 Difference]: Finished difference Result 1076 states and 1545 transitions. [2025-01-10 08:25:14,432 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1076 states and 1545 transitions. [2025-01-10 08:25:14,434 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 635 [2025-01-10 08:25:14,443 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1076 states to 1076 states and 1545 transitions. [2025-01-10 08:25:14,443 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1076 [2025-01-10 08:25:14,444 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1076 [2025-01-10 08:25:14,444 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1076 states and 1545 transitions. [2025-01-10 08:25:14,445 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 08:25:14,445 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1076 states and 1545 transitions. [2025-01-10 08:25:14,445 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1076 states and 1545 transitions. [2025-01-10 08:25:14,480 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1076 to 1076. [2025-01-10 08:25:14,484 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1076 states, 1069 states have (on average 1.4340505144995324) internal successors, (1533), 1068 states have internal predecessors, (1533), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-01-10 08:25:14,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1076 states to 1076 states and 1545 transitions. [2025-01-10 08:25:14,486 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1076 states and 1545 transitions. [2025-01-10 08:25:14,487 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-01-10 08:25:14,488 INFO L432 stractBuchiCegarLoop]: Abstraction has 1076 states and 1545 transitions. [2025-01-10 08:25:14,488 INFO L338 stractBuchiCegarLoop]: ======== Iteration 20 ============ [2025-01-10 08:25:14,488 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1076 states and 1545 transitions. [2025-01-10 08:25:14,489 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 635 [2025-01-10 08:25:14,489 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 08:25:14,489 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 08:25:14,490 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 08:25:14,490 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 08:25:14,490 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite608#1.base, main_#t~ite608#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-01-10 08:25:14,490 INFO L754 eck$LassoCheckResult]: Loop: "call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;" "call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "havoc main_~_ha_hashv~1#1;" "goto;" "havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise194#1;assume main_#t~bitwise194#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume !(0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~1#1 % 4294967296 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise195#1;assume main_#t~bitwise195#1 % 4294967296 <= main_~_ha_hashv~1#1 % 4294967296 + main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-01-10 08:25:14,491 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:25:14,491 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 20 times [2025-01-10 08:25:14,491 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:25:14,491 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1242126206] [2025-01-10 08:25:14,491 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-01-10 08:25:14,491 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:25:14,498 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:25:14,499 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:25:14,500 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-01-10 08:25:14,500 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:25:14,500 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 08:25:14,502 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:25:14,503 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:25:14,503 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:25:14,503 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:25:14,507 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 08:25:14,508 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:25:14,508 INFO L85 PathProgramCache]: Analyzing trace with hash 807190624, now seen corresponding path program 1 times [2025-01-10 08:25:14,508 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:25:14,509 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1043129185] [2025-01-10 08:25:14,509 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 08:25:14,509 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:25:14,533 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 83 statements into 1 equivalence classes. [2025-01-10 08:25:14,667 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 83 of 83 statements. [2025-01-10 08:25:14,667 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:25:14,667 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 08:25:15,905 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 08:25:15,906 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 08:25:15,906 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1043129185] [2025-01-10 08:25:15,906 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1043129185] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 08:25:15,906 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 08:25:15,906 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2025-01-10 08:25:15,906 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [269597596] [2025-01-10 08:25:15,907 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 08:25:15,907 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 08:25:15,907 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 08:25:15,907 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2025-01-10 08:25:15,908 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=265, Unknown=0, NotChecked=0, Total=306 [2025-01-10 08:25:15,908 INFO L87 Difference]: Start difference. First operand 1076 states and 1545 transitions. cyclomatic complexity: 480 Second operand has 18 states, 18 states have (on average 4.611111111111111) internal successors, (83), 18 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 08:25:17,862 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 08:25:17,862 INFO L93 Difference]: Finished difference Result 1164 states and 1670 transitions. [2025-01-10 08:25:17,863 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1164 states and 1670 transitions. [2025-01-10 08:25:17,865 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 723 [2025-01-10 08:25:17,871 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1164 states to 1164 states and 1670 transitions. [2025-01-10 08:25:17,871 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1164 [2025-01-10 08:25:17,871 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1164 [2025-01-10 08:25:17,871 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1164 states and 1670 transitions. [2025-01-10 08:25:17,872 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 08:25:17,872 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1164 states and 1670 transitions. [2025-01-10 08:25:17,873 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1164 states and 1670 transitions. [2025-01-10 08:25:17,878 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1164 to 1090. [2025-01-10 08:25:17,883 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1090 states, 1083 states have (on average 1.433056325023084) internal successors, (1552), 1082 states have internal predecessors, (1552), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-01-10 08:25:17,884 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1090 states to 1090 states and 1564 transitions. [2025-01-10 08:25:17,884 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1090 states and 1564 transitions. [2025-01-10 08:25:17,885 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2025-01-10 08:25:17,885 INFO L432 stractBuchiCegarLoop]: Abstraction has 1090 states and 1564 transitions. [2025-01-10 08:25:17,885 INFO L338 stractBuchiCegarLoop]: ======== Iteration 21 ============ [2025-01-10 08:25:17,885 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1090 states and 1564 transitions. [2025-01-10 08:25:17,887 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 649 [2025-01-10 08:25:17,887 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 08:25:17,887 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 08:25:17,887 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 08:25:17,887 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 08:25:17,888 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite608#1.base, main_#t~ite608#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-01-10 08:25:17,888 INFO L754 eck$LassoCheckResult]: Loop: "call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;" "call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "havoc main_~_ha_hashv~1#1;" "goto;" "havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise193#1 := 0;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise194#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume !(0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~1#1 % 4294967296 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise195#1;assume main_#t~bitwise195#1 % 4294967296 <= main_~_ha_hashv~1#1 % 4294967296 + main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-01-10 08:25:17,888 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:25:17,888 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 21 times [2025-01-10 08:25:17,888 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:25:17,888 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [570707782] [2025-01-10 08:25:17,889 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-01-10 08:25:17,889 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:25:17,896 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:25:17,898 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:25:17,898 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-01-10 08:25:17,898 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:25:17,898 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 08:25:17,900 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:25:17,901 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:25:17,901 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:25:17,901 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:25:17,905 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 08:25:17,906 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:25:17,906 INFO L85 PathProgramCache]: Analyzing trace with hash 717344536, now seen corresponding path program 1 times [2025-01-10 08:25:17,906 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:25:17,906 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [499507259] [2025-01-10 08:25:17,906 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 08:25:17,906 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:25:17,927 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 83 statements into 1 equivalence classes. [2025-01-10 08:25:18,001 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 83 of 83 statements. [2025-01-10 08:25:18,005 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:25:18,005 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 08:25:18,411 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-01-10 08:25:18,412 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-01-10 08:25:18,412 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [499507259] [2025-01-10 08:25:18,412 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [499507259] provided 1 perfect and 0 imperfect interpolant sequences [2025-01-10 08:25:18,412 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-01-10 08:25:18,412 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2025-01-10 08:25:18,412 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1208253690] [2025-01-10 08:25:18,412 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-01-10 08:25:18,412 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-01-10 08:25:18,412 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-01-10 08:25:18,413 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2025-01-10 08:25:18,413 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=89, Unknown=0, NotChecked=0, Total=110 [2025-01-10 08:25:18,413 INFO L87 Difference]: Start difference. First operand 1090 states and 1564 transitions. cyclomatic complexity: 485 Second operand has 11 states, 11 states have (on average 7.545454545454546) internal successors, (83), 11 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-01-10 08:25:19,029 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-01-10 08:25:19,030 INFO L93 Difference]: Finished difference Result 1102 states and 1581 transitions. [2025-01-10 08:25:19,031 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1102 states and 1581 transitions. [2025-01-10 08:25:19,033 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 661 [2025-01-10 08:25:19,037 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1102 states to 1102 states and 1581 transitions. [2025-01-10 08:25:19,039 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1102 [2025-01-10 08:25:19,040 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1102 [2025-01-10 08:25:19,040 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1102 states and 1581 transitions. [2025-01-10 08:25:19,041 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-01-10 08:25:19,041 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1102 states and 1581 transitions. [2025-01-10 08:25:19,042 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1102 states and 1581 transitions. [2025-01-10 08:25:19,048 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1102 to 1094. [2025-01-10 08:25:19,049 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1094 states, 1087 states have (on average 1.4323827046918123) internal successors, (1557), 1086 states have internal predecessors, (1557), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-01-10 08:25:19,050 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1094 states to 1094 states and 1569 transitions. [2025-01-10 08:25:19,050 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1094 states and 1569 transitions. [2025-01-10 08:25:19,050 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2025-01-10 08:25:19,050 INFO L432 stractBuchiCegarLoop]: Abstraction has 1094 states and 1569 transitions. [2025-01-10 08:25:19,050 INFO L338 stractBuchiCegarLoop]: ======== Iteration 22 ============ [2025-01-10 08:25:19,051 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1094 states and 1569 transitions. [2025-01-10 08:25:19,053 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 653 [2025-01-10 08:25:19,053 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-01-10 08:25:19,053 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-01-10 08:25:19,053 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-01-10 08:25:19,056 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-01-10 08:25:19,056 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~ite608#1.base, main_#t~ite608#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#2(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-01-10 08:25:19,056 INFO L754 eck$LassoCheckResult]: Loop: "call main_#t~mem5#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;" "call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#1(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "havoc main_~_ha_hashv~1#1;" "goto;" "havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#1(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#1(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#1(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#1(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise193#1;assume main_#t~bitwise193#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise194#1;assume main_#t~bitwise194#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "call write~int#1(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#1(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "call write~$Pointer$#1(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#1(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#1(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#1(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#1(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#1(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#1(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#1(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#1(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#1(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#1(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#1(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#1(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#1(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#1(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#1(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#1(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#2(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#2(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-01-10 08:25:19,056 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:25:19,056 INFO L85 PathProgramCache]: Analyzing trace with hash 1827, now seen corresponding path program 22 times [2025-01-10 08:25:19,056 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:25:19,056 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [646987569] [2025-01-10 08:25:19,056 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-01-10 08:25:19,056 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:25:19,068 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-01-10 08:25:19,069 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:25:19,069 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-01-10 08:25:19,070 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:25:19,070 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-01-10 08:25:19,072 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-01-10 08:25:19,073 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-01-10 08:25:19,073 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:25:19,074 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-01-10 08:25:19,079 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-01-10 08:25:19,080 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-01-10 08:25:19,080 INFO L85 PathProgramCache]: Analyzing trace with hash 1424352, now seen corresponding path program 1 times [2025-01-10 08:25:19,080 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-01-10 08:25:19,080 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1738946482] [2025-01-10 08:25:19,080 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-01-10 08:25:19,080 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-01-10 08:25:19,101 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 83 statements into 1 equivalence classes. [2025-01-10 08:25:19,161 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 83 of 83 statements. [2025-01-10 08:25:19,161 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-01-10 08:25:19,161 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-01-10 08:26:03,118 WARN L286 SmtUtils]: Spent 17.02s on a formula simplification that was a NOOP. DAG size: 39 (called from [L 388] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.predicates.PredicateUnifier.getOrConstructPredicate)