./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/termination-crafted/Arrays01-EquivalentConstantIndices-1.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version c00e63dc Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/termination-crafted/Arrays01-EquivalentConstantIndices-1.c -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash cad2c6f6e8ebe2adcd550e4a56b83be37e52f812ae33bfb645236c6925734dbf --- Real Ultimate output --- This is Ultimate 0.3.0-?-c00e63d-m [2025-02-06 18:58:16,429 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-02-06 18:58:16,480 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf [2025-02-06 18:58:16,483 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-02-06 18:58:16,483 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-02-06 18:58:16,483 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-02-06 18:58:16,509 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-02-06 18:58:16,510 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-02-06 18:58:16,511 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-02-06 18:58:16,511 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-02-06 18:58:16,511 INFO L153 SettingsManager]: * Use memory slicer=true [2025-02-06 18:58:16,512 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-02-06 18:58:16,512 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-02-06 18:58:16,512 INFO L153 SettingsManager]: * Use SBE=true [2025-02-06 18:58:16,512 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-02-06 18:58:16,513 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-02-06 18:58:16,513 INFO L153 SettingsManager]: * Use old map elimination=false [2025-02-06 18:58:16,513 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-02-06 18:58:16,513 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-02-06 18:58:16,513 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-02-06 18:58:16,513 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-02-06 18:58:16,513 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-02-06 18:58:16,513 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-02-06 18:58:16,513 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-02-06 18:58:16,513 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-02-06 18:58:16,514 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-02-06 18:58:16,514 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-02-06 18:58:16,514 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-02-06 18:58:16,514 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-02-06 18:58:16,514 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-02-06 18:58:16,514 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-02-06 18:58:16,514 INFO L153 SettingsManager]: * Use constant arrays=true [2025-02-06 18:58:16,514 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-02-06 18:58:16,514 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-02-06 18:58:16,514 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-02-06 18:58:16,514 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-02-06 18:58:16,514 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-02-06 18:58:16,515 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> cad2c6f6e8ebe2adcd550e4a56b83be37e52f812ae33bfb645236c6925734dbf [2025-02-06 18:58:16,724 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-02-06 18:58:16,729 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-02-06 18:58:16,731 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-02-06 18:58:16,731 INFO L270 PluginConnector]: Initializing CDTParser... [2025-02-06 18:58:16,731 INFO L274 PluginConnector]: CDTParser initialized [2025-02-06 18:58:16,732 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/termination-crafted/Arrays01-EquivalentConstantIndices-1.c [2025-02-06 18:58:17,822 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/99fadc830/1e340d399f8746f5ae78f9fa48a068f9/FLAG15dcfc984 [2025-02-06 18:58:17,988 INFO L384 CDTParser]: Found 1 translation units. [2025-02-06 18:58:17,988 INFO L180 CDTParser]: Scanning /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/termination-crafted/Arrays01-EquivalentConstantIndices-1.c [2025-02-06 18:58:17,994 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/99fadc830/1e340d399f8746f5ae78f9fa48a068f9/FLAG15dcfc984 [2025-02-06 18:58:18,017 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/99fadc830/1e340d399f8746f5ae78f9fa48a068f9 [2025-02-06 18:58:18,019 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-02-06 18:58:18,020 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-02-06 18:58:18,021 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-02-06 18:58:18,022 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-02-06 18:58:18,025 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-02-06 18:58:18,026 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.02 06:58:18" (1/1) ... [2025-02-06 18:58:18,027 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@f922c28 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 06:58:18, skipping insertion in model container [2025-02-06 18:58:18,028 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.02 06:58:18" (1/1) ... [2025-02-06 18:58:18,038 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-02-06 18:58:18,132 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-06 18:58:18,135 INFO L200 MainTranslator]: Completed pre-run [2025-02-06 18:58:18,143 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-06 18:58:18,154 INFO L204 MainTranslator]: Completed translation [2025-02-06 18:58:18,155 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 06:58:18 WrapperNode [2025-02-06 18:58:18,155 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-02-06 18:58:18,155 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-02-06 18:58:18,156 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-02-06 18:58:18,156 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-02-06 18:58:18,160 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 06:58:18" (1/1) ... [2025-02-06 18:58:18,164 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 06:58:18" (1/1) ... [2025-02-06 18:58:18,171 INFO L138 Inliner]: procedures = 8, calls = 9, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 29 [2025-02-06 18:58:18,172 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-02-06 18:58:18,172 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-02-06 18:58:18,172 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-02-06 18:58:18,172 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-02-06 18:58:18,176 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 06:58:18" (1/1) ... [2025-02-06 18:58:18,177 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 06:58:18" (1/1) ... [2025-02-06 18:58:18,177 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 06:58:18" (1/1) ... [2025-02-06 18:58:18,183 INFO L175 MemorySlicer]: Split 4 memory accesses to 1 slices as follows [4]. 100 percent of accesses are in the largest equivalence class. The 0 initializations are split as follows [0]. The 2 writes are split as follows [2]. [2025-02-06 18:58:18,183 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 06:58:18" (1/1) ... [2025-02-06 18:58:18,184 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 06:58:18" (1/1) ... [2025-02-06 18:58:18,190 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 06:58:18" (1/1) ... [2025-02-06 18:58:18,190 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 06:58:18" (1/1) ... [2025-02-06 18:58:18,191 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 06:58:18" (1/1) ... [2025-02-06 18:58:18,191 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 06:58:18" (1/1) ... [2025-02-06 18:58:18,192 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-02-06 18:58:18,193 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-02-06 18:58:18,193 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-02-06 18:58:18,193 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-02-06 18:58:18,197 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 06:58:18" (1/1) ... [2025-02-06 18:58:18,202 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 18:58:18,210 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 18:58:18,221 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 18:58:18,223 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-02-06 18:58:18,241 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2025-02-06 18:58:18,242 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-02-06 18:58:18,242 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-02-06 18:58:18,242 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2025-02-06 18:58:18,242 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2025-02-06 18:58:18,242 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2025-02-06 18:58:18,279 INFO L257 CfgBuilder]: Building ICFG [2025-02-06 18:58:18,280 INFO L287 CfgBuilder]: Building CFG for each procedure with an implementation [2025-02-06 18:58:18,384 INFO L1309 $ProcedureCfgBuilder]: dead code at ProgramPoint L11: call ULTIMATE.dealloc(main_~#a~0#1.base, main_~#a~0#1.offset);havoc main_~#a~0#1.base, main_~#a~0#1.offset; [2025-02-06 18:58:18,388 INFO L? ?]: Removed 2 outVars from TransFormulas that were not future-live. [2025-02-06 18:58:18,388 INFO L308 CfgBuilder]: Performing block encoding [2025-02-06 18:58:18,394 INFO L332 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-02-06 18:58:18,394 INFO L337 CfgBuilder]: Removed 0 assume(true) statements. [2025-02-06 18:58:18,394 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 06.02 06:58:18 BoogieIcfgContainer [2025-02-06 18:58:18,394 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-02-06 18:58:18,395 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-02-06 18:58:18,395 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-02-06 18:58:18,398 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-02-06 18:58:18,398 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-06 18:58:18,398 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 06.02 06:58:18" (1/3) ... [2025-02-06 18:58:18,400 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@413c9ed and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.02 06:58:18, skipping insertion in model container [2025-02-06 18:58:18,400 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-06 18:58:18,400 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 06:58:18" (2/3) ... [2025-02-06 18:58:18,401 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@413c9ed and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.02 06:58:18, skipping insertion in model container [2025-02-06 18:58:18,401 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-06 18:58:18,401 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 06.02 06:58:18" (3/3) ... [2025-02-06 18:58:18,402 INFO L363 chiAutomizerObserver]: Analyzing ICFG Arrays01-EquivalentConstantIndices-1.c [2025-02-06 18:58:18,436 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-02-06 18:58:18,437 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-02-06 18:58:18,437 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-02-06 18:58:18,437 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-02-06 18:58:18,437 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-02-06 18:58:18,437 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-02-06 18:58:18,438 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-02-06 18:58:18,438 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-02-06 18:58:18,440 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 9 states, 8 states have (on average 1.375) internal successors, (11), 8 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 18:58:18,449 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 3 [2025-02-06 18:58:18,450 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 18:58:18,450 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 18:58:18,452 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 18:58:18,452 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-02-06 18:58:18,452 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-02-06 18:58:18,453 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 9 states, 8 states have (on average 1.375) internal successors, (11), 8 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 18:58:18,454 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 3 [2025-02-06 18:58:18,454 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 18:58:18,454 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 18:58:18,454 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 18:58:18,454 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-02-06 18:58:18,457 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~post1#1, main_~i~0#1, main_#t~mem2#1, main_#t~mem3#1, main_~#a~0#1.base, main_~#a~0#1.offset;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0;" [2025-02-06 18:58:18,457 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" [2025-02-06 18:58:18,461 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 18:58:18,462 INFO L85 PathProgramCache]: Analyzing trace with hash 1376, now seen corresponding path program 1 times [2025-02-06 18:58:18,467 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 18:58:18,467 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2113756373] [2025-02-06 18:58:18,467 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 18:58:18,468 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 18:58:18,517 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 18:58:18,529 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 18:58:18,529 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 18:58:18,529 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 18:58:18,529 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 18:58:18,532 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 18:58:18,536 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 18:58:18,537 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 18:58:18,537 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 18:58:18,545 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 18:58:18,547 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 18:58:18,547 INFO L85 PathProgramCache]: Analyzing trace with hash 42, now seen corresponding path program 1 times [2025-02-06 18:58:18,547 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 18:58:18,547 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1607693100] [2025-02-06 18:58:18,547 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 18:58:18,547 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 18:58:18,551 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-06 18:58:18,554 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-06 18:58:18,554 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 18:58:18,554 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 18:58:18,554 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 18:58:18,555 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-06 18:58:18,557 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-06 18:58:18,557 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 18:58:18,557 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 18:58:18,559 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 18:58:18,559 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 18:58:18,559 INFO L85 PathProgramCache]: Analyzing trace with hash 42667, now seen corresponding path program 1 times [2025-02-06 18:58:18,560 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 18:58:18,560 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [803792596] [2025-02-06 18:58:18,560 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 18:58:18,560 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 18:58:18,563 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-02-06 18:58:18,570 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-02-06 18:58:18,570 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 18:58:18,571 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 18:58:18,571 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 18:58:18,572 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-02-06 18:58:18,577 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-02-06 18:58:18,577 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 18:58:18,577 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 18:58:18,578 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 18:58:18,729 INFO L204 LassoAnalysis]: Preferences: [2025-02-06 18:58:18,729 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-02-06 18:58:18,730 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-02-06 18:58:18,730 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-02-06 18:58:18,730 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2025-02-06 18:58:18,730 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 18:58:18,730 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-02-06 18:58:18,730 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-02-06 18:58:18,730 INFO L132 ssoRankerPreferences]: Filename of dumped script: Arrays01-EquivalentConstantIndices-1.c_Iteration1_Lasso [2025-02-06 18:58:18,732 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-02-06 18:58:18,733 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-02-06 18:58:18,742 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 18:58:18,747 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 18:58:18,750 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 18:58:18,752 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 18:58:18,804 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 18:58:18,806 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 18:58:18,887 INFO L259 LassoAnalysis]: Preprocessing complete. [2025-02-06 18:58:18,890 INFO L451 LassoAnalysis]: Using template 'affine'. [2025-02-06 18:58:18,890 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 18:58:18,891 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 18:58:18,892 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 18:58:18,894 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2025-02-06 18:58:18,895 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 18:58:18,905 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 18:58:18,905 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-02-06 18:58:18,906 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 18:58:18,906 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 18:58:18,906 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 18:58:18,909 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-02-06 18:58:18,909 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-02-06 18:58:18,910 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 18:58:18,916 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Forceful destruction successful, exit code 0 [2025-02-06 18:58:18,916 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 18:58:18,916 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 18:58:18,918 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 18:58:18,919 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2025-02-06 18:58:18,921 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 18:58:18,931 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 18:58:18,931 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-02-06 18:58:18,932 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 18:58:18,932 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 18:58:18,932 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 18:58:18,932 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-02-06 18:58:18,932 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-02-06 18:58:18,933 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 18:58:18,939 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Ended with exit code 0 [2025-02-06 18:58:18,939 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 18:58:18,939 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 18:58:18,941 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 18:58:18,942 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2025-02-06 18:58:18,943 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 18:58:18,953 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 18:58:18,953 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-02-06 18:58:18,953 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 18:58:18,953 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 18:58:18,953 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 18:58:18,954 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-02-06 18:58:18,954 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-02-06 18:58:18,955 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 18:58:18,961 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Forceful destruction successful, exit code 0 [2025-02-06 18:58:18,961 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 18:58:18,961 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 18:58:18,963 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 18:58:18,963 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2025-02-06 18:58:18,968 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 18:58:18,978 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 18:58:18,979 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 18:58:18,979 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 18:58:18,979 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 18:58:18,982 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-02-06 18:58:18,982 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-02-06 18:58:18,985 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 18:58:18,991 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Ended with exit code 0 [2025-02-06 18:58:18,991 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 18:58:18,991 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 18:58:18,992 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 18:58:18,995 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2025-02-06 18:58:18,995 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 18:58:19,005 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 18:58:19,005 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 18:58:19,005 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 18:58:19,005 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 18:58:19,008 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-02-06 18:58:19,008 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-02-06 18:58:19,013 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 18:58:19,018 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2025-02-06 18:58:19,019 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 18:58:19,020 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 18:58:19,021 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 18:58:19,022 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2025-02-06 18:58:19,024 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 18:58:19,033 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 18:58:19,034 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 18:58:19,034 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 18:58:19,034 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 18:58:19,036 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-02-06 18:58:19,036 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-02-06 18:58:19,039 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 18:58:19,044 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2025-02-06 18:58:19,045 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 18:58:19,045 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 18:58:19,046 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 18:58:19,048 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2025-02-06 18:58:19,049 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 18:58:19,059 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 18:58:19,059 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 18:58:19,059 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 18:58:19,059 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 18:58:19,063 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-02-06 18:58:19,063 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-02-06 18:58:19,069 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2025-02-06 18:58:19,100 INFO L443 ModelExtractionUtils]: Simplification made 9 calls to the SMT solver. [2025-02-06 18:58:19,101 INFO L444 ModelExtractionUtils]: 0 out of 13 variables were initially zero. Simplification set additionally 10 variables to zero. [2025-02-06 18:58:19,102 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 18:58:19,103 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 18:58:19,104 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 18:58:19,106 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2025-02-06 18:58:19,110 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2025-02-06 18:58:19,120 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2025-02-06 18:58:19,121 INFO L474 LassoAnalysis]: Proved termination. [2025-02-06 18:58:19,121 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select #length ULTIMATE.start_main_~#a~0#1.base)_1, ULTIMATE.start_main_~i~0#1) = 2095*v_rep(select #length ULTIMATE.start_main_~#a~0#1.base)_1 - 8*ULTIMATE.start_main_~i~0#1 Supporting invariants [] [2025-02-06 18:58:19,131 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Ended with exit code 0 [2025-02-06 18:58:19,136 INFO L156 tatePredicateManager]: 1 out of 1 supporting invariants were superfluous and have been removed [2025-02-06 18:58:19,141 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #length [2025-02-06 18:58:19,141 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#length,GLOBAL] [2025-02-06 18:58:19,154 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 18:58:19,159 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 18:58:19,161 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 18:58:19,161 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 18:58:19,162 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 18:58:19,162 INFO L256 TraceCheckSpWp]: Trace formula consists of 19 conjuncts, 2 conjuncts are in the unsatisfiable core [2025-02-06 18:58:19,163 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 18:58:19,169 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-06 18:58:19,171 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-06 18:58:19,171 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 18:58:19,171 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 18:58:19,171 INFO L256 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 6 conjuncts are in the unsatisfiable core [2025-02-06 18:58:19,172 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 18:58:19,174 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 18:58:19,189 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 1 loop predicates [2025-02-06 18:58:19,190 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 9 states, 8 states have (on average 1.375) internal successors, (11), 8 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 1.5) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 18:58:19,207 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 9 states, 8 states have (on average 1.375) internal successors, (11), 8 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 2 states, 2 states have (on average 1.5) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 11 states and 15 transitions. Complement of second has 3 states. [2025-02-06 18:58:19,208 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 2 states 1 stem states 0 non-accepting loop states 1 accepting loop states [2025-02-06 18:58:19,211 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2 states, 2 states have (on average 1.5) internal successors, (3), 2 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 18:58:19,212 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2 states to 2 states and 3 transitions. [2025-02-06 18:58:19,214 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 2 states and 3 transitions. Stem has 2 letters. Loop has 1 letters. [2025-02-06 18:58:19,215 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-02-06 18:58:19,215 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 2 states and 3 transitions. Stem has 3 letters. Loop has 1 letters. [2025-02-06 18:58:19,215 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-02-06 18:58:19,215 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 2 states and 3 transitions. Stem has 2 letters. Loop has 2 letters. [2025-02-06 18:58:19,215 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-02-06 18:58:19,215 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 11 states and 15 transitions. [2025-02-06 18:58:19,216 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 18:58:19,217 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 11 states to 7 states and 9 transitions. [2025-02-06 18:58:19,218 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5 [2025-02-06 18:58:19,218 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6 [2025-02-06 18:58:19,218 INFO L73 IsDeterministic]: Start isDeterministic. Operand 7 states and 9 transitions. [2025-02-06 18:58:19,218 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 18:58:19,218 INFO L218 hiAutomatonCegarLoop]: Abstraction has 7 states and 9 transitions. [2025-02-06 18:58:19,226 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7 states and 9 transitions. [2025-02-06 18:58:19,231 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7 to 6. [2025-02-06 18:58:19,231 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 1.3333333333333333) internal successors, (8), 5 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 18:58:19,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 8 transitions. [2025-02-06 18:58:19,232 INFO L240 hiAutomatonCegarLoop]: Abstraction has 6 states and 8 transitions. [2025-02-06 18:58:19,232 INFO L432 stractBuchiCegarLoop]: Abstraction has 6 states and 8 transitions. [2025-02-06 18:58:19,232 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-02-06 18:58:19,232 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 6 states and 8 transitions. [2025-02-06 18:58:19,232 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 18:58:19,232 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 18:58:19,233 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 18:58:19,233 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1] [2025-02-06 18:58:19,233 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 18:58:19,233 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~post1#1, main_~i~0#1, main_#t~mem2#1, main_#t~mem3#1, main_~#a~0#1.base, main_~#a~0#1.offset;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0;" "assume !(main_~i~0#1 < 1048);havoc main_~i~0#1;" [2025-02-06 18:58:19,233 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem2#1 := read~int#0(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);" "assume main_#t~mem2#1 >= 0;havoc main_#t~mem2#1;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);call write~int#0(main_#t~mem3#1 - 1, main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);havoc main_#t~mem3#1;" [2025-02-06 18:58:19,233 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 18:58:19,234 INFO L85 PathProgramCache]: Analyzing trace with hash 42666, now seen corresponding path program 1 times [2025-02-06 18:58:19,234 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 18:58:19,234 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1454983703] [2025-02-06 18:58:19,234 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 18:58:19,234 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 18:58:19,237 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-02-06 18:58:19,239 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-02-06 18:58:19,239 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 18:58:19,239 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 18:58:19,266 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 18:58:19,266 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 18:58:19,266 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1454983703] [2025-02-06 18:58:19,266 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1454983703] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 18:58:19,266 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 18:58:19,266 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-02-06 18:58:19,267 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1822606795] [2025-02-06 18:58:19,267 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 18:58:19,268 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 18:58:19,268 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 18:58:19,269 INFO L85 PathProgramCache]: Analyzing trace with hash 1216, now seen corresponding path program 1 times [2025-02-06 18:58:19,269 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 18:58:19,269 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1125576185] [2025-02-06 18:58:19,269 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 18:58:19,269 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 18:58:19,271 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 18:58:19,274 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 18:58:19,274 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 18:58:19,274 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 18:58:19,274 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 18:58:19,275 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 18:58:19,280 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 18:58:19,280 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 18:58:19,280 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 18:58:19,281 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 18:58:19,309 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 18:58:19,310 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 18:58:19,311 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 18:58:19,311 INFO L87 Difference]: Start difference. First operand 6 states and 8 transitions. cyclomatic complexity: 4 Second operand has 3 states, 2 states have (on average 1.5) internal successors, (3), 3 states have internal predecessors, (3), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 18:58:19,316 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 18:58:19,316 INFO L93 Difference]: Finished difference Result 6 states and 7 transitions. [2025-02-06 18:58:19,316 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 6 states and 7 transitions. [2025-02-06 18:58:19,317 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 18:58:19,317 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 6 states to 6 states and 7 transitions. [2025-02-06 18:58:19,317 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5 [2025-02-06 18:58:19,317 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 5 [2025-02-06 18:58:19,317 INFO L73 IsDeterministic]: Start isDeterministic. Operand 6 states and 7 transitions. [2025-02-06 18:58:19,317 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 18:58:19,317 INFO L218 hiAutomatonCegarLoop]: Abstraction has 6 states and 7 transitions. [2025-02-06 18:58:19,317 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6 states and 7 transitions. [2025-02-06 18:58:19,318 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6 to 6. [2025-02-06 18:58:19,318 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6 states, 6 states have (on average 1.1666666666666667) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 18:58:19,318 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6 states to 6 states and 7 transitions. [2025-02-06 18:58:19,318 INFO L240 hiAutomatonCegarLoop]: Abstraction has 6 states and 7 transitions. [2025-02-06 18:58:19,318 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 18:58:19,318 INFO L432 stractBuchiCegarLoop]: Abstraction has 6 states and 7 transitions. [2025-02-06 18:58:19,318 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-02-06 18:58:19,319 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 6 states and 7 transitions. [2025-02-06 18:58:19,319 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 18:58:19,319 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 18:58:19,319 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 18:58:19,319 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2025-02-06 18:58:19,319 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 18:58:19,319 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~post1#1, main_~i~0#1, main_#t~mem2#1, main_#t~mem3#1, main_~#a~0#1.base, main_~#a~0#1.offset;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume !(main_~i~0#1 < 1048);havoc main_~i~0#1;" [2025-02-06 18:58:19,319 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem2#1 := read~int#0(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);" "assume main_#t~mem2#1 >= 0;havoc main_#t~mem2#1;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);call write~int#0(main_#t~mem3#1 - 1, main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);havoc main_#t~mem3#1;" [2025-02-06 18:58:19,319 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 18:58:19,319 INFO L85 PathProgramCache]: Analyzing trace with hash 1322687, now seen corresponding path program 1 times [2025-02-06 18:58:19,320 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 18:58:19,320 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [352685594] [2025-02-06 18:58:19,320 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 18:58:19,320 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 18:58:19,323 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 4 statements into 1 equivalence classes. [2025-02-06 18:58:19,326 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 4 of 4 statements. [2025-02-06 18:58:19,326 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 18:58:19,326 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 18:58:19,351 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 18:58:19,352 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 18:58:19,352 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [352685594] [2025-02-06 18:58:19,352 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [352685594] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 18:58:19,352 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2045063940] [2025-02-06 18:58:19,352 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 18:58:19,352 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 18:58:19,352 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 18:58:19,373 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 18:58:19,374 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2025-02-06 18:58:19,394 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 4 statements into 1 equivalence classes. [2025-02-06 18:58:19,398 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 4 of 4 statements. [2025-02-06 18:58:19,398 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 18:58:19,398 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 18:58:19,398 INFO L256 TraceCheckSpWp]: Trace formula consists of 31 conjuncts, 3 conjuncts are in the unsatisfiable core [2025-02-06 18:58:19,398 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 18:58:19,408 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 18:58:19,408 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 18:58:19,420 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 18:58:19,420 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2045063940] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 18:58:19,420 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 18:58:19,420 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 6 [2025-02-06 18:58:19,420 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1018553195] [2025-02-06 18:58:19,420 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 18:58:19,420 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 18:58:19,420 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 18:58:19,420 INFO L85 PathProgramCache]: Analyzing trace with hash 1216, now seen corresponding path program 2 times [2025-02-06 18:58:19,420 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 18:58:19,420 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [360699502] [2025-02-06 18:58:19,420 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 18:58:19,420 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 18:58:19,423 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-06 18:58:19,424 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 18:58:19,424 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 18:58:19,425 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 18:58:19,425 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 18:58:19,425 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 18:58:19,427 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 18:58:19,427 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 18:58:19,427 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 18:58:19,428 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 18:58:19,454 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 18:58:19,455 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-06 18:58:19,455 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2025-02-06 18:58:19,455 INFO L87 Difference]: Start difference. First operand 6 states and 7 transitions. cyclomatic complexity: 3 Second operand has 7 states, 6 states have (on average 1.5) internal successors, (9), 7 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 18:58:19,465 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 18:58:19,465 INFO L93 Difference]: Finished difference Result 9 states and 10 transitions. [2025-02-06 18:58:19,465 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 9 states and 10 transitions. [2025-02-06 18:58:19,465 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 18:58:19,465 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 9 states to 9 states and 10 transitions. [2025-02-06 18:58:19,465 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5 [2025-02-06 18:58:19,466 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 5 [2025-02-06 18:58:19,466 INFO L73 IsDeterministic]: Start isDeterministic. Operand 9 states and 10 transitions. [2025-02-06 18:58:19,466 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 18:58:19,466 INFO L218 hiAutomatonCegarLoop]: Abstraction has 9 states and 10 transitions. [2025-02-06 18:58:19,466 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9 states and 10 transitions. [2025-02-06 18:58:19,466 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9 to 9. [2025-02-06 18:58:19,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9 states, 9 states have (on average 1.1111111111111112) internal successors, (10), 8 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 18:58:19,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 10 transitions. [2025-02-06 18:58:19,466 INFO L240 hiAutomatonCegarLoop]: Abstraction has 9 states and 10 transitions. [2025-02-06 18:58:19,467 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-06 18:58:19,467 INFO L432 stractBuchiCegarLoop]: Abstraction has 9 states and 10 transitions. [2025-02-06 18:58:19,467 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-02-06 18:58:19,467 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 9 states and 10 transitions. [2025-02-06 18:58:19,468 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 18:58:19,468 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 18:58:19,468 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 18:58:19,468 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 1, 1, 1] [2025-02-06 18:58:19,468 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 18:58:19,468 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~post1#1, main_~i~0#1, main_#t~mem2#1, main_#t~mem3#1, main_~#a~0#1.base, main_~#a~0#1.offset;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume !(main_~i~0#1 < 1048);havoc main_~i~0#1;" [2025-02-06 18:58:19,468 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem2#1 := read~int#0(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);" "assume main_#t~mem2#1 >= 0;havoc main_#t~mem2#1;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);call write~int#0(main_#t~mem3#1 - 1, main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);havoc main_#t~mem3#1;" [2025-02-06 18:58:19,468 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 18:58:19,468 INFO L85 PathProgramCache]: Analyzing trace with hash 749503466, now seen corresponding path program 2 times [2025-02-06 18:58:19,468 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 18:58:19,468 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1413169275] [2025-02-06 18:58:19,468 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 18:58:19,468 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 18:58:19,473 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 7 statements into 2 equivalence classes. [2025-02-06 18:58:19,479 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 7 of 7 statements. [2025-02-06 18:58:19,479 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-02-06 18:58:19,479 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 18:58:19,540 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 18:58:19,540 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 18:58:19,540 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1413169275] [2025-02-06 18:58:19,540 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1413169275] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 18:58:19,540 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [244921675] [2025-02-06 18:58:19,541 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 18:58:19,541 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 18:58:19,541 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 18:58:19,543 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 18:58:19,550 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2025-02-06 18:58:19,574 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 7 statements into 2 equivalence classes. [2025-02-06 18:58:19,581 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 7 of 7 statements. [2025-02-06 18:58:19,581 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-02-06 18:58:19,581 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 18:58:19,581 INFO L256 TraceCheckSpWp]: Trace formula consists of 64 conjuncts, 6 conjuncts are in the unsatisfiable core [2025-02-06 18:58:19,582 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 18:58:19,593 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 18:58:19,593 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 18:58:19,636 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 18:58:19,636 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [244921675] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 18:58:19,636 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 18:58:19,636 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 12 [2025-02-06 18:58:19,636 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [466846712] [2025-02-06 18:58:19,636 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 18:58:19,636 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 18:58:19,637 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 18:58:19,637 INFO L85 PathProgramCache]: Analyzing trace with hash 1216, now seen corresponding path program 3 times [2025-02-06 18:58:19,637 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 18:58:19,637 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1546112676] [2025-02-06 18:58:19,637 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 18:58:19,637 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 18:58:19,640 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-02-06 18:58:19,642 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 18:58:19,642 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-06 18:58:19,642 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 18:58:19,642 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 18:58:19,643 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 18:58:19,644 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 18:58:19,644 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 18:58:19,644 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 18:58:19,645 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 18:58:19,670 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 18:58:19,671 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-02-06 18:58:19,671 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2025-02-06 18:58:19,671 INFO L87 Difference]: Start difference. First operand 9 states and 10 transitions. cyclomatic complexity: 3 Second operand has 13 states, 12 states have (on average 1.25) internal successors, (15), 13 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 18:58:19,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 18:58:19,686 INFO L93 Difference]: Finished difference Result 15 states and 16 transitions. [2025-02-06 18:58:19,686 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 15 states and 16 transitions. [2025-02-06 18:58:19,687 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 18:58:19,687 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 15 states to 15 states and 16 transitions. [2025-02-06 18:58:19,687 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5 [2025-02-06 18:58:19,687 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 5 [2025-02-06 18:58:19,687 INFO L73 IsDeterministic]: Start isDeterministic. Operand 15 states and 16 transitions. [2025-02-06 18:58:19,687 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 18:58:19,687 INFO L218 hiAutomatonCegarLoop]: Abstraction has 15 states and 16 transitions. [2025-02-06 18:58:19,687 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states and 16 transitions. [2025-02-06 18:58:19,688 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 15. [2025-02-06 18:58:19,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 1.0666666666666667) internal successors, (16), 14 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 18:58:19,688 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 16 transitions. [2025-02-06 18:58:19,688 INFO L240 hiAutomatonCegarLoop]: Abstraction has 15 states and 16 transitions. [2025-02-06 18:58:19,689 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2025-02-06 18:58:19,689 INFO L432 stractBuchiCegarLoop]: Abstraction has 15 states and 16 transitions. [2025-02-06 18:58:19,689 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-02-06 18:58:19,689 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 15 states and 16 transitions. [2025-02-06 18:58:19,689 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 18:58:19,689 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 18:58:19,689 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 18:58:19,690 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [10, 1, 1, 1] [2025-02-06 18:58:19,690 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 18:58:19,690 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~post1#1, main_~i~0#1, main_#t~mem2#1, main_#t~mem3#1, main_~#a~0#1.base, main_~#a~0#1.offset;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume !(main_~i~0#1 < 1048);havoc main_~i~0#1;" [2025-02-06 18:58:19,690 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem2#1 := read~int#0(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);" "assume main_#t~mem2#1 >= 0;havoc main_#t~mem2#1;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);call write~int#0(main_#t~mem3#1 - 1, main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);havoc main_#t~mem3#1;" [2025-02-06 18:58:19,690 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 18:58:19,690 INFO L85 PathProgramCache]: Analyzing trace with hash 1857823690, now seen corresponding path program 3 times [2025-02-06 18:58:19,690 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 18:58:19,690 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [627103860] [2025-02-06 18:58:19,690 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 18:58:19,690 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 18:58:19,698 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 13 statements into 6 equivalence classes. [2025-02-06 18:58:19,714 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) and asserted 13 of 13 statements. [2025-02-06 18:58:19,714 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2025-02-06 18:58:19,714 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 18:58:19,815 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Ended with exit code 0 [2025-02-06 18:58:19,916 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 18:58:19,916 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 18:58:19,916 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [627103860] [2025-02-06 18:58:19,916 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [627103860] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 18:58:19,916 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [566826910] [2025-02-06 18:58:19,916 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 18:58:19,916 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 18:58:19,917 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 18:58:19,918 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 18:58:19,920 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2025-02-06 18:58:19,948 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 13 statements into 6 equivalence classes. [2025-02-06 18:58:19,984 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) and asserted 13 of 13 statements. [2025-02-06 18:58:19,984 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2025-02-06 18:58:19,984 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 18:58:19,985 INFO L256 TraceCheckSpWp]: Trace formula consists of 130 conjuncts, 12 conjuncts are in the unsatisfiable core [2025-02-06 18:58:19,986 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 18:58:20,006 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 18:58:20,006 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 18:58:20,166 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 18:58:20,166 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [566826910] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 18:58:20,166 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 18:58:20,166 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 24 [2025-02-06 18:58:20,166 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1134784645] [2025-02-06 18:58:20,166 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 18:58:20,167 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 18:58:20,167 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 18:58:20,167 INFO L85 PathProgramCache]: Analyzing trace with hash 1216, now seen corresponding path program 4 times [2025-02-06 18:58:20,167 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 18:58:20,167 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [727042109] [2025-02-06 18:58:20,167 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 18:58:20,167 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 18:58:20,170 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-02-06 18:58:20,171 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 18:58:20,171 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-06 18:58:20,171 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 18:58:20,171 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 18:58:20,172 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 18:58:20,173 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 18:58:20,173 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 18:58:20,173 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 18:58:20,174 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 18:58:20,197 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 18:58:20,197 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2025-02-06 18:58:20,198 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2025-02-06 18:58:20,198 INFO L87 Difference]: Start difference. First operand 15 states and 16 transitions. cyclomatic complexity: 3 Second operand has 25 states, 24 states have (on average 1.125) internal successors, (27), 25 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 18:58:20,223 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 18:58:20,223 INFO L93 Difference]: Finished difference Result 27 states and 28 transitions. [2025-02-06 18:58:20,223 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 28 transitions. [2025-02-06 18:58:20,224 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 18:58:20,224 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 27 states and 28 transitions. [2025-02-06 18:58:20,224 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5 [2025-02-06 18:58:20,225 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 5 [2025-02-06 18:58:20,225 INFO L73 IsDeterministic]: Start isDeterministic. Operand 27 states and 28 transitions. [2025-02-06 18:58:20,225 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 18:58:20,225 INFO L218 hiAutomatonCegarLoop]: Abstraction has 27 states and 28 transitions. [2025-02-06 18:58:20,225 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states and 28 transitions. [2025-02-06 18:58:20,226 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2025-02-06 18:58:20,226 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 1.037037037037037) internal successors, (28), 26 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 18:58:20,226 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 28 transitions. [2025-02-06 18:58:20,226 INFO L240 hiAutomatonCegarLoop]: Abstraction has 27 states and 28 transitions. [2025-02-06 18:58:20,226 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2025-02-06 18:58:20,227 INFO L432 stractBuchiCegarLoop]: Abstraction has 27 states and 28 transitions. [2025-02-06 18:58:20,227 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-02-06 18:58:20,227 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 28 transitions. [2025-02-06 18:58:20,227 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 18:58:20,227 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 18:58:20,227 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 18:58:20,228 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [22, 1, 1, 1] [2025-02-06 18:58:20,228 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 18:58:20,228 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~post1#1, main_~i~0#1, main_#t~mem2#1, main_#t~mem3#1, main_~#a~0#1.base, main_~#a~0#1.offset;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume !(main_~i~0#1 < 1048);havoc main_~i~0#1;" [2025-02-06 18:58:20,228 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem2#1 := read~int#0(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);" "assume main_#t~mem2#1 >= 0;havoc main_#t~mem2#1;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);call write~int#0(main_#t~mem3#1 - 1, main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);havoc main_#t~mem3#1;" [2025-02-06 18:58:20,228 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 18:58:20,228 INFO L85 PathProgramCache]: Analyzing trace with hash -1458885750, now seen corresponding path program 4 times [2025-02-06 18:58:20,229 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 18:58:20,229 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [529901626] [2025-02-06 18:58:20,229 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 18:58:20,229 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 18:58:20,239 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 25 statements into 2 equivalence classes. [2025-02-06 18:58:20,261 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 25 of 25 statements. [2025-02-06 18:58:20,261 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-06 18:58:20,261 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 18:58:20,720 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 18:58:20,720 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 18:58:20,720 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [529901626] [2025-02-06 18:58:20,720 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [529901626] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 18:58:20,720 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1031529225] [2025-02-06 18:58:20,720 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 18:58:20,720 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 18:58:20,721 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 18:58:20,723 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 18:58:20,732 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2025-02-06 18:58:20,769 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 25 statements into 2 equivalence classes. [2025-02-06 18:58:20,792 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 25 of 25 statements. [2025-02-06 18:58:20,793 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-06 18:58:20,793 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 18:58:20,793 INFO L256 TraceCheckSpWp]: Trace formula consists of 262 conjuncts, 24 conjuncts are in the unsatisfiable core [2025-02-06 18:58:20,795 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 18:58:20,829 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 18:58:20,829 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 18:58:21,426 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 18:58:21,426 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1031529225] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 18:58:21,426 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 18:58:21,426 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24] total 48 [2025-02-06 18:58:21,426 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1073987774] [2025-02-06 18:58:21,427 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 18:58:21,427 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 18:58:21,427 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 18:58:21,427 INFO L85 PathProgramCache]: Analyzing trace with hash 1216, now seen corresponding path program 5 times [2025-02-06 18:58:21,427 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 18:58:21,427 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [499488741] [2025-02-06 18:58:21,427 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-06 18:58:21,427 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 18:58:21,430 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-06 18:58:21,432 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 18:58:21,432 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 18:58:21,432 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 18:58:21,432 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 18:58:21,433 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 18:58:21,433 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 18:58:21,433 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 18:58:21,433 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 18:58:21,434 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 18:58:21,460 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 18:58:21,461 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2025-02-06 18:58:21,462 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2025-02-06 18:58:21,462 INFO L87 Difference]: Start difference. First operand 27 states and 28 transitions. cyclomatic complexity: 3 Second operand has 49 states, 48 states have (on average 1.0625) internal successors, (51), 49 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 18:58:21,513 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 18:58:21,513 INFO L93 Difference]: Finished difference Result 51 states and 52 transitions. [2025-02-06 18:58:21,513 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 52 transitions. [2025-02-06 18:58:21,514 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 18:58:21,514 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 51 states and 52 transitions. [2025-02-06 18:58:21,514 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5 [2025-02-06 18:58:21,514 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 5 [2025-02-06 18:58:21,514 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 52 transitions. [2025-02-06 18:58:21,514 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 18:58:21,514 INFO L218 hiAutomatonCegarLoop]: Abstraction has 51 states and 52 transitions. [2025-02-06 18:58:21,514 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 52 transitions. [2025-02-06 18:58:21,516 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2025-02-06 18:58:21,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 51 states, 51 states have (on average 1.0196078431372548) internal successors, (52), 50 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 18:58:21,516 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 52 transitions. [2025-02-06 18:58:21,517 INFO L240 hiAutomatonCegarLoop]: Abstraction has 51 states and 52 transitions. [2025-02-06 18:58:21,517 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2025-02-06 18:58:21,517 INFO L432 stractBuchiCegarLoop]: Abstraction has 51 states and 52 transitions. [2025-02-06 18:58:21,517 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-02-06 18:58:21,517 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 51 states and 52 transitions. [2025-02-06 18:58:21,518 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 18:58:21,518 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 18:58:21,518 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 18:58:21,519 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [46, 1, 1, 1] [2025-02-06 18:58:21,519 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 18:58:21,519 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~post1#1, main_~i~0#1, main_#t~mem2#1, main_#t~mem3#1, main_~#a~0#1.base, main_~#a~0#1.offset;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume !(main_~i~0#1 < 1048);havoc main_~i~0#1;" [2025-02-06 18:58:21,519 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem2#1 := read~int#0(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);" "assume main_#t~mem2#1 >= 0;havoc main_#t~mem2#1;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);call write~int#0(main_#t~mem3#1 - 1, main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);havoc main_#t~mem3#1;" [2025-02-06 18:58:21,519 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 18:58:21,519 INFO L85 PathProgramCache]: Analyzing trace with hash -806331638, now seen corresponding path program 5 times [2025-02-06 18:58:21,519 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 18:58:21,519 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [829276833] [2025-02-06 18:58:21,520 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-06 18:58:21,520 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 18:58:21,547 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 49 statements into 24 equivalence classes. [2025-02-06 18:58:21,613 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) and asserted 49 of 49 statements. [2025-02-06 18:58:21,613 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) [2025-02-06 18:58:21,613 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 18:58:22,971 INFO L134 CoverageAnalysis]: Checked inductivity of 1081 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 18:58:22,972 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 18:58:22,972 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [829276833] [2025-02-06 18:58:22,972 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [829276833] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 18:58:22,972 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1028307858] [2025-02-06 18:58:22,972 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-06 18:58:22,972 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 18:58:22,972 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 18:58:22,978 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 18:58:22,979 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2025-02-06 18:58:23,038 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 49 statements into 24 equivalence classes. [2025-02-06 18:59:16,856 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) and asserted 49 of 49 statements. [2025-02-06 18:59:16,857 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 24 check-sat command(s) [2025-02-06 18:59:16,857 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 18:59:16,887 INFO L256 TraceCheckSpWp]: Trace formula consists of 526 conjuncts, 48 conjuncts are in the unsatisfiable core [2025-02-06 18:59:16,889 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 18:59:16,983 INFO L134 CoverageAnalysis]: Checked inductivity of 1081 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 18:59:16,983 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 18:59:19,067 INFO L134 CoverageAnalysis]: Checked inductivity of 1081 backedges. 0 proven. 1081 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 18:59:19,067 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1028307858] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 18:59:19,067 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 18:59:19,067 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 48, 48] total 95 [2025-02-06 18:59:19,068 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [677544875] [2025-02-06 18:59:19,068 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 18:59:19,069 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 18:59:19,069 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 18:59:19,069 INFO L85 PathProgramCache]: Analyzing trace with hash 1216, now seen corresponding path program 6 times [2025-02-06 18:59:19,069 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 18:59:19,069 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1075591966] [2025-02-06 18:59:19,069 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-06 18:59:19,069 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 18:59:19,076 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-02-06 18:59:19,077 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 18:59:19,077 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-02-06 18:59:19,077 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 18:59:19,077 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 18:59:19,078 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 18:59:19,078 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 18:59:19,078 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 18:59:19,078 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 18:59:19,081 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 18:59:19,107 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 18:59:19,109 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 96 interpolants. [2025-02-06 18:59:19,112 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=4560, Invalid=4560, Unknown=0, NotChecked=0, Total=9120 [2025-02-06 18:59:19,112 INFO L87 Difference]: Start difference. First operand 51 states and 52 transitions. cyclomatic complexity: 3 Second operand has 96 states, 95 states have (on average 1.0210526315789474) internal successors, (97), 96 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 18:59:19,228 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 18:59:19,228 INFO L93 Difference]: Finished difference Result 99 states and 100 transitions. [2025-02-06 18:59:19,228 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 99 states and 100 transitions. [2025-02-06 18:59:19,229 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 18:59:19,230 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 99 states to 99 states and 100 transitions. [2025-02-06 18:59:19,230 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5 [2025-02-06 18:59:19,230 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 5 [2025-02-06 18:59:19,230 INFO L73 IsDeterministic]: Start isDeterministic. Operand 99 states and 100 transitions. [2025-02-06 18:59:19,231 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 18:59:19,231 INFO L218 hiAutomatonCegarLoop]: Abstraction has 99 states and 100 transitions. [2025-02-06 18:59:19,231 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states and 100 transitions. [2025-02-06 18:59:19,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 99. [2025-02-06 18:59:19,233 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 99 states, 99 states have (on average 1.0101010101010102) internal successors, (100), 98 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 18:59:19,233 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 99 states to 99 states and 100 transitions. [2025-02-06 18:59:19,234 INFO L240 hiAutomatonCegarLoop]: Abstraction has 99 states and 100 transitions. [2025-02-06 18:59:19,236 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2025-02-06 18:59:19,236 INFO L432 stractBuchiCegarLoop]: Abstraction has 99 states and 100 transitions. [2025-02-06 18:59:19,237 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-02-06 18:59:19,237 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 99 states and 100 transitions. [2025-02-06 18:59:19,238 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 18:59:19,239 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 18:59:19,239 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 18:59:19,241 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [94, 1, 1, 1] [2025-02-06 18:59:19,243 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 18:59:19,243 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet0#1, main_#t~post1#1, main_~i~0#1, main_#t~mem2#1, main_#t~mem3#1, main_~#a~0#1.base, main_~#a~0#1.offset;call main_~#a~0#1.base, main_~#a~0#1.offset := #Ultimate.allocOnStack(4192);main_~i~0#1 := 0;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume main_~i~0#1 < 1048;havoc main_#t~nondet0#1;call write~int#0(main_#t~nondet0#1, main_~#a~0#1.base, main_~#a~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet0#1;main_#t~post1#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post1#1;havoc main_#t~post1#1;" "assume !(main_~i~0#1 < 1048);havoc main_~i~0#1;" [2025-02-06 18:59:19,243 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem2#1 := read~int#0(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);" "assume main_#t~mem2#1 >= 0;havoc main_#t~mem2#1;call main_#t~mem3#1 := read~int#0(main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);call write~int#0(main_#t~mem3#1 - 1, main_~#a~0#1.base, 12 + main_~#a~0#1.offset, 4);havoc main_#t~mem3#1;" [2025-02-06 18:59:19,243 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 18:59:19,244 INFO L85 PathProgramCache]: Analyzing trace with hash -1088996854, now seen corresponding path program 6 times [2025-02-06 18:59:19,244 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 18:59:19,244 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [595719662] [2025-02-06 18:59:19,244 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-06 18:59:19,244 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 18:59:19,284 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 97 statements into 48 equivalence classes. [2025-02-06 18:59:19,403 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 48 check-sat command(s) and asserted 97 of 97 statements. [2025-02-06 18:59:19,403 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 48 check-sat command(s) [2025-02-06 18:59:19,403 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 18:59:23,834 INFO L134 CoverageAnalysis]: Checked inductivity of 4465 backedges. 0 proven. 4465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 18:59:23,835 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 18:59:23,835 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [595719662] [2025-02-06 18:59:23,835 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [595719662] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 18:59:23,835 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1991578319] [2025-02-06 18:59:23,835 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-06 18:59:23,835 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 18:59:23,835 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 18:59:23,838 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 18:59:23,839 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2025-02-06 18:59:23,959 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 97 statements into 48 equivalence classes.