./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/termination-15/array13_alloca.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version c00e63dc Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/termination-15/array13_alloca.i -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash bcb4bc0abad87560c498c61782d3ccf631503b41762d0db8553a6c831cbdcaff --- Real Ultimate output --- This is Ultimate 0.3.0-?-c00e63d-m [2025-02-06 19:07:23,894 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-02-06 19:07:23,929 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf [2025-02-06 19:07:23,934 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-02-06 19:07:23,934 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-02-06 19:07:23,934 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-02-06 19:07:23,948 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-02-06 19:07:23,948 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-02-06 19:07:23,948 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-02-06 19:07:23,949 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-02-06 19:07:23,949 INFO L153 SettingsManager]: * Use memory slicer=true [2025-02-06 19:07:23,949 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-02-06 19:07:23,949 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-02-06 19:07:23,949 INFO L153 SettingsManager]: * Use SBE=true [2025-02-06 19:07:23,949 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-02-06 19:07:23,949 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-02-06 19:07:23,949 INFO L153 SettingsManager]: * Use old map elimination=false [2025-02-06 19:07:23,949 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-02-06 19:07:23,950 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-02-06 19:07:23,950 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-02-06 19:07:23,950 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-02-06 19:07:23,950 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-02-06 19:07:23,950 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-02-06 19:07:23,950 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-02-06 19:07:23,950 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-02-06 19:07:23,950 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-02-06 19:07:23,950 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-02-06 19:07:23,950 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-02-06 19:07:23,950 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-02-06 19:07:23,950 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-02-06 19:07:23,951 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-02-06 19:07:23,951 INFO L153 SettingsManager]: * Use constant arrays=true [2025-02-06 19:07:23,951 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-02-06 19:07:23,951 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-02-06 19:07:23,951 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-02-06 19:07:23,951 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-02-06 19:07:23,951 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-02-06 19:07:23,951 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> bcb4bc0abad87560c498c61782d3ccf631503b41762d0db8553a6c831cbdcaff [2025-02-06 19:07:24,158 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-02-06 19:07:24,162 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-02-06 19:07:24,164 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-02-06 19:07:24,164 INFO L270 PluginConnector]: Initializing CDTParser... [2025-02-06 19:07:24,165 INFO L274 PluginConnector]: CDTParser initialized [2025-02-06 19:07:24,165 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/termination-15/array13_alloca.i [2025-02-06 19:07:25,307 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/e4d2fb12b/abcbf176b642448ba010c2c5bc20853a/FLAGd7aca3163 [2025-02-06 19:07:25,615 INFO L384 CDTParser]: Found 1 translation units. [2025-02-06 19:07:25,615 INFO L180 CDTParser]: Scanning /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/termination-15/array13_alloca.i [2025-02-06 19:07:25,629 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/e4d2fb12b/abcbf176b642448ba010c2c5bc20853a/FLAGd7aca3163 [2025-02-06 19:07:25,879 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/e4d2fb12b/abcbf176b642448ba010c2c5bc20853a [2025-02-06 19:07:25,881 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-02-06 19:07:25,882 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-02-06 19:07:25,883 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-02-06 19:07:25,883 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-02-06 19:07:25,885 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-02-06 19:07:25,886 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.02 07:07:25" (1/1) ... [2025-02-06 19:07:25,886 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4d31078c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:07:25, skipping insertion in model container [2025-02-06 19:07:25,887 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.02 07:07:25" (1/1) ... [2025-02-06 19:07:25,900 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-02-06 19:07:26,040 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-06 19:07:26,050 INFO L200 MainTranslator]: Completed pre-run [2025-02-06 19:07:26,095 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-06 19:07:26,119 INFO L204 MainTranslator]: Completed translation [2025-02-06 19:07:26,119 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:07:26 WrapperNode [2025-02-06 19:07:26,120 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-02-06 19:07:26,121 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-02-06 19:07:26,121 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-02-06 19:07:26,121 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-02-06 19:07:26,125 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:07:26" (1/1) ... [2025-02-06 19:07:26,135 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:07:26" (1/1) ... [2025-02-06 19:07:26,149 INFO L138 Inliner]: procedures = 151, calls = 10, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 49 [2025-02-06 19:07:26,150 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-02-06 19:07:26,151 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-02-06 19:07:26,151 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-02-06 19:07:26,151 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-02-06 19:07:26,157 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:07:26" (1/1) ... [2025-02-06 19:07:26,157 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:07:26" (1/1) ... [2025-02-06 19:07:26,158 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:07:26" (1/1) ... [2025-02-06 19:07:26,166 INFO L175 MemorySlicer]: Split 4 memory accesses to 1 slices as follows [4]. 100 percent of accesses are in the largest equivalence class. The 0 initializations are split as follows [0]. The 2 writes are split as follows [2]. [2025-02-06 19:07:26,166 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:07:26" (1/1) ... [2025-02-06 19:07:26,166 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:07:26" (1/1) ... [2025-02-06 19:07:26,172 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:07:26" (1/1) ... [2025-02-06 19:07:26,173 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:07:26" (1/1) ... [2025-02-06 19:07:26,173 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:07:26" (1/1) ... [2025-02-06 19:07:26,174 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:07:26" (1/1) ... [2025-02-06 19:07:26,174 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-02-06 19:07:26,177 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-02-06 19:07:26,177 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-02-06 19:07:26,177 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-02-06 19:07:26,178 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:07:26" (1/1) ... [2025-02-06 19:07:26,186 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:07:26,200 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:26,214 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:07:26,220 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-02-06 19:07:26,233 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2025-02-06 19:07:26,234 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2025-02-06 19:07:26,234 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2025-02-06 19:07:26,234 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2025-02-06 19:07:26,234 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-02-06 19:07:26,234 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-02-06 19:07:26,279 INFO L257 CfgBuilder]: Building ICFG [2025-02-06 19:07:26,281 INFO L287 CfgBuilder]: Building CFG for each procedure with an implementation [2025-02-06 19:07:26,375 INFO L1309 $ProcedureCfgBuilder]: dead code at ProgramPoint L368: call ULTIMATE.dealloc(main_#t~malloc206#1.base, main_#t~malloc206#1.offset);havoc main_#t~malloc206#1.base, main_#t~malloc206#1.offset; [2025-02-06 19:07:26,379 INFO L? ?]: Removed 8 outVars from TransFormulas that were not future-live. [2025-02-06 19:07:26,380 INFO L308 CfgBuilder]: Performing block encoding [2025-02-06 19:07:26,389 INFO L332 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-02-06 19:07:26,389 INFO L337 CfgBuilder]: Removed 0 assume(true) statements. [2025-02-06 19:07:26,389 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 06.02 07:07:26 BoogieIcfgContainer [2025-02-06 19:07:26,389 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-02-06 19:07:26,390 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-02-06 19:07:26,390 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-02-06 19:07:26,395 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-02-06 19:07:26,395 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-06 19:07:26,396 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 06.02 07:07:25" (1/3) ... [2025-02-06 19:07:26,397 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@25db00c2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.02 07:07:26, skipping insertion in model container [2025-02-06 19:07:26,397 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-06 19:07:26,397 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:07:26" (2/3) ... [2025-02-06 19:07:26,398 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@25db00c2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.02 07:07:26, skipping insertion in model container [2025-02-06 19:07:26,398 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-06 19:07:26,398 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 06.02 07:07:26" (3/3) ... [2025-02-06 19:07:26,400 INFO L363 chiAutomizerObserver]: Analyzing ICFG array13_alloca.i [2025-02-06 19:07:26,435 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-02-06 19:07:26,435 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-02-06 19:07:26,435 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-02-06 19:07:26,435 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-02-06 19:07:26,435 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-02-06 19:07:26,436 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-02-06 19:07:26,436 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-02-06 19:07:26,436 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-02-06 19:07:26,440 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 13 states, 12 states have (on average 1.5) internal successors, (18), 12 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:26,453 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2025-02-06 19:07:26,454 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:26,454 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:26,459 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1] [2025-02-06 19:07:26,459 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2025-02-06 19:07:26,459 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-02-06 19:07:26,459 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 13 states, 12 states have (on average 1.5) internal successors, (18), 12 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:26,460 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2025-02-06 19:07:26,460 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:26,460 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:26,460 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1] [2025-02-06 19:07:26,460 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2025-02-06 19:07:26,464 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" [2025-02-06 19:07:26,464 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume main_#t~mem208#1 > 0;havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" [2025-02-06 19:07:26,468 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:26,468 INFO L85 PathProgramCache]: Analyzing trace with hash 48637714, now seen corresponding path program 1 times [2025-02-06 19:07:26,474 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:26,474 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [330120756] [2025-02-06 19:07:26,474 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:26,475 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:26,523 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 5 statements into 1 equivalence classes. [2025-02-06 19:07:26,539 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 5 of 5 statements. [2025-02-06 19:07:26,539 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:26,540 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:26,540 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:26,543 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 5 statements into 1 equivalence classes. [2025-02-06 19:07:26,547 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 5 of 5 statements. [2025-02-06 19:07:26,547 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:26,547 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:26,558 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:26,560 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:26,561 INFO L85 PathProgramCache]: Analyzing trace with hash 40649, now seen corresponding path program 1 times [2025-02-06 19:07:26,561 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:26,561 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [835173754] [2025-02-06 19:07:26,561 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:26,561 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:26,567 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-02-06 19:07:26,571 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-02-06 19:07:26,571 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:26,571 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:26,571 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:26,573 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-02-06 19:07:26,578 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-02-06 19:07:26,578 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:26,578 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:26,580 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:26,581 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:26,581 INFO L85 PathProgramCache]: Analyzing trace with hash 1562169880, now seen corresponding path program 1 times [2025-02-06 19:07:26,581 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:26,581 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [148297488] [2025-02-06 19:07:26,581 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:26,581 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:26,587 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 8 statements into 1 equivalence classes. [2025-02-06 19:07:26,596 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-02-06 19:07:26,596 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:26,596 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:26,596 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:26,599 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 8 statements into 1 equivalence classes. [2025-02-06 19:07:26,609 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-02-06 19:07:26,609 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:26,609 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:26,611 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:26,835 INFO L204 LassoAnalysis]: Preferences: [2025-02-06 19:07:26,836 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-02-06 19:07:26,836 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-02-06 19:07:26,837 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-02-06 19:07:26,838 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2025-02-06 19:07:26,839 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:07:26,839 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-02-06 19:07:26,839 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-02-06 19:07:26,839 INFO L132 ssoRankerPreferences]: Filename of dumped script: array13_alloca.i_Iteration1_Lasso [2025-02-06 19:07:26,839 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-02-06 19:07:26,839 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-02-06 19:07:26,849 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:26,856 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:26,982 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:26,985 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:26,987 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:26,988 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:26,990 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:26,992 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:26,994 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:26,996 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:26,998 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:27,174 INFO L259 LassoAnalysis]: Preprocessing complete. [2025-02-06 19:07:27,176 INFO L451 LassoAnalysis]: Using template 'affine'. [2025-02-06 19:07:27,178 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:07:27,178 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:27,180 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:07:27,181 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2025-02-06 19:07:27,183 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:07:27,195 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:07:27,195 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-02-06 19:07:27,196 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:07:27,196 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 19:07:27,196 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:07:27,199 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-02-06 19:07:27,199 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-02-06 19:07:27,202 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 19:07:27,210 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Ended with exit code 0 [2025-02-06 19:07:27,210 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:07:27,210 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:27,217 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:07:27,225 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:07:27,229 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2025-02-06 19:07:27,236 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:07:27,236 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:07:27,236 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 19:07:27,236 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:07:27,239 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-02-06 19:07:27,239 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-02-06 19:07:27,242 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 19:07:27,251 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2025-02-06 19:07:27,251 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:07:27,252 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:27,256 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:07:27,258 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2025-02-06 19:07:27,259 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:07:27,270 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:07:27,270 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:07:27,270 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 19:07:27,270 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:07:27,277 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-02-06 19:07:27,277 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-02-06 19:07:27,286 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2025-02-06 19:07:27,310 INFO L443 ModelExtractionUtils]: Simplification made 12 calls to the SMT solver. [2025-02-06 19:07:27,312 INFO L444 ModelExtractionUtils]: 3 out of 19 variables were initially zero. Simplification set additionally 12 variables to zero. [2025-02-06 19:07:27,313 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:07:27,313 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:27,319 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:07:27,323 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2025-02-06 19:07:27,323 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2025-02-06 19:07:27,337 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2025-02-06 19:07:27,337 INFO L474 LassoAnalysis]: Proved termination. [2025-02-06 19:07:27,337 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~arr~0#1.offset, v_rep(select #length ULTIMATE.start_main_~arr~0#1.base)_1, ULTIMATE.start_main_~i~0#1) = -1*ULTIMATE.start_main_~arr~0#1.offset + 1*v_rep(select #length ULTIMATE.start_main_~arr~0#1.base)_1 - 4*ULTIMATE.start_main_~i~0#1 Supporting invariants [] [2025-02-06 19:07:27,346 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2025-02-06 19:07:27,354 INFO L156 tatePredicateManager]: 3 out of 3 supporting invariants were superfluous and have been removed [2025-02-06 19:07:27,360 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #length [2025-02-06 19:07:27,361 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#length,GLOBAL] [2025-02-06 19:07:27,361 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: ~arr~0!offset [2025-02-06 19:07:27,373 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:27,380 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 5 statements into 1 equivalence classes. [2025-02-06 19:07:27,383 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 5 of 5 statements. [2025-02-06 19:07:27,383 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:27,383 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:27,384 INFO L256 TraceCheckSpWp]: Trace formula consists of 26 conjuncts, 2 conjuncts are in the unsatisfiable core [2025-02-06 19:07:27,385 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:27,395 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-02-06 19:07:27,398 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-02-06 19:07:27,398 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:27,398 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:27,399 INFO L256 TraceCheckSpWp]: Trace formula consists of 24 conjuncts, 4 conjuncts are in the unsatisfiable core [2025-02-06 19:07:27,399 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:27,418 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:27,435 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2025-02-06 19:07:27,436 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 13 states, 12 states have (on average 1.5) internal successors, (18), 12 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 3 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:27,466 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 13 states, 12 states have (on average 1.5) internal successors, (18), 12 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 3 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 20 states and 28 transitions. Complement of second has 5 states. [2025-02-06 19:07:27,467 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2025-02-06 19:07:27,470 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 3 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:27,472 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 13 transitions. [2025-02-06 19:07:27,474 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 13 transitions. Stem has 5 letters. Loop has 3 letters. [2025-02-06 19:07:27,474 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-02-06 19:07:27,474 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 13 transitions. Stem has 8 letters. Loop has 3 letters. [2025-02-06 19:07:27,474 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-02-06 19:07:27,475 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 13 transitions. Stem has 5 letters. Loop has 6 letters. [2025-02-06 19:07:27,475 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-02-06 19:07:27,475 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 20 states and 28 transitions. [2025-02-06 19:07:27,476 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:27,477 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 20 states to 12 states and 17 transitions. [2025-02-06 19:07:27,478 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2025-02-06 19:07:27,478 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9 [2025-02-06 19:07:27,478 INFO L73 IsDeterministic]: Start isDeterministic. Operand 12 states and 17 transitions. [2025-02-06 19:07:27,478 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:07:27,478 INFO L218 hiAutomatonCegarLoop]: Abstraction has 12 states and 17 transitions. [2025-02-06 19:07:27,486 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12 states and 17 transitions. [2025-02-06 19:07:27,494 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12 to 11. [2025-02-06 19:07:27,494 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 11 states have (on average 1.4545454545454546) internal successors, (16), 10 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:27,494 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 16 transitions. [2025-02-06 19:07:27,495 INFO L240 hiAutomatonCegarLoop]: Abstraction has 11 states and 16 transitions. [2025-02-06 19:07:27,495 INFO L432 stractBuchiCegarLoop]: Abstraction has 11 states and 16 transitions. [2025-02-06 19:07:27,495 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-02-06 19:07:27,495 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 11 states and 16 transitions. [2025-02-06 19:07:27,495 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:27,495 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:27,495 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:27,496 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2025-02-06 19:07:27,496 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 19:07:27,496 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" [2025-02-06 19:07:27,496 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-02-06 19:07:27,497 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:27,497 INFO L85 PathProgramCache]: Analyzing trace with hash 1507769141, now seen corresponding path program 1 times [2025-02-06 19:07:27,497 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:27,497 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1730403650] [2025-02-06 19:07:27,497 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:27,497 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:27,500 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 6 statements into 1 equivalence classes. [2025-02-06 19:07:27,504 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 6 of 6 statements. [2025-02-06 19:07:27,504 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:27,504 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:27,549 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:27,550 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:07:27,550 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1730403650] [2025-02-06 19:07:27,550 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1730403650] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:07:27,550 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:07:27,551 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:07:27,551 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [965579846] [2025-02-06 19:07:27,551 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:07:27,553 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:07:27,553 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:27,553 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 1 times [2025-02-06 19:07:27,553 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:27,553 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1250782619] [2025-02-06 19:07:27,553 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:27,554 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:27,556 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:27,559 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:27,559 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:27,559 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:27,559 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:27,560 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:27,562 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:27,562 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:27,562 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:27,563 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:27,605 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:07:27,606 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-06 19:07:27,607 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2025-02-06 19:07:27,608 INFO L87 Difference]: Start difference. First operand 11 states and 16 transitions. cyclomatic complexity: 7 Second operand has 4 states, 3 states have (on average 2.0) internal successors, (6), 4 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:27,628 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:07:27,629 INFO L93 Difference]: Finished difference Result 13 states and 18 transitions. [2025-02-06 19:07:27,629 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 13 states and 18 transitions. [2025-02-06 19:07:27,630 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:27,630 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 13 states to 13 states and 18 transitions. [2025-02-06 19:07:27,630 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2025-02-06 19:07:27,630 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2025-02-06 19:07:27,630 INFO L73 IsDeterministic]: Start isDeterministic. Operand 13 states and 18 transitions. [2025-02-06 19:07:27,630 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:07:27,630 INFO L218 hiAutomatonCegarLoop]: Abstraction has 13 states and 18 transitions. [2025-02-06 19:07:27,631 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states and 18 transitions. [2025-02-06 19:07:27,631 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 11. [2025-02-06 19:07:27,631 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 10 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:27,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 15 transitions. [2025-02-06 19:07:27,631 INFO L240 hiAutomatonCegarLoop]: Abstraction has 11 states and 15 transitions. [2025-02-06 19:07:27,632 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-06 19:07:27,632 INFO L432 stractBuchiCegarLoop]: Abstraction has 11 states and 15 transitions. [2025-02-06 19:07:27,633 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-02-06 19:07:27,633 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 11 states and 15 transitions. [2025-02-06 19:07:27,633 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:27,633 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:27,633 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:27,633 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:07:27,633 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 19:07:27,634 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" [2025-02-06 19:07:27,634 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-02-06 19:07:27,634 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:27,634 INFO L85 PathProgramCache]: Analyzing trace with hash 1182626992, now seen corresponding path program 1 times [2025-02-06 19:07:27,634 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:27,634 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1122519930] [2025-02-06 19:07:27,634 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:27,635 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:27,638 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 9 statements into 1 equivalence classes. [2025-02-06 19:07:27,644 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 9 of 9 statements. [2025-02-06 19:07:27,644 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:27,644 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:27,644 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:27,646 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 9 statements into 1 equivalence classes. [2025-02-06 19:07:27,650 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 9 of 9 statements. [2025-02-06 19:07:27,650 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:27,650 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:27,652 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:27,652 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:27,653 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 2 times [2025-02-06 19:07:27,653 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:27,653 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1628015970] [2025-02-06 19:07:27,653 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:07:27,653 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:27,656 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:27,658 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:27,658 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:07:27,658 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:27,658 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:27,659 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:27,660 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:27,660 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:27,661 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:27,662 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:27,662 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:27,662 INFO L85 PathProgramCache]: Analyzing trace with hash -1661793938, now seen corresponding path program 1 times [2025-02-06 19:07:27,662 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:27,662 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [775311712] [2025-02-06 19:07:27,662 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:27,663 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:27,667 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 11 statements into 1 equivalence classes. [2025-02-06 19:07:27,674 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 11 of 11 statements. [2025-02-06 19:07:27,674 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:27,674 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:27,811 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Ended with exit code 0 [2025-02-06 19:07:27,911 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:27,912 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:07:27,912 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [775311712] [2025-02-06 19:07:27,912 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [775311712] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:07:27,912 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1941317271] [2025-02-06 19:07:27,912 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:27,912 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:27,912 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:27,914 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:27,918 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2025-02-06 19:07:27,942 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 11 statements into 1 equivalence classes. [2025-02-06 19:07:27,949 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 11 of 11 statements. [2025-02-06 19:07:27,949 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:27,949 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:27,949 INFO L256 TraceCheckSpWp]: Trace formula consists of 54 conjuncts, 10 conjuncts are in the unsatisfiable core [2025-02-06 19:07:27,950 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:27,973 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-02-06 19:07:28,025 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2025-02-06 19:07:28,036 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:28,036 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:07:28,094 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 12 [2025-02-06 19:07:28,097 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2025-02-06 19:07:28,099 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:28,100 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1941317271] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:07:28,100 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:07:28,100 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 6, 6] total 15 [2025-02-06 19:07:28,100 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [288820090] [2025-02-06 19:07:28,100 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:07:28,133 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:07:28,133 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2025-02-06 19:07:28,133 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=183, Unknown=0, NotChecked=0, Total=240 [2025-02-06 19:07:28,134 INFO L87 Difference]: Start difference. First operand 11 states and 15 transitions. cyclomatic complexity: 6 Second operand has 16 states, 15 states have (on average 1.5333333333333334) internal successors, (23), 16 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:28,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:07:28,206 INFO L93 Difference]: Finished difference Result 20 states and 28 transitions. [2025-02-06 19:07:28,206 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 20 states and 28 transitions. [2025-02-06 19:07:28,207 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2025-02-06 19:07:28,207 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 20 states to 20 states and 28 transitions. [2025-02-06 19:07:28,207 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2025-02-06 19:07:28,207 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2025-02-06 19:07:28,207 INFO L73 IsDeterministic]: Start isDeterministic. Operand 20 states and 28 transitions. [2025-02-06 19:07:28,207 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:07:28,207 INFO L218 hiAutomatonCegarLoop]: Abstraction has 20 states and 28 transitions. [2025-02-06 19:07:28,208 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states and 28 transitions. [2025-02-06 19:07:28,208 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 17. [2025-02-06 19:07:28,208 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.411764705882353) internal successors, (24), 16 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:28,209 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 24 transitions. [2025-02-06 19:07:28,209 INFO L240 hiAutomatonCegarLoop]: Abstraction has 17 states and 24 transitions. [2025-02-06 19:07:28,209 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-02-06 19:07:28,209 INFO L432 stractBuchiCegarLoop]: Abstraction has 17 states and 24 transitions. [2025-02-06 19:07:28,209 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-02-06 19:07:28,209 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 17 states and 24 transitions. [2025-02-06 19:07:28,210 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:28,210 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:28,210 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:28,210 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:07:28,210 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 19:07:28,210 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" [2025-02-06 19:07:28,210 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-02-06 19:07:28,210 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:28,210 INFO L85 PathProgramCache]: Analyzing trace with hash -1661793937, now seen corresponding path program 1 times [2025-02-06 19:07:28,210 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:28,210 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1038497462] [2025-02-06 19:07:28,210 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:28,210 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:28,214 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 11 statements into 1 equivalence classes. [2025-02-06 19:07:28,218 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 11 of 11 statements. [2025-02-06 19:07:28,218 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:28,218 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:28,218 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:28,219 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 11 statements into 1 equivalence classes. [2025-02-06 19:07:28,222 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 11 of 11 statements. [2025-02-06 19:07:28,222 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:28,222 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:28,224 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:28,224 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:28,224 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 3 times [2025-02-06 19:07:28,224 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:28,224 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [537790492] [2025-02-06 19:07:28,224 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:07:28,224 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:28,229 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:28,230 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:28,230 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-06 19:07:28,230 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:28,230 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:28,231 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:28,232 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:28,232 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:28,233 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:28,233 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:28,234 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:28,238 INFO L85 PathProgramCache]: Analyzing trace with hash 743860845, now seen corresponding path program 1 times [2025-02-06 19:07:28,238 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:28,238 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [841380668] [2025-02-06 19:07:28,238 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:28,238 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:28,245 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 13 statements into 1 equivalence classes. [2025-02-06 19:07:28,256 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 13 of 13 statements. [2025-02-06 19:07:28,256 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:28,256 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:28,313 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:28,313 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:07:28,313 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [841380668] [2025-02-06 19:07:28,313 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [841380668] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:07:28,313 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2048259054] [2025-02-06 19:07:28,313 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:28,313 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:28,313 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:28,315 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:28,319 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2025-02-06 19:07:28,342 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 13 statements into 1 equivalence classes. [2025-02-06 19:07:28,348 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 13 of 13 statements. [2025-02-06 19:07:28,349 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:28,349 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:28,349 INFO L256 TraceCheckSpWp]: Trace formula consists of 65 conjuncts, 6 conjuncts are in the unsatisfiable core [2025-02-06 19:07:28,349 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:28,383 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:28,383 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:07:28,419 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:28,420 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2048259054] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:07:28,420 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:07:28,420 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 10 [2025-02-06 19:07:28,420 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [257290297] [2025-02-06 19:07:28,420 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:07:28,477 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:07:28,477 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-02-06 19:07:28,477 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2025-02-06 19:07:28,477 INFO L87 Difference]: Start difference. First operand 17 states and 24 transitions. cyclomatic complexity: 10 Second operand has 10 states, 10 states have (on average 2.4) internal successors, (24), 10 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:28,521 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:07:28,521 INFO L93 Difference]: Finished difference Result 25 states and 33 transitions. [2025-02-06 19:07:28,521 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 25 states and 33 transitions. [2025-02-06 19:07:28,522 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:28,522 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 25 states to 22 states and 30 transitions. [2025-02-06 19:07:28,522 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2025-02-06 19:07:28,522 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2025-02-06 19:07:28,522 INFO L73 IsDeterministic]: Start isDeterministic. Operand 22 states and 30 transitions. [2025-02-06 19:07:28,522 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:07:28,522 INFO L218 hiAutomatonCegarLoop]: Abstraction has 22 states and 30 transitions. [2025-02-06 19:07:28,522 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states and 30 transitions. [2025-02-06 19:07:28,523 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 19. [2025-02-06 19:07:28,524 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.368421052631579) internal successors, (26), 18 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:28,525 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 26 transitions. [2025-02-06 19:07:28,525 INFO L240 hiAutomatonCegarLoop]: Abstraction has 19 states and 26 transitions. [2025-02-06 19:07:28,526 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-06 19:07:28,526 INFO L432 stractBuchiCegarLoop]: Abstraction has 19 states and 26 transitions. [2025-02-06 19:07:28,526 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-02-06 19:07:28,526 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 19 states and 26 transitions. [2025-02-06 19:07:28,527 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:28,527 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:28,527 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:28,527 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:07:28,527 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 19:07:28,527 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume main_#t~mem208#1 > 0;havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" [2025-02-06 19:07:28,527 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-02-06 19:07:28,527 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:28,527 INFO L85 PathProgramCache]: Analyzing trace with hash 24117652, now seen corresponding path program 1 times [2025-02-06 19:07:28,527 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:28,527 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1606325637] [2025-02-06 19:07:28,527 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:28,527 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:28,531 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 12 statements into 1 equivalence classes. [2025-02-06 19:07:28,535 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 12 of 12 statements. [2025-02-06 19:07:28,535 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:28,535 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:28,535 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:28,536 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 12 statements into 1 equivalence classes. [2025-02-06 19:07:28,539 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 12 of 12 statements. [2025-02-06 19:07:28,539 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:28,539 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:28,541 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:28,541 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:28,541 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 4 times [2025-02-06 19:07:28,541 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:28,541 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [456001830] [2025-02-06 19:07:28,541 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 19:07:28,542 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:28,548 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-02-06 19:07:28,549 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:28,549 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-06 19:07:28,549 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:28,549 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:28,549 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:28,550 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:28,550 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:28,550 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:28,552 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:28,553 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:28,553 INFO L85 PathProgramCache]: Analyzing trace with hash 1702227282, now seen corresponding path program 1 times [2025-02-06 19:07:28,553 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:28,553 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1479997064] [2025-02-06 19:07:28,553 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:28,553 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:28,558 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 14 statements into 1 equivalence classes. [2025-02-06 19:07:28,581 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 14 of 14 statements. [2025-02-06 19:07:28,581 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:28,581 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:28,817 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:28,817 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:07:28,817 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1479997064] [2025-02-06 19:07:28,817 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1479997064] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:07:28,817 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1485307742] [2025-02-06 19:07:28,817 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:28,818 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:28,818 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:28,819 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:28,821 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2025-02-06 19:07:28,851 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 14 statements into 1 equivalence classes. [2025-02-06 19:07:28,859 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 14 of 14 statements. [2025-02-06 19:07:28,859 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:28,859 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:28,860 INFO L256 TraceCheckSpWp]: Trace formula consists of 76 conjuncts, 15 conjuncts are in the unsatisfiable core [2025-02-06 19:07:28,862 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:28,875 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-02-06 19:07:28,914 INFO L349 Elim1Store]: treesize reduction 25, result has 21.9 percent of original size [2025-02-06 19:07:28,914 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 31 treesize of output 11 [2025-02-06 19:07:28,929 INFO L349 Elim1Store]: treesize reduction 25, result has 21.9 percent of original size [2025-02-06 19:07:28,929 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 31 treesize of output 11 [2025-02-06 19:07:28,951 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2025-02-06 19:07:28,959 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:28,960 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:07:29,133 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 19 [2025-02-06 19:07:29,140 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 42 [2025-02-06 19:07:29,177 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:29,177 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1485307742] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:07:29,177 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:07:29,177 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 8] total 20 [2025-02-06 19:07:29,177 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [210374209] [2025-02-06 19:07:29,178 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:07:29,241 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:07:29,242 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2025-02-06 19:07:29,242 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=81, Invalid=339, Unknown=0, NotChecked=0, Total=420 [2025-02-06 19:07:29,242 INFO L87 Difference]: Start difference. First operand 19 states and 26 transitions. cyclomatic complexity: 10 Second operand has 21 states, 20 states have (on average 1.6) internal successors, (32), 21 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:29,380 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:07:29,380 INFO L93 Difference]: Finished difference Result 21 states and 28 transitions. [2025-02-06 19:07:29,380 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 21 states and 28 transitions. [2025-02-06 19:07:29,381 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:29,381 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 21 states to 21 states and 28 transitions. [2025-02-06 19:07:29,381 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2025-02-06 19:07:29,381 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2025-02-06 19:07:29,381 INFO L73 IsDeterministic]: Start isDeterministic. Operand 21 states and 28 transitions. [2025-02-06 19:07:29,381 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:07:29,381 INFO L218 hiAutomatonCegarLoop]: Abstraction has 21 states and 28 transitions. [2025-02-06 19:07:29,382 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states and 28 transitions. [2025-02-06 19:07:29,382 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 16. [2025-02-06 19:07:29,382 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16 states, 16 states have (on average 1.3125) internal successors, (21), 15 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:29,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16 states to 16 states and 21 transitions. [2025-02-06 19:07:29,382 INFO L240 hiAutomatonCegarLoop]: Abstraction has 16 states and 21 transitions. [2025-02-06 19:07:29,385 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-02-06 19:07:29,385 INFO L432 stractBuchiCegarLoop]: Abstraction has 16 states and 21 transitions. [2025-02-06 19:07:29,385 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-02-06 19:07:29,385 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 16 states and 21 transitions. [2025-02-06 19:07:29,385 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:29,385 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:29,385 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:29,386 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:07:29,386 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 19:07:29,386 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" [2025-02-06 19:07:29,386 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-02-06 19:07:29,386 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:29,386 INFO L85 PathProgramCache]: Analyzing trace with hash 1703150804, now seen corresponding path program 2 times [2025-02-06 19:07:29,386 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:29,386 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1672420538] [2025-02-06 19:07:29,386 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:07:29,386 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:29,391 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 14 statements into 2 equivalence classes. [2025-02-06 19:07:29,397 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 14 of 14 statements. [2025-02-06 19:07:29,397 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-02-06 19:07:29,397 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:29,397 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:29,398 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 14 statements into 1 equivalence classes. [2025-02-06 19:07:29,403 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 14 of 14 statements. [2025-02-06 19:07:29,403 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:29,403 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:29,405 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:29,405 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:29,405 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 5 times [2025-02-06 19:07:29,405 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:29,406 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [689944297] [2025-02-06 19:07:29,406 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-06 19:07:29,406 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:29,407 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:29,408 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:29,408 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:07:29,408 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:29,408 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:29,408 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:29,412 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:29,412 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:29,413 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:29,413 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:29,413 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:29,413 INFO L85 PathProgramCache]: Analyzing trace with hash 345383058, now seen corresponding path program 2 times [2025-02-06 19:07:29,414 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:29,414 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [802714897] [2025-02-06 19:07:29,414 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:07:29,414 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:29,420 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 16 statements into 2 equivalence classes. [2025-02-06 19:07:29,429 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 16 of 16 statements. [2025-02-06 19:07:29,429 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-02-06 19:07:29,429 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:29,589 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:29,589 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:07:29,589 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [802714897] [2025-02-06 19:07:29,589 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [802714897] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:07:29,589 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [670623759] [2025-02-06 19:07:29,589 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:07:29,589 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:29,589 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:29,597 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:29,602 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2025-02-06 19:07:29,626 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 16 statements into 2 equivalence classes. [2025-02-06 19:07:29,635 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 16 of 16 statements. [2025-02-06 19:07:29,635 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-02-06 19:07:29,635 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:29,636 INFO L256 TraceCheckSpWp]: Trace formula consists of 79 conjuncts, 18 conjuncts are in the unsatisfiable core [2025-02-06 19:07:29,637 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:29,677 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-02-06 19:07:29,778 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2025-02-06 19:07:29,780 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:29,780 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:07:29,884 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2025-02-06 19:07:29,887 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 16 [2025-02-06 19:07:29,914 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:29,914 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [670623759] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:07:29,914 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:07:29,914 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 8] total 21 [2025-02-06 19:07:29,914 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1147128387] [2025-02-06 19:07:29,914 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:07:29,963 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:07:29,964 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2025-02-06 19:07:29,964 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=386, Unknown=0, NotChecked=0, Total=462 [2025-02-06 19:07:29,964 INFO L87 Difference]: Start difference. First operand 16 states and 21 transitions. cyclomatic complexity: 7 Second operand has 22 states, 21 states have (on average 1.7142857142857142) internal successors, (36), 22 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:30,241 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:07:30,242 INFO L93 Difference]: Finished difference Result 33 states and 44 transitions. [2025-02-06 19:07:30,242 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 33 states and 44 transitions. [2025-02-06 19:07:30,242 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2025-02-06 19:07:30,242 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 33 states to 33 states and 44 transitions. [2025-02-06 19:07:30,242 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18 [2025-02-06 19:07:30,243 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18 [2025-02-06 19:07:30,243 INFO L73 IsDeterministic]: Start isDeterministic. Operand 33 states and 44 transitions. [2025-02-06 19:07:30,243 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:07:30,243 INFO L218 hiAutomatonCegarLoop]: Abstraction has 33 states and 44 transitions. [2025-02-06 19:07:30,243 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states and 44 transitions. [2025-02-06 19:07:30,244 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 22. [2025-02-06 19:07:30,244 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.3636363636363635) internal successors, (30), 21 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:30,244 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 30 transitions. [2025-02-06 19:07:30,244 INFO L240 hiAutomatonCegarLoop]: Abstraction has 22 states and 30 transitions. [2025-02-06 19:07:30,246 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2025-02-06 19:07:30,246 INFO L432 stractBuchiCegarLoop]: Abstraction has 22 states and 30 transitions. [2025-02-06 19:07:30,246 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-02-06 19:07:30,246 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 22 states and 30 transitions. [2025-02-06 19:07:30,246 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:30,246 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:30,247 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:30,247 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2025-02-06 19:07:30,247 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 19:07:30,247 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" [2025-02-06 19:07:30,247 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-02-06 19:07:30,247 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:30,247 INFO L85 PathProgramCache]: Analyzing trace with hash 345383059, now seen corresponding path program 3 times [2025-02-06 19:07:30,247 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:30,247 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [604502615] [2025-02-06 19:07:30,247 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:07:30,247 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:30,252 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 16 statements into 3 equivalence classes. [2025-02-06 19:07:30,257 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) and asserted 16 of 16 statements. [2025-02-06 19:07:30,257 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2025-02-06 19:07:30,257 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:30,257 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:30,258 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 16 statements into 1 equivalence classes. [2025-02-06 19:07:30,261 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 16 of 16 statements. [2025-02-06 19:07:30,261 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:30,261 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:30,264 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:30,264 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:30,264 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 6 times [2025-02-06 19:07:30,264 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:30,264 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2114165163] [2025-02-06 19:07:30,264 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-06 19:07:30,264 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:30,266 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:30,267 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:30,267 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-02-06 19:07:30,267 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:30,267 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:30,267 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:30,268 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:30,268 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:30,268 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:30,268 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:30,269 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:30,269 INFO L85 PathProgramCache]: Analyzing trace with hash 1200638097, now seen corresponding path program 3 times [2025-02-06 19:07:30,269 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:30,269 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [479784301] [2025-02-06 19:07:30,269 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:07:30,269 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:30,272 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 18 statements into 3 equivalence classes. [2025-02-06 19:07:30,277 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) and asserted 18 of 18 statements. [2025-02-06 19:07:30,277 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2025-02-06 19:07:30,277 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:30,325 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:30,325 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:07:30,325 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [479784301] [2025-02-06 19:07:30,325 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [479784301] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:07:30,325 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1487363406] [2025-02-06 19:07:30,325 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:07:30,325 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:30,325 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:30,330 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:30,335 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2025-02-06 19:07:30,364 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 18 statements into 3 equivalence classes. [2025-02-06 19:07:30,373 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) and asserted 18 of 18 statements. [2025-02-06 19:07:30,373 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2025-02-06 19:07:30,373 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:30,374 INFO L256 TraceCheckSpWp]: Trace formula consists of 90 conjuncts, 8 conjuncts are in the unsatisfiable core [2025-02-06 19:07:30,374 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:30,436 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:30,436 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:07:30,468 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:30,468 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1487363406] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:07:30,469 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:07:30,469 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 13 [2025-02-06 19:07:30,469 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [122063048] [2025-02-06 19:07:30,469 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:07:30,499 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:07:30,499 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-02-06 19:07:30,500 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2025-02-06 19:07:30,500 INFO L87 Difference]: Start difference. First operand 22 states and 30 transitions. cyclomatic complexity: 11 Second operand has 13 states, 13 states have (on average 2.3846153846153846) internal successors, (31), 13 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:30,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:07:30,546 INFO L93 Difference]: Finished difference Result 32 states and 41 transitions. [2025-02-06 19:07:30,546 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 32 states and 41 transitions. [2025-02-06 19:07:30,547 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:30,547 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 32 states to 27 states and 36 transitions. [2025-02-06 19:07:30,547 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2025-02-06 19:07:30,547 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2025-02-06 19:07:30,547 INFO L73 IsDeterministic]: Start isDeterministic. Operand 27 states and 36 transitions. [2025-02-06 19:07:30,547 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:07:30,547 INFO L218 hiAutomatonCegarLoop]: Abstraction has 27 states and 36 transitions. [2025-02-06 19:07:30,547 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states and 36 transitions. [2025-02-06 19:07:30,548 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 24. [2025-02-06 19:07:30,548 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.3333333333333333) internal successors, (32), 23 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:30,548 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 32 transitions. [2025-02-06 19:07:30,548 INFO L240 hiAutomatonCegarLoop]: Abstraction has 24 states and 32 transitions. [2025-02-06 19:07:30,548 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-02-06 19:07:30,549 INFO L432 stractBuchiCegarLoop]: Abstraction has 24 states and 32 transitions. [2025-02-06 19:07:30,549 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-02-06 19:07:30,549 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 24 states and 32 transitions. [2025-02-06 19:07:30,549 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:30,549 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:30,549 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:30,549 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:07:30,549 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 19:07:30,550 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume main_#t~mem208#1 > 0;havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" [2025-02-06 19:07:30,550 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-02-06 19:07:30,550 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:30,550 INFO L85 PathProgramCache]: Analyzing trace with hash -2060649522, now seen corresponding path program 1 times [2025-02-06 19:07:30,550 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:30,550 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1701439555] [2025-02-06 19:07:30,550 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:30,550 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:30,554 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 17 statements into 1 equivalence classes. [2025-02-06 19:07:30,562 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 17 of 17 statements. [2025-02-06 19:07:30,562 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:30,562 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:30,563 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:30,564 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 17 statements into 1 equivalence classes. [2025-02-06 19:07:30,572 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 17 of 17 statements. [2025-02-06 19:07:30,572 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:30,572 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:30,573 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:30,574 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:30,574 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 7 times [2025-02-06 19:07:30,574 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:30,574 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [117971916] [2025-02-06 19:07:30,574 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-02-06 19:07:30,574 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:30,580 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:30,583 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:30,583 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:30,583 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:30,584 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:30,584 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:30,584 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:30,585 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:30,585 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:30,585 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:30,585 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:30,586 INFO L85 PathProgramCache]: Analyzing trace with hash -304266996, now seen corresponding path program 1 times [2025-02-06 19:07:30,586 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:30,586 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [507121177] [2025-02-06 19:07:30,586 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:30,586 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:30,593 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 19 statements into 1 equivalence classes. [2025-02-06 19:07:30,602 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 19 of 19 statements. [2025-02-06 19:07:30,602 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:30,602 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:30,853 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:30,853 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:07:30,853 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [507121177] [2025-02-06 19:07:30,853 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [507121177] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:07:30,853 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1854192834] [2025-02-06 19:07:30,854 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:30,854 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:30,854 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:30,856 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:30,857 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2025-02-06 19:07:30,887 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 19 statements into 1 equivalence classes. [2025-02-06 19:07:30,897 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 19 of 19 statements. [2025-02-06 19:07:30,897 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:30,897 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:30,898 INFO L256 TraceCheckSpWp]: Trace formula consists of 101 conjuncts, 19 conjuncts are in the unsatisfiable core [2025-02-06 19:07:30,899 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:30,913 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2025-02-06 19:07:30,952 INFO L349 Elim1Store]: treesize reduction 27, result has 25.0 percent of original size [2025-02-06 19:07:30,952 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 13 [2025-02-06 19:07:30,969 INFO L349 Elim1Store]: treesize reduction 27, result has 25.0 percent of original size [2025-02-06 19:07:30,969 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 13 [2025-02-06 19:07:30,996 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2025-02-06 19:07:30,998 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:30,998 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:07:31,090 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2025-02-06 19:07:31,093 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 20 [2025-02-06 19:07:31,100 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:31,101 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1854192834] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:07:31,101 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:07:31,101 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10] total 16 [2025-02-06 19:07:31,101 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [457960391] [2025-02-06 19:07:31,101 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:07:31,135 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:07:31,136 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2025-02-06 19:07:31,136 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=221, Unknown=0, NotChecked=0, Total=272 [2025-02-06 19:07:31,136 INFO L87 Difference]: Start difference. First operand 24 states and 32 transitions. cyclomatic complexity: 11 Second operand has 17 states, 16 states have (on average 2.0) internal successors, (32), 17 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:31,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:07:31,245 INFO L93 Difference]: Finished difference Result 28 states and 36 transitions. [2025-02-06 19:07:31,245 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 28 states and 36 transitions. [2025-02-06 19:07:31,246 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:31,246 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 28 states to 28 states and 36 transitions. [2025-02-06 19:07:31,246 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16 [2025-02-06 19:07:31,246 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16 [2025-02-06 19:07:31,246 INFO L73 IsDeterministic]: Start isDeterministic. Operand 28 states and 36 transitions. [2025-02-06 19:07:31,246 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:07:31,246 INFO L218 hiAutomatonCegarLoop]: Abstraction has 28 states and 36 transitions. [2025-02-06 19:07:31,246 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states and 36 transitions. [2025-02-06 19:07:31,247 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 21. [2025-02-06 19:07:31,247 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 1.2857142857142858) internal successors, (27), 20 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:31,247 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 27 transitions. [2025-02-06 19:07:31,247 INFO L240 hiAutomatonCegarLoop]: Abstraction has 21 states and 27 transitions. [2025-02-06 19:07:31,249 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2025-02-06 19:07:31,249 INFO L432 stractBuchiCegarLoop]: Abstraction has 21 states and 27 transitions. [2025-02-06 19:07:31,250 INFO L338 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2025-02-06 19:07:31,250 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 21 states and 27 transitions. [2025-02-06 19:07:31,250 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:31,250 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:31,250 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:31,250 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 3, 2, 2, 1, 1, 1, 1, 1, 1] [2025-02-06 19:07:31,250 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 19:07:31,250 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" [2025-02-06 19:07:31,250 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-02-06 19:07:31,251 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:31,251 INFO L85 PathProgramCache]: Analyzing trace with hash 583236686, now seen corresponding path program 4 times [2025-02-06 19:07:31,251 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:31,251 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [587102723] [2025-02-06 19:07:31,251 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 19:07:31,251 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:31,257 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 19 statements into 2 equivalence classes. [2025-02-06 19:07:31,265 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 19 of 19 statements. [2025-02-06 19:07:31,265 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-06 19:07:31,265 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:31,265 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:31,266 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 19 statements into 1 equivalence classes. [2025-02-06 19:07:31,275 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 19 of 19 statements. [2025-02-06 19:07:31,275 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:31,275 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:31,277 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:31,278 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:31,278 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 8 times [2025-02-06 19:07:31,278 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:31,278 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [658162173] [2025-02-06 19:07:31,278 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:07:31,278 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:31,280 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:31,280 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:31,280 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:07:31,280 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:31,280 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:31,281 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:31,282 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:31,282 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:31,282 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:31,283 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:31,284 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:31,284 INFO L85 PathProgramCache]: Analyzing trace with hash 2144706956, now seen corresponding path program 4 times [2025-02-06 19:07:31,284 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:31,284 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [840192786] [2025-02-06 19:07:31,284 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 19:07:31,284 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:31,288 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 21 statements into 2 equivalence classes. [2025-02-06 19:07:31,293 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) and asserted 20 of 21 statements. [2025-02-06 19:07:31,293 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) [2025-02-06 19:07:31,293 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:31,444 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:31,444 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:07:31,444 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [840192786] [2025-02-06 19:07:31,444 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [840192786] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:07:31,444 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1389235275] [2025-02-06 19:07:31,444 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 19:07:31,444 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:31,444 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:31,447 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:31,450 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2025-02-06 19:07:31,483 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 21 statements into 2 equivalence classes. [2025-02-06 19:07:31,492 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) and asserted 20 of 21 statements. [2025-02-06 19:07:31,493 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) [2025-02-06 19:07:31,493 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:31,493 INFO L256 TraceCheckSpWp]: Trace formula consists of 88 conjuncts, 18 conjuncts are in the unsatisfiable core [2025-02-06 19:07:31,495 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:31,509 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2025-02-06 19:07:31,586 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2025-02-06 19:07:31,588 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:31,588 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:07:31,644 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2025-02-06 19:07:31,647 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 16 [2025-02-06 19:07:31,654 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:31,655 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1389235275] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:07:31,655 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:07:31,655 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 10] total 16 [2025-02-06 19:07:31,655 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1370678978] [2025-02-06 19:07:31,655 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:07:31,692 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:07:31,692 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2025-02-06 19:07:31,692 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=224, Unknown=0, NotChecked=0, Total=272 [2025-02-06 19:07:31,692 INFO L87 Difference]: Start difference. First operand 21 states and 27 transitions. cyclomatic complexity: 8 Second operand has 17 states, 16 states have (on average 2.0625) internal successors, (33), 17 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:31,810 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:07:31,810 INFO L93 Difference]: Finished difference Result 34 states and 44 transitions. [2025-02-06 19:07:31,811 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 34 states and 44 transitions. [2025-02-06 19:07:31,812 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2025-02-06 19:07:31,812 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 34 states to 34 states and 44 transitions. [2025-02-06 19:07:31,812 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2025-02-06 19:07:31,812 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2025-02-06 19:07:31,812 INFO L73 IsDeterministic]: Start isDeterministic. Operand 34 states and 44 transitions. [2025-02-06 19:07:31,812 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:07:31,812 INFO L218 hiAutomatonCegarLoop]: Abstraction has 34 states and 44 transitions. [2025-02-06 19:07:31,812 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states and 44 transitions. [2025-02-06 19:07:31,813 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 27. [2025-02-06 19:07:31,816 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 1.3333333333333333) internal successors, (36), 26 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:31,817 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 36 transitions. [2025-02-06 19:07:31,817 INFO L240 hiAutomatonCegarLoop]: Abstraction has 27 states and 36 transitions. [2025-02-06 19:07:31,817 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-02-06 19:07:31,818 INFO L432 stractBuchiCegarLoop]: Abstraction has 27 states and 36 transitions. [2025-02-06 19:07:31,818 INFO L338 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2025-02-06 19:07:31,818 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 36 transitions. [2025-02-06 19:07:31,819 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:31,820 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:31,820 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:31,820 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1] [2025-02-06 19:07:31,820 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 19:07:31,820 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" [2025-02-06 19:07:31,820 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-02-06 19:07:31,821 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:31,821 INFO L85 PathProgramCache]: Analyzing trace with hash 2144706957, now seen corresponding path program 5 times [2025-02-06 19:07:31,821 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:31,822 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1941701867] [2025-02-06 19:07:31,822 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-06 19:07:31,822 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:31,825 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 21 statements into 4 equivalence classes. [2025-02-06 19:07:31,835 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) and asserted 21 of 21 statements. [2025-02-06 19:07:31,837 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2025-02-06 19:07:31,837 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:31,837 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:31,838 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 21 statements into 1 equivalence classes. [2025-02-06 19:07:31,845 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 21 of 21 statements. [2025-02-06 19:07:31,845 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:31,845 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:31,847 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:31,851 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:31,851 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 9 times [2025-02-06 19:07:31,851 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:31,851 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1815904798] [2025-02-06 19:07:31,851 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:07:31,851 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:31,852 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:31,853 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:31,853 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-06 19:07:31,853 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:31,853 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:31,853 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:31,854 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:31,854 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:31,854 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:31,855 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:31,855 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:31,856 INFO L85 PathProgramCache]: Analyzing trace with hash -520916213, now seen corresponding path program 5 times [2025-02-06 19:07:31,856 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:31,856 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [972439365] [2025-02-06 19:07:31,856 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-06 19:07:31,856 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:31,862 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 23 statements into 4 equivalence classes. [2025-02-06 19:07:31,868 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) and asserted 23 of 23 statements. [2025-02-06 19:07:31,868 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2025-02-06 19:07:31,868 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:31,952 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 9 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:31,953 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:07:31,953 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [972439365] [2025-02-06 19:07:31,953 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [972439365] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:07:31,953 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [875762269] [2025-02-06 19:07:31,953 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-06 19:07:31,954 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:31,954 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:31,958 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:31,958 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2025-02-06 19:07:31,991 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 23 statements into 4 equivalence classes. [2025-02-06 19:07:32,006 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) and asserted 23 of 23 statements. [2025-02-06 19:07:32,007 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2025-02-06 19:07:32,007 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:32,009 INFO L256 TraceCheckSpWp]: Trace formula consists of 115 conjuncts, 10 conjuncts are in the unsatisfiable core [2025-02-06 19:07:32,009 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:32,077 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 12 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:32,077 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:07:32,126 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 9 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:32,127 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [875762269] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:07:32,127 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:07:32,127 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11] total 15 [2025-02-06 19:07:32,127 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [563515533] [2025-02-06 19:07:32,127 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:07:32,157 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:07:32,157 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2025-02-06 19:07:32,158 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=151, Unknown=0, NotChecked=0, Total=210 [2025-02-06 19:07:32,158 INFO L87 Difference]: Start difference. First operand 27 states and 36 transitions. cyclomatic complexity: 12 Second operand has 15 states, 15 states have (on average 2.0) internal successors, (30), 15 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:32,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:07:32,231 INFO L93 Difference]: Finished difference Result 66 states and 86 transitions. [2025-02-06 19:07:32,231 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 66 states and 86 transitions. [2025-02-06 19:07:32,231 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2025-02-06 19:07:32,232 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 66 states to 59 states and 77 transitions. [2025-02-06 19:07:32,232 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 28 [2025-02-06 19:07:32,232 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 28 [2025-02-06 19:07:32,232 INFO L73 IsDeterministic]: Start isDeterministic. Operand 59 states and 77 transitions. [2025-02-06 19:07:32,232 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:07:32,232 INFO L218 hiAutomatonCegarLoop]: Abstraction has 59 states and 77 transitions. [2025-02-06 19:07:32,232 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states and 77 transitions. [2025-02-06 19:07:32,234 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 55. [2025-02-06 19:07:32,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 55 states, 55 states have (on average 1.309090909090909) internal successors, (72), 54 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:32,234 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 72 transitions. [2025-02-06 19:07:32,235 INFO L240 hiAutomatonCegarLoop]: Abstraction has 55 states and 72 transitions. [2025-02-06 19:07:32,235 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2025-02-06 19:07:32,235 INFO L432 stractBuchiCegarLoop]: Abstraction has 55 states and 72 transitions. [2025-02-06 19:07:32,235 INFO L338 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2025-02-06 19:07:32,235 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 55 states and 72 transitions. [2025-02-06 19:07:32,236 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 [2025-02-06 19:07:32,236 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:32,236 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:32,236 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:07:32,236 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 1, 1] [2025-02-06 19:07:32,236 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume main_~length~0#1 < 1;main_~length~0#1 := 1;" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume main_#t~mem208#1 > 0;havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" [2025-02-06 19:07:32,236 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" [2025-02-06 19:07:32,240 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:32,241 INFO L85 PathProgramCache]: Analyzing trace with hash -694079213, now seen corresponding path program 1 times [2025-02-06 19:07:32,241 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:32,241 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [228319000] [2025-02-06 19:07:32,241 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:32,241 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:32,244 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 22 statements into 1 equivalence classes. [2025-02-06 19:07:32,247 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 22 of 22 statements. [2025-02-06 19:07:32,247 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:32,247 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:32,275 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2025-02-06 19:07:32,275 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:07:32,276 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [228319000] [2025-02-06 19:07:32,276 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [228319000] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:07:32,276 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1862849647] [2025-02-06 19:07:32,276 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:32,276 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:32,276 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:32,280 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:32,281 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2025-02-06 19:07:32,345 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 22 statements into 1 equivalence classes. [2025-02-06 19:07:32,358 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 22 of 22 statements. [2025-02-06 19:07:32,358 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:32,358 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:32,360 INFO L256 TraceCheckSpWp]: Trace formula consists of 117 conjuncts, 4 conjuncts are in the unsatisfiable core [2025-02-06 19:07:32,361 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:32,392 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2025-02-06 19:07:32,396 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-02-06 19:07:32,396 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1862849647] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:07:32,397 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-02-06 19:07:32,397 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 7 [2025-02-06 19:07:32,397 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [994963270] [2025-02-06 19:07:32,397 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:07:32,397 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:07:32,397 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:32,397 INFO L85 PathProgramCache]: Analyzing trace with hash 1106302, now seen corresponding path program 1 times [2025-02-06 19:07:32,397 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:32,397 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [307228652] [2025-02-06 19:07:32,397 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:32,397 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:32,399 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 4 statements into 1 equivalence classes. [2025-02-06 19:07:32,400 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 4 of 4 statements. [2025-02-06 19:07:32,403 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:32,403 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:32,403 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:32,404 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 4 statements into 1 equivalence classes. [2025-02-06 19:07:32,405 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 4 of 4 statements. [2025-02-06 19:07:32,405 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:32,405 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:32,406 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:32,494 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:07:32,494 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-06 19:07:32,494 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2025-02-06 19:07:32,494 INFO L87 Difference]: Start difference. First operand 55 states and 72 transitions. cyclomatic complexity: 23 Second operand has 5 states, 5 states have (on average 3.2) internal successors, (16), 5 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:32,512 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:07:32,512 INFO L93 Difference]: Finished difference Result 35 states and 44 transitions. [2025-02-06 19:07:32,513 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 35 states and 44 transitions. [2025-02-06 19:07:32,513 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:32,513 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 35 states to 29 states and 37 transitions. [2025-02-06 19:07:32,513 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 14 [2025-02-06 19:07:32,513 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 14 [2025-02-06 19:07:32,513 INFO L73 IsDeterministic]: Start isDeterministic. Operand 29 states and 37 transitions. [2025-02-06 19:07:32,514 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:07:32,514 INFO L218 hiAutomatonCegarLoop]: Abstraction has 29 states and 37 transitions. [2025-02-06 19:07:32,514 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states and 37 transitions. [2025-02-06 19:07:32,514 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2025-02-06 19:07:32,515 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 29 states have (on average 1.2758620689655173) internal successors, (37), 28 states have internal predecessors, (37), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:32,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 37 transitions. [2025-02-06 19:07:32,515 INFO L240 hiAutomatonCegarLoop]: Abstraction has 29 states and 37 transitions. [2025-02-06 19:07:32,515 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-06 19:07:32,515 INFO L432 stractBuchiCegarLoop]: Abstraction has 29 states and 37 transitions. [2025-02-06 19:07:32,515 INFO L338 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2025-02-06 19:07:32,516 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 29 states and 37 transitions. [2025-02-06 19:07:32,516 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:32,516 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:32,516 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:32,516 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:07:32,516 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 19:07:32,516 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume main_#t~mem208#1 > 0;havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" [2025-02-06 19:07:32,516 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-02-06 19:07:32,516 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:32,516 INFO L85 PathProgramCache]: Analyzing trace with hash -1102903438, now seen corresponding path program 2 times [2025-02-06 19:07:32,517 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:32,517 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1833621661] [2025-02-06 19:07:32,517 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:07:32,517 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:32,520 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 22 statements into 2 equivalence classes. [2025-02-06 19:07:32,524 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 22 of 22 statements. [2025-02-06 19:07:32,525 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-02-06 19:07:32,525 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:32,525 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:32,526 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 22 statements into 1 equivalence classes. [2025-02-06 19:07:32,529 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 22 of 22 statements. [2025-02-06 19:07:32,529 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:32,529 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:32,531 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:32,531 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:32,531 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 10 times [2025-02-06 19:07:32,531 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:32,531 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1425311211] [2025-02-06 19:07:32,531 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 19:07:32,531 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:32,532 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-02-06 19:07:32,533 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:32,533 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-06 19:07:32,533 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:32,533 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:32,533 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:32,534 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:32,537 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:32,537 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:32,538 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:32,538 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:32,538 INFO L85 PathProgramCache]: Analyzing trace with hash 966718384, now seen corresponding path program 2 times [2025-02-06 19:07:32,538 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:32,538 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1289387689] [2025-02-06 19:07:32,538 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:07:32,539 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:32,542 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 24 statements into 2 equivalence classes. [2025-02-06 19:07:32,549 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 24 of 24 statements. [2025-02-06 19:07:32,553 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-02-06 19:07:32,553 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:32,766 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:32,767 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:07:32,767 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1289387689] [2025-02-06 19:07:32,767 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1289387689] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:07:32,767 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [349129544] [2025-02-06 19:07:32,767 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:07:32,767 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:32,767 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:32,769 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:32,770 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2025-02-06 19:07:32,811 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 24 statements into 2 equivalence classes. [2025-02-06 19:07:32,824 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 24 of 24 statements. [2025-02-06 19:07:32,824 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-02-06 19:07:32,825 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:32,826 INFO L256 TraceCheckSpWp]: Trace formula consists of 126 conjuncts, 27 conjuncts are in the unsatisfiable core [2025-02-06 19:07:32,828 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:32,899 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-02-06 19:07:32,951 INFO L190 IndexEqualityManager]: detected not equals via solver [2025-02-06 19:07:32,951 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 11 [2025-02-06 19:07:32,960 INFO L190 IndexEqualityManager]: detected not equals via solver [2025-02-06 19:07:32,960 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 11 [2025-02-06 19:07:33,046 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2025-02-06 19:07:33,048 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:33,048 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:07:33,153 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2025-02-06 19:07:33,154 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 20 [2025-02-06 19:07:33,163 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:33,163 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [349129544] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:07:33,163 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:07:33,163 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 13, 12] total 26 [2025-02-06 19:07:33,163 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1406687194] [2025-02-06 19:07:33,163 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:07:33,193 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:07:33,193 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2025-02-06 19:07:33,194 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=101, Invalid=601, Unknown=0, NotChecked=0, Total=702 [2025-02-06 19:07:33,194 INFO L87 Difference]: Start difference. First operand 29 states and 37 transitions. cyclomatic complexity: 11 Second operand has 27 states, 26 states have (on average 1.9230769230769231) internal successors, (50), 27 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:33,333 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:07:33,333 INFO L93 Difference]: Finished difference Result 35 states and 43 transitions. [2025-02-06 19:07:33,334 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 35 states and 43 transitions. [2025-02-06 19:07:33,334 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:33,334 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 35 states to 35 states and 43 transitions. [2025-02-06 19:07:33,334 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 20 [2025-02-06 19:07:33,334 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 20 [2025-02-06 19:07:33,334 INFO L73 IsDeterministic]: Start isDeterministic. Operand 35 states and 43 transitions. [2025-02-06 19:07:33,335 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:07:33,335 INFO L218 hiAutomatonCegarLoop]: Abstraction has 35 states and 43 transitions. [2025-02-06 19:07:33,335 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states and 43 transitions. [2025-02-06 19:07:33,336 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 26. [2025-02-06 19:07:33,336 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 26 states have (on average 1.2307692307692308) internal successors, (32), 25 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:33,336 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 32 transitions. [2025-02-06 19:07:33,336 INFO L240 hiAutomatonCegarLoop]: Abstraction has 26 states and 32 transitions. [2025-02-06 19:07:33,336 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2025-02-06 19:07:33,337 INFO L432 stractBuchiCegarLoop]: Abstraction has 26 states and 32 transitions. [2025-02-06 19:07:33,337 INFO L338 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2025-02-06 19:07:33,337 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 26 states and 32 transitions. [2025-02-06 19:07:33,337 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:33,337 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:33,337 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:33,338 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 4, 3, 3, 1, 1, 1, 1, 1, 1] [2025-02-06 19:07:33,338 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 19:07:33,338 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" [2025-02-06 19:07:33,338 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-02-06 19:07:33,338 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:33,338 INFO L85 PathProgramCache]: Analyzing trace with hash -840736078, now seen corresponding path program 6 times [2025-02-06 19:07:33,338 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:33,338 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1025758178] [2025-02-06 19:07:33,338 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-06 19:07:33,338 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:33,342 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 24 statements into 5 equivalence classes. [2025-02-06 19:07:33,348 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) and asserted 24 of 24 statements. [2025-02-06 19:07:33,349 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2025-02-06 19:07:33,349 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:33,349 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:33,353 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 24 statements into 1 equivalence classes. [2025-02-06 19:07:33,357 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 24 of 24 statements. [2025-02-06 19:07:33,357 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:33,357 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:33,359 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:33,359 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:33,359 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 11 times [2025-02-06 19:07:33,359 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:33,359 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2013062066] [2025-02-06 19:07:33,359 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-06 19:07:33,360 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:33,361 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:33,361 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:33,361 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:07:33,361 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:33,361 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:33,362 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:33,362 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:33,362 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:33,362 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:33,363 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:33,364 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:33,364 INFO L85 PathProgramCache]: Analyzing trace with hash -493519120, now seen corresponding path program 6 times [2025-02-06 19:07:33,364 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:33,364 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1167359968] [2025-02-06 19:07:33,364 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-06 19:07:33,364 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:33,367 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 26 statements into 5 equivalence classes. [2025-02-06 19:07:33,381 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) and asserted 26 of 26 statements. [2025-02-06 19:07:33,382 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2025-02-06 19:07:33,382 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:33,572 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 2 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:33,572 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:07:33,572 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1167359968] [2025-02-06 19:07:33,573 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1167359968] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:07:33,573 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [808696753] [2025-02-06 19:07:33,573 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-06 19:07:33,573 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:33,573 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:33,575 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:33,600 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2025-02-06 19:07:33,642 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 26 statements into 5 equivalence classes. [2025-02-06 19:07:33,656 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) and asserted 26 of 26 statements. [2025-02-06 19:07:33,656 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2025-02-06 19:07:33,656 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:33,656 INFO L256 TraceCheckSpWp]: Trace formula consists of 129 conjuncts, 26 conjuncts are in the unsatisfiable core [2025-02-06 19:07:33,662 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:33,798 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-02-06 19:07:33,990 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2025-02-06 19:07:33,992 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:33,992 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:07:34,116 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2025-02-06 19:07:34,118 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 16 [2025-02-06 19:07:34,173 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:34,174 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [808696753] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:07:34,174 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:07:34,174 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 12] total 33 [2025-02-06 19:07:34,174 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [475863236] [2025-02-06 19:07:34,174 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:07:34,205 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:07:34,205 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2025-02-06 19:07:34,206 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=138, Invalid=984, Unknown=0, NotChecked=0, Total=1122 [2025-02-06 19:07:34,207 INFO L87 Difference]: Start difference. First operand 26 states and 32 transitions. cyclomatic complexity: 8 Second operand has 34 states, 33 states have (on average 2.0) internal successors, (66), 34 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:34,857 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:07:34,857 INFO L93 Difference]: Finished difference Result 55 states and 67 transitions. [2025-02-06 19:07:34,857 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 55 states and 67 transitions. [2025-02-06 19:07:34,858 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 6 [2025-02-06 19:07:34,858 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 55 states to 55 states and 67 transitions. [2025-02-06 19:07:34,858 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 34 [2025-02-06 19:07:34,858 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 34 [2025-02-06 19:07:34,858 INFO L73 IsDeterministic]: Start isDeterministic. Operand 55 states and 67 transitions. [2025-02-06 19:07:34,858 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:07:34,858 INFO L218 hiAutomatonCegarLoop]: Abstraction has 55 states and 67 transitions. [2025-02-06 19:07:34,858 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states and 67 transitions. [2025-02-06 19:07:34,861 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 36. [2025-02-06 19:07:34,862 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 1.2777777777777777) internal successors, (46), 35 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:34,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 46 transitions. [2025-02-06 19:07:34,862 INFO L240 hiAutomatonCegarLoop]: Abstraction has 36 states and 46 transitions. [2025-02-06 19:07:34,863 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2025-02-06 19:07:34,863 INFO L432 stractBuchiCegarLoop]: Abstraction has 36 states and 46 transitions. [2025-02-06 19:07:34,863 INFO L338 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2025-02-06 19:07:34,863 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 36 states and 46 transitions. [2025-02-06 19:07:34,864 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2025-02-06 19:07:34,864 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:34,864 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:34,864 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 4, 1, 1, 1, 1, 1, 1] [2025-02-06 19:07:34,864 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 19:07:34,864 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" [2025-02-06 19:07:34,864 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" [2025-02-06 19:07:34,864 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:34,864 INFO L85 PathProgramCache]: Analyzing trace with hash 573126517, now seen corresponding path program 2 times [2025-02-06 19:07:34,864 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:34,864 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [824100557] [2025-02-06 19:07:34,864 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:07:34,864 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:34,871 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 18 statements into 2 equivalence classes. [2025-02-06 19:07:34,877 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 18 of 18 statements. [2025-02-06 19:07:34,877 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-02-06 19:07:34,877 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:34,877 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:34,878 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 18 statements into 1 equivalence classes. [2025-02-06 19:07:34,880 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 18 of 18 statements. [2025-02-06 19:07:34,880 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:34,880 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:34,890 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:34,890 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:34,890 INFO L85 PathProgramCache]: Analyzing trace with hash 1152, now seen corresponding path program 1 times [2025-02-06 19:07:34,890 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:34,890 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [421110838] [2025-02-06 19:07:34,890 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:34,890 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:34,891 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:34,892 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:34,892 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:34,892 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:34,892 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:34,892 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:34,896 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:34,896 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:34,896 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:34,897 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:34,897 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:34,897 INFO L85 PathProgramCache]: Analyzing trace with hash 1018769140, now seen corresponding path program 7 times [2025-02-06 19:07:34,897 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:34,897 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [706322212] [2025-02-06 19:07:34,897 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-02-06 19:07:34,897 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:34,902 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 20 statements into 1 equivalence classes. [2025-02-06 19:07:34,905 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 20 of 20 statements. [2025-02-06 19:07:34,905 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:34,905 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:34,905 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:34,906 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 20 statements into 1 equivalence classes. [2025-02-06 19:07:34,908 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 20 of 20 statements. [2025-02-06 19:07:34,908 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:34,908 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:34,910 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:35,450 INFO L204 LassoAnalysis]: Preferences: [2025-02-06 19:07:35,450 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-02-06 19:07:35,450 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-02-06 19:07:35,450 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-02-06 19:07:35,450 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2025-02-06 19:07:35,450 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:07:35,450 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-02-06 19:07:35,450 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-02-06 19:07:35,451 INFO L132 ssoRankerPreferences]: Filename of dumped script: array13_alloca.i_Iteration14_Lasso [2025-02-06 19:07:35,451 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-02-06 19:07:35,451 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-02-06 19:07:35,452 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:35,455 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:35,464 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:35,472 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:35,474 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:35,475 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:35,478 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:35,481 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:35,482 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:35,483 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:35,635 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:35,736 INFO L259 LassoAnalysis]: Preprocessing complete. [2025-02-06 19:07:35,737 INFO L451 LassoAnalysis]: Using template 'affine'. [2025-02-06 19:07:35,737 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:07:35,737 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:35,740 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:07:35,741 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Waiting until timeout for monitored process [2025-02-06 19:07:35,741 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:07:35,752 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:07:35,752 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-02-06 19:07:35,752 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:07:35,752 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 19:07:35,752 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:07:35,753 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-02-06 19:07:35,753 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-02-06 19:07:35,754 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 19:07:35,760 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Ended with exit code 0 [2025-02-06 19:07:35,760 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:07:35,760 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:35,763 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:07:35,763 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Waiting until timeout for monitored process [2025-02-06 19:07:35,765 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:07:35,775 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:07:35,775 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-02-06 19:07:35,775 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:07:35,775 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 19:07:35,775 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:07:35,776 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-02-06 19:07:35,776 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-02-06 19:07:35,777 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 19:07:35,782 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Ended with exit code 0 [2025-02-06 19:07:35,782 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:07:35,782 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:35,784 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:07:35,786 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Waiting until timeout for monitored process [2025-02-06 19:07:35,786 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:07:35,796 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:07:35,796 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-02-06 19:07:35,796 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:07:35,796 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 19:07:35,796 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:07:35,796 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-02-06 19:07:35,796 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-02-06 19:07:35,797 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 19:07:35,803 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Ended with exit code 0 [2025-02-06 19:07:35,803 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:07:35,803 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:35,805 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:07:35,807 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Waiting until timeout for monitored process [2025-02-06 19:07:35,811 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:07:35,821 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:07:35,821 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-02-06 19:07:35,821 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:07:35,821 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 19:07:35,821 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:07:35,822 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-02-06 19:07:35,822 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-02-06 19:07:35,823 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 19:07:35,829 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Forceful destruction successful, exit code 0 [2025-02-06 19:07:35,829 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:07:35,829 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:35,832 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:07:35,833 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Waiting until timeout for monitored process [2025-02-06 19:07:35,833 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:07:35,843 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:07:35,844 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-02-06 19:07:35,844 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:07:35,844 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 19:07:35,844 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:07:35,844 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-02-06 19:07:35,844 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-02-06 19:07:35,845 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 19:07:35,851 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Ended with exit code 0 [2025-02-06 19:07:35,852 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:07:35,852 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:35,855 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:07:35,856 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Waiting until timeout for monitored process [2025-02-06 19:07:35,857 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:07:35,868 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:07:35,868 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-02-06 19:07:35,868 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:07:35,868 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 19:07:35,868 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:07:35,869 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-02-06 19:07:35,869 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-02-06 19:07:35,870 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 19:07:35,876 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Ended with exit code 0 [2025-02-06 19:07:35,876 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:07:35,876 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:35,878 INFO L229 MonitoredProcess]: Starting monitored process 23 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:07:35,880 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Waiting until timeout for monitored process [2025-02-06 19:07:35,881 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:07:35,890 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:07:35,890 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-02-06 19:07:35,890 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:07:35,891 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 19:07:35,891 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:07:35,891 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-02-06 19:07:35,891 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-02-06 19:07:35,892 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 19:07:35,897 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Forceful destruction successful, exit code 0 [2025-02-06 19:07:35,898 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:07:35,898 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:35,900 INFO L229 MonitoredProcess]: Starting monitored process 24 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:07:35,901 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Waiting until timeout for monitored process [2025-02-06 19:07:35,902 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:07:35,912 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:07:35,912 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-02-06 19:07:35,912 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:07:35,912 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 19:07:35,912 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:07:35,912 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-02-06 19:07:35,913 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-02-06 19:07:35,914 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 19:07:35,919 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Ended with exit code 0 [2025-02-06 19:07:35,919 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:07:35,919 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:35,922 INFO L229 MonitoredProcess]: Starting monitored process 25 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:07:35,923 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Waiting until timeout for monitored process [2025-02-06 19:07:35,924 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:07:35,933 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:07:35,934 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-02-06 19:07:35,938 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:07:35,938 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 19:07:35,938 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:07:35,938 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-02-06 19:07:35,938 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-02-06 19:07:35,939 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 19:07:35,946 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Forceful destruction successful, exit code 0 [2025-02-06 19:07:35,947 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:07:35,947 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:35,949 INFO L229 MonitoredProcess]: Starting monitored process 26 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:07:35,950 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Waiting until timeout for monitored process [2025-02-06 19:07:35,951 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:07:35,961 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:07:35,961 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:07:35,961 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 19:07:35,961 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:07:35,963 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-02-06 19:07:35,963 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-02-06 19:07:35,965 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 19:07:35,971 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Ended with exit code 0 [2025-02-06 19:07:35,971 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:07:35,971 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:35,973 INFO L229 MonitoredProcess]: Starting monitored process 27 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:07:35,973 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Waiting until timeout for monitored process [2025-02-06 19:07:35,975 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:07:35,985 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:07:35,985 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:07:35,985 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 19:07:35,985 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:07:35,987 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-02-06 19:07:35,987 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-02-06 19:07:35,990 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 19:07:35,996 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Ended with exit code 0 [2025-02-06 19:07:35,996 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:07:35,996 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:35,998 INFO L229 MonitoredProcess]: Starting monitored process 28 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:07:35,999 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Waiting until timeout for monitored process [2025-02-06 19:07:36,000 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:07:36,009 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:07:36,009 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:07:36,009 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 19:07:36,009 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:07:36,011 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-02-06 19:07:36,012 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-02-06 19:07:36,015 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 19:07:36,023 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Ended with exit code 0 [2025-02-06 19:07:36,023 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:07:36,023 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:36,025 INFO L229 MonitoredProcess]: Starting monitored process 29 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:07:36,027 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Waiting until timeout for monitored process [2025-02-06 19:07:36,030 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:07:36,049 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:07:36,049 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:07:36,049 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 19:07:36,049 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:07:36,057 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-02-06 19:07:36,057 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-02-06 19:07:36,069 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2025-02-06 19:07:36,085 INFO L443 ModelExtractionUtils]: Simplification made 10 calls to the SMT solver. [2025-02-06 19:07:36,085 INFO L444 ModelExtractionUtils]: 0 out of 19 variables were initially zero. Simplification set additionally 16 variables to zero. [2025-02-06 19:07:36,085 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:07:36,086 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:36,090 INFO L229 MonitoredProcess]: Starting monitored process 30 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:07:36,091 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Waiting until timeout for monitored process [2025-02-06 19:07:36,092 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2025-02-06 19:07:36,103 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2025-02-06 19:07:36,103 INFO L474 LassoAnalysis]: Proved termination. [2025-02-06 19:07:36,103 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~length~0#1, ULTIMATE.start_main_~j~0#1) = 1*ULTIMATE.start_main_~length~0#1 - 1*ULTIMATE.start_main_~j~0#1 Supporting invariants [] [2025-02-06 19:07:36,111 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Ended with exit code 0 [2025-02-06 19:07:36,121 INFO L156 tatePredicateManager]: 4 out of 4 supporting invariants were superfluous and have been removed [2025-02-06 19:07:36,132 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:36,140 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 18 statements into 1 equivalence classes. [2025-02-06 19:07:36,150 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 18 of 18 statements. [2025-02-06 19:07:36,151 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:36,151 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:36,151 INFO L256 TraceCheckSpWp]: Trace formula consists of 85 conjuncts, 2 conjuncts are in the unsatisfiable core [2025-02-06 19:07:36,152 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:36,172 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:36,173 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:36,173 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:36,173 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:36,174 INFO L256 TraceCheckSpWp]: Trace formula consists of 13 conjuncts, 4 conjuncts are in the unsatisfiable core [2025-02-06 19:07:36,174 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:36,183 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:36,183 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2025-02-06 19:07:36,184 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 36 states and 46 transitions. cyclomatic complexity: 14 Second operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 3 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:36,195 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 36 states and 46 transitions. cyclomatic complexity: 14. Second operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 3 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 46 states and 59 transitions. Complement of second has 5 states. [2025-02-06 19:07:36,195 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2025-02-06 19:07:36,196 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 3 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:36,196 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 12 transitions. [2025-02-06 19:07:36,196 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 12 transitions. Stem has 18 letters. Loop has 2 letters. [2025-02-06 19:07:36,196 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-02-06 19:07:36,196 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 12 transitions. Stem has 20 letters. Loop has 2 letters. [2025-02-06 19:07:36,196 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-02-06 19:07:36,196 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 12 transitions. Stem has 18 letters. Loop has 4 letters. [2025-02-06 19:07:36,196 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-02-06 19:07:36,196 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 46 states and 59 transitions. [2025-02-06 19:07:36,197 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:36,197 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 46 states to 38 states and 48 transitions. [2025-02-06 19:07:36,197 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2025-02-06 19:07:36,197 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2025-02-06 19:07:36,197 INFO L73 IsDeterministic]: Start isDeterministic. Operand 38 states and 48 transitions. [2025-02-06 19:07:36,198 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:07:36,198 INFO L218 hiAutomatonCegarLoop]: Abstraction has 38 states and 48 transitions. [2025-02-06 19:07:36,198 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states and 48 transitions. [2025-02-06 19:07:36,199 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 37. [2025-02-06 19:07:36,199 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 37 states have (on average 1.2702702702702702) internal successors, (47), 36 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:36,199 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 47 transitions. [2025-02-06 19:07:36,199 INFO L240 hiAutomatonCegarLoop]: Abstraction has 37 states and 47 transitions. [2025-02-06 19:07:36,199 INFO L432 stractBuchiCegarLoop]: Abstraction has 37 states and 47 transitions. [2025-02-06 19:07:36,199 INFO L338 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2025-02-06 19:07:36,199 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 37 states and 47 transitions. [2025-02-06 19:07:36,200 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:36,200 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:36,200 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:36,200 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:07:36,200 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 19:07:36,200 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume main_#t~mem208#1 > 0;havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-02-06 19:07:36,201 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-02-06 19:07:36,201 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:36,201 INFO L85 PathProgramCache]: Analyzing trace with hash 1446443562, now seen corresponding path program 3 times [2025-02-06 19:07:36,201 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:36,201 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2031985931] [2025-02-06 19:07:36,201 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:07:36,201 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:36,206 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 29 statements into 6 equivalence classes. [2025-02-06 19:07:36,221 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) and asserted 29 of 29 statements. [2025-02-06 19:07:36,222 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2025-02-06 19:07:36,222 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:36,580 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 2 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:36,580 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:07:36,580 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2031985931] [2025-02-06 19:07:36,580 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2031985931] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:07:36,580 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [392177643] [2025-02-06 19:07:36,580 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:07:36,580 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:36,581 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:36,584 INFO L229 MonitoredProcess]: Starting monitored process 31 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:36,592 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Waiting until timeout for monitored process [2025-02-06 19:07:36,659 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 29 statements into 6 equivalence classes. [2025-02-06 19:07:36,660 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Ended with exit code 0 [2025-02-06 19:07:36,678 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) and asserted 29 of 29 statements. [2025-02-06 19:07:36,679 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2025-02-06 19:07:36,679 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:36,680 INFO L256 TraceCheckSpWp]: Trace formula consists of 151 conjuncts, 31 conjuncts are in the unsatisfiable core [2025-02-06 19:07:36,681 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:36,762 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-02-06 19:07:36,805 INFO L349 Elim1Store]: treesize reduction 19, result has 36.7 percent of original size [2025-02-06 19:07:36,805 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 27 treesize of output 15 [2025-02-06 19:07:36,839 INFO L349 Elim1Store]: treesize reduction 19, result has 36.7 percent of original size [2025-02-06 19:07:36,840 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 31 treesize of output 19 [2025-02-06 19:07:36,950 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2025-02-06 19:07:36,961 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2025-02-06 19:07:36,961 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:07:37,169 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2025-02-06 19:07:37,171 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 16 [2025-02-06 19:07:37,231 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2025-02-06 19:07:37,231 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [392177643] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:07:37,231 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:07:37,231 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 14, 13] total 37 [2025-02-06 19:07:37,232 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [619458790] [2025-02-06 19:07:37,232 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:07:37,232 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:07:37,232 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:37,232 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 12 times [2025-02-06 19:07:37,232 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:37,232 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [373503201] [2025-02-06 19:07:37,232 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-06 19:07:37,232 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:37,234 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:37,235 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:37,235 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-02-06 19:07:37,236 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:37,236 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:37,236 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:37,236 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:37,236 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:37,236 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:37,239 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:37,269 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:07:37,269 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2025-02-06 19:07:37,270 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=178, Invalid=1228, Unknown=0, NotChecked=0, Total=1406 [2025-02-06 19:07:37,271 INFO L87 Difference]: Start difference. First operand 37 states and 47 transitions. cyclomatic complexity: 14 Second operand has 38 states, 37 states have (on average 1.972972972972973) internal successors, (73), 38 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:38,089 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:07:38,090 INFO L93 Difference]: Finished difference Result 67 states and 80 transitions. [2025-02-06 19:07:38,090 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 67 states and 80 transitions. [2025-02-06 19:07:38,090 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:38,091 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 67 states to 54 states and 66 transitions. [2025-02-06 19:07:38,091 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2025-02-06 19:07:38,091 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2025-02-06 19:07:38,091 INFO L73 IsDeterministic]: Start isDeterministic. Operand 54 states and 66 transitions. [2025-02-06 19:07:38,091 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:07:38,091 INFO L218 hiAutomatonCegarLoop]: Abstraction has 54 states and 66 transitions. [2025-02-06 19:07:38,091 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states and 66 transitions. [2025-02-06 19:07:38,092 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 36. [2025-02-06 19:07:38,095 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 1.25) internal successors, (45), 35 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:38,095 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 45 transitions. [2025-02-06 19:07:38,095 INFO L240 hiAutomatonCegarLoop]: Abstraction has 36 states and 45 transitions. [2025-02-06 19:07:38,096 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2025-02-06 19:07:38,096 INFO L432 stractBuchiCegarLoop]: Abstraction has 36 states and 45 transitions. [2025-02-06 19:07:38,096 INFO L338 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2025-02-06 19:07:38,096 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 36 states and 45 transitions. [2025-02-06 19:07:38,096 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:38,096 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:38,096 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:38,097 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 5, 5, 4, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:07:38,097 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 19:07:38,097 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-02-06 19:07:38,097 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-02-06 19:07:38,097 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:38,097 INFO L85 PathProgramCache]: Analyzing trace with hash -1830542678, now seen corresponding path program 7 times [2025-02-06 19:07:38,097 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:38,097 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [549878198] [2025-02-06 19:07:38,097 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-02-06 19:07:38,097 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:38,101 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 31 statements into 1 equivalence classes. [2025-02-06 19:07:38,106 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 31 of 31 statements. [2025-02-06 19:07:38,106 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:38,106 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:38,385 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:38,385 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:07:38,386 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [549878198] [2025-02-06 19:07:38,386 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [549878198] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:07:38,386 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [341635084] [2025-02-06 19:07:38,386 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-02-06 19:07:38,386 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:38,386 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:38,388 INFO L229 MonitoredProcess]: Starting monitored process 32 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:38,389 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (32)] Waiting until timeout for monitored process [2025-02-06 19:07:38,442 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 31 statements into 1 equivalence classes. [2025-02-06 19:07:38,462 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 31 of 31 statements. [2025-02-06 19:07:38,462 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:38,462 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:38,464 INFO L256 TraceCheckSpWp]: Trace formula consists of 154 conjuncts, 26 conjuncts are in the unsatisfiable core [2025-02-06 19:07:38,465 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:38,495 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2025-02-06 19:07:38,570 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2025-02-06 19:07:38,574 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:38,574 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:07:38,653 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2025-02-06 19:07:38,656 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 16 [2025-02-06 19:07:38,670 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:38,670 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [341635084] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:07:38,670 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:07:38,670 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 14, 14] total 22 [2025-02-06 19:07:38,670 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1533981619] [2025-02-06 19:07:38,670 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:07:38,671 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:07:38,671 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:38,671 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 13 times [2025-02-06 19:07:38,671 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:38,671 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2096015652] [2025-02-06 19:07:38,671 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-02-06 19:07:38,671 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:38,673 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:38,673 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:38,673 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:38,673 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:38,673 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:38,676 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:38,676 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:38,677 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:38,677 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:38,677 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:38,711 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:07:38,713 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2025-02-06 19:07:38,713 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=440, Unknown=0, NotChecked=0, Total=506 [2025-02-06 19:07:38,713 INFO L87 Difference]: Start difference. First operand 36 states and 45 transitions. cyclomatic complexity: 12 Second operand has 23 states, 22 states have (on average 2.1363636363636362) internal successors, (47), 23 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:38,885 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:07:38,885 INFO L93 Difference]: Finished difference Result 56 states and 69 transitions. [2025-02-06 19:07:38,885 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 56 states and 69 transitions. [2025-02-06 19:07:38,885 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2025-02-06 19:07:38,886 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 56 states to 55 states and 68 transitions. [2025-02-06 19:07:38,886 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 14 [2025-02-06 19:07:38,886 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 14 [2025-02-06 19:07:38,886 INFO L73 IsDeterministic]: Start isDeterministic. Operand 55 states and 68 transitions. [2025-02-06 19:07:38,887 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:07:38,887 INFO L218 hiAutomatonCegarLoop]: Abstraction has 55 states and 68 transitions. [2025-02-06 19:07:38,887 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states and 68 transitions. [2025-02-06 19:07:38,888 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 42. [2025-02-06 19:07:38,890 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 42 states have (on average 1.2619047619047619) internal successors, (53), 41 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:38,890 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 53 transitions. [2025-02-06 19:07:38,890 INFO L240 hiAutomatonCegarLoop]: Abstraction has 42 states and 53 transitions. [2025-02-06 19:07:38,890 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2025-02-06 19:07:38,891 INFO L432 stractBuchiCegarLoop]: Abstraction has 42 states and 53 transitions. [2025-02-06 19:07:38,891 INFO L338 stractBuchiCegarLoop]: ======== Iteration 17 ============ [2025-02-06 19:07:38,891 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 42 states and 53 transitions. [2025-02-06 19:07:38,891 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:38,894 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:38,894 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:38,895 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:07:38,895 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 19:07:38,895 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-02-06 19:07:38,895 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-02-06 19:07:38,895 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:38,895 INFO L85 PathProgramCache]: Analyzing trace with hash 1785078953, now seen corresponding path program 8 times [2025-02-06 19:07:38,895 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:38,895 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [269616528] [2025-02-06 19:07:38,895 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:07:38,896 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:38,901 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 33 statements into 2 equivalence classes. [2025-02-06 19:07:38,911 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 33 of 33 statements. [2025-02-06 19:07:38,911 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-02-06 19:07:38,911 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:39,060 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 21 proven. 44 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:39,061 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:07:39,061 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [269616528] [2025-02-06 19:07:39,061 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [269616528] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:07:39,064 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [885794549] [2025-02-06 19:07:39,064 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:07:39,064 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:39,065 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:39,067 INFO L229 MonitoredProcess]: Starting monitored process 33 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:39,069 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (33)] Waiting until timeout for monitored process [2025-02-06 19:07:39,113 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 33 statements into 2 equivalence classes. [2025-02-06 19:07:39,128 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 33 of 33 statements. [2025-02-06 19:07:39,128 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-02-06 19:07:39,128 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:39,129 INFO L256 TraceCheckSpWp]: Trace formula consists of 165 conjuncts, 14 conjuncts are in the unsatisfiable core [2025-02-06 19:07:39,129 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:39,242 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 30 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:39,242 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:07:39,323 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 30 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:39,323 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [885794549] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:07:39,323 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:07:39,323 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14] total 22 [2025-02-06 19:07:39,323 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1647218926] [2025-02-06 19:07:39,323 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:07:39,323 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:07:39,323 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:39,323 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 14 times [2025-02-06 19:07:39,323 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:39,323 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [931195344] [2025-02-06 19:07:39,323 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:07:39,324 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:39,326 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:39,326 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:39,326 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:07:39,326 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:39,326 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:39,327 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:39,327 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:39,327 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:39,327 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:39,328 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:39,357 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:07:39,357 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2025-02-06 19:07:39,357 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=115, Invalid=347, Unknown=0, NotChecked=0, Total=462 [2025-02-06 19:07:39,358 INFO L87 Difference]: Start difference. First operand 42 states and 53 transitions. cyclomatic complexity: 15 Second operand has 22 states, 22 states have (on average 2.3636363636363638) internal successors, (52), 22 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:39,430 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:07:39,430 INFO L93 Difference]: Finished difference Result 58 states and 70 transitions. [2025-02-06 19:07:39,431 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 58 states and 70 transitions. [2025-02-06 19:07:39,431 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:39,432 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 58 states to 47 states and 59 transitions. [2025-02-06 19:07:39,432 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2025-02-06 19:07:39,432 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2025-02-06 19:07:39,432 INFO L73 IsDeterministic]: Start isDeterministic. Operand 47 states and 59 transitions. [2025-02-06 19:07:39,433 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:07:39,434 INFO L218 hiAutomatonCegarLoop]: Abstraction has 47 states and 59 transitions. [2025-02-06 19:07:39,434 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states and 59 transitions. [2025-02-06 19:07:39,435 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 42. [2025-02-06 19:07:39,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 42 states have (on average 1.2619047619047619) internal successors, (53), 41 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:39,435 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 53 transitions. [2025-02-06 19:07:39,435 INFO L240 hiAutomatonCegarLoop]: Abstraction has 42 states and 53 transitions. [2025-02-06 19:07:39,437 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2025-02-06 19:07:39,437 INFO L432 stractBuchiCegarLoop]: Abstraction has 42 states and 53 transitions. [2025-02-06 19:07:39,439 INFO L338 stractBuchiCegarLoop]: ======== Iteration 18 ============ [2025-02-06 19:07:39,439 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 42 states and 53 transitions. [2025-02-06 19:07:39,440 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:39,440 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:39,440 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:39,440 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:07:39,440 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 19:07:39,440 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume main_#t~mem208#1 > 0;havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-02-06 19:07:39,440 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-02-06 19:07:39,441 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:39,441 INFO L85 PathProgramCache]: Analyzing trace with hash 1979675406, now seen corresponding path program 4 times [2025-02-06 19:07:39,441 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:39,441 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1267848726] [2025-02-06 19:07:39,441 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 19:07:39,441 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:39,449 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 34 statements into 2 equivalence classes. [2025-02-06 19:07:39,459 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) and asserted 33 of 34 statements. [2025-02-06 19:07:39,459 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) [2025-02-06 19:07:39,459 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:39,762 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 71 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:39,762 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:07:39,763 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1267848726] [2025-02-06 19:07:39,763 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1267848726] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:07:39,763 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1868660905] [2025-02-06 19:07:39,763 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 19:07:39,763 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:39,763 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:39,767 INFO L229 MonitoredProcess]: Starting monitored process 34 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:39,767 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (34)] Waiting until timeout for monitored process [2025-02-06 19:07:39,814 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 34 statements into 2 equivalence classes. [2025-02-06 19:07:39,827 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) and asserted 33 of 34 statements. [2025-02-06 19:07:39,827 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) [2025-02-06 19:07:39,827 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:39,828 INFO L256 TraceCheckSpWp]: Trace formula consists of 160 conjuncts, 31 conjuncts are in the unsatisfiable core [2025-02-06 19:07:39,829 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:39,849 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2025-02-06 19:07:39,890 INFO L349 Elim1Store]: treesize reduction 27, result has 25.0 percent of original size [2025-02-06 19:07:39,890 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 13 [2025-02-06 19:07:39,899 INFO L349 Elim1Store]: treesize reduction 27, result has 25.0 percent of original size [2025-02-06 19:07:39,900 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 13 [2025-02-06 19:07:39,984 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 7 [2025-02-06 19:07:39,986 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 71 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:39,986 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:07:40,129 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2025-02-06 19:07:40,131 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 20 [2025-02-06 19:07:40,148 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 71 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:40,148 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1868660905] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:07:40,148 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:07:40,148 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16] total 25 [2025-02-06 19:07:40,148 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1900873588] [2025-02-06 19:07:40,148 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:07:40,149 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:07:40,149 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:40,149 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 15 times [2025-02-06 19:07:40,149 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:40,149 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [315274556] [2025-02-06 19:07:40,149 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:07:40,149 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:40,150 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:40,151 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:40,151 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-06 19:07:40,151 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:40,151 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:40,151 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:40,152 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:40,152 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:40,152 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:40,153 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:40,185 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:07:40,185 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2025-02-06 19:07:40,186 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=75, Invalid=575, Unknown=0, NotChecked=0, Total=650 [2025-02-06 19:07:40,186 INFO L87 Difference]: Start difference. First operand 42 states and 53 transitions. cyclomatic complexity: 15 Second operand has 26 states, 25 states have (on average 2.12) internal successors, (53), 26 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:40,430 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:07:40,430 INFO L93 Difference]: Finished difference Result 52 states and 63 transitions. [2025-02-06 19:07:40,431 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 52 states and 63 transitions. [2025-02-06 19:07:40,431 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:40,431 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 52 states to 51 states and 62 transitions. [2025-02-06 19:07:40,431 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2025-02-06 19:07:40,431 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2025-02-06 19:07:40,431 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 62 transitions. [2025-02-06 19:07:40,432 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:07:40,432 INFO L218 hiAutomatonCegarLoop]: Abstraction has 51 states and 62 transitions. [2025-02-06 19:07:40,432 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 62 transitions. [2025-02-06 19:07:40,432 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 38. [2025-02-06 19:07:40,433 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 38 states have (on average 1.236842105263158) internal successors, (47), 37 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:40,433 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 47 transitions. [2025-02-06 19:07:40,433 INFO L240 hiAutomatonCegarLoop]: Abstraction has 38 states and 47 transitions. [2025-02-06 19:07:40,433 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2025-02-06 19:07:40,434 INFO L432 stractBuchiCegarLoop]: Abstraction has 38 states and 47 transitions. [2025-02-06 19:07:40,434 INFO L338 stractBuchiCegarLoop]: ======== Iteration 19 ============ [2025-02-06 19:07:40,434 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 38 states and 47 transitions. [2025-02-06 19:07:40,434 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:40,434 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:40,434 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:40,438 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 6, 6, 5, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:07:40,438 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 19:07:40,438 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(main_#t~mem208#1 > 0);havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(main_#t~mem210#1 > 0);havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post212#1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-02-06 19:07:40,438 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume main_#t~mem210#1 > 0;havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := main_#t~post211#1 - 1;havoc main_#t~post211#1;" [2025-02-06 19:07:40,438 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:40,438 INFO L85 PathProgramCache]: Analyzing trace with hash 1305105998, now seen corresponding path program 9 times [2025-02-06 19:07:40,438 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:40,438 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1844386923] [2025-02-06 19:07:40,438 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:07:40,438 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:40,447 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 36 statements into 7 equivalence classes. [2025-02-06 19:07:40,461 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) and asserted 36 of 36 statements. [2025-02-06 19:07:40,461 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2025-02-06 19:07:40,461 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:40,823 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 12 proven. 69 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:40,824 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:07:40,824 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1844386923] [2025-02-06 19:07:40,824 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1844386923] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:07:40,824 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [308874958] [2025-02-06 19:07:40,824 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:07:40,824 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:40,824 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:40,828 INFO L229 MonitoredProcess]: Starting monitored process 35 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:40,830 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (35)] Waiting until timeout for monitored process [2025-02-06 19:07:40,874 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 36 statements into 7 equivalence classes. [2025-02-06 19:07:40,905 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) and asserted 36 of 36 statements. [2025-02-06 19:07:40,905 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2025-02-06 19:07:40,905 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:40,908 INFO L256 TraceCheckSpWp]: Trace formula consists of 179 conjuncts, 21 conjuncts are in the unsatisfiable core [2025-02-06 19:07:40,908 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:40,936 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 1 [2025-02-06 19:07:41,191 INFO L349 Elim1Store]: treesize reduction 5, result has 37.5 percent of original size [2025-02-06 19:07:41,191 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 23 treesize of output 10 [2025-02-06 19:07:41,193 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 25 proven. 56 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:41,193 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:07:41,492 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2025-02-06 19:07:41,495 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 16 [2025-02-06 19:07:41,533 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 20 proven. 61 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:41,533 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [308874958] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:07:41,533 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:07:41,533 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17] total 34 [2025-02-06 19:07:41,533 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [899050337] [2025-02-06 19:07:41,533 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:07:41,534 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:07:41,534 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:41,534 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 16 times [2025-02-06 19:07:41,534 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:41,534 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1876102243] [2025-02-06 19:07:41,534 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 19:07:41,534 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:41,536 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-02-06 19:07:41,537 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:41,538 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-06 19:07:41,538 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:41,538 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:41,538 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:41,539 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:41,539 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:41,539 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:41,540 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:41,577 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:07:41,577 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2025-02-06 19:07:41,577 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=215, Invalid=975, Unknown=0, NotChecked=0, Total=1190 [2025-02-06 19:07:41,578 INFO L87 Difference]: Start difference. First operand 38 states and 47 transitions. cyclomatic complexity: 12 Second operand has 35 states, 34 states have (on average 2.0294117647058822) internal successors, (69), 35 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:42,238 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:07:42,238 INFO L93 Difference]: Finished difference Result 56 states and 66 transitions. [2025-02-06 19:07:42,239 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 56 states and 66 transitions. [2025-02-06 19:07:42,239 INFO L131 ngComponentsAnalysis]: Automaton has 0 accepting balls. 0 [2025-02-06 19:07:42,239 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 56 states to 0 states and 0 transitions. [2025-02-06 19:07:42,239 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 0 [2025-02-06 19:07:42,239 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 0 [2025-02-06 19:07:42,239 INFO L73 IsDeterministic]: Start isDeterministic. Operand 0 states and 0 transitions. [2025-02-06 19:07:42,239 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:07:42,239 INFO L218 hiAutomatonCegarLoop]: Abstraction has 0 states and 0 transitions. [2025-02-06 19:07:42,239 INFO L240 hiAutomatonCegarLoop]: Abstraction has 0 states and 0 transitions. [2025-02-06 19:07:42,240 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2025-02-06 19:07:42,240 INFO L432 stractBuchiCegarLoop]: Abstraction has 0 states and 0 transitions. [2025-02-06 19:07:42,240 INFO L338 stractBuchiCegarLoop]: ======== Iteration 20 ============ [2025-02-06 19:07:42,240 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 0 states and 0 transitions. [2025-02-06 19:07:42,240 INFO L131 ngComponentsAnalysis]: Automaton has 0 accepting balls. 0 [2025-02-06 19:07:42,240 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is true [2025-02-06 19:07:42,245 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 06.02 07:07:42 BoogieIcfgContainer [2025-02-06 19:07:42,245 INFO L131 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2025-02-06 19:07:42,246 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-02-06 19:07:42,246 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-02-06 19:07:42,246 INFO L274 PluginConnector]: Witness Printer initialized [2025-02-06 19:07:42,246 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 06.02 07:07:26" (3/4) ... [2025-02-06 19:07:42,248 INFO L149 WitnessPrinter]: No result that supports witness generation found [2025-02-06 19:07:42,248 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-02-06 19:07:42,249 INFO L158 Benchmark]: Toolchain (without parser) took 16366.93ms. Allocated memory was 142.6MB in the beginning and 453.0MB in the end (delta: 310.4MB). Free memory was 106.5MB in the beginning and 400.4MB in the end (delta: -293.9MB). Peak memory consumption was 20.0MB. Max. memory is 16.1GB. [2025-02-06 19:07:42,249 INFO L158 Benchmark]: CDTParser took 0.17ms. Allocated memory is still 201.3MB. Free memory is still 115.6MB. There was no memory consumed. Max. memory is 16.1GB. [2025-02-06 19:07:42,249 INFO L158 Benchmark]: CACSL2BoogieTranslator took 237.19ms. Allocated memory is still 142.6MB. Free memory was 106.5MB in the beginning and 88.4MB in the end (delta: 18.1MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-02-06 19:07:42,249 INFO L158 Benchmark]: Boogie Procedure Inliner took 29.61ms. Allocated memory is still 142.6MB. Free memory was 88.4MB in the beginning and 87.0MB in the end (delta: 1.5MB). There was no memory consumed. Max. memory is 16.1GB. [2025-02-06 19:07:42,249 INFO L158 Benchmark]: Boogie Preprocessor took 23.92ms. Allocated memory is still 142.6MB. Free memory was 87.0MB in the beginning and 85.6MB in the end (delta: 1.4MB). There was no memory consumed. Max. memory is 16.1GB. [2025-02-06 19:07:42,249 INFO L158 Benchmark]: IcfgBuilder took 212.05ms. Allocated memory is still 142.6MB. Free memory was 85.6MB in the beginning and 73.8MB in the end (delta: 11.8MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-02-06 19:07:42,249 INFO L158 Benchmark]: BuchiAutomizer took 15855.77ms. Allocated memory was 142.6MB in the beginning and 453.0MB in the end (delta: 310.4MB). Free memory was 73.8MB in the beginning and 400.5MB in the end (delta: -326.7MB). There was no memory consumed. Max. memory is 16.1GB. [2025-02-06 19:07:42,250 INFO L158 Benchmark]: Witness Printer took 2.29ms. Allocated memory is still 453.0MB. Free memory was 400.5MB in the beginning and 400.4MB in the end (delta: 75.1kB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-02-06 19:07:42,250 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17ms. Allocated memory is still 201.3MB. Free memory is still 115.6MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 237.19ms. Allocated memory is still 142.6MB. Free memory was 106.5MB in the beginning and 88.4MB in the end (delta: 18.1MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 29.61ms. Allocated memory is still 142.6MB. Free memory was 88.4MB in the beginning and 87.0MB in the end (delta: 1.5MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 23.92ms. Allocated memory is still 142.6MB. Free memory was 87.0MB in the beginning and 85.6MB in the end (delta: 1.4MB). There was no memory consumed. Max. memory is 16.1GB. * IcfgBuilder took 212.05ms. Allocated memory is still 142.6MB. Free memory was 85.6MB in the beginning and 73.8MB in the end (delta: 11.8MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * BuchiAutomizer took 15855.77ms. Allocated memory was 142.6MB in the beginning and 453.0MB in the end (delta: 310.4MB). Free memory was 73.8MB in the beginning and 400.5MB in the end (delta: -326.7MB). There was no memory consumed. Max. memory is 16.1GB. * Witness Printer took 2.29ms. Allocated memory is still 453.0MB. Free memory was 400.5MB in the beginning and 400.4MB in the end (delta: 75.1kB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Unknown variable: #length - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#length,GLOBAL] - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Unknown variable: ~arr~0!offset * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 19 terminating modules (17 trivial, 2 deterministic, 0 nondeterministic). One deterministic module has affine ranking function null and consists of 3 locations. One deterministic module has affine ranking function (((long) -1 * j) + length) and consists of 3 locations. 17 modules have a trivial ranking function, the largest among these consists of 38 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 15.8s and 20 iterations. TraceHistogramMax:6. Analysis of lassos took 11.7s. Construction of modules took 1.7s. Büchi inclusion checks took 2.1s. Highest rank in rank-based complementation 3. Minimization of det autom 14. Minimization of nondet autom 5. Automata minimization 0.0s AutomataMinimizationTime, 18 MinimizatonAttempts, 124 StatesRemovedByMinimization, 17 NontrivialMinimizations. Non-live state removal took 0.0s Buchi closure took 0.0s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [2, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 691 SdHoareTripleChecker+Valid, 2.1s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 689 mSDsluCounter, 899 SdHoareTripleChecker+Invalid, 1.8s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 747 mSDsCounter, 255 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 3943 IncrementalHoareTripleChecker+Invalid, 4198 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 255 mSolverCounterUnsat, 152 mSDtfsCounter, 3943 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont0 unkn0 SFLI0 SFLT0 conc10 concLT0 SILN0 SILU7 SILI0 SILT0 lasso2 LassoPreprocessingBenchmarks: Lassos: inital124 mio100 ax100 hnf100 lsp100 ukn74 mio100 lsp54 div137 bol100 ite100 ukn100 eq156 hnf92 smp86 dnf100 smp100 tf100 neg100 sie100 LassoTerminationAnalysisBenchmarks: ConstraintsSatisfiability: unsat Degree: 0 Time: 32ms VariablesStem: 2 VariablesLoop: 0 DisjunctsStem: 1 DisjunctsLoop: 1 SupportingInvariants: 2 MotzkinApplications: 6 LassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Termination proven Buchi Automizer proved that your program is terminating RESULT: Ultimate proved your program to be correct! [2025-02-06 19:07:42,261 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (35)] Ended with exit code 0 [2025-02-06 19:07:42,461 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (34)] Ended with exit code 0 [2025-02-06 19:07:42,666 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (33)] Ended with exit code 0 [2025-02-06 19:07:42,866 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (32)] Ended with exit code 0 [2025-02-06 19:07:43,066 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (31)] Forceful destruction successful, exit code 0 [2025-02-06 19:07:43,269 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2025-02-06 19:07:43,473 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Ended with exit code 0 [2025-02-06 19:07:43,674 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Ended with exit code 0 [2025-02-06 19:07:43,878 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Ended with exit code 0 [2025-02-06 19:07:44,078 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Ended with exit code 0 [2025-02-06 19:07:44,282 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Ended with exit code 0 [2025-02-06 19:07:44,485 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2025-02-06 19:07:44,684 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2025-02-06 19:07:44,888 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2025-02-06 19:07:45,092 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2025-02-06 19:07:45,292 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2025-02-06 19:07:45,494 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Result: TRUE