./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/termination-15/array16_alloca_fixed.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version c00e63dc Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/termination-15/array16_alloca_fixed.i -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 2a580f3a42bca030605af1bbd4c6a77550e46d88a6197c1e34cf45bb050eadef --- Real Ultimate output --- This is Ultimate 0.3.0-?-c00e63d-m [2025-02-06 19:07:35,681 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-02-06 19:07:35,727 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf [2025-02-06 19:07:35,732 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-02-06 19:07:35,734 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-02-06 19:07:35,734 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-02-06 19:07:35,758 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-02-06 19:07:35,758 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-02-06 19:07:35,758 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-02-06 19:07:35,759 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-02-06 19:07:35,760 INFO L153 SettingsManager]: * Use memory slicer=true [2025-02-06 19:07:35,760 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-02-06 19:07:35,760 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-02-06 19:07:35,760 INFO L153 SettingsManager]: * Use SBE=true [2025-02-06 19:07:35,761 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-02-06 19:07:35,761 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-02-06 19:07:35,761 INFO L153 SettingsManager]: * Use old map elimination=false [2025-02-06 19:07:35,761 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-02-06 19:07:35,761 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-02-06 19:07:35,761 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-02-06 19:07:35,761 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-02-06 19:07:35,761 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-02-06 19:07:35,761 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-02-06 19:07:35,761 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-02-06 19:07:35,762 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-02-06 19:07:35,762 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-02-06 19:07:35,762 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-02-06 19:07:35,762 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-02-06 19:07:35,762 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-02-06 19:07:35,762 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-02-06 19:07:35,762 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-02-06 19:07:35,762 INFO L153 SettingsManager]: * Use constant arrays=true [2025-02-06 19:07:35,762 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-02-06 19:07:35,763 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-02-06 19:07:35,763 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-02-06 19:07:35,763 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-02-06 19:07:35,763 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-02-06 19:07:35,763 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2a580f3a42bca030605af1bbd4c6a77550e46d88a6197c1e34cf45bb050eadef [2025-02-06 19:07:35,974 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-02-06 19:07:35,980 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-02-06 19:07:35,981 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-02-06 19:07:35,982 INFO L270 PluginConnector]: Initializing CDTParser... [2025-02-06 19:07:35,982 INFO L274 PluginConnector]: CDTParser initialized [2025-02-06 19:07:35,983 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/termination-15/array16_alloca_fixed.i [2025-02-06 19:07:37,113 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/8c8806075/e582c909125340caac36efd8e1e6ce53/FLAG82555eb8a [2025-02-06 19:07:37,485 INFO L384 CDTParser]: Found 1 translation units. [2025-02-06 19:07:37,486 INFO L180 CDTParser]: Scanning /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/termination-15/array16_alloca_fixed.i [2025-02-06 19:07:37,500 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/8c8806075/e582c909125340caac36efd8e1e6ce53/FLAG82555eb8a [2025-02-06 19:07:37,517 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/8c8806075/e582c909125340caac36efd8e1e6ce53 [2025-02-06 19:07:37,519 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-02-06 19:07:37,520 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-02-06 19:07:37,522 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-02-06 19:07:37,522 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-02-06 19:07:37,526 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-02-06 19:07:37,527 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.02 07:07:37" (1/1) ... [2025-02-06 19:07:37,529 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@96a702a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:07:37, skipping insertion in model container [2025-02-06 19:07:37,530 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.02 07:07:37" (1/1) ... [2025-02-06 19:07:37,549 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-02-06 19:07:37,765 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-06 19:07:37,772 INFO L200 MainTranslator]: Completed pre-run [2025-02-06 19:07:37,804 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-06 19:07:37,823 INFO L204 MainTranslator]: Completed translation [2025-02-06 19:07:37,824 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:07:37 WrapperNode [2025-02-06 19:07:37,825 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-02-06 19:07:37,825 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-02-06 19:07:37,826 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-02-06 19:07:37,826 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-02-06 19:07:37,829 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:07:37" (1/1) ... [2025-02-06 19:07:37,838 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:07:37" (1/1) ... [2025-02-06 19:07:37,853 INFO L138 Inliner]: procedures = 151, calls = 10, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 49 [2025-02-06 19:07:37,854 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-02-06 19:07:37,854 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-02-06 19:07:37,855 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-02-06 19:07:37,855 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-02-06 19:07:37,859 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:07:37" (1/1) ... [2025-02-06 19:07:37,860 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:07:37" (1/1) ... [2025-02-06 19:07:37,861 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:07:37" (1/1) ... [2025-02-06 19:07:37,870 INFO L175 MemorySlicer]: Split 4 memory accesses to 1 slices as follows [4]. 100 percent of accesses are in the largest equivalence class. The 0 initializations are split as follows [0]. The 2 writes are split as follows [2]. [2025-02-06 19:07:37,873 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:07:37" (1/1) ... [2025-02-06 19:07:37,873 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:07:37" (1/1) ... [2025-02-06 19:07:37,879 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:07:37" (1/1) ... [2025-02-06 19:07:37,879 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:07:37" (1/1) ... [2025-02-06 19:07:37,880 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:07:37" (1/1) ... [2025-02-06 19:07:37,880 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:07:37" (1/1) ... [2025-02-06 19:07:37,881 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-02-06 19:07:37,885 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-02-06 19:07:37,885 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-02-06 19:07:37,885 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-02-06 19:07:37,886 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:07:37" (1/1) ... [2025-02-06 19:07:37,889 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:07:37,906 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:37,921 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:07:37,929 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-02-06 19:07:37,947 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2025-02-06 19:07:37,948 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2025-02-06 19:07:37,948 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2025-02-06 19:07:37,948 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2025-02-06 19:07:37,948 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-02-06 19:07:37,948 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-02-06 19:07:37,997 INFO L257 CfgBuilder]: Building ICFG [2025-02-06 19:07:37,998 INFO L287 CfgBuilder]: Building CFG for each procedure with an implementation [2025-02-06 19:07:38,094 INFO L1309 $ProcedureCfgBuilder]: dead code at ProgramPoint L368: call ULTIMATE.dealloc(main_#t~malloc206#1.base, main_#t~malloc206#1.offset);havoc main_#t~malloc206#1.base, main_#t~malloc206#1.offset; [2025-02-06 19:07:38,098 INFO L? ?]: Removed 8 outVars from TransFormulas that were not future-live. [2025-02-06 19:07:38,098 INFO L308 CfgBuilder]: Performing block encoding [2025-02-06 19:07:38,104 INFO L332 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-02-06 19:07:38,104 INFO L337 CfgBuilder]: Removed 0 assume(true) statements. [2025-02-06 19:07:38,105 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 06.02 07:07:38 BoogieIcfgContainer [2025-02-06 19:07:38,105 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-02-06 19:07:38,106 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-02-06 19:07:38,106 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-02-06 19:07:38,110 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-02-06 19:07:38,111 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-06 19:07:38,111 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 06.02 07:07:37" (1/3) ... [2025-02-06 19:07:38,111 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@1f9ff748 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.02 07:07:38, skipping insertion in model container [2025-02-06 19:07:38,112 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-06 19:07:38,112 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:07:37" (2/3) ... [2025-02-06 19:07:38,112 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@1f9ff748 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.02 07:07:38, skipping insertion in model container [2025-02-06 19:07:38,112 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-06 19:07:38,112 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 06.02 07:07:38" (3/3) ... [2025-02-06 19:07:38,113 INFO L363 chiAutomizerObserver]: Analyzing ICFG array16_alloca_fixed.i [2025-02-06 19:07:38,155 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-02-06 19:07:38,155 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-02-06 19:07:38,155 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-02-06 19:07:38,155 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-02-06 19:07:38,155 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-02-06 19:07:38,156 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-02-06 19:07:38,156 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-02-06 19:07:38,156 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-02-06 19:07:38,161 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 13 states, 12 states have (on average 1.5) internal successors, (18), 12 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:38,173 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2025-02-06 19:07:38,174 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:38,174 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:38,178 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1] [2025-02-06 19:07:38,178 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2025-02-06 19:07:38,178 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-02-06 19:07:38,178 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 13 states, 12 states have (on average 1.5) internal successors, (18), 12 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:38,180 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2025-02-06 19:07:38,180 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:38,180 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:38,180 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1] [2025-02-06 19:07:38,180 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2025-02-06 19:07:38,184 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" [2025-02-06 19:07:38,185 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume 0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2);havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" [2025-02-06 19:07:38,188 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:38,188 INFO L85 PathProgramCache]: Analyzing trace with hash 48637714, now seen corresponding path program 1 times [2025-02-06 19:07:38,193 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:38,193 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [143869850] [2025-02-06 19:07:38,193 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:38,194 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:38,242 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 5 statements into 1 equivalence classes. [2025-02-06 19:07:38,261 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 5 of 5 statements. [2025-02-06 19:07:38,262 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:38,262 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:38,262 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:38,268 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 5 statements into 1 equivalence classes. [2025-02-06 19:07:38,273 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 5 of 5 statements. [2025-02-06 19:07:38,276 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:38,276 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:38,286 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:38,289 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:38,290 INFO L85 PathProgramCache]: Analyzing trace with hash 40649, now seen corresponding path program 1 times [2025-02-06 19:07:38,290 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:38,290 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2095990145] [2025-02-06 19:07:38,290 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:38,290 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:38,298 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-02-06 19:07:38,309 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-02-06 19:07:38,310 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:38,310 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:38,310 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:38,313 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-02-06 19:07:38,320 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-02-06 19:07:38,322 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:38,322 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:38,325 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:38,326 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:38,326 INFO L85 PathProgramCache]: Analyzing trace with hash 1562169880, now seen corresponding path program 1 times [2025-02-06 19:07:38,326 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:38,326 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [627037862] [2025-02-06 19:07:38,326 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:38,326 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:38,333 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 8 statements into 1 equivalence classes. [2025-02-06 19:07:38,345 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-02-06 19:07:38,346 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:38,346 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:38,346 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:38,348 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 8 statements into 1 equivalence classes. [2025-02-06 19:07:38,356 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-02-06 19:07:38,356 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:38,356 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:38,359 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:38,564 INFO L204 LassoAnalysis]: Preferences: [2025-02-06 19:07:38,565 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-02-06 19:07:38,565 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-02-06 19:07:38,565 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-02-06 19:07:38,565 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2025-02-06 19:07:38,565 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:07:38,565 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-02-06 19:07:38,565 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-02-06 19:07:38,565 INFO L132 ssoRankerPreferences]: Filename of dumped script: array16_alloca_fixed.i_Iteration1_Lasso [2025-02-06 19:07:38,565 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-02-06 19:07:38,566 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-02-06 19:07:38,574 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:38,579 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:38,700 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:38,702 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:38,704 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:38,705 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:38,707 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:38,709 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:38,711 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:38,713 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:38,714 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:38,883 INFO L259 LassoAnalysis]: Preprocessing complete. [2025-02-06 19:07:38,885 INFO L451 LassoAnalysis]: Using template 'affine'. [2025-02-06 19:07:38,886 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:07:38,886 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:38,888 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:07:38,895 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2025-02-06 19:07:38,895 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:07:38,906 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:07:38,906 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-02-06 19:07:38,907 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:07:38,907 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 19:07:38,907 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:07:38,910 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-02-06 19:07:38,910 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-02-06 19:07:38,911 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 19:07:38,917 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Ended with exit code 0 [2025-02-06 19:07:38,918 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:07:38,918 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:38,920 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:07:38,921 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2025-02-06 19:07:38,922 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:07:38,932 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:07:38,932 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:07:38,933 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 19:07:38,933 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:07:38,939 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-02-06 19:07:38,939 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-02-06 19:07:38,946 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 19:07:38,954 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Ended with exit code 0 [2025-02-06 19:07:38,954 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:07:38,954 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:38,957 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:07:38,958 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2025-02-06 19:07:38,958 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:07:38,968 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:07:38,969 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:07:38,969 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 19:07:38,969 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:07:38,975 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-02-06 19:07:38,975 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-02-06 19:07:38,984 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2025-02-06 19:07:39,006 INFO L443 ModelExtractionUtils]: Simplification made 12 calls to the SMT solver. [2025-02-06 19:07:39,008 INFO L444 ModelExtractionUtils]: 3 out of 19 variables were initially zero. Simplification set additionally 12 variables to zero. [2025-02-06 19:07:39,009 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:07:39,009 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:39,014 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:07:39,015 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2025-02-06 19:07:39,016 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2025-02-06 19:07:39,027 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2025-02-06 19:07:39,027 INFO L474 LassoAnalysis]: Proved termination. [2025-02-06 19:07:39,028 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~arr~0#1.offset, v_rep(select #length ULTIMATE.start_main_~arr~0#1.base)_1, ULTIMATE.start_main_~i~0#1) = -1*ULTIMATE.start_main_~arr~0#1.offset + 1*v_rep(select #length ULTIMATE.start_main_~arr~0#1.base)_1 - 4*ULTIMATE.start_main_~i~0#1 Supporting invariants [] [2025-02-06 19:07:39,035 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2025-02-06 19:07:39,042 INFO L156 tatePredicateManager]: 3 out of 3 supporting invariants were superfluous and have been removed [2025-02-06 19:07:39,054 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #length [2025-02-06 19:07:39,054 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#length,GLOBAL] [2025-02-06 19:07:39,055 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: ~arr~0!offset [2025-02-06 19:07:39,071 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:39,078 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 5 statements into 1 equivalence classes. [2025-02-06 19:07:39,084 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 5 of 5 statements. [2025-02-06 19:07:39,084 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:39,084 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:39,085 INFO L256 TraceCheckSpWp]: Trace formula consists of 26 conjuncts, 2 conjuncts are in the unsatisfiable core [2025-02-06 19:07:39,086 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:39,102 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-02-06 19:07:39,105 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-02-06 19:07:39,105 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:39,105 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:39,105 INFO L256 TraceCheckSpWp]: Trace formula consists of 24 conjuncts, 4 conjuncts are in the unsatisfiable core [2025-02-06 19:07:39,106 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:39,130 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:39,150 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2025-02-06 19:07:39,151 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 13 states, 12 states have (on average 1.5) internal successors, (18), 12 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 3 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:39,188 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 13 states, 12 states have (on average 1.5) internal successors, (18), 12 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 3 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 20 states and 28 transitions. Complement of second has 5 states. [2025-02-06 19:07:39,190 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2025-02-06 19:07:39,194 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.6666666666666665) internal successors, (8), 3 states have internal predecessors, (8), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:39,197 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 13 transitions. [2025-02-06 19:07:39,200 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 13 transitions. Stem has 5 letters. Loop has 3 letters. [2025-02-06 19:07:39,201 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-02-06 19:07:39,201 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 13 transitions. Stem has 8 letters. Loop has 3 letters. [2025-02-06 19:07:39,202 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-02-06 19:07:39,202 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 13 transitions. Stem has 5 letters. Loop has 6 letters. [2025-02-06 19:07:39,202 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-02-06 19:07:39,202 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 20 states and 28 transitions. [2025-02-06 19:07:39,203 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:39,205 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 20 states to 12 states and 17 transitions. [2025-02-06 19:07:39,205 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2025-02-06 19:07:39,206 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9 [2025-02-06 19:07:39,206 INFO L73 IsDeterministic]: Start isDeterministic. Operand 12 states and 17 transitions. [2025-02-06 19:07:39,206 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:07:39,206 INFO L218 hiAutomatonCegarLoop]: Abstraction has 12 states and 17 transitions. [2025-02-06 19:07:39,214 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12 states and 17 transitions. [2025-02-06 19:07:39,220 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12 to 11. [2025-02-06 19:07:39,220 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 11 states have (on average 1.4545454545454546) internal successors, (16), 10 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:39,221 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 16 transitions. [2025-02-06 19:07:39,222 INFO L240 hiAutomatonCegarLoop]: Abstraction has 11 states and 16 transitions. [2025-02-06 19:07:39,222 INFO L432 stractBuchiCegarLoop]: Abstraction has 11 states and 16 transitions. [2025-02-06 19:07:39,222 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-02-06 19:07:39,222 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 11 states and 16 transitions. [2025-02-06 19:07:39,223 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:39,223 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:39,223 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:39,224 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1] [2025-02-06 19:07:39,224 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 19:07:39,224 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" [2025-02-06 19:07:39,224 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" [2025-02-06 19:07:39,225 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:39,225 INFO L85 PathProgramCache]: Analyzing trace with hash 1507769141, now seen corresponding path program 1 times [2025-02-06 19:07:39,225 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:39,225 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [262459477] [2025-02-06 19:07:39,225 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:39,226 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:39,230 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 6 statements into 1 equivalence classes. [2025-02-06 19:07:39,233 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 6 of 6 statements. [2025-02-06 19:07:39,233 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:39,233 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:39,291 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:39,291 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:07:39,292 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [262459477] [2025-02-06 19:07:39,292 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [262459477] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:07:39,292 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:07:39,292 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:07:39,292 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1021154857] [2025-02-06 19:07:39,293 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:07:39,294 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:07:39,294 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:39,294 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 1 times [2025-02-06 19:07:39,294 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:39,294 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1533173264] [2025-02-06 19:07:39,294 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:39,294 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:39,296 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:39,299 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:39,299 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:39,299 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:39,299 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:39,300 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:39,303 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:39,303 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:39,303 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:39,304 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:39,345 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:07:39,347 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-06 19:07:39,347 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2025-02-06 19:07:39,348 INFO L87 Difference]: Start difference. First operand 11 states and 16 transitions. cyclomatic complexity: 7 Second operand has 4 states, 3 states have (on average 2.0) internal successors, (6), 4 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:39,366 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:07:39,366 INFO L93 Difference]: Finished difference Result 13 states and 18 transitions. [2025-02-06 19:07:39,366 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 13 states and 18 transitions. [2025-02-06 19:07:39,367 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:39,367 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 13 states to 13 states and 18 transitions. [2025-02-06 19:07:39,367 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2025-02-06 19:07:39,367 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2025-02-06 19:07:39,367 INFO L73 IsDeterministic]: Start isDeterministic. Operand 13 states and 18 transitions. [2025-02-06 19:07:39,367 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:07:39,367 INFO L218 hiAutomatonCegarLoop]: Abstraction has 13 states and 18 transitions. [2025-02-06 19:07:39,367 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13 states and 18 transitions. [2025-02-06 19:07:39,368 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13 to 11. [2025-02-06 19:07:39,368 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11 states, 11 states have (on average 1.3636363636363635) internal successors, (15), 10 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:39,368 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11 states to 11 states and 15 transitions. [2025-02-06 19:07:39,369 INFO L240 hiAutomatonCegarLoop]: Abstraction has 11 states and 15 transitions. [2025-02-06 19:07:39,369 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-06 19:07:39,369 INFO L432 stractBuchiCegarLoop]: Abstraction has 11 states and 15 transitions. [2025-02-06 19:07:39,369 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-02-06 19:07:39,369 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 11 states and 15 transitions. [2025-02-06 19:07:39,370 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:39,370 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:39,370 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:39,370 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:07:39,370 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 19:07:39,370 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" [2025-02-06 19:07:39,370 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" [2025-02-06 19:07:39,370 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:39,370 INFO L85 PathProgramCache]: Analyzing trace with hash 1182626992, now seen corresponding path program 1 times [2025-02-06 19:07:39,370 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:39,370 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1641316923] [2025-02-06 19:07:39,370 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:39,370 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:39,374 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 9 statements into 1 equivalence classes. [2025-02-06 19:07:39,380 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 9 of 9 statements. [2025-02-06 19:07:39,380 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:39,380 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:39,380 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:39,381 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 9 statements into 1 equivalence classes. [2025-02-06 19:07:39,387 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 9 of 9 statements. [2025-02-06 19:07:39,387 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:39,387 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:39,395 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:39,395 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:39,396 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 2 times [2025-02-06 19:07:39,396 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:39,396 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1255466510] [2025-02-06 19:07:39,396 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:07:39,396 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:39,398 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:39,400 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:39,401 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:07:39,401 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:39,401 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:39,401 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:39,404 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:39,404 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:39,404 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:39,405 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:39,405 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:39,405 INFO L85 PathProgramCache]: Analyzing trace with hash -1661793938, now seen corresponding path program 1 times [2025-02-06 19:07:39,405 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:39,405 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1751439277] [2025-02-06 19:07:39,405 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:39,406 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:39,409 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 11 statements into 1 equivalence classes. [2025-02-06 19:07:39,416 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 11 of 11 statements. [2025-02-06 19:07:39,416 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:39,416 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:39,416 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:39,418 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 11 statements into 1 equivalence classes. [2025-02-06 19:07:39,425 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 11 of 11 statements. [2025-02-06 19:07:39,425 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:39,425 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:39,429 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:39,559 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Ended with exit code 0 [2025-02-06 19:07:39,642 INFO L204 LassoAnalysis]: Preferences: [2025-02-06 19:07:39,643 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-02-06 19:07:39,643 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-02-06 19:07:39,643 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-02-06 19:07:39,643 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2025-02-06 19:07:39,643 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:07:39,643 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-02-06 19:07:39,643 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-02-06 19:07:39,643 INFO L132 ssoRankerPreferences]: Filename of dumped script: array16_alloca_fixed.i_Iteration3_Lasso [2025-02-06 19:07:39,643 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-02-06 19:07:39,643 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-02-06 19:07:39,645 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:39,652 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:39,746 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:39,748 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:39,750 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:39,755 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:39,757 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:39,758 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:39,759 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:39,761 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:39,763 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:07:39,955 INFO L259 LassoAnalysis]: Preprocessing complete. [2025-02-06 19:07:39,955 INFO L451 LassoAnalysis]: Using template 'affine'. [2025-02-06 19:07:39,955 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:07:39,955 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:39,957 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:07:39,962 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2025-02-06 19:07:39,963 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:07:39,974 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:07:39,974 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-02-06 19:07:39,974 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:07:39,974 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 19:07:39,974 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:07:39,975 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-02-06 19:07:39,975 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-02-06 19:07:39,976 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 19:07:39,981 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Ended with exit code 0 [2025-02-06 19:07:39,982 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:07:39,982 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:39,984 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:07:39,985 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2025-02-06 19:07:39,986 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:07:39,997 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:07:39,999 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:07:39,999 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 19:07:39,999 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:07:40,008 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-02-06 19:07:40,008 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-02-06 19:07:40,017 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2025-02-06 19:07:40,036 INFO L443 ModelExtractionUtils]: Simplification made 12 calls to the SMT solver. [2025-02-06 19:07:40,036 INFO L444 ModelExtractionUtils]: 1 out of 19 variables were initially zero. Simplification set additionally 15 variables to zero. [2025-02-06 19:07:40,037 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:07:40,037 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:40,041 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:07:40,042 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2025-02-06 19:07:40,045 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2025-02-06 19:07:40,066 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2025-02-06 19:07:40,066 INFO L474 LassoAnalysis]: Proved termination. [2025-02-06 19:07:40,066 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~length~0#1, ULTIMATE.start_main_~j~0#1) = 1*ULTIMATE.start_main_~length~0#1 - 1*ULTIMATE.start_main_~j~0#1 Supporting invariants [] [2025-02-06 19:07:40,079 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2025-02-06 19:07:40,089 INFO L156 tatePredicateManager]: 3 out of 3 supporting invariants were superfluous and have been removed [2025-02-06 19:07:40,105 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:40,113 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 9 statements into 1 equivalence classes. [2025-02-06 19:07:40,119 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 9 of 9 statements. [2025-02-06 19:07:40,119 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:40,119 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:40,120 INFO L256 TraceCheckSpWp]: Trace formula consists of 44 conjuncts, 2 conjuncts are in the unsatisfiable core [2025-02-06 19:07:40,120 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:40,132 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:40,134 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:40,135 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:40,135 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:40,136 INFO L256 TraceCheckSpWp]: Trace formula consists of 14 conjuncts, 4 conjuncts are in the unsatisfiable core [2025-02-06 19:07:40,136 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:40,147 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:40,148 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2025-02-06 19:07:40,148 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 11 states and 15 transitions. cyclomatic complexity: 6 Second operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 3 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:40,164 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 11 states and 15 transitions. cyclomatic complexity: 6. Second operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 3 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 15 states and 21 transitions. Complement of second has 5 states. [2025-02-06 19:07:40,165 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2025-02-06 19:07:40,165 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.6666666666666665) internal successors, (11), 3 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:40,166 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 13 transitions. [2025-02-06 19:07:40,166 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 13 transitions. Stem has 9 letters. Loop has 2 letters. [2025-02-06 19:07:40,166 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-02-06 19:07:40,166 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 13 transitions. Stem has 11 letters. Loop has 2 letters. [2025-02-06 19:07:40,166 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-02-06 19:07:40,166 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 13 transitions. Stem has 9 letters. Loop has 4 letters. [2025-02-06 19:07:40,166 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-02-06 19:07:40,167 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 15 states and 21 transitions. [2025-02-06 19:07:40,167 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:40,167 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 15 states to 15 states and 21 transitions. [2025-02-06 19:07:40,167 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9 [2025-02-06 19:07:40,167 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2025-02-06 19:07:40,167 INFO L73 IsDeterministic]: Start isDeterministic. Operand 15 states and 21 transitions. [2025-02-06 19:07:40,167 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:07:40,167 INFO L218 hiAutomatonCegarLoop]: Abstraction has 15 states and 21 transitions. [2025-02-06 19:07:40,167 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15 states and 21 transitions. [2025-02-06 19:07:40,168 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15 to 15. [2025-02-06 19:07:40,168 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15 states, 15 states have (on average 1.4) internal successors, (21), 14 states have internal predecessors, (21), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:40,168 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15 states to 15 states and 21 transitions. [2025-02-06 19:07:40,168 INFO L240 hiAutomatonCegarLoop]: Abstraction has 15 states and 21 transitions. [2025-02-06 19:07:40,168 INFO L432 stractBuchiCegarLoop]: Abstraction has 15 states and 21 transitions. [2025-02-06 19:07:40,168 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-02-06 19:07:40,168 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 15 states and 21 transitions. [2025-02-06 19:07:40,168 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:40,168 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:40,168 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:40,169 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:07:40,169 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 19:07:40,169 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1;" [2025-02-06 19:07:40,169 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" [2025-02-06 19:07:40,169 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:40,169 INFO L85 PathProgramCache]: Analyzing trace with hash -1661793937, now seen corresponding path program 1 times [2025-02-06 19:07:40,169 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:40,169 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [562010471] [2025-02-06 19:07:40,169 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:40,169 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:40,177 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 11 statements into 1 equivalence classes. [2025-02-06 19:07:40,198 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 11 of 11 statements. [2025-02-06 19:07:40,198 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:40,198 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:40,401 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Ended with exit code 0 [2025-02-06 19:07:40,607 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:40,607 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:07:40,607 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [562010471] [2025-02-06 19:07:40,607 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [562010471] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:07:40,607 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [424629805] [2025-02-06 19:07:40,607 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:40,607 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:40,608 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:40,609 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:40,611 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2025-02-06 19:07:40,636 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 11 statements into 1 equivalence classes. [2025-02-06 19:07:40,643 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 11 of 11 statements. [2025-02-06 19:07:40,643 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:40,643 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:40,644 INFO L256 TraceCheckSpWp]: Trace formula consists of 55 conjuncts, 13 conjuncts are in the unsatisfiable core [2025-02-06 19:07:40,644 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:40,684 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-02-06 19:07:40,725 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2025-02-06 19:07:40,734 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:40,735 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:07:40,783 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2025-02-06 19:07:40,786 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2025-02-06 19:07:40,788 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:40,789 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [424629805] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:07:40,789 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:07:40,789 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 6, 6] total 15 [2025-02-06 19:07:40,789 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [181371540] [2025-02-06 19:07:40,789 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:07:40,789 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:07:40,789 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:40,789 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 3 times [2025-02-06 19:07:40,789 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:40,790 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [62943133] [2025-02-06 19:07:40,790 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:07:40,790 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:40,794 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:40,800 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:40,800 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-06 19:07:40,800 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:40,800 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:40,801 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:40,804 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:40,806 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:40,806 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:40,808 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:40,847 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:07:40,847 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2025-02-06 19:07:40,848 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=184, Unknown=0, NotChecked=0, Total=240 [2025-02-06 19:07:40,849 INFO L87 Difference]: Start difference. First operand 15 states and 21 transitions. cyclomatic complexity: 9 Second operand has 16 states, 15 states have (on average 1.5333333333333334) internal successors, (23), 16 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:40,951 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:07:40,952 INFO L93 Difference]: Finished difference Result 28 states and 39 transitions. [2025-02-06 19:07:40,952 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 28 states and 39 transitions. [2025-02-06 19:07:40,952 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2025-02-06 19:07:40,953 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 28 states to 27 states and 38 transitions. [2025-02-06 19:07:40,953 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 14 [2025-02-06 19:07:40,953 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 14 [2025-02-06 19:07:40,953 INFO L73 IsDeterministic]: Start isDeterministic. Operand 27 states and 38 transitions. [2025-02-06 19:07:40,953 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:07:40,953 INFO L218 hiAutomatonCegarLoop]: Abstraction has 27 states and 38 transitions. [2025-02-06 19:07:40,953 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states and 38 transitions. [2025-02-06 19:07:40,954 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 20. [2025-02-06 19:07:40,954 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20 states, 20 states have (on average 1.45) internal successors, (29), 19 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:40,955 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 29 transitions. [2025-02-06 19:07:40,955 INFO L240 hiAutomatonCegarLoop]: Abstraction has 20 states and 29 transitions. [2025-02-06 19:07:40,955 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-02-06 19:07:40,955 INFO L432 stractBuchiCegarLoop]: Abstraction has 20 states and 29 transitions. [2025-02-06 19:07:40,955 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-02-06 19:07:40,955 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 20 states and 29 transitions. [2025-02-06 19:07:40,956 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:40,956 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:40,956 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:40,956 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:07:40,956 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 19:07:40,956 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1;" [2025-02-06 19:07:40,956 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" [2025-02-06 19:07:40,956 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:40,956 INFO L85 PathProgramCache]: Analyzing trace with hash 743859885, now seen corresponding path program 1 times [2025-02-06 19:07:40,956 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:40,956 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2814990] [2025-02-06 19:07:40,956 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:40,956 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:40,960 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 13 statements into 1 equivalence classes. [2025-02-06 19:07:40,964 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 13 of 13 statements. [2025-02-06 19:07:40,965 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:40,965 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:41,022 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:41,022 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:07:41,022 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2814990] [2025-02-06 19:07:41,022 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2814990] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:07:41,022 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [393345377] [2025-02-06 19:07:41,023 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:41,023 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:41,023 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:41,025 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:41,029 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2025-02-06 19:07:41,076 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 13 statements into 1 equivalence classes. [2025-02-06 19:07:41,084 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 13 of 13 statements. [2025-02-06 19:07:41,084 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:41,084 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:41,085 INFO L256 TraceCheckSpWp]: Trace formula consists of 67 conjuncts, 6 conjuncts are in the unsatisfiable core [2025-02-06 19:07:41,086 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:41,119 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:41,120 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:07:41,142 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:41,143 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [393345377] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:07:41,143 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:07:41,143 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 10 [2025-02-06 19:07:41,143 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1749902893] [2025-02-06 19:07:41,143 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:07:41,143 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:07:41,143 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:41,143 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 4 times [2025-02-06 19:07:41,144 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:41,144 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [673138017] [2025-02-06 19:07:41,144 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 19:07:41,144 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:41,146 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-02-06 19:07:41,148 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:41,148 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-06 19:07:41,148 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:41,148 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:41,149 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:41,150 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:41,150 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:41,150 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:41,151 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:41,187 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:07:41,187 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-02-06 19:07:41,187 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2025-02-06 19:07:41,188 INFO L87 Difference]: Start difference. First operand 20 states and 29 transitions. cyclomatic complexity: 13 Second operand has 10 states, 10 states have (on average 2.4) internal successors, (24), 10 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:41,218 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:07:41,219 INFO L93 Difference]: Finished difference Result 28 states and 38 transitions. [2025-02-06 19:07:41,219 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 28 states and 38 transitions. [2025-02-06 19:07:41,219 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:41,220 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 28 states to 25 states and 35 transitions. [2025-02-06 19:07:41,220 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2025-02-06 19:07:41,220 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2025-02-06 19:07:41,220 INFO L73 IsDeterministic]: Start isDeterministic. Operand 25 states and 35 transitions. [2025-02-06 19:07:41,220 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:07:41,220 INFO L218 hiAutomatonCegarLoop]: Abstraction has 25 states and 35 transitions. [2025-02-06 19:07:41,220 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states and 35 transitions. [2025-02-06 19:07:41,221 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 22. [2025-02-06 19:07:41,221 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.4090909090909092) internal successors, (31), 21 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:41,221 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 31 transitions. [2025-02-06 19:07:41,221 INFO L240 hiAutomatonCegarLoop]: Abstraction has 22 states and 31 transitions. [2025-02-06 19:07:41,222 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-06 19:07:41,222 INFO L432 stractBuchiCegarLoop]: Abstraction has 22 states and 31 transitions. [2025-02-06 19:07:41,222 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-02-06 19:07:41,222 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 22 states and 31 transitions. [2025-02-06 19:07:41,222 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:41,222 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:41,222 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:41,223 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:07:41,223 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 19:07:41,223 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume 0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2);havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1;" [2025-02-06 19:07:41,223 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" [2025-02-06 19:07:41,223 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:41,223 INFO L85 PathProgramCache]: Analyzing trace with hash 1702227283, now seen corresponding path program 1 times [2025-02-06 19:07:41,223 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:41,223 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1339363847] [2025-02-06 19:07:41,223 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:41,223 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:41,228 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 14 statements into 1 equivalence classes. [2025-02-06 19:07:41,237 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 14 of 14 statements. [2025-02-06 19:07:41,237 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:41,237 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:41,608 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:41,609 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:07:41,609 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1339363847] [2025-02-06 19:07:41,609 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1339363847] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:07:41,609 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1984952284] [2025-02-06 19:07:41,609 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:41,609 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:41,609 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:41,614 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:41,617 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2025-02-06 19:07:41,643 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 14 statements into 1 equivalence classes. [2025-02-06 19:07:41,652 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 14 of 14 statements. [2025-02-06 19:07:41,652 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:41,652 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:41,652 INFO L256 TraceCheckSpWp]: Trace formula consists of 77 conjuncts, 18 conjuncts are in the unsatisfiable core [2025-02-06 19:07:41,654 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:41,668 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-02-06 19:07:41,722 INFO L349 Elim1Store]: treesize reduction 25, result has 21.9 percent of original size [2025-02-06 19:07:41,723 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 13 [2025-02-06 19:07:41,741 INFO L349 Elim1Store]: treesize reduction 25, result has 21.9 percent of original size [2025-02-06 19:07:41,742 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 13 [2025-02-06 19:07:41,777 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2025-02-06 19:07:41,788 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:41,788 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:07:41,993 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 23 [2025-02-06 19:07:42,000 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 44 [2025-02-06 19:07:42,030 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:42,030 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1984952284] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:07:42,030 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:07:42,030 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 8] total 20 [2025-02-06 19:07:42,031 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1515451239] [2025-02-06 19:07:42,031 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:07:42,031 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:07:42,031 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:42,031 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 5 times [2025-02-06 19:07:42,031 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:42,031 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [24011816] [2025-02-06 19:07:42,031 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-06 19:07:42,031 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:42,036 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:42,038 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:42,038 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:07:42,038 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:42,038 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:42,039 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:42,042 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:42,043 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:42,043 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:42,044 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:42,117 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:07:42,117 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2025-02-06 19:07:42,118 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=77, Invalid=343, Unknown=0, NotChecked=0, Total=420 [2025-02-06 19:07:42,118 INFO L87 Difference]: Start difference. First operand 22 states and 31 transitions. cyclomatic complexity: 13 Second operand has 21 states, 20 states have (on average 1.6) internal successors, (32), 21 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:42,333 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:07:42,333 INFO L93 Difference]: Finished difference Result 24 states and 32 transitions. [2025-02-06 19:07:42,333 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 24 states and 32 transitions. [2025-02-06 19:07:42,334 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:42,334 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 24 states to 23 states and 31 transitions. [2025-02-06 19:07:42,334 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2025-02-06 19:07:42,334 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2025-02-06 19:07:42,334 INFO L73 IsDeterministic]: Start isDeterministic. Operand 23 states and 31 transitions. [2025-02-06 19:07:42,334 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:07:42,334 INFO L218 hiAutomatonCegarLoop]: Abstraction has 23 states and 31 transitions. [2025-02-06 19:07:42,334 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states and 31 transitions. [2025-02-06 19:07:42,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 18. [2025-02-06 19:07:42,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18 states, 18 states have (on average 1.3333333333333333) internal successors, (24), 17 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:42,335 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18 states to 18 states and 24 transitions. [2025-02-06 19:07:42,335 INFO L240 hiAutomatonCegarLoop]: Abstraction has 18 states and 24 transitions. [2025-02-06 19:07:42,339 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-02-06 19:07:42,339 INFO L432 stractBuchiCegarLoop]: Abstraction has 18 states and 24 transitions. [2025-02-06 19:07:42,340 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-02-06 19:07:42,340 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 18 states and 24 transitions. [2025-02-06 19:07:42,340 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:42,342 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:42,342 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:42,343 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:07:42,343 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 19:07:42,343 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1;" [2025-02-06 19:07:42,343 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" [2025-02-06 19:07:42,343 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:42,343 INFO L85 PathProgramCache]: Analyzing trace with hash 345382098, now seen corresponding path program 2 times [2025-02-06 19:07:42,343 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:42,343 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [996826658] [2025-02-06 19:07:42,343 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:07:42,343 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:42,349 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 16 statements into 2 equivalence classes. [2025-02-06 19:07:42,361 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 16 of 16 statements. [2025-02-06 19:07:42,361 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-02-06 19:07:42,362 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:42,682 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:42,682 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:07:42,682 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [996826658] [2025-02-06 19:07:42,682 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [996826658] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:07:42,683 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2045732352] [2025-02-06 19:07:42,683 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:07:42,683 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:42,683 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:42,687 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:42,688 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2025-02-06 19:07:42,720 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 16 statements into 2 equivalence classes. [2025-02-06 19:07:42,729 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 16 of 16 statements. [2025-02-06 19:07:42,729 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-02-06 19:07:42,729 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:42,730 INFO L256 TraceCheckSpWp]: Trace formula consists of 82 conjuncts, 21 conjuncts are in the unsatisfiable core [2025-02-06 19:07:42,731 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:42,812 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-02-06 19:07:42,956 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2025-02-06 19:07:42,970 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:42,970 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:07:43,120 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2025-02-06 19:07:43,121 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2025-02-06 19:07:43,148 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:43,148 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2045732352] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:07:43,148 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:07:43,148 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 8] total 21 [2025-02-06 19:07:43,148 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1254471581] [2025-02-06 19:07:43,148 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:07:43,149 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:07:43,149 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:43,149 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 6 times [2025-02-06 19:07:43,149 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:43,149 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1354634405] [2025-02-06 19:07:43,149 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-06 19:07:43,149 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:43,151 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:43,155 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:43,158 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-02-06 19:07:43,159 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:43,159 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:43,160 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:43,161 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:43,161 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:43,161 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:43,162 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:43,230 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:07:43,230 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2025-02-06 19:07:43,231 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=74, Invalid=388, Unknown=0, NotChecked=0, Total=462 [2025-02-06 19:07:43,231 INFO L87 Difference]: Start difference. First operand 18 states and 24 transitions. cyclomatic complexity: 9 Second operand has 22 states, 21 states have (on average 1.7142857142857142) internal successors, (36), 22 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:43,585 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:07:43,585 INFO L93 Difference]: Finished difference Result 39 states and 52 transitions. [2025-02-06 19:07:43,585 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 39 states and 52 transitions. [2025-02-06 19:07:43,586 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2025-02-06 19:07:43,587 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 39 states to 38 states and 51 transitions. [2025-02-06 19:07:43,587 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15 [2025-02-06 19:07:43,587 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 15 [2025-02-06 19:07:43,588 INFO L73 IsDeterministic]: Start isDeterministic. Operand 38 states and 51 transitions. [2025-02-06 19:07:43,588 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:07:43,588 INFO L218 hiAutomatonCegarLoop]: Abstraction has 38 states and 51 transitions. [2025-02-06 19:07:43,588 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states and 51 transitions. [2025-02-06 19:07:43,590 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 25. [2025-02-06 19:07:43,590 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 25 states have (on average 1.36) internal successors, (34), 24 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:43,591 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 34 transitions. [2025-02-06 19:07:43,591 INFO L240 hiAutomatonCegarLoop]: Abstraction has 25 states and 34 transitions. [2025-02-06 19:07:43,591 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2025-02-06 19:07:43,592 INFO L432 stractBuchiCegarLoop]: Abstraction has 25 states and 34 transitions. [2025-02-06 19:07:43,592 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-02-06 19:07:43,592 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 25 states and 34 transitions. [2025-02-06 19:07:43,592 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:43,592 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:43,592 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:43,592 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:07:43,592 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 19:07:43,592 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1;" [2025-02-06 19:07:43,592 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" [2025-02-06 19:07:43,592 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:43,593 INFO L85 PathProgramCache]: Analyzing trace with hash 1199713616, now seen corresponding path program 3 times [2025-02-06 19:07:43,593 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:43,594 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [843189754] [2025-02-06 19:07:43,594 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:07:43,594 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:43,598 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 18 statements into 3 equivalence classes. [2025-02-06 19:07:43,609 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) and asserted 18 of 18 statements. [2025-02-06 19:07:43,610 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2025-02-06 19:07:43,610 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:43,699 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:43,699 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:07:43,699 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [843189754] [2025-02-06 19:07:43,699 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [843189754] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:07:43,699 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [395525240] [2025-02-06 19:07:43,699 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:07:43,699 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:43,699 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:43,701 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:43,703 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2025-02-06 19:07:43,729 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 18 statements into 3 equivalence classes. [2025-02-06 19:07:43,741 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) and asserted 18 of 18 statements. [2025-02-06 19:07:43,741 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2025-02-06 19:07:43,741 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:43,741 INFO L256 TraceCheckSpWp]: Trace formula consists of 94 conjuncts, 8 conjuncts are in the unsatisfiable core [2025-02-06 19:07:43,742 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:43,797 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:43,797 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:07:43,841 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:43,842 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [395525240] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:07:43,843 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:07:43,843 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 13 [2025-02-06 19:07:43,843 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1962821292] [2025-02-06 19:07:43,843 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:07:43,844 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:07:43,844 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:43,844 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 7 times [2025-02-06 19:07:43,844 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:43,844 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2055259319] [2025-02-06 19:07:43,844 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-02-06 19:07:43,844 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:43,845 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:43,847 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:43,848 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:43,848 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:43,848 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:43,848 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:43,851 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:43,851 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:43,851 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:43,852 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:43,899 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:07:43,899 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-02-06 19:07:43,899 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2025-02-06 19:07:43,899 INFO L87 Difference]: Start difference. First operand 25 states and 34 transitions. cyclomatic complexity: 13 Second operand has 13 states, 13 states have (on average 2.3846153846153846) internal successors, (31), 13 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:43,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:07:43,942 INFO L93 Difference]: Finished difference Result 35 states and 45 transitions. [2025-02-06 19:07:43,942 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 35 states and 45 transitions. [2025-02-06 19:07:43,943 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:43,943 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 35 states to 30 states and 40 transitions. [2025-02-06 19:07:43,943 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2025-02-06 19:07:43,943 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2025-02-06 19:07:43,943 INFO L73 IsDeterministic]: Start isDeterministic. Operand 30 states and 40 transitions. [2025-02-06 19:07:43,944 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:07:43,944 INFO L218 hiAutomatonCegarLoop]: Abstraction has 30 states and 40 transitions. [2025-02-06 19:07:43,944 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states and 40 transitions. [2025-02-06 19:07:43,945 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 27. [2025-02-06 19:07:43,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 1.3333333333333333) internal successors, (36), 26 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:43,946 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 36 transitions. [2025-02-06 19:07:43,946 INFO L240 hiAutomatonCegarLoop]: Abstraction has 27 states and 36 transitions. [2025-02-06 19:07:43,946 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-02-06 19:07:43,947 INFO L432 stractBuchiCegarLoop]: Abstraction has 27 states and 36 transitions. [2025-02-06 19:07:43,947 INFO L338 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2025-02-06 19:07:43,947 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 36 transitions. [2025-02-06 19:07:43,948 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:43,948 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:43,948 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:43,948 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:07:43,948 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 19:07:43,949 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume 0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2);havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1;" [2025-02-06 19:07:43,949 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" [2025-02-06 19:07:43,949 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:43,950 INFO L85 PathProgramCache]: Analyzing trace with hash -304267956, now seen corresponding path program 1 times [2025-02-06 19:07:43,950 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:43,950 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [156848148] [2025-02-06 19:07:43,950 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:43,950 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:43,954 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 19 statements into 1 equivalence classes. [2025-02-06 19:07:43,967 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 19 of 19 statements. [2025-02-06 19:07:43,967 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:43,967 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:44,291 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:44,291 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:07:44,291 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [156848148] [2025-02-06 19:07:44,291 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [156848148] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:07:44,291 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1126223530] [2025-02-06 19:07:44,291 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:44,291 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:44,291 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:44,293 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:44,295 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2025-02-06 19:07:44,329 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 19 statements into 1 equivalence classes. [2025-02-06 19:07:44,341 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 19 of 19 statements. [2025-02-06 19:07:44,341 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:44,341 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:44,342 INFO L256 TraceCheckSpWp]: Trace formula consists of 104 conjuncts, 22 conjuncts are in the unsatisfiable core [2025-02-06 19:07:44,343 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:44,367 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2025-02-06 19:07:44,448 INFO L349 Elim1Store]: treesize reduction 27, result has 25.0 percent of original size [2025-02-06 19:07:44,449 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 15 [2025-02-06 19:07:44,471 INFO L349 Elim1Store]: treesize reduction 27, result has 25.0 percent of original size [2025-02-06 19:07:44,471 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 15 [2025-02-06 19:07:44,516 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 9 [2025-02-06 19:07:44,529 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:44,530 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:07:44,669 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2025-02-06 19:07:44,673 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2025-02-06 19:07:44,680 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:44,680 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1126223530] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:07:44,680 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:07:44,680 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10] total 16 [2025-02-06 19:07:44,680 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [149463212] [2025-02-06 19:07:44,680 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:07:44,680 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:07:44,680 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:44,680 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 8 times [2025-02-06 19:07:44,680 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:44,680 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1299741317] [2025-02-06 19:07:44,680 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:07:44,681 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:44,682 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:44,683 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:44,683 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:07:44,685 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:44,685 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:44,686 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:44,687 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:44,687 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:44,687 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:44,688 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:44,724 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:07:44,724 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2025-02-06 19:07:44,724 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=222, Unknown=0, NotChecked=0, Total=272 [2025-02-06 19:07:44,724 INFO L87 Difference]: Start difference. First operand 27 states and 36 transitions. cyclomatic complexity: 13 Second operand has 17 states, 16 states have (on average 2.0) internal successors, (32), 17 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:44,838 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:07:44,838 INFO L93 Difference]: Finished difference Result 31 states and 40 transitions. [2025-02-06 19:07:44,838 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 31 states and 40 transitions. [2025-02-06 19:07:44,839 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:44,839 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 31 states to 30 states and 39 transitions. [2025-02-06 19:07:44,839 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2025-02-06 19:07:44,839 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2025-02-06 19:07:44,839 INFO L73 IsDeterministic]: Start isDeterministic. Operand 30 states and 39 transitions. [2025-02-06 19:07:44,839 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:07:44,839 INFO L218 hiAutomatonCegarLoop]: Abstraction has 30 states and 39 transitions. [2025-02-06 19:07:44,839 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states and 39 transitions. [2025-02-06 19:07:44,840 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 23. [2025-02-06 19:07:44,840 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.3043478260869565) internal successors, (30), 22 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:44,840 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 30 transitions. [2025-02-06 19:07:44,840 INFO L240 hiAutomatonCegarLoop]: Abstraction has 23 states and 30 transitions. [2025-02-06 19:07:44,845 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2025-02-06 19:07:44,846 INFO L432 stractBuchiCegarLoop]: Abstraction has 23 states and 30 transitions. [2025-02-06 19:07:44,846 INFO L338 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2025-02-06 19:07:44,846 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 23 states and 30 transitions. [2025-02-06 19:07:44,846 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:44,846 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:44,846 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:44,847 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:07:44,847 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 19:07:44,847 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1;" [2025-02-06 19:07:44,847 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" [2025-02-06 19:07:44,847 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:44,847 INFO L85 PathProgramCache]: Analyzing trace with hash 2143782475, now seen corresponding path program 4 times [2025-02-06 19:07:44,847 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:44,847 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [372854327] [2025-02-06 19:07:44,847 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 19:07:44,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:44,852 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 21 statements into 2 equivalence classes. [2025-02-06 19:07:44,864 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) and asserted 20 of 21 statements. [2025-02-06 19:07:44,864 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) [2025-02-06 19:07:44,864 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:45,105 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:45,105 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:07:45,105 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [372854327] [2025-02-06 19:07:45,105 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [372854327] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:07:45,105 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [117787064] [2025-02-06 19:07:45,105 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 19:07:45,105 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:45,105 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:45,107 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:45,111 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2025-02-06 19:07:45,142 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 21 statements into 2 equivalence classes. [2025-02-06 19:07:45,152 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) and asserted 20 of 21 statements. [2025-02-06 19:07:45,152 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) [2025-02-06 19:07:45,152 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:45,153 INFO L256 TraceCheckSpWp]: Trace formula consists of 93 conjuncts, 21 conjuncts are in the unsatisfiable core [2025-02-06 19:07:45,154 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:45,168 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2025-02-06 19:07:45,229 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 9 [2025-02-06 19:07:45,237 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:45,238 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:07:45,310 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2025-02-06 19:07:45,311 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2025-02-06 19:07:45,319 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:45,319 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [117787064] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:07:45,319 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:07:45,319 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 10] total 16 [2025-02-06 19:07:45,320 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [333806463] [2025-02-06 19:07:45,320 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:07:45,320 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:07:45,320 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:45,320 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 9 times [2025-02-06 19:07:45,320 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:45,320 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1040230450] [2025-02-06 19:07:45,320 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:07:45,320 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:45,322 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:45,323 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:45,323 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-06 19:07:45,323 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:45,323 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:45,324 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:45,329 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:45,329 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:45,329 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:45,329 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:45,381 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:07:45,386 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2025-02-06 19:07:45,386 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=226, Unknown=0, NotChecked=0, Total=272 [2025-02-06 19:07:45,386 INFO L87 Difference]: Start difference. First operand 23 states and 30 transitions. cyclomatic complexity: 10 Second operand has 17 states, 16 states have (on average 2.0625) internal successors, (33), 17 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:45,534 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:07:45,534 INFO L93 Difference]: Finished difference Result 40 states and 52 transitions. [2025-02-06 19:07:45,534 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 40 states and 52 transitions. [2025-02-06 19:07:45,534 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2025-02-06 19:07:45,535 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 40 states to 39 states and 51 transitions. [2025-02-06 19:07:45,535 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 14 [2025-02-06 19:07:45,535 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 14 [2025-02-06 19:07:45,535 INFO L73 IsDeterministic]: Start isDeterministic. Operand 39 states and 51 transitions. [2025-02-06 19:07:45,535 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:07:45,535 INFO L218 hiAutomatonCegarLoop]: Abstraction has 39 states and 51 transitions. [2025-02-06 19:07:45,535 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states and 51 transitions. [2025-02-06 19:07:45,536 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 30. [2025-02-06 19:07:45,536 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30 states, 30 states have (on average 1.3333333333333333) internal successors, (40), 29 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:45,537 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 40 transitions. [2025-02-06 19:07:45,537 INFO L240 hiAutomatonCegarLoop]: Abstraction has 30 states and 40 transitions. [2025-02-06 19:07:45,537 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-02-06 19:07:45,537 INFO L432 stractBuchiCegarLoop]: Abstraction has 30 states and 40 transitions. [2025-02-06 19:07:45,537 INFO L338 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2025-02-06 19:07:45,537 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 30 states and 40 transitions. [2025-02-06 19:07:45,538 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:45,538 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:45,538 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:45,538 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:07:45,538 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 19:07:45,538 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1;" [2025-02-06 19:07:45,538 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" [2025-02-06 19:07:45,539 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:45,539 INFO L85 PathProgramCache]: Analyzing trace with hash -1409344375, now seen corresponding path program 5 times [2025-02-06 19:07:45,539 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:45,539 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1039062390] [2025-02-06 19:07:45,539 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-06 19:07:45,539 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:45,543 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 23 statements into 4 equivalence classes. [2025-02-06 19:07:45,558 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) and asserted 23 of 23 statements. [2025-02-06 19:07:45,561 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2025-02-06 19:07:45,562 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:45,691 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 9 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:45,692 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:07:45,692 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1039062390] [2025-02-06 19:07:45,692 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1039062390] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:07:45,692 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [924394248] [2025-02-06 19:07:45,692 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-06 19:07:45,692 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:45,692 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:45,698 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:45,699 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2025-02-06 19:07:45,751 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 23 statements into 4 equivalence classes. [2025-02-06 19:07:45,768 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) and asserted 23 of 23 statements. [2025-02-06 19:07:45,768 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2025-02-06 19:07:45,768 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:45,769 INFO L256 TraceCheckSpWp]: Trace formula consists of 121 conjuncts, 10 conjuncts are in the unsatisfiable core [2025-02-06 19:07:45,769 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:45,830 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 12 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:45,830 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:07:45,876 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 9 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:45,876 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [924394248] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:07:45,876 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:07:45,876 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11] total 15 [2025-02-06 19:07:45,876 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1139595065] [2025-02-06 19:07:45,876 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:07:45,877 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:07:45,877 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:45,877 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 10 times [2025-02-06 19:07:45,877 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:45,877 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1024703791] [2025-02-06 19:07:45,877 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 19:07:45,877 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:45,879 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-02-06 19:07:45,880 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:45,880 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-06 19:07:45,880 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:45,880 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:45,881 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:45,882 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:45,882 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:45,882 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:45,883 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:45,918 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:07:45,918 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2025-02-06 19:07:45,918 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=151, Unknown=0, NotChecked=0, Total=210 [2025-02-06 19:07:45,918 INFO L87 Difference]: Start difference. First operand 30 states and 40 transitions. cyclomatic complexity: 14 Second operand has 15 states, 15 states have (on average 2.0) internal successors, (30), 15 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:46,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:07:46,016 INFO L93 Difference]: Finished difference Result 72 states and 93 transitions. [2025-02-06 19:07:46,016 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 72 states and 93 transitions. [2025-02-06 19:07:46,016 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2025-02-06 19:07:46,017 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 72 states to 64 states and 83 transitions. [2025-02-06 19:07:46,017 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 23 [2025-02-06 19:07:46,017 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 27 [2025-02-06 19:07:46,017 INFO L73 IsDeterministic]: Start isDeterministic. Operand 64 states and 83 transitions. [2025-02-06 19:07:46,017 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:07:46,017 INFO L218 hiAutomatonCegarLoop]: Abstraction has 64 states and 83 transitions. [2025-02-06 19:07:46,017 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states and 83 transitions. [2025-02-06 19:07:46,023 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 58. [2025-02-06 19:07:46,023 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 58 states, 58 states have (on average 1.3103448275862069) internal successors, (76), 57 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:46,023 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 76 transitions. [2025-02-06 19:07:46,024 INFO L240 hiAutomatonCegarLoop]: Abstraction has 58 states and 76 transitions. [2025-02-06 19:07:46,024 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2025-02-06 19:07:46,024 INFO L432 stractBuchiCegarLoop]: Abstraction has 58 states and 76 transitions. [2025-02-06 19:07:46,025 INFO L338 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2025-02-06 19:07:46,025 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 58 states and 76 transitions. [2025-02-06 19:07:46,025 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 [2025-02-06 19:07:46,025 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:46,025 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:46,026 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:07:46,028 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 1, 1] [2025-02-06 19:07:46,028 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume main_~length~0#1 < 1;main_~length~0#1 := 1;" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume 0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2);havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" [2025-02-06 19:07:46,029 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" [2025-02-06 19:07:46,029 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:46,029 INFO L85 PathProgramCache]: Analyzing trace with hash -694080175, now seen corresponding path program 1 times [2025-02-06 19:07:46,029 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:46,029 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1376125937] [2025-02-06 19:07:46,029 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:46,029 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:46,033 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 22 statements into 1 equivalence classes. [2025-02-06 19:07:46,038 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 22 of 22 statements. [2025-02-06 19:07:46,039 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:46,039 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:46,088 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2025-02-06 19:07:46,088 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:07:46,088 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1376125937] [2025-02-06 19:07:46,088 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1376125937] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:07:46,088 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1498502872] [2025-02-06 19:07:46,088 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:46,088 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:46,088 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:46,090 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:46,092 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2025-02-06 19:07:46,128 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 22 statements into 1 equivalence classes. [2025-02-06 19:07:46,140 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 22 of 22 statements. [2025-02-06 19:07:46,140 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:46,140 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:46,141 INFO L256 TraceCheckSpWp]: Trace formula consists of 122 conjuncts, 4 conjuncts are in the unsatisfiable core [2025-02-06 19:07:46,141 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:46,164 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2025-02-06 19:07:46,164 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-02-06 19:07:46,164 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1498502872] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:07:46,164 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-02-06 19:07:46,164 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 7 [2025-02-06 19:07:46,164 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1218740498] [2025-02-06 19:07:46,164 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:07:46,165 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:07:46,165 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:46,165 INFO L85 PathProgramCache]: Analyzing trace with hash 1107262, now seen corresponding path program 1 times [2025-02-06 19:07:46,165 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:46,165 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [454093128] [2025-02-06 19:07:46,165 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:46,165 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:46,167 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 4 statements into 1 equivalence classes. [2025-02-06 19:07:46,169 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 4 of 4 statements. [2025-02-06 19:07:46,169 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:46,169 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:46,169 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:46,169 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 4 statements into 1 equivalence classes. [2025-02-06 19:07:46,171 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 4 of 4 statements. [2025-02-06 19:07:46,171 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:46,171 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:46,172 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:46,243 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:07:46,244 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-06 19:07:46,244 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2025-02-06 19:07:46,244 INFO L87 Difference]: Start difference. First operand 58 states and 76 transitions. cyclomatic complexity: 25 Second operand has 5 states, 5 states have (on average 3.2) internal successors, (16), 5 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:46,260 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:07:46,260 INFO L93 Difference]: Finished difference Result 38 states and 48 transitions. [2025-02-06 19:07:46,260 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 38 states and 48 transitions. [2025-02-06 19:07:46,260 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:46,261 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 38 states to 32 states and 41 transitions. [2025-02-06 19:07:46,261 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2025-02-06 19:07:46,261 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2025-02-06 19:07:46,261 INFO L73 IsDeterministic]: Start isDeterministic. Operand 32 states and 41 transitions. [2025-02-06 19:07:46,261 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:07:46,261 INFO L218 hiAutomatonCegarLoop]: Abstraction has 32 states and 41 transitions. [2025-02-06 19:07:46,261 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states and 41 transitions. [2025-02-06 19:07:46,262 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. [2025-02-06 19:07:46,262 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 32 states have (on average 1.28125) internal successors, (41), 31 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:46,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 41 transitions. [2025-02-06 19:07:46,263 INFO L240 hiAutomatonCegarLoop]: Abstraction has 32 states and 41 transitions. [2025-02-06 19:07:46,263 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-06 19:07:46,263 INFO L432 stractBuchiCegarLoop]: Abstraction has 32 states and 41 transitions. [2025-02-06 19:07:46,263 INFO L338 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2025-02-06 19:07:46,264 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 32 states and 41 transitions. [2025-02-06 19:07:46,264 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:46,264 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:46,264 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:46,264 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:07:46,264 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 19:07:46,264 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume 0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2);havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1;" [2025-02-06 19:07:46,264 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" [2025-02-06 19:07:46,265 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:46,265 INFO L85 PathProgramCache]: Analyzing trace with hash 965793903, now seen corresponding path program 2 times [2025-02-06 19:07:46,265 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:46,265 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1686816241] [2025-02-06 19:07:46,265 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:07:46,265 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:46,270 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 24 statements into 2 equivalence classes. [2025-02-06 19:07:46,280 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 24 of 24 statements. [2025-02-06 19:07:46,280 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-02-06 19:07:46,280 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:46,675 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:46,675 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:07:46,675 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1686816241] [2025-02-06 19:07:46,675 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1686816241] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:07:46,675 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [647159618] [2025-02-06 19:07:46,675 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:07:46,675 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:46,675 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:46,682 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:46,684 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2025-02-06 19:07:46,751 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 24 statements into 2 equivalence classes. [2025-02-06 19:07:46,775 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 24 of 24 statements. [2025-02-06 19:07:46,775 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-02-06 19:07:46,775 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:46,776 INFO L256 TraceCheckSpWp]: Trace formula consists of 131 conjuncts, 30 conjuncts are in the unsatisfiable core [2025-02-06 19:07:46,778 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:46,875 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-02-06 19:07:46,986 INFO L190 IndexEqualityManager]: detected not equals via solver [2025-02-06 19:07:46,987 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 13 [2025-02-06 19:07:46,999 INFO L190 IndexEqualityManager]: detected not equals via solver [2025-02-06 19:07:47,000 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 13 [2025-02-06 19:07:47,116 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2025-02-06 19:07:47,126 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:47,127 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:07:47,263 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 20 [2025-02-06 19:07:47,265 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2025-02-06 19:07:47,276 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:47,276 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [647159618] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:07:47,276 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:07:47,276 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 13, 12] total 26 [2025-02-06 19:07:47,276 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [274602930] [2025-02-06 19:07:47,277 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:07:47,277 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:07:47,277 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:47,277 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 11 times [2025-02-06 19:07:47,277 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:47,277 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [545701428] [2025-02-06 19:07:47,277 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-06 19:07:47,277 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:47,279 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:47,280 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:47,280 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:07:47,280 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:47,280 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:47,281 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:47,281 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:47,281 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:47,281 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:47,282 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:47,318 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:07:47,318 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2025-02-06 19:07:47,319 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=102, Invalid=600, Unknown=0, NotChecked=0, Total=702 [2025-02-06 19:07:47,319 INFO L87 Difference]: Start difference. First operand 32 states and 41 transitions. cyclomatic complexity: 13 Second operand has 27 states, 26 states have (on average 1.9230769230769231) internal successors, (50), 27 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:47,501 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:07:47,501 INFO L93 Difference]: Finished difference Result 38 states and 47 transitions. [2025-02-06 19:07:47,501 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 38 states and 47 transitions. [2025-02-06 19:07:47,502 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:47,502 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 38 states to 37 states and 46 transitions. [2025-02-06 19:07:47,502 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2025-02-06 19:07:47,502 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2025-02-06 19:07:47,502 INFO L73 IsDeterministic]: Start isDeterministic. Operand 37 states and 46 transitions. [2025-02-06 19:07:47,502 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:07:47,502 INFO L218 hiAutomatonCegarLoop]: Abstraction has 37 states and 46 transitions. [2025-02-06 19:07:47,502 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states and 46 transitions. [2025-02-06 19:07:47,503 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 28. [2025-02-06 19:07:47,503 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 28 states have (on average 1.25) internal successors, (35), 27 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:47,503 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 35 transitions. [2025-02-06 19:07:47,503 INFO L240 hiAutomatonCegarLoop]: Abstraction has 28 states and 35 transitions. [2025-02-06 19:07:47,504 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2025-02-06 19:07:47,504 INFO L432 stractBuchiCegarLoop]: Abstraction has 28 states and 35 transitions. [2025-02-06 19:07:47,504 INFO L338 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2025-02-06 19:07:47,504 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 28 states and 35 transitions. [2025-02-06 19:07:47,504 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:47,504 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:47,504 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:47,505 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:07:47,505 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 19:07:47,505 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1;" [2025-02-06 19:07:47,505 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" [2025-02-06 19:07:47,505 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:47,505 INFO L85 PathProgramCache]: Analyzing trace with hash -1381947282, now seen corresponding path program 6 times [2025-02-06 19:07:47,505 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:47,505 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1357143043] [2025-02-06 19:07:47,505 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-06 19:07:47,506 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:47,509 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 26 statements into 5 equivalence classes. [2025-02-06 19:07:47,521 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) and asserted 26 of 26 statements. [2025-02-06 19:07:47,521 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2025-02-06 19:07:47,522 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:48,052 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 2 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:48,053 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:07:48,053 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1357143043] [2025-02-06 19:07:48,053 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1357143043] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:07:48,053 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [24258756] [2025-02-06 19:07:48,053 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-06 19:07:48,053 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:48,053 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:48,059 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:48,064 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2025-02-06 19:07:48,129 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 26 statements into 5 equivalence classes. [2025-02-06 19:07:48,159 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) and asserted 26 of 26 statements. [2025-02-06 19:07:48,159 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2025-02-06 19:07:48,159 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:48,165 INFO L256 TraceCheckSpWp]: Trace formula consists of 136 conjuncts, 29 conjuncts are in the unsatisfiable core [2025-02-06 19:07:48,167 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:48,301 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-02-06 19:07:48,529 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2025-02-06 19:07:48,548 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:48,548 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:07:48,713 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2025-02-06 19:07:48,718 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2025-02-06 19:07:48,783 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:48,783 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [24258756] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:07:48,783 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:07:48,783 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 12] total 33 [2025-02-06 19:07:48,783 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [863614365] [2025-02-06 19:07:48,784 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:07:48,784 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:07:48,784 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:48,784 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 12 times [2025-02-06 19:07:48,784 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:48,784 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [601722686] [2025-02-06 19:07:48,784 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-06 19:07:48,784 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:48,786 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:48,789 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:48,789 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-02-06 19:07:48,789 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:48,789 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:48,790 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:48,790 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:48,790 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:48,790 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:48,792 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:48,827 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:07:48,827 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2025-02-06 19:07:48,828 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=136, Invalid=986, Unknown=0, NotChecked=0, Total=1122 [2025-02-06 19:07:48,828 INFO L87 Difference]: Start difference. First operand 28 states and 35 transitions. cyclomatic complexity: 10 Second operand has 34 states, 33 states have (on average 2.0) internal successors, (66), 34 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:49,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:07:49,519 INFO L93 Difference]: Finished difference Result 63 states and 77 transitions. [2025-02-06 19:07:49,519 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 63 states and 77 transitions. [2025-02-06 19:07:49,520 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2025-02-06 19:07:49,521 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 63 states to 50 states and 63 transitions. [2025-02-06 19:07:49,521 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 14 [2025-02-06 19:07:49,521 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 14 [2025-02-06 19:07:49,521 INFO L73 IsDeterministic]: Start isDeterministic. Operand 50 states and 63 transitions. [2025-02-06 19:07:49,521 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:07:49,521 INFO L218 hiAutomatonCegarLoop]: Abstraction has 50 states and 63 transitions. [2025-02-06 19:07:49,522 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states and 63 transitions. [2025-02-06 19:07:49,523 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 37. [2025-02-06 19:07:49,524 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 37 states have (on average 1.2702702702702702) internal successors, (47), 36 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:49,524 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 47 transitions. [2025-02-06 19:07:49,524 INFO L240 hiAutomatonCegarLoop]: Abstraction has 37 states and 47 transitions. [2025-02-06 19:07:49,524 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2025-02-06 19:07:49,525 INFO L432 stractBuchiCegarLoop]: Abstraction has 37 states and 47 transitions. [2025-02-06 19:07:49,525 INFO L338 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2025-02-06 19:07:49,525 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 37 states and 47 transitions. [2025-02-06 19:07:49,525 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:49,525 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:49,525 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:49,526 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:07:49,526 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 19:07:49,526 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume 0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2);havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1;" [2025-02-06 19:07:49,526 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" [2025-02-06 19:07:49,526 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:49,526 INFO L85 PathProgramCache]: Analyzing trace with hash 558015400, now seen corresponding path program 3 times [2025-02-06 19:07:49,526 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:49,526 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1410533662] [2025-02-06 19:07:49,526 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:07:49,526 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:49,531 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 29 statements into 6 equivalence classes. [2025-02-06 19:07:49,556 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) and asserted 29 of 29 statements. [2025-02-06 19:07:49,556 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2025-02-06 19:07:49,556 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:49,988 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 0 proven. 47 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:49,989 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:07:49,989 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1410533662] [2025-02-06 19:07:49,989 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1410533662] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:07:49,989 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2054311947] [2025-02-06 19:07:49,989 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:07:49,989 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:49,989 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:49,993 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:49,997 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2025-02-06 19:07:50,034 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 29 statements into 6 equivalence classes. [2025-02-06 19:07:50,058 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) and asserted 29 of 29 statements. [2025-02-06 19:07:50,058 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2025-02-06 19:07:50,058 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:50,059 INFO L256 TraceCheckSpWp]: Trace formula consists of 158 conjuncts, 34 conjuncts are in the unsatisfiable core [2025-02-06 19:07:50,067 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:50,229 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-02-06 19:07:50,312 INFO L190 IndexEqualityManager]: detected not equals via solver [2025-02-06 19:07:50,312 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 13 [2025-02-06 19:07:50,320 INFO L190 IndexEqualityManager]: detected not equals via solver [2025-02-06 19:07:50,321 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 13 [2025-02-06 19:07:50,465 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2025-02-06 19:07:50,479 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 0 proven. 47 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:50,480 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:07:50,667 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2025-02-06 19:07:50,669 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2025-02-06 19:07:50,681 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 0 proven. 47 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:50,681 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2054311947] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:07:50,681 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:07:50,681 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 15, 14] total 30 [2025-02-06 19:07:50,682 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [272988690] [2025-02-06 19:07:50,682 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:07:50,682 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:07:50,682 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:50,682 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 13 times [2025-02-06 19:07:50,682 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:50,682 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019525145] [2025-02-06 19:07:50,682 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-02-06 19:07:50,682 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:50,684 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:50,686 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:50,686 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:50,686 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:50,686 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:50,686 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:50,687 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:50,687 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:50,687 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:50,688 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:50,727 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:07:50,729 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2025-02-06 19:07:50,729 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=115, Invalid=815, Unknown=0, NotChecked=0, Total=930 [2025-02-06 19:07:50,729 INFO L87 Difference]: Start difference. First operand 37 states and 47 transitions. cyclomatic complexity: 14 Second operand has 31 states, 30 states have (on average 2.0) internal successors, (60), 31 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:51,002 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:07:51,002 INFO L93 Difference]: Finished difference Result 45 states and 55 transitions. [2025-02-06 19:07:51,002 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 45 states and 55 transitions. [2025-02-06 19:07:51,002 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:51,003 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 45 states to 44 states and 54 transitions. [2025-02-06 19:07:51,003 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2025-02-06 19:07:51,003 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2025-02-06 19:07:51,003 INFO L73 IsDeterministic]: Start isDeterministic. Operand 44 states and 54 transitions. [2025-02-06 19:07:51,003 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:07:51,003 INFO L218 hiAutomatonCegarLoop]: Abstraction has 44 states and 54 transitions. [2025-02-06 19:07:51,003 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states and 54 transitions. [2025-02-06 19:07:51,006 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 33. [2025-02-06 19:07:51,006 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33 states, 33 states have (on average 1.2424242424242424) internal successors, (41), 32 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:51,006 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 41 transitions. [2025-02-06 19:07:51,006 INFO L240 hiAutomatonCegarLoop]: Abstraction has 33 states and 41 transitions. [2025-02-06 19:07:51,006 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2025-02-06 19:07:51,007 INFO L432 stractBuchiCegarLoop]: Abstraction has 33 states and 41 transitions. [2025-02-06 19:07:51,007 INFO L338 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2025-02-06 19:07:51,007 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 33 states and 41 transitions. [2025-02-06 19:07:51,007 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:51,007 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:51,007 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:51,007 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 5, 5, 4, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:07:51,007 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 19:07:51,008 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1;" [2025-02-06 19:07:51,008 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" [2025-02-06 19:07:51,008 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:51,008 INFO L85 PathProgramCache]: Analyzing trace with hash -911516377, now seen corresponding path program 7 times [2025-02-06 19:07:51,008 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:51,008 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [822197414] [2025-02-06 19:07:51,008 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-02-06 19:07:51,008 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:51,012 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 31 statements into 1 equivalence classes. [2025-02-06 19:07:51,032 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 31 of 31 statements. [2025-02-06 19:07:51,032 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:51,032 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:51,505 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:51,506 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:07:51,506 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [822197414] [2025-02-06 19:07:51,506 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [822197414] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:07:51,506 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1451583631] [2025-02-06 19:07:51,506 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-02-06 19:07:51,506 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:51,506 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:51,508 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:51,510 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2025-02-06 19:07:51,547 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 31 statements into 1 equivalence classes. [2025-02-06 19:07:51,564 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 31 of 31 statements. [2025-02-06 19:07:51,565 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:51,565 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:51,566 INFO L256 TraceCheckSpWp]: Trace formula consists of 163 conjuncts, 36 conjuncts are in the unsatisfiable core [2025-02-06 19:07:51,568 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:51,570 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 3 [2025-02-06 19:07:51,577 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 3 [2025-02-06 19:07:51,592 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2025-02-06 19:07:51,698 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 9 [2025-02-06 19:07:51,708 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:51,708 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:07:51,773 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2025-02-06 19:07:51,775 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2025-02-06 19:07:51,802 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:51,802 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1451583631] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:07:51,802 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:07:51,802 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 14, 15] total 23 [2025-02-06 19:07:51,803 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [948104780] [2025-02-06 19:07:51,803 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:07:51,803 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:07:51,803 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:51,804 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 14 times [2025-02-06 19:07:51,804 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:51,804 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1161705667] [2025-02-06 19:07:51,804 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:07:51,804 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:51,805 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:51,807 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:51,807 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:07:51,807 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:51,807 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:51,808 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:51,808 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:51,809 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:51,809 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:51,809 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:51,844 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:07:51,844 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2025-02-06 19:07:51,844 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=483, Unknown=0, NotChecked=0, Total=552 [2025-02-06 19:07:51,844 INFO L87 Difference]: Start difference. First operand 33 states and 41 transitions. cyclomatic complexity: 11 Second operand has 24 states, 23 states have (on average 2.130434782608696) internal successors, (49), 24 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:52,077 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:07:52,078 INFO L93 Difference]: Finished difference Result 54 states and 67 transitions. [2025-02-06 19:07:52,078 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 54 states and 67 transitions. [2025-02-06 19:07:52,078 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2025-02-06 19:07:52,078 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 54 states to 53 states and 66 transitions. [2025-02-06 19:07:52,078 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 14 [2025-02-06 19:07:52,078 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 14 [2025-02-06 19:07:52,078 INFO L73 IsDeterministic]: Start isDeterministic. Operand 53 states and 66 transitions. [2025-02-06 19:07:52,079 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:07:52,079 INFO L218 hiAutomatonCegarLoop]: Abstraction has 53 states and 66 transitions. [2025-02-06 19:07:52,079 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states and 66 transitions. [2025-02-06 19:07:52,079 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 40. [2025-02-06 19:07:52,080 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 40 states, 40 states have (on average 1.275) internal successors, (51), 39 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:52,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 51 transitions. [2025-02-06 19:07:52,080 INFO L240 hiAutomatonCegarLoop]: Abstraction has 40 states and 51 transitions. [2025-02-06 19:07:52,083 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2025-02-06 19:07:52,083 INFO L432 stractBuchiCegarLoop]: Abstraction has 40 states and 51 transitions. [2025-02-06 19:07:52,083 INFO L338 stractBuchiCegarLoop]: ======== Iteration 17 ============ [2025-02-06 19:07:52,083 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 40 states and 51 transitions. [2025-02-06 19:07:52,084 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:52,084 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:52,084 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:52,084 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:07:52,084 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 19:07:52,084 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1;" [2025-02-06 19:07:52,084 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" [2025-02-06 19:07:52,085 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:52,085 INFO L85 PathProgramCache]: Analyzing trace with hash 206089317, now seen corresponding path program 8 times [2025-02-06 19:07:52,085 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:52,085 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [112991499] [2025-02-06 19:07:52,085 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:07:52,085 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:52,093 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 33 statements into 2 equivalence classes. [2025-02-06 19:07:52,103 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 33 of 33 statements. [2025-02-06 19:07:52,104 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-02-06 19:07:52,104 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:52,366 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 21 proven. 44 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:52,366 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:07:52,366 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [112991499] [2025-02-06 19:07:52,366 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [112991499] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:07:52,366 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [672067917] [2025-02-06 19:07:52,366 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:07:52,366 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:52,366 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:52,368 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:52,370 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2025-02-06 19:07:52,415 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 33 statements into 2 equivalence classes. [2025-02-06 19:07:52,434 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 33 of 33 statements. [2025-02-06 19:07:52,434 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-02-06 19:07:52,434 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:52,435 INFO L256 TraceCheckSpWp]: Trace formula consists of 175 conjuncts, 14 conjuncts are in the unsatisfiable core [2025-02-06 19:07:52,437 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:52,674 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 30 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:52,674 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:07:52,800 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 30 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:52,800 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [672067917] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:07:52,800 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:07:52,800 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14] total 22 [2025-02-06 19:07:52,800 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1689756508] [2025-02-06 19:07:52,800 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:07:52,801 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:07:52,801 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:52,801 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 15 times [2025-02-06 19:07:52,801 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:52,801 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1005367838] [2025-02-06 19:07:52,801 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:07:52,801 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:52,803 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:52,804 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:52,804 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-06 19:07:52,804 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:52,804 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:52,804 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:52,805 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:52,805 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:52,805 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:52,806 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:52,843 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:07:52,844 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2025-02-06 19:07:52,844 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=115, Invalid=347, Unknown=0, NotChecked=0, Total=462 [2025-02-06 19:07:52,845 INFO L87 Difference]: Start difference. First operand 40 states and 51 transitions. cyclomatic complexity: 15 Second operand has 22 states, 22 states have (on average 2.3636363636363638) internal successors, (52), 22 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:52,935 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:07:52,935 INFO L93 Difference]: Finished difference Result 56 states and 68 transitions. [2025-02-06 19:07:52,935 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 56 states and 68 transitions. [2025-02-06 19:07:52,936 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:52,936 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 56 states to 45 states and 57 transitions. [2025-02-06 19:07:52,936 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2025-02-06 19:07:52,936 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2025-02-06 19:07:52,936 INFO L73 IsDeterministic]: Start isDeterministic. Operand 45 states and 57 transitions. [2025-02-06 19:07:52,936 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:07:52,936 INFO L218 hiAutomatonCegarLoop]: Abstraction has 45 states and 57 transitions. [2025-02-06 19:07:52,937 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states and 57 transitions. [2025-02-06 19:07:52,937 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 42. [2025-02-06 19:07:52,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 42 states, 42 states have (on average 1.2619047619047619) internal successors, (53), 41 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:52,938 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 53 transitions. [2025-02-06 19:07:52,938 INFO L240 hiAutomatonCegarLoop]: Abstraction has 42 states and 53 transitions. [2025-02-06 19:07:52,940 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2025-02-06 19:07:52,940 INFO L432 stractBuchiCegarLoop]: Abstraction has 42 states and 53 transitions. [2025-02-06 19:07:52,940 INFO L338 stractBuchiCegarLoop]: ======== Iteration 18 ============ [2025-02-06 19:07:52,940 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 42 states and 53 transitions. [2025-02-06 19:07:52,941 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:52,941 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:52,941 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:52,942 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 5, 5, 4, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:07:52,942 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 19:07:52,942 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume 0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2);havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1;" [2025-02-06 19:07:52,942 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" [2025-02-06 19:07:52,943 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:52,943 INFO L85 PathProgramCache]: Analyzing trace with hash -1396265589, now seen corresponding path program 4 times [2025-02-06 19:07:52,943 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:52,943 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1470142105] [2025-02-06 19:07:52,943 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 19:07:52,943 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:52,949 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 34 statements into 2 equivalence classes. [2025-02-06 19:07:52,969 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) and asserted 33 of 34 statements. [2025-02-06 19:07:52,970 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) [2025-02-06 19:07:52,970 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:53,344 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 71 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:53,344 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:07:53,344 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1470142105] [2025-02-06 19:07:53,344 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1470142105] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:07:53,344 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1890785270] [2025-02-06 19:07:53,344 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 19:07:53,344 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:53,344 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:53,347 INFO L229 MonitoredProcess]: Starting monitored process 23 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:53,349 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2025-02-06 19:07:53,392 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 34 statements into 2 equivalence classes. [2025-02-06 19:07:53,439 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) and asserted 33 of 34 statements. [2025-02-06 19:07:53,439 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) [2025-02-06 19:07:53,439 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:53,441 INFO L256 TraceCheckSpWp]: Trace formula consists of 169 conjuncts, 34 conjuncts are in the unsatisfiable core [2025-02-06 19:07:53,443 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:53,460 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2025-02-06 19:07:53,514 INFO L349 Elim1Store]: treesize reduction 27, result has 25.0 percent of original size [2025-02-06 19:07:53,514 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 15 [2025-02-06 19:07:53,527 INFO L349 Elim1Store]: treesize reduction 27, result has 25.0 percent of original size [2025-02-06 19:07:53,527 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 15 [2025-02-06 19:07:53,632 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 9 [2025-02-06 19:07:53,645 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 71 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:53,645 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:07:53,825 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 20 [2025-02-06 19:07:53,826 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2025-02-06 19:07:53,842 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 71 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:53,842 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1890785270] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:07:53,842 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:07:53,842 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16] total 25 [2025-02-06 19:07:53,842 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1797517885] [2025-02-06 19:07:53,842 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:07:53,843 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:07:53,843 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:53,843 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 16 times [2025-02-06 19:07:53,843 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:53,843 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [63390728] [2025-02-06 19:07:53,843 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 19:07:53,844 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:53,845 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-02-06 19:07:53,846 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:53,846 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-06 19:07:53,846 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:53,846 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:53,846 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:53,847 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:53,847 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:53,847 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:53,848 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:53,883 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:07:53,883 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2025-02-06 19:07:53,884 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=74, Invalid=576, Unknown=0, NotChecked=0, Total=650 [2025-02-06 19:07:53,884 INFO L87 Difference]: Start difference. First operand 42 states and 53 transitions. cyclomatic complexity: 15 Second operand has 26 states, 25 states have (on average 2.12) internal successors, (53), 26 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:54,150 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:07:54,151 INFO L93 Difference]: Finished difference Result 52 states and 63 transitions. [2025-02-06 19:07:54,151 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 52 states and 63 transitions. [2025-02-06 19:07:54,151 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:54,151 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 52 states to 51 states and 62 transitions. [2025-02-06 19:07:54,151 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11 [2025-02-06 19:07:54,151 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11 [2025-02-06 19:07:54,151 INFO L73 IsDeterministic]: Start isDeterministic. Operand 51 states and 62 transitions. [2025-02-06 19:07:54,151 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:07:54,151 INFO L218 hiAutomatonCegarLoop]: Abstraction has 51 states and 62 transitions. [2025-02-06 19:07:54,151 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states and 62 transitions. [2025-02-06 19:07:54,155 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 38. [2025-02-06 19:07:54,155 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 38 states, 38 states have (on average 1.236842105263158) internal successors, (47), 37 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:54,155 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 47 transitions. [2025-02-06 19:07:54,155 INFO L240 hiAutomatonCegarLoop]: Abstraction has 38 states and 47 transitions. [2025-02-06 19:07:54,155 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2025-02-06 19:07:54,156 INFO L432 stractBuchiCegarLoop]: Abstraction has 38 states and 47 transitions. [2025-02-06 19:07:54,156 INFO L338 stractBuchiCegarLoop]: ======== Iteration 19 ============ [2025-02-06 19:07:54,156 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 38 states and 47 transitions. [2025-02-06 19:07:54,157 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-06 19:07:54,157 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:54,157 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:54,157 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 6, 6, 5, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:07:54,157 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 19:07:54,157 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1;" [2025-02-06 19:07:54,157 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" [2025-02-06 19:07:54,161 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:54,161 INFO L85 PathProgramCache]: Analyzing trace with hash -273883638, now seen corresponding path program 9 times [2025-02-06 19:07:54,161 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:54,161 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [167239274] [2025-02-06 19:07:54,161 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:07:54,161 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:54,165 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 36 statements into 7 equivalence classes. [2025-02-06 19:07:54,182 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) and asserted 36 of 36 statements. [2025-02-06 19:07:54,183 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2025-02-06 19:07:54,183 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:54,507 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 12 proven. 69 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:54,507 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:07:54,507 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [167239274] [2025-02-06 19:07:54,507 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [167239274] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:07:54,507 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [143104084] [2025-02-06 19:07:54,507 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:07:54,507 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:54,507 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:54,513 INFO L229 MonitoredProcess]: Starting monitored process 24 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:54,514 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2025-02-06 19:07:54,555 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 36 statements into 7 equivalence classes. [2025-02-06 19:07:54,581 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) and asserted 36 of 36 statements. [2025-02-06 19:07:54,582 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2025-02-06 19:07:54,582 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:54,583 INFO L256 TraceCheckSpWp]: Trace formula consists of 190 conjuncts, 24 conjuncts are in the unsatisfiable core [2025-02-06 19:07:54,584 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:54,611 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 1 [2025-02-06 19:07:54,911 INFO L349 Elim1Store]: treesize reduction 5, result has 37.5 percent of original size [2025-02-06 19:07:54,911 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 12 [2025-02-06 19:07:54,923 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 25 proven. 56 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:54,923 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:07:55,248 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 20 [2025-02-06 19:07:55,250 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 14 [2025-02-06 19:07:55,294 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 20 proven. 61 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:55,297 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [143104084] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:07:55,297 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:07:55,297 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17] total 34 [2025-02-06 19:07:55,297 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1932029002] [2025-02-06 19:07:55,297 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:07:55,297 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:07:55,298 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:55,298 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 17 times [2025-02-06 19:07:55,298 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:55,298 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1205411651] [2025-02-06 19:07:55,298 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-06 19:07:55,298 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:55,299 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:55,300 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:55,300 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:07:55,300 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:55,300 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:55,301 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:07:55,301 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:07:55,301 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:55,301 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:55,302 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:55,335 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:07:55,336 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2025-02-06 19:07:55,336 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=212, Invalid=978, Unknown=0, NotChecked=0, Total=1190 [2025-02-06 19:07:55,336 INFO L87 Difference]: Start difference. First operand 38 states and 47 transitions. cyclomatic complexity: 12 Second operand has 35 states, 34 states have (on average 2.0294117647058822) internal successors, (69), 35 states have internal predecessors, (69), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:56,049 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:07:56,049 INFO L93 Difference]: Finished difference Result 56 states and 66 transitions. [2025-02-06 19:07:56,049 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 56 states and 66 transitions. [2025-02-06 19:07:56,050 INFO L131 ngComponentsAnalysis]: Automaton has 0 accepting balls. 0 [2025-02-06 19:07:56,050 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 56 states to 0 states and 0 transitions. [2025-02-06 19:07:56,050 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 0 [2025-02-06 19:07:56,050 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 0 [2025-02-06 19:07:56,050 INFO L73 IsDeterministic]: Start isDeterministic. Operand 0 states and 0 transitions. [2025-02-06 19:07:56,050 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:07:56,050 INFO L218 hiAutomatonCegarLoop]: Abstraction has 0 states and 0 transitions. [2025-02-06 19:07:56,050 INFO L240 hiAutomatonCegarLoop]: Abstraction has 0 states and 0 transitions. [2025-02-06 19:07:56,051 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2025-02-06 19:07:56,051 INFO L432 stractBuchiCegarLoop]: Abstraction has 0 states and 0 transitions. [2025-02-06 19:07:56,051 INFO L338 stractBuchiCegarLoop]: ======== Iteration 20 ============ [2025-02-06 19:07:56,051 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 0 states and 0 transitions. [2025-02-06 19:07:56,051 INFO L131 ngComponentsAnalysis]: Automaton has 0 accepting balls. 0 [2025-02-06 19:07:56,051 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is true [2025-02-06 19:07:56,057 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 06.02 07:07:56 BoogieIcfgContainer [2025-02-06 19:07:56,057 INFO L131 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2025-02-06 19:07:56,057 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-02-06 19:07:56,057 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-02-06 19:07:56,058 INFO L274 PluginConnector]: Witness Printer initialized [2025-02-06 19:07:56,058 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 06.02 07:07:38" (3/4) ... [2025-02-06 19:07:56,059 INFO L149 WitnessPrinter]: No result that supports witness generation found [2025-02-06 19:07:56,060 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-02-06 19:07:56,060 INFO L158 Benchmark]: Toolchain (without parser) took 18540.21ms. Allocated memory was 142.6MB in the beginning and 503.3MB in the end (delta: 360.7MB). Free memory was 105.9MB in the beginning and 255.5MB in the end (delta: -149.6MB). Peak memory consumption was 210.9MB. Max. memory is 16.1GB. [2025-02-06 19:07:56,060 INFO L158 Benchmark]: CDTParser took 0.19ms. Allocated memory is still 201.3MB. Free memory is still 115.6MB. There was no memory consumed. Max. memory is 16.1GB. [2025-02-06 19:07:56,060 INFO L158 Benchmark]: CACSL2BoogieTranslator took 303.13ms. Allocated memory is still 142.6MB. Free memory was 105.9MB in the beginning and 87.9MB in the end (delta: 18.0MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-02-06 19:07:56,061 INFO L158 Benchmark]: Boogie Procedure Inliner took 28.64ms. Allocated memory is still 142.6MB. Free memory was 87.9MB in the beginning and 86.5MB in the end (delta: 1.4MB). There was no memory consumed. Max. memory is 16.1GB. [2025-02-06 19:07:56,061 INFO L158 Benchmark]: Boogie Preprocessor took 26.51ms. Allocated memory is still 142.6MB. Free memory was 86.5MB in the beginning and 85.2MB in the end (delta: 1.4MB). There was no memory consumed. Max. memory is 16.1GB. [2025-02-06 19:07:56,061 INFO L158 Benchmark]: IcfgBuilder took 219.91ms. Allocated memory is still 142.6MB. Free memory was 85.2MB in the beginning and 73.1MB in the end (delta: 12.0MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-02-06 19:07:56,061 INFO L158 Benchmark]: BuchiAutomizer took 17951.37ms. Allocated memory was 142.6MB in the beginning and 503.3MB in the end (delta: 360.7MB). Free memory was 73.1MB in the beginning and 255.6MB in the end (delta: -182.5MB). Peak memory consumption was 177.4MB. Max. memory is 16.1GB. [2025-02-06 19:07:56,061 INFO L158 Benchmark]: Witness Printer took 2.36ms. Allocated memory is still 503.3MB. Free memory was 255.6MB in the beginning and 255.5MB in the end (delta: 99.2kB). There was no memory consumed. Max. memory is 16.1GB. [2025-02-06 19:07:56,062 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.19ms. Allocated memory is still 201.3MB. Free memory is still 115.6MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 303.13ms. Allocated memory is still 142.6MB. Free memory was 105.9MB in the beginning and 87.9MB in the end (delta: 18.0MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 28.64ms. Allocated memory is still 142.6MB. Free memory was 87.9MB in the beginning and 86.5MB in the end (delta: 1.4MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 26.51ms. Allocated memory is still 142.6MB. Free memory was 86.5MB in the beginning and 85.2MB in the end (delta: 1.4MB). There was no memory consumed. Max. memory is 16.1GB. * IcfgBuilder took 219.91ms. Allocated memory is still 142.6MB. Free memory was 85.2MB in the beginning and 73.1MB in the end (delta: 12.0MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * BuchiAutomizer took 17951.37ms. Allocated memory was 142.6MB in the beginning and 503.3MB in the end (delta: 360.7MB). Free memory was 73.1MB in the beginning and 255.6MB in the end (delta: -182.5MB). Peak memory consumption was 177.4MB. Max. memory is 16.1GB. * Witness Printer took 2.36ms. Allocated memory is still 503.3MB. Free memory was 255.6MB in the beginning and 255.5MB in the end (delta: 99.2kB). There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Unknown variable: #length - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#length,GLOBAL] - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Unknown variable: ~arr~0!offset * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 19 terminating modules (17 trivial, 2 deterministic, 0 nondeterministic). One deterministic module has affine ranking function null and consists of 3 locations. One deterministic module has affine ranking function (((long) -1 * j) + length) and consists of 3 locations. 17 modules have a trivial ranking function, the largest among these consists of 35 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 17.9s and 20 iterations. TraceHistogramMax:6. Analysis of lassos took 13.8s. Construction of modules took 2.0s. Büchi inclusion checks took 1.8s. Highest rank in rank-based complementation 3. Minimization of det autom 3. Minimization of nondet autom 16. Automata minimization 0.0s AutomataMinimizationTime, 18 MinimizatonAttempts, 118 StatesRemovedByMinimization, 16 NontrivialMinimizations. Non-live state removal took 0.0s Buchi closure took 0.0s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [2, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 586 SdHoareTripleChecker+Valid, 2.4s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 584 mSDsluCounter, 983 SdHoareTripleChecker+Invalid, 2.0s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 826 mSDsCounter, 213 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 3870 IncrementalHoareTripleChecker+Invalid, 4083 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 213 mSolverCounterUnsat, 157 mSDtfsCounter, 3870 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont0 unkn0 SFLI0 SFLT0 conc0 concLT0 SILN0 SILU17 SILI0 SILT0 lasso2 LassoPreprocessingBenchmarks: Lassos: inital105 mio100 ax100 hnf100 lsp100 ukn82 mio100 lsp56 div180 bol100 ite100 ukn100 eq150 hnf94 smp64 dnf100 smp100 tf100 neg100 sie100 LassoTerminationAnalysisBenchmarks: ConstraintsSatisfiability: unsat Degree: 0 Time: 28ms VariablesStem: 2 VariablesLoop: 0 DisjunctsStem: 1 DisjunctsLoop: 1 SupportingInvariants: 2 MotzkinApplications: 6 LassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Termination proven Buchi Automizer proved that your program is terminating RESULT: Ultimate proved your program to be correct! [2025-02-06 19:07:56,076 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Forceful destruction successful, exit code 0 [2025-02-06 19:07:56,274 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Forceful destruction successful, exit code 0 [2025-02-06 19:07:56,478 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Forceful destruction successful, exit code 0 [2025-02-06 19:07:56,678 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Ended with exit code 0 [2025-02-06 19:07:56,882 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Ended with exit code 0 [2025-02-06 19:07:57,082 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Forceful destruction successful, exit code 0 [2025-02-06 19:07:57,286 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Ended with exit code 0 [2025-02-06 19:07:57,490 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2025-02-06 19:07:57,690 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Forceful destruction successful, exit code 0 [2025-02-06 19:07:57,894 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Forceful destruction successful, exit code 0 [2025-02-06 19:07:58,095 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Forceful destruction successful, exit code 0 [2025-02-06 19:07:58,295 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2025-02-06 19:07:58,499 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Ended with exit code 0 [2025-02-06 19:07:58,700 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2025-02-06 19:07:58,900 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2025-02-06 19:07:59,103 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2025-02-06 19:07:59,307 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Result: TRUE