./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/termination-memory-alloca/fermat-alloca.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version c00e63dc Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/termination-memory-alloca/fermat-alloca.i -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash e779827438904e8a0bb49f414cbe4d14072e556fff2389d3772808230457c73c --- Real Ultimate output --- This is Ultimate 0.3.0-?-c00e63d-m [2025-02-06 19:05:51,346 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-02-06 19:05:51,384 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf [2025-02-06 19:05:51,390 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-02-06 19:05:51,390 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-02-06 19:05:51,390 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-02-06 19:05:51,405 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-02-06 19:05:51,405 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-02-06 19:05:51,406 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-02-06 19:05:51,406 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-02-06 19:05:51,406 INFO L153 SettingsManager]: * Use memory slicer=true [2025-02-06 19:05:51,406 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-02-06 19:05:51,406 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-02-06 19:05:51,406 INFO L153 SettingsManager]: * Use SBE=true [2025-02-06 19:05:51,406 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-02-06 19:05:51,406 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-02-06 19:05:51,407 INFO L153 SettingsManager]: * Use old map elimination=false [2025-02-06 19:05:51,407 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-02-06 19:05:51,407 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-02-06 19:05:51,407 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-02-06 19:05:51,407 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-02-06 19:05:51,407 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-02-06 19:05:51,407 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-02-06 19:05:51,407 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-02-06 19:05:51,407 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-02-06 19:05:51,407 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-02-06 19:05:51,407 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-02-06 19:05:51,407 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-02-06 19:05:51,407 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-02-06 19:05:51,407 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-02-06 19:05:51,408 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-02-06 19:05:51,408 INFO L153 SettingsManager]: * Use constant arrays=true [2025-02-06 19:05:51,408 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-02-06 19:05:51,408 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-02-06 19:05:51,408 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-02-06 19:05:51,408 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-02-06 19:05:51,408 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-02-06 19:05:51,408 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> e779827438904e8a0bb49f414cbe4d14072e556fff2389d3772808230457c73c [2025-02-06 19:05:51,584 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-02-06 19:05:51,589 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-02-06 19:05:51,591 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-02-06 19:05:51,592 INFO L270 PluginConnector]: Initializing CDTParser... [2025-02-06 19:05:51,592 INFO L274 PluginConnector]: CDTParser initialized [2025-02-06 19:05:51,592 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/termination-memory-alloca/fermat-alloca.i [2025-02-06 19:05:52,727 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/b254d1431/0600720222d94d288a9818d4768a8275/FLAGf8aebc1ca [2025-02-06 19:05:53,023 INFO L384 CDTParser]: Found 1 translation units. [2025-02-06 19:05:53,024 INFO L180 CDTParser]: Scanning /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/termination-memory-alloca/fermat-alloca.i [2025-02-06 19:05:53,035 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/b254d1431/0600720222d94d288a9818d4768a8275/FLAGf8aebc1ca [2025-02-06 19:05:53,293 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/b254d1431/0600720222d94d288a9818d4768a8275 [2025-02-06 19:05:53,295 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-02-06 19:05:53,296 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-02-06 19:05:53,297 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-02-06 19:05:53,297 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-02-06 19:05:53,301 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-02-06 19:05:53,302 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.02 07:05:53" (1/1) ... [2025-02-06 19:05:53,304 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7d2e6837 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:05:53, skipping insertion in model container [2025-02-06 19:05:53,304 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.02 07:05:53" (1/1) ... [2025-02-06 19:05:53,325 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-02-06 19:05:53,523 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-06 19:05:53,531 INFO L200 MainTranslator]: Completed pre-run [2025-02-06 19:05:53,564 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-06 19:05:53,586 INFO L204 MainTranslator]: Completed translation [2025-02-06 19:05:53,586 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:05:53 WrapperNode [2025-02-06 19:05:53,587 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-02-06 19:05:53,587 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-02-06 19:05:53,587 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-02-06 19:05:53,587 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-02-06 19:05:53,592 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:05:53" (1/1) ... [2025-02-06 19:05:53,602 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:05:53" (1/1) ... [2025-02-06 19:05:53,617 INFO L138 Inliner]: procedures = 109, calls = 45, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 112 [2025-02-06 19:05:53,618 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-02-06 19:05:53,618 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-02-06 19:05:53,618 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-02-06 19:05:53,618 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-02-06 19:05:53,623 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:05:53" (1/1) ... [2025-02-06 19:05:53,623 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:05:53" (1/1) ... [2025-02-06 19:05:53,625 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:05:53" (1/1) ... [2025-02-06 19:05:53,632 INFO L175 MemorySlicer]: Split 27 memory accesses to 4 slices as follows [7, 8, 8, 4]. 30 percent of accesses are in the largest equivalence class. The 0 initializations are split as follows [0, 0, 0, 0]. The 9 writes are split as follows [2, 3, 3, 1]. [2025-02-06 19:05:53,633 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:05:53" (1/1) ... [2025-02-06 19:05:53,633 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:05:53" (1/1) ... [2025-02-06 19:05:53,636 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:05:53" (1/1) ... [2025-02-06 19:05:53,636 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:05:53" (1/1) ... [2025-02-06 19:05:53,637 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:05:53" (1/1) ... [2025-02-06 19:05:53,637 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:05:53" (1/1) ... [2025-02-06 19:05:53,639 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-02-06 19:05:53,639 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-02-06 19:05:53,639 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-02-06 19:05:53,639 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-02-06 19:05:53,640 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:05:53" (1/1) ... [2025-02-06 19:05:53,644 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:05:53,653 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:05:53,665 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:05:53,670 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-02-06 19:05:53,683 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2025-02-06 19:05:53,683 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2025-02-06 19:05:53,683 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#2 [2025-02-06 19:05:53,683 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#3 [2025-02-06 19:05:53,684 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2025-02-06 19:05:53,684 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2025-02-06 19:05:53,684 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#2 [2025-02-06 19:05:53,684 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#3 [2025-02-06 19:05:53,684 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2025-02-06 19:05:53,684 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2025-02-06 19:05:53,684 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-02-06 19:05:53,684 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-02-06 19:05:53,747 INFO L257 CfgBuilder]: Building ICFG [2025-02-06 19:05:53,749 INFO L287 CfgBuilder]: Building CFG for each procedure with an implementation [2025-02-06 19:05:53,936 INFO L1309 $ProcedureCfgBuilder]: dead code at ProgramPoint L548: call ULTIMATE.dealloc(main_#t~malloc2#1.base, main_#t~malloc2#1.offset);havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call ULTIMATE.dealloc(main_#t~malloc3#1.base, main_#t~malloc3#1.offset);havoc main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call ULTIMATE.dealloc(main_#t~malloc4#1.base, main_#t~malloc4#1.offset);havoc main_#t~malloc4#1.base, main_#t~malloc4#1.offset;call ULTIMATE.dealloc(main_#t~malloc5#1.base, main_#t~malloc5#1.offset);havoc main_#t~malloc5#1.base, main_#t~malloc5#1.offset; [2025-02-06 19:05:53,947 INFO L? ?]: Removed 6 outVars from TransFormulas that were not future-live. [2025-02-06 19:05:53,950 INFO L308 CfgBuilder]: Performing block encoding [2025-02-06 19:05:53,957 INFO L332 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-02-06 19:05:53,957 INFO L337 CfgBuilder]: Removed 0 assume(true) statements. [2025-02-06 19:05:53,958 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 06.02 07:05:53 BoogieIcfgContainer [2025-02-06 19:05:53,958 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-02-06 19:05:53,958 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-02-06 19:05:53,958 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-02-06 19:05:53,969 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-02-06 19:05:53,970 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-06 19:05:53,970 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 06.02 07:05:53" (1/3) ... [2025-02-06 19:05:53,971 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4e69026d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.02 07:05:53, skipping insertion in model container [2025-02-06 19:05:53,971 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-06 19:05:53,971 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:05:53" (2/3) ... [2025-02-06 19:05:53,971 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4e69026d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.02 07:05:53, skipping insertion in model container [2025-02-06 19:05:53,971 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-06 19:05:53,971 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 06.02 07:05:53" (3/3) ... [2025-02-06 19:05:53,972 INFO L363 chiAutomizerObserver]: Analyzing ICFG fermat-alloca.i [2025-02-06 19:05:54,000 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-02-06 19:05:54,000 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-02-06 19:05:54,000 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-02-06 19:05:54,000 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-02-06 19:05:54,001 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-02-06 19:05:54,001 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-02-06 19:05:54,001 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-02-06 19:05:54,001 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-02-06 19:05:54,004 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 13 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:05:54,013 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2025-02-06 19:05:54,013 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:05:54,013 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:05:54,017 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 19:05:54,017 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:05:54,017 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-02-06 19:05:54,017 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 13 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:05:54,018 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2025-02-06 19:05:54,019 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:05:54,019 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:05:54,019 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 19:05:54,019 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:05:54,023 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~post16#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~post20#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~post24#1, main_#t~mem25#1, main_#t~mem26#1, main_~MAX~0#1.base, main_~MAX~0#1.offset, main_~a~0#1.base, main_~a~0#1.offset, main_~b~0#1.base, main_~b~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~MAX~0#1.base, main_~MAX~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~a~0#1.base, main_~a~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnStack(4);main_~b~0#1.base, main_~b~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnStack(4);main_~c~0#1.base, main_~c~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;call write~int#3(1000, main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);call write~int#2(1, main_~a~0#1.base, main_~a~0#1.offset, 4);call write~int#1(1, main_~b~0#1.base, main_~b~0#1.offset, 4);call write~int#0(1, main_~c~0#1.base, main_~c~0#1.offset, 4);" [2025-02-06 19:05:54,024 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume main_#t~mem17#1 > main_#t~mem18#1;havoc main_#t~mem17#1;havoc main_#t~mem18#1;call write~int#2(1, main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem19#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);main_#t~post20#1 := main_#t~mem19#1;call write~int#1(1 + main_#t~post20#1, main_~b~0#1.base, main_~b~0#1.offset, 4);havoc main_#t~mem19#1;havoc main_#t~post20#1;" "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume main_#t~mem21#1 > main_#t~mem22#1;havoc main_#t~mem21#1;havoc main_#t~mem22#1;call write~int#1(1, main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem23#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);main_#t~post24#1 := main_#t~mem23#1;call write~int#0(1 + main_#t~post24#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem23#1;havoc main_#t~post24#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" [2025-02-06 19:05:54,028 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:05:54,029 INFO L85 PathProgramCache]: Analyzing trace with hash 1600, now seen corresponding path program 1 times [2025-02-06 19:05:54,034 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:05:54,035 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [113147247] [2025-02-06 19:05:54,035 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:05:54,035 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:05:54,098 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:05:54,157 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:05:54,159 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:05:54,159 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:05:54,159 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:05:54,164 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:05:54,191 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:05:54,195 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:05:54,195 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:05:54,211 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:05:54,213 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:05:54,213 INFO L85 PathProgramCache]: Analyzing trace with hash 118080391, now seen corresponding path program 1 times [2025-02-06 19:05:54,213 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:05:54,213 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1264389208] [2025-02-06 19:05:54,213 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:05:54,213 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:05:54,227 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 7 statements into 1 equivalence classes. [2025-02-06 19:05:54,244 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 7 of 7 statements. [2025-02-06 19:05:54,244 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:05:54,244 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unknown [2025-02-06 19:05:54,245 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [696785053] [2025-02-06 19:05:54,250 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:05:54,250 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:05:54,250 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:05:54,253 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:05:54,254 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2025-02-06 19:05:54,298 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 7 statements into 1 equivalence classes. [2025-02-06 19:05:54,318 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 7 of 7 statements. [2025-02-06 19:05:54,318 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:05:54,318 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:05:54,318 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:05:54,324 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 7 statements into 1 equivalence classes. [2025-02-06 19:05:54,338 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 7 of 7 statements. [2025-02-06 19:05:54,338 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:05:54,338 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:05:54,347 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:05:54,349 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:05:54,349 INFO L85 PathProgramCache]: Analyzing trace with hash -561969048, now seen corresponding path program 1 times [2025-02-06 19:05:54,349 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:05:54,349 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [949444528] [2025-02-06 19:05:54,349 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:05:54,349 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:05:54,364 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 9 statements into 1 equivalence classes. [2025-02-06 19:05:54,376 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 9 of 9 statements. [2025-02-06 19:05:54,377 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:05:54,377 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:05:54,740 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:05:54,740 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:05:54,740 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [949444528] [2025-02-06 19:05:54,741 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [949444528] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:05:54,741 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:05:54,741 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-06 19:05:54,741 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [581389594] [2025-02-06 19:05:54,742 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:06:06,066 WARN L286 SmtUtils]: Spent 10.37s on a formula simplification that was a NOOP. DAG size: 74 (called from [L 299] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2025-02-06 19:06:06,067 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:06:06,081 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-06 19:06:06,082 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-06 19:06:06,083 INFO L87 Difference]: Start difference. First operand has 13 states, 12 states have (on average 1.4166666666666667) internal successors, (17), 12 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 2.25) internal successors, (9), 4 states have internal predecessors, (9), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:06:06,105 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:06:06,106 INFO L93 Difference]: Finished difference Result 17 states and 21 transitions. [2025-02-06 19:06:06,106 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 17 states and 21 transitions. [2025-02-06 19:06:06,107 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2025-02-06 19:06:06,110 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 17 states to 12 states and 14 transitions. [2025-02-06 19:06:06,110 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2025-02-06 19:06:06,111 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 12 [2025-02-06 19:06:06,111 INFO L73 IsDeterministic]: Start isDeterministic. Operand 12 states and 14 transitions. [2025-02-06 19:06:06,111 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:06:06,111 INFO L218 hiAutomatonCegarLoop]: Abstraction has 12 states and 14 transitions. [2025-02-06 19:06:06,118 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12 states and 14 transitions. [2025-02-06 19:06:06,124 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12 to 12. [2025-02-06 19:06:06,128 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12 states, 12 states have (on average 1.1666666666666667) internal successors, (14), 11 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:06:06,128 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12 states to 12 states and 14 transitions. [2025-02-06 19:06:06,129 INFO L240 hiAutomatonCegarLoop]: Abstraction has 12 states and 14 transitions. [2025-02-06 19:06:06,130 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-06 19:06:06,135 INFO L432 stractBuchiCegarLoop]: Abstraction has 12 states and 14 transitions. [2025-02-06 19:06:06,135 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-02-06 19:06:06,135 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 12 states and 14 transitions. [2025-02-06 19:06:06,135 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2025-02-06 19:06:06,135 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:06:06,135 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:06:06,135 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1] [2025-02-06 19:06:06,135 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:06:06,136 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~post16#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~post20#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~post24#1, main_#t~mem25#1, main_#t~mem26#1, main_~MAX~0#1.base, main_~MAX~0#1.offset, main_~a~0#1.base, main_~a~0#1.offset, main_~b~0#1.base, main_~b~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~MAX~0#1.base, main_~MAX~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~a~0#1.base, main_~a~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnStack(4);main_~b~0#1.base, main_~b~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnStack(4);main_~c~0#1.base, main_~c~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;call write~int#3(1000, main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);call write~int#2(1, main_~a~0#1.base, main_~a~0#1.offset, 4);call write~int#1(1, main_~b~0#1.base, main_~b~0#1.offset, 4);call write~int#0(1, main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" [2025-02-06 19:06:06,136 INFO L754 eck$LassoCheckResult]: Loop: "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume main_#t~mem21#1 > main_#t~mem22#1;havoc main_#t~mem21#1;havoc main_#t~mem22#1;call write~int#1(1, main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem23#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);main_#t~post24#1 := main_#t~mem23#1;call write~int#0(1 + main_#t~post24#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem23#1;havoc main_#t~post24#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume main_#t~mem17#1 > main_#t~mem18#1;havoc main_#t~mem17#1;havoc main_#t~mem18#1;call write~int#2(1, main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem19#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);main_#t~post20#1 := main_#t~mem19#1;call write~int#1(1 + main_#t~post20#1, main_~b~0#1.base, main_~b~0#1.offset, 4);havoc main_#t~mem19#1;havoc main_#t~post20#1;" [2025-02-06 19:06:06,136 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:06:06,136 INFO L85 PathProgramCache]: Analyzing trace with hash 47682444, now seen corresponding path program 1 times [2025-02-06 19:06:06,136 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:06:06,136 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1215573025] [2025-02-06 19:06:06,136 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:06:06,137 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:06:06,144 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 5 statements into 1 equivalence classes. [2025-02-06 19:06:06,158 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 5 of 5 statements. [2025-02-06 19:06:06,158 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:06:06,158 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unknown [2025-02-06 19:06:06,159 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [645173416] [2025-02-06 19:06:06,159 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:06:06,159 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:06:06,159 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:06:06,161 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:06:06,163 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2025-02-06 19:06:06,201 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 5 statements into 1 equivalence classes. [2025-02-06 19:06:06,219 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 5 of 5 statements. [2025-02-06 19:06:06,220 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:06:06,220 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:06:06,220 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:06:06,226 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 5 statements into 1 equivalence classes. [2025-02-06 19:06:06,229 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 5 of 5 statements. [2025-02-06 19:06:06,229 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:06:06,230 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:06:06,237 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:06:06,237 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:06:06,238 INFO L85 PathProgramCache]: Analyzing trace with hash 1346519853, now seen corresponding path program 2 times [2025-02-06 19:06:06,238 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:06:06,238 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2096507073] [2025-02-06 19:06:06,238 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:06:06,238 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:06:06,243 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 7 statements into 1 equivalence classes. [2025-02-06 19:06:06,247 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 7 of 7 statements. [2025-02-06 19:06:06,247 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:06:06,247 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unknown [2025-02-06 19:06:06,247 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1185598394] [2025-02-06 19:06:06,247 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:06:06,247 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:06:06,248 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:06:06,249 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:06:06,251 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2025-02-06 19:06:06,285 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 7 statements into 1 equivalence classes. [2025-02-06 19:06:06,304 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 7 of 7 statements. [2025-02-06 19:06:06,304 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:06:06,304 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:06:06,304 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:06:06,308 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 7 statements into 1 equivalence classes. [2025-02-06 19:06:06,318 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 7 of 7 statements. [2025-02-06 19:06:06,319 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:06:06,319 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:06:06,324 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:06:06,324 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:06:06,324 INFO L85 PathProgramCache]: Analyzing trace with hash 1905438018, now seen corresponding path program 1 times [2025-02-06 19:06:06,324 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:06:06,324 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1018513245] [2025-02-06 19:06:06,324 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:06:06,325 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:06:06,336 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 12 statements into 1 equivalence classes. [2025-02-06 19:06:06,346 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 12 of 12 statements. [2025-02-06 19:06:06,349 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:06:06,350 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:06:06,545 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:06:06,545 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:06:06,545 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1018513245] [2025-02-06 19:06:06,545 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1018513245] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:06:06,545 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:06:06,545 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-06 19:06:06,545 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [366856257] [2025-02-06 19:06:06,546 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:06:07,166 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:06:07,166 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-06 19:06:07,166 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-02-06 19:06:07,167 INFO L87 Difference]: Start difference. First operand 12 states and 14 transitions. cyclomatic complexity: 3 Second operand has 6 states, 6 states have (on average 2.0) internal successors, (12), 6 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:06:07,233 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:06:07,233 INFO L93 Difference]: Finished difference Result 19 states and 22 transitions. [2025-02-06 19:06:07,233 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 19 states and 22 transitions. [2025-02-06 19:06:07,235 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2025-02-06 19:06:07,236 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 19 states to 19 states and 22 transitions. [2025-02-06 19:06:07,236 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 19 [2025-02-06 19:06:07,236 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 19 [2025-02-06 19:06:07,236 INFO L73 IsDeterministic]: Start isDeterministic. Operand 19 states and 22 transitions. [2025-02-06 19:06:07,237 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:06:07,237 INFO L218 hiAutomatonCegarLoop]: Abstraction has 19 states and 22 transitions. [2025-02-06 19:06:07,237 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states and 22 transitions. [2025-02-06 19:06:07,238 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2025-02-06 19:06:07,238 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.1578947368421053) internal successors, (22), 18 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:06:07,239 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 22 transitions. [2025-02-06 19:06:07,239 INFO L240 hiAutomatonCegarLoop]: Abstraction has 19 states and 22 transitions. [2025-02-06 19:06:07,240 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-06 19:06:07,240 INFO L432 stractBuchiCegarLoop]: Abstraction has 19 states and 22 transitions. [2025-02-06 19:06:07,240 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-02-06 19:06:07,240 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 19 states and 22 transitions. [2025-02-06 19:06:07,241 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 14 [2025-02-06 19:06:07,241 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:06:07,242 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:06:07,242 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1] [2025-02-06 19:06:07,242 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:06:07,242 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~post16#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~post20#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~post24#1, main_#t~mem25#1, main_#t~mem26#1, main_~MAX~0#1.base, main_~MAX~0#1.offset, main_~a~0#1.base, main_~a~0#1.offset, main_~b~0#1.base, main_~b~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~MAX~0#1.base, main_~MAX~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~a~0#1.base, main_~a~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnStack(4);main_~b~0#1.base, main_~b~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnStack(4);main_~c~0#1.base, main_~c~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;call write~int#3(1000, main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);call write~int#2(1, main_~a~0#1.base, main_~a~0#1.offset, 4);call write~int#1(1, main_~b~0#1.base, main_~b~0#1.offset, 4);call write~int#0(1, main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" [2025-02-06 19:06:07,242 INFO L754 eck$LassoCheckResult]: Loop: "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem21#1 > main_#t~mem22#1);havoc main_#t~mem21#1;havoc main_#t~mem22#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" [2025-02-06 19:06:07,243 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:06:07,243 INFO L85 PathProgramCache]: Analyzing trace with hash 47682444, now seen corresponding path program 2 times [2025-02-06 19:06:07,243 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:06:07,243 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1891823768] [2025-02-06 19:06:07,244 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:06:07,244 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:06:07,252 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 5 statements into 1 equivalence classes. [2025-02-06 19:06:07,267 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 5 of 5 statements. [2025-02-06 19:06:07,267 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:06:07,267 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unknown [2025-02-06 19:06:07,268 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [304367760] [2025-02-06 19:06:07,269 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:06:07,269 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:06:07,269 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:06:07,271 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:06:07,273 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2025-02-06 19:06:07,313 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 5 statements into 1 equivalence classes. [2025-02-06 19:06:07,333 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 5 of 5 statements. [2025-02-06 19:06:07,334 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:06:07,334 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:06:07,334 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:06:07,340 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 5 statements into 1 equivalence classes. [2025-02-06 19:06:07,342 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 5 of 5 statements. [2025-02-06 19:06:07,342 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:06:07,343 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:06:07,350 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:06:07,350 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:06:07,350 INFO L85 PathProgramCache]: Analyzing trace with hash 1375149005, now seen corresponding path program 1 times [2025-02-06 19:06:07,350 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:06:07,351 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1356899129] [2025-02-06 19:06:07,351 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:06:07,351 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:06:07,355 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 7 statements into 1 equivalence classes. [2025-02-06 19:06:07,357 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 7 of 7 statements. [2025-02-06 19:06:07,361 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:06:07,361 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unknown [2025-02-06 19:06:07,362 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [2127231989] [2025-02-06 19:06:07,362 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:06:07,362 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:06:07,362 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:06:07,367 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:06:07,369 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2025-02-06 19:06:07,406 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 7 statements into 1 equivalence classes. [2025-02-06 19:06:07,414 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 7 of 7 statements. [2025-02-06 19:06:07,414 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:06:07,414 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:06:07,414 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:06:07,420 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 7 statements into 1 equivalence classes. [2025-02-06 19:06:07,435 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 7 of 7 statements. [2025-02-06 19:06:07,435 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:06:07,435 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:06:07,444 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:06:07,444 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:06:07,444 INFO L85 PathProgramCache]: Analyzing trace with hash 1934067170, now seen corresponding path program 1 times [2025-02-06 19:06:07,444 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:06:07,445 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [958563458] [2025-02-06 19:06:07,445 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:06:07,445 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:06:07,451 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 12 statements into 1 equivalence classes. [2025-02-06 19:06:07,460 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 12 of 12 statements. [2025-02-06 19:06:07,460 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:06:07,460 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unknown [2025-02-06 19:06:07,461 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [840868788] [2025-02-06 19:06:07,461 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:06:07,461 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:06:07,461 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:06:07,463 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:06:07,465 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2025-02-06 19:06:07,510 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 12 statements into 1 equivalence classes. [2025-02-06 19:06:07,537 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 12 of 12 statements. [2025-02-06 19:06:07,537 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:06:07,538 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:06:07,538 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:06:07,544 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 12 statements into 1 equivalence classes. [2025-02-06 19:06:07,561 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 12 of 12 statements. [2025-02-06 19:06:07,561 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:06:07,561 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:06:07,572 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:06:08,954 INFO L204 LassoAnalysis]: Preferences: [2025-02-06 19:06:08,954 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-02-06 19:06:08,954 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-02-06 19:06:08,954 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-02-06 19:06:08,954 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2025-02-06 19:06:08,954 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:06:08,954 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-02-06 19:06:08,954 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-02-06 19:06:08,954 INFO L132 ssoRankerPreferences]: Filename of dumped script: fermat-alloca.i_Iteration3_Lasso [2025-02-06 19:06:08,955 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-02-06 19:06:08,955 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-02-06 19:06:08,968 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:06:08,977 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:06:08,979 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:06:08,984 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:06:08,986 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:06:21,632 WARN L286 SmtUtils]: Spent 12.23s on a formula simplification. DAG size of input: 79 DAG size of output: 78 (called from [L 270] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.smt.mapelimination.MapEliminator.setFormulaAndSimplify) [2025-02-06 19:06:21,633 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:06:21,635 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:06:21,637 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:06:21,638 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:06:21,641 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:06:21,643 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:06:21,644 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:06:21,646 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:06:21,648 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:06:21,649 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:06:21,651 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:06:21,652 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:06:21,654 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:06:21,656 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:06:21,658 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:06:21,660 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:06:21,662 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:06:21,663 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:06:21,665 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:06:21,669 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:06:21,671 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:06:45,909 WARN L286 SmtUtils]: Spent 24.21s on a formula simplification that was a NOOP. DAG size: 24 (called from [L 68] de.uni_freiburg.informatik.ultimate.icfgtransformer.transformulatransformers.SimplifyPreprocessor.process) [2025-02-06 19:07:10,416 WARN L286 SmtUtils]: Spent 24.19s on a formula simplification that was a NOOP. DAG size: 24 (called from [L 68] de.uni_freiburg.informatik.ultimate.icfgtransformer.transformulatransformers.SimplifyPreprocessor.process) [2025-02-06 19:07:10,649 INFO L259 LassoAnalysis]: Preprocessing complete. [2025-02-06 19:07:10,651 INFO L451 LassoAnalysis]: Using template 'affine'. [2025-02-06 19:07:10,652 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:07:10,653 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:10,655 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:07:10,656 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2025-02-06 19:07:10,658 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:07:10,671 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:07:10,671 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-02-06 19:07:10,671 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:07:10,671 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 19:07:10,671 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:07:10,679 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-02-06 19:07:10,679 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-02-06 19:07:10,681 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 19:07:10,687 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Ended with exit code 0 [2025-02-06 19:07:10,688 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:07:10,688 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:10,690 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:07:10,691 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2025-02-06 19:07:10,691 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:07:10,702 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:07:10,702 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-02-06 19:07:10,702 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:07:10,702 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 19:07:10,702 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:07:10,703 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-02-06 19:07:10,703 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-02-06 19:07:10,704 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 19:07:10,709 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Ended with exit code 0 [2025-02-06 19:07:10,710 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:07:10,710 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:10,712 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:07:10,713 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2025-02-06 19:07:10,714 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:07:10,723 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:07:10,724 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-02-06 19:07:10,724 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:07:10,724 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 19:07:10,724 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:07:10,724 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-02-06 19:07:10,724 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-02-06 19:07:10,725 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 19:07:10,731 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Ended with exit code 0 [2025-02-06 19:07:10,731 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:07:10,731 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:10,734 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:07:10,735 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2025-02-06 19:07:10,736 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:07:10,746 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:07:10,746 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-02-06 19:07:10,746 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:07:10,746 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 19:07:10,746 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:07:10,747 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-02-06 19:07:10,747 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-02-06 19:07:10,748 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 19:07:10,757 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Ended with exit code 0 [2025-02-06 19:07:10,758 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:07:10,758 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:10,759 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:07:10,761 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2025-02-06 19:07:10,762 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:07:10,772 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:07:10,773 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:07:10,773 INFO L204 nArgumentSynthesizer]: 2 loop disjuncts [2025-02-06 19:07:10,773 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:07:10,788 INFO L401 nArgumentSynthesizer]: We have 16 Motzkin's Theorem applications. [2025-02-06 19:07:10,788 INFO L402 nArgumentSynthesizer]: A total of 4 supporting invariants were added. [2025-02-06 19:07:10,808 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2025-02-06 19:07:10,846 INFO L443 ModelExtractionUtils]: Simplification made 16 calls to the SMT solver. [2025-02-06 19:07:10,847 INFO L444 ModelExtractionUtils]: 11 out of 31 variables were initially zero. Simplification set additionally 17 variables to zero. [2025-02-06 19:07:10,848 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:07:10,849 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:10,853 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:07:10,855 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2025-02-06 19:07:10,856 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2025-02-06 19:07:10,868 INFO L438 nArgumentSynthesizer]: Removed 4 redundant supporting invariants from a total of 4. [2025-02-06 19:07:10,869 INFO L474 LassoAnalysis]: Proved termination. [2025-02-06 19:07:10,869 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(v_rep(select (select #memory_int#3 ULTIMATE.start_main_~MAX~0#1.base) 0)_1, v_rep(select (select #memory_int#2 ULTIMATE.start_main_~a~0#1.base) ULTIMATE.start_main_~a~0#1.offset)_1) = 1*v_rep(select (select #memory_int#3 ULTIMATE.start_main_~MAX~0#1.base) 0)_1 - 1*v_rep(select (select #memory_int#2 ULTIMATE.start_main_~a~0#1.base) ULTIMATE.start_main_~a~0#1.offset)_1 Supporting invariants [] [2025-02-06 19:07:10,876 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Ended with exit code 0 [2025-02-06 19:07:10,981 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Ended with exit code 0 [2025-02-06 19:07:11,041 INFO L156 tatePredicateManager]: 36 out of 37 supporting invariants were superfluous and have been removed [2025-02-06 19:07:11,047 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #memory_int#3 [2025-02-06 19:07:11,047 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#memory_int#3,GLOBAL] [2025-02-06 19:07:11,048 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array ArrayAccessExpression[IdentifierExpression[#memory_int#3,GLOBAL],[IdentifierExpression[~MAX~0!base,]]] [2025-02-06 19:07:11,048 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #memory_int#2 [2025-02-06 19:07:11,048 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#memory_int#2,GLOBAL] [2025-02-06 19:07:11,048 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array ArrayAccessExpression[IdentifierExpression[#memory_int#2,GLOBAL],[IdentifierExpression[~a~0!base,]]] [2025-02-06 19:07:11,089 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:11,101 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 5 statements into 1 equivalence classes. [2025-02-06 19:07:11,117 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 5 of 5 statements. [2025-02-06 19:07:11,117 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:11,117 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:11,119 INFO L256 TraceCheckSpWp]: Trace formula consists of 143 conjuncts, 5 conjuncts are in the unsatisfiable core [2025-02-06 19:07:11,120 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:11,148 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 7 statements into 1 equivalence classes. [2025-02-06 19:07:11,158 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 7 of 7 statements. [2025-02-06 19:07:11,158 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:11,158 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:11,159 INFO L256 TraceCheckSpWp]: Trace formula consists of 78 conjuncts, 10 conjuncts are in the unsatisfiable core [2025-02-06 19:07:11,161 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:11,254 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 19 [2025-02-06 19:07:11,291 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:11,293 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.2 stem predicates 2 loop predicates [2025-02-06 19:07:11,294 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 19 states and 22 transitions. cyclomatic complexity: 5 Second operand has 5 states, 5 states have (on average 2.4) internal successors, (12), 5 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:11,386 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 19 states and 22 transitions. cyclomatic complexity: 5. Second operand has 5 states, 5 states have (on average 2.4) internal successors, (12), 5 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 26 states and 30 transitions. Complement of second has 8 states. [2025-02-06 19:07:11,387 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 5 states 2 stem states 2 non-accepting loop states 1 accepting loop states [2025-02-06 19:07:11,388 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 2.4) internal successors, (12), 5 states have internal predecessors, (12), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:11,388 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5 states to 5 states and 12 transitions. [2025-02-06 19:07:11,391 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 12 transitions. Stem has 5 letters. Loop has 7 letters. [2025-02-06 19:07:11,392 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-02-06 19:07:11,392 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 12 transitions. Stem has 12 letters. Loop has 7 letters. [2025-02-06 19:07:11,392 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-02-06 19:07:11,392 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 5 states and 12 transitions. Stem has 5 letters. Loop has 14 letters. [2025-02-06 19:07:11,392 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-02-06 19:07:11,392 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 26 states and 30 transitions. [2025-02-06 19:07:11,393 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2025-02-06 19:07:11,393 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 26 states to 26 states and 30 transitions. [2025-02-06 19:07:11,393 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18 [2025-02-06 19:07:11,393 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 19 [2025-02-06 19:07:11,393 INFO L73 IsDeterministic]: Start isDeterministic. Operand 26 states and 30 transitions. [2025-02-06 19:07:11,393 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:07:11,394 INFO L218 hiAutomatonCegarLoop]: Abstraction has 26 states and 30 transitions. [2025-02-06 19:07:11,394 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states and 30 transitions. [2025-02-06 19:07:11,394 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2025-02-06 19:07:11,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 26 states have (on average 1.1538461538461537) internal successors, (30), 25 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:11,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 30 transitions. [2025-02-06 19:07:11,395 INFO L240 hiAutomatonCegarLoop]: Abstraction has 26 states and 30 transitions. [2025-02-06 19:07:11,395 INFO L432 stractBuchiCegarLoop]: Abstraction has 26 states and 30 transitions. [2025-02-06 19:07:11,395 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-02-06 19:07:11,395 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 26 states and 30 transitions. [2025-02-06 19:07:11,395 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2025-02-06 19:07:11,396 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:11,396 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:11,396 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:07:11,396 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:07:11,396 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~post16#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~post20#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~post24#1, main_#t~mem25#1, main_#t~mem26#1, main_~MAX~0#1.base, main_~MAX~0#1.offset, main_~a~0#1.base, main_~a~0#1.offset, main_~b~0#1.base, main_~b~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~MAX~0#1.base, main_~MAX~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~a~0#1.base, main_~a~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnStack(4);main_~b~0#1.base, main_~b~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnStack(4);main_~c~0#1.base, main_~c~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;call write~int#3(1000, main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);call write~int#2(1, main_~a~0#1.base, main_~a~0#1.offset, 4);call write~int#1(1, main_~b~0#1.base, main_~b~0#1.offset, 4);call write~int#0(1, main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem21#1 > main_#t~mem22#1);havoc main_#t~mem21#1;havoc main_#t~mem22#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume main_#t~mem17#1 > main_#t~mem18#1;havoc main_#t~mem17#1;havoc main_#t~mem18#1;call write~int#2(1, main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem19#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);main_#t~post20#1 := main_#t~mem19#1;call write~int#1(1 + main_#t~post20#1, main_~b~0#1.base, main_~b~0#1.offset, 4);havoc main_#t~mem19#1;havoc main_#t~post20#1;" [2025-02-06 19:07:11,396 INFO L754 eck$LassoCheckResult]: Loop: "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume main_#t~mem21#1 > main_#t~mem22#1;havoc main_#t~mem21#1;havoc main_#t~mem22#1;call write~int#1(1, main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem23#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);main_#t~post24#1 := main_#t~mem23#1;call write~int#0(1 + main_#t~post24#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem23#1;havoc main_#t~post24#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume main_#t~mem17#1 > main_#t~mem18#1;havoc main_#t~mem17#1;havoc main_#t~mem18#1;call write~int#2(1, main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem19#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);main_#t~post20#1 := main_#t~mem19#1;call write~int#1(1 + main_#t~post20#1, main_~b~0#1.base, main_~b~0#1.offset, 4);havoc main_#t~mem19#1;havoc main_#t~post20#1;" [2025-02-06 19:07:11,397 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:11,397 INFO L85 PathProgramCache]: Analyzing trace with hash 1934067169, now seen corresponding path program 1 times [2025-02-06 19:07:11,397 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:11,397 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1542085142] [2025-02-06 19:07:11,397 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:11,397 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:11,405 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 12 statements into 1 equivalence classes. [2025-02-06 19:07:11,421 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 12 of 12 statements. [2025-02-06 19:07:11,421 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:11,421 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:11,694 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:11,694 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:07:11,694 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1542085142] [2025-02-06 19:07:11,695 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1542085142] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:07:11,695 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [495104268] [2025-02-06 19:07:11,695 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:07:11,695 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:11,695 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:11,697 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:11,699 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2025-02-06 19:07:11,744 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 12 statements into 1 equivalence classes. [2025-02-06 19:07:11,763 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 12 of 12 statements. [2025-02-06 19:07:11,764 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:11,764 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:11,765 INFO L256 TraceCheckSpWp]: Trace formula consists of 233 conjuncts, 15 conjuncts are in the unsatisfiable core [2025-02-06 19:07:11,766 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:11,779 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-02-06 19:07:11,785 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-02-06 19:07:11,831 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2025-02-06 19:07:11,922 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2025-02-06 19:07:11,930 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2025-02-06 19:07:11,954 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:11,954 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:07:12,085 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:12,085 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [495104268] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:07:12,085 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:07:12,085 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4, 4] total 11 [2025-02-06 19:07:12,085 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [801679255] [2025-02-06 19:07:12,085 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:07:12,085 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:07:12,085 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:12,085 INFO L85 PathProgramCache]: Analyzing trace with hash 1346519853, now seen corresponding path program 3 times [2025-02-06 19:07:12,085 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:12,085 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [601104526] [2025-02-06 19:07:12,085 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:07:12,086 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:12,090 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 7 statements into 1 equivalence classes. [2025-02-06 19:07:12,093 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 7 of 7 statements. [2025-02-06 19:07:12,093 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-06 19:07:12,093 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unknown [2025-02-06 19:07:12,093 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [127212961] [2025-02-06 19:07:12,093 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:07:12,093 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:12,094 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:12,095 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:12,100 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2025-02-06 19:07:12,142 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 7 statements into 1 equivalence classes. [2025-02-06 19:07:12,166 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 7 of 7 statements. [2025-02-06 19:07:12,166 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-06 19:07:12,166 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:12,166 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:12,171 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 7 statements into 1 equivalence classes. [2025-02-06 19:07:12,179 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 7 of 7 statements. [2025-02-06 19:07:12,179 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:12,179 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:12,186 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:13,190 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:07:13,191 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2025-02-06 19:07:13,191 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=88, Unknown=0, NotChecked=0, Total=132 [2025-02-06 19:07:13,191 INFO L87 Difference]: Start difference. First operand 26 states and 30 transitions. cyclomatic complexity: 6 Second operand has 12 states, 11 states have (on average 3.090909090909091) internal successors, (34), 12 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:13,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:07:13,370 INFO L93 Difference]: Finished difference Result 64 states and 67 transitions. [2025-02-06 19:07:13,370 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 64 states and 67 transitions. [2025-02-06 19:07:13,372 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2025-02-06 19:07:13,372 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 64 states to 46 states and 49 transitions. [2025-02-06 19:07:13,372 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 19 [2025-02-06 19:07:13,372 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 19 [2025-02-06 19:07:13,372 INFO L73 IsDeterministic]: Start isDeterministic. Operand 46 states and 49 transitions. [2025-02-06 19:07:13,372 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:07:13,372 INFO L218 hiAutomatonCegarLoop]: Abstraction has 46 states and 49 transitions. [2025-02-06 19:07:13,372 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states and 49 transitions. [2025-02-06 19:07:13,374 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 40. [2025-02-06 19:07:13,374 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 40 states, 40 states have (on average 1.075) internal successors, (43), 39 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:13,374 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 43 transitions. [2025-02-06 19:07:13,375 INFO L240 hiAutomatonCegarLoop]: Abstraction has 40 states and 43 transitions. [2025-02-06 19:07:13,375 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-02-06 19:07:13,375 INFO L432 stractBuchiCegarLoop]: Abstraction has 40 states and 43 transitions. [2025-02-06 19:07:13,376 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-02-06 19:07:13,376 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 40 states and 43 transitions. [2025-02-06 19:07:13,376 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2025-02-06 19:07:13,376 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:13,376 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:13,377 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 4, 4, 4, 4, 4, 1, 1, 1] [2025-02-06 19:07:13,377 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:07:13,377 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~post16#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~post20#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~post24#1, main_#t~mem25#1, main_#t~mem26#1, main_~MAX~0#1.base, main_~MAX~0#1.offset, main_~a~0#1.base, main_~a~0#1.offset, main_~b~0#1.base, main_~b~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~MAX~0#1.base, main_~MAX~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~a~0#1.base, main_~a~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnStack(4);main_~b~0#1.base, main_~b~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnStack(4);main_~c~0#1.base, main_~c~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;call write~int#3(1000, main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);call write~int#2(1, main_~a~0#1.base, main_~a~0#1.offset, 4);call write~int#1(1, main_~b~0#1.base, main_~b~0#1.offset, 4);call write~int#0(1, main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem21#1 > main_#t~mem22#1);havoc main_#t~mem21#1;havoc main_#t~mem22#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem21#1 > main_#t~mem22#1);havoc main_#t~mem21#1;havoc main_#t~mem22#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem21#1 > main_#t~mem22#1);havoc main_#t~mem21#1;havoc main_#t~mem22#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem21#1 > main_#t~mem22#1);havoc main_#t~mem21#1;havoc main_#t~mem22#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume main_#t~mem17#1 > main_#t~mem18#1;havoc main_#t~mem17#1;havoc main_#t~mem18#1;call write~int#2(1, main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem19#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);main_#t~post20#1 := main_#t~mem19#1;call write~int#1(1 + main_#t~post20#1, main_~b~0#1.base, main_~b~0#1.offset, 4);havoc main_#t~mem19#1;havoc main_#t~post20#1;" [2025-02-06 19:07:13,378 INFO L754 eck$LassoCheckResult]: Loop: "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume main_#t~mem21#1 > main_#t~mem22#1;havoc main_#t~mem21#1;havoc main_#t~mem22#1;call write~int#1(1, main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem23#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);main_#t~post24#1 := main_#t~mem23#1;call write~int#0(1 + main_#t~post24#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem23#1;havoc main_#t~post24#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume main_#t~mem17#1 > main_#t~mem18#1;havoc main_#t~mem17#1;havoc main_#t~mem18#1;call write~int#2(1, main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem19#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);main_#t~post20#1 := main_#t~mem19#1;call write~int#1(1 + main_#t~post20#1, main_~b~0#1.base, main_~b~0#1.offset, 4);havoc main_#t~mem19#1;havoc main_#t~post20#1;" [2025-02-06 19:07:13,378 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:13,378 INFO L85 PathProgramCache]: Analyzing trace with hash 1822853643, now seen corresponding path program 2 times [2025-02-06 19:07:13,378 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:13,378 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [292325018] [2025-02-06 19:07:13,378 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:07:13,378 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:13,388 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 33 statements into 2 equivalence classes. [2025-02-06 19:07:13,400 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 33 of 33 statements. [2025-02-06 19:07:13,400 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-02-06 19:07:13,400 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:14,006 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 0 proven. 54 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:14,006 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:07:14,006 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [292325018] [2025-02-06 19:07:14,006 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [292325018] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:07:14,006 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1108633675] [2025-02-06 19:07:14,007 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:07:14,007 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:14,007 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:14,009 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:14,010 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2025-02-06 19:07:14,078 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 33 statements into 2 equivalence classes. [2025-02-06 19:07:14,125 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 33 of 33 statements. [2025-02-06 19:07:14,125 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-02-06 19:07:14,125 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:14,127 INFO L256 TraceCheckSpWp]: Trace formula consists of 455 conjuncts, 24 conjuncts are in the unsatisfiable core [2025-02-06 19:07:14,129 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:14,145 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-02-06 19:07:14,150 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-02-06 19:07:14,191 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2025-02-06 19:07:14,265 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2025-02-06 19:07:14,339 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2025-02-06 19:07:14,434 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2025-02-06 19:07:14,553 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2025-02-06 19:07:14,565 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2025-02-06 19:07:14,591 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 0 proven. 54 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:14,591 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:07:14,886 INFO L134 CoverageAnalysis]: Checked inductivity of 54 backedges. 0 proven. 54 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:14,887 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1108633675] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:07:14,887 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:07:14,887 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 7] total 20 [2025-02-06 19:07:14,887 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [906765879] [2025-02-06 19:07:14,887 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:07:14,887 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:07:14,887 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:14,887 INFO L85 PathProgramCache]: Analyzing trace with hash 1346519853, now seen corresponding path program 4 times [2025-02-06 19:07:14,887 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:14,887 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1463506573] [2025-02-06 19:07:14,887 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 19:07:14,887 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:14,894 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 7 statements into 2 equivalence classes. [2025-02-06 19:07:14,910 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 7 of 7 statements. [2025-02-06 19:07:14,910 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-06 19:07:14,910 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unknown [2025-02-06 19:07:14,910 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [1418881330] [2025-02-06 19:07:14,910 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 19:07:14,910 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:14,910 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:14,914 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:14,921 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2025-02-06 19:07:14,966 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 7 statements into 2 equivalence classes. [2025-02-06 19:07:14,992 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 7 of 7 statements. [2025-02-06 19:07:14,992 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-06 19:07:14,992 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:14,993 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:14,996 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 7 statements into 1 equivalence classes. [2025-02-06 19:07:15,006 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 7 of 7 statements. [2025-02-06 19:07:15,006 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:15,006 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:15,013 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:16,021 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:07:16,021 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2025-02-06 19:07:16,021 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=148, Invalid=272, Unknown=0, NotChecked=0, Total=420 [2025-02-06 19:07:16,022 INFO L87 Difference]: Start difference. First operand 40 states and 43 transitions. cyclomatic complexity: 5 Second operand has 21 states, 20 states have (on average 4.85) internal successors, (97), 21 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:16,483 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:07:16,483 INFO L93 Difference]: Finished difference Result 124 states and 127 transitions. [2025-02-06 19:07:16,483 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 124 states and 127 transitions. [2025-02-06 19:07:16,485 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2025-02-06 19:07:16,485 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 124 states to 88 states and 91 transitions. [2025-02-06 19:07:16,486 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 19 [2025-02-06 19:07:16,486 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 19 [2025-02-06 19:07:16,486 INFO L73 IsDeterministic]: Start isDeterministic. Operand 88 states and 91 transitions. [2025-02-06 19:07:16,486 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:07:16,486 INFO L218 hiAutomatonCegarLoop]: Abstraction has 88 states and 91 transitions. [2025-02-06 19:07:16,486 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 88 states and 91 transitions. [2025-02-06 19:07:16,488 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 88 to 82. [2025-02-06 19:07:16,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 82 states, 82 states have (on average 1.0365853658536586) internal successors, (85), 81 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:16,489 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 85 transitions. [2025-02-06 19:07:16,489 INFO L240 hiAutomatonCegarLoop]: Abstraction has 82 states and 85 transitions. [2025-02-06 19:07:16,489 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2025-02-06 19:07:16,489 INFO L432 stractBuchiCegarLoop]: Abstraction has 82 states and 85 transitions. [2025-02-06 19:07:16,489 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-02-06 19:07:16,489 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 82 states and 85 transitions. [2025-02-06 19:07:16,490 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2025-02-06 19:07:16,490 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:16,490 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:16,491 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [11, 11, 10, 10, 10, 10, 10, 1, 1, 1] [2025-02-06 19:07:16,491 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:07:16,492 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~post16#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~post20#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~post24#1, main_#t~mem25#1, main_#t~mem26#1, main_~MAX~0#1.base, main_~MAX~0#1.offset, main_~a~0#1.base, main_~a~0#1.offset, main_~b~0#1.base, main_~b~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~MAX~0#1.base, main_~MAX~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~a~0#1.base, main_~a~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnStack(4);main_~b~0#1.base, main_~b~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnStack(4);main_~c~0#1.base, main_~c~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;call write~int#3(1000, main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);call write~int#2(1, main_~a~0#1.base, main_~a~0#1.offset, 4);call write~int#1(1, main_~b~0#1.base, main_~b~0#1.offset, 4);call write~int#0(1, main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem21#1 > main_#t~mem22#1);havoc main_#t~mem21#1;havoc main_#t~mem22#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem21#1 > main_#t~mem22#1);havoc main_#t~mem21#1;havoc main_#t~mem22#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem21#1 > main_#t~mem22#1);havoc main_#t~mem21#1;havoc main_#t~mem22#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem21#1 > main_#t~mem22#1);havoc main_#t~mem21#1;havoc main_#t~mem22#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem21#1 > main_#t~mem22#1);havoc main_#t~mem21#1;havoc main_#t~mem22#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem21#1 > main_#t~mem22#1);havoc main_#t~mem21#1;havoc main_#t~mem22#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem21#1 > main_#t~mem22#1);havoc main_#t~mem21#1;havoc main_#t~mem22#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem21#1 > main_#t~mem22#1);havoc main_#t~mem21#1;havoc main_#t~mem22#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem21#1 > main_#t~mem22#1);havoc main_#t~mem21#1;havoc main_#t~mem22#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem21#1 > main_#t~mem22#1);havoc main_#t~mem21#1;havoc main_#t~mem22#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume main_#t~mem17#1 > main_#t~mem18#1;havoc main_#t~mem17#1;havoc main_#t~mem18#1;call write~int#2(1, main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem19#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);main_#t~post20#1 := main_#t~mem19#1;call write~int#1(1 + main_#t~post20#1, main_~b~0#1.base, main_~b~0#1.offset, 4);havoc main_#t~mem19#1;havoc main_#t~post20#1;" [2025-02-06 19:07:16,494 INFO L754 eck$LassoCheckResult]: Loop: "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume main_#t~mem21#1 > main_#t~mem22#1;havoc main_#t~mem21#1;havoc main_#t~mem22#1;call write~int#1(1, main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem23#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);main_#t~post24#1 := main_#t~mem23#1;call write~int#0(1 + main_#t~post24#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem23#1;havoc main_#t~post24#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume main_#t~mem17#1 > main_#t~mem18#1;havoc main_#t~mem17#1;havoc main_#t~mem18#1;call write~int#2(1, main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem19#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);main_#t~post20#1 := main_#t~mem19#1;call write~int#1(1 + main_#t~post20#1, main_~b~0#1.base, main_~b~0#1.offset, 4);havoc main_#t~mem19#1;havoc main_#t~post20#1;" [2025-02-06 19:07:16,495 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:16,495 INFO L85 PathProgramCache]: Analyzing trace with hash -224865333, now seen corresponding path program 3 times [2025-02-06 19:07:16,495 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:16,495 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1233536919] [2025-02-06 19:07:16,495 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:07:16,495 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:16,527 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 75 statements into 11 equivalence classes. [2025-02-06 19:07:16,589 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) and asserted 75 of 75 statements. [2025-02-06 19:07:16,590 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2025-02-06 19:07:16,590 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:18,077 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:18,078 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:07:18,078 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1233536919] [2025-02-06 19:07:18,078 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1233536919] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:07:18,078 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1205118014] [2025-02-06 19:07:18,078 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:07:18,078 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:18,078 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:18,080 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:18,084 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2025-02-06 19:07:18,153 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 75 statements into 11 equivalence classes. [2025-02-06 19:07:18,931 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) and asserted 75 of 75 statements. [2025-02-06 19:07:18,931 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2025-02-06 19:07:18,931 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:18,935 INFO L256 TraceCheckSpWp]: Trace formula consists of 899 conjuncts, 42 conjuncts are in the unsatisfiable core [2025-02-06 19:07:18,947 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:18,965 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-02-06 19:07:18,968 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-02-06 19:07:18,995 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2025-02-06 19:07:19,048 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2025-02-06 19:07:19,106 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2025-02-06 19:07:19,160 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2025-02-06 19:07:19,211 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2025-02-06 19:07:19,273 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2025-02-06 19:07:19,332 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2025-02-06 19:07:19,410 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2025-02-06 19:07:19,472 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2025-02-06 19:07:19,537 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2025-02-06 19:07:19,604 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2025-02-06 19:07:19,614 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2025-02-06 19:07:19,634 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:19,634 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:07:20,197 INFO L134 CoverageAnalysis]: Checked inductivity of 345 backedges. 0 proven. 345 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:20,197 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1205118014] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:07:20,198 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:07:20,198 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 13, 13] total 38 [2025-02-06 19:07:20,198 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [78395491] [2025-02-06 19:07:20,198 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:07:20,198 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:07:20,198 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:20,198 INFO L85 PathProgramCache]: Analyzing trace with hash 1346519853, now seen corresponding path program 5 times [2025-02-06 19:07:20,198 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:20,198 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1723566492] [2025-02-06 19:07:20,198 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-06 19:07:20,198 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:20,205 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 7 statements into 1 equivalence classes. [2025-02-06 19:07:20,207 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 7 of 7 statements. [2025-02-06 19:07:20,207 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:07:20,207 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unknown [2025-02-06 19:07:20,208 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [45216609] [2025-02-06 19:07:20,208 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-06 19:07:20,208 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:20,208 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:20,210 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:20,211 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2025-02-06 19:07:20,262 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 7 statements into 1 equivalence classes. [2025-02-06 19:07:20,272 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 7 of 7 statements. [2025-02-06 19:07:20,273 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:07:20,273 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:20,273 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:07:20,277 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 7 statements into 1 equivalence classes. [2025-02-06 19:07:20,288 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 7 of 7 statements. [2025-02-06 19:07:20,288 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:07:20,288 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:07:20,297 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:07:22,026 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:07:22,026 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2025-02-06 19:07:22,027 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=582, Invalid=900, Unknown=0, NotChecked=0, Total=1482 [2025-02-06 19:07:22,027 INFO L87 Difference]: Start difference. First operand 82 states and 85 transitions. cyclomatic complexity: 5 Second operand has 39 states, 38 states have (on average 5.868421052631579) internal successors, (223), 39 states have internal predecessors, (223), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:22,993 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:07:22,993 INFO L93 Difference]: Finished difference Result 244 states and 247 transitions. [2025-02-06 19:07:22,993 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 244 states and 247 transitions. [2025-02-06 19:07:22,995 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2025-02-06 19:07:22,996 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 244 states to 172 states and 175 transitions. [2025-02-06 19:07:22,996 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 19 [2025-02-06 19:07:22,996 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 19 [2025-02-06 19:07:22,996 INFO L73 IsDeterministic]: Start isDeterministic. Operand 172 states and 175 transitions. [2025-02-06 19:07:22,996 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:07:22,997 INFO L218 hiAutomatonCegarLoop]: Abstraction has 172 states and 175 transitions. [2025-02-06 19:07:22,997 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172 states and 175 transitions. [2025-02-06 19:07:23,000 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172 to 166. [2025-02-06 19:07:23,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 166 states, 166 states have (on average 1.0180722891566265) internal successors, (169), 165 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:07:23,001 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 169 transitions. [2025-02-06 19:07:23,001 INFO L240 hiAutomatonCegarLoop]: Abstraction has 166 states and 169 transitions. [2025-02-06 19:07:23,001 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2025-02-06 19:07:23,002 INFO L432 stractBuchiCegarLoop]: Abstraction has 166 states and 169 transitions. [2025-02-06 19:07:23,002 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-02-06 19:07:23,002 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 166 states and 169 transitions. [2025-02-06 19:07:23,003 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 7 [2025-02-06 19:07:23,003 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:07:23,003 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:07:23,005 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [23, 23, 22, 22, 22, 22, 22, 1, 1, 1] [2025-02-06 19:07:23,005 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:07:23,005 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~malloc2#1.base, main_#t~malloc2#1.offset, main_#t~malloc3#1.base, main_#t~malloc3#1.offset, main_#t~malloc4#1.base, main_#t~malloc4#1.offset, main_#t~malloc5#1.base, main_#t~malloc5#1.offset, main_#t~mem6#1, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem11#1, main_#t~mem12#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem15#1, main_#t~post16#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem19#1, main_#t~post20#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~mem23#1, main_#t~post24#1, main_#t~mem25#1, main_#t~mem26#1, main_~MAX~0#1.base, main_~MAX~0#1.offset, main_~a~0#1.base, main_~a~0#1.offset, main_~b~0#1.base, main_~b~0#1.offset, main_~c~0#1.base, main_~c~0#1.offset;call main_#t~malloc2#1.base, main_#t~malloc2#1.offset := #Ultimate.allocOnStack(4);main_~MAX~0#1.base, main_~MAX~0#1.offset := main_#t~malloc2#1.base, main_#t~malloc2#1.offset;call main_#t~malloc3#1.base, main_#t~malloc3#1.offset := #Ultimate.allocOnStack(4);main_~a~0#1.base, main_~a~0#1.offset := main_#t~malloc3#1.base, main_#t~malloc3#1.offset;call main_#t~malloc4#1.base, main_#t~malloc4#1.offset := #Ultimate.allocOnStack(4);main_~b~0#1.base, main_~b~0#1.offset := main_#t~malloc4#1.base, main_#t~malloc4#1.offset;call main_#t~malloc5#1.base, main_#t~malloc5#1.offset := #Ultimate.allocOnStack(4);main_~c~0#1.base, main_~c~0#1.offset := main_#t~malloc5#1.base, main_#t~malloc5#1.offset;call write~int#3(1000, main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);call write~int#2(1, main_~a~0#1.base, main_~a~0#1.offset, 4);call write~int#1(1, main_~b~0#1.base, main_~b~0#1.offset, 4);call write~int#0(1, main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem21#1 > main_#t~mem22#1);havoc main_#t~mem21#1;havoc main_#t~mem22#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem21#1 > main_#t~mem22#1);havoc main_#t~mem21#1;havoc main_#t~mem22#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem21#1 > main_#t~mem22#1);havoc main_#t~mem21#1;havoc main_#t~mem22#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem21#1 > main_#t~mem22#1);havoc main_#t~mem21#1;havoc main_#t~mem22#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem21#1 > main_#t~mem22#1);havoc main_#t~mem21#1;havoc main_#t~mem22#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem21#1 > main_#t~mem22#1);havoc main_#t~mem21#1;havoc main_#t~mem22#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem21#1 > main_#t~mem22#1);havoc main_#t~mem21#1;havoc main_#t~mem22#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem21#1 > main_#t~mem22#1);havoc main_#t~mem21#1;havoc main_#t~mem22#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem21#1 > main_#t~mem22#1);havoc main_#t~mem21#1;havoc main_#t~mem22#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem21#1 > main_#t~mem22#1);havoc main_#t~mem21#1;havoc main_#t~mem22#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem21#1 > main_#t~mem22#1);havoc main_#t~mem21#1;havoc main_#t~mem22#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem21#1 > main_#t~mem22#1);havoc main_#t~mem21#1;havoc main_#t~mem22#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem21#1 > main_#t~mem22#1);havoc main_#t~mem21#1;havoc main_#t~mem22#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem21#1 > main_#t~mem22#1);havoc main_#t~mem21#1;havoc main_#t~mem22#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem21#1 > main_#t~mem22#1);havoc main_#t~mem21#1;havoc main_#t~mem22#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem21#1 > main_#t~mem22#1);havoc main_#t~mem21#1;havoc main_#t~mem22#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem21#1 > main_#t~mem22#1);havoc main_#t~mem21#1;havoc main_#t~mem22#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem21#1 > main_#t~mem22#1);havoc main_#t~mem21#1;havoc main_#t~mem22#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem21#1 > main_#t~mem22#1);havoc main_#t~mem21#1;havoc main_#t~mem22#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem21#1 > main_#t~mem22#1);havoc main_#t~mem21#1;havoc main_#t~mem22#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem21#1 > main_#t~mem22#1);havoc main_#t~mem21#1;havoc main_#t~mem22#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem17#1 > main_#t~mem18#1);havoc main_#t~mem17#1;havoc main_#t~mem18#1;" "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem21#1 > main_#t~mem22#1);havoc main_#t~mem21#1;havoc main_#t~mem22#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume main_#t~mem17#1 > main_#t~mem18#1;havoc main_#t~mem17#1;havoc main_#t~mem18#1;call write~int#2(1, main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem19#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);main_#t~post20#1 := main_#t~mem19#1;call write~int#1(1 + main_#t~post20#1, main_~b~0#1.base, main_~b~0#1.offset, 4);havoc main_#t~mem19#1;havoc main_#t~post20#1;" [2025-02-06 19:07:23,005 INFO L754 eck$LassoCheckResult]: Loop: "call main_#t~mem21#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem22#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume main_#t~mem21#1 > main_#t~mem22#1;havoc main_#t~mem21#1;havoc main_#t~mem22#1;call write~int#1(1, main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem23#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);main_#t~post24#1 := main_#t~mem23#1;call write~int#0(1 + main_#t~post24#1, main_~c~0#1.base, main_~c~0#1.offset, 4);havoc main_#t~mem23#1;havoc main_#t~post24#1;" "call main_#t~mem25#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem26#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume !(main_#t~mem25#1 > main_#t~mem26#1);havoc main_#t~mem25#1;havoc main_#t~mem26#1;" "assume true;call main_#t~mem6#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem7#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem8#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem10#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem11#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);call main_#t~mem12#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem13#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);call main_#t~mem14#1 := read~int#0(main_~c~0#1.base, main_~c~0#1.offset, 4);" "assume !(main_#t~mem6#1 * main_#t~mem7#1 * main_#t~mem8#1 == main_#t~mem9#1 * main_#t~mem10#1 * main_#t~mem11#1 + main_#t~mem12#1 * main_#t~mem13#1 * main_#t~mem14#1);havoc main_#t~mem6#1;havoc main_#t~mem7#1;havoc main_#t~mem8#1;havoc main_#t~mem9#1;havoc main_#t~mem10#1;havoc main_#t~mem11#1;havoc main_#t~mem12#1;havoc main_#t~mem13#1;havoc main_#t~mem14#1;call main_#t~mem15#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);main_#t~post16#1 := main_#t~mem15#1;call write~int#2(1 + main_#t~post16#1, main_~a~0#1.base, main_~a~0#1.offset, 4);havoc main_#t~mem15#1;havoc main_#t~post16#1;call main_#t~mem17#1 := read~int#2(main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem18#1 := read~int#3(main_~MAX~0#1.base, main_~MAX~0#1.offset, 4);" "assume main_#t~mem17#1 > main_#t~mem18#1;havoc main_#t~mem17#1;havoc main_#t~mem18#1;call write~int#2(1, main_~a~0#1.base, main_~a~0#1.offset, 4);call main_#t~mem19#1 := read~int#1(main_~b~0#1.base, main_~b~0#1.offset, 4);main_#t~post20#1 := main_#t~mem19#1;call write~int#1(1 + main_#t~post20#1, main_~b~0#1.base, main_~b~0#1.offset, 4);havoc main_#t~mem19#1;havoc main_#t~post20#1;" [2025-02-06 19:07:23,006 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:23,006 INFO L85 PathProgramCache]: Analyzing trace with hash 1764808523, now seen corresponding path program 4 times [2025-02-06 19:07:23,006 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:23,006 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1150870760] [2025-02-06 19:07:23,006 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 19:07:23,006 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:23,027 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 159 statements into 2 equivalence classes. [2025-02-06 19:07:23,093 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 159 of 159 statements. [2025-02-06 19:07:23,094 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-06 19:07:23,094 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:27,593 INFO L134 CoverageAnalysis]: Checked inductivity of 1683 backedges. 0 proven. 1683 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:27,594 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:07:27,594 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1150870760] [2025-02-06 19:07:27,594 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1150870760] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:07:27,594 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [339966913] [2025-02-06 19:07:27,594 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 19:07:27,594 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:27,594 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:27,597 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:27,598 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2025-02-06 19:07:27,695 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 159 statements into 2 equivalence classes. [2025-02-06 19:07:29,712 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 159 of 159 statements. [2025-02-06 19:07:29,712 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-06 19:07:29,712 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:07:29,720 INFO L256 TraceCheckSpWp]: Trace formula consists of 1787 conjuncts, 78 conjuncts are in the unsatisfiable core [2025-02-06 19:07:29,730 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:07:29,739 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-02-06 19:07:29,749 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-02-06 19:07:29,790 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2025-02-06 19:07:29,842 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2025-02-06 19:07:29,899 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2025-02-06 19:07:29,950 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2025-02-06 19:07:30,006 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2025-02-06 19:07:30,073 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2025-02-06 19:07:30,135 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2025-02-06 19:07:30,212 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2025-02-06 19:07:30,274 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2025-02-06 19:07:30,351 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2025-02-06 19:07:30,417 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2025-02-06 19:07:30,489 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2025-02-06 19:07:30,564 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2025-02-06 19:07:30,635 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2025-02-06 19:07:30,714 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2025-02-06 19:07:30,801 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2025-02-06 19:07:30,863 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2025-02-06 19:07:30,928 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2025-02-06 19:07:30,998 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2025-02-06 19:07:31,074 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2025-02-06 19:07:31,146 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2025-02-06 19:07:31,218 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 13 [2025-02-06 19:07:31,292 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2025-02-06 19:07:31,298 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 7 [2025-02-06 19:07:31,330 INFO L134 CoverageAnalysis]: Checked inductivity of 1683 backedges. 0 proven. 1683 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:31,330 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:07:33,336 INFO L134 CoverageAnalysis]: Checked inductivity of 1683 backedges. 0 proven. 1683 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:07:33,336 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [339966913] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:07:33,336 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:07:33,336 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 25, 25] total 80 [2025-02-06 19:07:33,336 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1975433397] [2025-02-06 19:07:33,336 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:07:33,340 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:07:33,340 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:07:33,340 INFO L85 PathProgramCache]: Analyzing trace with hash 1346519853, now seen corresponding path program 6 times [2025-02-06 19:07:33,340 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:07:33,340 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2058115248] [2025-02-06 19:07:33,340 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-06 19:07:33,340 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:07:33,348 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 7 statements into 1 equivalence classes. [2025-02-06 19:07:33,353 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 7 of 7 statements. [2025-02-06 19:07:33,353 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-02-06 19:07:33,354 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unknown [2025-02-06 19:07:33,354 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [471232221] [2025-02-06 19:07:33,354 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-06 19:07:33,357 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:07:33,357 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:07:33,360 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:07:33,361 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process