./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/seq-mthreaded/pals_lcr.5.ufo.BOUNDED-10.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version c00e63dc Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/seq-mthreaded/pals_lcr.5.ufo.BOUNDED-10.pals.c -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash f7497e4203b86f15acb74ef94ae3bce6255aa8233294110bb99f24cde0725dc7 --- Real Ultimate output --- This is Ultimate 0.3.0-?-c00e63d-m [2025-02-06 19:58:25,464 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-02-06 19:58:25,529 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2025-02-06 19:58:25,535 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-02-06 19:58:25,536 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-02-06 19:58:25,536 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-02-06 19:58:25,557 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-02-06 19:58:25,557 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-02-06 19:58:25,557 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-02-06 19:58:25,557 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-02-06 19:58:25,557 INFO L153 SettingsManager]: * Use memory slicer=true [2025-02-06 19:58:25,558 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-02-06 19:58:25,558 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-02-06 19:58:25,558 INFO L153 SettingsManager]: * Use SBE=true [2025-02-06 19:58:25,558 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-02-06 19:58:25,558 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-02-06 19:58:25,558 INFO L153 SettingsManager]: * Use old map elimination=false [2025-02-06 19:58:25,558 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-02-06 19:58:25,558 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-02-06 19:58:25,558 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-02-06 19:58:25,558 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-02-06 19:58:25,558 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-02-06 19:58:25,558 INFO L153 SettingsManager]: * sizeof long=4 [2025-02-06 19:58:25,560 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-02-06 19:58:25,560 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-02-06 19:58:25,560 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-02-06 19:58:25,560 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-02-06 19:58:25,560 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-02-06 19:58:25,560 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-02-06 19:58:25,560 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-02-06 19:58:25,560 INFO L153 SettingsManager]: * sizeof long double=12 [2025-02-06 19:58:25,560 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-02-06 19:58:25,560 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-02-06 19:58:25,560 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-02-06 19:58:25,560 INFO L153 SettingsManager]: * Use constant arrays=true [2025-02-06 19:58:25,560 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-02-06 19:58:25,561 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-02-06 19:58:25,561 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-02-06 19:58:25,561 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-02-06 19:58:25,561 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-02-06 19:58:25,561 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> f7497e4203b86f15acb74ef94ae3bce6255aa8233294110bb99f24cde0725dc7 [2025-02-06 19:58:25,768 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-02-06 19:58:25,773 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-02-06 19:58:25,774 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-02-06 19:58:25,775 INFO L270 PluginConnector]: Initializing CDTParser... [2025-02-06 19:58:25,775 INFO L274 PluginConnector]: CDTParser initialized [2025-02-06 19:58:25,776 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/seq-mthreaded/pals_lcr.5.ufo.BOUNDED-10.pals.c [2025-02-06 19:58:26,186 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/b9426b84a/8a714128022240258f8829a85d0e9b73/FLAG5f690620e [2025-02-06 19:58:27,786 INFO L384 CDTParser]: Found 1 translation units. [2025-02-06 19:58:27,787 INFO L180 CDTParser]: Scanning /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/seq-mthreaded/pals_lcr.5.ufo.BOUNDED-10.pals.c [2025-02-06 19:58:27,794 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/b9426b84a/8a714128022240258f8829a85d0e9b73/FLAG5f690620e [2025-02-06 19:58:28,104 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/b9426b84a/8a714128022240258f8829a85d0e9b73 [2025-02-06 19:58:28,106 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-02-06 19:58:28,108 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-02-06 19:58:28,109 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-02-06 19:58:28,109 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-02-06 19:58:28,112 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-02-06 19:58:28,113 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.02 07:58:28" (1/1) ... [2025-02-06 19:58:28,114 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7e8bcc8b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:58:28, skipping insertion in model container [2025-02-06 19:58:28,115 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.02 07:58:28" (1/1) ... [2025-02-06 19:58:28,136 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-02-06 19:58:28,292 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-06 19:58:28,307 INFO L200 MainTranslator]: Completed pre-run [2025-02-06 19:58:28,353 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-06 19:58:28,368 INFO L204 MainTranslator]: Completed translation [2025-02-06 19:58:28,369 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:58:28 WrapperNode [2025-02-06 19:58:28,369 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-02-06 19:58:28,370 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-02-06 19:58:28,370 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-02-06 19:58:28,370 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-02-06 19:58:28,376 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:58:28" (1/1) ... [2025-02-06 19:58:28,386 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:58:28" (1/1) ... [2025-02-06 19:58:28,409 INFO L138 Inliner]: procedures = 24, calls = 17, calls flagged for inlining = 12, calls inlined = 12, statements flattened = 318 [2025-02-06 19:58:28,409 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-02-06 19:58:28,410 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-02-06 19:58:28,410 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-02-06 19:58:28,410 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-02-06 19:58:28,417 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:58:28" (1/1) ... [2025-02-06 19:58:28,417 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:58:28" (1/1) ... [2025-02-06 19:58:28,420 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:58:28" (1/1) ... [2025-02-06 19:58:28,432 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-02-06 19:58:28,433 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:58:28" (1/1) ... [2025-02-06 19:58:28,433 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:58:28" (1/1) ... [2025-02-06 19:58:28,437 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:58:28" (1/1) ... [2025-02-06 19:58:28,438 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:58:28" (1/1) ... [2025-02-06 19:58:28,439 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:58:28" (1/1) ... [2025-02-06 19:58:28,439 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:58:28" (1/1) ... [2025-02-06 19:58:28,441 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-02-06 19:58:28,442 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-02-06 19:58:28,442 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-02-06 19:58:28,442 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-02-06 19:58:28,442 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:58:28" (1/1) ... [2025-02-06 19:58:28,450 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:58:28,459 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:58:28,469 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:58:28,475 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-02-06 19:58:28,491 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-02-06 19:58:28,491 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-02-06 19:58:28,491 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-02-06 19:58:28,491 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-02-06 19:58:28,554 INFO L257 CfgBuilder]: Building ICFG [2025-02-06 19:58:28,555 INFO L287 CfgBuilder]: Building CFG for each procedure with an implementation [2025-02-06 19:58:28,864 INFO L? ?]: Removed 40 outVars from TransFormulas that were not future-live. [2025-02-06 19:58:28,864 INFO L308 CfgBuilder]: Performing block encoding [2025-02-06 19:58:28,871 INFO L332 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-02-06 19:58:28,871 INFO L337 CfgBuilder]: Removed 0 assume(true) statements. [2025-02-06 19:58:28,872 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 06.02 07:58:28 BoogieIcfgContainer [2025-02-06 19:58:28,872 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-02-06 19:58:28,872 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-02-06 19:58:28,872 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-02-06 19:58:28,876 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-02-06 19:58:28,876 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-06 19:58:28,877 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 06.02 07:58:28" (1/3) ... [2025-02-06 19:58:28,877 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7ec0797a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.02 07:58:28, skipping insertion in model container [2025-02-06 19:58:28,877 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-06 19:58:28,878 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:58:28" (2/3) ... [2025-02-06 19:58:28,878 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@7ec0797a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.02 07:58:28, skipping insertion in model container [2025-02-06 19:58:28,878 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-06 19:58:28,878 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 06.02 07:58:28" (3/3) ... [2025-02-06 19:58:28,879 INFO L363 chiAutomizerObserver]: Analyzing ICFG pals_lcr.5.ufo.BOUNDED-10.pals.c [2025-02-06 19:58:28,909 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-02-06 19:58:28,909 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-02-06 19:58:28,909 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-02-06 19:58:28,909 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-02-06 19:58:28,910 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-02-06 19:58:28,910 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-02-06 19:58:28,910 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-02-06 19:58:28,910 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-02-06 19:58:28,915 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 82 states, 81 states have (on average 1.728395061728395) internal successors, (140), 81 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:58:28,930 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 42 [2025-02-06 19:58:28,931 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:58:28,931 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:58:28,938 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:58:28,939 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:58:28,939 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-02-06 19:58:28,940 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 82 states, 81 states have (on average 1.728395061728395) internal successors, (140), 81 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:58:28,944 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 42 [2025-02-06 19:58:28,944 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:58:28,944 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:58:28,944 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:58:28,944 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:58:28,951 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(33, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~ret25#1, main_#t~ret26#1, main_#t~post27#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~mode5~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1;" "assume !(0 == ~r1~0);init_~tmp~0#1 := 0;" "init_#res#1 := init_~tmp~0#1;" "main_#t~ret25#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret25#1;havoc main_#t~ret25#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume 0 == assume_abort_if_not_~cond#1;assume false;" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;main_~i2~0#1 := 0;" [2025-02-06 19:58:28,954 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i2~0#1 < 10;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0;" "assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1;" "havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0;" "assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1;" "havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0;" "assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1;" "havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0;" "assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1;" "havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0;" "assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1;" "havoc node5_~m5~0#1;assume { :end_inline_node5 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1;" "assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 <= 1);check_~tmp~1#1 := 0;" "check_#res#1 := check_~tmp~1#1;" "main_#t~ret26#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret26#1;havoc main_#t~ret26#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1;" "assume !(0 == assert_~arg#1 % 256);" "havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post27#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post27#1;havoc main_#t~post27#1;" [2025-02-06 19:58:28,960 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:58:28,960 INFO L85 PathProgramCache]: Analyzing trace with hash -917705939, now seen corresponding path program 1 times [2025-02-06 19:58:28,965 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:58:28,965 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1526727330] [2025-02-06 19:58:28,966 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:58:28,966 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:58:29,025 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 7 statements into 1 equivalence classes. [2025-02-06 19:58:29,047 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 7 of 7 statements. [2025-02-06 19:58:29,047 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:58:29,047 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:58:29,113 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:58:29,114 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:58:29,114 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1526727330] [2025-02-06 19:58:29,114 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1526727330] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:58:29,114 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:58:29,115 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-02-06 19:58:29,116 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [570981247] [2025-02-06 19:58:29,116 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:58:29,118 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:58:29,119 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:58:29,119 INFO L85 PathProgramCache]: Analyzing trace with hash -1138923276, now seen corresponding path program 1 times [2025-02-06 19:58:29,119 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:58:29,119 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [999661673] [2025-02-06 19:58:29,119 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:58:29,120 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:58:29,128 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 16 statements into 1 equivalence classes. [2025-02-06 19:58:29,184 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 16 of 16 statements. [2025-02-06 19:58:29,186 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:58:29,187 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:58:29,450 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:58:29,450 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:58:29,450 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [999661673] [2025-02-06 19:58:29,450 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [999661673] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:58:29,450 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:58:29,450 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-06 19:58:29,450 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [112230616] [2025-02-06 19:58:29,450 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:58:29,451 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:58:29,452 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:58:29,472 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2025-02-06 19:58:29,472 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2025-02-06 19:58:29,473 INFO L87 Difference]: Start difference. First operand has 82 states, 81 states have (on average 1.728395061728395) internal successors, (140), 81 states have internal predecessors, (140), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 3.5) internal successors, (7), 2 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:58:29,480 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:58:29,481 INFO L93 Difference]: Finished difference Result 81 states and 137 transitions. [2025-02-06 19:58:29,481 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 81 states and 137 transitions. [2025-02-06 19:58:29,483 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 40 [2025-02-06 19:58:29,487 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 81 states to 77 states and 133 transitions. [2025-02-06 19:58:29,488 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 77 [2025-02-06 19:58:29,488 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 77 [2025-02-06 19:58:29,488 INFO L73 IsDeterministic]: Start isDeterministic. Operand 77 states and 133 transitions. [2025-02-06 19:58:29,489 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:58:29,489 INFO L218 hiAutomatonCegarLoop]: Abstraction has 77 states and 133 transitions. [2025-02-06 19:58:29,496 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states and 133 transitions. [2025-02-06 19:58:29,504 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 77. [2025-02-06 19:58:29,504 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 77 states, 77 states have (on average 1.7272727272727273) internal successors, (133), 76 states have internal predecessors, (133), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:58:29,505 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 133 transitions. [2025-02-06 19:58:29,506 INFO L240 hiAutomatonCegarLoop]: Abstraction has 77 states and 133 transitions. [2025-02-06 19:58:29,506 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-02-06 19:58:29,508 INFO L432 stractBuchiCegarLoop]: Abstraction has 77 states and 133 transitions. [2025-02-06 19:58:29,508 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-02-06 19:58:29,508 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 77 states and 133 transitions. [2025-02-06 19:58:29,509 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 40 [2025-02-06 19:58:29,509 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:58:29,509 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:58:29,509 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:58:29,509 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:58:29,510 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(33, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~ret25#1, main_#t~ret26#1, main_#t~post27#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~mode5~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1;" "assume !(0 == ~r1~0);init_~tmp~0#1 := 0;" "init_#res#1 := init_~tmp~0#1;" "main_#t~ret25#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret25#1;havoc main_#t~ret25#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;main_~i2~0#1 := 0;" [2025-02-06 19:58:29,510 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i2~0#1 < 10;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0;" "assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1;" "havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0;" "assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1;" "havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0;" "assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1;" "havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0;" "assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1;" "havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0;" "assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1;" "havoc node5_~m5~0#1;assume { :end_inline_node5 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1;" "assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 <= 1);check_~tmp~1#1 := 0;" "check_#res#1 := check_~tmp~1#1;" "main_#t~ret26#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret26#1;havoc main_#t~ret26#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1;" "assume !(0 == assert_~arg#1 % 256);" "havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post27#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post27#1;havoc main_#t~post27#1;" [2025-02-06 19:58:29,511 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:58:29,511 INFO L85 PathProgramCache]: Analyzing trace with hash -917705908, now seen corresponding path program 1 times [2025-02-06 19:58:29,511 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:58:29,511 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1474770640] [2025-02-06 19:58:29,511 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:58:29,511 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:58:29,520 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 7 statements into 1 equivalence classes. [2025-02-06 19:58:29,527 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 7 of 7 statements. [2025-02-06 19:58:29,529 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:58:29,529 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:58:29,590 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:58:29,591 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:58:29,591 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1474770640] [2025-02-06 19:58:29,591 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1474770640] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:58:29,591 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:58:29,591 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-06 19:58:29,591 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1502545800] [2025-02-06 19:58:29,591 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:58:29,591 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:58:29,591 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:58:29,591 INFO L85 PathProgramCache]: Analyzing trace with hash -1138923276, now seen corresponding path program 2 times [2025-02-06 19:58:29,591 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:58:29,592 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1895741705] [2025-02-06 19:58:29,592 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:58:29,592 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:58:29,599 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 16 statements into 1 equivalence classes. [2025-02-06 19:58:29,619 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 16 of 16 statements. [2025-02-06 19:58:29,619 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:58:29,619 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:58:29,771 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:58:29,771 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:58:29,771 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1895741705] [2025-02-06 19:58:29,771 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1895741705] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:58:29,771 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:58:29,771 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-06 19:58:29,771 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [739665399] [2025-02-06 19:58:29,771 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:58:29,771 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:58:29,771 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:58:29,772 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-06 19:58:29,772 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-02-06 19:58:29,772 INFO L87 Difference]: Start difference. First operand 77 states and 133 transitions. cyclomatic complexity: 57 Second operand has 5 states, 5 states have (on average 1.4) internal successors, (7), 5 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:58:29,831 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:58:29,831 INFO L93 Difference]: Finished difference Result 80 states and 135 transitions. [2025-02-06 19:58:29,831 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 80 states and 135 transitions. [2025-02-06 19:58:29,836 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 40 [2025-02-06 19:58:29,837 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 80 states to 77 states and 102 transitions. [2025-02-06 19:58:29,837 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 77 [2025-02-06 19:58:29,837 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 77 [2025-02-06 19:58:29,837 INFO L73 IsDeterministic]: Start isDeterministic. Operand 77 states and 102 transitions. [2025-02-06 19:58:29,837 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:58:29,837 INFO L218 hiAutomatonCegarLoop]: Abstraction has 77 states and 102 transitions. [2025-02-06 19:58:29,837 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states and 102 transitions. [2025-02-06 19:58:29,840 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 77. [2025-02-06 19:58:29,840 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 77 states, 77 states have (on average 1.3246753246753247) internal successors, (102), 76 states have internal predecessors, (102), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:58:29,841 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 102 transitions. [2025-02-06 19:58:29,841 INFO L240 hiAutomatonCegarLoop]: Abstraction has 77 states and 102 transitions. [2025-02-06 19:58:29,843 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-06 19:58:29,843 INFO L432 stractBuchiCegarLoop]: Abstraction has 77 states and 102 transitions. [2025-02-06 19:58:29,843 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-02-06 19:58:29,843 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 77 states and 102 transitions. [2025-02-06 19:58:29,844 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 40 [2025-02-06 19:58:29,844 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:58:29,844 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:58:29,844 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:58:29,845 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:58:29,845 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(33, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~ret25#1, main_#t~ret26#1, main_#t~post27#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~mode5~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1;" "assume 0 == ~r1~0;" "assume ~id1~0 >= 0;" "assume 0 == ~st1~0;" "assume ~send1~0 == ~id1~0;" "assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296);" "assume ~id2~0 >= 0;" "assume 0 == ~st2~0;" "assume ~send2~0 == ~id2~0;" "assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296);" "assume ~id3~0 >= 0;" "assume 0 == ~st3~0;" "assume ~send3~0 == ~id3~0;" "assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296);" "assume ~id4~0 >= 0;" "assume 0 == ~st4~0;" "assume ~send4~0 == ~id4~0;" "assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296);" "assume ~id5~0 >= 0;" "assume 0 == ~st5~0;" "assume ~send5~0 == ~id5~0;" "assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296);" "assume ~id1~0 != ~id2~0;" "assume ~id1~0 != ~id3~0;" "assume ~id1~0 != ~id4~0;" "assume ~id1~0 != ~id5~0;" "assume ~id2~0 != ~id3~0;" "assume ~id2~0 != ~id4~0;" "assume ~id2~0 != ~id5~0;" "assume ~id3~0 != ~id4~0;" "assume ~id3~0 != ~id5~0;" "assume ~id4~0 != ~id5~0;init_~tmp~0#1 := 1;" "init_#res#1 := init_~tmp~0#1;" "main_#t~ret25#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret25#1;havoc main_#t~ret25#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;main_~i2~0#1 := 0;" [2025-02-06 19:58:29,845 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i2~0#1 < 10;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0;" "assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1;" "havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0;" "assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1;" "havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0;" "assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1;" "havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0;" "assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1;" "havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0;" "assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1;" "havoc node5_~m5~0#1;assume { :end_inline_node5 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1;" "assume !(~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 <= 1);check_~tmp~1#1 := 0;" "check_#res#1 := check_~tmp~1#1;" "main_#t~ret26#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret26#1;havoc main_#t~ret26#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1;" "assume !(0 == assert_~arg#1 % 256);" "havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post27#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post27#1;havoc main_#t~post27#1;" [2025-02-06 19:58:29,845 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:58:29,845 INFO L85 PathProgramCache]: Analyzing trace with hash -49354098, now seen corresponding path program 1 times [2025-02-06 19:58:29,845 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:58:29,845 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1061008185] [2025-02-06 19:58:29,845 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:58:29,845 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:58:29,855 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 37 statements into 1 equivalence classes. [2025-02-06 19:58:29,876 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 37 of 37 statements. [2025-02-06 19:58:29,877 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:58:29,878 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:58:29,878 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:58:29,882 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 37 statements into 1 equivalence classes. [2025-02-06 19:58:29,894 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 37 of 37 statements. [2025-02-06 19:58:29,894 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:58:29,895 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:58:29,917 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:58:29,918 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:58:29,918 INFO L85 PathProgramCache]: Analyzing trace with hash -1138923276, now seen corresponding path program 3 times [2025-02-06 19:58:29,918 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:58:29,918 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1059806065] [2025-02-06 19:58:29,918 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:58:29,918 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:58:29,926 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 16 statements into 1 equivalence classes. [2025-02-06 19:58:29,943 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 16 of 16 statements. [2025-02-06 19:58:29,943 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-06 19:58:29,943 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:58:30,075 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:58:30,075 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:58:30,075 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1059806065] [2025-02-06 19:58:30,075 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1059806065] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:58:30,076 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:58:30,076 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-06 19:58:30,076 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1945217289] [2025-02-06 19:58:30,076 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:58:30,076 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:58:30,076 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:58:30,076 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-06 19:58:30,076 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-02-06 19:58:30,076 INFO L87 Difference]: Start difference. First operand 77 states and 102 transitions. cyclomatic complexity: 26 Second operand has 5 states, 5 states have (on average 3.2) internal successors, (16), 5 states have internal predecessors, (16), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:58:30,099 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:58:30,100 INFO L93 Difference]: Finished difference Result 80 states and 104 transitions. [2025-02-06 19:58:30,100 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 80 states and 104 transitions. [2025-02-06 19:58:30,100 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 40 [2025-02-06 19:58:30,101 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 80 states to 77 states and 99 transitions. [2025-02-06 19:58:30,101 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 77 [2025-02-06 19:58:30,101 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 77 [2025-02-06 19:58:30,101 INFO L73 IsDeterministic]: Start isDeterministic. Operand 77 states and 99 transitions. [2025-02-06 19:58:30,102 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:58:30,104 INFO L218 hiAutomatonCegarLoop]: Abstraction has 77 states and 99 transitions. [2025-02-06 19:58:30,105 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states and 99 transitions. [2025-02-06 19:58:30,106 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 77. [2025-02-06 19:58:30,106 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 77 states, 77 states have (on average 1.2857142857142858) internal successors, (99), 76 states have internal predecessors, (99), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:58:30,107 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 99 transitions. [2025-02-06 19:58:30,107 INFO L240 hiAutomatonCegarLoop]: Abstraction has 77 states and 99 transitions. [2025-02-06 19:58:30,109 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-06 19:58:30,109 INFO L432 stractBuchiCegarLoop]: Abstraction has 77 states and 99 transitions. [2025-02-06 19:58:30,110 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-02-06 19:58:30,110 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 77 states and 99 transitions. [2025-02-06 19:58:30,110 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 40 [2025-02-06 19:58:30,111 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:58:30,111 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:58:30,112 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:58:30,113 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:58:30,113 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(33, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~ret25#1, main_#t~ret26#1, main_#t~post27#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~mode5~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1;" "assume 0 == ~r1~0;" "assume ~id1~0 >= 0;" "assume 0 == ~st1~0;" "assume ~send1~0 == ~id1~0;" "assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296);" "assume ~id2~0 >= 0;" "assume 0 == ~st2~0;" "assume ~send2~0 == ~id2~0;" "assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296);" "assume ~id3~0 >= 0;" "assume 0 == ~st3~0;" "assume ~send3~0 == ~id3~0;" "assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296);" "assume ~id4~0 >= 0;" "assume 0 == ~st4~0;" "assume ~send4~0 == ~id4~0;" "assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296);" "assume ~id5~0 >= 0;" "assume 0 == ~st5~0;" "assume ~send5~0 == ~id5~0;" "assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296);" "assume ~id1~0 != ~id2~0;" "assume ~id1~0 != ~id3~0;" "assume ~id1~0 != ~id4~0;" "assume ~id1~0 != ~id5~0;" "assume ~id2~0 != ~id3~0;" "assume ~id2~0 != ~id4~0;" "assume ~id2~0 != ~id5~0;" "assume ~id3~0 != ~id4~0;" "assume ~id3~0 != ~id5~0;" "assume ~id4~0 != ~id5~0;init_~tmp~0#1 := 1;" "init_#res#1 := init_~tmp~0#1;" "main_#t~ret25#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret25#1;havoc main_#t~ret25#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;main_~i2~0#1 := 0;" [2025-02-06 19:58:30,113 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i2~0#1 < 10;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0;" "assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1;" "havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0;" "assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1;" "havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0;" "assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1;" "havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0;" "assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1;" "havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0;" "assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1;" "havoc node5_~m5~0#1;assume { :end_inline_node5 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1;" "assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 <= 1;" "assume ~r1~0 >= 5;" "assume ~r1~0 < 5;check_~tmp~1#1 := 1;" "check_#res#1 := check_~tmp~1#1;" "main_#t~ret26#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret26#1;havoc main_#t~ret26#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1;" "assume !(0 == assert_~arg#1 % 256);" "havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post27#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post27#1;havoc main_#t~post27#1;" [2025-02-06 19:58:30,113 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:58:30,113 INFO L85 PathProgramCache]: Analyzing trace with hash -49354098, now seen corresponding path program 2 times [2025-02-06 19:58:30,114 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:58:30,114 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1922283716] [2025-02-06 19:58:30,115 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:58:30,115 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:58:30,122 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 37 statements into 1 equivalence classes. [2025-02-06 19:58:30,139 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 37 of 37 statements. [2025-02-06 19:58:30,139 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:58:30,139 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:58:30,140 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:58:30,146 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 37 statements into 1 equivalence classes. [2025-02-06 19:58:30,160 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 37 of 37 statements. [2025-02-06 19:58:30,160 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:58:30,160 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:58:30,173 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:58:30,173 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:58:30,173 INFO L85 PathProgramCache]: Analyzing trace with hash 1831717615, now seen corresponding path program 1 times [2025-02-06 19:58:30,173 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:58:30,173 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [169400838] [2025-02-06 19:58:30,173 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:58:30,178 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:58:30,184 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 18 statements into 1 equivalence classes. [2025-02-06 19:58:30,187 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 18 of 18 statements. [2025-02-06 19:58:30,188 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:58:30,188 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:58:30,225 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:58:30,226 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:58:30,226 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [169400838] [2025-02-06 19:58:30,226 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [169400838] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:58:30,226 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:58:30,226 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:58:30,226 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [698883107] [2025-02-06 19:58:30,226 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:58:30,226 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:58:30,226 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:58:30,227 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:58:30,227 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:58:30,227 INFO L87 Difference]: Start difference. First operand 77 states and 99 transitions. cyclomatic complexity: 23 Second operand has 3 states, 3 states have (on average 6.0) internal successors, (18), 3 states have internal predecessors, (18), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:58:30,247 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:58:30,247 INFO L93 Difference]: Finished difference Result 111 states and 150 transitions. [2025-02-06 19:58:30,247 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 111 states and 150 transitions. [2025-02-06 19:58:30,248 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 74 [2025-02-06 19:58:30,249 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 111 states to 111 states and 150 transitions. [2025-02-06 19:58:30,249 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 111 [2025-02-06 19:58:30,249 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 111 [2025-02-06 19:58:30,249 INFO L73 IsDeterministic]: Start isDeterministic. Operand 111 states and 150 transitions. [2025-02-06 19:58:30,250 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:58:30,250 INFO L218 hiAutomatonCegarLoop]: Abstraction has 111 states and 150 transitions. [2025-02-06 19:58:30,250 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states and 150 transitions. [2025-02-06 19:58:30,252 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 111. [2025-02-06 19:58:30,252 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 111 states, 111 states have (on average 1.3513513513513513) internal successors, (150), 110 states have internal predecessors, (150), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:58:30,253 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 150 transitions. [2025-02-06 19:58:30,253 INFO L240 hiAutomatonCegarLoop]: Abstraction has 111 states and 150 transitions. [2025-02-06 19:58:30,255 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:58:30,256 INFO L432 stractBuchiCegarLoop]: Abstraction has 111 states and 150 transitions. [2025-02-06 19:58:30,256 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-02-06 19:58:30,256 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 111 states and 150 transitions. [2025-02-06 19:58:30,256 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 74 [2025-02-06 19:58:30,256 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:58:30,256 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:58:30,257 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:58:30,257 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:58:30,257 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(33, 2);call #Ultimate.allocInit(12, 3);~nomsg~0 := -1;~r1~0 := 0;~p1~0 := 0;~p1_old~0 := 0;~p1_new~0 := 0;~id1~0 := 0;~st1~0 := 0;~send1~0 := 0;~mode1~0 := 0;~p2~0 := 0;~p2_old~0 := 0;~p2_new~0 := 0;~id2~0 := 0;~st2~0 := 0;~send2~0 := 0;~mode2~0 := 0;~p3~0 := 0;~p3_old~0 := 0;~p3_new~0 := 0;~id3~0 := 0;~st3~0 := 0;~send3~0 := 0;~mode3~0 := 0;~p4~0 := 0;~p4_old~0 := 0;~p4_new~0 := 0;~id4~0 := 0;~st4~0 := 0;~send4~0 := 0;~mode4~0 := 0;~p5~0 := 0;~p5_old~0 := 0;~p5_new~0 := 0;~id5~0 := 0;~st5~0 := 0;~send5~0 := 0;~mode5~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_#t~nondet20#1, main_#t~nondet21#1, main_#t~nondet22#1, main_#t~nondet23#1, main_#t~nondet24#1, main_#t~ret25#1, main_#t~ret26#1, main_#t~post27#1, main_~c1~0#1, main_~i2~0#1;havoc main_~c1~0#1;havoc main_~i2~0#1;main_~c1~0#1 := 0;havoc main_#t~nondet4#1;~r1~0 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_#t~nondet5#1;~id1~0 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_#t~nondet6#1;~st1~0 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_#t~nondet7#1;~send1~0 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_#t~nondet8#1;assume 0 == main_#t~nondet8#1 || 1 == main_#t~nondet8#1;~mode1~0 := (if 0 == main_#t~nondet8#1 % 256 then 0 else 1);havoc main_#t~nondet8#1;havoc main_#t~nondet9#1;~id2~0 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_#t~nondet10#1;~st2~0 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_#t~nondet11#1;~send2~0 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_#t~nondet12#1;assume 0 == main_#t~nondet12#1 || 1 == main_#t~nondet12#1;~mode2~0 := (if 0 == main_#t~nondet12#1 % 256 then 0 else 1);havoc main_#t~nondet12#1;havoc main_#t~nondet13#1;~id3~0 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_#t~nondet14#1;~st3~0 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_#t~nondet15#1;~send3~0 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_#t~nondet16#1;assume 0 == main_#t~nondet16#1 || 1 == main_#t~nondet16#1;~mode3~0 := (if 0 == main_#t~nondet16#1 % 256 then 0 else 1);havoc main_#t~nondet16#1;havoc main_#t~nondet17#1;~id4~0 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_#t~nondet18#1;~st4~0 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_#t~nondet19#1;~send4~0 := main_#t~nondet19#1;havoc main_#t~nondet19#1;havoc main_#t~nondet20#1;assume 0 == main_#t~nondet20#1 || 1 == main_#t~nondet20#1;~mode4~0 := (if 0 == main_#t~nondet20#1 % 256 then 0 else 1);havoc main_#t~nondet20#1;havoc main_#t~nondet21#1;~id5~0 := main_#t~nondet21#1;havoc main_#t~nondet21#1;havoc main_#t~nondet22#1;~st5~0 := main_#t~nondet22#1;havoc main_#t~nondet22#1;havoc main_#t~nondet23#1;~send5~0 := main_#t~nondet23#1;havoc main_#t~nondet23#1;havoc main_#t~nondet24#1;assume 0 == main_#t~nondet24#1 || 1 == main_#t~nondet24#1;~mode5~0 := (if 0 == main_#t~nondet24#1 % 256 then 0 else 1);havoc main_#t~nondet24#1;assume { :begin_inline_init } true;havoc init_#res#1;havoc init_~tmp~0#1;havoc init_~tmp~0#1;" "assume 0 == ~r1~0;" "assume ~id1~0 >= 0;" "assume 0 == ~st1~0;" "assume ~send1~0 == ~id1~0;" "assume 0 == (if ~mode1~0 % 256 % 4294967296 <= 2147483647 then ~mode1~0 % 256 % 4294967296 else ~mode1~0 % 256 % 4294967296 - 4294967296);" "assume ~id2~0 >= 0;" "assume 0 == ~st2~0;" "assume ~send2~0 == ~id2~0;" "assume 0 == (if ~mode2~0 % 256 % 4294967296 <= 2147483647 then ~mode2~0 % 256 % 4294967296 else ~mode2~0 % 256 % 4294967296 - 4294967296);" "assume ~id3~0 >= 0;" "assume 0 == ~st3~0;" "assume ~send3~0 == ~id3~0;" "assume 0 == (if ~mode3~0 % 256 % 4294967296 <= 2147483647 then ~mode3~0 % 256 % 4294967296 else ~mode3~0 % 256 % 4294967296 - 4294967296);" "assume ~id4~0 >= 0;" "assume 0 == ~st4~0;" "assume ~send4~0 == ~id4~0;" "assume 0 == (if ~mode4~0 % 256 % 4294967296 <= 2147483647 then ~mode4~0 % 256 % 4294967296 else ~mode4~0 % 256 % 4294967296 - 4294967296);" "assume ~id5~0 >= 0;" "assume 0 == ~st5~0;" "assume ~send5~0 == ~id5~0;" "assume 0 == (if ~mode5~0 % 256 % 4294967296 <= 2147483647 then ~mode5~0 % 256 % 4294967296 else ~mode5~0 % 256 % 4294967296 - 4294967296);" "assume ~id1~0 != ~id2~0;" "assume ~id1~0 != ~id3~0;" "assume ~id1~0 != ~id4~0;" "assume ~id1~0 != ~id5~0;" "assume ~id2~0 != ~id3~0;" "assume ~id2~0 != ~id4~0;" "assume ~id2~0 != ~id5~0;" "assume ~id3~0 != ~id4~0;" "assume ~id3~0 != ~id5~0;" "assume ~id4~0 != ~id5~0;init_~tmp~0#1 := 1;" "init_#res#1 := init_~tmp~0#1;" "main_#t~ret25#1 := init_#res#1;havoc init_~tmp~0#1;assume { :end_inline_init } true;main_~i2~0#1 := main_#t~ret25#1;havoc main_#t~ret25#1;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := main_~i2~0#1;havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1;" "assume !(0 == assume_abort_if_not_~cond#1);" "havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;~p1_old~0 := ~nomsg~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~nomsg~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~nomsg~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~nomsg~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~nomsg~0;~p5_new~0 := ~nomsg~0;main_~i2~0#1 := 0;" [2025-02-06 19:58:30,257 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i2~0#1 < 10;assume { :begin_inline_node1 } true;havoc node1_~m1~0#1;havoc node1_~m1~0#1;node1_~m1~0#1 := ~nomsg~0;" "assume !(0 != ~mode1~0 % 256);~p1_new~0 := (if (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 <= 127 then (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 else (if ~send1~0 != ~nomsg~0 && ~p1_new~0 == ~nomsg~0 then ~send1~0 else ~p1_new~0) % 256 - 256);~mode1~0 := 1;" "havoc node1_~m1~0#1;assume { :end_inline_node1 } true;assume { :begin_inline_node2 } true;havoc node2_~m2~0#1;havoc node2_~m2~0#1;node2_~m2~0#1 := ~nomsg~0;" "assume !(0 != ~mode2~0 % 256);~p2_new~0 := (if (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 <= 127 then (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 else (if ~send2~0 != ~nomsg~0 && ~p2_new~0 == ~nomsg~0 then ~send2~0 else ~p2_new~0) % 256 - 256);~mode2~0 := 1;" "havoc node2_~m2~0#1;assume { :end_inline_node2 } true;assume { :begin_inline_node3 } true;havoc node3_~m3~0#1;havoc node3_~m3~0#1;node3_~m3~0#1 := ~nomsg~0;" "assume !(0 != ~mode3~0 % 256);~p3_new~0 := (if (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 <= 127 then (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 else (if ~send3~0 != ~nomsg~0 && ~p3_new~0 == ~nomsg~0 then ~send3~0 else ~p3_new~0) % 256 - 256);~mode3~0 := 1;" "havoc node3_~m3~0#1;assume { :end_inline_node3 } true;assume { :begin_inline_node4 } true;havoc node4_~m4~0#1;havoc node4_~m4~0#1;node4_~m4~0#1 := ~nomsg~0;" "assume !(0 != ~mode4~0 % 256);~p4_new~0 := (if (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 <= 127 then (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 else (if ~send4~0 != ~nomsg~0 && ~p4_new~0 == ~nomsg~0 then ~send4~0 else ~p4_new~0) % 256 - 256);~mode4~0 := 1;" "havoc node4_~m4~0#1;assume { :end_inline_node4 } true;assume { :begin_inline_node5 } true;havoc node5_~m5~0#1;havoc node5_~m5~0#1;node5_~m5~0#1 := ~nomsg~0;" "assume !(0 != ~mode5~0 % 256);~p5_new~0 := (if (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 <= 127 then (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 else (if ~send5~0 != ~nomsg~0 && ~p5_new~0 == ~nomsg~0 then ~send5~0 else ~p5_new~0) % 256 - 256);~mode5~0 := 1;" "havoc node5_~m5~0#1;assume { :end_inline_node5 } true;~p1_old~0 := ~p1_new~0;~p1_new~0 := ~nomsg~0;~p2_old~0 := ~p2_new~0;~p2_new~0 := ~nomsg~0;~p3_old~0 := ~p3_new~0;~p3_new~0 := ~nomsg~0;~p4_old~0 := ~p4_new~0;~p4_new~0 := ~nomsg~0;~p5_old~0 := ~p5_new~0;~p5_new~0 := ~nomsg~0;assume { :begin_inline_check } true;havoc check_#res#1;havoc check_~tmp~1#1;havoc check_~tmp~1#1;" "assume ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0 <= 1;" "assume !(~r1~0 >= 5);" "assume 0 == ~st1~0 + ~st2~0 + ~st3~0 + ~st4~0 + ~st5~0;" "assume ~r1~0 < 5;check_~tmp~1#1 := 1;" "check_#res#1 := check_~tmp~1#1;" "main_#t~ret26#1 := check_#res#1;havoc check_~tmp~1#1;assume { :end_inline_check } true;main_~c1~0#1 := main_#t~ret26#1;havoc main_#t~ret26#1;assume { :begin_inline_assert } true;assert_#in~arg#1 := (if 0 == main_~c1~0#1 then 0 else 1);havoc assert_~arg#1;assert_~arg#1 := assert_#in~arg#1;" "assume !(0 == assert_~arg#1 % 256);" "havoc assert_~arg#1;havoc assert_#in~arg#1;assume { :end_inline_assert } true;main_#t~post27#1 := main_~i2~0#1;main_~i2~0#1 := 1 + main_#t~post27#1;havoc main_#t~post27#1;" [2025-02-06 19:58:30,257 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:58:30,258 INFO L85 PathProgramCache]: Analyzing trace with hash -49354098, now seen corresponding path program 3 times [2025-02-06 19:58:30,258 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:58:30,258 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [45656703] [2025-02-06 19:58:30,258 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:58:30,258 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:58:30,267 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 37 statements into 1 equivalence classes. [2025-02-06 19:58:30,281 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 37 of 37 statements. [2025-02-06 19:58:30,281 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-06 19:58:30,281 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:58:30,281 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:58:30,287 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 37 statements into 1 equivalence classes. [2025-02-06 19:58:30,296 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 37 of 37 statements. [2025-02-06 19:58:30,296 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:58:30,296 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:58:30,302 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:58:30,303 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:58:30,303 INFO L85 PathProgramCache]: Analyzing trace with hash 1981228365, now seen corresponding path program 1 times [2025-02-06 19:58:30,303 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:58:30,303 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2030538198] [2025-02-06 19:58:30,303 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:58:30,303 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:58:30,309 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 19 statements into 1 equivalence classes. [2025-02-06 19:58:30,333 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 19 of 19 statements. [2025-02-06 19:58:30,333 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:58:30,333 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:58:30,333 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:58:30,338 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 19 statements into 1 equivalence classes. [2025-02-06 19:58:30,354 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 19 of 19 statements. [2025-02-06 19:58:30,354 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:58:30,354 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:58:30,360 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:58:30,361 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:58:30,361 INFO L85 PathProgramCache]: Analyzing trace with hash -1805709920, now seen corresponding path program 1 times [2025-02-06 19:58:30,361 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:58:30,361 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [237976415] [2025-02-06 19:58:30,361 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:58:30,361 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:58:30,374 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 56 statements into 1 equivalence classes. [2025-02-06 19:58:30,397 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 56 of 56 statements. [2025-02-06 19:58:30,397 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:58:30,397 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:58:30,397 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:58:30,400 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 56 statements into 1 equivalence classes. [2025-02-06 19:58:30,418 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 56 of 56 statements. [2025-02-06 19:58:30,418 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:58:30,418 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:58:30,426 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:58:33,220 INFO L204 LassoAnalysis]: Preferences: [2025-02-06 19:58:33,221 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-02-06 19:58:33,221 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-02-06 19:58:33,221 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-02-06 19:58:33,221 INFO L128 ssoRankerPreferences]: Use exernal solver: true [2025-02-06 19:58:33,221 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:58:33,221 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-02-06 19:58:33,221 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-02-06 19:58:33,221 INFO L132 ssoRankerPreferences]: Filename of dumped script: pals_lcr.5.ufo.BOUNDED-10.pals.c_Iteration5_Loop [2025-02-06 19:58:33,221 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-02-06 19:58:33,221 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-02-06 19:58:33,257 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:58:33,262 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:58:33,266 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:58:33,270 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:58:33,272 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:58:33,274 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:58:35,025 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:58:35,028 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:58:35,029 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:58:35,030 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:58:35,031 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:58:35,034 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:58:35,039 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:58:35,045 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:58:35,048 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:58:35,050 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:58:35,051 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:58:35,060 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:58:35,061 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:58:35,063 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:58:36,190 WARN L137 XnfTransformerHelper]: expecting exponential blowup for input size 33