./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/systemc/pipeline.cil-1.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version c00e63dc Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/systemc/pipeline.cil-1.c -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 79bbe68806c3ba3852cd8c209d4ce80dca551636a131cc65daaf97524d927c63 --- Real Ultimate output --- This is Ultimate 0.3.0-?-c00e63d-m [2025-02-06 19:50:30,187 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-02-06 19:50:30,240 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2025-02-06 19:50:30,244 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-02-06 19:50:30,244 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-02-06 19:50:30,244 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-02-06 19:50:30,260 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-02-06 19:50:30,260 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-02-06 19:50:30,261 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-02-06 19:50:30,261 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-02-06 19:50:30,261 INFO L153 SettingsManager]: * Use memory slicer=true [2025-02-06 19:50:30,261 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-02-06 19:50:30,261 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-02-06 19:50:30,261 INFO L153 SettingsManager]: * Use SBE=true [2025-02-06 19:50:30,261 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-02-06 19:50:30,262 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-02-06 19:50:30,262 INFO L153 SettingsManager]: * Use old map elimination=false [2025-02-06 19:50:30,262 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-02-06 19:50:30,262 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-02-06 19:50:30,262 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-02-06 19:50:30,262 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-02-06 19:50:30,262 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-02-06 19:50:30,262 INFO L153 SettingsManager]: * sizeof long=4 [2025-02-06 19:50:30,262 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-02-06 19:50:30,262 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-02-06 19:50:30,262 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-02-06 19:50:30,263 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-02-06 19:50:30,263 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-02-06 19:50:30,263 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-02-06 19:50:30,263 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-02-06 19:50:30,263 INFO L153 SettingsManager]: * sizeof long double=12 [2025-02-06 19:50:30,263 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-02-06 19:50:30,263 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-02-06 19:50:30,263 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-02-06 19:50:30,263 INFO L153 SettingsManager]: * Use constant arrays=true [2025-02-06 19:50:30,263 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-02-06 19:50:30,264 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-02-06 19:50:30,264 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-02-06 19:50:30,264 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-02-06 19:50:30,264 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-02-06 19:50:30,264 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 79bbe68806c3ba3852cd8c209d4ce80dca551636a131cc65daaf97524d927c63 [2025-02-06 19:50:30,597 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-02-06 19:50:30,605 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-02-06 19:50:30,606 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-02-06 19:50:30,608 INFO L270 PluginConnector]: Initializing CDTParser... [2025-02-06 19:50:30,608 INFO L274 PluginConnector]: CDTParser initialized [2025-02-06 19:50:30,609 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/systemc/pipeline.cil-1.c [2025-02-06 19:50:31,852 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/2135e7dd8/5b16a46f93ca434c93cfc3a4646892e7/FLAGf46411ded [2025-02-06 19:50:32,114 INFO L384 CDTParser]: Found 1 translation units. [2025-02-06 19:50:32,122 INFO L180 CDTParser]: Scanning /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/systemc/pipeline.cil-1.c [2025-02-06 19:50:32,133 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/2135e7dd8/5b16a46f93ca434c93cfc3a4646892e7/FLAGf46411ded [2025-02-06 19:50:32,147 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/2135e7dd8/5b16a46f93ca434c93cfc3a4646892e7 [2025-02-06 19:50:32,149 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-02-06 19:50:32,150 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-02-06 19:50:32,152 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-02-06 19:50:32,152 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-02-06 19:50:32,156 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-02-06 19:50:32,157 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.02 07:50:32" (1/1) ... [2025-02-06 19:50:32,159 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2dac6d8b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:50:32, skipping insertion in model container [2025-02-06 19:50:32,159 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.02 07:50:32" (1/1) ... [2025-02-06 19:50:32,181 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-02-06 19:50:32,342 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-06 19:50:32,358 INFO L200 MainTranslator]: Completed pre-run [2025-02-06 19:50:32,393 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-06 19:50:32,404 INFO L204 MainTranslator]: Completed translation [2025-02-06 19:50:32,404 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:50:32 WrapperNode [2025-02-06 19:50:32,405 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-02-06 19:50:32,405 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-02-06 19:50:32,405 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-02-06 19:50:32,405 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-02-06 19:50:32,410 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:50:32" (1/1) ... [2025-02-06 19:50:32,417 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:50:32" (1/1) ... [2025-02-06 19:50:32,452 INFO L138 Inliner]: procedures = 20, calls = 18, calls flagged for inlining = 13, calls inlined = 25, statements flattened = 1031 [2025-02-06 19:50:32,452 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-02-06 19:50:32,452 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-02-06 19:50:32,452 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-02-06 19:50:32,452 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-02-06 19:50:32,467 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:50:32" (1/1) ... [2025-02-06 19:50:32,468 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:50:32" (1/1) ... [2025-02-06 19:50:32,470 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:50:32" (1/1) ... [2025-02-06 19:50:32,489 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-02-06 19:50:32,490 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:50:32" (1/1) ... [2025-02-06 19:50:32,490 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:50:32" (1/1) ... [2025-02-06 19:50:32,499 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:50:32" (1/1) ... [2025-02-06 19:50:32,501 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:50:32" (1/1) ... [2025-02-06 19:50:32,501 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:50:32" (1/1) ... [2025-02-06 19:50:32,502 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:50:32" (1/1) ... [2025-02-06 19:50:32,504 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-02-06 19:50:32,505 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-02-06 19:50:32,505 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-02-06 19:50:32,505 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-02-06 19:50:32,505 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:50:32" (1/1) ... [2025-02-06 19:50:32,509 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:50:32,521 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:50:32,532 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:50:32,537 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-02-06 19:50:32,551 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-02-06 19:50:32,552 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-02-06 19:50:32,552 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-02-06 19:50:32,552 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-02-06 19:50:32,616 INFO L257 CfgBuilder]: Building ICFG [2025-02-06 19:50:32,617 INFO L287 CfgBuilder]: Building CFG for each procedure with an implementation [2025-02-06 19:50:33,413 INFO L? ?]: Removed 76 outVars from TransFormulas that were not future-live. [2025-02-06 19:50:33,414 INFO L308 CfgBuilder]: Performing block encoding [2025-02-06 19:50:33,428 INFO L332 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-02-06 19:50:33,428 INFO L337 CfgBuilder]: Removed 0 assume(true) statements. [2025-02-06 19:50:33,428 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 06.02 07:50:33 BoogieIcfgContainer [2025-02-06 19:50:33,429 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-02-06 19:50:33,429 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-02-06 19:50:33,429 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-02-06 19:50:33,433 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-02-06 19:50:33,433 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-06 19:50:33,433 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 06.02 07:50:32" (1/3) ... [2025-02-06 19:50:33,434 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@8e23699 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.02 07:50:33, skipping insertion in model container [2025-02-06 19:50:33,434 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-06 19:50:33,434 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:50:32" (2/3) ... [2025-02-06 19:50:33,435 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@8e23699 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.02 07:50:33, skipping insertion in model container [2025-02-06 19:50:33,435 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-06 19:50:33,435 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 06.02 07:50:33" (3/3) ... [2025-02-06 19:50:33,436 INFO L363 chiAutomizerObserver]: Analyzing ICFG pipeline.cil-1.c [2025-02-06 19:50:33,469 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-02-06 19:50:33,470 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-02-06 19:50:33,470 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-02-06 19:50:33,470 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-02-06 19:50:33,470 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-02-06 19:50:33,470 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-02-06 19:50:33,470 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-02-06 19:50:33,470 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-02-06 19:50:33,474 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 423 states, 422 states have (on average 1.7962085308056872) internal successors, (758), 422 states have internal predecessors, (758), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:33,497 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 361 [2025-02-06 19:50:33,497 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:50:33,497 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:50:33,505 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:33,506 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:33,506 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-02-06 19:50:33,507 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 423 states, 422 states have (on average 1.7962085308056872) internal successors, (758), 422 states have internal predecessors, (758), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:33,514 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 361 [2025-02-06 19:50:33,514 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:50:33,514 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:50:33,515 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:33,515 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:33,521 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" [2025-02-06 19:50:33,521 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume !true;" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume 0 == ~main_in1_ev~0;~main_in1_ev~0 := 1;" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume 0 == ~main_dbl_ev~0;~main_dbl_ev~0 := 1;" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume 0 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 1;" "assume 0 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 1;" "assume 1 == ~main_clk_pos_edge~0;~N_generate_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S1_addsub_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S2_presdbl_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S3_zero_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~D_print_st~0 := 0;" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume 1 == ~main_dbl_ev~0;~main_dbl_ev~0 := 2;" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume 1 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 2;" "assume 0 == ~N_generate_st~0;" [2025-02-06 19:50:33,524 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:33,525 INFO L85 PathProgramCache]: Analyzing trace with hash 1362474382, now seen corresponding path program 1 times [2025-02-06 19:50:33,530 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:33,530 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1668895579] [2025-02-06 19:50:33,531 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:33,531 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:33,577 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 40 statements into 1 equivalence classes. [2025-02-06 19:50:33,595 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 40 of 40 statements. [2025-02-06 19:50:33,596 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:33,596 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:50:33,596 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:50:33,601 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 40 statements into 1 equivalence classes. [2025-02-06 19:50:33,612 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 40 of 40 statements. [2025-02-06 19:50:33,612 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:33,612 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:50:33,639 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:50:33,641 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:33,641 INFO L85 PathProgramCache]: Analyzing trace with hash 520539416, now seen corresponding path program 1 times [2025-02-06 19:50:33,641 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:33,641 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1686309691] [2025-02-06 19:50:33,641 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:33,641 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:33,647 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 39 statements into 1 equivalence classes. [2025-02-06 19:50:33,648 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 39 of 39 statements. [2025-02-06 19:50:33,648 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:33,648 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:33,676 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:33,677 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:33,677 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1686309691] [2025-02-06 19:50:33,677 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1686309691] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:33,677 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:33,677 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-02-06 19:50:33,678 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1343366794] [2025-02-06 19:50:33,678 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:33,680 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:50:33,681 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:50:33,700 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2025-02-06 19:50:33,700 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2025-02-06 19:50:33,702 INFO L87 Difference]: Start difference. First operand has 423 states, 422 states have (on average 1.7962085308056872) internal successors, (758), 422 states have internal predecessors, (758), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 2 states, 2 states have (on average 19.5) internal successors, (39), 2 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:33,721 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:50:33,721 INFO L93 Difference]: Finished difference Result 417 states and 745 transitions. [2025-02-06 19:50:33,722 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 417 states and 745 transitions. [2025-02-06 19:50:33,726 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 358 [2025-02-06 19:50:33,736 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 417 states to 416 states and 744 transitions. [2025-02-06 19:50:33,737 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 416 [2025-02-06 19:50:33,737 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 416 [2025-02-06 19:50:33,738 INFO L73 IsDeterministic]: Start isDeterministic. Operand 416 states and 744 transitions. [2025-02-06 19:50:33,739 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:50:33,740 INFO L218 hiAutomatonCegarLoop]: Abstraction has 416 states and 744 transitions. [2025-02-06 19:50:33,750 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 416 states and 744 transitions. [2025-02-06 19:50:33,766 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 416 to 416. [2025-02-06 19:50:33,768 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 416 states, 416 states have (on average 1.7884615384615385) internal successors, (744), 415 states have internal predecessors, (744), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:33,769 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 416 states to 416 states and 744 transitions. [2025-02-06 19:50:33,770 INFO L240 hiAutomatonCegarLoop]: Abstraction has 416 states and 744 transitions. [2025-02-06 19:50:33,770 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-02-06 19:50:33,772 INFO L432 stractBuchiCegarLoop]: Abstraction has 416 states and 744 transitions. [2025-02-06 19:50:33,773 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-02-06 19:50:33,773 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 416 states and 744 transitions. [2025-02-06 19:50:33,775 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 358 [2025-02-06 19:50:33,775 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:50:33,775 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:50:33,776 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:33,776 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:33,777 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" [2025-02-06 19:50:33,777 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume 0 == ~main_in1_ev~0;~main_in1_ev~0 := 1;" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume 0 == ~main_dbl_ev~0;~main_dbl_ev~0 := 1;" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume 0 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 1;" "assume 0 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 1;" "assume 1 == ~main_clk_pos_edge~0;~N_generate_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S1_addsub_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S2_presdbl_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S3_zero_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~D_print_st~0 := 0;" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume 1 == ~main_dbl_ev~0;~main_dbl_ev~0 := 2;" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume 1 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 2;" "assume 0 == ~N_generate_st~0;" [2025-02-06 19:50:33,777 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:33,777 INFO L85 PathProgramCache]: Analyzing trace with hash 1362474382, now seen corresponding path program 2 times [2025-02-06 19:50:33,777 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:33,778 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [941841804] [2025-02-06 19:50:33,778 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:50:33,778 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:33,785 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 40 statements into 1 equivalence classes. [2025-02-06 19:50:33,795 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 40 of 40 statements. [2025-02-06 19:50:33,796 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:50:33,796 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:50:33,796 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:50:33,799 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 40 statements into 1 equivalence classes. [2025-02-06 19:50:33,829 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 40 of 40 statements. [2025-02-06 19:50:33,829 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:33,829 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:50:33,835 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:50:33,836 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:33,836 INFO L85 PathProgramCache]: Analyzing trace with hash 16513805, now seen corresponding path program 1 times [2025-02-06 19:50:33,836 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:33,836 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [922925413] [2025-02-06 19:50:33,836 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:33,836 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:33,843 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 44 statements into 1 equivalence classes. [2025-02-06 19:50:33,848 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 44 of 44 statements. [2025-02-06 19:50:33,848 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:33,848 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:33,886 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:33,886 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:33,886 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [922925413] [2025-02-06 19:50:33,886 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [922925413] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:33,886 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:33,886 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:50:33,887 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [202606236] [2025-02-06 19:50:33,887 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:33,887 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:50:33,887 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:50:33,887 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:50:33,887 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:50:33,888 INFO L87 Difference]: Start difference. First operand 416 states and 744 transitions. cyclomatic complexity: 330 Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:33,952 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:50:33,952 INFO L93 Difference]: Finished difference Result 506 states and 918 transitions. [2025-02-06 19:50:33,952 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 506 states and 918 transitions. [2025-02-06 19:50:33,956 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 433 [2025-02-06 19:50:33,958 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 506 states to 506 states and 918 transitions. [2025-02-06 19:50:33,958 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 506 [2025-02-06 19:50:33,959 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 506 [2025-02-06 19:50:33,959 INFO L73 IsDeterministic]: Start isDeterministic. Operand 506 states and 918 transitions. [2025-02-06 19:50:33,960 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:50:33,961 INFO L218 hiAutomatonCegarLoop]: Abstraction has 506 states and 918 transitions. [2025-02-06 19:50:33,961 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 506 states and 918 transitions. [2025-02-06 19:50:33,969 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 506 to 506. [2025-02-06 19:50:33,969 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 506 states, 506 states have (on average 1.8142292490118577) internal successors, (918), 505 states have internal predecessors, (918), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:33,971 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 506 states to 506 states and 918 transitions. [2025-02-06 19:50:33,971 INFO L240 hiAutomatonCegarLoop]: Abstraction has 506 states and 918 transitions. [2025-02-06 19:50:33,971 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:50:33,972 INFO L432 stractBuchiCegarLoop]: Abstraction has 506 states and 918 transitions. [2025-02-06 19:50:33,972 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-02-06 19:50:33,972 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 506 states and 918 transitions. [2025-02-06 19:50:33,974 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 433 [2025-02-06 19:50:33,974 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:50:33,974 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:50:33,975 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:33,975 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:33,975 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume 0 == ~main_in1_ev~0;~main_in1_ev~0 := 1;" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume 1 == ~main_in1_ev~0;~main_in1_ev~0 := 2;" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" [2025-02-06 19:50:33,975 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume 0 == ~main_in1_ev~0;~main_in1_ev~0 := 1;" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume 0 == ~main_dbl_ev~0;~main_dbl_ev~0 := 1;" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume 0 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 1;" "assume 0 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 1;" "assume 1 == ~main_clk_pos_edge~0;~N_generate_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S1_addsub_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S2_presdbl_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S3_zero_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~D_print_st~0 := 0;" "assume 1 == ~main_in1_ev~0;~main_in1_ev~0 := 2;" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume 1 == ~main_dbl_ev~0;~main_dbl_ev~0 := 2;" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume 1 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 2;" "assume 0 == ~N_generate_st~0;" [2025-02-06 19:50:33,976 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:33,976 INFO L85 PathProgramCache]: Analyzing trace with hash -658770066, now seen corresponding path program 1 times [2025-02-06 19:50:33,976 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:33,976 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1103772558] [2025-02-06 19:50:33,976 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:33,976 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:33,981 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 40 statements into 1 equivalence classes. [2025-02-06 19:50:33,987 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 40 of 40 statements. [2025-02-06 19:50:33,987 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:33,987 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:34,039 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:34,039 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:34,039 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1103772558] [2025-02-06 19:50:34,039 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1103772558] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:34,039 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:34,039 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:50:34,039 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2016269023] [2025-02-06 19:50:34,039 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:34,039 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:50:34,040 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:34,040 INFO L85 PathProgramCache]: Analyzing trace with hash 1813465164, now seen corresponding path program 1 times [2025-02-06 19:50:34,040 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:34,040 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [394705340] [2025-02-06 19:50:34,040 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:34,040 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:34,045 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 44 statements into 1 equivalence classes. [2025-02-06 19:50:34,048 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 44 of 44 statements. [2025-02-06 19:50:34,049 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:34,049 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:34,071 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:34,072 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:34,072 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [394705340] [2025-02-06 19:50:34,072 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [394705340] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:34,072 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:34,072 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:50:34,072 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [635775045] [2025-02-06 19:50:34,072 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:34,072 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:50:34,073 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:50:34,073 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:50:34,073 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:50:34,073 INFO L87 Difference]: Start difference. First operand 506 states and 918 transitions. cyclomatic complexity: 414 Second operand has 3 states, 3 states have (on average 13.333333333333334) internal successors, (40), 3 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:34,137 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:50:34,137 INFO L93 Difference]: Finished difference Result 918 states and 1644 transitions. [2025-02-06 19:50:34,137 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 918 states and 1644 transitions. [2025-02-06 19:50:34,142 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 791 [2025-02-06 19:50:34,146 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 918 states to 918 states and 1644 transitions. [2025-02-06 19:50:34,146 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 918 [2025-02-06 19:50:34,148 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 918 [2025-02-06 19:50:34,148 INFO L73 IsDeterministic]: Start isDeterministic. Operand 918 states and 1644 transitions. [2025-02-06 19:50:34,150 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:50:34,150 INFO L218 hiAutomatonCegarLoop]: Abstraction has 918 states and 1644 transitions. [2025-02-06 19:50:34,151 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 918 states and 1644 transitions. [2025-02-06 19:50:34,165 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 918 to 918. [2025-02-06 19:50:34,167 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 918 states, 918 states have (on average 1.7908496732026145) internal successors, (1644), 917 states have internal predecessors, (1644), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:34,169 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 918 states to 918 states and 1644 transitions. [2025-02-06 19:50:34,169 INFO L240 hiAutomatonCegarLoop]: Abstraction has 918 states and 1644 transitions. [2025-02-06 19:50:34,169 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:50:34,170 INFO L432 stractBuchiCegarLoop]: Abstraction has 918 states and 1644 transitions. [2025-02-06 19:50:34,170 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-02-06 19:50:34,170 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 918 states and 1644 transitions. [2025-02-06 19:50:34,174 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 791 [2025-02-06 19:50:34,174 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:50:34,174 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:50:34,175 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:34,175 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:34,175 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" [2025-02-06 19:50:34,176 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume 0 == ~main_dbl_ev~0;~main_dbl_ev~0 := 1;" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume 0 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 1;" "assume 0 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 1;" "assume 1 == ~main_clk_pos_edge~0;~N_generate_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S1_addsub_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S2_presdbl_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S3_zero_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~D_print_st~0 := 0;" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume 1 == ~main_dbl_ev~0;~main_dbl_ev~0 := 2;" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume 1 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 2;" "assume 0 == ~N_generate_st~0;" [2025-02-06 19:50:34,176 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:34,176 INFO L85 PathProgramCache]: Analyzing trace with hash 1362474382, now seen corresponding path program 3 times [2025-02-06 19:50:34,176 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:34,176 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1391724817] [2025-02-06 19:50:34,176 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:50:34,177 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:34,200 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 40 statements into 1 equivalence classes. [2025-02-06 19:50:34,205 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 40 of 40 statements. [2025-02-06 19:50:34,205 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-06 19:50:34,205 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:50:34,205 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:50:34,207 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 40 statements into 1 equivalence classes. [2025-02-06 19:50:34,212 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 40 of 40 statements. [2025-02-06 19:50:34,212 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:34,212 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:50:34,217 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:50:34,218 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:34,218 INFO L85 PathProgramCache]: Analyzing trace with hash 47533612, now seen corresponding path program 1 times [2025-02-06 19:50:34,218 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:34,218 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2132883928] [2025-02-06 19:50:34,218 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:34,218 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:34,222 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 44 statements into 1 equivalence classes. [2025-02-06 19:50:34,225 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 44 of 44 statements. [2025-02-06 19:50:34,225 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:34,225 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:34,244 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:34,244 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:34,244 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2132883928] [2025-02-06 19:50:34,244 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2132883928] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:34,245 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:34,245 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:50:34,245 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [418947047] [2025-02-06 19:50:34,245 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:34,245 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:50:34,245 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:50:34,245 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:50:34,246 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:50:34,246 INFO L87 Difference]: Start difference. First operand 918 states and 1644 transitions. cyclomatic complexity: 728 Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:34,387 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:50:34,387 INFO L93 Difference]: Finished difference Result 1140 states and 1974 transitions. [2025-02-06 19:50:34,387 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1140 states and 1974 transitions. [2025-02-06 19:50:34,393 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 976 [2025-02-06 19:50:34,398 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1140 states to 1140 states and 1974 transitions. [2025-02-06 19:50:34,398 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1140 [2025-02-06 19:50:34,399 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1140 [2025-02-06 19:50:34,399 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1140 states and 1974 transitions. [2025-02-06 19:50:34,400 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:50:34,400 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1140 states and 1974 transitions. [2025-02-06 19:50:34,401 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1140 states and 1974 transitions. [2025-02-06 19:50:34,412 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1140 to 1140. [2025-02-06 19:50:34,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1140 states, 1140 states have (on average 1.731578947368421) internal successors, (1974), 1139 states have internal predecessors, (1974), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:34,417 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1140 states to 1140 states and 1974 transitions. [2025-02-06 19:50:34,417 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1140 states and 1974 transitions. [2025-02-06 19:50:34,417 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:50:34,418 INFO L432 stractBuchiCegarLoop]: Abstraction has 1140 states and 1974 transitions. [2025-02-06 19:50:34,418 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-02-06 19:50:34,418 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1140 states and 1974 transitions. [2025-02-06 19:50:34,423 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 976 [2025-02-06 19:50:34,423 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:50:34,423 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:50:34,424 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:34,424 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:34,425 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume 0 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 1;" "assume !(0 == ~main_clk_neg_edge~0);" "assume 1 == ~main_clk_pos_edge~0;~N_generate_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S1_addsub_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S2_presdbl_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S3_zero_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~D_print_st~0 := 0;" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume 1 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 2;" "assume !(1 == ~main_clk_neg_edge~0);" [2025-02-06 19:50:34,425 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume 0 == ~main_dbl_ev~0;~main_dbl_ev~0 := 1;" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume 0 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 1;" "assume 0 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 1;" "assume 1 == ~main_clk_pos_edge~0;~N_generate_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S1_addsub_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S2_presdbl_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S3_zero_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~D_print_st~0 := 0;" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume 1 == ~main_dbl_ev~0;~main_dbl_ev~0 := 2;" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume 1 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 2;" "assume 1 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 2;" "assume 0 == ~N_generate_st~0;" [2025-02-06 19:50:34,425 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:34,425 INFO L85 PathProgramCache]: Analyzing trace with hash 968443117, now seen corresponding path program 1 times [2025-02-06 19:50:34,425 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:34,425 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1125250789] [2025-02-06 19:50:34,425 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:34,426 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:34,431 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 40 statements into 1 equivalence classes. [2025-02-06 19:50:34,435 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 40 of 40 statements. [2025-02-06 19:50:34,435 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:34,435 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:34,485 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:34,485 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:34,485 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1125250789] [2025-02-06 19:50:34,485 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1125250789] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:34,485 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:34,485 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-06 19:50:34,486 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [793087462] [2025-02-06 19:50:34,486 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:34,486 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:50:34,486 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:34,486 INFO L85 PathProgramCache]: Analyzing trace with hash 47532651, now seen corresponding path program 1 times [2025-02-06 19:50:34,486 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:34,486 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [701036042] [2025-02-06 19:50:34,487 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:34,487 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:34,491 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 44 statements into 1 equivalence classes. [2025-02-06 19:50:34,493 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 44 of 44 statements. [2025-02-06 19:50:34,493 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:34,493 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:50:34,493 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:50:34,494 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 44 statements into 1 equivalence classes. [2025-02-06 19:50:34,496 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 44 of 44 statements. [2025-02-06 19:50:34,496 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:34,496 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:50:34,499 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:50:35,008 INFO L204 LassoAnalysis]: Preferences: [2025-02-06 19:50:35,009 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-02-06 19:50:35,009 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-02-06 19:50:35,009 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-02-06 19:50:35,009 INFO L128 ssoRankerPreferences]: Use exernal solver: true [2025-02-06 19:50:35,009 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:50:35,009 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-02-06 19:50:35,009 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-02-06 19:50:35,010 INFO L132 ssoRankerPreferences]: Filename of dumped script: pipeline.cil-1.c_Iteration5_Loop [2025-02-06 19:50:35,010 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-02-06 19:50:35,010 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-02-06 19:50:35,025 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,047 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,049 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,054 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,056 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,059 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,060 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,064 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,066 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,070 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,072 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,075 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,077 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,080 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,082 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,086 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,088 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,091 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,095 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,097 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,099 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,103 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,107 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,111 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,113 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,117 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,121 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,123 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,126 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,128 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,130 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,132 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,136 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,412 INFO L259 LassoAnalysis]: Preprocessing complete. [2025-02-06 19:50:35,412 INFO L365 LassoAnalysis]: Checking for nontermination... [2025-02-06 19:50:35,413 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:50:35,413 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:50:35,416 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:50:35,418 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2025-02-06 19:50:35,418 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-02-06 19:50:35,418 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-02-06 19:50:35,432 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2025-02-06 19:50:35,432 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_eval_#t~nondet4#1=0} Honda state: {ULTIMATE.start_eval_#t~nondet4#1=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2025-02-06 19:50:35,439 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Ended with exit code 0 [2025-02-06 19:50:35,439 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:50:35,439 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:50:35,441 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:50:35,443 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2025-02-06 19:50:35,444 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-02-06 19:50:35,444 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-02-06 19:50:35,458 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2025-02-06 19:50:35,459 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_eval_~tmp___1~0#1=0} Honda state: {ULTIMATE.start_eval_~tmp___1~0#1=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2025-02-06 19:50:35,465 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Forceful destruction successful, exit code 0 [2025-02-06 19:50:35,465 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:50:35,466 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:50:35,467 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:50:35,469 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2025-02-06 19:50:35,470 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-02-06 19:50:35,470 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-02-06 19:50:35,487 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2025-02-06 19:50:35,487 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:50:35,487 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:50:35,491 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:50:35,492 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2025-02-06 19:50:35,493 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2025-02-06 19:50:35,493 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-02-06 19:50:35,505 INFO L405 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2025-02-06 19:50:35,511 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Ended with exit code 0 [2025-02-06 19:50:35,512 INFO L204 LassoAnalysis]: Preferences: [2025-02-06 19:50:35,512 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-02-06 19:50:35,512 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-02-06 19:50:35,512 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-02-06 19:50:35,512 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2025-02-06 19:50:35,512 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:50:35,512 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-02-06 19:50:35,512 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-02-06 19:50:35,512 INFO L132 ssoRankerPreferences]: Filename of dumped script: pipeline.cil-1.c_Iteration5_Loop [2025-02-06 19:50:35,512 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-02-06 19:50:35,512 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-02-06 19:50:35,514 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,518 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,520 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,524 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,527 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,529 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,531 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,535 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,537 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,540 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,542 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,546 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,550 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,552 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,556 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,558 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,563 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,567 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,571 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,574 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,576 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,581 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,586 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,591 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,593 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,598 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,602 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,604 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,605 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,609 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,611 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,613 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,616 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:50:35,890 INFO L259 LassoAnalysis]: Preprocessing complete. [2025-02-06 19:50:35,893 INFO L451 LassoAnalysis]: Using template 'affine'. [2025-02-06 19:50:35,893 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:50:35,894 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:50:35,899 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:50:35,901 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2025-02-06 19:50:35,901 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:50:35,912 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:50:35,913 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-02-06 19:50:35,913 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:50:35,913 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 19:50:35,914 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:50:35,920 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-02-06 19:50:35,920 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-02-06 19:50:35,921 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 19:50:35,927 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Forceful destruction successful, exit code 0 [2025-02-06 19:50:35,927 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:50:35,927 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:50:35,929 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:50:35,930 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2025-02-06 19:50:35,931 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:50:35,941 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:50:35,941 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-02-06 19:50:35,941 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:50:35,941 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 19:50:35,941 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:50:35,942 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-02-06 19:50:35,942 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-02-06 19:50:35,943 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 19:50:35,949 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Forceful destruction successful, exit code 0 [2025-02-06 19:50:35,949 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:50:35,949 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:50:35,951 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:50:35,953 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2025-02-06 19:50:35,954 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:50:35,964 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:50:35,964 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-02-06 19:50:35,964 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:50:35,964 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 19:50:35,964 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:50:35,965 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-02-06 19:50:35,965 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-02-06 19:50:35,967 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2025-02-06 19:50:35,970 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2025-02-06 19:50:35,971 INFO L444 ModelExtractionUtils]: 0 out of 3 variables were initially zero. Simplification set additionally 0 variables to zero. [2025-02-06 19:50:35,972 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:50:35,972 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:50:35,976 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:50:35,978 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Waiting until timeout for monitored process [2025-02-06 19:50:35,979 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2025-02-06 19:50:35,980 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2025-02-06 19:50:35,980 INFO L474 LassoAnalysis]: Proved termination. [2025-02-06 19:50:35,980 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(~main_dbl_ev~0) = -1*~main_dbl_ev~0 + 1 Supporting invariants [] [2025-02-06 19:50:35,986 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Forceful destruction successful, exit code 0 [2025-02-06 19:50:35,988 INFO L156 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2025-02-06 19:50:36,022 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:36,045 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 40 statements into 1 equivalence classes. [2025-02-06 19:50:36,079 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (9)] Ended with exit code 0 [2025-02-06 19:50:36,088 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 40 of 40 statements. [2025-02-06 19:50:36,088 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:36,088 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:36,090 INFO L256 TraceCheckSpWp]: Trace formula consists of 232 conjuncts, 2 conjuncts are in the unsatisfiable core [2025-02-06 19:50:36,091 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:50:36,141 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 44 statements into 1 equivalence classes. [2025-02-06 19:50:36,152 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 44 of 44 statements. [2025-02-06 19:50:36,153 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:36,153 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:36,153 INFO L256 TraceCheckSpWp]: Trace formula consists of 116 conjuncts, 4 conjuncts are in the unsatisfiable core [2025-02-06 19:50:36,154 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:50:36,234 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:36,238 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 3 loop predicates [2025-02-06 19:50:36,239 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 1140 states and 1974 transitions. cyclomatic complexity: 836 Second operand has 5 states, 5 states have (on average 16.8) internal successors, (84), 5 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:36,404 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 1140 states and 1974 transitions. cyclomatic complexity: 836. Second operand has 5 states, 5 states have (on average 16.8) internal successors, (84), 5 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 4148 states and 7215 transitions. Complement of second has 5 states. [2025-02-06 19:50:36,404 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2025-02-06 19:50:36,405 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5 states, 5 states have (on average 16.8) internal successors, (84), 5 states have internal predecessors, (84), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:36,407 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 1400 transitions. [2025-02-06 19:50:36,409 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 1400 transitions. Stem has 40 letters. Loop has 44 letters. [2025-02-06 19:50:36,411 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-02-06 19:50:36,411 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 1400 transitions. Stem has 84 letters. Loop has 44 letters. [2025-02-06 19:50:36,411 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-02-06 19:50:36,411 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 1400 transitions. Stem has 40 letters. Loop has 88 letters. [2025-02-06 19:50:36,412 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-02-06 19:50:36,412 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4148 states and 7215 transitions. [2025-02-06 19:50:36,435 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 2928 [2025-02-06 19:50:36,453 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4148 states to 4148 states and 7215 transitions. [2025-02-06 19:50:36,453 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3098 [2025-02-06 19:50:36,456 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3135 [2025-02-06 19:50:36,456 INFO L73 IsDeterministic]: Start isDeterministic. Operand 4148 states and 7215 transitions. [2025-02-06 19:50:36,456 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:50:36,456 INFO L218 hiAutomatonCegarLoop]: Abstraction has 4148 states and 7215 transitions. [2025-02-06 19:50:36,458 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4148 states and 7215 transitions. [2025-02-06 19:50:36,502 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4148 to 3133. [2025-02-06 19:50:36,505 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3133 states, 3133 states have (on average 1.7405043089690393) internal successors, (5453), 3132 states have internal predecessors, (5453), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:36,514 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3133 states to 3133 states and 5453 transitions. [2025-02-06 19:50:36,514 INFO L240 hiAutomatonCegarLoop]: Abstraction has 3133 states and 5453 transitions. [2025-02-06 19:50:36,514 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:50:36,515 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-06 19:50:36,515 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-06 19:50:36,515 INFO L87 Difference]: Start difference. First operand 3133 states and 5453 transitions. Second operand has 4 states, 4 states have (on average 10.0) internal successors, (40), 4 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:36,788 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:50:36,788 INFO L93 Difference]: Finished difference Result 5016 states and 8751 transitions. [2025-02-06 19:50:36,789 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 5016 states and 8751 transitions. [2025-02-06 19:50:36,811 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 2990 [2025-02-06 19:50:36,830 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 5016 states to 5016 states and 8751 transitions. [2025-02-06 19:50:36,830 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3383 [2025-02-06 19:50:36,832 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3383 [2025-02-06 19:50:36,832 INFO L73 IsDeterministic]: Start isDeterministic. Operand 5016 states and 8751 transitions. [2025-02-06 19:50:36,833 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:50:36,833 INFO L218 hiAutomatonCegarLoop]: Abstraction has 5016 states and 8751 transitions. [2025-02-06 19:50:36,836 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5016 states and 8751 transitions. [2025-02-06 19:50:36,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5016 to 3684. [2025-02-06 19:50:36,877 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3684 states, 3684 states have (on average 1.752442996742671) internal successors, (6456), 3683 states have internal predecessors, (6456), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:36,886 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3684 states to 3684 states and 6456 transitions. [2025-02-06 19:50:36,886 INFO L240 hiAutomatonCegarLoop]: Abstraction has 3684 states and 6456 transitions. [2025-02-06 19:50:36,886 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-06 19:50:36,887 INFO L432 stractBuchiCegarLoop]: Abstraction has 3684 states and 6456 transitions. [2025-02-06 19:50:36,887 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-02-06 19:50:36,887 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 3684 states and 6456 transitions. [2025-02-06 19:50:36,898 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 2284 [2025-02-06 19:50:36,899 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:50:36,899 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:50:36,900 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:36,900 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:36,900 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume 1 == ~main_clk_pos_edge~0;~N_generate_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S1_addsub_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S2_presdbl_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S3_zero_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~D_print_st~0 := 0;" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume 1 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 2;" "assume 1 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 2;" [2025-02-06 19:50:36,900 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume 0 == ~main_dbl_ev~0;~main_dbl_ev~0 := 1;" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume 0 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 1;" "assume !(1 == ~main_clk_pos_edge~0);" "assume 1 == ~main_clk_pos_edge~0;~S1_addsub_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S2_presdbl_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S3_zero_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~D_print_st~0 := 0;" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume 1 == ~main_dbl_ev~0;~main_dbl_ev~0 := 2;" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume 1 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 2;" "assume 1 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 2;" "assume 0 == ~N_generate_st~0;" [2025-02-06 19:50:36,900 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:36,900 INFO L85 PathProgramCache]: Analyzing trace with hash -1973214483, now seen corresponding path program 1 times [2025-02-06 19:50:36,901 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:36,901 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [860784149] [2025-02-06 19:50:36,901 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:36,901 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:36,905 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 40 statements into 1 equivalence classes. [2025-02-06 19:50:36,908 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 40 of 40 statements. [2025-02-06 19:50:36,908 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:36,908 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:36,944 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:36,944 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:36,944 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [860784149] [2025-02-06 19:50:36,944 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [860784149] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:36,944 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:36,944 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:50:36,944 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [446419227] [2025-02-06 19:50:36,944 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:36,945 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:50:36,945 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:36,945 INFO L85 PathProgramCache]: Analyzing trace with hash -1460073879, now seen corresponding path program 1 times [2025-02-06 19:50:36,945 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:36,945 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [491215215] [2025-02-06 19:50:36,945 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:36,945 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:36,953 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 44 statements into 1 equivalence classes. [2025-02-06 19:50:36,954 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 44 of 44 statements. [2025-02-06 19:50:36,955 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:36,955 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:36,967 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:36,968 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:36,968 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [491215215] [2025-02-06 19:50:36,968 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [491215215] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:36,968 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:36,968 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:50:36,968 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1613796061] [2025-02-06 19:50:36,968 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:36,968 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:50:36,968 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:50:36,973 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:50:36,973 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:50:36,973 INFO L87 Difference]: Start difference. First operand 3684 states and 6456 transitions. cyclomatic complexity: 2778 Second operand has 3 states, 3 states have (on average 13.333333333333334) internal successors, (40), 3 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:37,150 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:50:37,150 INFO L93 Difference]: Finished difference Result 6129 states and 10529 transitions. [2025-02-06 19:50:37,150 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 6129 states and 10529 transitions. [2025-02-06 19:50:37,172 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 3866 [2025-02-06 19:50:37,194 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 6129 states to 6129 states and 10529 transitions. [2025-02-06 19:50:37,195 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 4117 [2025-02-06 19:50:37,197 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 4117 [2025-02-06 19:50:37,197 INFO L73 IsDeterministic]: Start isDeterministic. Operand 6129 states and 10529 transitions. [2025-02-06 19:50:37,198 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:50:37,198 INFO L218 hiAutomatonCegarLoop]: Abstraction has 6129 states and 10529 transitions. [2025-02-06 19:50:37,201 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6129 states and 10529 transitions. [2025-02-06 19:50:37,257 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6129 to 6099. [2025-02-06 19:50:37,266 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6099 states, 6099 states have (on average 1.7165109034267914) internal successors, (10469), 6098 states have internal predecessors, (10469), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:37,280 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6099 states to 6099 states and 10469 transitions. [2025-02-06 19:50:37,280 INFO L240 hiAutomatonCegarLoop]: Abstraction has 6099 states and 10469 transitions. [2025-02-06 19:50:37,281 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:50:37,281 INFO L432 stractBuchiCegarLoop]: Abstraction has 6099 states and 10469 transitions. [2025-02-06 19:50:37,281 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-02-06 19:50:37,281 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 6099 states and 10469 transitions. [2025-02-06 19:50:37,300 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 3846 [2025-02-06 19:50:37,301 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:50:37,301 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:50:37,301 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:37,302 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:37,302 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume 1 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 2;" [2025-02-06 19:50:37,302 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume 0 == ~main_dbl_ev~0;~main_dbl_ev~0 := 1;" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume 0 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 1;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume 1 == ~main_dbl_ev~0;~main_dbl_ev~0 := 2;" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume 1 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 2;" "assume 0 == ~N_generate_st~0;" [2025-02-06 19:50:37,302 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:37,302 INFO L85 PathProgramCache]: Analyzing trace with hash 1362474381, now seen corresponding path program 1 times [2025-02-06 19:50:37,303 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:37,303 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1988738427] [2025-02-06 19:50:37,303 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:37,303 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:37,307 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 40 statements into 1 equivalence classes. [2025-02-06 19:50:37,310 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 40 of 40 statements. [2025-02-06 19:50:37,311 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:37,311 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:37,370 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:37,370 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:37,371 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1988738427] [2025-02-06 19:50:37,371 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1988738427] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:37,371 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:37,371 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:50:37,371 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [537121413] [2025-02-06 19:50:37,371 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:37,371 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:50:37,371 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:37,371 INFO L85 PathProgramCache]: Analyzing trace with hash -622400022, now seen corresponding path program 1 times [2025-02-06 19:50:37,371 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:37,371 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [808814794] [2025-02-06 19:50:37,372 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:37,372 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:37,375 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 44 statements into 1 equivalence classes. [2025-02-06 19:50:37,376 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 44 of 44 statements. [2025-02-06 19:50:37,376 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:37,376 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:37,396 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:37,396 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:37,396 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [808814794] [2025-02-06 19:50:37,396 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [808814794] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:37,396 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:37,397 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-02-06 19:50:37,397 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1398563429] [2025-02-06 19:50:37,397 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:37,397 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:50:37,397 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:50:37,397 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-06 19:50:37,397 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-06 19:50:37,398 INFO L87 Difference]: Start difference. First operand 6099 states and 10469 transitions. cyclomatic complexity: 4376 Second operand has 4 states, 3 states have (on average 13.333333333333334) internal successors, (40), 4 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:37,649 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:50:37,649 INFO L93 Difference]: Finished difference Result 10308 states and 17358 transitions. [2025-02-06 19:50:37,649 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 10308 states and 17358 transitions. [2025-02-06 19:50:37,692 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 6468 [2025-02-06 19:50:37,727 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 10308 states to 10308 states and 17358 transitions. [2025-02-06 19:50:37,727 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6928 [2025-02-06 19:50:37,734 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6928 [2025-02-06 19:50:37,734 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10308 states and 17358 transitions. [2025-02-06 19:50:37,735 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:50:37,735 INFO L218 hiAutomatonCegarLoop]: Abstraction has 10308 states and 17358 transitions. [2025-02-06 19:50:37,744 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10308 states and 17358 transitions. [2025-02-06 19:50:37,895 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10308 to 7825. [2025-02-06 19:50:37,908 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7825 states, 7825 states have (on average 1.6929073482428114) internal successors, (13247), 7824 states have internal predecessors, (13247), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:37,926 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7825 states to 7825 states and 13247 transitions. [2025-02-06 19:50:37,926 INFO L240 hiAutomatonCegarLoop]: Abstraction has 7825 states and 13247 transitions. [2025-02-06 19:50:37,927 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-06 19:50:37,927 INFO L432 stractBuchiCegarLoop]: Abstraction has 7825 states and 13247 transitions. [2025-02-06 19:50:37,927 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-02-06 19:50:37,927 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 7825 states and 13247 transitions. [2025-02-06 19:50:37,955 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 4906 [2025-02-06 19:50:37,955 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:50:37,955 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:50:37,956 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:37,956 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:37,956 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume 0 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 1;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume 1 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 2;" [2025-02-06 19:50:37,956 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume 0 == ~main_dbl_ev~0;~main_dbl_ev~0 := 1;" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume 0 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 1;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume 1 == ~main_dbl_ev~0;~main_dbl_ev~0 := 2;" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume 1 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 2;" "assume 0 == ~N_generate_st~0;" [2025-02-06 19:50:37,957 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:37,957 INFO L85 PathProgramCache]: Analyzing trace with hash 1873008558, now seen corresponding path program 1 times [2025-02-06 19:50:37,957 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:37,957 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2086878706] [2025-02-06 19:50:37,957 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:37,957 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:37,962 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 40 statements into 1 equivalence classes. [2025-02-06 19:50:37,965 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 40 of 40 statements. [2025-02-06 19:50:37,965 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:37,965 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:38,005 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:38,006 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:38,006 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2086878706] [2025-02-06 19:50:38,006 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2086878706] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:38,006 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:38,006 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-06 19:50:38,006 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [152606749] [2025-02-06 19:50:38,006 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:38,006 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:50:38,007 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:38,007 INFO L85 PathProgramCache]: Analyzing trace with hash -622400022, now seen corresponding path program 2 times [2025-02-06 19:50:38,007 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:38,007 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [307266366] [2025-02-06 19:50:38,007 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:50:38,007 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:38,011 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 44 statements into 1 equivalence classes. [2025-02-06 19:50:38,012 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 44 of 44 statements. [2025-02-06 19:50:38,013 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:50:38,013 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:38,030 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:38,030 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:38,030 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [307266366] [2025-02-06 19:50:38,030 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [307266366] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:38,030 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:38,030 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-02-06 19:50:38,030 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1161928924] [2025-02-06 19:50:38,030 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:38,031 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:50:38,031 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:50:38,031 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-06 19:50:38,031 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-06 19:50:38,031 INFO L87 Difference]: Start difference. First operand 7825 states and 13247 transitions. cyclomatic complexity: 5428 Second operand has 4 states, 4 states have (on average 10.0) internal successors, (40), 4 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:38,160 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:50:38,160 INFO L93 Difference]: Finished difference Result 8387 states and 14042 transitions. [2025-02-06 19:50:38,160 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 8387 states and 14042 transitions. [2025-02-06 19:50:38,186 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 5274 [2025-02-06 19:50:38,208 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 8387 states to 8387 states and 14042 transitions. [2025-02-06 19:50:38,209 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5630 [2025-02-06 19:50:38,213 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 5630 [2025-02-06 19:50:38,213 INFO L73 IsDeterministic]: Start isDeterministic. Operand 8387 states and 14042 transitions. [2025-02-06 19:50:38,214 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:50:38,214 INFO L218 hiAutomatonCegarLoop]: Abstraction has 8387 states and 14042 transitions. [2025-02-06 19:50:38,220 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8387 states and 14042 transitions. [2025-02-06 19:50:38,343 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8387 to 7284. [2025-02-06 19:50:38,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7284 states, 7284 states have (on average 1.6801208127402527) internal successors, (12238), 7283 states have internal predecessors, (12238), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:38,370 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7284 states to 7284 states and 12238 transitions. [2025-02-06 19:50:38,370 INFO L240 hiAutomatonCegarLoop]: Abstraction has 7284 states and 12238 transitions. [2025-02-06 19:50:38,370 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-06 19:50:38,371 INFO L432 stractBuchiCegarLoop]: Abstraction has 7284 states and 12238 transitions. [2025-02-06 19:50:38,371 INFO L338 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2025-02-06 19:50:38,371 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 7284 states and 12238 transitions. [2025-02-06 19:50:38,387 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 4568 [2025-02-06 19:50:38,388 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:50:38,388 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:50:38,389 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:38,389 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:38,389 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" [2025-02-06 19:50:38,389 INFO L754 eck$LassoCheckResult]: Loop: "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume 0 == ~N_generate_st~0;" "assume true;" [2025-02-06 19:50:38,389 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:38,389 INFO L85 PathProgramCache]: Analyzing trace with hash -712966438, now seen corresponding path program 1 times [2025-02-06 19:50:38,390 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:38,390 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2018748940] [2025-02-06 19:50:38,390 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:38,390 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:38,393 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 41 statements into 1 equivalence classes. [2025-02-06 19:50:38,396 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 41 of 41 statements. [2025-02-06 19:50:38,396 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:38,396 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:50:38,396 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:50:38,399 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 41 statements into 1 equivalence classes. [2025-02-06 19:50:38,402 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 41 of 41 statements. [2025-02-06 19:50:38,402 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:38,402 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:50:38,407 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:50:38,407 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:38,407 INFO L85 PathProgramCache]: Analyzing trace with hash 672742392, now seen corresponding path program 1 times [2025-02-06 19:50:38,407 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:38,408 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [399051180] [2025-02-06 19:50:38,408 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:38,408 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:38,411 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 44 statements into 1 equivalence classes. [2025-02-06 19:50:38,412 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 44 of 44 statements. [2025-02-06 19:50:38,412 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:38,412 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:38,430 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:38,431 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:38,431 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [399051180] [2025-02-06 19:50:38,431 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [399051180] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:38,431 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:38,431 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:50:38,431 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [995140815] [2025-02-06 19:50:38,431 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:38,431 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:50:38,432 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:50:38,432 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:50:38,432 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:50:38,432 INFO L87 Difference]: Start difference. First operand 7284 states and 12238 transitions. cyclomatic complexity: 4960 Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:38,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:50:38,492 INFO L93 Difference]: Finished difference Result 10167 states and 17005 transitions. [2025-02-06 19:50:38,492 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 10167 states and 17005 transitions. [2025-02-06 19:50:38,580 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 6272 [2025-02-06 19:50:38,632 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 10167 states to 10167 states and 17005 transitions. [2025-02-06 19:50:38,632 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6861 [2025-02-06 19:50:38,644 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6861 [2025-02-06 19:50:38,645 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10167 states and 17005 transitions. [2025-02-06 19:50:38,646 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:50:38,646 INFO L218 hiAutomatonCegarLoop]: Abstraction has 10167 states and 17005 transitions. [2025-02-06 19:50:38,665 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10167 states and 17005 transitions. [2025-02-06 19:50:38,840 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10167 to 10125. [2025-02-06 19:50:38,851 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10125 states, 10125 states have (on average 1.675358024691358) internal successors, (16963), 10124 states have internal predecessors, (16963), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:38,867 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10125 states to 10125 states and 16963 transitions. [2025-02-06 19:50:38,867 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10125 states and 16963 transitions. [2025-02-06 19:50:38,868 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:50:38,868 INFO L432 stractBuchiCegarLoop]: Abstraction has 10125 states and 16963 transitions. [2025-02-06 19:50:38,868 INFO L338 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2025-02-06 19:50:38,868 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10125 states and 16963 transitions. [2025-02-06 19:50:38,884 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 6248 [2025-02-06 19:50:38,885 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:50:38,885 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:50:38,885 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:38,885 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:38,886 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume 1 == ~N_generate_i~0;~N_generate_st~0 := 0;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" [2025-02-06 19:50:38,886 INFO L754 eck$LassoCheckResult]: Loop: "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume ~main_clk_val~0 != ~main_clk_val_t~0;~main_clk_val~0 := ~main_clk_val_t~0;~main_clk_ev~0 := 0;" "assume 1 == ~main_clk_val~0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 2;" "~main_clk_req_up~0 := 0;" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume 1 == ~main_clk_pos_edge~0;~N_generate_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S1_addsub_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S2_presdbl_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S3_zero_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~D_print_st~0 := 0;" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume 1 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 2;" "assume !(1 == ~main_clk_neg_edge~0);" "assume 0 == ~N_generate_st~0;" "assume true;" [2025-02-06 19:50:38,886 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:38,886 INFO L85 PathProgramCache]: Analyzing trace with hash -1063766375, now seen corresponding path program 1 times [2025-02-06 19:50:38,886 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:38,886 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [121307684] [2025-02-06 19:50:38,887 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:38,887 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:38,890 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 41 statements into 1 equivalence classes. [2025-02-06 19:50:38,892 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 41 of 41 statements. [2025-02-06 19:50:38,892 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:38,892 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:38,921 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:38,921 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:38,921 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [121307684] [2025-02-06 19:50:38,921 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [121307684] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:38,921 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:38,922 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-06 19:50:38,922 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [354037610] [2025-02-06 19:50:38,922 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:38,922 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:50:38,922 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:38,922 INFO L85 PathProgramCache]: Analyzing trace with hash -1520730431, now seen corresponding path program 1 times [2025-02-06 19:50:38,922 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:38,922 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [577727621] [2025-02-06 19:50:38,922 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:38,923 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:38,925 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 47 statements into 1 equivalence classes. [2025-02-06 19:50:38,927 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 47 of 47 statements. [2025-02-06 19:50:38,927 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:38,927 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:38,937 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:38,937 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:38,937 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [577727621] [2025-02-06 19:50:38,937 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [577727621] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:38,937 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:38,937 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:50:38,937 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1721555223] [2025-02-06 19:50:38,937 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:38,938 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:50:38,964 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:50:38,964 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-06 19:50:38,964 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-06 19:50:38,965 INFO L87 Difference]: Start difference. First operand 10125 states and 16963 transitions. cyclomatic complexity: 6848 Second operand has 4 states, 4 states have (on average 10.25) internal successors, (41), 4 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:39,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:50:39,103 INFO L93 Difference]: Finished difference Result 11157 states and 18351 transitions. [2025-02-06 19:50:39,103 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 11157 states and 18351 transitions. [2025-02-06 19:50:39,205 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 7224 [2025-02-06 19:50:39,247 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 11157 states to 11157 states and 18351 transitions. [2025-02-06 19:50:39,248 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7384 [2025-02-06 19:50:39,254 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7384 [2025-02-06 19:50:39,255 INFO L73 IsDeterministic]: Start isDeterministic. Operand 11157 states and 18351 transitions. [2025-02-06 19:50:39,255 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:50:39,255 INFO L218 hiAutomatonCegarLoop]: Abstraction has 11157 states and 18351 transitions. [2025-02-06 19:50:39,262 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11157 states and 18351 transitions. [2025-02-06 19:50:39,363 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11157 to 11157. [2025-02-06 19:50:39,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11157 states, 11157 states have (on average 1.644796988437752) internal successors, (18351), 11156 states have internal predecessors, (18351), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:39,401 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11157 states to 11157 states and 18351 transitions. [2025-02-06 19:50:39,401 INFO L240 hiAutomatonCegarLoop]: Abstraction has 11157 states and 18351 transitions. [2025-02-06 19:50:39,402 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-06 19:50:39,402 INFO L432 stractBuchiCegarLoop]: Abstraction has 11157 states and 18351 transitions. [2025-02-06 19:50:39,402 INFO L338 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2025-02-06 19:50:39,403 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 11157 states and 18351 transitions. [2025-02-06 19:50:39,429 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 7224 [2025-02-06 19:50:39,429 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:50:39,429 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:50:39,430 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:39,430 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:39,430 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" [2025-02-06 19:50:39,431 INFO L754 eck$LassoCheckResult]: Loop: "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume 0 == ~S1_addsub_st~0;" "assume true;" [2025-02-06 19:50:39,431 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:39,431 INFO L85 PathProgramCache]: Analyzing trace with hash -712966438, now seen corresponding path program 2 times [2025-02-06 19:50:39,431 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:39,431 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [983745496] [2025-02-06 19:50:39,432 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:50:39,432 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:39,437 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 41 statements into 1 equivalence classes. [2025-02-06 19:50:39,441 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 41 of 41 statements. [2025-02-06 19:50:39,441 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:50:39,441 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:50:39,441 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:50:39,446 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 41 statements into 1 equivalence classes. [2025-02-06 19:50:39,450 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 41 of 41 statements. [2025-02-06 19:50:39,453 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:39,453 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:50:39,459 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:50:39,460 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:39,460 INFO L85 PathProgramCache]: Analyzing trace with hash -619825120, now seen corresponding path program 1 times [2025-02-06 19:50:39,460 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:39,460 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1901123978] [2025-02-06 19:50:39,460 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:39,460 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:39,464 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 45 statements into 1 equivalence classes. [2025-02-06 19:50:39,467 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 45 of 45 statements. [2025-02-06 19:50:39,467 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:39,467 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:39,484 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:39,485 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:39,485 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1901123978] [2025-02-06 19:50:39,485 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1901123978] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:39,485 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:39,485 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:50:39,485 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1395787670] [2025-02-06 19:50:39,485 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:39,485 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:50:39,485 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:50:39,485 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:50:39,485 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:50:39,485 INFO L87 Difference]: Start difference. First operand 11157 states and 18351 transitions. cyclomatic complexity: 7206 Second operand has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:39,631 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:50:39,631 INFO L93 Difference]: Finished difference Result 15193 states and 24905 transitions. [2025-02-06 19:50:39,631 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 15193 states and 24905 transitions. [2025-02-06 19:50:39,672 INFO L131 ngComponentsAnalysis]: Automaton has 9 accepting balls. 9797 [2025-02-06 19:50:39,709 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 15193 states to 15193 states and 24905 transitions. [2025-02-06 19:50:39,709 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10059 [2025-02-06 19:50:39,714 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10059 [2025-02-06 19:50:39,714 INFO L73 IsDeterministic]: Start isDeterministic. Operand 15193 states and 24905 transitions. [2025-02-06 19:50:39,715 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:50:39,715 INFO L218 hiAutomatonCegarLoop]: Abstraction has 15193 states and 24905 transitions. [2025-02-06 19:50:39,719 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15193 states and 24905 transitions. [2025-02-06 19:50:39,817 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15193 to 15118. [2025-02-06 19:50:39,836 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15118 states, 15118 states have (on average 1.6424130175949199) internal successors, (24830), 15117 states have internal predecessors, (24830), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:39,860 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15118 states to 15118 states and 24830 transitions. [2025-02-06 19:50:39,860 INFO L240 hiAutomatonCegarLoop]: Abstraction has 15118 states and 24830 transitions. [2025-02-06 19:50:39,861 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:50:39,861 INFO L432 stractBuchiCegarLoop]: Abstraction has 15118 states and 24830 transitions. [2025-02-06 19:50:39,861 INFO L338 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2025-02-06 19:50:39,861 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 15118 states and 24830 transitions. [2025-02-06 19:50:39,943 INFO L131 ngComponentsAnalysis]: Automaton has 9 accepting balls. 9749 [2025-02-06 19:50:39,943 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:50:39,943 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:50:39,943 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:39,944 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:39,944 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume 1 == ~S1_addsub_i~0;~S1_addsub_st~0 := 0;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" [2025-02-06 19:50:39,944 INFO L754 eck$LassoCheckResult]: Loop: "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume ~main_clk_val~0 != ~main_clk_val_t~0;~main_clk_val~0 := ~main_clk_val_t~0;~main_clk_ev~0 := 0;" "assume 1 == ~main_clk_val~0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 2;" "~main_clk_req_up~0 := 0;" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume 1 == ~main_clk_pos_edge~0;~S1_addsub_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S2_presdbl_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S3_zero_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~D_print_st~0 := 0;" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume 1 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 2;" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume 0 == ~S1_addsub_st~0;" "assume true;" [2025-02-06 19:50:39,944 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:39,944 INFO L85 PathProgramCache]: Analyzing trace with hash -724282565, now seen corresponding path program 1 times [2025-02-06 19:50:39,944 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:39,944 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [750828518] [2025-02-06 19:50:39,945 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:39,945 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:39,948 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 41 statements into 1 equivalence classes. [2025-02-06 19:50:39,950 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 41 of 41 statements. [2025-02-06 19:50:39,950 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:39,950 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:39,975 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:39,975 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:39,975 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [750828518] [2025-02-06 19:50:39,975 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [750828518] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:39,975 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:39,975 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-06 19:50:39,975 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1614588845] [2025-02-06 19:50:39,975 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:39,976 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:50:39,976 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:39,976 INFO L85 PathProgramCache]: Analyzing trace with hash -895078250, now seen corresponding path program 1 times [2025-02-06 19:50:39,976 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:39,976 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [905945306] [2025-02-06 19:50:39,976 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:39,976 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:39,979 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 48 statements into 1 equivalence classes. [2025-02-06 19:50:39,980 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 48 of 48 statements. [2025-02-06 19:50:39,980 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:39,980 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:39,995 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:39,996 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:39,996 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [905945306] [2025-02-06 19:50:39,996 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [905945306] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:39,996 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:39,996 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:50:39,996 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [34470712] [2025-02-06 19:50:39,996 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:39,996 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:50:39,996 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:50:39,996 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-06 19:50:39,996 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-06 19:50:39,997 INFO L87 Difference]: Start difference. First operand 15118 states and 24830 transitions. cyclomatic complexity: 9726 Second operand has 4 states, 4 states have (on average 10.25) internal successors, (41), 4 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:40,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:50:40,064 INFO L93 Difference]: Finished difference Result 12598 states and 20382 transitions. [2025-02-06 19:50:40,064 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 12598 states and 20382 transitions. [2025-02-06 19:50:40,098 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 8166 [2025-02-06 19:50:40,123 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 12598 states to 12598 states and 20382 transitions. [2025-02-06 19:50:40,123 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8339 [2025-02-06 19:50:40,127 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8339 [2025-02-06 19:50:40,127 INFO L73 IsDeterministic]: Start isDeterministic. Operand 12598 states and 20382 transitions. [2025-02-06 19:50:40,127 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:50:40,127 INFO L218 hiAutomatonCegarLoop]: Abstraction has 12598 states and 20382 transitions. [2025-02-06 19:50:40,131 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12598 states and 20382 transitions. [2025-02-06 19:50:40,199 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12598 to 12598. [2025-02-06 19:50:40,210 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 12598 states, 12598 states have (on average 1.6178758533100492) internal successors, (20382), 12597 states have internal predecessors, (20382), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:40,305 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 12598 states to 12598 states and 20382 transitions. [2025-02-06 19:50:40,306 INFO L240 hiAutomatonCegarLoop]: Abstraction has 12598 states and 20382 transitions. [2025-02-06 19:50:40,306 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-06 19:50:40,306 INFO L432 stractBuchiCegarLoop]: Abstraction has 12598 states and 20382 transitions. [2025-02-06 19:50:40,306 INFO L338 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2025-02-06 19:50:40,306 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 12598 states and 20382 transitions. [2025-02-06 19:50:40,327 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 8166 [2025-02-06 19:50:40,327 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:50:40,328 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:50:40,328 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:40,328 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:40,328 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" [2025-02-06 19:50:40,329 INFO L754 eck$LassoCheckResult]: Loop: "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume 0 == ~S2_presdbl_st~0;" "assume true;" [2025-02-06 19:50:40,329 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:40,329 INFO L85 PathProgramCache]: Analyzing trace with hash -712966438, now seen corresponding path program 3 times [2025-02-06 19:50:40,329 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:40,329 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1244026760] [2025-02-06 19:50:40,329 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:50:40,330 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:40,335 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 41 statements into 1 equivalence classes. [2025-02-06 19:50:40,339 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 41 of 41 statements. [2025-02-06 19:50:40,339 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-06 19:50:40,339 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:50:40,339 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:50:40,345 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 41 statements into 1 equivalence classes. [2025-02-06 19:50:40,351 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 41 of 41 statements. [2025-02-06 19:50:40,352 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:40,352 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:50:40,360 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:50:40,363 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:40,364 INFO L85 PathProgramCache]: Analyzing trace with hash -2034712390, now seen corresponding path program 1 times [2025-02-06 19:50:40,364 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:40,364 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [243435667] [2025-02-06 19:50:40,364 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:40,364 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:40,367 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 46 statements into 1 equivalence classes. [2025-02-06 19:50:40,368 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 46 of 46 statements. [2025-02-06 19:50:40,368 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:40,368 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:40,380 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:40,380 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:40,380 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [243435667] [2025-02-06 19:50:40,380 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [243435667] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:40,380 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:40,381 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:50:40,381 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [23476617] [2025-02-06 19:50:40,381 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:40,381 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:50:40,381 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:50:40,381 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:50:40,381 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:50:40,381 INFO L87 Difference]: Start difference. First operand 12598 states and 20382 transitions. cyclomatic complexity: 7796 Second operand has 3 states, 3 states have (on average 15.333333333333334) internal successors, (46), 3 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:40,464 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:50:40,464 INFO L93 Difference]: Finished difference Result 17248 states and 27759 transitions. [2025-02-06 19:50:40,464 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 17248 states and 27759 transitions. [2025-02-06 19:50:40,515 INFO L131 ngComponentsAnalysis]: Automaton has 9 accepting balls. 11150 [2025-02-06 19:50:40,655 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 17248 states to 17248 states and 27759 transitions. [2025-02-06 19:50:40,656 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11423 [2025-02-06 19:50:40,669 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11423 [2025-02-06 19:50:40,670 INFO L73 IsDeterministic]: Start isDeterministic. Operand 17248 states and 27759 transitions. [2025-02-06 19:50:40,670 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:50:40,670 INFO L218 hiAutomatonCegarLoop]: Abstraction has 17248 states and 27759 transitions. [2025-02-06 19:50:40,681 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17248 states and 27759 transitions. [2025-02-06 19:50:40,941 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17248 to 17123. [2025-02-06 19:50:40,964 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17123 states, 17123 states have (on average 1.6138527127255737) internal successors, (27634), 17122 states have internal predecessors, (27634), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:40,992 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17123 states to 17123 states and 27634 transitions. [2025-02-06 19:50:40,992 INFO L240 hiAutomatonCegarLoop]: Abstraction has 17123 states and 27634 transitions. [2025-02-06 19:50:40,996 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:50:40,996 INFO L432 stractBuchiCegarLoop]: Abstraction has 17123 states and 27634 transitions. [2025-02-06 19:50:40,996 INFO L338 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2025-02-06 19:50:40,996 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 17123 states and 27634 transitions. [2025-02-06 19:50:41,051 INFO L131 ngComponentsAnalysis]: Automaton has 9 accepting balls. 11070 [2025-02-06 19:50:41,051 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:50:41,051 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:50:41,052 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:41,052 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:41,053 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume 1 == ~S2_presdbl_i~0;~S2_presdbl_st~0 := 0;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" [2025-02-06 19:50:41,053 INFO L754 eck$LassoCheckResult]: Loop: "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume ~main_clk_val~0 != ~main_clk_val_t~0;~main_clk_val~0 := ~main_clk_val_t~0;~main_clk_ev~0 := 0;" "assume 1 == ~main_clk_val~0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 2;" "~main_clk_req_up~0 := 0;" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume 1 == ~main_clk_pos_edge~0;~N_generate_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S1_addsub_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S2_presdbl_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S3_zero_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~D_print_st~0 := 0;" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume 1 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 2;" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume 0 == ~S2_presdbl_st~0;" "assume true;" [2025-02-06 19:50:41,053 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:41,053 INFO L85 PathProgramCache]: Analyzing trace with hash -1406068135, now seen corresponding path program 1 times [2025-02-06 19:50:41,053 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:41,053 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1431759418] [2025-02-06 19:50:41,054 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:41,054 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:41,061 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 41 statements into 1 equivalence classes. [2025-02-06 19:50:41,065 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 41 of 41 statements. [2025-02-06 19:50:41,065 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:41,065 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:41,108 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:41,109 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:41,109 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1431759418] [2025-02-06 19:50:41,109 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1431759418] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:41,109 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:41,109 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-06 19:50:41,109 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [125219951] [2025-02-06 19:50:41,109 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:41,110 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:50:41,110 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:41,110 INFO L85 PathProgramCache]: Analyzing trace with hash -1133152957, now seen corresponding path program 1 times [2025-02-06 19:50:41,110 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:41,110 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1984704791] [2025-02-06 19:50:41,110 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:41,111 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:41,115 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 49 statements into 1 equivalence classes. [2025-02-06 19:50:41,117 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 49 of 49 statements. [2025-02-06 19:50:41,117 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:41,117 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:41,131 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:41,132 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:41,132 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1984704791] [2025-02-06 19:50:41,132 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1984704791] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:41,132 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:41,132 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:50:41,132 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1565021201] [2025-02-06 19:50:41,132 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:41,132 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:50:41,133 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:50:41,133 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-06 19:50:41,133 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-06 19:50:41,134 INFO L87 Difference]: Start difference. First operand 17123 states and 27634 transitions. cyclomatic complexity: 10525 Second operand has 4 states, 4 states have (on average 10.25) internal successors, (41), 4 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:41,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:50:41,220 INFO L93 Difference]: Finished difference Result 14698 states and 23396 transitions. [2025-02-06 19:50:41,220 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 14698 states and 23396 transitions. [2025-02-06 19:50:41,264 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 9548 [2025-02-06 19:50:41,302 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 14698 states to 14698 states and 23396 transitions. [2025-02-06 19:50:41,302 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9733 [2025-02-06 19:50:41,307 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9733 [2025-02-06 19:50:41,307 INFO L73 IsDeterministic]: Start isDeterministic. Operand 14698 states and 23396 transitions. [2025-02-06 19:50:41,307 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:50:41,307 INFO L218 hiAutomatonCegarLoop]: Abstraction has 14698 states and 23396 transitions. [2025-02-06 19:50:41,312 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14698 states and 23396 transitions. [2025-02-06 19:50:41,431 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14698 to 14698. [2025-02-06 19:50:41,443 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14698 states, 14698 states have (on average 1.5917811947203702) internal successors, (23396), 14697 states have internal predecessors, (23396), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:41,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14698 states to 14698 states and 23396 transitions. [2025-02-06 19:50:41,464 INFO L240 hiAutomatonCegarLoop]: Abstraction has 14698 states and 23396 transitions. [2025-02-06 19:50:41,465 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-06 19:50:41,466 INFO L432 stractBuchiCegarLoop]: Abstraction has 14698 states and 23396 transitions. [2025-02-06 19:50:41,466 INFO L338 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2025-02-06 19:50:41,466 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 14698 states and 23396 transitions. [2025-02-06 19:50:41,497 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 9548 [2025-02-06 19:50:41,498 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:50:41,498 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:50:41,498 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:41,498 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:41,499 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" [2025-02-06 19:50:41,499 INFO L754 eck$LassoCheckResult]: Loop: "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume 0 == ~S3_zero_st~0;" "assume true;" [2025-02-06 19:50:41,499 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:41,499 INFO L85 PathProgramCache]: Analyzing trace with hash -712966438, now seen corresponding path program 4 times [2025-02-06 19:50:41,499 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:41,499 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [160769392] [2025-02-06 19:50:41,499 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 19:50:41,499 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:41,506 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 41 statements into 2 equivalence classes. [2025-02-06 19:50:41,509 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 41 of 41 statements. [2025-02-06 19:50:41,509 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-06 19:50:41,509 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:50:41,509 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:50:41,510 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 41 statements into 1 equivalence classes. [2025-02-06 19:50:41,513 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 41 of 41 statements. [2025-02-06 19:50:41,513 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:41,513 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:50:41,520 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:50:41,520 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:41,520 INFO L85 PathProgramCache]: Analyzing trace with hash 1348422434, now seen corresponding path program 1 times [2025-02-06 19:50:41,520 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:41,520 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2318477] [2025-02-06 19:50:41,520 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:41,520 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:41,524 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 47 statements into 1 equivalence classes. [2025-02-06 19:50:41,525 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 47 of 47 statements. [2025-02-06 19:50:41,525 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:41,525 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:41,539 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:41,539 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:41,539 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2318477] [2025-02-06 19:50:41,539 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2318477] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:41,539 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:41,539 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:50:41,539 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1991498419] [2025-02-06 19:50:41,539 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:41,539 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:50:41,539 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:50:41,539 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:50:41,539 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:50:41,540 INFO L87 Difference]: Start difference. First operand 14698 states and 23396 transitions. cyclomatic complexity: 8710 Second operand has 3 states, 3 states have (on average 15.666666666666666) internal successors, (47), 3 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:41,703 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:50:41,703 INFO L93 Difference]: Finished difference Result 20572 states and 32422 transitions. [2025-02-06 19:50:41,703 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 20572 states and 32422 transitions. [2025-02-06 19:50:41,754 INFO L131 ngComponentsAnalysis]: Automaton has 9 accepting balls. 13349 [2025-02-06 19:50:41,791 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 20572 states to 20572 states and 32422 transitions. [2025-02-06 19:50:41,791 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13633 [2025-02-06 19:50:41,797 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13633 [2025-02-06 19:50:41,797 INFO L73 IsDeterministic]: Start isDeterministic. Operand 20572 states and 32422 transitions. [2025-02-06 19:50:41,797 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:50:41,797 INFO L218 hiAutomatonCegarLoop]: Abstraction has 20572 states and 32422 transitions. [2025-02-06 19:50:41,803 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20572 states and 32422 transitions. [2025-02-06 19:50:41,925 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20572 to 20372. [2025-02-06 19:50:41,948 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 20372 states, 20372 states have (on average 1.5816807382682112) internal successors, (32222), 20371 states have internal predecessors, (32222), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:41,971 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20372 states to 20372 states and 32222 transitions. [2025-02-06 19:50:41,972 INFO L240 hiAutomatonCegarLoop]: Abstraction has 20372 states and 32222 transitions. [2025-02-06 19:50:41,972 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:50:41,973 INFO L432 stractBuchiCegarLoop]: Abstraction has 20372 states and 32222 transitions. [2025-02-06 19:50:41,973 INFO L338 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2025-02-06 19:50:41,973 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 20372 states and 32222 transitions. [2025-02-06 19:50:42,018 INFO L131 ngComponentsAnalysis]: Automaton has 9 accepting balls. 13221 [2025-02-06 19:50:42,019 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:50:42,019 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:50:42,019 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:42,019 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:42,019 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume 1 == ~S3_zero_i~0;~S3_zero_st~0 := 0;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" [2025-02-06 19:50:42,019 INFO L754 eck$LassoCheckResult]: Loop: "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume ~main_clk_val~0 != ~main_clk_val_t~0;~main_clk_val~0 := ~main_clk_val_t~0;~main_clk_ev~0 := 0;" "assume 1 == ~main_clk_val~0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 2;" "~main_clk_req_up~0 := 0;" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume 0 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 1;" "assume !(0 == ~main_clk_neg_edge~0);" "assume 1 == ~main_clk_pos_edge~0;~N_generate_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S1_addsub_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S2_presdbl_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S3_zero_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~D_print_st~0 := 0;" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume 1 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 2;" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume 0 == ~S3_zero_st~0;" "assume true;" [2025-02-06 19:50:42,020 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:42,020 INFO L85 PathProgramCache]: Analyzing trace with hash -458229893, now seen corresponding path program 1 times [2025-02-06 19:50:42,020 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:42,020 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1725424573] [2025-02-06 19:50:42,020 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:42,020 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:42,024 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 41 statements into 1 equivalence classes. [2025-02-06 19:50:42,026 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 41 of 41 statements. [2025-02-06 19:50:42,026 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:42,026 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:42,050 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:42,051 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:42,051 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1725424573] [2025-02-06 19:50:42,051 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1725424573] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:42,051 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:42,051 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-06 19:50:42,051 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [138825844] [2025-02-06 19:50:42,051 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:42,051 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:50:42,051 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:42,051 INFO L85 PathProgramCache]: Analyzing trace with hash 1270050074, now seen corresponding path program 1 times [2025-02-06 19:50:42,051 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:42,051 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1780949457] [2025-02-06 19:50:42,051 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:42,051 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:42,056 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 50 statements into 1 equivalence classes. [2025-02-06 19:50:42,057 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 50 of 50 statements. [2025-02-06 19:50:42,057 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:42,057 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:42,067 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:42,067 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:42,067 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1780949457] [2025-02-06 19:50:42,067 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1780949457] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:42,067 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:42,067 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:50:42,067 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [237294668] [2025-02-06 19:50:42,068 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:42,068 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:50:42,068 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:50:42,068 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-06 19:50:42,068 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-06 19:50:42,068 INFO L87 Difference]: Start difference. First operand 20372 states and 32222 transitions. cyclomatic complexity: 11864 Second operand has 4 states, 4 states have (on average 10.25) internal successors, (41), 4 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:42,144 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:50:42,144 INFO L93 Difference]: Finished difference Result 18042 states and 28194 transitions. [2025-02-06 19:50:42,144 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 18042 states and 28194 transitions. [2025-02-06 19:50:42,195 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 11760 [2025-02-06 19:50:42,235 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 18042 states to 18042 states and 28194 transitions. [2025-02-06 19:50:42,235 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11956 [2025-02-06 19:50:42,244 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11956 [2025-02-06 19:50:42,244 INFO L73 IsDeterministic]: Start isDeterministic. Operand 18042 states and 28194 transitions. [2025-02-06 19:50:42,244 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:50:42,244 INFO L218 hiAutomatonCegarLoop]: Abstraction has 18042 states and 28194 transitions. [2025-02-06 19:50:42,253 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18042 states and 28194 transitions. [2025-02-06 19:50:42,417 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18042 to 18042. [2025-02-06 19:50:42,436 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18042 states, 18042 states have (on average 1.5626870635184569) internal successors, (28194), 18041 states have internal predecessors, (28194), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:42,464 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18042 states to 18042 states and 28194 transitions. [2025-02-06 19:50:42,464 INFO L240 hiAutomatonCegarLoop]: Abstraction has 18042 states and 28194 transitions. [2025-02-06 19:50:42,464 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-06 19:50:42,465 INFO L432 stractBuchiCegarLoop]: Abstraction has 18042 states and 28194 transitions. [2025-02-06 19:50:42,465 INFO L338 stractBuchiCegarLoop]: ======== Iteration 17 ============ [2025-02-06 19:50:42,465 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 18042 states and 28194 transitions. [2025-02-06 19:50:42,513 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 11760 [2025-02-06 19:50:42,513 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:50:42,513 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:50:42,514 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:42,514 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:42,514 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" [2025-02-06 19:50:42,514 INFO L754 eck$LassoCheckResult]: Loop: "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume 0 == ~D_print_st~0;" "assume true;" [2025-02-06 19:50:42,515 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:42,515 INFO L85 PathProgramCache]: Analyzing trace with hash -712966438, now seen corresponding path program 5 times [2025-02-06 19:50:42,515 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:42,515 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [9984292] [2025-02-06 19:50:42,515 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-06 19:50:42,515 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:42,521 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 41 statements into 1 equivalence classes. [2025-02-06 19:50:42,523 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 41 of 41 statements. [2025-02-06 19:50:42,523 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:50:42,523 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:50:42,523 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:50:42,524 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 41 statements into 1 equivalence classes. [2025-02-06 19:50:42,527 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 41 of 41 statements. [2025-02-06 19:50:42,527 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:42,527 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:50:42,535 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:50:42,535 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:42,536 INFO L85 PathProgramCache]: Analyzing trace with hash -1148580484, now seen corresponding path program 1 times [2025-02-06 19:50:42,536 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:42,536 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1648711362] [2025-02-06 19:50:42,536 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:42,536 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:42,539 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 48 statements into 1 equivalence classes. [2025-02-06 19:50:42,541 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 48 of 48 statements. [2025-02-06 19:50:42,541 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:42,541 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:42,555 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:42,555 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:42,555 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1648711362] [2025-02-06 19:50:42,555 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1648711362] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:42,555 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:42,555 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:50:42,555 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [352709549] [2025-02-06 19:50:42,555 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:42,555 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:50:42,556 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:50:42,556 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:50:42,556 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:50:42,556 INFO L87 Difference]: Start difference. First operand 18042 states and 28194 transitions. cyclomatic complexity: 10164 Second operand has 3 states, 3 states have (on average 16.0) internal successors, (48), 3 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:42,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:50:42,655 INFO L93 Difference]: Finished difference Result 25357 states and 38867 transitions. [2025-02-06 19:50:42,655 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 25357 states and 38867 transitions. [2025-02-06 19:50:42,756 INFO L131 ngComponentsAnalysis]: Automaton has 9 accepting balls. 15966 [2025-02-06 19:50:42,823 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 25357 states to 25357 states and 38867 transitions. [2025-02-06 19:50:42,824 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 16819 [2025-02-06 19:50:42,836 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 16819 [2025-02-06 19:50:42,836 INFO L73 IsDeterministic]: Start isDeterministic. Operand 25357 states and 38867 transitions. [2025-02-06 19:50:43,063 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:50:43,063 INFO L218 hiAutomatonCegarLoop]: Abstraction has 25357 states and 38867 transitions. [2025-02-06 19:50:43,071 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25357 states and 38867 transitions. [2025-02-06 19:50:43,223 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25357 to 25057. [2025-02-06 19:50:43,246 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25057 states, 25057 states have (on average 1.5391706908249192) internal successors, (38567), 25056 states have internal predecessors, (38567), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:43,281 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25057 states to 25057 states and 38567 transitions. [2025-02-06 19:50:43,281 INFO L240 hiAutomatonCegarLoop]: Abstraction has 25057 states and 38567 transitions. [2025-02-06 19:50:43,282 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:50:43,282 INFO L432 stractBuchiCegarLoop]: Abstraction has 25057 states and 38567 transitions. [2025-02-06 19:50:43,282 INFO L338 stractBuchiCegarLoop]: ======== Iteration 18 ============ [2025-02-06 19:50:43,282 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 25057 states and 38567 transitions. [2025-02-06 19:50:43,343 INFO L131 ngComponentsAnalysis]: Automaton has 9 accepting balls. 15774 [2025-02-06 19:50:43,344 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:50:43,344 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:50:43,344 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:43,344 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:43,345 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume 1 == ~D_print_i~0;~D_print_st~0 := 0;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" [2025-02-06 19:50:43,345 INFO L754 eck$LassoCheckResult]: Loop: "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume ~main_clk_val~0 != ~main_clk_val_t~0;~main_clk_val~0 := ~main_clk_val_t~0;~main_clk_ev~0 := 0;" "assume 1 == ~main_clk_val~0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 2;" "~main_clk_req_up~0 := 0;" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume 0 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 1;" "assume !(0 == ~main_clk_neg_edge~0);" "assume 1 == ~main_clk_pos_edge~0;~N_generate_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S1_addsub_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S2_presdbl_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S3_zero_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~D_print_st~0 := 0;" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume 1 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 2;" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume 0 == ~D_print_st~0;" "assume true;" [2025-02-06 19:50:43,345 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:43,345 INFO L85 PathProgramCache]: Analyzing trace with hash -1674580455, now seen corresponding path program 1 times [2025-02-06 19:50:43,345 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:43,345 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [697469864] [2025-02-06 19:50:43,345 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:43,345 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:43,353 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 41 statements into 1 equivalence classes. [2025-02-06 19:50:43,355 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 41 of 41 statements. [2025-02-06 19:50:43,355 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:43,355 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:43,377 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:43,378 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:43,378 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [697469864] [2025-02-06 19:50:43,378 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [697469864] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:43,378 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:43,378 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-06 19:50:43,378 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [556057572] [2025-02-06 19:50:43,378 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:43,378 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:50:43,379 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:43,379 INFO L85 PathProgramCache]: Analyzing trace with hash 716843652, now seen corresponding path program 1 times [2025-02-06 19:50:43,379 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:43,379 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1554650313] [2025-02-06 19:50:43,379 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:43,379 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:43,384 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 51 statements into 1 equivalence classes. [2025-02-06 19:50:43,385 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 51 of 51 statements. [2025-02-06 19:50:43,385 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:43,385 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:43,395 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:43,395 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:43,395 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1554650313] [2025-02-06 19:50:43,395 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1554650313] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:43,395 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:43,395 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:50:43,396 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [845712611] [2025-02-06 19:50:43,396 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:43,396 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:50:43,396 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:50:43,396 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-06 19:50:43,397 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-06 19:50:43,397 INFO L87 Difference]: Start difference. First operand 25057 states and 38567 transitions. cyclomatic complexity: 13524 Second operand has 4 states, 4 states have (on average 10.25) internal successors, (41), 4 states have internal predecessors, (41), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:43,483 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:50:43,483 INFO L93 Difference]: Finished difference Result 22822 states and 34749 transitions. [2025-02-06 19:50:43,483 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 22822 states and 34749 transitions. [2025-02-06 19:50:43,558 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 14374 [2025-02-06 19:50:43,605 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 22822 states to 22822 states and 34749 transitions. [2025-02-06 19:50:43,605 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15138 [2025-02-06 19:50:43,614 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 15138 [2025-02-06 19:50:43,615 INFO L73 IsDeterministic]: Start isDeterministic. Operand 22822 states and 34749 transitions. [2025-02-06 19:50:43,615 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:50:43,615 INFO L218 hiAutomatonCegarLoop]: Abstraction has 22822 states and 34749 transitions. [2025-02-06 19:50:43,627 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22822 states and 34749 transitions. [2025-02-06 19:50:43,772 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22822 to 22822. [2025-02-06 19:50:43,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22822 states, 22822 states have (on average 1.522609762509859) internal successors, (34749), 22821 states have internal predecessors, (34749), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:43,818 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22822 states to 22822 states and 34749 transitions. [2025-02-06 19:50:43,818 INFO L240 hiAutomatonCegarLoop]: Abstraction has 22822 states and 34749 transitions. [2025-02-06 19:50:43,819 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-06 19:50:43,819 INFO L432 stractBuchiCegarLoop]: Abstraction has 22822 states and 34749 transitions. [2025-02-06 19:50:43,819 INFO L338 stractBuchiCegarLoop]: ======== Iteration 19 ============ [2025-02-06 19:50:43,820 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 22822 states and 34749 transitions. [2025-02-06 19:50:43,866 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 14374 [2025-02-06 19:50:43,867 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:50:43,867 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:50:43,867 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:43,867 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:43,868 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" [2025-02-06 19:50:43,868 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume ~main_clk_val~0 != ~main_clk_val_t~0;~main_clk_val~0 := ~main_clk_val_t~0;~main_clk_ev~0 := 0;" "assume 1 == ~main_clk_val~0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 2;" "~main_clk_req_up~0 := 0;" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume 0 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 1;" "assume !(0 == ~main_clk_neg_edge~0);" "assume 1 == ~main_clk_pos_edge~0;~N_generate_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S1_addsub_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S2_presdbl_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S3_zero_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~D_print_st~0 := 0;" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume 1 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 2;" "assume !(1 == ~main_clk_neg_edge~0);" "assume 0 == ~N_generate_st~0;" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume 0 == ~N_generate_st~0;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" [2025-02-06 19:50:43,868 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:43,868 INFO L85 PathProgramCache]: Analyzing trace with hash -627122419, now seen corresponding path program 1 times [2025-02-06 19:50:43,868 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:43,868 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [678078044] [2025-02-06 19:50:43,868 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:43,869 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:43,872 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 42 statements into 1 equivalence classes. [2025-02-06 19:50:43,874 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 42 of 42 statements. [2025-02-06 19:50:43,874 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:43,874 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:50:43,874 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:50:43,876 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 42 statements into 1 equivalence classes. [2025-02-06 19:50:43,877 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 42 of 42 statements. [2025-02-06 19:50:43,877 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:43,877 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:50:43,881 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:50:43,881 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:43,881 INFO L85 PathProgramCache]: Analyzing trace with hash -244030365, now seen corresponding path program 1 times [2025-02-06 19:50:43,881 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:43,881 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [646788466] [2025-02-06 19:50:43,881 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:43,881 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:43,884 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 54 statements into 1 equivalence classes. [2025-02-06 19:50:43,885 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 54 of 54 statements. [2025-02-06 19:50:43,885 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:43,885 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:43,895 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:43,895 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:43,895 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [646788466] [2025-02-06 19:50:43,895 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [646788466] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:43,895 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:43,895 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:50:43,895 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [977013572] [2025-02-06 19:50:43,895 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:43,895 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:50:43,895 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:50:43,895 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:50:43,895 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:50:43,895 INFO L87 Difference]: Start difference. First operand 22822 states and 34749 transitions. cyclomatic complexity: 11939 Second operand has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:44,078 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:50:44,079 INFO L93 Difference]: Finished difference Result 22822 states and 34627 transitions. [2025-02-06 19:50:44,079 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 22822 states and 34627 transitions. [2025-02-06 19:50:44,145 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 14374 [2025-02-06 19:50:44,187 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 22822 states to 22822 states and 34627 transitions. [2025-02-06 19:50:44,187 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 15138 [2025-02-06 19:50:44,215 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 15138 [2025-02-06 19:50:44,215 INFO L73 IsDeterministic]: Start isDeterministic. Operand 22822 states and 34627 transitions. [2025-02-06 19:50:44,215 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:50:44,215 INFO L218 hiAutomatonCegarLoop]: Abstraction has 22822 states and 34627 transitions. [2025-02-06 19:50:44,236 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22822 states and 34627 transitions. [2025-02-06 19:50:44,384 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22822 to 22822. [2025-02-06 19:50:44,403 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22822 states, 22822 states have (on average 1.5172640434668303) internal successors, (34627), 22821 states have internal predecessors, (34627), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:44,430 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22822 states to 22822 states and 34627 transitions. [2025-02-06 19:50:44,430 INFO L240 hiAutomatonCegarLoop]: Abstraction has 22822 states and 34627 transitions. [2025-02-06 19:50:44,430 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:50:44,431 INFO L432 stractBuchiCegarLoop]: Abstraction has 22822 states and 34627 transitions. [2025-02-06 19:50:44,431 INFO L338 stractBuchiCegarLoop]: ======== Iteration 20 ============ [2025-02-06 19:50:44,431 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 22822 states and 34627 transitions. [2025-02-06 19:50:44,480 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 14374 [2025-02-06 19:50:44,480 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:50:44,480 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:50:44,481 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:44,481 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:44,482 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" [2025-02-06 19:50:44,482 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume ~main_clk_val~0 != ~main_clk_val_t~0;~main_clk_val~0 := ~main_clk_val_t~0;~main_clk_ev~0 := 0;" "assume 1 == ~main_clk_val~0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 2;" "~main_clk_req_up~0 := 0;" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume 0 == ~main_clk_ev~0;~main_clk_ev~0 := 1;" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume 1 == ~main_clk_pos_edge~0;~N_generate_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S1_addsub_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S2_presdbl_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S3_zero_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~D_print_st~0 := 0;" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume 1 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 2;" "assume !(1 == ~main_clk_neg_edge~0);" "assume 0 == ~N_generate_st~0;" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume 0 == ~N_generate_st~0;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" [2025-02-06 19:50:44,482 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:44,482 INFO L85 PathProgramCache]: Analyzing trace with hash -627122419, now seen corresponding path program 2 times [2025-02-06 19:50:44,482 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:44,482 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [448468461] [2025-02-06 19:50:44,482 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:50:44,483 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:44,489 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 42 statements into 1 equivalence classes. [2025-02-06 19:50:44,494 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 42 of 42 statements. [2025-02-06 19:50:44,494 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:50:44,494 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:50:44,494 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:50:44,496 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 42 statements into 1 equivalence classes. [2025-02-06 19:50:44,498 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 42 of 42 statements. [2025-02-06 19:50:44,498 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:44,498 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:50:44,503 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:50:44,503 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:44,503 INFO L85 PathProgramCache]: Analyzing trace with hash 972320197, now seen corresponding path program 1 times [2025-02-06 19:50:44,503 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:44,504 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [424663850] [2025-02-06 19:50:44,504 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:44,504 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:44,507 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 54 statements into 1 equivalence classes. [2025-02-06 19:50:44,508 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 54 of 54 statements. [2025-02-06 19:50:44,508 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:44,508 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:44,523 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:44,524 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:44,524 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [424663850] [2025-02-06 19:50:44,524 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [424663850] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:44,524 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:44,524 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:50:44,524 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [429343931] [2025-02-06 19:50:44,524 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:44,524 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:50:44,524 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:50:44,524 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:50:44,524 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:50:44,524 INFO L87 Difference]: Start difference. First operand 22822 states and 34627 transitions. cyclomatic complexity: 11817 Second operand has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:44,641 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:50:44,641 INFO L93 Difference]: Finished difference Result 17505 states and 26075 transitions. [2025-02-06 19:50:44,641 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 17505 states and 26075 transitions. [2025-02-06 19:50:44,692 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 11098 [2025-02-06 19:50:44,727 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 17505 states to 17505 states and 26075 transitions. [2025-02-06 19:50:44,727 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11640 [2025-02-06 19:50:44,734 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11640 [2025-02-06 19:50:44,734 INFO L73 IsDeterministic]: Start isDeterministic. Operand 17505 states and 26075 transitions. [2025-02-06 19:50:44,740 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:50:44,741 INFO L218 hiAutomatonCegarLoop]: Abstraction has 17505 states and 26075 transitions. [2025-02-06 19:50:44,759 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17505 states and 26075 transitions. [2025-02-06 19:50:44,973 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17505 to 17505. [2025-02-06 19:50:45,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17505 states, 17505 states have (on average 1.4895744073121966) internal successors, (26075), 17504 states have internal predecessors, (26075), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:45,055 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17505 states to 17505 states and 26075 transitions. [2025-02-06 19:50:45,055 INFO L240 hiAutomatonCegarLoop]: Abstraction has 17505 states and 26075 transitions. [2025-02-06 19:50:45,056 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:50:45,056 INFO L432 stractBuchiCegarLoop]: Abstraction has 17505 states and 26075 transitions. [2025-02-06 19:50:45,056 INFO L338 stractBuchiCegarLoop]: ======== Iteration 21 ============ [2025-02-06 19:50:45,056 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 17505 states and 26075 transitions. [2025-02-06 19:50:45,096 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 11098 [2025-02-06 19:50:45,096 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:50:45,096 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:50:45,097 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:45,097 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:45,097 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" [2025-02-06 19:50:45,097 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume ~main_clk_val~0 != ~main_clk_val_t~0;~main_clk_val~0 := ~main_clk_val_t~0;~main_clk_ev~0 := 0;" "assume 1 == ~main_clk_val~0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 2;" "~main_clk_req_up~0 := 0;" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume 0 == ~main_clk_ev~0;~main_clk_ev~0 := 1;" "assume 0 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 1;" "assume !(0 == ~main_clk_neg_edge~0);" "assume 1 == ~main_clk_pos_edge~0;~N_generate_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S1_addsub_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S2_presdbl_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S3_zero_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~D_print_st~0 := 0;" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume 1 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 2;" "assume !(1 == ~main_clk_neg_edge~0);" "assume 0 == ~N_generate_st~0;" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume 0 == ~N_generate_st~0;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" [2025-02-06 19:50:45,098 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:45,098 INFO L85 PathProgramCache]: Analyzing trace with hash -627122419, now seen corresponding path program 3 times [2025-02-06 19:50:45,098 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:45,098 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [926429951] [2025-02-06 19:50:45,098 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:50:45,098 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:45,101 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 42 statements into 1 equivalence classes. [2025-02-06 19:50:45,107 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 42 of 42 statements. [2025-02-06 19:50:45,107 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-06 19:50:45,107 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:50:45,107 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:50:45,109 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 42 statements into 1 equivalence classes. [2025-02-06 19:50:45,112 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 42 of 42 statements. [2025-02-06 19:50:45,112 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:45,112 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:50:45,121 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:50:45,122 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:45,122 INFO L85 PathProgramCache]: Analyzing trace with hash 10706180, now seen corresponding path program 1 times [2025-02-06 19:50:45,122 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:45,122 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1491762130] [2025-02-06 19:50:45,122 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:45,122 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:45,128 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 54 statements into 1 equivalence classes. [2025-02-06 19:50:45,130 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 54 of 54 statements. [2025-02-06 19:50:45,130 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:45,130 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:45,140 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:45,140 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:45,140 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1491762130] [2025-02-06 19:50:45,140 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1491762130] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:45,140 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:45,140 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:50:45,141 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1043251301] [2025-02-06 19:50:45,141 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:45,141 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:50:45,141 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:50:45,141 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:50:45,141 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:50:45,141 INFO L87 Difference]: Start difference. First operand 17505 states and 26075 transitions. cyclomatic complexity: 8582 Second operand has 3 states, 3 states have (on average 18.0) internal successors, (54), 3 states have internal predecessors, (54), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:45,255 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:50:45,255 INFO L93 Difference]: Finished difference Result 15390 states and 22250 transitions. [2025-02-06 19:50:45,255 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 15390 states and 22250 transitions. [2025-02-06 19:50:45,298 INFO L131 ngComponentsAnalysis]: Automaton has 102 accepting balls. 9134 [2025-02-06 19:50:45,324 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 15390 states to 15390 states and 22250 transitions. [2025-02-06 19:50:45,325 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10230 [2025-02-06 19:50:45,330 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10230 [2025-02-06 19:50:45,330 INFO L73 IsDeterministic]: Start isDeterministic. Operand 15390 states and 22250 transitions. [2025-02-06 19:50:45,330 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:50:45,330 INFO L218 hiAutomatonCegarLoop]: Abstraction has 15390 states and 22250 transitions. [2025-02-06 19:50:45,336 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 15390 states and 22250 transitions. [2025-02-06 19:50:45,413 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 15390 to 13196. [2025-02-06 19:50:45,423 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13196 states, 13196 states have (on average 1.4489996968778418) internal successors, (19121), 13195 states have internal predecessors, (19121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:45,440 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13196 states to 13196 states and 19121 transitions. [2025-02-06 19:50:45,440 INFO L240 hiAutomatonCegarLoop]: Abstraction has 13196 states and 19121 transitions. [2025-02-06 19:50:45,441 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:50:45,441 INFO L432 stractBuchiCegarLoop]: Abstraction has 13196 states and 19121 transitions. [2025-02-06 19:50:45,441 INFO L338 stractBuchiCegarLoop]: ======== Iteration 22 ============ [2025-02-06 19:50:45,441 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 13196 states and 19121 transitions. [2025-02-06 19:50:45,470 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 8174 [2025-02-06 19:50:45,471 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:50:45,471 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:50:45,472 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:45,472 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:45,472 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume ~main_clk_val~0 != ~main_clk_val_t~0;~main_clk_val~0 := ~main_clk_val_t~0;~main_clk_ev~0 := 0;" "assume 1 == ~main_clk_val~0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 2;" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume 0 == ~main_clk_ev~0;~main_clk_ev~0 := 1;" "assume 0 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 1;" "assume !(0 == ~main_clk_neg_edge~0);" "assume 1 == ~main_clk_pos_edge~0;~N_generate_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S1_addsub_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S2_presdbl_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S3_zero_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~D_print_st~0 := 0;" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume 1 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 2;" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" [2025-02-06 19:50:45,472 INFO L754 eck$LassoCheckResult]: Loop: "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume 0 == ~N_generate_st~0;" "assume 0 == ~N_generate_st~0;havoc eval_#t~nondet4#1;eval_~tmp~0#1 := eval_#t~nondet4#1;havoc eval_#t~nondet4#1;" "assume 0 != eval_~tmp~0#1;~N_generate_st~0 := 1;assume { :begin_inline_N_generate } true;havoc N_generate_~a~0#1, N_generate_~b~0#1;havoc N_generate_~a~0#1;havoc N_generate_~b~0#1;~main_in1_val_t~0 := N_generate_~a~0#1;~main_in1_req_up~0 := 1;~main_in2_val_t~0 := N_generate_~b~0#1;~main_in2_req_up~0 := 1;" "havoc N_generate_~a~0#1, N_generate_~b~0#1;assume { :end_inline_N_generate } true;" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume ~main_clk_val~0 != ~main_clk_val_t~0;~main_clk_val~0 := ~main_clk_val_t~0;~main_clk_ev~0 := 0;" "assume 1 == ~main_clk_val~0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 2;" "~main_clk_req_up~0 := 0;" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume 0 == ~main_clk_ev~0;~main_clk_ev~0 := 1;" "assume 0 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 1;" "assume !(0 == ~main_clk_neg_edge~0);" "assume 1 == ~main_clk_pos_edge~0;~N_generate_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S1_addsub_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S2_presdbl_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~S3_zero_st~0 := 0;" "assume 1 == ~main_clk_pos_edge~0;~D_print_st~0 := 0;" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume 1 == ~main_clk_pos_edge~0;~main_clk_pos_edge~0 := 2;" "assume !(1 == ~main_clk_neg_edge~0);" "assume 0 == ~N_generate_st~0;" "assume true;" [2025-02-06 19:50:45,472 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:45,472 INFO L85 PathProgramCache]: Analyzing trace with hash -2062638999, now seen corresponding path program 1 times [2025-02-06 19:50:45,473 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:45,473 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [582313014] [2025-02-06 19:50:45,473 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:45,473 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:45,476 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 44 statements into 1 equivalence classes. [2025-02-06 19:50:45,478 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 44 of 44 statements. [2025-02-06 19:50:45,478 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:45,478 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:45,499 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:45,499 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:45,499 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [582313014] [2025-02-06 19:50:45,499 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [582313014] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:45,499 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:45,499 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-06 19:50:45,500 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2144963009] [2025-02-06 19:50:45,500 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:45,500 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:50:45,500 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:45,500 INFO L85 PathProgramCache]: Analyzing trace with hash -1087832447, now seen corresponding path program 1 times [2025-02-06 19:50:45,500 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:45,500 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [471890298] [2025-02-06 19:50:45,500 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:45,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:45,504 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 56 statements into 1 equivalence classes. [2025-02-06 19:50:45,505 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 56 of 56 statements. [2025-02-06 19:50:45,505 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:45,505 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:45,515 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:45,515 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:45,515 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [471890298] [2025-02-06 19:50:45,515 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [471890298] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:45,515 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:45,515 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:50:45,516 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1780183032] [2025-02-06 19:50:45,516 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:45,516 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:50:45,516 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:50:45,516 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-06 19:50:45,516 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-06 19:50:45,516 INFO L87 Difference]: Start difference. First operand 13196 states and 19121 transitions. cyclomatic complexity: 5934 Second operand has 4 states, 4 states have (on average 11.0) internal successors, (44), 4 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:45,567 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:50:45,568 INFO L93 Difference]: Finished difference Result 8622 states and 12403 transitions. [2025-02-06 19:50:45,568 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 8622 states and 12403 transitions. [2025-02-06 19:50:45,588 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 5568 [2025-02-06 19:50:45,600 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 8622 states to 8622 states and 12403 transitions. [2025-02-06 19:50:45,601 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5722 [2025-02-06 19:50:45,603 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 5722 [2025-02-06 19:50:45,603 INFO L73 IsDeterministic]: Start isDeterministic. Operand 8622 states and 12403 transitions. [2025-02-06 19:50:45,603 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:50:45,603 INFO L218 hiAutomatonCegarLoop]: Abstraction has 8622 states and 12403 transitions. [2025-02-06 19:50:45,606 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8622 states and 12403 transitions. [2025-02-06 19:50:45,646 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8622 to 8616. [2025-02-06 19:50:45,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8616 states, 8616 states have (on average 1.4388347260909935) internal successors, (12397), 8615 states have internal predecessors, (12397), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:45,662 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8616 states to 8616 states and 12397 transitions. [2025-02-06 19:50:45,663 INFO L240 hiAutomatonCegarLoop]: Abstraction has 8616 states and 12397 transitions. [2025-02-06 19:50:45,663 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-06 19:50:45,663 INFO L432 stractBuchiCegarLoop]: Abstraction has 8616 states and 12397 transitions. [2025-02-06 19:50:45,663 INFO L338 stractBuchiCegarLoop]: ======== Iteration 23 ============ [2025-02-06 19:50:45,663 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 8616 states and 12397 transitions. [2025-02-06 19:50:45,678 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 5568 [2025-02-06 19:50:45,678 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:50:45,678 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:50:45,679 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:45,683 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:45,684 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume 0 == ~main_clk_ev~0;~main_clk_ev~0 := 1;" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-02-06 19:50:45,685 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "~main_clk_val_t~0 := 1;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume 0 == ~main_clk_ev~0;~main_clk_ev~0 := 1;" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume 0 == ~main_clk_ev~0;~main_clk_ev~0 := 1;" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;main_~count~0#1 := 1 + main_~count~0#1;" "assume !(5 == main_~count~0#1);" "~main_clk_val_t~0 := 0;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume 0 == ~main_clk_ev~0;~main_clk_ev~0 := 1;" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-02-06 19:50:45,685 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:45,685 INFO L85 PathProgramCache]: Analyzing trace with hash 1245953054, now seen corresponding path program 1 times [2025-02-06 19:50:45,685 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:45,685 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [947071971] [2025-02-06 19:50:45,685 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:45,685 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:45,697 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 89 statements into 1 equivalence classes. [2025-02-06 19:50:45,707 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-02-06 19:50:45,707 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:45,707 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:45,776 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:45,776 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:45,776 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [947071971] [2025-02-06 19:50:45,776 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [947071971] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:45,777 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:45,777 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-06 19:50:45,777 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1927668600] [2025-02-06 19:50:45,777 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:45,777 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:50:45,777 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:45,778 INFO L85 PathProgramCache]: Analyzing trace with hash 1482777633, now seen corresponding path program 1 times [2025-02-06 19:50:45,778 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:45,778 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [580781666] [2025-02-06 19:50:45,778 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:45,778 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:45,785 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 178 statements into 1 equivalence classes. [2025-02-06 19:50:45,787 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 178 of 178 statements. [2025-02-06 19:50:45,787 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:45,787 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:45,809 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:45,810 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:45,810 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [580781666] [2025-02-06 19:50:45,810 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [580781666] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:45,810 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:45,810 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:50:45,810 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [856180500] [2025-02-06 19:50:45,810 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:45,810 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:50:45,810 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:50:45,811 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-06 19:50:45,811 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-06 19:50:45,811 INFO L87 Difference]: Start difference. First operand 8616 states and 12397 transitions. cyclomatic complexity: 3787 Second operand has 4 states, 4 states have (on average 22.25) internal successors, (89), 4 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:45,903 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:50:45,904 INFO L93 Difference]: Finished difference Result 9482 states and 13607 transitions. [2025-02-06 19:50:45,904 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 9482 states and 13607 transitions. [2025-02-06 19:50:45,925 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 6032 [2025-02-06 19:50:45,938 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 9482 states to 9482 states and 13607 transitions. [2025-02-06 19:50:45,939 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 6282 [2025-02-06 19:50:45,941 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 6282 [2025-02-06 19:50:45,941 INFO L73 IsDeterministic]: Start isDeterministic. Operand 9482 states and 13607 transitions. [2025-02-06 19:50:45,941 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:50:45,941 INFO L218 hiAutomatonCegarLoop]: Abstraction has 9482 states and 13607 transitions. [2025-02-06 19:50:45,944 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9482 states and 13607 transitions. [2025-02-06 19:50:45,985 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9482 to 8616. [2025-02-06 19:50:45,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8616 states, 8616 states have (on average 1.432799442896936) internal successors, (12345), 8615 states have internal predecessors, (12345), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:46,001 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8616 states to 8616 states and 12345 transitions. [2025-02-06 19:50:46,002 INFO L240 hiAutomatonCegarLoop]: Abstraction has 8616 states and 12345 transitions. [2025-02-06 19:50:46,003 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-06 19:50:46,003 INFO L432 stractBuchiCegarLoop]: Abstraction has 8616 states and 12345 transitions. [2025-02-06 19:50:46,003 INFO L338 stractBuchiCegarLoop]: ======== Iteration 24 ============ [2025-02-06 19:50:46,003 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 8616 states and 12345 transitions. [2025-02-06 19:50:46,016 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 5568 [2025-02-06 19:50:46,017 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:50:46,017 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:50:46,018 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:46,018 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:46,018 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-02-06 19:50:46,018 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "~main_clk_val_t~0 := 1;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;main_~count~0#1 := 1 + main_~count~0#1;" "assume !(5 == main_~count~0#1);" "~main_clk_val_t~0 := 0;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-02-06 19:50:46,019 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:46,019 INFO L85 PathProgramCache]: Analyzing trace with hash 1178946301, now seen corresponding path program 1 times [2025-02-06 19:50:46,019 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:46,019 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1379878205] [2025-02-06 19:50:46,019 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:46,019 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:46,024 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 89 statements into 1 equivalence classes. [2025-02-06 19:50:46,026 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-02-06 19:50:46,026 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:46,026 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:50:46,026 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:50:46,028 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 89 statements into 1 equivalence classes. [2025-02-06 19:50:46,031 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-02-06 19:50:46,031 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:46,031 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:50:46,038 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:50:46,038 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:46,039 INFO L85 PathProgramCache]: Analyzing trace with hash -1525146528, now seen corresponding path program 1 times [2025-02-06 19:50:46,039 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:46,039 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2109478882] [2025-02-06 19:50:46,039 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:46,039 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:46,045 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 178 statements into 1 equivalence classes. [2025-02-06 19:50:46,046 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 178 of 178 statements. [2025-02-06 19:50:46,046 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:46,046 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:46,067 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:46,067 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:46,067 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2109478882] [2025-02-06 19:50:46,068 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2109478882] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:46,068 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:46,068 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:50:46,068 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [333771464] [2025-02-06 19:50:46,068 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:46,068 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:50:46,068 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:50:46,069 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:50:46,069 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:50:46,069 INFO L87 Difference]: Start difference. First operand 8616 states and 12345 transitions. cyclomatic complexity: 3735 Second operand has 3 states, 3 states have (on average 59.333333333333336) internal successors, (178), 3 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:46,100 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:50:46,101 INFO L93 Difference]: Finished difference Result 8616 states and 12327 transitions. [2025-02-06 19:50:46,101 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 8616 states and 12327 transitions. [2025-02-06 19:50:46,146 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 5568 [2025-02-06 19:50:46,226 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 8616 states to 8616 states and 12327 transitions. [2025-02-06 19:50:46,227 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5718 [2025-02-06 19:50:46,236 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 5718 [2025-02-06 19:50:46,236 INFO L73 IsDeterministic]: Start isDeterministic. Operand 8616 states and 12327 transitions. [2025-02-06 19:50:46,236 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:50:46,236 INFO L218 hiAutomatonCegarLoop]: Abstraction has 8616 states and 12327 transitions. [2025-02-06 19:50:46,243 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8616 states and 12327 transitions. [2025-02-06 19:50:46,325 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8616 to 8616. [2025-02-06 19:50:46,339 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8616 states, 8616 states have (on average 1.4307103064066853) internal successors, (12327), 8615 states have internal predecessors, (12327), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:46,353 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8616 states to 8616 states and 12327 transitions. [2025-02-06 19:50:46,356 INFO L240 hiAutomatonCegarLoop]: Abstraction has 8616 states and 12327 transitions. [2025-02-06 19:50:46,357 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:50:46,357 INFO L432 stractBuchiCegarLoop]: Abstraction has 8616 states and 12327 transitions. [2025-02-06 19:50:46,357 INFO L338 stractBuchiCegarLoop]: ======== Iteration 25 ============ [2025-02-06 19:50:46,357 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 8616 states and 12327 transitions. [2025-02-06 19:50:46,392 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 5568 [2025-02-06 19:50:46,396 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:50:46,397 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:50:46,398 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:46,398 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:46,398 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-02-06 19:50:46,398 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "~main_clk_val_t~0 := 1;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume !(~main_clk_val~0 != ~main_clk_val_t~0);" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;main_~count~0#1 := 1 + main_~count~0#1;" "assume !(5 == main_~count~0#1);" "~main_clk_val_t~0 := 0;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume !(~main_clk_val~0 != ~main_clk_val_t~0);" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume 0 == ~main_in2_ev~0;~main_in2_ev~0 := 1;" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume 1 == ~main_in2_ev~0;~main_in2_ev~0 := 2;" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-02-06 19:50:46,399 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:46,400 INFO L85 PathProgramCache]: Analyzing trace with hash 1178946301, now seen corresponding path program 2 times [2025-02-06 19:50:46,400 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:46,400 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [750068512] [2025-02-06 19:50:46,400 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:50:46,400 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:46,408 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 89 statements into 1 equivalence classes. [2025-02-06 19:50:46,417 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-02-06 19:50:46,417 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:50:46,417 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:50:46,417 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:50:46,419 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 89 statements into 1 equivalence classes. [2025-02-06 19:50:46,426 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-02-06 19:50:46,429 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:46,430 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:50:46,441 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:50:46,446 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:46,446 INFO L85 PathProgramCache]: Analyzing trace with hash -1786134912, now seen corresponding path program 1 times [2025-02-06 19:50:46,446 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:46,446 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1091426931] [2025-02-06 19:50:46,446 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:46,446 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:46,453 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 182 statements into 1 equivalence classes. [2025-02-06 19:50:46,459 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 182 of 182 statements. [2025-02-06 19:50:46,459 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:46,459 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:46,528 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:46,528 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:46,528 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1091426931] [2025-02-06 19:50:46,528 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1091426931] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:46,528 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:46,528 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:50:46,528 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1717142908] [2025-02-06 19:50:46,528 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:46,529 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:50:46,532 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:50:46,533 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:50:46,533 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:50:46,533 INFO L87 Difference]: Start difference. First operand 8616 states and 12327 transitions. cyclomatic complexity: 3717 Second operand has 3 states, 3 states have (on average 60.666666666666664) internal successors, (182), 3 states have internal predecessors, (182), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:46,640 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:50:46,640 INFO L93 Difference]: Finished difference Result 17227 states and 24483 transitions. [2025-02-06 19:50:46,640 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 17227 states and 24483 transitions. [2025-02-06 19:50:46,688 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11136 [2025-02-06 19:50:46,717 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 17227 states to 17227 states and 24483 transitions. [2025-02-06 19:50:46,717 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11431 [2025-02-06 19:50:46,723 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11431 [2025-02-06 19:50:46,723 INFO L73 IsDeterministic]: Start isDeterministic. Operand 17227 states and 24483 transitions. [2025-02-06 19:50:46,723 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:50:46,723 INFO L218 hiAutomatonCegarLoop]: Abstraction has 17227 states and 24483 transitions. [2025-02-06 19:50:46,729 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17227 states and 24483 transitions. [2025-02-06 19:50:46,813 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17227 to 17227. [2025-02-06 19:50:46,826 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17227 states, 17227 states have (on average 1.4211992801996864) internal successors, (24483), 17226 states have internal predecessors, (24483), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:46,845 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17227 states to 17227 states and 24483 transitions. [2025-02-06 19:50:46,845 INFO L240 hiAutomatonCegarLoop]: Abstraction has 17227 states and 24483 transitions. [2025-02-06 19:50:46,845 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:50:46,846 INFO L432 stractBuchiCegarLoop]: Abstraction has 17227 states and 24483 transitions. [2025-02-06 19:50:46,846 INFO L338 stractBuchiCegarLoop]: ======== Iteration 26 ============ [2025-02-06 19:50:46,846 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 17227 states and 24483 transitions. [2025-02-06 19:50:46,882 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 11136 [2025-02-06 19:50:46,882 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:50:46,882 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:50:46,884 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:46,884 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:46,885 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-02-06 19:50:46,885 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "~main_clk_val_t~0 := 1;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume !(~main_clk_val~0 != ~main_clk_val_t~0);" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;main_~count~0#1 := 1 + main_~count~0#1;" "assume !(5 == main_~count~0#1);" "~main_clk_val_t~0 := 0;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume !(~main_clk_val~0 != ~main_clk_val_t~0);" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume 0 == ~main_sum_ev~0;~main_sum_ev~0 := 1;" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume 1 == ~main_sum_ev~0;~main_sum_ev~0 := 2;" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-02-06 19:50:46,885 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:46,885 INFO L85 PathProgramCache]: Analyzing trace with hash 1178946301, now seen corresponding path program 3 times [2025-02-06 19:50:46,886 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:46,886 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1402655593] [2025-02-06 19:50:46,886 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:50:46,886 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:46,891 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 89 statements into 1 equivalence classes. [2025-02-06 19:50:46,894 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-02-06 19:50:46,895 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-06 19:50:46,895 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:50:46,895 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:50:46,897 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 89 statements into 1 equivalence classes. [2025-02-06 19:50:46,899 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-02-06 19:50:46,899 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:46,899 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:50:46,911 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:50:46,912 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:46,912 INFO L85 PathProgramCache]: Analyzing trace with hash 404569728, now seen corresponding path program 1 times [2025-02-06 19:50:46,912 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:46,912 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [654452316] [2025-02-06 19:50:46,912 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:46,912 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:46,919 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 182 statements into 1 equivalence classes. [2025-02-06 19:50:46,921 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 182 of 182 statements. [2025-02-06 19:50:46,921 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:46,921 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:46,962 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:46,963 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:46,964 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [654452316] [2025-02-06 19:50:46,964 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [654452316] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:46,964 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:46,964 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:50:46,964 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [282822696] [2025-02-06 19:50:46,964 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:46,964 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:50:46,967 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:50:46,967 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:50:46,967 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:50:46,968 INFO L87 Difference]: Start difference. First operand 17227 states and 24483 transitions. cyclomatic complexity: 7262 Second operand has 3 states, 3 states have (on average 60.666666666666664) internal successors, (182), 3 states have internal predecessors, (182), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:47,073 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:50:47,073 INFO L93 Difference]: Finished difference Result 34443 states and 48621 transitions. [2025-02-06 19:50:47,073 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 34443 states and 48621 transitions. [2025-02-06 19:50:47,183 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 22272 [2025-02-06 19:50:47,258 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 34443 states to 34443 states and 48621 transitions. [2025-02-06 19:50:47,258 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 22851 [2025-02-06 19:50:47,274 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 22851 [2025-02-06 19:50:47,274 INFO L73 IsDeterministic]: Start isDeterministic. Operand 34443 states and 48621 transitions. [2025-02-06 19:50:47,275 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:50:47,275 INFO L218 hiAutomatonCegarLoop]: Abstraction has 34443 states and 48621 transitions. [2025-02-06 19:50:47,296 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34443 states and 48621 transitions. [2025-02-06 19:50:47,793 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34443 to 34443. [2025-02-06 19:50:47,821 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 34443 states, 34443 states have (on average 1.4116366170194234) internal successors, (48621), 34442 states have internal predecessors, (48621), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:47,861 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34443 states to 34443 states and 48621 transitions. [2025-02-06 19:50:47,862 INFO L240 hiAutomatonCegarLoop]: Abstraction has 34443 states and 48621 transitions. [2025-02-06 19:50:47,863 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:50:47,863 INFO L432 stractBuchiCegarLoop]: Abstraction has 34443 states and 48621 transitions. [2025-02-06 19:50:47,863 INFO L338 stractBuchiCegarLoop]: ======== Iteration 27 ============ [2025-02-06 19:50:47,864 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 34443 states and 48621 transitions. [2025-02-06 19:50:48,141 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 22272 [2025-02-06 19:50:48,142 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:50:48,142 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:50:48,143 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:48,144 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:48,144 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume 0 == ~main_dbl_ev~0;~main_dbl_ev~0 := 1;" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-02-06 19:50:48,144 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "~main_clk_val_t~0 := 1;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume !(~main_clk_val~0 != ~main_clk_val_t~0);" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;main_~count~0#1 := 1 + main_~count~0#1;" "assume !(5 == main_~count~0#1);" "~main_clk_val_t~0 := 0;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume !(~main_clk_val~0 != ~main_clk_val_t~0);" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-02-06 19:50:48,145 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:48,145 INFO L85 PathProgramCache]: Analyzing trace with hash 1147926494, now seen corresponding path program 1 times [2025-02-06 19:50:48,145 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:48,145 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1639835636] [2025-02-06 19:50:48,145 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:48,145 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:48,150 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 89 statements into 1 equivalence classes. [2025-02-06 19:50:48,152 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-02-06 19:50:48,152 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:48,152 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:48,191 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:48,191 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:48,191 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1639835636] [2025-02-06 19:50:48,191 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1639835636] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:48,191 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:48,192 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-06 19:50:48,192 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [153085075] [2025-02-06 19:50:48,192 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:48,192 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:50:48,193 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:48,193 INFO L85 PathProgramCache]: Analyzing trace with hash 890879616, now seen corresponding path program 1 times [2025-02-06 19:50:48,193 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:48,193 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1429342897] [2025-02-06 19:50:48,193 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:48,193 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:48,199 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 182 statements into 1 equivalence classes. [2025-02-06 19:50:48,201 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 182 of 182 statements. [2025-02-06 19:50:48,202 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:48,202 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:48,243 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:48,243 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:48,243 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1429342897] [2025-02-06 19:50:48,243 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1429342897] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:48,243 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:48,243 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:50:48,243 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1790142224] [2025-02-06 19:50:48,243 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:48,244 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:50:48,244 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:50:48,244 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-06 19:50:48,244 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-06 19:50:48,244 INFO L87 Difference]: Start difference. First operand 34443 states and 48621 transitions. cyclomatic complexity: 14184 Second operand has 4 states, 4 states have (on average 22.25) internal successors, (89), 4 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:48,422 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:50:48,422 INFO L93 Difference]: Finished difference Result 48167 states and 67157 transitions. [2025-02-06 19:50:48,422 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 48167 states and 67157 transitions. [2025-02-06 19:50:48,574 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 29576 [2025-02-06 19:50:48,854 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 48167 states to 48167 states and 67157 transitions. [2025-02-06 19:50:48,854 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 30539 [2025-02-06 19:50:48,875 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 30539 [2025-02-06 19:50:48,876 INFO L73 IsDeterministic]: Start isDeterministic. Operand 48167 states and 67157 transitions. [2025-02-06 19:50:48,876 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:50:48,877 INFO L218 hiAutomatonCegarLoop]: Abstraction has 48167 states and 67157 transitions. [2025-02-06 19:50:48,903 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48167 states and 67157 transitions. [2025-02-06 19:50:49,201 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48167 to 35767. [2025-02-06 19:50:49,230 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 35767 states, 35767 states have (on average 1.3980764391757765) internal successors, (50005), 35766 states have internal predecessors, (50005), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:49,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35767 states to 35767 states and 50005 transitions. [2025-02-06 19:50:49,278 INFO L240 hiAutomatonCegarLoop]: Abstraction has 35767 states and 50005 transitions. [2025-02-06 19:50:49,279 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-06 19:50:49,279 INFO L432 stractBuchiCegarLoop]: Abstraction has 35767 states and 50005 transitions. [2025-02-06 19:50:49,280 INFO L338 stractBuchiCegarLoop]: ======== Iteration 28 ============ [2025-02-06 19:50:49,280 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 35767 states and 50005 transitions. [2025-02-06 19:50:49,379 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 23656 [2025-02-06 19:50:49,380 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:50:49,380 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:50:49,381 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:49,381 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:49,386 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-02-06 19:50:49,386 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "~main_clk_val_t~0 := 1;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume !(~main_clk_val~0 != ~main_clk_val_t~0);" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;main_~count~0#1 := 1 + main_~count~0#1;" "assume !(5 == main_~count~0#1);" "~main_clk_val_t~0 := 0;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume !(~main_clk_val~0 != ~main_clk_val_t~0);" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume 0 == ~main_diff_ev~0;~main_diff_ev~0 := 1;" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume 1 == ~main_diff_ev~0;~main_diff_ev~0 := 2;" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-02-06 19:50:49,387 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:49,387 INFO L85 PathProgramCache]: Analyzing trace with hash 1178946301, now seen corresponding path program 4 times [2025-02-06 19:50:49,387 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:49,387 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1509075532] [2025-02-06 19:50:49,387 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 19:50:49,387 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:49,396 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 89 statements into 2 equivalence classes. [2025-02-06 19:50:49,400 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 89 of 89 statements. [2025-02-06 19:50:49,400 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-06 19:50:49,400 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:50:49,400 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:50:49,404 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 89 statements into 1 equivalence classes. [2025-02-06 19:50:49,406 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-02-06 19:50:49,406 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:49,406 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:50:49,413 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:50:49,414 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:49,416 INFO L85 PathProgramCache]: Analyzing trace with hash 890879616, now seen corresponding path program 2 times [2025-02-06 19:50:49,416 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:49,416 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1821133000] [2025-02-06 19:50:49,416 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:50:49,417 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:49,423 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 182 statements into 1 equivalence classes. [2025-02-06 19:50:49,425 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 182 of 182 statements. [2025-02-06 19:50:49,426 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:50:49,426 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:49,548 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:49,548 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:49,548 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1821133000] [2025-02-06 19:50:49,549 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1821133000] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:49,549 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:49,549 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:50:49,549 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1542139087] [2025-02-06 19:50:49,549 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:49,550 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:50:49,550 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:50:49,550 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:50:49,550 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:50:49,550 INFO L87 Difference]: Start difference. First operand 35767 states and 50005 transitions. cyclomatic complexity: 14244 Second operand has 3 states, 3 states have (on average 60.666666666666664) internal successors, (182), 3 states have internal predecessors, (182), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:49,719 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:50:49,719 INFO L93 Difference]: Finished difference Result 71511 states and 99193 transitions. [2025-02-06 19:50:49,719 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 71511 states and 99193 transitions. [2025-02-06 19:50:50,092 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 47312 [2025-02-06 19:50:50,386 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 71511 states to 71511 states and 99193 transitions. [2025-02-06 19:50:50,387 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 48575 [2025-02-06 19:50:50,409 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 48575 [2025-02-06 19:50:50,410 INFO L73 IsDeterministic]: Start isDeterministic. Operand 71511 states and 99193 transitions. [2025-02-06 19:50:50,419 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:50:50,420 INFO L218 hiAutomatonCegarLoop]: Abstraction has 71511 states and 99193 transitions. [2025-02-06 19:50:50,455 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71511 states and 99193 transitions. [2025-02-06 19:50:50,985 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71511 to 71511. [2025-02-06 19:50:51,040 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 71511 states, 71511 states have (on average 1.387101285116975) internal successors, (99193), 71510 states have internal predecessors, (99193), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:51,126 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71511 states to 71511 states and 99193 transitions. [2025-02-06 19:50:51,126 INFO L240 hiAutomatonCegarLoop]: Abstraction has 71511 states and 99193 transitions. [2025-02-06 19:50:51,127 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:50:51,127 INFO L432 stractBuchiCegarLoop]: Abstraction has 71511 states and 99193 transitions. [2025-02-06 19:50:51,128 INFO L338 stractBuchiCegarLoop]: ======== Iteration 29 ============ [2025-02-06 19:50:51,128 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 71511 states and 99193 transitions. [2025-02-06 19:50:51,549 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 47312 [2025-02-06 19:50:51,552 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:50:51,553 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:50:51,559 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:51,560 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:51,560 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume 1 == ~main_dbl_ev~0;~main_dbl_ev~0 := 2;" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-02-06 19:50:51,560 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "~main_clk_val_t~0 := 1;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume !(~main_clk_val~0 != ~main_clk_val_t~0);" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;main_~count~0#1 := 1 + main_~count~0#1;" "assume !(5 == main_~count~0#1);" "~main_clk_val_t~0 := 0;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume !(~main_clk_val~0 != ~main_clk_val_t~0);" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-02-06 19:50:51,561 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:51,561 INFO L85 PathProgramCache]: Analyzing trace with hash -1319069636, now seen corresponding path program 1 times [2025-02-06 19:50:51,561 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:51,561 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [173930690] [2025-02-06 19:50:51,564 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:51,565 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:51,570 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 89 statements into 1 equivalence classes. [2025-02-06 19:50:51,577 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-02-06 19:50:51,577 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:51,577 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:51,614 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:51,615 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:51,615 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [173930690] [2025-02-06 19:50:51,615 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [173930690] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:51,615 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:51,615 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-06 19:50:51,616 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1581527631] [2025-02-06 19:50:51,616 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:51,616 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:50:51,616 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:51,616 INFO L85 PathProgramCache]: Analyzing trace with hash 1183661696, now seen corresponding path program 1 times [2025-02-06 19:50:51,616 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:51,616 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [995690936] [2025-02-06 19:50:51,616 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:51,617 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:51,622 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 182 statements into 1 equivalence classes. [2025-02-06 19:50:51,624 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 182 of 182 statements. [2025-02-06 19:50:51,624 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:51,624 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:51,647 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:51,648 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:51,648 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [995690936] [2025-02-06 19:50:51,648 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [995690936] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:51,648 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:51,648 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:50:51,648 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [211206309] [2025-02-06 19:50:51,648 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:51,648 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:50:51,648 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:50:51,649 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-06 19:50:51,649 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-06 19:50:51,649 INFO L87 Difference]: Start difference. First operand 71511 states and 99193 transitions. cyclomatic complexity: 27688 Second operand has 4 states, 4 states have (on average 22.25) internal successors, (89), 4 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:52,143 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:50:52,143 INFO L93 Difference]: Finished difference Result 79711 states and 109213 transitions. [2025-02-06 19:50:52,143 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 79711 states and 109213 transitions. [2025-02-06 19:50:52,503 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 52448 [2025-02-06 19:50:52,635 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 79711 states to 54607 states and 74877 transitions. [2025-02-06 19:50:52,635 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 54607 [2025-02-06 19:50:52,668 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 54607 [2025-02-06 19:50:52,668 INFO L73 IsDeterministic]: Start isDeterministic. Operand 54607 states and 74877 transitions. [2025-02-06 19:50:52,704 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:50:52,704 INFO L218 hiAutomatonCegarLoop]: Abstraction has 54607 states and 74877 transitions. [2025-02-06 19:50:52,731 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54607 states and 74877 transitions. [2025-02-06 19:50:53,075 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54607 to 29623. [2025-02-06 19:50:53,099 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29623 states, 29623 states have (on average 1.370725449819397) internal successors, (40605), 29622 states have internal predecessors, (40605), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:53,141 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29623 states to 29623 states and 40605 transitions. [2025-02-06 19:50:53,142 INFO L240 hiAutomatonCegarLoop]: Abstraction has 29623 states and 40605 transitions. [2025-02-06 19:50:53,142 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-06 19:50:53,142 INFO L432 stractBuchiCegarLoop]: Abstraction has 29623 states and 40605 transitions. [2025-02-06 19:50:53,142 INFO L338 stractBuchiCegarLoop]: ======== Iteration 30 ============ [2025-02-06 19:50:53,142 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 29623 states and 40605 transitions. [2025-02-06 19:50:53,231 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 28320 [2025-02-06 19:50:53,231 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:50:53,231 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:50:53,234 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:53,234 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:53,234 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-02-06 19:50:53,235 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "~main_clk_val_t~0 := 1;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume !(~main_clk_val~0 != ~main_clk_val_t~0);" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;main_~count~0#1 := 1 + main_~count~0#1;" "assume !(5 == main_~count~0#1);" "~main_clk_val_t~0 := 0;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume !(~main_clk_val~0 != ~main_clk_val_t~0);" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume 0 == ~main_pres_ev~0;~main_pres_ev~0 := 1;" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume 1 == ~main_pres_ev~0;~main_pres_ev~0 := 2;" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-02-06 19:50:53,235 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:53,235 INFO L85 PathProgramCache]: Analyzing trace with hash 1178946301, now seen corresponding path program 5 times [2025-02-06 19:50:53,235 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:53,235 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1954506290] [2025-02-06 19:50:53,235 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-06 19:50:53,235 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:53,240 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 89 statements into 1 equivalence classes. [2025-02-06 19:50:53,243 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-02-06 19:50:53,243 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:50:53,243 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:50:53,243 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:50:53,245 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 89 statements into 1 equivalence classes. [2025-02-06 19:50:53,247 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-02-06 19:50:53,247 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:53,247 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:50:53,256 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:50:53,257 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:53,257 INFO L85 PathProgramCache]: Analyzing trace with hash 1183661696, now seen corresponding path program 2 times [2025-02-06 19:50:53,257 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:53,257 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [422748386] [2025-02-06 19:50:53,257 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:50:53,257 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:53,264 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 182 statements into 1 equivalence classes. [2025-02-06 19:50:53,266 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 182 of 182 statements. [2025-02-06 19:50:53,266 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:50:53,267 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:53,294 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:53,294 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:53,294 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [422748386] [2025-02-06 19:50:53,294 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [422748386] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:53,295 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:53,295 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:50:53,295 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [316509263] [2025-02-06 19:50:53,295 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:53,295 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:50:53,295 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:50:53,295 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:50:53,295 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:50:53,296 INFO L87 Difference]: Start difference. First operand 29623 states and 40605 transitions. cyclomatic complexity: 10984 Second operand has 3 states, 3 states have (on average 60.666666666666664) internal successors, (182), 3 states have internal predecessors, (182), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:53,647 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:50:53,647 INFO L93 Difference]: Finished difference Result 59199 states and 80237 transitions. [2025-02-06 19:50:53,647 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 59199 states and 80237 transitions. [2025-02-06 19:50:54,067 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 56640 [2025-02-06 19:50:54,156 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 59199 states to 59199 states and 80237 transitions. [2025-02-06 19:50:54,157 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 59199 [2025-02-06 19:50:54,177 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 59199 [2025-02-06 19:50:54,178 INFO L73 IsDeterministic]: Start isDeterministic. Operand 59199 states and 80237 transitions. [2025-02-06 19:50:54,202 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:50:54,202 INFO L218 hiAutomatonCegarLoop]: Abstraction has 59199 states and 80237 transitions. [2025-02-06 19:50:54,225 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59199 states and 80237 transitions. [2025-02-06 19:50:54,670 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59199 to 59199. [2025-02-06 19:50:54,707 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 59199 states, 59199 states have (on average 1.3553776246220375) internal successors, (80237), 59198 states have internal predecessors, (80237), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:54,797 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59199 states to 59199 states and 80237 transitions. [2025-02-06 19:50:54,798 INFO L240 hiAutomatonCegarLoop]: Abstraction has 59199 states and 80237 transitions. [2025-02-06 19:50:54,798 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:50:54,798 INFO L432 stractBuchiCegarLoop]: Abstraction has 59199 states and 80237 transitions. [2025-02-06 19:50:54,798 INFO L338 stractBuchiCegarLoop]: ======== Iteration 31 ============ [2025-02-06 19:50:54,798 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 59199 states and 80237 transitions. [2025-02-06 19:50:54,987 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 56640 [2025-02-06 19:50:54,987 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:50:54,987 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:50:54,993 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:54,993 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:54,993 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-02-06 19:50:54,993 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "~main_clk_val_t~0 := 1;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume !(~main_clk_val~0 != ~main_clk_val_t~0);" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;main_~count~0#1 := 1 + main_~count~0#1;" "assume !(5 == main_~count~0#1);" "~main_clk_val_t~0 := 0;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume !(~main_clk_val~0 != ~main_clk_val_t~0);" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume 0 == ~main_zero_ev~0;~main_zero_ev~0 := 1;" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume 1 == ~main_zero_ev~0;~main_zero_ev~0 := 2;" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-02-06 19:50:54,994 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:54,994 INFO L85 PathProgramCache]: Analyzing trace with hash 1178946301, now seen corresponding path program 6 times [2025-02-06 19:50:54,994 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:54,994 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [457068835] [2025-02-06 19:50:54,994 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-06 19:50:54,994 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:55,001 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 89 statements into 1 equivalence classes. [2025-02-06 19:50:55,003 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-02-06 19:50:55,003 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-02-06 19:50:55,003 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:50:55,004 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:50:55,006 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 89 statements into 1 equivalence classes. [2025-02-06 19:50:55,008 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-02-06 19:50:55,008 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:55,008 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:50:55,017 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:50:55,018 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:55,018 INFO L85 PathProgramCache]: Analyzing trace with hash 1322455679, now seen corresponding path program 1 times [2025-02-06 19:50:55,018 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:55,018 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [205398867] [2025-02-06 19:50:55,018 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:55,018 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:55,025 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 182 statements into 1 equivalence classes. [2025-02-06 19:50:55,028 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 182 of 182 statements. [2025-02-06 19:50:55,028 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:55,028 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:55,053 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:55,054 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:55,054 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [205398867] [2025-02-06 19:50:55,054 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [205398867] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:55,054 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:55,054 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:50:55,054 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1366996893] [2025-02-06 19:50:55,054 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:55,055 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:50:55,055 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:50:55,055 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:50:55,055 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:50:55,055 INFO L87 Difference]: Start difference. First operand 59199 states and 80237 transitions. cyclomatic complexity: 21040 Second operand has 3 states, 3 states have (on average 60.666666666666664) internal successors, (182), 3 states have internal predecessors, (182), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:55,400 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:50:55,400 INFO L93 Difference]: Finished difference Result 118207 states and 158749 transitions. [2025-02-06 19:50:55,400 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 118207 states and 158749 transitions. [2025-02-06 19:50:56,050 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 113280 [2025-02-06 19:50:56,292 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 118207 states to 118207 states and 158749 transitions. [2025-02-06 19:50:56,292 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 118207 [2025-02-06 19:50:56,387 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 118207 [2025-02-06 19:50:56,388 INFO L73 IsDeterministic]: Start isDeterministic. Operand 118207 states and 158749 transitions. [2025-02-06 19:50:56,459 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:50:56,460 INFO L218 hiAutomatonCegarLoop]: Abstraction has 118207 states and 158749 transitions. [2025-02-06 19:50:56,534 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118207 states and 158749 transitions. [2025-02-06 19:50:57,496 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118207 to 118207. [2025-02-06 19:50:57,575 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 118207 states, 118207 states have (on average 1.342974612332603) internal successors, (158749), 118206 states have internal predecessors, (158749), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:57,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118207 states to 118207 states and 158749 transitions. [2025-02-06 19:50:57,747 INFO L240 hiAutomatonCegarLoop]: Abstraction has 118207 states and 158749 transitions. [2025-02-06 19:50:57,747 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:50:57,747 INFO L432 stractBuchiCegarLoop]: Abstraction has 118207 states and 158749 transitions. [2025-02-06 19:50:57,747 INFO L338 stractBuchiCegarLoop]: ======== Iteration 32 ============ [2025-02-06 19:50:57,748 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 118207 states and 158749 transitions. [2025-02-06 19:50:58,089 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 113280 [2025-02-06 19:50:58,089 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:50:58,089 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:50:58,101 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:58,101 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:50:58,102 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-02-06 19:50:58,102 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "~main_clk_val_t~0 := 1;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume !(~main_clk_val~0 != ~main_clk_val_t~0);" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;main_~count~0#1 := 1 + main_~count~0#1;" "assume !(5 == main_~count~0#1);" "~main_clk_val_t~0 := 0;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume !(~main_clk_val~0 != ~main_clk_val_t~0);" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-02-06 19:50:58,102 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:58,102 INFO L85 PathProgramCache]: Analyzing trace with hash 1178946301, now seen corresponding path program 7 times [2025-02-06 19:50:58,102 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:58,102 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [627023171] [2025-02-06 19:50:58,102 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-02-06 19:50:58,103 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:58,107 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 89 statements into 1 equivalence classes. [2025-02-06 19:50:58,110 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-02-06 19:50:58,110 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:58,110 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:50:58,110 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:50:58,112 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 89 statements into 1 equivalence classes. [2025-02-06 19:50:58,113 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-02-06 19:50:58,113 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:58,113 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:50:58,122 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:50:58,122 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:50:58,122 INFO L85 PathProgramCache]: Analyzing trace with hash 1578078847, now seen corresponding path program 1 times [2025-02-06 19:50:58,123 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:50:58,123 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [63025164] [2025-02-06 19:50:58,123 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:50:58,123 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:50:58,129 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 182 statements into 1 equivalence classes. [2025-02-06 19:50:58,131 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 182 of 182 statements. [2025-02-06 19:50:58,131 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:50:58,131 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:50:58,153 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:50:58,153 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:50:58,153 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [63025164] [2025-02-06 19:50:58,153 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [63025164] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:50:58,153 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:50:58,153 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:50:58,154 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [425118446] [2025-02-06 19:50:58,154 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:50:58,154 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:50:58,154 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:50:58,155 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:50:58,155 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:50:58,155 INFO L87 Difference]: Start difference. First operand 118207 states and 158749 transitions. cyclomatic complexity: 40544 Second operand has 3 states, 3 states have (on average 60.666666666666664) internal successors, (182), 3 states have internal predecessors, (182), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:50:59,033 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:50:59,033 INFO L93 Difference]: Finished difference Result 209343 states and 282429 transitions. [2025-02-06 19:50:59,033 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 209343 states and 282429 transitions. [2025-02-06 19:51:00,346 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 204416 [2025-02-06 19:51:00,735 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 209343 states to 209343 states and 282429 transitions. [2025-02-06 19:51:00,735 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 209343 [2025-02-06 19:51:00,862 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 209343 [2025-02-06 19:51:00,862 INFO L73 IsDeterministic]: Start isDeterministic. Operand 209343 states and 282429 transitions. [2025-02-06 19:51:00,948 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:51:00,948 INFO L218 hiAutomatonCegarLoop]: Abstraction has 209343 states and 282429 transitions. [2025-02-06 19:51:01,088 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 209343 states and 282429 transitions. [2025-02-06 19:51:02,459 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 209343 to 209343. [2025-02-06 19:51:02,623 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 209343 states, 209343 states have (on average 1.3491208208538141) internal successors, (282429), 209342 states have internal predecessors, (282429), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:51:03,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 209343 states to 209343 states and 282429 transitions. [2025-02-06 19:51:03,320 INFO L240 hiAutomatonCegarLoop]: Abstraction has 209343 states and 282429 transitions. [2025-02-06 19:51:03,320 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:51:03,320 INFO L432 stractBuchiCegarLoop]: Abstraction has 209343 states and 282429 transitions. [2025-02-06 19:51:03,320 INFO L338 stractBuchiCegarLoop]: ======== Iteration 33 ============ [2025-02-06 19:51:03,320 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 209343 states and 282429 transitions. [2025-02-06 19:51:03,975 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 204416 [2025-02-06 19:51:03,975 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:51:03,975 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:51:03,991 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:51:03,991 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:51:03,992 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-02-06 19:51:03,992 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "~main_clk_val_t~0 := 1;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume !(~main_clk_val~0 != ~main_clk_val_t~0);" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;main_~count~0#1 := 1 + main_~count~0#1;" "assume !(5 == main_~count~0#1);" "~main_clk_val_t~0 := 0;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume !(~main_clk_val~0 != ~main_clk_val_t~0);" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-02-06 19:51:03,992 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:51:03,992 INFO L85 PathProgramCache]: Analyzing trace with hash 1178946301, now seen corresponding path program 8 times [2025-02-06 19:51:03,992 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:51:03,993 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1406213371] [2025-02-06 19:51:03,993 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:51:03,993 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:51:03,998 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 89 statements into 1 equivalence classes. [2025-02-06 19:51:04,000 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-02-06 19:51:04,000 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:51:04,000 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:51:04,000 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:51:04,001 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 89 statements into 1 equivalence classes. [2025-02-06 19:51:04,003 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-02-06 19:51:04,003 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:51:04,003 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:51:04,012 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:51:04,012 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:51:04,012 INFO L85 PathProgramCache]: Analyzing trace with hash 1701820031, now seen corresponding path program 1 times [2025-02-06 19:51:04,013 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:51:04,013 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1266776156] [2025-02-06 19:51:04,013 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:51:04,013 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:51:04,019 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 182 statements into 1 equivalence classes. [2025-02-06 19:51:04,021 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 182 of 182 statements. [2025-02-06 19:51:04,021 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:51:04,021 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:51:04,114 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:51:04,117 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:51:04,117 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1266776156] [2025-02-06 19:51:04,117 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1266776156] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:51:04,118 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:51:04,118 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-06 19:51:04,118 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [781625323] [2025-02-06 19:51:04,118 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:51:04,118 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:51:04,118 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:51:04,118 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-06 19:51:04,118 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-02-06 19:51:04,118 INFO L87 Difference]: Start difference. First operand 209343 states and 282429 transitions. cyclomatic complexity: 73088 Second operand has 5 states, 5 states have (on average 36.4) internal successors, (182), 5 states have internal predecessors, (182), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:51:04,981 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:51:04,982 INFO L93 Difference]: Finished difference Result 216511 states and 293485 transitions. [2025-02-06 19:51:04,982 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 216511 states and 293485 transitions. [2025-02-06 19:51:05,831 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 211584 [2025-02-06 19:51:06,678 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 216511 states to 216511 states and 293485 transitions. [2025-02-06 19:51:06,678 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 216511 [2025-02-06 19:51:06,772 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 216511 [2025-02-06 19:51:06,773 INFO L73 IsDeterministic]: Start isDeterministic. Operand 216511 states and 293485 transitions. [2025-02-06 19:51:06,861 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:51:06,861 INFO L218 hiAutomatonCegarLoop]: Abstraction has 216511 states and 293485 transitions. [2025-02-06 19:51:06,954 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216511 states and 293485 transitions. [2025-02-06 19:51:08,105 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216511 to 195487. [2025-02-06 19:51:08,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 195487 states, 195487 states have (on average 1.3523405648457443) internal successors, (264365), 195486 states have internal predecessors, (264365), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:51:08,895 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195487 states to 195487 states and 264365 transitions. [2025-02-06 19:51:08,895 INFO L240 hiAutomatonCegarLoop]: Abstraction has 195487 states and 264365 transitions. [2025-02-06 19:51:08,896 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-06 19:51:08,896 INFO L432 stractBuchiCegarLoop]: Abstraction has 195487 states and 264365 transitions. [2025-02-06 19:51:08,896 INFO L338 stractBuchiCegarLoop]: ======== Iteration 34 ============ [2025-02-06 19:51:08,896 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 195487 states and 264365 transitions. [2025-02-06 19:51:09,542 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 190560 [2025-02-06 19:51:09,542 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:51:09,542 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:51:09,557 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:51:09,558 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:51:09,558 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-02-06 19:51:09,558 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "~main_clk_val_t~0 := 1;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume !(~main_clk_val~0 != ~main_clk_val_t~0);" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;main_~count~0#1 := 1 + main_~count~0#1;" "assume !(5 == main_~count~0#1);" "~main_clk_val_t~0 := 0;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume ~main_clk_val~0 != ~main_clk_val_t~0;~main_clk_val~0 := ~main_clk_val_t~0;~main_clk_ev~0 := 0;" "assume !(1 == ~main_clk_val~0);~main_clk_neg_edge~0 := 0;~main_clk_pos_edge~0 := 2;" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume 0 == ~main_clk_ev~0;~main_clk_ev~0 := 1;" "assume !(0 == ~main_clk_pos_edge~0);" "assume 0 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 1;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume 1 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 2;" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-02-06 19:51:09,559 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:51:09,559 INFO L85 PathProgramCache]: Analyzing trace with hash 1178946301, now seen corresponding path program 9 times [2025-02-06 19:51:09,559 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:51:09,559 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [797459795] [2025-02-06 19:51:09,559 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:51:09,559 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:51:09,565 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 89 statements into 1 equivalence classes. [2025-02-06 19:51:09,567 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-02-06 19:51:09,567 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-06 19:51:09,567 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:51:09,567 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:51:09,569 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 89 statements into 1 equivalence classes. [2025-02-06 19:51:09,571 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-02-06 19:51:09,571 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:51:09,571 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:51:09,580 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:51:09,581 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:51:09,581 INFO L85 PathProgramCache]: Analyzing trace with hash 1917271841, now seen corresponding path program 1 times [2025-02-06 19:51:09,581 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:51:09,581 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1892688218] [2025-02-06 19:51:09,581 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:51:09,581 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:51:09,588 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 183 statements into 1 equivalence classes. [2025-02-06 19:51:09,590 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 183 of 183 statements. [2025-02-06 19:51:09,591 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:51:09,591 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:51:09,610 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:51:09,610 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:51:09,610 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1892688218] [2025-02-06 19:51:09,610 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1892688218] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:51:09,610 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:51:09,610 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:51:09,610 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [355179413] [2025-02-06 19:51:09,610 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:51:09,611 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:51:09,611 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:51:09,611 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:51:09,611 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:51:09,611 INFO L87 Difference]: Start difference. First operand 195487 states and 264365 transitions. cyclomatic complexity: 68880 Second operand has 3 states, 3 states have (on average 61.0) internal successors, (183), 3 states have internal predecessors, (183), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:51:10,306 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:51:10,307 INFO L93 Difference]: Finished difference Result 117247 states and 156589 transitions. [2025-02-06 19:51:10,307 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 117247 states and 156589 transitions. [2025-02-06 19:51:10,702 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 112320 [2025-02-06 19:51:10,908 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 117247 states to 117247 states and 156589 transitions. [2025-02-06 19:51:10,908 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 117247 [2025-02-06 19:51:10,962 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 117247 [2025-02-06 19:51:10,963 INFO L73 IsDeterministic]: Start isDeterministic. Operand 117247 states and 156589 transitions. [2025-02-06 19:51:11,012 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:51:11,013 INFO L218 hiAutomatonCegarLoop]: Abstraction has 117247 states and 156589 transitions. [2025-02-06 19:51:11,062 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117247 states and 156589 transitions. [2025-02-06 19:51:11,914 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117247 to 117247. [2025-02-06 19:51:12,007 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 117247 states, 117247 states have (on average 1.3355480310796866) internal successors, (156589), 117246 states have internal predecessors, (156589), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:51:12,154 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117247 states to 117247 states and 156589 transitions. [2025-02-06 19:51:12,154 INFO L240 hiAutomatonCegarLoop]: Abstraction has 117247 states and 156589 transitions. [2025-02-06 19:51:12,155 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:51:12,155 INFO L432 stractBuchiCegarLoop]: Abstraction has 117247 states and 156589 transitions. [2025-02-06 19:51:12,155 INFO L338 stractBuchiCegarLoop]: ======== Iteration 35 ============ [2025-02-06 19:51:12,155 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 117247 states and 156589 transitions. [2025-02-06 19:51:12,477 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 112320 [2025-02-06 19:51:12,477 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:51:12,477 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:51:12,485 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:51:12,485 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:51:12,485 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-02-06 19:51:12,486 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "~main_clk_val_t~0 := 1;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume !(~main_clk_val~0 != ~main_clk_val_t~0);" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;main_~count~0#1 := 1 + main_~count~0#1;" "assume !(5 == main_~count~0#1);" "~main_clk_val_t~0 := 0;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume ~main_clk_val~0 != ~main_clk_val_t~0;~main_clk_val~0 := ~main_clk_val_t~0;~main_clk_ev~0 := 0;" "assume !(1 == ~main_clk_val~0);~main_clk_neg_edge~0 := 0;~main_clk_pos_edge~0 := 2;" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume 0 == ~main_clk_ev~0;~main_clk_ev~0 := 1;" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-02-06 19:51:12,486 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:51:12,486 INFO L85 PathProgramCache]: Analyzing trace with hash 1178946301, now seen corresponding path program 10 times [2025-02-06 19:51:12,486 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:51:12,486 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2067087933] [2025-02-06 19:51:12,486 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 19:51:12,486 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:51:12,490 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 89 statements into 2 equivalence classes. [2025-02-06 19:51:12,494 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 89 of 89 statements. [2025-02-06 19:51:12,494 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-06 19:51:12,494 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:51:12,494 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:51:12,496 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 89 statements into 1 equivalence classes. [2025-02-06 19:51:12,497 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-02-06 19:51:12,497 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:51:12,497 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:51:12,504 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:51:12,505 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:51:12,505 INFO L85 PathProgramCache]: Analyzing trace with hash 404500963, now seen corresponding path program 1 times [2025-02-06 19:51:12,505 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:51:12,505 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1408736250] [2025-02-06 19:51:12,505 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:51:12,505 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:51:12,510 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 183 statements into 1 equivalence classes. [2025-02-06 19:51:12,511 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 183 of 183 statements. [2025-02-06 19:51:12,511 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:51:12,511 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:51:12,527 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:51:12,527 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:51:12,527 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1408736250] [2025-02-06 19:51:12,527 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1408736250] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:51:12,527 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:51:12,527 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:51:12,527 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [702603929] [2025-02-06 19:51:12,527 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:51:12,528 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:51:12,528 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:51:12,528 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:51:12,528 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:51:12,528 INFO L87 Difference]: Start difference. First operand 117247 states and 156589 transitions. cyclomatic complexity: 39344 Second operand has 3 states, 3 states have (on average 61.0) internal successors, (183), 3 states have internal predecessors, (183), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:51:13,125 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:51:13,126 INFO L93 Difference]: Finished difference Result 111679 states and 149325 transitions. [2025-02-06 19:51:13,126 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 111679 states and 149325 transitions. [2025-02-06 19:51:13,584 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 106752 [2025-02-06 19:51:13,817 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 111679 states to 111679 states and 149325 transitions. [2025-02-06 19:51:13,818 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 111679 [2025-02-06 19:51:13,885 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 111679 [2025-02-06 19:51:13,886 INFO L73 IsDeterministic]: Start isDeterministic. Operand 111679 states and 149325 transitions. [2025-02-06 19:51:13,945 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:51:13,945 INFO L218 hiAutomatonCegarLoop]: Abstraction has 111679 states and 149325 transitions. [2025-02-06 19:51:14,055 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111679 states and 149325 transitions. [2025-02-06 19:51:15,136 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111679 to 111679. [2025-02-06 19:51:15,230 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 111679 states, 111679 states have (on average 1.3370911272486323) internal successors, (149325), 111678 states have internal predecessors, (149325), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:51:15,416 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111679 states to 111679 states and 149325 transitions. [2025-02-06 19:51:15,416 INFO L240 hiAutomatonCegarLoop]: Abstraction has 111679 states and 149325 transitions. [2025-02-06 19:51:15,416 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:51:15,417 INFO L432 stractBuchiCegarLoop]: Abstraction has 111679 states and 149325 transitions. [2025-02-06 19:51:15,417 INFO L338 stractBuchiCegarLoop]: ======== Iteration 36 ============ [2025-02-06 19:51:15,417 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 111679 states and 149325 transitions. [2025-02-06 19:51:15,793 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 106752 [2025-02-06 19:51:15,793 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:51:15,793 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:51:15,803 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:51:15,803 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:51:15,803 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(17, 2);call #Ultimate.allocInit(12, 3);~main_in1_val~0 := 0;~main_in1_val_t~0 := 0;~main_in1_ev~0 := 0;~main_in1_req_up~0 := 0;~main_in2_val~0 := 0;~main_in2_val_t~0 := 0;~main_in2_ev~0 := 0;~main_in2_req_up~0 := 0;~main_diff_val~0 := 0;~main_diff_val_t~0 := 0;~main_diff_ev~0 := 0;~main_diff_req_up~0 := 0;~main_sum_val~0 := 0;~main_sum_val_t~0 := 0;~main_sum_ev~0 := 0;~main_sum_req_up~0 := 0;~main_pres_val~0 := 0;~main_pres_val_t~0 := 0;~main_pres_ev~0 := 0;~main_pres_req_up~0 := 0;~main_dbl_val~0 := 0;~main_dbl_val_t~0 := 0;~main_dbl_ev~0 := 0;~main_dbl_req_up~0 := 0;~main_zero_val~0 := 0;~main_zero_val_t~0 := 0;~main_zero_ev~0 := 0;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_val_t~0 := 0;~main_clk_ev~0 := 0;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 0;~main_clk_neg_edge~0 := 0;~N_generate_st~0 := 0;~N_generate_i~0 := 0;~S1_addsub_st~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_st~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_st~0 := 0;~S3_zero_i~0 := 0;~D_z~0 := 0;~D_print_st~0 := 0;~D_print_i~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~count~0#1, main_~__retres2~0#1;havoc main_~count~0#1;havoc main_~__retres2~0#1;~main_in1_ev~0 := 2;~main_in1_req_up~0 := 0;~main_in2_ev~0 := 2;~main_in2_req_up~0 := 0;~main_diff_ev~0 := 2;~main_diff_req_up~0 := 0;~main_sum_ev~0 := 2;~main_sum_req_up~0 := 0;~main_pres_ev~0 := 2;~main_pres_req_up~0 := 0;~main_dbl_ev~0 := 2;~main_dbl_req_up~0 := 0;~main_zero_ev~0 := 2;~main_zero_req_up~0 := 0;~main_clk_val~0 := 0;~main_clk_ev~0 := 2;~main_clk_req_up~0 := 0;~main_clk_pos_edge~0 := 2;~main_clk_neg_edge~0 := 2;main_~count~0#1 := 0;~N_generate_i~0 := 0;~S1_addsub_i~0 := 0;~S2_presdbl_i~0 := 0;~S3_zero_i~0 := 0;~D_print_i~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-02-06 19:51:15,803 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "~main_clk_val_t~0 := 1;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume !(~main_clk_val~0 != ~main_clk_val_t~0);" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;main_~count~0#1 := 1 + main_~count~0#1;" "assume !(5 == main_~count~0#1);" "~main_clk_val_t~0 := 0;~main_clk_req_up~0 := 1;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume 1 == ~main_clk_req_up~0;" "assume ~main_clk_val~0 != ~main_clk_val_t~0;~main_clk_val~0 := ~main_clk_val_t~0;~main_clk_ev~0 := 0;" "assume !(1 == ~main_clk_val~0);~main_clk_neg_edge~0 := 0;~main_clk_pos_edge~0 := 2;" "~main_clk_req_up~0 := 0;" "assume !(1 == ~N_generate_i~0);~N_generate_st~0 := 2;" "assume !(1 == ~S1_addsub_i~0);~S1_addsub_st~0 := 2;" "assume !(1 == ~S2_presdbl_i~0);~S2_presdbl_st~0 := 2;" "assume !(1 == ~S3_zero_i~0);~S3_zero_st~0 := 2;" "assume !(1 == ~D_print_i~0);~D_print_st~0 := 2;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume 0 == ~main_clk_ev~0;~main_clk_ev~0 := 1;" "assume !(0 == ~main_clk_pos_edge~0);" "assume 0 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 1;" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume 1 == ~main_clk_ev~0;~main_clk_ev~0 := 2;" "assume !(1 == ~main_clk_pos_edge~0);" "assume 1 == ~main_clk_neg_edge~0;~main_clk_neg_edge~0 := 2;" "assume true;" "start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" "assume true;" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2;" "assume !(1 == ~main_in1_req_up~0);" "assume !(1 == ~main_in2_req_up~0);" "assume !(1 == ~main_sum_req_up~0);" "assume !(1 == ~main_diff_req_up~0);" "assume !(1 == ~main_pres_req_up~0);" "assume !(1 == ~main_dbl_req_up~0);" "assume !(1 == ~main_zero_req_up~0);" "assume !(1 == ~main_clk_req_up~0);" "start_simulation_~kernel_st~0#1 := 3;" "assume !(0 == ~main_in1_ev~0);" "assume !(0 == ~main_in2_ev~0);" "assume !(0 == ~main_sum_ev~0);" "assume !(0 == ~main_diff_ev~0);" "assume !(0 == ~main_pres_ev~0);" "assume !(0 == ~main_dbl_ev~0);" "assume !(0 == ~main_zero_ev~0);" "assume !(0 == ~main_clk_ev~0);" "assume !(0 == ~main_clk_pos_edge~0);" "assume !(0 == ~main_clk_neg_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_in1_ev~0);" "assume !(1 == ~main_in2_ev~0);" "assume !(1 == ~main_sum_ev~0);" "assume !(1 == ~main_diff_ev~0);" "assume !(1 == ~main_pres_ev~0);" "assume !(1 == ~main_dbl_ev~0);" "assume !(1 == ~main_zero_ev~0);" "assume !(1 == ~main_clk_ev~0);" "assume !(1 == ~main_clk_pos_edge~0);" "assume !(1 == ~main_clk_neg_edge~0);" "assume !(0 == ~N_generate_st~0);" "assume !(0 == ~S1_addsub_st~0);" "assume !(0 == ~S2_presdbl_st~0);" "assume !(0 == ~S3_zero_st~0);" "assume !(0 == ~D_print_st~0);" "havoc start_simulation_~kernel_st~0#1;assume { :end_inline_start_simulation } true;" [2025-02-06 19:51:15,804 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:51:15,804 INFO L85 PathProgramCache]: Analyzing trace with hash 1178946301, now seen corresponding path program 11 times [2025-02-06 19:51:15,804 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:51:15,804 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [79082721] [2025-02-06 19:51:15,804 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-06 19:51:15,804 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:51:15,809 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 89 statements into 1 equivalence classes. [2025-02-06 19:51:15,811 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-02-06 19:51:15,811 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:51:15,811 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:51:15,811 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:51:15,813 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 89 statements into 1 equivalence classes. [2025-02-06 19:51:15,815 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-02-06 19:51:15,815 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:51:15,815 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:51:15,823 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:51:15,823 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:51:15,824 INFO L85 PathProgramCache]: Analyzing trace with hash -659352637, now seen corresponding path program 1 times [2025-02-06 19:51:15,824 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:51:15,824 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1353585797] [2025-02-06 19:51:15,824 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:51:15,824 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:51:15,830 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 183 statements into 1 equivalence classes. [2025-02-06 19:51:15,833 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 183 of 183 statements. [2025-02-06 19:51:15,833 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:51:15,833 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:51:15,833 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:51:15,835 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 183 statements into 1 equivalence classes. [2025-02-06 19:51:15,838 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 183 of 183 statements. [2025-02-06 19:51:15,838 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:51:15,838 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:51:15,852 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:51:15,853 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:51:15,853 INFO L85 PathProgramCache]: Analyzing trace with hash -1558192825, now seen corresponding path program 1 times [2025-02-06 19:51:15,853 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:51:15,853 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1330930352] [2025-02-06 19:51:15,853 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:51:15,853 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:51:15,862 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 272 statements into 1 equivalence classes. [2025-02-06 19:51:15,865 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 272 of 272 statements. [2025-02-06 19:51:15,865 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:51:15,865 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:51:16,303 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:51:16,303 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:51:16,303 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1330930352] [2025-02-06 19:51:16,303 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1330930352] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:51:16,303 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:51:16,303 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-06 19:51:16,303 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1933648020] [2025-02-06 19:51:16,304 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:51:16,962 INFO L204 LassoAnalysis]: Preferences: [2025-02-06 19:51:16,962 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-02-06 19:51:16,962 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-02-06 19:51:16,962 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-02-06 19:51:16,962 INFO L128 ssoRankerPreferences]: Use exernal solver: true [2025-02-06 19:51:16,962 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:51:16,963 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-02-06 19:51:16,963 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-02-06 19:51:16,963 INFO L132 ssoRankerPreferences]: Filename of dumped script: pipeline.cil-1.c_Iteration36_Loop [2025-02-06 19:51:16,963 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-02-06 19:51:16,963 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-02-06 19:51:16,964 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:16,967 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:16,969 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:16,971 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:16,973 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:16,975 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:16,979 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:16,981 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:16,983 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:16,985 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:16,989 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:16,994 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:16,997 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,001 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,005 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,007 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,010 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,012 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,013 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,015 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,021 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,023 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,027 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,029 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,031 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,034 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,035 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,039 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,042 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,045 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,048 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,050 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,052 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,055 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,057 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,058 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,061 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,062 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,064 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,066 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,067 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,069 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,436 INFO L259 LassoAnalysis]: Preprocessing complete. [2025-02-06 19:51:17,436 INFO L365 LassoAnalysis]: Checking for nontermination... [2025-02-06 19:51:17,436 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:51:17,436 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:51:17,440 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:51:17,441 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Waiting until timeout for monitored process [2025-02-06 19:51:17,443 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-02-06 19:51:17,443 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-02-06 19:51:17,454 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2025-02-06 19:51:17,454 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_eval_#t~nondet4#1=0} Honda state: {ULTIMATE.start_eval_#t~nondet4#1=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2025-02-06 19:51:17,460 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (10)] Ended with exit code 0 [2025-02-06 19:51:17,460 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:51:17,460 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:51:17,465 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:51:17,468 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Waiting until timeout for monitored process [2025-02-06 19:51:17,469 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-02-06 19:51:17,469 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-02-06 19:51:17,480 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2025-02-06 19:51:17,480 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {~main_clk_val_t~0=0} Honda state: {~main_clk_val_t~0=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2025-02-06 19:51:17,485 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (11)] Ended with exit code 0 [2025-02-06 19:51:17,485 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:51:17,486 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:51:17,487 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:51:17,488 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Waiting until timeout for monitored process [2025-02-06 19:51:17,489 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-02-06 19:51:17,489 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-02-06 19:51:17,506 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2025-02-06 19:51:17,506 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {~D_print_i~0=4} Honda state: {~D_print_i~0=4} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2025-02-06 19:51:17,512 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (12)] Ended with exit code 0 [2025-02-06 19:51:17,513 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:51:17,513 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:51:17,515 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:51:17,516 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Waiting until timeout for monitored process [2025-02-06 19:51:17,517 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-02-06 19:51:17,517 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-02-06 19:51:17,536 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2025-02-06 19:51:17,536 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {~main_zero_req_up~0=4} Honda state: {~main_zero_req_up~0=4} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2025-02-06 19:51:17,542 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (13)] Forceful destruction successful, exit code 0 [2025-02-06 19:51:17,543 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:51:17,543 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:51:17,544 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:51:17,546 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Waiting until timeout for monitored process [2025-02-06 19:51:17,547 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-02-06 19:51:17,547 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-02-06 19:51:17,564 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2025-02-06 19:51:17,565 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {~S1_addsub_i~0=4} Honda state: {~S1_addsub_i~0=4} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2025-02-06 19:51:17,570 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (14)] Ended with exit code 0 [2025-02-06 19:51:17,570 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:51:17,570 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:51:17,572 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:51:17,573 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Waiting until timeout for monitored process [2025-02-06 19:51:17,574 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-02-06 19:51:17,574 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-02-06 19:51:17,591 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2025-02-06 19:51:17,591 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {~main_clk_neg_edge~0=2} Honda state: {~main_clk_neg_edge~0=2} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2025-02-06 19:51:17,597 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (15)] Ended with exit code 0 [2025-02-06 19:51:17,598 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:51:17,598 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:51:17,599 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:51:17,600 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Waiting until timeout for monitored process [2025-02-06 19:51:17,601 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-02-06 19:51:17,601 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-02-06 19:51:17,618 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2025-02-06 19:51:17,618 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {~main_diff_req_up~0=4} Honda state: {~main_diff_req_up~0=4} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2025-02-06 19:51:17,624 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (16)] Ended with exit code 0 [2025-02-06 19:51:17,624 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:51:17,624 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:51:17,626 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:51:17,627 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Waiting until timeout for monitored process [2025-02-06 19:51:17,628 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-02-06 19:51:17,628 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-02-06 19:51:17,639 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2025-02-06 19:51:17,639 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {~N_generate_st~0=2} Honda state: {~N_generate_st~0=2} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2025-02-06 19:51:17,645 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (17)] Ended with exit code 0 [2025-02-06 19:51:17,645 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:51:17,645 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:51:17,646 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:51:17,648 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Waiting until timeout for monitored process [2025-02-06 19:51:17,649 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-02-06 19:51:17,649 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-02-06 19:51:17,660 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2025-02-06 19:51:17,660 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {~main_clk_req_up~0=0} Honda state: {~main_clk_req_up~0=0} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2025-02-06 19:51:17,665 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (18)] Forceful destruction successful, exit code 0 [2025-02-06 19:51:17,667 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:51:17,667 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:51:17,670 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:51:17,672 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Waiting until timeout for monitored process [2025-02-06 19:51:17,672 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-02-06 19:51:17,672 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-02-06 19:51:17,689 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (19)] Forceful destruction successful, exit code 0 [2025-02-06 19:51:17,689 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:51:17,689 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:51:17,691 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:51:17,693 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Waiting until timeout for monitored process [2025-02-06 19:51:17,693 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2025-02-06 19:51:17,693 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-02-06 19:51:17,726 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2025-02-06 19:51:17,726 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {ULTIMATE.start_main_~count~0#1=5} Honda state: {ULTIMATE.start_main_~count~0#1=5} Generalized eigenvectors: [{ULTIMATE.start_main_~count~0#1=0}, {ULTIMATE.start_main_~count~0#1=1}, {ULTIMATE.start_main_~count~0#1=0}] Lambdas: [12, 1, 9] Nus: [0, 1] [2025-02-06 19:51:17,732 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (20)] Forceful destruction successful, exit code 0 [2025-02-06 19:51:17,733 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:51:17,733 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:51:17,735 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:51:17,736 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Waiting until timeout for monitored process [2025-02-06 19:51:17,736 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-02-06 19:51:17,737 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-02-06 19:51:17,754 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2025-02-06 19:51:17,755 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {~main_clk_pos_edge~0=2} Honda state: {~main_clk_pos_edge~0=2} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2025-02-06 19:51:17,761 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (21)] Ended with exit code 0 [2025-02-06 19:51:17,761 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:51:17,761 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:51:17,763 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:51:17,764 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Waiting until timeout for monitored process [2025-02-06 19:51:17,765 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-02-06 19:51:17,765 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-02-06 19:51:17,783 INFO L398 LassoAnalysis]: Proved nontermination for one component. [2025-02-06 19:51:17,783 INFO L401 LassoAnalysis]: Non-Termination argument consisting of: Initial state: {~main_pres_ev~0=-1} Honda state: {~main_pres_ev~0=-1} Generalized eigenvectors: [] Lambdas: [] Nus: [] [2025-02-06 19:51:17,789 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (22)] Ended with exit code 0 [2025-02-06 19:51:17,789 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:51:17,789 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:51:17,791 INFO L229 MonitoredProcess]: Starting monitored process 23 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:51:17,792 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Waiting until timeout for monitored process [2025-02-06 19:51:17,793 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-02-06 19:51:17,793 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-02-06 19:51:17,809 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (23)] Forceful destruction successful, exit code 0 [2025-02-06 19:51:17,809 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:51:17,809 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:51:17,814 INFO L229 MonitoredProcess]: Starting monitored process 24 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:51:17,815 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Waiting until timeout for monitored process [2025-02-06 19:51:17,815 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2025-02-06 19:51:17,815 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-02-06 19:51:17,828 INFO L405 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2025-02-06 19:51:17,834 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (24)] Ended with exit code 0 [2025-02-06 19:51:17,834 INFO L204 LassoAnalysis]: Preferences: [2025-02-06 19:51:17,834 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-02-06 19:51:17,834 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-02-06 19:51:17,834 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-02-06 19:51:17,834 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2025-02-06 19:51:17,834 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:51:17,834 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-02-06 19:51:17,834 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-02-06 19:51:17,834 INFO L132 ssoRankerPreferences]: Filename of dumped script: pipeline.cil-1.c_Iteration36_Loop [2025-02-06 19:51:17,834 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-02-06 19:51:17,834 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-02-06 19:51:17,840 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,845 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,850 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,852 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,854 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,856 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,859 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,861 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,863 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,866 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,870 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,873 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,875 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,878 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,880 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,885 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,887 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,889 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,891 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,893 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,898 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,905 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,915 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,916 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,918 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,919 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,921 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,924 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,926 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,927 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,929 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,930 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,933 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,943 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,947 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,949 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,950 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,952 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,953 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,957 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,959 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:17,960 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:51:18,359 INFO L259 LassoAnalysis]: Preprocessing complete. [2025-02-06 19:51:18,360 INFO L451 LassoAnalysis]: Using template 'affine'. [2025-02-06 19:51:18,360 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:51:18,360 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:51:18,362 INFO L229 MonitoredProcess]: Starting monitored process 25 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:51:18,363 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Waiting until timeout for monitored process [2025-02-06 19:51:18,364 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:51:18,374 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:51:18,374 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-02-06 19:51:18,374 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:51:18,374 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 19:51:18,374 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:51:18,375 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-02-06 19:51:18,375 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-02-06 19:51:18,376 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 19:51:18,381 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (25)] Forceful destruction successful, exit code 0 [2025-02-06 19:51:18,384 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:51:18,384 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:51:18,385 INFO L229 MonitoredProcess]: Starting monitored process 26 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:51:18,386 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Waiting until timeout for monitored process [2025-02-06 19:51:18,388 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:51:18,397 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:51:18,398 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-02-06 19:51:18,398 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:51:18,398 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 19:51:18,398 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:51:18,398 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-02-06 19:51:18,398 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-02-06 19:51:18,400 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 19:51:18,407 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (26)] Forceful destruction successful, exit code 0 [2025-02-06 19:51:18,407 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:51:18,407 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:51:18,410 INFO L229 MonitoredProcess]: Starting monitored process 27 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:51:18,411 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Waiting until timeout for monitored process [2025-02-06 19:51:18,411 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:51:18,421 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:51:18,421 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-02-06 19:51:18,421 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:51:18,421 INFO L204 nArgumentSynthesizer]: 2 loop disjuncts [2025-02-06 19:51:18,421 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:51:18,422 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2025-02-06 19:51:18,422 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-02-06 19:51:18,423 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 19:51:18,429 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (27)] Forceful destruction successful, exit code 0 [2025-02-06 19:51:18,429 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:51:18,429 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:51:18,431 INFO L229 MonitoredProcess]: Starting monitored process 28 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:51:18,432 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Waiting until timeout for monitored process [2025-02-06 19:51:18,434 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:51:18,443 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:51:18,443 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-02-06 19:51:18,444 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:51:18,444 INFO L204 nArgumentSynthesizer]: 2 loop disjuncts [2025-02-06 19:51:18,444 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:51:18,444 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2025-02-06 19:51:18,444 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-02-06 19:51:18,446 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 19:51:18,451 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (28)] Forceful destruction successful, exit code 0 [2025-02-06 19:51:18,452 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:51:18,452 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:51:18,454 INFO L229 MonitoredProcess]: Starting monitored process 29 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:51:18,454 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Waiting until timeout for monitored process [2025-02-06 19:51:18,455 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:51:18,465 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:51:18,465 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-02-06 19:51:18,465 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:51:18,465 INFO L204 nArgumentSynthesizer]: 2 loop disjuncts [2025-02-06 19:51:18,465 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:51:18,466 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2025-02-06 19:51:18,466 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-02-06 19:51:18,467 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 19:51:18,473 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (29)] Forceful destruction successful, exit code 0 [2025-02-06 19:51:18,473 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:51:18,473 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:51:18,476 INFO L229 MonitoredProcess]: Starting monitored process 30 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:51:18,477 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Waiting until timeout for monitored process [2025-02-06 19:51:18,477 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:51:18,487 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:51:18,487 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-02-06 19:51:18,487 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:51:18,487 INFO L204 nArgumentSynthesizer]: 2 loop disjuncts [2025-02-06 19:51:18,487 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:51:18,488 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2025-02-06 19:51:18,488 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-02-06 19:51:18,490 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 19:51:18,498 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (30)] Ended with exit code 0 [2025-02-06 19:51:18,498 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:51:18,498 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:51:18,502 INFO L229 MonitoredProcess]: Starting monitored process 31 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:51:18,503 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (31)] Waiting until timeout for monitored process [2025-02-06 19:51:18,504 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:51:18,513 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:51:18,514 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-02-06 19:51:18,514 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:51:18,514 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 19:51:18,514 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:51:18,514 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-02-06 19:51:18,514 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-02-06 19:51:18,516 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 19:51:18,521 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (31)] Ended with exit code 0 [2025-02-06 19:51:18,522 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:51:18,522 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:51:18,524 INFO L229 MonitoredProcess]: Starting monitored process 32 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:51:18,525 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Waiting until timeout for monitored process [2025-02-06 19:51:18,526 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:51:18,535 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:51:18,535 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-02-06 19:51:18,536 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:51:18,536 INFO L204 nArgumentSynthesizer]: 2 loop disjuncts [2025-02-06 19:51:18,536 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:51:18,536 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2025-02-06 19:51:18,536 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-02-06 19:51:18,538 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 19:51:18,543 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (32)] Ended with exit code 0 [2025-02-06 19:51:18,543 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:51:18,544 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:51:18,545 INFO L229 MonitoredProcess]: Starting monitored process 33 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:51:18,547 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Waiting until timeout for monitored process [2025-02-06 19:51:18,547 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:51:18,558 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:51:18,558 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-02-06 19:51:18,558 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:51:18,558 INFO L204 nArgumentSynthesizer]: 2 loop disjuncts [2025-02-06 19:51:18,558 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:51:18,560 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2025-02-06 19:51:18,560 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-02-06 19:51:18,562 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 19:51:18,567 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (33)] Forceful destruction successful, exit code 0 [2025-02-06 19:51:18,568 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:51:18,568 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:51:18,569 INFO L229 MonitoredProcess]: Starting monitored process 34 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:51:18,574 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Waiting until timeout for monitored process [2025-02-06 19:51:18,575 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:51:18,584 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:51:18,584 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-02-06 19:51:18,585 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:51:18,585 INFO L204 nArgumentSynthesizer]: 2 loop disjuncts [2025-02-06 19:51:18,585 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:51:18,585 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2025-02-06 19:51:18,585 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-02-06 19:51:18,587 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 19:51:18,593 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (34)] Forceful destruction successful, exit code 0 [2025-02-06 19:51:18,593 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:51:18,594 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:51:18,595 INFO L229 MonitoredProcess]: Starting monitored process 35 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:51:18,597 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Waiting until timeout for monitored process [2025-02-06 19:51:18,597 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:51:18,607 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:51:18,607 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-02-06 19:51:18,607 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:51:18,607 INFO L204 nArgumentSynthesizer]: 2 loop disjuncts [2025-02-06 19:51:18,607 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:51:18,608 INFO L401 nArgumentSynthesizer]: We have 4 Motzkin's Theorem applications. [2025-02-06 19:51:18,608 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-02-06 19:51:18,609 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 19:51:18,614 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (35)] Forceful destruction successful, exit code 0 [2025-02-06 19:51:18,615 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:51:18,615 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:51:18,616 INFO L229 MonitoredProcess]: Starting monitored process 36 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:51:18,618 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Waiting until timeout for monitored process [2025-02-06 19:51:18,618 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:51:18,628 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:51:18,628 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-02-06 19:51:18,628 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:51:18,628 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 19:51:18,628 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:51:18,629 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-02-06 19:51:18,629 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-02-06 19:51:18,630 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-06 19:51:18,636 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (36)] Forceful destruction successful, exit code 0 [2025-02-06 19:51:18,636 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:51:18,636 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:51:18,638 INFO L229 MonitoredProcess]: Starting monitored process 37 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:51:18,639 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (37)] Waiting until timeout for monitored process [2025-02-06 19:51:18,640 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:51:18,649 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:51:18,650 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-02-06 19:51:18,650 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:51:18,650 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 19:51:18,650 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:51:18,651 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-02-06 19:51:18,651 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-02-06 19:51:18,652 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2025-02-06 19:51:18,655 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2025-02-06 19:51:18,655 INFO L444 ModelExtractionUtils]: 0 out of 3 variables were initially zero. Simplification set additionally 1 variables to zero. [2025-02-06 19:51:18,656 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:51:18,656 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:51:18,657 INFO L229 MonitoredProcess]: Starting monitored process 38 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:51:18,659 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (38)] Waiting until timeout for monitored process [2025-02-06 19:51:18,659 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2025-02-06 19:51:18,659 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2025-02-06 19:51:18,660 INFO L474 LassoAnalysis]: Proved termination. [2025-02-06 19:51:18,660 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(~main_clk_val~0) = 1*~main_clk_val~0 Supporting invariants [] [2025-02-06 19:51:18,665 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (37)] Ended with exit code 0 [2025-02-06 19:51:18,666 INFO L156 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2025-02-06 19:51:18,676 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:51:18,687 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 89 statements into 1 equivalence classes. [2025-02-06 19:51:18,707 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 89 of 89 statements. [2025-02-06 19:51:18,707 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:51:18,707 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:51:18,708 INFO L256 TraceCheckSpWp]: Trace formula consists of 263 conjuncts, 2 conjuncts are in the unsatisfiable core [2025-02-06 19:51:18,709 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:51:18,860 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (38)] Ended with exit code 0 [2025-02-06 19:51:18,917 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 183 statements into 1 equivalence classes. [2025-02-06 19:51:18,940 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 183 of 183 statements. [2025-02-06 19:51:18,940 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:51:18,940 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:51:18,942 INFO L256 TraceCheckSpWp]: Trace formula consists of 247 conjuncts, 6 conjuncts are in the unsatisfiable core [2025-02-06 19:51:18,943 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:51:19,297 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:51:19,298 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 5 loop predicates [2025-02-06 19:51:19,298 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 111679 states and 149325 transitions. cyclomatic complexity: 37648 Second operand has 7 states, 7 states have (on average 38.857142857142854) internal successors, (272), 7 states have internal predecessors, (272), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:51:20,086 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 111679 states and 149325 transitions. cyclomatic complexity: 37648. Second operand has 7 states, 7 states have (on average 38.857142857142854) internal successors, (272), 7 states have internal predecessors, (272), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 369727 states and 495917 transitions. Complement of second has 17 states. [2025-02-06 19:51:20,087 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 9 states 1 stem states 7 non-accepting loop states 1 accepting loop states [2025-02-06 19:51:20,087 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7 states, 7 states have (on average 38.857142857142854) internal successors, (272), 7 states have internal predecessors, (272), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:51:20,088 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9 states to 9 states and 1076 transitions. [2025-02-06 19:51:20,088 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 9 states and 1076 transitions. Stem has 89 letters. Loop has 183 letters. [2025-02-06 19:51:20,089 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-02-06 19:51:20,089 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 9 states and 1076 transitions. Stem has 272 letters. Loop has 183 letters. [2025-02-06 19:51:20,089 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-02-06 19:51:20,089 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 9 states and 1076 transitions. Stem has 89 letters. Loop has 366 letters. [2025-02-06 19:51:20,091 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-02-06 19:51:20,091 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 369727 states and 495917 transitions. [2025-02-06 19:51:21,707 INFO L131 ngComponentsAnalysis]: Automaton has 3970 accepting balls. 148096 [2025-02-06 19:51:22,887 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 369727 states to 329631 states and 442541 transitions. [2025-02-06 19:51:22,887 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 200191 [2025-02-06 19:51:23,028 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 200543 [2025-02-06 19:51:23,029 INFO L73 IsDeterministic]: Start isDeterministic. Operand 329631 states and 442541 transitions. [2025-02-06 19:51:23,031 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:51:23,031 INFO L218 hiAutomatonCegarLoop]: Abstraction has 329631 states and 442541 transitions. [2025-02-06 19:51:23,230 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 329631 states and 442541 transitions.