./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/loop-invgen/string_concat-noarr.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version c00e63dc Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/loop-invgen/string_concat-noarr.i -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 30a4b942034eaa47a8fcc8fdf4549d1d63a9a60d59b585da2a353c9626604750 --- Real Ultimate output --- This is Ultimate 0.3.0-?-c00e63d-m [2025-02-06 19:33:19,446 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-02-06 19:33:19,508 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2025-02-06 19:33:19,515 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-02-06 19:33:19,515 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-02-06 19:33:19,515 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-02-06 19:33:19,537 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-02-06 19:33:19,538 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-02-06 19:33:19,538 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-02-06 19:33:19,539 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-02-06 19:33:19,539 INFO L153 SettingsManager]: * Use memory slicer=true [2025-02-06 19:33:19,539 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-02-06 19:33:19,540 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-02-06 19:33:19,540 INFO L153 SettingsManager]: * Use SBE=true [2025-02-06 19:33:19,540 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-02-06 19:33:19,541 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-02-06 19:33:19,541 INFO L153 SettingsManager]: * Use old map elimination=false [2025-02-06 19:33:19,541 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-02-06 19:33:19,541 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-02-06 19:33:19,542 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-02-06 19:33:19,542 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-02-06 19:33:19,542 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-02-06 19:33:19,542 INFO L153 SettingsManager]: * sizeof long=4 [2025-02-06 19:33:19,542 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-02-06 19:33:19,542 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-02-06 19:33:19,542 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-02-06 19:33:19,542 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-02-06 19:33:19,542 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-02-06 19:33:19,542 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-02-06 19:33:19,543 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-02-06 19:33:19,543 INFO L153 SettingsManager]: * sizeof long double=12 [2025-02-06 19:33:19,543 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-02-06 19:33:19,543 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-02-06 19:33:19,543 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-02-06 19:33:19,543 INFO L153 SettingsManager]: * Use constant arrays=true [2025-02-06 19:33:19,543 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-02-06 19:33:19,543 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-02-06 19:33:19,543 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-02-06 19:33:19,543 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-02-06 19:33:19,543 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-02-06 19:33:19,543 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 30a4b942034eaa47a8fcc8fdf4549d1d63a9a60d59b585da2a353c9626604750 [2025-02-06 19:33:19,825 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-02-06 19:33:19,837 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-02-06 19:33:19,840 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-02-06 19:33:19,841 INFO L270 PluginConnector]: Initializing CDTParser... [2025-02-06 19:33:19,841 INFO L274 PluginConnector]: CDTParser initialized [2025-02-06 19:33:19,843 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/loop-invgen/string_concat-noarr.i [2025-02-06 19:33:21,113 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/22989194c/ada7e680a9744b1f897d0b695392994d/FLAG12bced347 [2025-02-06 19:33:21,403 INFO L384 CDTParser]: Found 1 translation units. [2025-02-06 19:33:21,404 INFO L180 CDTParser]: Scanning /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/loop-invgen/string_concat-noarr.i [2025-02-06 19:33:21,410 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/22989194c/ada7e680a9744b1f897d0b695392994d/FLAG12bced347 [2025-02-06 19:33:21,422 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/22989194c/ada7e680a9744b1f897d0b695392994d [2025-02-06 19:33:21,425 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-02-06 19:33:21,426 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-02-06 19:33:21,427 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-02-06 19:33:21,427 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-02-06 19:33:21,430 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-02-06 19:33:21,431 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.02 07:33:21" (1/1) ... [2025-02-06 19:33:21,432 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@31049091 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:33:21, skipping insertion in model container [2025-02-06 19:33:21,432 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.02 07:33:21" (1/1) ... [2025-02-06 19:33:21,446 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-02-06 19:33:21,585 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-06 19:33:21,599 INFO L200 MainTranslator]: Completed pre-run [2025-02-06 19:33:21,613 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-06 19:33:21,627 INFO L204 MainTranslator]: Completed translation [2025-02-06 19:33:21,628 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:33:21 WrapperNode [2025-02-06 19:33:21,628 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-02-06 19:33:21,629 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-02-06 19:33:21,629 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-02-06 19:33:21,629 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-02-06 19:33:21,635 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:33:21" (1/1) ... [2025-02-06 19:33:21,642 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:33:21" (1/1) ... [2025-02-06 19:33:21,652 INFO L138 Inliner]: procedures = 16, calls = 8, calls flagged for inlining = 4, calls inlined = 4, statements flattened = 52 [2025-02-06 19:33:21,653 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-02-06 19:33:21,653 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-02-06 19:33:21,654 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-02-06 19:33:21,654 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-02-06 19:33:21,660 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:33:21" (1/1) ... [2025-02-06 19:33:21,661 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:33:21" (1/1) ... [2025-02-06 19:33:21,661 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:33:21" (1/1) ... [2025-02-06 19:33:21,674 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-02-06 19:33:21,675 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:33:21" (1/1) ... [2025-02-06 19:33:21,676 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:33:21" (1/1) ... [2025-02-06 19:33:21,679 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:33:21" (1/1) ... [2025-02-06 19:33:21,679 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:33:21" (1/1) ... [2025-02-06 19:33:21,680 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:33:21" (1/1) ... [2025-02-06 19:33:21,680 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:33:21" (1/1) ... [2025-02-06 19:33:21,681 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-02-06 19:33:21,682 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-02-06 19:33:21,682 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-02-06 19:33:21,682 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-02-06 19:33:21,683 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:33:21" (1/1) ... [2025-02-06 19:33:21,688 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:33:21,702 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:33:21,716 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:33:21,723 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-02-06 19:33:21,743 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-02-06 19:33:21,744 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-02-06 19:33:21,744 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-02-06 19:33:21,744 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-02-06 19:33:21,789 INFO L257 CfgBuilder]: Building ICFG [2025-02-06 19:33:21,790 INFO L287 CfgBuilder]: Building CFG for each procedure with an implementation [2025-02-06 19:33:21,895 INFO L? ?]: Removed 9 outVars from TransFormulas that were not future-live. [2025-02-06 19:33:21,895 INFO L308 CfgBuilder]: Performing block encoding [2025-02-06 19:33:21,903 INFO L332 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-02-06 19:33:21,903 INFO L337 CfgBuilder]: Removed 0 assume(true) statements. [2025-02-06 19:33:21,903 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 06.02 07:33:21 BoogieIcfgContainer [2025-02-06 19:33:21,903 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-02-06 19:33:21,904 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-02-06 19:33:21,904 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-02-06 19:33:21,909 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-02-06 19:33:21,910 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-06 19:33:21,910 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 06.02 07:33:21" (1/3) ... [2025-02-06 19:33:21,911 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@23ad012b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.02 07:33:21, skipping insertion in model container [2025-02-06 19:33:21,911 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-06 19:33:21,911 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:33:21" (2/3) ... [2025-02-06 19:33:21,911 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@23ad012b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.02 07:33:21, skipping insertion in model container [2025-02-06 19:33:21,911 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-06 19:33:21,912 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 06.02 07:33:21" (3/3) ... [2025-02-06 19:33:21,913 INFO L363 chiAutomizerObserver]: Analyzing ICFG string_concat-noarr.i [2025-02-06 19:33:21,956 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-02-06 19:33:21,956 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-02-06 19:33:21,956 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-02-06 19:33:21,956 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-02-06 19:33:21,956 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-02-06 19:33:21,957 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-02-06 19:33:21,957 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-02-06 19:33:21,958 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-02-06 19:33:21,962 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 20 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 19 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:33:21,973 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 5 [2025-02-06 19:33:21,973 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:33:21,974 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:33:21,978 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2025-02-06 19:33:21,978 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 19:33:21,978 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-02-06 19:33:21,979 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 20 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 19 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:33:21,982 INFO L131 ngComponentsAnalysis]: Automaton has 3 accepting balls. 5 [2025-02-06 19:33:21,982 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:33:21,982 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:33:21,983 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2025-02-06 19:33:21,983 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-06 19:33:21,988 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;" [2025-02-06 19:33:21,989 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" [2025-02-06 19:33:21,995 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:33:21,996 INFO L85 PathProgramCache]: Analyzing trace with hash 2030719, now seen corresponding path program 1 times [2025-02-06 19:33:22,002 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:33:22,003 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1500016924] [2025-02-06 19:33:22,003 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:33:22,004 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:33:22,058 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 4 statements into 1 equivalence classes. [2025-02-06 19:33:22,065 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 4 of 4 statements. [2025-02-06 19:33:22,066 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:33:22,066 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:22,066 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:33:22,069 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 4 statements into 1 equivalence classes. [2025-02-06 19:33:22,071 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 4 of 4 statements. [2025-02-06 19:33:22,071 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:33:22,072 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:22,086 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:33:22,088 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:33:22,088 INFO L85 PathProgramCache]: Analyzing trace with hash 1952, now seen corresponding path program 1 times [2025-02-06 19:33:22,088 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:33:22,088 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [402572012] [2025-02-06 19:33:22,088 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:33:22,088 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:33:22,095 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:33:22,102 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:33:22,103 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:33:22,103 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:22,103 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:33:22,105 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:33:22,106 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:33:22,106 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:33:22,106 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:22,107 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:33:22,109 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:33:22,109 INFO L85 PathProgramCache]: Analyzing trace with hash 1951521950, now seen corresponding path program 1 times [2025-02-06 19:33:22,109 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:33:22,109 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1304625295] [2025-02-06 19:33:22,109 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:33:22,109 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:33:22,114 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 6 statements into 1 equivalence classes. [2025-02-06 19:33:22,120 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 6 of 6 statements. [2025-02-06 19:33:22,121 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:33:22,121 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:22,122 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:33:22,125 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 6 statements into 1 equivalence classes. [2025-02-06 19:33:22,130 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 6 of 6 statements. [2025-02-06 19:33:22,132 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:33:22,132 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:22,135 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:33:22,200 INFO L204 LassoAnalysis]: Preferences: [2025-02-06 19:33:22,200 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-02-06 19:33:22,200 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-02-06 19:33:22,201 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-02-06 19:33:22,201 INFO L128 ssoRankerPreferences]: Use exernal solver: true [2025-02-06 19:33:22,201 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:33:22,201 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-02-06 19:33:22,201 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-02-06 19:33:22,201 INFO L132 ssoRankerPreferences]: Filename of dumped script: string_concat-noarr.i_Iteration1_Loop [2025-02-06 19:33:22,201 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-02-06 19:33:22,201 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-02-06 19:33:22,213 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:33:22,230 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:33:22,234 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:33:22,274 INFO L259 LassoAnalysis]: Preprocessing complete. [2025-02-06 19:33:22,274 INFO L365 LassoAnalysis]: Checking for nontermination... [2025-02-06 19:33:22,276 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:33:22,276 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:33:22,280 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:33:22,282 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2025-02-06 19:33:22,283 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 0 Nilpotent components: true [2025-02-06 19:33:22,283 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-02-06 19:33:22,302 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Ended with exit code 0 [2025-02-06 19:33:22,302 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:33:22,302 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:33:22,304 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:33:22,305 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2025-02-06 19:33:22,306 INFO L148 nArgumentSynthesizer]: Nontermination analysis: NONLINEAR Allow bounded executions: true Number of generalized eigenvectors: 3 Nilpotent components: true [2025-02-06 19:33:22,306 INFO L160 nArgumentSynthesizer]: Using integer mode. [2025-02-06 19:33:22,332 INFO L405 LassoAnalysis]: Proving nontermination failed: No geometric nontermination argument exists. [2025-02-06 19:33:22,337 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Ended with exit code 0 [2025-02-06 19:33:22,338 INFO L204 LassoAnalysis]: Preferences: [2025-02-06 19:33:22,338 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-02-06 19:33:22,338 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-02-06 19:33:22,338 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-02-06 19:33:22,338 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2025-02-06 19:33:22,338 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:33:22,338 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-02-06 19:33:22,338 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-02-06 19:33:22,338 INFO L132 ssoRankerPreferences]: Filename of dumped script: string_concat-noarr.i_Iteration1_Loop [2025-02-06 19:33:22,338 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-02-06 19:33:22,338 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-02-06 19:33:22,339 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:33:22,349 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:33:22,354 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-06 19:33:22,383 INFO L259 LassoAnalysis]: Preprocessing complete. [2025-02-06 19:33:22,387 INFO L451 LassoAnalysis]: Using template 'affine'. [2025-02-06 19:33:22,388 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:33:22,388 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:33:22,390 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:33:22,393 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2025-02-06 19:33:22,394 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-06 19:33:22,409 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-06 19:33:22,409 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-02-06 19:33:22,410 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-06 19:33:22,410 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-06 19:33:22,411 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-06 19:33:22,420 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-02-06 19:33:22,420 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-02-06 19:33:22,423 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2025-02-06 19:33:22,429 INFO L443 ModelExtractionUtils]: Simplification made 3 calls to the SMT solver. [2025-02-06 19:33:22,434 INFO L444 ModelExtractionUtils]: 0 out of 3 variables were initially zero. Simplification set additionally 0 variables to zero. [2025-02-06 19:33:22,436 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:33:22,436 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:33:22,439 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:33:22,442 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2025-02-06 19:33:22,443 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2025-02-06 19:33:22,444 INFO L438 nArgumentSynthesizer]: Removed 0 redundant supporting invariants from a total of 0. [2025-02-06 19:33:22,444 INFO L474 LassoAnalysis]: Proved termination. [2025-02-06 19:33:22,445 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~i~0#1) = -2*ULTIMATE.start_main_~i~0#1 + 1999999 Supporting invariants [] [2025-02-06 19:33:22,453 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2025-02-06 19:33:22,456 INFO L156 tatePredicateManager]: 0 out of 0 supporting invariants were superfluous and have been removed [2025-02-06 19:33:22,492 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:33:22,502 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 4 statements into 1 equivalence classes. [2025-02-06 19:33:22,507 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 4 of 4 statements. [2025-02-06 19:33:22,507 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:33:22,507 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:33:22,510 INFO L256 TraceCheckSpWp]: Trace formula consists of 21 conjuncts, 2 conjuncts are in the unsatisfiable core [2025-02-06 19:33:22,511 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:33:22,526 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:33:22,529 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:33:22,529 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:33:22,529 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:33:22,530 WARN L254 TraceCheckSpWp]: Trace formula consists of 7 conjuncts, 4 conjuncts are in the unsatisfiable core [2025-02-06 19:33:22,532 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:33:22,539 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:33:22,563 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 1 loop predicates [2025-02-06 19:33:22,565 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 20 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 19 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 2.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:33:22,622 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 20 states, 19 states have (on average 1.4210526315789473) internal successors, (27), 19 states have internal predecessors, (27), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 2.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 45 states and 62 transitions. Complement of second has 6 states. [2025-02-06 19:33:22,624 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 4 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2025-02-06 19:33:22,627 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.0) internal successors, (6), 3 states have internal predecessors, (6), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:33:22,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4 states to 4 states and 37 transitions. [2025-02-06 19:33:22,636 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 37 transitions. Stem has 4 letters. Loop has 2 letters. [2025-02-06 19:33:22,637 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-02-06 19:33:22,637 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 37 transitions. Stem has 6 letters. Loop has 2 letters. [2025-02-06 19:33:22,637 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-02-06 19:33:22,637 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 4 states and 37 transitions. Stem has 4 letters. Loop has 4 letters. [2025-02-06 19:33:22,637 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-02-06 19:33:22,638 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 45 states and 62 transitions. [2025-02-06 19:33:22,639 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 2 [2025-02-06 19:33:22,641 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 45 states to 21 states and 26 transitions. [2025-02-06 19:33:22,642 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 12 [2025-02-06 19:33:22,642 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 14 [2025-02-06 19:33:22,642 INFO L73 IsDeterministic]: Start isDeterministic. Operand 21 states and 26 transitions. [2025-02-06 19:33:22,642 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:33:22,642 INFO L218 hiAutomatonCegarLoop]: Abstraction has 21 states and 26 transitions. [2025-02-06 19:33:22,652 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states and 26 transitions. [2025-02-06 19:33:22,660 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 19. [2025-02-06 19:33:22,660 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.263157894736842) internal successors, (24), 18 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:33:22,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 24 transitions. [2025-02-06 19:33:22,661 INFO L240 hiAutomatonCegarLoop]: Abstraction has 19 states and 24 transitions. [2025-02-06 19:33:22,661 INFO L432 stractBuchiCegarLoop]: Abstraction has 19 states and 24 transitions. [2025-02-06 19:33:22,665 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-02-06 19:33:22,665 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 19 states and 24 transitions. [2025-02-06 19:33:22,666 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-02-06 19:33:22,666 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:33:22,666 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:33:22,667 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:33:22,667 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-02-06 19:33:22,667 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-02-06 19:33:22,667 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-02-06 19:33:22,668 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:33:22,668 INFO L85 PathProgramCache]: Analyzing trace with hash 367638299, now seen corresponding path program 1 times [2025-02-06 19:33:22,668 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:33:22,668 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [150611846] [2025-02-06 19:33:22,668 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:33:22,668 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:33:22,673 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 7 statements into 1 equivalence classes. [2025-02-06 19:33:22,679 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 7 of 7 statements. [2025-02-06 19:33:22,679 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:33:22,679 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:33:22,736 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:33:22,737 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:33:22,737 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [150611846] [2025-02-06 19:33:22,738 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [150611846] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:33:22,738 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:33:22,738 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-02-06 19:33:22,738 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1305640120] [2025-02-06 19:33:22,738 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:33:22,740 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:33:22,740 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:33:22,741 INFO L85 PathProgramCache]: Analyzing trace with hash 69, now seen corresponding path program 1 times [2025-02-06 19:33:22,741 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:33:22,741 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1646908915] [2025-02-06 19:33:22,741 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:33:22,741 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:33:22,743 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-06 19:33:22,743 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-06 19:33:22,743 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:33:22,743 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:22,743 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:33:22,744 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-06 19:33:22,744 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-06 19:33:22,744 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:33:22,744 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:22,744 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:33:22,748 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:33:22,750 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:33:22,750 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:33:22,751 INFO L87 Difference]: Start difference. First operand 19 states and 24 transitions. cyclomatic complexity: 8 Second operand has 3 states, 2 states have (on average 3.5) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:33:22,774 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:33:22,774 INFO L93 Difference]: Finished difference Result 31 states and 37 transitions. [2025-02-06 19:33:22,774 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 31 states and 37 transitions. [2025-02-06 19:33:22,775 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 2 [2025-02-06 19:33:22,776 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 31 states to 31 states and 37 transitions. [2025-02-06 19:33:22,776 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 19 [2025-02-06 19:33:22,776 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 19 [2025-02-06 19:33:22,776 INFO L73 IsDeterministic]: Start isDeterministic. Operand 31 states and 37 transitions. [2025-02-06 19:33:22,776 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:33:22,776 INFO L218 hiAutomatonCegarLoop]: Abstraction has 31 states and 37 transitions. [2025-02-06 19:33:22,776 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states and 37 transitions. [2025-02-06 19:33:22,777 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 21. [2025-02-06 19:33:22,777 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 1.2380952380952381) internal successors, (26), 20 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:33:22,778 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 26 transitions. [2025-02-06 19:33:22,778 INFO L240 hiAutomatonCegarLoop]: Abstraction has 21 states and 26 transitions. [2025-02-06 19:33:22,778 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:33:22,779 INFO L432 stractBuchiCegarLoop]: Abstraction has 21 states and 26 transitions. [2025-02-06 19:33:22,779 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-02-06 19:33:22,779 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 21 states and 26 transitions. [2025-02-06 19:33:22,780 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-02-06 19:33:22,780 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:33:22,780 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:33:22,780 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:33:22,780 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-02-06 19:33:22,780 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-02-06 19:33:22,780 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-02-06 19:33:22,781 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:33:22,781 INFO L85 PathProgramCache]: Analyzing trace with hash 1113124508, now seen corresponding path program 1 times [2025-02-06 19:33:22,781 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:33:22,781 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [724412557] [2025-02-06 19:33:22,781 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:33:22,781 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:33:22,785 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 9 statements into 1 equivalence classes. [2025-02-06 19:33:22,788 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 9 of 9 statements. [2025-02-06 19:33:22,788 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:33:22,788 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:33:22,821 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:33:22,821 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:33:22,821 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [724412557] [2025-02-06 19:33:22,821 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [724412557] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:33:22,821 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1878347338] [2025-02-06 19:33:22,821 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:33:22,821 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:33:22,821 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:33:22,823 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:33:22,825 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2025-02-06 19:33:22,857 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 9 statements into 1 equivalence classes. [2025-02-06 19:33:22,862 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 9 of 9 statements. [2025-02-06 19:33:22,862 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:33:22,862 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:33:22,863 INFO L256 TraceCheckSpWp]: Trace formula consists of 29 conjuncts, 3 conjuncts are in the unsatisfiable core [2025-02-06 19:33:22,863 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:33:22,895 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:33:22,895 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:33:22,928 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:33:22,929 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1878347338] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:33:22,929 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:33:22,929 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 6 [2025-02-06 19:33:22,929 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1472317335] [2025-02-06 19:33:22,929 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:33:22,929 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:33:22,930 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:33:22,930 INFO L85 PathProgramCache]: Analyzing trace with hash 69, now seen corresponding path program 2 times [2025-02-06 19:33:22,930 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:33:22,930 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [623978745] [2025-02-06 19:33:22,930 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:33:22,930 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:33:22,932 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-02-06 19:33:22,933 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-06 19:33:22,933 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:33:22,933 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:22,933 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:33:22,934 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-06 19:33:22,934 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-06 19:33:22,934 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:33:22,934 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:22,934 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:33:22,936 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:33:22,937 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-06 19:33:22,937 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2025-02-06 19:33:22,937 INFO L87 Difference]: Start difference. First operand 21 states and 26 transitions. cyclomatic complexity: 8 Second operand has 7 states, 6 states have (on average 3.3333333333333335) internal successors, (20), 7 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:33:22,994 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:33:22,994 INFO L93 Difference]: Finished difference Result 69 states and 84 transitions. [2025-02-06 19:33:22,994 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 69 states and 84 transitions. [2025-02-06 19:33:22,996 INFO L131 ngComponentsAnalysis]: Automaton has 5 accepting balls. 5 [2025-02-06 19:33:22,997 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 69 states to 69 states and 84 transitions. [2025-02-06 19:33:22,997 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 38 [2025-02-06 19:33:22,997 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 38 [2025-02-06 19:33:22,997 INFO L73 IsDeterministic]: Start isDeterministic. Operand 69 states and 84 transitions. [2025-02-06 19:33:22,997 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:33:22,997 INFO L218 hiAutomatonCegarLoop]: Abstraction has 69 states and 84 transitions. [2025-02-06 19:33:22,997 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states and 84 transitions. [2025-02-06 19:33:22,999 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 27. [2025-02-06 19:33:23,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 1.4074074074074074) internal successors, (38), 26 states have internal predecessors, (38), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:33:23,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 38 transitions. [2025-02-06 19:33:23,000 INFO L240 hiAutomatonCegarLoop]: Abstraction has 27 states and 38 transitions. [2025-02-06 19:33:23,002 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-06 19:33:23,003 INFO L432 stractBuchiCegarLoop]: Abstraction has 27 states and 38 transitions. [2025-02-06 19:33:23,003 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-02-06 19:33:23,003 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 38 transitions. [2025-02-06 19:33:23,004 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-02-06 19:33:23,004 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:33:23,004 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:33:23,005 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:33:23,005 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-02-06 19:33:23,005 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume !(main_~i~0#1 >= 100);main_~j~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet3#1;" "assume !(0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet3#1;" "assume main_~j~0#1 >= 100;" [2025-02-06 19:33:23,005 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-02-06 19:33:23,007 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:33:23,007 INFO L85 PathProgramCache]: Analyzing trace with hash 232306134, now seen corresponding path program 1 times [2025-02-06 19:33:23,007 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:33:23,007 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1617107213] [2025-02-06 19:33:23,007 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:33:23,007 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:33:23,014 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 11 statements into 1 equivalence classes. [2025-02-06 19:33:23,021 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 11 of 11 statements. [2025-02-06 19:33:23,021 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:33:23,021 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:33:23,066 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:33:23,066 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:33:23,067 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1617107213] [2025-02-06 19:33:23,067 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1617107213] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:33:23,067 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:33:23,067 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-02-06 19:33:23,067 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1560809367] [2025-02-06 19:33:23,067 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:33:23,067 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:33:23,067 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:33:23,068 INFO L85 PathProgramCache]: Analyzing trace with hash 69, now seen corresponding path program 3 times [2025-02-06 19:33:23,068 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:33:23,068 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [218915838] [2025-02-06 19:33:23,068 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:33:23,068 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:33:23,072 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 1 statements into 1 equivalence classes. [2025-02-06 19:33:23,073 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-06 19:33:23,073 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-06 19:33:23,073 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:23,073 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:33:23,075 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-06 19:33:23,075 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-06 19:33:23,075 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:33:23,076 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:23,077 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:33:23,080 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:33:23,081 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:33:23,081 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:33:23,081 INFO L87 Difference]: Start difference. First operand 27 states and 38 transitions. cyclomatic complexity: 14 Second operand has 3 states, 2 states have (on average 5.5) internal successors, (11), 3 states have internal predecessors, (11), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:33:23,092 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:33:23,092 INFO L93 Difference]: Finished difference Result 30 states and 40 transitions. [2025-02-06 19:33:23,092 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 30 states and 40 transitions. [2025-02-06 19:33:23,093 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-02-06 19:33:23,093 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 30 states to 24 states and 30 transitions. [2025-02-06 19:33:23,093 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2025-02-06 19:33:23,093 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2025-02-06 19:33:23,094 INFO L73 IsDeterministic]: Start isDeterministic. Operand 24 states and 30 transitions. [2025-02-06 19:33:23,094 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:33:23,094 INFO L218 hiAutomatonCegarLoop]: Abstraction has 24 states and 30 transitions. [2025-02-06 19:33:23,094 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states and 30 transitions. [2025-02-06 19:33:23,095 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 23. [2025-02-06 19:33:23,100 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23 states, 23 states have (on average 1.2608695652173914) internal successors, (29), 22 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:33:23,100 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 29 transitions. [2025-02-06 19:33:23,100 INFO L240 hiAutomatonCegarLoop]: Abstraction has 23 states and 29 transitions. [2025-02-06 19:33:23,101 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:33:23,101 INFO L432 stractBuchiCegarLoop]: Abstraction has 23 states and 29 transitions. [2025-02-06 19:33:23,102 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-02-06 19:33:23,102 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 23 states and 29 transitions. [2025-02-06 19:33:23,102 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-02-06 19:33:23,103 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:33:23,103 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:33:23,104 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:33:23,105 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-02-06 19:33:23,106 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume !(main_~i~0#1 >= 100);main_~j~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume !(0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet3#1;" "assume main_~j~0#1 >= 100;" [2025-02-06 19:33:23,106 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-02-06 19:33:23,106 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:33:23,106 INFO L85 PathProgramCache]: Analyzing trace with hash -92067561, now seen corresponding path program 1 times [2025-02-06 19:33:23,106 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:33:23,106 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1655281237] [2025-02-06 19:33:23,106 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:33:23,106 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:33:23,114 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 13 statements into 1 equivalence classes. [2025-02-06 19:33:23,118 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 13 of 13 statements. [2025-02-06 19:33:23,119 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:33:23,119 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:33:23,154 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:33:23,155 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:33:23,155 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1655281237] [2025-02-06 19:33:23,155 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1655281237] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:33:23,155 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [159428959] [2025-02-06 19:33:23,155 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:33:23,155 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:33:23,155 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:33:23,158 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:33:23,161 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2025-02-06 19:33:23,188 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 13 statements into 1 equivalence classes. [2025-02-06 19:33:23,197 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 13 of 13 statements. [2025-02-06 19:33:23,197 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:33:23,197 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:33:23,198 INFO L256 TraceCheckSpWp]: Trace formula consists of 37 conjuncts, 3 conjuncts are in the unsatisfiable core [2025-02-06 19:33:23,199 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:33:23,216 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:33:23,216 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:33:23,248 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:33:23,248 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [159428959] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:33:23,248 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:33:23,249 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3] total 6 [2025-02-06 19:33:23,249 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2064830203] [2025-02-06 19:33:23,249 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:33:23,249 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:33:23,249 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:33:23,250 INFO L85 PathProgramCache]: Analyzing trace with hash 69, now seen corresponding path program 4 times [2025-02-06 19:33:23,250 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:33:23,250 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2006221455] [2025-02-06 19:33:23,250 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 19:33:23,250 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:33:23,253 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 1 statements into 2 equivalence classes. [2025-02-06 19:33:23,253 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 1 of 1 statements. [2025-02-06 19:33:23,253 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-06 19:33:23,253 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:23,253 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:33:23,254 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-06 19:33:23,254 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-06 19:33:23,254 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:33:23,254 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:23,255 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:33:23,257 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:33:23,258 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-06 19:33:23,258 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2025-02-06 19:33:23,258 INFO L87 Difference]: Start difference. First operand 23 states and 29 transitions. cyclomatic complexity: 9 Second operand has 7 states, 6 states have (on average 4.0) internal successors, (24), 7 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:33:23,284 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Ended with exit code 0 [2025-02-06 19:33:23,291 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:33:23,291 INFO L93 Difference]: Finished difference Result 36 states and 42 transitions. [2025-02-06 19:33:23,291 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 36 states and 42 transitions. [2025-02-06 19:33:23,292 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-02-06 19:33:23,293 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 36 states to 30 states and 36 transitions. [2025-02-06 19:33:23,293 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2025-02-06 19:33:23,293 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2025-02-06 19:33:23,293 INFO L73 IsDeterministic]: Start isDeterministic. Operand 30 states and 36 transitions. [2025-02-06 19:33:23,293 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:33:23,293 INFO L218 hiAutomatonCegarLoop]: Abstraction has 30 states and 36 transitions. [2025-02-06 19:33:23,293 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states and 36 transitions. [2025-02-06 19:33:23,294 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 29. [2025-02-06 19:33:23,295 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 29 states have (on average 1.206896551724138) internal successors, (35), 28 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:33:23,295 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 35 transitions. [2025-02-06 19:33:23,295 INFO L240 hiAutomatonCegarLoop]: Abstraction has 29 states and 35 transitions. [2025-02-06 19:33:23,296 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-06 19:33:23,296 INFO L432 stractBuchiCegarLoop]: Abstraction has 29 states and 35 transitions. [2025-02-06 19:33:23,296 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-02-06 19:33:23,296 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 29 states and 35 transitions. [2025-02-06 19:33:23,298 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-02-06 19:33:23,299 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:33:23,299 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:33:23,299 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 4, 1, 1, 1, 1, 1, 1] [2025-02-06 19:33:23,299 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-02-06 19:33:23,300 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-02-06 19:33:23,300 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-02-06 19:33:23,300 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:33:23,300 INFO L85 PathProgramCache]: Analyzing trace with hash 1994107807, now seen corresponding path program 2 times [2025-02-06 19:33:23,300 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:33:23,300 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1197245322] [2025-02-06 19:33:23,300 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:33:23,300 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:33:23,304 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 15 statements into 2 equivalence classes. [2025-02-06 19:33:23,309 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 15 of 15 statements. [2025-02-06 19:33:23,309 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-02-06 19:33:23,310 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:33:23,397 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:33:23,397 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:33:23,397 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1197245322] [2025-02-06 19:33:23,397 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1197245322] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:33:23,398 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [462215344] [2025-02-06 19:33:23,398 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:33:23,398 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:33:23,398 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:33:23,401 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:33:23,404 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2025-02-06 19:33:23,427 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 15 statements into 2 equivalence classes. [2025-02-06 19:33:23,434 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 15 of 15 statements. [2025-02-06 19:33:23,434 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-02-06 19:33:23,434 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:33:23,436 INFO L256 TraceCheckSpWp]: Trace formula consists of 44 conjuncts, 6 conjuncts are in the unsatisfiable core [2025-02-06 19:33:23,437 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:33:23,470 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:33:23,471 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:33:23,549 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:33:23,549 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [462215344] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:33:23,549 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:33:23,549 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 12 [2025-02-06 19:33:23,550 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1002516591] [2025-02-06 19:33:23,550 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:33:23,550 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:33:23,550 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:33:23,550 INFO L85 PathProgramCache]: Analyzing trace with hash 69, now seen corresponding path program 5 times [2025-02-06 19:33:23,550 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:33:23,550 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1509811011] [2025-02-06 19:33:23,550 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-06 19:33:23,550 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:33:23,557 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-02-06 19:33:23,557 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-06 19:33:23,557 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:33:23,557 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:23,557 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:33:23,558 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-06 19:33:23,558 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-06 19:33:23,558 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:33:23,558 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:23,558 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:33:23,560 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:33:23,561 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-02-06 19:33:23,562 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2025-02-06 19:33:23,562 INFO L87 Difference]: Start difference. First operand 29 states and 35 transitions. cyclomatic complexity: 9 Second operand has 13 states, 12 states have (on average 2.6666666666666665) internal successors, (32), 13 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:33:23,676 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:33:23,676 INFO L93 Difference]: Finished difference Result 163 states and 182 transitions. [2025-02-06 19:33:23,676 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 163 states and 182 transitions. [2025-02-06 19:33:23,678 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 7 [2025-02-06 19:33:23,679 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 163 states to 151 states and 170 transitions. [2025-02-06 19:33:23,679 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 28 [2025-02-06 19:33:23,679 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 28 [2025-02-06 19:33:23,680 INFO L73 IsDeterministic]: Start isDeterministic. Operand 151 states and 170 transitions. [2025-02-06 19:33:23,681 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:33:23,681 INFO L218 hiAutomatonCegarLoop]: Abstraction has 151 states and 170 transitions. [2025-02-06 19:33:23,681 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states and 170 transitions. [2025-02-06 19:33:23,684 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 41. [2025-02-06 19:33:23,685 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 41 states have (on average 1.2926829268292683) internal successors, (53), 40 states have internal predecessors, (53), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:33:23,685 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 53 transitions. [2025-02-06 19:33:23,685 INFO L240 hiAutomatonCegarLoop]: Abstraction has 41 states and 53 transitions. [2025-02-06 19:33:23,687 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2025-02-06 19:33:23,687 INFO L432 stractBuchiCegarLoop]: Abstraction has 41 states and 53 transitions. [2025-02-06 19:33:23,687 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-02-06 19:33:23,687 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 41 states and 53 transitions. [2025-02-06 19:33:23,688 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-02-06 19:33:23,688 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:33:23,688 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:33:23,689 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:33:23,689 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-02-06 19:33:23,689 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume !(main_~i~0#1 >= 100);main_~j~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume !(0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet3#1;" "assume main_~j~0#1 >= 100;" [2025-02-06 19:33:23,689 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-02-06 19:33:23,689 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:33:23,689 INFO L85 PathProgramCache]: Analyzing trace with hash 1718090074, now seen corresponding path program 2 times [2025-02-06 19:33:23,689 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:33:23,689 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [130347511] [2025-02-06 19:33:23,689 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:33:23,689 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:33:23,696 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 19 statements into 2 equivalence classes. [2025-02-06 19:33:23,703 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 19 of 19 statements. [2025-02-06 19:33:23,703 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-02-06 19:33:23,703 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:33:23,777 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:33:23,777 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:33:23,777 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [130347511] [2025-02-06 19:33:23,777 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [130347511] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:33:23,777 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1296733048] [2025-02-06 19:33:23,777 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:33:23,777 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:33:23,778 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:33:23,781 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:33:23,782 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2025-02-06 19:33:23,805 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 19 statements into 2 equivalence classes. [2025-02-06 19:33:23,814 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 19 of 19 statements. [2025-02-06 19:33:23,814 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-02-06 19:33:23,814 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:33:23,815 INFO L256 TraceCheckSpWp]: Trace formula consists of 58 conjuncts, 6 conjuncts are in the unsatisfiable core [2025-02-06 19:33:23,816 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:33:23,843 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:33:23,844 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:33:23,923 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 0 proven. 20 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:33:23,923 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1296733048] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:33:23,923 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:33:23,923 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 12 [2025-02-06 19:33:23,925 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1568497670] [2025-02-06 19:33:23,925 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:33:23,925 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:33:23,926 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:33:23,926 INFO L85 PathProgramCache]: Analyzing trace with hash 69, now seen corresponding path program 6 times [2025-02-06 19:33:23,926 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:33:23,926 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1144383874] [2025-02-06 19:33:23,926 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-06 19:33:23,926 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:33:23,929 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 1 statements into 1 equivalence classes. [2025-02-06 19:33:23,930 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-06 19:33:23,931 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-02-06 19:33:23,931 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:23,931 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:33:23,932 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-06 19:33:23,932 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-06 19:33:23,932 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:33:23,933 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:23,933 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:33:23,935 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:33:23,936 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-02-06 19:33:23,936 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2025-02-06 19:33:23,936 INFO L87 Difference]: Start difference. First operand 41 states and 53 transitions. cyclomatic complexity: 15 Second operand has 13 states, 12 states have (on average 3.0) internal successors, (36), 13 states have internal predecessors, (36), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:33:23,966 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:33:23,966 INFO L93 Difference]: Finished difference Result 66 states and 78 transitions. [2025-02-06 19:33:23,966 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 66 states and 78 transitions. [2025-02-06 19:33:23,967 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-02-06 19:33:23,968 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 66 states to 54 states and 66 transitions. [2025-02-06 19:33:23,968 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2025-02-06 19:33:23,968 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2025-02-06 19:33:23,968 INFO L73 IsDeterministic]: Start isDeterministic. Operand 54 states and 66 transitions. [2025-02-06 19:33:23,968 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:33:23,968 INFO L218 hiAutomatonCegarLoop]: Abstraction has 54 states and 66 transitions. [2025-02-06 19:33:23,968 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states and 66 transitions. [2025-02-06 19:33:23,970 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 53. [2025-02-06 19:33:23,970 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 53 states, 53 states have (on average 1.2264150943396226) internal successors, (65), 52 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:33:23,970 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 65 transitions. [2025-02-06 19:33:23,971 INFO L240 hiAutomatonCegarLoop]: Abstraction has 53 states and 65 transitions. [2025-02-06 19:33:23,972 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2025-02-06 19:33:23,973 INFO L432 stractBuchiCegarLoop]: Abstraction has 53 states and 65 transitions. [2025-02-06 19:33:23,973 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-02-06 19:33:23,973 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 53 states and 65 transitions. [2025-02-06 19:33:23,973 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-02-06 19:33:23,973 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:33:23,973 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:33:23,974 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [11, 10, 1, 1, 1, 1, 1, 1] [2025-02-06 19:33:23,974 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-02-06 19:33:23,974 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-02-06 19:33:23,974 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-02-06 19:33:23,974 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:33:23,975 INFO L85 PathProgramCache]: Analyzing trace with hash 1663544037, now seen corresponding path program 3 times [2025-02-06 19:33:23,975 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:33:23,975 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [145807826] [2025-02-06 19:33:23,975 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:33:23,975 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:33:23,979 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 27 statements into 11 equivalence classes. [2025-02-06 19:33:23,988 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) and asserted 27 of 27 statements. [2025-02-06 19:33:23,988 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2025-02-06 19:33:23,988 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:33:24,164 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:33:24,164 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:33:24,164 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [145807826] [2025-02-06 19:33:24,164 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [145807826] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:33:24,165 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1103587651] [2025-02-06 19:33:24,165 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:33:24,165 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:33:24,165 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:33:24,169 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:33:24,171 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2025-02-06 19:33:24,198 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 27 statements into 11 equivalence classes. [2025-02-06 19:33:24,212 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) and asserted 27 of 27 statements. [2025-02-06 19:33:24,212 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2025-02-06 19:33:24,213 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:33:24,214 INFO L256 TraceCheckSpWp]: Trace formula consists of 74 conjuncts, 12 conjuncts are in the unsatisfiable core [2025-02-06 19:33:24,215 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:33:24,292 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:33:24,292 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:33:24,564 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:33:24,565 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1103587651] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:33:24,565 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:33:24,565 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 24 [2025-02-06 19:33:24,565 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [559327231] [2025-02-06 19:33:24,565 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:33:24,565 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:33:24,565 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:33:24,566 INFO L85 PathProgramCache]: Analyzing trace with hash 69, now seen corresponding path program 7 times [2025-02-06 19:33:24,566 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:33:24,566 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1376502297] [2025-02-06 19:33:24,566 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-02-06 19:33:24,566 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:33:24,567 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-06 19:33:24,567 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-06 19:33:24,568 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:33:24,568 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:24,568 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:33:24,568 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-06 19:33:24,568 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-06 19:33:24,568 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:33:24,568 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:24,568 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:33:24,570 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:33:24,571 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2025-02-06 19:33:24,571 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2025-02-06 19:33:24,571 INFO L87 Difference]: Start difference. First operand 53 states and 65 transitions. cyclomatic complexity: 15 Second operand has 25 states, 24 states have (on average 2.3333333333333335) internal successors, (56), 25 states have internal predecessors, (56), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:33:24,760 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:33:24,760 INFO L93 Difference]: Finished difference Result 541 states and 578 transitions. [2025-02-06 19:33:24,760 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 541 states and 578 transitions. [2025-02-06 19:33:24,765 INFO L131 ngComponentsAnalysis]: Automaton has 13 accepting balls. 13 [2025-02-06 19:33:24,771 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 541 states to 517 states and 554 transitions. [2025-02-06 19:33:24,771 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 46 [2025-02-06 19:33:24,771 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 46 [2025-02-06 19:33:24,771 INFO L73 IsDeterministic]: Start isDeterministic. Operand 517 states and 554 transitions. [2025-02-06 19:33:24,772 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:33:24,772 INFO L218 hiAutomatonCegarLoop]: Abstraction has 517 states and 554 transitions. [2025-02-06 19:33:24,773 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 517 states and 554 transitions. [2025-02-06 19:33:24,784 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 517 to 77. [2025-02-06 19:33:24,784 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 77 states, 77 states have (on average 1.3116883116883118) internal successors, (101), 76 states have internal predecessors, (101), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:33:24,785 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 101 transitions. [2025-02-06 19:33:24,785 INFO L240 hiAutomatonCegarLoop]: Abstraction has 77 states and 101 transitions. [2025-02-06 19:33:24,787 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2025-02-06 19:33:24,787 INFO L432 stractBuchiCegarLoop]: Abstraction has 77 states and 101 transitions. [2025-02-06 19:33:24,787 INFO L338 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2025-02-06 19:33:24,788 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 77 states and 101 transitions. [2025-02-06 19:33:24,788 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-02-06 19:33:24,788 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:33:24,788 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:33:24,789 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [11, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:33:24,789 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-02-06 19:33:24,789 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume !(main_~i~0#1 >= 100);main_~j~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume !(0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet3#1;" "assume main_~j~0#1 >= 100;" [2025-02-06 19:33:24,789 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-02-06 19:33:24,789 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:33:24,789 INFO L85 PathProgramCache]: Analyzing trace with hash -685125856, now seen corresponding path program 3 times [2025-02-06 19:33:24,789 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:33:24,789 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [386640174] [2025-02-06 19:33:24,790 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:33:24,790 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:33:24,797 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 31 statements into 11 equivalence classes. [2025-02-06 19:33:24,816 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) and asserted 31 of 31 statements. [2025-02-06 19:33:24,816 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2025-02-06 19:33:24,816 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:33:24,968 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:33:24,969 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:33:24,969 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [386640174] [2025-02-06 19:33:24,969 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [386640174] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:33:24,969 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [237153533] [2025-02-06 19:33:24,969 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:33:24,969 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:33:24,969 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:33:24,971 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:33:24,973 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2025-02-06 19:33:25,002 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 31 statements into 11 equivalence classes. [2025-02-06 19:33:25,016 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) and asserted 31 of 31 statements. [2025-02-06 19:33:25,017 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2025-02-06 19:33:25,017 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:33:25,018 INFO L256 TraceCheckSpWp]: Trace formula consists of 100 conjuncts, 12 conjuncts are in the unsatisfiable core [2025-02-06 19:33:25,020 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:33:25,063 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:33:25,063 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:33:25,283 INFO L134 CoverageAnalysis]: Checked inductivity of 110 backedges. 0 proven. 110 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:33:25,283 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [237153533] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:33:25,283 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:33:25,283 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12] total 24 [2025-02-06 19:33:25,283 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [875434479] [2025-02-06 19:33:25,283 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:33:25,283 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:33:25,283 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:33:25,284 INFO L85 PathProgramCache]: Analyzing trace with hash 69, now seen corresponding path program 8 times [2025-02-06 19:33:25,284 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:33:25,284 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [795870931] [2025-02-06 19:33:25,284 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:33:25,284 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:33:25,285 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-02-06 19:33:25,285 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-06 19:33:25,285 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:33:25,285 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:25,285 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:33:25,286 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-06 19:33:25,286 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-06 19:33:25,286 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:33:25,286 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:25,286 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:33:25,288 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:33:25,289 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2025-02-06 19:33:25,289 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2025-02-06 19:33:25,289 INFO L87 Difference]: Start difference. First operand 77 states and 101 transitions. cyclomatic complexity: 27 Second operand has 25 states, 24 states have (on average 2.5) internal successors, (60), 25 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:33:25,324 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:33:25,324 INFO L93 Difference]: Finished difference Result 126 states and 150 transitions. [2025-02-06 19:33:25,324 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 126 states and 150 transitions. [2025-02-06 19:33:25,326 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-02-06 19:33:25,326 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 126 states to 102 states and 126 transitions. [2025-02-06 19:33:25,326 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2025-02-06 19:33:25,326 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2025-02-06 19:33:25,326 INFO L73 IsDeterministic]: Start isDeterministic. Operand 102 states and 126 transitions. [2025-02-06 19:33:25,327 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:33:25,327 INFO L218 hiAutomatonCegarLoop]: Abstraction has 102 states and 126 transitions. [2025-02-06 19:33:25,327 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states and 126 transitions. [2025-02-06 19:33:25,329 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 101. [2025-02-06 19:33:25,330 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 101 states, 101 states have (on average 1.2376237623762376) internal successors, (125), 100 states have internal predecessors, (125), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:33:25,330 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 125 transitions. [2025-02-06 19:33:25,330 INFO L240 hiAutomatonCegarLoop]: Abstraction has 101 states and 125 transitions. [2025-02-06 19:33:25,331 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2025-02-06 19:33:25,331 INFO L432 stractBuchiCegarLoop]: Abstraction has 101 states and 125 transitions. [2025-02-06 19:33:25,331 INFO L338 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2025-02-06 19:33:25,331 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 101 states and 125 transitions. [2025-02-06 19:33:25,332 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-02-06 19:33:25,332 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:33:25,332 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:33:25,333 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [23, 22, 1, 1, 1, 1, 1, 1] [2025-02-06 19:33:25,333 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-02-06 19:33:25,333 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-02-06 19:33:25,333 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-02-06 19:33:25,334 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:33:25,334 INFO L85 PathProgramCache]: Analyzing trace with hash -1351287183, now seen corresponding path program 4 times [2025-02-06 19:33:25,334 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:33:25,334 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1166668286] [2025-02-06 19:33:25,334 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 19:33:25,334 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:33:25,340 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 51 statements into 2 equivalence classes. [2025-02-06 19:33:25,348 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 51 of 51 statements. [2025-02-06 19:33:25,348 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-06 19:33:25,348 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:33:25,805 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:33:25,805 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:33:25,805 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1166668286] [2025-02-06 19:33:25,805 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1166668286] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:33:25,805 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2114036002] [2025-02-06 19:33:25,805 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 19:33:25,805 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:33:25,805 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:33:25,808 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:33:25,810 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2025-02-06 19:33:25,845 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 51 statements into 2 equivalence classes. [2025-02-06 19:33:25,860 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 51 of 51 statements. [2025-02-06 19:33:25,860 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-06 19:33:25,860 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:33:25,861 INFO L256 TraceCheckSpWp]: Trace formula consists of 134 conjuncts, 24 conjuncts are in the unsatisfiable core [2025-02-06 19:33:25,863 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:33:25,942 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:33:25,943 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:33:26,730 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:33:26,730 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2114036002] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:33:26,730 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:33:26,730 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24] total 47 [2025-02-06 19:33:26,730 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [53584831] [2025-02-06 19:33:26,730 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:33:26,731 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:33:26,731 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:33:26,731 INFO L85 PathProgramCache]: Analyzing trace with hash 69, now seen corresponding path program 9 times [2025-02-06 19:33:26,731 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:33:26,732 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1883900490] [2025-02-06 19:33:26,732 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:33:26,732 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:33:26,733 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 1 statements into 1 equivalence classes. [2025-02-06 19:33:26,733 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-06 19:33:26,734 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-06 19:33:26,734 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:26,734 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:33:26,734 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-06 19:33:26,734 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-06 19:33:26,734 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:33:26,734 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:26,735 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:33:26,737 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:33:26,738 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2025-02-06 19:33:26,739 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1128, Invalid=1128, Unknown=0, NotChecked=0, Total=2256 [2025-02-06 19:33:26,739 INFO L87 Difference]: Start difference. First operand 101 states and 125 transitions. cyclomatic complexity: 27 Second operand has 48 states, 47 states have (on average 2.127659574468085) internal successors, (100), 48 states have internal predecessors, (100), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:33:27,204 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:33:27,204 INFO L93 Difference]: Finished difference Result 1945 states and 2018 transitions. [2025-02-06 19:33:27,205 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1945 states and 2018 transitions. [2025-02-06 19:33:27,219 INFO L131 ngComponentsAnalysis]: Automaton has 25 accepting balls. 25 [2025-02-06 19:33:27,232 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1945 states to 1897 states and 1970 transitions. [2025-02-06 19:33:27,232 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 82 [2025-02-06 19:33:27,233 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 82 [2025-02-06 19:33:27,233 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1897 states and 1970 transitions. [2025-02-06 19:33:27,234 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:33:27,234 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1897 states and 1970 transitions. [2025-02-06 19:33:27,235 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1897 states and 1970 transitions. [2025-02-06 19:33:27,252 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1897 to 149. [2025-02-06 19:33:27,253 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 149 states, 149 states have (on average 1.3221476510067114) internal successors, (197), 148 states have internal predecessors, (197), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:33:27,257 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 197 transitions. [2025-02-06 19:33:27,257 INFO L240 hiAutomatonCegarLoop]: Abstraction has 149 states and 197 transitions. [2025-02-06 19:33:27,259 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2025-02-06 19:33:27,260 INFO L432 stractBuchiCegarLoop]: Abstraction has 149 states and 197 transitions. [2025-02-06 19:33:27,260 INFO L338 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2025-02-06 19:33:27,260 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 149 states and 197 transitions. [2025-02-06 19:33:27,261 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-02-06 19:33:27,261 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:33:27,261 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:33:27,262 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [23, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:33:27,262 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-02-06 19:33:27,262 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume !(main_~i~0#1 >= 100);main_~j~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume !(0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet3#1;" "assume main_~j~0#1 >= 100;" [2025-02-06 19:33:27,262 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-02-06 19:33:27,263 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:33:27,263 INFO L85 PathProgramCache]: Analyzing trace with hash -1755738196, now seen corresponding path program 4 times [2025-02-06 19:33:27,263 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:33:27,263 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1031726986] [2025-02-06 19:33:27,263 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 19:33:27,263 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:33:27,268 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 55 statements into 2 equivalence classes. [2025-02-06 19:33:27,277 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 55 of 55 statements. [2025-02-06 19:33:27,278 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-06 19:33:27,278 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:33:27,712 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:33:27,713 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:33:27,713 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1031726986] [2025-02-06 19:33:27,713 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1031726986] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:33:27,713 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [192238963] [2025-02-06 19:33:27,713 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 19:33:27,713 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:33:27,713 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:33:27,716 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:33:27,717 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2025-02-06 19:33:27,743 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 55 statements into 2 equivalence classes. [2025-02-06 19:33:27,760 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 55 of 55 statements. [2025-02-06 19:33:27,760 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-06 19:33:27,760 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:33:27,761 INFO L256 TraceCheckSpWp]: Trace formula consists of 184 conjuncts, 24 conjuncts are in the unsatisfiable core [2025-02-06 19:33:27,763 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:33:27,839 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:33:27,840 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:33:28,622 INFO L134 CoverageAnalysis]: Checked inductivity of 506 backedges. 0 proven. 506 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:33:28,623 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [192238963] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:33:28,623 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:33:28,623 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24] total 48 [2025-02-06 19:33:28,623 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1734537736] [2025-02-06 19:33:28,623 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:33:28,623 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:33:28,623 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:33:28,623 INFO L85 PathProgramCache]: Analyzing trace with hash 69, now seen corresponding path program 10 times [2025-02-06 19:33:28,623 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:33:28,624 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1184759130] [2025-02-06 19:33:28,624 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 19:33:28,624 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:33:28,625 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 1 statements into 2 equivalence classes. [2025-02-06 19:33:28,626 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 1 of 1 statements. [2025-02-06 19:33:28,626 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-06 19:33:28,626 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:28,626 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:33:28,626 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-06 19:33:28,626 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-06 19:33:28,627 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:33:28,627 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:28,627 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:33:28,629 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:33:28,629 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2025-02-06 19:33:28,630 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2025-02-06 19:33:28,631 INFO L87 Difference]: Start difference. First operand 149 states and 197 transitions. cyclomatic complexity: 51 Second operand has 49 states, 48 states have (on average 2.25) internal successors, (108), 49 states have internal predecessors, (108), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:33:28,701 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:33:28,701 INFO L93 Difference]: Finished difference Result 246 states and 294 transitions. [2025-02-06 19:33:28,701 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 246 states and 294 transitions. [2025-02-06 19:33:28,703 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-02-06 19:33:28,704 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 246 states to 198 states and 246 transitions. [2025-02-06 19:33:28,704 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2025-02-06 19:33:28,704 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2025-02-06 19:33:28,704 INFO L73 IsDeterministic]: Start isDeterministic. Operand 198 states and 246 transitions. [2025-02-06 19:33:28,706 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:33:28,706 INFO L218 hiAutomatonCegarLoop]: Abstraction has 198 states and 246 transitions. [2025-02-06 19:33:28,707 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 198 states and 246 transitions. [2025-02-06 19:33:28,709 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 198 to 197. [2025-02-06 19:33:28,713 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 197 states, 197 states have (on average 1.2436548223350254) internal successors, (245), 196 states have internal predecessors, (245), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:33:28,714 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 197 states to 197 states and 245 transitions. [2025-02-06 19:33:28,714 INFO L240 hiAutomatonCegarLoop]: Abstraction has 197 states and 245 transitions. [2025-02-06 19:33:28,715 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2025-02-06 19:33:28,716 INFO L432 stractBuchiCegarLoop]: Abstraction has 197 states and 245 transitions. [2025-02-06 19:33:28,716 INFO L338 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2025-02-06 19:33:28,716 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 197 states and 245 transitions. [2025-02-06 19:33:28,717 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-02-06 19:33:28,717 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:33:28,717 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:33:28,718 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [47, 46, 1, 1, 1, 1, 1, 1] [2025-02-06 19:33:28,718 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-02-06 19:33:28,720 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-02-06 19:33:28,721 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-02-06 19:33:28,721 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:33:28,721 INFO L85 PathProgramCache]: Analyzing trace with hash 312408457, now seen corresponding path program 5 times [2025-02-06 19:33:28,721 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:33:28,721 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1947028269] [2025-02-06 19:33:28,721 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-06 19:33:28,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:33:28,727 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 99 statements into 47 equivalence classes. [2025-02-06 19:33:28,771 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) and asserted 99 of 99 statements. [2025-02-06 19:33:28,771 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2025-02-06 19:33:28,771 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:33:30,159 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:33:30,160 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:33:30,160 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1947028269] [2025-02-06 19:33:30,160 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1947028269] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:33:30,160 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1512365866] [2025-02-06 19:33:30,160 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-06 19:33:30,160 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:33:30,160 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:33:30,162 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:33:30,163 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2025-02-06 19:33:30,194 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 99 statements into 47 equivalence classes. [2025-02-06 19:33:30,236 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) and asserted 99 of 99 statements. [2025-02-06 19:33:30,237 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2025-02-06 19:33:30,237 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:33:30,238 INFO L256 TraceCheckSpWp]: Trace formula consists of 254 conjuncts, 48 conjuncts are in the unsatisfiable core [2025-02-06 19:33:30,241 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:33:30,403 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:33:30,404 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:33:32,744 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:33:32,744 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1512365866] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:33:32,744 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:33:32,744 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 48, 48] total 95 [2025-02-06 19:33:32,745 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1705206052] [2025-02-06 19:33:32,745 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:33:32,745 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:33:32,746 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:33:32,746 INFO L85 PathProgramCache]: Analyzing trace with hash 69, now seen corresponding path program 11 times [2025-02-06 19:33:32,746 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:33:32,746 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [419573557] [2025-02-06 19:33:32,746 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-06 19:33:32,746 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:33:32,749 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-02-06 19:33:32,749 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-06 19:33:32,749 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:33:32,749 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:32,749 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:33:32,750 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-06 19:33:32,750 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-06 19:33:32,750 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:33:32,750 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:32,750 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:33:32,753 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:33:32,755 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 96 interpolants. [2025-02-06 19:33:32,759 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=4560, Invalid=4560, Unknown=0, NotChecked=0, Total=9120 [2025-02-06 19:33:32,759 INFO L87 Difference]: Start difference. First operand 197 states and 245 transitions. cyclomatic complexity: 51 Second operand has 96 states, 95 states have (on average 2.0631578947368423) internal successors, (196), 96 states have internal predecessors, (196), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:33:34,745 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:33:34,745 INFO L93 Difference]: Finished difference Result 7345 states and 7490 transitions. [2025-02-06 19:33:34,746 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 7345 states and 7490 transitions. [2025-02-06 19:33:34,805 INFO L131 ngComponentsAnalysis]: Automaton has 49 accepting balls. 49 [2025-02-06 19:33:34,838 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 7345 states to 7249 states and 7394 transitions. [2025-02-06 19:33:34,839 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 154 [2025-02-06 19:33:34,839 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 154 [2025-02-06 19:33:34,839 INFO L73 IsDeterministic]: Start isDeterministic. Operand 7249 states and 7394 transitions. [2025-02-06 19:33:34,845 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:33:34,845 INFO L218 hiAutomatonCegarLoop]: Abstraction has 7249 states and 7394 transitions. [2025-02-06 19:33:34,850 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7249 states and 7394 transitions. [2025-02-06 19:33:34,885 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7249 to 293. [2025-02-06 19:33:34,885 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 293 states, 293 states have (on average 1.3276450511945392) internal successors, (389), 292 states have internal predecessors, (389), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:33:34,886 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 293 states to 293 states and 389 transitions. [2025-02-06 19:33:34,886 INFO L240 hiAutomatonCegarLoop]: Abstraction has 293 states and 389 transitions. [2025-02-06 19:33:34,887 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2025-02-06 19:33:34,889 INFO L432 stractBuchiCegarLoop]: Abstraction has 293 states and 389 transitions. [2025-02-06 19:33:34,889 INFO L338 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2025-02-06 19:33:34,890 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 293 states and 389 transitions. [2025-02-06 19:33:34,891 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-02-06 19:33:34,891 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:33:34,892 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:33:34,893 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [47, 46, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:33:34,896 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-02-06 19:33:34,897 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume !(main_~i~0#1 >= 100);main_~j~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume !(0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet3#1;" "assume main_~j~0#1 >= 100;" [2025-02-06 19:33:34,897 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-02-06 19:33:34,898 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:33:34,898 INFO L85 PathProgramCache]: Analyzing trace with hash -140286780, now seen corresponding path program 5 times [2025-02-06 19:33:34,898 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:33:34,898 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1224500258] [2025-02-06 19:33:34,898 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-06 19:33:34,899 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:33:34,909 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 103 statements into 47 equivalence classes. [2025-02-06 19:33:34,969 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) and asserted 103 of 103 statements. [2025-02-06 19:33:34,969 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2025-02-06 19:33:34,969 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:33:36,330 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:33:36,330 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:33:36,330 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1224500258] [2025-02-06 19:33:36,330 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1224500258] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:33:36,330 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [740689805] [2025-02-06 19:33:36,330 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-06 19:33:36,330 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:33:36,330 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:33:36,334 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:33:36,335 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2025-02-06 19:33:36,372 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 103 statements into 47 equivalence classes. [2025-02-06 19:33:36,435 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) and asserted 103 of 103 statements. [2025-02-06 19:33:36,436 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2025-02-06 19:33:36,436 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:33:36,437 INFO L256 TraceCheckSpWp]: Trace formula consists of 352 conjuncts, 48 conjuncts are in the unsatisfiable core [2025-02-06 19:33:36,440 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:33:36,593 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:33:36,593 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:33:38,804 INFO L134 CoverageAnalysis]: Checked inductivity of 2162 backedges. 0 proven. 2162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:33:38,804 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [740689805] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:33:38,804 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:33:38,804 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 48, 48] total 95 [2025-02-06 19:33:38,804 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1035068735] [2025-02-06 19:33:38,804 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:33:38,805 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:33:38,805 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:33:38,805 INFO L85 PathProgramCache]: Analyzing trace with hash 69, now seen corresponding path program 12 times [2025-02-06 19:33:38,805 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:33:38,805 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [557291371] [2025-02-06 19:33:38,805 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-06 19:33:38,805 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:33:38,806 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 1 statements into 1 equivalence classes. [2025-02-06 19:33:38,807 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-06 19:33:38,807 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-02-06 19:33:38,807 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:38,807 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:33:38,807 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-06 19:33:38,807 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-06 19:33:38,807 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:33:38,807 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:38,808 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:33:38,813 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:33:38,814 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 96 interpolants. [2025-02-06 19:33:38,817 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=4560, Invalid=4560, Unknown=0, NotChecked=0, Total=9120 [2025-02-06 19:33:38,817 INFO L87 Difference]: Start difference. First operand 293 states and 389 transitions. cyclomatic complexity: 99 Second operand has 96 states, 95 states have (on average 2.1052631578947367) internal successors, (200), 96 states have internal predecessors, (200), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:33:39,020 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:33:39,020 INFO L93 Difference]: Finished difference Result 486 states and 582 transitions. [2025-02-06 19:33:39,020 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 486 states and 582 transitions. [2025-02-06 19:33:39,022 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-02-06 19:33:39,024 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 486 states to 390 states and 486 transitions. [2025-02-06 19:33:39,024 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2025-02-06 19:33:39,024 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2025-02-06 19:33:39,024 INFO L73 IsDeterministic]: Start isDeterministic. Operand 390 states and 486 transitions. [2025-02-06 19:33:39,024 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:33:39,024 INFO L218 hiAutomatonCegarLoop]: Abstraction has 390 states and 486 transitions. [2025-02-06 19:33:39,025 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 390 states and 486 transitions. [2025-02-06 19:33:39,029 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 390 to 389. [2025-02-06 19:33:39,029 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 389 states, 389 states have (on average 1.2467866323907455) internal successors, (485), 388 states have internal predecessors, (485), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:33:39,030 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 389 states to 389 states and 485 transitions. [2025-02-06 19:33:39,031 INFO L240 hiAutomatonCegarLoop]: Abstraction has 389 states and 485 transitions. [2025-02-06 19:33:39,032 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 96 states. [2025-02-06 19:33:39,032 INFO L432 stractBuchiCegarLoop]: Abstraction has 389 states and 485 transitions. [2025-02-06 19:33:39,032 INFO L338 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2025-02-06 19:33:39,032 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 389 states and 485 transitions. [2025-02-06 19:33:39,034 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-02-06 19:33:39,034 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:33:39,034 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:33:39,037 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [95, 94, 1, 1, 1, 1, 1, 1] [2025-02-06 19:33:39,039 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-02-06 19:33:39,039 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-02-06 19:33:39,039 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-02-06 19:33:39,040 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:33:39,040 INFO L85 PathProgramCache]: Analyzing trace with hash -822067271, now seen corresponding path program 6 times [2025-02-06 19:33:39,040 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:33:39,040 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1574189876] [2025-02-06 19:33:39,040 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-06 19:33:39,040 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:33:39,048 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 195 statements into 95 equivalence classes. [2025-02-06 19:33:39,138 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) and asserted 195 of 195 statements. [2025-02-06 19:33:39,138 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) [2025-02-06 19:33:39,138 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:33:43,281 INFO L134 CoverageAnalysis]: Checked inductivity of 8930 backedges. 0 proven. 8930 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:33:43,281 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:33:43,281 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1574189876] [2025-02-06 19:33:43,281 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1574189876] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:33:43,281 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1136398688] [2025-02-06 19:33:43,281 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-06 19:33:43,282 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:33:43,282 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:33:43,284 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:33:43,286 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2025-02-06 19:33:43,328 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 195 statements into 95 equivalence classes. [2025-02-06 19:33:43,422 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) and asserted 195 of 195 statements. [2025-02-06 19:33:43,423 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) [2025-02-06 19:33:43,423 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:33:43,426 INFO L256 TraceCheckSpWp]: Trace formula consists of 494 conjuncts, 96 conjuncts are in the unsatisfiable core [2025-02-06 19:33:43,430 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:33:43,681 INFO L134 CoverageAnalysis]: Checked inductivity of 8930 backedges. 0 proven. 8930 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:33:43,681 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:33:47,408 INFO L134 CoverageAnalysis]: Checked inductivity of 8930 backedges. 0 proven. 8930 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:33:47,408 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1136398688] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:33:47,408 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:33:47,408 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [96, 96, 96] total 102 [2025-02-06 19:33:47,409 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1672390076] [2025-02-06 19:33:47,409 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:33:47,409 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:33:47,409 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:33:47,410 INFO L85 PathProgramCache]: Analyzing trace with hash 69, now seen corresponding path program 13 times [2025-02-06 19:33:47,410 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:33:47,410 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1077579704] [2025-02-06 19:33:47,410 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-02-06 19:33:47,410 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:33:47,411 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-06 19:33:47,411 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-06 19:33:47,411 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:33:47,412 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:47,412 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:33:47,412 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-06 19:33:47,412 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-06 19:33:47,412 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:33:47,412 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:47,413 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:33:47,414 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:33:47,415 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 103 interpolants. [2025-02-06 19:33:47,417 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5253, Invalid=5253, Unknown=0, NotChecked=0, Total=10506 [2025-02-06 19:33:47,418 INFO L87 Difference]: Start difference. First operand 389 states and 485 transitions. cyclomatic complexity: 99 Second operand has 103 states, 102 states have (on average 2.088235294117647) internal successors, (213), 103 states have internal predecessors, (213), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:33:49,187 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:33:49,187 INFO L93 Difference]: Finished difference Result 10693 states and 10802 transitions. [2025-02-06 19:33:49,187 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 10693 states and 10802 transitions. [2025-02-06 19:33:49,227 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 7 [2025-02-06 19:33:49,308 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 10693 states to 10681 states and 10790 transitions. [2025-02-06 19:33:49,308 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 28 [2025-02-06 19:33:49,308 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 28 [2025-02-06 19:33:49,308 INFO L73 IsDeterministic]: Start isDeterministic. Operand 10681 states and 10790 transitions. [2025-02-06 19:33:49,321 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:33:49,321 INFO L218 hiAutomatonCegarLoop]: Abstraction has 10681 states and 10790 transitions. [2025-02-06 19:33:49,328 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 10681 states and 10790 transitions. [2025-02-06 19:33:49,373 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 10681 to 401. [2025-02-06 19:33:49,374 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 401 states, 401 states have (on average 1.254364089775561) internal successors, (503), 400 states have internal predecessors, (503), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:33:49,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 401 states to 401 states and 503 transitions. [2025-02-06 19:33:49,377 INFO L240 hiAutomatonCegarLoop]: Abstraction has 401 states and 503 transitions. [2025-02-06 19:33:49,377 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 102 states. [2025-02-06 19:33:49,378 INFO L432 stractBuchiCegarLoop]: Abstraction has 401 states and 503 transitions. [2025-02-06 19:33:49,378 INFO L338 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2025-02-06 19:33:49,378 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 401 states and 503 transitions. [2025-02-06 19:33:49,379 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-02-06 19:33:49,379 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:33:49,379 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:33:49,381 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [95, 94, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:33:49,383 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-02-06 19:33:49,383 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume !(main_~i~0#1 >= 100);main_~j~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume 0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet3#1;main_#t~post4#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post4#1;havoc main_#t~post4#1;main_#t~post5#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post5#1;havoc main_#t~post5#1;" "assume true;havoc main_#t~nondet3#1;" "assume !(0 != main_#t~nondet3#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet3#1;" "assume main_~j~0#1 >= 100;" [2025-02-06 19:33:49,383 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-02-06 19:33:49,384 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:33:49,384 INFO L85 PathProgramCache]: Analyzing trace with hash -810524940, now seen corresponding path program 6 times [2025-02-06 19:33:49,384 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:33:49,384 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1527462156] [2025-02-06 19:33:49,384 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-06 19:33:49,384 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:33:49,397 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 199 statements into 95 equivalence classes. [2025-02-06 19:33:49,489 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) and asserted 199 of 199 statements. [2025-02-06 19:33:49,489 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) [2025-02-06 19:33:49,489 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:33:53,704 INFO L134 CoverageAnalysis]: Checked inductivity of 8930 backedges. 0 proven. 8930 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:33:53,705 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:33:53,705 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1527462156] [2025-02-06 19:33:53,705 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1527462156] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-06 19:33:53,705 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [478149357] [2025-02-06 19:33:53,705 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-06 19:33:53,705 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-06 19:33:53,705 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:33:53,707 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-06 19:33:53,709 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2025-02-06 19:33:53,761 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 199 statements into 95 equivalence classes. [2025-02-06 19:33:53,858 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) and asserted 199 of 199 statements. [2025-02-06 19:33:53,858 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) [2025-02-06 19:33:53,858 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:33:53,861 INFO L256 TraceCheckSpWp]: Trace formula consists of 688 conjuncts, 96 conjuncts are in the unsatisfiable core [2025-02-06 19:33:53,866 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-06 19:33:54,110 INFO L134 CoverageAnalysis]: Checked inductivity of 8930 backedges. 0 proven. 8930 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:33:54,110 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-06 19:33:57,609 INFO L134 CoverageAnalysis]: Checked inductivity of 8930 backedges. 0 proven. 8930 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:33:57,610 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [478149357] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-06 19:33:57,610 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-06 19:33:57,610 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [96, 96, 96] total 102 [2025-02-06 19:33:57,610 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2013419929] [2025-02-06 19:33:57,610 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-06 19:33:57,611 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-06 19:33:57,611 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:33:57,611 INFO L85 PathProgramCache]: Analyzing trace with hash 69, now seen corresponding path program 14 times [2025-02-06 19:33:57,611 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:33:57,611 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [457800934] [2025-02-06 19:33:57,611 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:33:57,611 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:33:57,613 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-02-06 19:33:57,613 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-06 19:33:57,613 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:33:57,613 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:57,613 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:33:57,614 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-06 19:33:57,614 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-06 19:33:57,614 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:33:57,614 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:57,614 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:33:57,616 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:33:57,617 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 103 interpolants. [2025-02-06 19:33:57,619 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5253, Invalid=5253, Unknown=0, NotChecked=0, Total=10506 [2025-02-06 19:33:57,619 INFO L87 Difference]: Start difference. First operand 401 states and 503 transitions. cyclomatic complexity: 105 Second operand has 103 states, 102 states have (on average 2.127450980392157) internal successors, (217), 103 states have internal predecessors, (217), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:33:57,722 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:33:57,723 INFO L93 Difference]: Finished difference Result 426 states and 528 transitions. [2025-02-06 19:33:57,723 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 426 states and 528 transitions. [2025-02-06 19:33:57,724 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-02-06 19:33:57,725 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 426 states to 414 states and 516 transitions. [2025-02-06 19:33:57,725 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2025-02-06 19:33:57,725 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2025-02-06 19:33:57,725 INFO L73 IsDeterministic]: Start isDeterministic. Operand 414 states and 516 transitions. [2025-02-06 19:33:57,725 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-06 19:33:57,725 INFO L218 hiAutomatonCegarLoop]: Abstraction has 414 states and 516 transitions. [2025-02-06 19:33:57,726 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 414 states and 516 transitions. [2025-02-06 19:33:57,729 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 414 to 413. [2025-02-06 19:33:57,730 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 413 states, 413 states have (on average 1.2469733656174333) internal successors, (515), 412 states have internal predecessors, (515), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:33:57,731 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 413 states to 413 states and 515 transitions. [2025-02-06 19:33:57,731 INFO L240 hiAutomatonCegarLoop]: Abstraction has 413 states and 515 transitions. [2025-02-06 19:33:57,735 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 102 states. [2025-02-06 19:33:57,736 INFO L432 stractBuchiCegarLoop]: Abstraction has 413 states and 515 transitions. [2025-02-06 19:33:57,736 INFO L338 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2025-02-06 19:33:57,736 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 413 states and 515 transitions. [2025-02-06 19:33:57,737 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 1 [2025-02-06 19:33:57,737 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:33:57,737 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:33:57,738 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [101, 100, 1, 1, 1, 1, 1, 1] [2025-02-06 19:33:57,738 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1] [2025-02-06 19:33:57,739 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(9, 2);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet1#1, main_#t~post2#1, main_#t~nondet3#1, main_#t~post4#1, main_#t~post5#1, main_~i~0#1, main_~j~0#1;havoc main_~i~0#1;havoc main_~j~0#1;" "main_~i~0#1 := 0;" "assume true;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume 0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000;havoc main_#t~nondet1#1;main_#t~post2#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post2#1;havoc main_#t~post2#1;" "assume true;havoc main_#t~nondet1#1;" "assume !(0 != main_#t~nondet1#1 && main_~i~0#1 < 1000000);havoc main_#t~nondet1#1;" "assume main_~i~0#1 >= 100;" [2025-02-06 19:33:57,739 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" [2025-02-06 19:33:57,740 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:33:57,740 INFO L85 PathProgramCache]: Analyzing trace with hash -1638078465, now seen corresponding path program 7 times [2025-02-06 19:33:57,740 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:33:57,740 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2031345311] [2025-02-06 19:33:57,740 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-02-06 19:33:57,740 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:33:57,748 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 207 statements into 1 equivalence classes. [2025-02-06 19:33:57,778 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 207 of 207 statements. [2025-02-06 19:33:57,779 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:33:57,779 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:57,779 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:33:57,784 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 207 statements into 1 equivalence classes. [2025-02-06 19:33:57,818 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 207 of 207 statements. [2025-02-06 19:33:57,819 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:33:57,819 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:57,838 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:33:57,841 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:33:57,842 INFO L85 PathProgramCache]: Analyzing trace with hash 69, now seen corresponding path program 15 times [2025-02-06 19:33:57,842 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:33:57,842 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1137278585] [2025-02-06 19:33:57,842 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:33:57,842 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:33:57,844 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 1 statements into 1 equivalence classes. [2025-02-06 19:33:57,844 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-06 19:33:57,844 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-06 19:33:57,844 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:57,844 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:33:57,844 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-06 19:33:57,845 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-06 19:33:57,845 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:33:57,845 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:57,845 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:33:57,845 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:33:57,845 INFO L85 PathProgramCache]: Analyzing trace with hash 759175175, now seen corresponding path program 1 times [2025-02-06 19:33:57,846 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:33:57,846 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [187691558] [2025-02-06 19:33:57,846 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:33:57,846 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:33:57,858 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 208 statements into 1 equivalence classes. [2025-02-06 19:33:57,910 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 208 of 208 statements. [2025-02-06 19:33:57,910 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:33:57,911 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:57,911 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:33:57,914 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 208 statements into 1 equivalence classes. [2025-02-06 19:33:57,939 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 208 of 208 statements. [2025-02-06 19:33:57,940 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:33:57,940 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:33:57,959 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:34:03,159 WARN L286 SmtUtils]: Spent 5.17s on a formula simplification. DAG size of input: 735 DAG size of output: 630 (called from [L 276] de.uni_freiburg.informatik.ultimate.lib.modelcheckerutils.cfg.transitions.TransFormulaUtils.sequentialComposition) [2025-02-06 19:34:06,296 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 207 statements into 1 equivalence classes. [2025-02-06 19:34:06,325 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 207 of 207 statements. [2025-02-06 19:34:06,325 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:34:06,325 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:34:06,325 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:34:06,352 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 207 statements into 1 equivalence classes. [2025-02-06 19:34:06,381 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 207 of 207 statements. [2025-02-06 19:34:06,381 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:34:06,381 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:34:06,540 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 06.02 07:34:06 BoogieIcfgContainer [2025-02-06 19:34:06,541 INFO L131 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2025-02-06 19:34:06,541 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-02-06 19:34:06,541 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-02-06 19:34:06,541 INFO L274 PluginConnector]: Witness Printer initialized [2025-02-06 19:34:06,542 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 06.02 07:33:21" (3/4) ... [2025-02-06 19:34:06,544 INFO L143 WitnessPrinter]: Generating witness for non-termination counterexample [2025-02-06 19:34:06,616 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/witness.graphml [2025-02-06 19:34:06,616 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-02-06 19:34:06,617 INFO L158 Benchmark]: Toolchain (without parser) took 45190.67ms. Allocated memory was 167.8MB in the beginning and 738.2MB in the end (delta: 570.4MB). Free memory was 121.6MB in the beginning and 457.4MB in the end (delta: -335.8MB). Peak memory consumption was 233.9MB. Max. memory is 16.1GB. [2025-02-06 19:34:06,617 INFO L158 Benchmark]: CDTParser took 0.38ms. Allocated memory is still 201.3MB. Free memory is still 119.8MB. There was no memory consumed. Max. memory is 16.1GB. [2025-02-06 19:34:06,617 INFO L158 Benchmark]: CACSL2BoogieTranslator took 201.45ms. Allocated memory is still 167.8MB. Free memory was 121.6MB in the beginning and 110.8MB in the end (delta: 10.9MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-02-06 19:34:06,617 INFO L158 Benchmark]: Boogie Procedure Inliner took 23.80ms. Allocated memory is still 167.8MB. Free memory was 110.8MB in the beginning and 109.9MB in the end (delta: 887.4kB). There was no memory consumed. Max. memory is 16.1GB. [2025-02-06 19:34:06,617 INFO L158 Benchmark]: Boogie Preprocessor took 28.04ms. Allocated memory is still 167.8MB. Free memory was 109.9MB in the beginning and 108.6MB in the end (delta: 1.3MB). There was no memory consumed. Max. memory is 16.1GB. [2025-02-06 19:34:06,618 INFO L158 Benchmark]: IcfgBuilder took 221.40ms. Allocated memory is still 167.8MB. Free memory was 108.6MB in the beginning and 98.2MB in the end (delta: 10.4MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-02-06 19:34:06,618 INFO L158 Benchmark]: BuchiAutomizer took 44636.29ms. Allocated memory was 167.8MB in the beginning and 738.2MB in the end (delta: 570.4MB). Free memory was 98.2MB in the beginning and 461.9MB in the end (delta: -363.7MB). Peak memory consumption was 200.3MB. Max. memory is 16.1GB. [2025-02-06 19:34:06,618 INFO L158 Benchmark]: Witness Printer took 74.94ms. Allocated memory is still 738.2MB. Free memory was 461.9MB in the beginning and 457.4MB in the end (delta: 4.4MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-02-06 19:34:06,619 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.38ms. Allocated memory is still 201.3MB. Free memory is still 119.8MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 201.45ms. Allocated memory is still 167.8MB. Free memory was 121.6MB in the beginning and 110.8MB in the end (delta: 10.9MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 23.80ms. Allocated memory is still 167.8MB. Free memory was 110.8MB in the beginning and 109.9MB in the end (delta: 887.4kB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 28.04ms. Allocated memory is still 167.8MB. Free memory was 109.9MB in the beginning and 108.6MB in the end (delta: 1.3MB). There was no memory consumed. Max. memory is 16.1GB. * IcfgBuilder took 221.40ms. Allocated memory is still 167.8MB. Free memory was 108.6MB in the beginning and 98.2MB in the end (delta: 10.4MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * BuchiAutomizer took 44636.29ms. Allocated memory was 167.8MB in the beginning and 738.2MB in the end (delta: 570.4MB). Free memory was 98.2MB in the beginning and 461.9MB in the end (delta: -363.7MB). Peak memory consumption was 200.3MB. Max. memory is 16.1GB. * Witness Printer took 74.94ms. Allocated memory is still 738.2MB. Free memory was 461.9MB in the beginning and 457.4MB in the end (delta: 4.4MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 15 terminating modules (14 trivial, 1 deterministic, 0 nondeterministic) and one nonterminating remainder module.One deterministic module has affine ranking function (((long long) -2 * i) + 1999999) and consists of 4 locations. 14 modules have a trivial ranking function, the largest among these consists of 103 locations. The remainder module has 413 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 44.4s and 16 iterations. TraceHistogramMax:101. Analysis of lassos took 38.5s. Construction of modules took 1.6s. Büchi inclusion checks took 4.1s. Highest rank in rank-based complementation 3. Minimization of det autom 0. Minimization of nondet autom 15. Automata minimization 0.2s AutomataMinimizationTime, 15 MinimizatonAttempts, 19595 StatesRemovedByMinimization, 15 NontrivialMinimizations. Non-live state removal took 0.2s Buchi closure took 0.0s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [1, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 5177 SdHoareTripleChecker+Valid, 2.0s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 5176 mSDsluCounter, 1895 SdHoareTripleChecker+Invalid, 1.6s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 1717 mSDsCounter, 1212 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 1672 IncrementalHoareTripleChecker+Invalid, 2884 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 1212 mSolverCounterUnsat, 178 mSDtfsCounter, 1672 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont1 unkn0 SFLI0 SFLT1 conc0 concLT0 SILN14 SILU0 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: Lassos: inital10 mio100 ax100 hnf100 lsp100 ukn100 mio100 lsp100 div100 bol100 ite100 ukn100 eq160 hnf93 smp100 dnf100 smp100 tf113 neg100 sie100 LassoTerminationAnalysisBenchmarks: ConstraintsSatisfiability: sat Degree: 0 Time: 56ms VariablesStem: 0 VariablesLoop: 2 DisjunctsStem: 1 DisjunctsLoop: 1 SupportingInvariants: 0 MotzkinApplications: 2 LassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 1 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - LassoShapedNonTerminationArgument [Line: 24]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite program execution. Stem: [L25] int i, j; [L27] i = 0 VAL [i=0] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=1] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=2] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=3] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=4] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=5] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=6] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=7] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=8] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=9] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=10] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=11] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=12] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=13] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=14] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=15] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=16] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=17] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=18] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=19] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=20] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=21] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=22] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=23] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=24] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=25] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=26] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=27] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=28] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=29] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=30] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=31] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=32] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=33] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=34] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=35] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=36] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=37] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=38] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=39] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=40] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=41] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=42] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=43] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=44] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=45] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=46] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=47] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=48] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=49] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=50] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=51] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=52] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=53] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=54] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=55] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=56] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=57] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=58] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=59] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=60] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=61] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=62] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=63] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=64] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=65] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=66] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=67] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=68] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=69] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=70] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=71] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=72] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=73] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=74] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=75] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=76] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=77] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=78] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=79] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=80] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=81] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=82] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=83] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=84] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=85] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=86] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=87] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=88] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=89] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=90] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=91] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=92] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=93] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=94] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=95] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=96] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=97] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=98] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=99] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=100] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND FALSE !(__VERIFIER_nondet_int() && i < 1000000) [L32] COND TRUE i >= 100 Loop: [L39] goto STUCK; End of lasso representation. - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 24]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L25] int i, j; [L27] i = 0 VAL [i=0] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=1] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=2] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=3] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=4] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=5] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=6] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=7] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=8] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=9] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=10] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=11] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=12] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=13] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=14] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=15] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=16] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=17] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=18] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=19] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=20] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=21] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=22] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=23] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=24] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=25] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=26] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=27] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=28] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=29] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=30] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=31] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=32] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=33] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=34] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=35] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=36] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=37] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=38] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=39] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=40] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=41] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=42] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=43] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=44] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=45] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=46] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=47] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=48] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=49] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=50] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=51] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=52] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=53] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=54] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=55] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=56] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=57] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=58] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=59] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=60] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=61] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=62] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=63] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=64] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=65] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=66] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=67] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=68] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=69] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=70] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=71] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=72] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=73] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=74] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=75] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=76] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=77] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=78] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=79] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=80] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=81] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=82] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=83] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=84] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=85] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=86] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=87] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=88] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=89] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=90] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=91] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=92] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=93] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=94] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=95] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=96] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=97] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=98] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=99] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L30] i++ VAL [i=100] [L29] COND TRUE __VERIFIER_nondet_int() && i < 1000000 [L29] COND FALSE !(__VERIFIER_nondet_int() && i < 1000000) [L32] COND TRUE i >= 100 Loop: [L39] goto STUCK; End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2025-02-06 19:34:06,649 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Ended with exit code 0 [2025-02-06 19:34:06,843 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Ended with exit code 0 [2025-02-06 19:34:07,043 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Ended with exit code 0 [2025-02-06 19:34:07,243 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Ended with exit code 0 [2025-02-06 19:34:07,444 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Ended with exit code 0 [2025-02-06 19:34:07,643 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Ended with exit code 0 [2025-02-06 19:34:07,843 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Ended with exit code 0 [2025-02-06 19:34:08,044 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2025-02-06 19:34:08,244 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2025-02-06 19:34:08,444 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2025-02-06 19:34:08,644 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2025-02-06 19:34:08,845 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2025-02-06 19:34:09,047 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM)