./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/locks/test_locks_10.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version c00e63dc Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/locks/test_locks_10.c -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash c861265e1e1e27fe23877e47c41012b82996e1c7e91f362716a115cbf38b786b --- Real Ultimate output --- This is Ultimate 0.3.0-?-c00e63d-m [2025-02-06 19:12:40,100 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-02-06 19:12:40,154 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2025-02-06 19:12:40,158 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-02-06 19:12:40,158 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-02-06 19:12:40,159 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-02-06 19:12:40,179 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-02-06 19:12:40,180 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-02-06 19:12:40,180 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-02-06 19:12:40,181 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-02-06 19:12:40,181 INFO L153 SettingsManager]: * Use memory slicer=true [2025-02-06 19:12:40,182 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-02-06 19:12:40,182 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-02-06 19:12:40,182 INFO L153 SettingsManager]: * Use SBE=true [2025-02-06 19:12:40,182 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-02-06 19:12:40,182 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-02-06 19:12:40,182 INFO L153 SettingsManager]: * Use old map elimination=false [2025-02-06 19:12:40,182 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-02-06 19:12:40,183 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-02-06 19:12:40,183 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-02-06 19:12:40,183 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-02-06 19:12:40,183 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-02-06 19:12:40,183 INFO L153 SettingsManager]: * sizeof long=4 [2025-02-06 19:12:40,183 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-02-06 19:12:40,183 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-02-06 19:12:40,183 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-02-06 19:12:40,183 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-02-06 19:12:40,183 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-02-06 19:12:40,183 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-02-06 19:12:40,183 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-02-06 19:12:40,184 INFO L153 SettingsManager]: * sizeof long double=12 [2025-02-06 19:12:40,184 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-02-06 19:12:40,184 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-02-06 19:12:40,184 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-02-06 19:12:40,184 INFO L153 SettingsManager]: * Use constant arrays=true [2025-02-06 19:12:40,184 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-02-06 19:12:40,184 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-02-06 19:12:40,184 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-02-06 19:12:40,184 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-02-06 19:12:40,185 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-02-06 19:12:40,185 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> c861265e1e1e27fe23877e47c41012b82996e1c7e91f362716a115cbf38b786b [2025-02-06 19:12:40,407 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-02-06 19:12:40,414 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-02-06 19:12:40,415 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-02-06 19:12:40,418 INFO L270 PluginConnector]: Initializing CDTParser... [2025-02-06 19:12:40,418 INFO L274 PluginConnector]: CDTParser initialized [2025-02-06 19:12:40,419 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/locks/test_locks_10.c [2025-02-06 19:12:41,551 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/1370a6d0e/1e204e170de54583b81d08ec38404c7b/FLAGbe96fcf37 [2025-02-06 19:12:41,762 INFO L384 CDTParser]: Found 1 translation units. [2025-02-06 19:12:41,764 INFO L180 CDTParser]: Scanning /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/locks/test_locks_10.c [2025-02-06 19:12:41,778 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/1370a6d0e/1e204e170de54583b81d08ec38404c7b/FLAGbe96fcf37 [2025-02-06 19:12:41,826 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/1370a6d0e/1e204e170de54583b81d08ec38404c7b [2025-02-06 19:12:41,828 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-02-06 19:12:41,829 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-02-06 19:12:41,831 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-02-06 19:12:41,831 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-02-06 19:12:41,834 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-02-06 19:12:41,834 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.02 07:12:41" (1/1) ... [2025-02-06 19:12:41,835 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@25ef5e88 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:41, skipping insertion in model container [2025-02-06 19:12:41,835 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.02 07:12:41" (1/1) ... [2025-02-06 19:12:41,852 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-02-06 19:12:41,969 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-06 19:12:41,979 INFO L200 MainTranslator]: Completed pre-run [2025-02-06 19:12:41,999 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-06 19:12:42,011 INFO L204 MainTranslator]: Completed translation [2025-02-06 19:12:42,012 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:42 WrapperNode [2025-02-06 19:12:42,012 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-02-06 19:12:42,013 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-02-06 19:12:42,013 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-02-06 19:12:42,013 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-02-06 19:12:42,016 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:42" (1/1) ... [2025-02-06 19:12:42,021 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:42" (1/1) ... [2025-02-06 19:12:42,031 INFO L138 Inliner]: procedures = 12, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 135 [2025-02-06 19:12:42,031 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-02-06 19:12:42,031 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-02-06 19:12:42,032 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-02-06 19:12:42,032 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-02-06 19:12:42,037 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:42" (1/1) ... [2025-02-06 19:12:42,037 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:42" (1/1) ... [2025-02-06 19:12:42,038 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:42" (1/1) ... [2025-02-06 19:12:42,047 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-02-06 19:12:42,047 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:42" (1/1) ... [2025-02-06 19:12:42,047 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:42" (1/1) ... [2025-02-06 19:12:42,050 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:42" (1/1) ... [2025-02-06 19:12:42,050 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:42" (1/1) ... [2025-02-06 19:12:42,051 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:42" (1/1) ... [2025-02-06 19:12:42,051 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:42" (1/1) ... [2025-02-06 19:12:42,052 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-02-06 19:12:42,052 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-02-06 19:12:42,053 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-02-06 19:12:42,053 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-02-06 19:12:42,053 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:42" (1/1) ... [2025-02-06 19:12:42,057 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:12:42,066 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:12:42,077 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:12:42,079 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-02-06 19:12:42,093 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-02-06 19:12:42,094 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-02-06 19:12:42,094 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-02-06 19:12:42,094 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-02-06 19:12:42,130 INFO L257 CfgBuilder]: Building ICFG [2025-02-06 19:12:42,132 INFO L287 CfgBuilder]: Building CFG for each procedure with an implementation [2025-02-06 19:12:42,286 INFO L? ?]: Removed 24 outVars from TransFormulas that were not future-live. [2025-02-06 19:12:42,286 INFO L308 CfgBuilder]: Performing block encoding [2025-02-06 19:12:42,293 INFO L332 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-02-06 19:12:42,293 INFO L337 CfgBuilder]: Removed 0 assume(true) statements. [2025-02-06 19:12:42,293 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 06.02 07:12:42 BoogieIcfgContainer [2025-02-06 19:12:42,293 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-02-06 19:12:42,294 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-02-06 19:12:42,294 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-02-06 19:12:42,298 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-02-06 19:12:42,298 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-06 19:12:42,298 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 06.02 07:12:41" (1/3) ... [2025-02-06 19:12:42,299 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2b142c3a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.02 07:12:42, skipping insertion in model container [2025-02-06 19:12:42,299 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-06 19:12:42,299 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:42" (2/3) ... [2025-02-06 19:12:42,299 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@2b142c3a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.02 07:12:42, skipping insertion in model container [2025-02-06 19:12:42,299 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-06 19:12:42,299 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 06.02 07:12:42" (3/3) ... [2025-02-06 19:12:42,300 INFO L363 chiAutomizerObserver]: Analyzing ICFG test_locks_10.c [2025-02-06 19:12:42,333 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-02-06 19:12:42,333 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-02-06 19:12:42,333 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-02-06 19:12:42,333 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-02-06 19:12:42,333 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-02-06 19:12:42,333 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-02-06 19:12:42,333 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-02-06 19:12:42,333 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-02-06 19:12:42,336 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 40 states, 39 states have (on average 1.8205128205128205) internal successors, (71), 39 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:42,345 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 32 [2025-02-06 19:12:42,345 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:12:42,345 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:12:42,349 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 19:12:42,349 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:12:42,349 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-02-06 19:12:42,349 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 40 states, 39 states have (on average 1.8205128205128205) internal successors, (71), 39 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:42,351 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 32 [2025-02-06 19:12:42,351 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:12:42,351 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:12:42,351 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 19:12:42,351 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:12:42,355 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_~cond~0#1;" [2025-02-06 19:12:42,355 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet14#1;main_~cond~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;" "assume 0 != main_~p1~0#1;main_~lk1~0#1 := 1;" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" [2025-02-06 19:12:42,358 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:42,359 INFO L85 PathProgramCache]: Analyzing trace with hash 4288, now seen corresponding path program 1 times [2025-02-06 19:12:42,363 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:42,363 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1553959702] [2025-02-06 19:12:42,363 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:12:42,364 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:42,409 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:42,416 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:42,416 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:42,416 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:42,416 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:12:42,421 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:42,422 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:42,423 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:42,423 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:42,438 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:12:42,439 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:42,440 INFO L85 PathProgramCache]: Analyzing trace with hash -177478061, now seen corresponding path program 1 times [2025-02-06 19:12:42,440 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:42,440 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [472340587] [2025-02-06 19:12:42,440 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:12:42,440 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:42,449 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 22 statements into 1 equivalence classes. [2025-02-06 19:12:42,454 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 22 of 22 statements. [2025-02-06 19:12:42,455 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:42,455 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:12:42,543 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:12:42,543 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:12:42,543 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [472340587] [2025-02-06 19:12:42,543 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [472340587] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:12:42,544 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:12:42,544 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:12:42,544 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [799166022] [2025-02-06 19:12:42,544 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:12:42,548 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:12:42,548 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:12:42,567 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:12:42,567 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:12:42,569 INFO L87 Difference]: Start difference. First operand has 40 states, 39 states have (on average 1.8205128205128205) internal successors, (71), 39 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:42,599 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:12:42,600 INFO L93 Difference]: Finished difference Result 73 states and 129 transitions. [2025-02-06 19:12:42,600 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 73 states and 129 transitions. [2025-02-06 19:12:42,602 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 63 [2025-02-06 19:12:42,606 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 73 states to 65 states and 103 transitions. [2025-02-06 19:12:42,608 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 65 [2025-02-06 19:12:42,608 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 65 [2025-02-06 19:12:42,608 INFO L73 IsDeterministic]: Start isDeterministic. Operand 65 states and 103 transitions. [2025-02-06 19:12:42,609 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:12:42,609 INFO L218 hiAutomatonCegarLoop]: Abstraction has 65 states and 103 transitions. [2025-02-06 19:12:42,616 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65 states and 103 transitions. [2025-02-06 19:12:42,623 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65 to 65. [2025-02-06 19:12:42,624 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 65 states, 65 states have (on average 1.5846153846153845) internal successors, (103), 64 states have internal predecessors, (103), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:42,625 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 103 transitions. [2025-02-06 19:12:42,626 INFO L240 hiAutomatonCegarLoop]: Abstraction has 65 states and 103 transitions. [2025-02-06 19:12:42,626 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:12:42,630 INFO L432 stractBuchiCegarLoop]: Abstraction has 65 states and 103 transitions. [2025-02-06 19:12:42,630 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-02-06 19:12:42,630 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 65 states and 103 transitions. [2025-02-06 19:12:42,633 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 63 [2025-02-06 19:12:42,634 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:12:42,634 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:12:42,634 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 19:12:42,634 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:12:42,634 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_~cond~0#1;" [2025-02-06 19:12:42,634 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet14#1;main_~cond~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" [2025-02-06 19:12:42,635 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:42,635 INFO L85 PathProgramCache]: Analyzing trace with hash 4288, now seen corresponding path program 2 times [2025-02-06 19:12:42,635 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:42,635 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [767019193] [2025-02-06 19:12:42,635 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:12:42,635 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:42,638 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:42,640 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:42,640 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:12:42,640 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:42,640 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:12:42,641 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:42,644 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:42,644 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:42,644 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:42,645 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:12:42,645 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:42,646 INFO L85 PathProgramCache]: Analyzing trace with hash -586302286, now seen corresponding path program 1 times [2025-02-06 19:12:42,646 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:42,646 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1473420677] [2025-02-06 19:12:42,646 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:12:42,646 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:42,650 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 22 statements into 1 equivalence classes. [2025-02-06 19:12:42,653 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 22 of 22 statements. [2025-02-06 19:12:42,653 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:42,653 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:12:42,688 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:12:42,690 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:12:42,690 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1473420677] [2025-02-06 19:12:42,690 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1473420677] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:12:42,690 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:12:42,690 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:12:42,690 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [572038311] [2025-02-06 19:12:42,690 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:12:42,691 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:12:42,691 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:12:42,691 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:12:42,691 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:12:42,692 INFO L87 Difference]: Start difference. First operand 65 states and 103 transitions. cyclomatic complexity: 40 Second operand has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:42,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:12:42,709 INFO L93 Difference]: Finished difference Result 126 states and 198 transitions. [2025-02-06 19:12:42,709 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 126 states and 198 transitions. [2025-02-06 19:12:42,711 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 124 [2025-02-06 19:12:42,712 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 126 states to 126 states and 198 transitions. [2025-02-06 19:12:42,712 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 126 [2025-02-06 19:12:42,712 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 126 [2025-02-06 19:12:42,712 INFO L73 IsDeterministic]: Start isDeterministic. Operand 126 states and 198 transitions. [2025-02-06 19:12:42,714 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:12:42,714 INFO L218 hiAutomatonCegarLoop]: Abstraction has 126 states and 198 transitions. [2025-02-06 19:12:42,714 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states and 198 transitions. [2025-02-06 19:12:42,721 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 126. [2025-02-06 19:12:42,722 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 126 states, 126 states have (on average 1.5714285714285714) internal successors, (198), 125 states have internal predecessors, (198), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:42,722 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 198 transitions. [2025-02-06 19:12:42,723 INFO L240 hiAutomatonCegarLoop]: Abstraction has 126 states and 198 transitions. [2025-02-06 19:12:42,726 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:12:42,726 INFO L432 stractBuchiCegarLoop]: Abstraction has 126 states and 198 transitions. [2025-02-06 19:12:42,726 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-02-06 19:12:42,726 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 126 states and 198 transitions. [2025-02-06 19:12:42,727 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 124 [2025-02-06 19:12:42,727 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:12:42,727 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:12:42,728 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 19:12:42,728 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:12:42,728 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_~cond~0#1;" [2025-02-06 19:12:42,728 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet14#1;main_~cond~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" [2025-02-06 19:12:42,728 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:42,728 INFO L85 PathProgramCache]: Analyzing trace with hash 4288, now seen corresponding path program 3 times [2025-02-06 19:12:42,728 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:42,728 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [291090540] [2025-02-06 19:12:42,728 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:12:42,728 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:42,735 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:42,738 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:42,738 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-06 19:12:42,738 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:42,738 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:12:42,739 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:42,740 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:42,740 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:42,740 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:42,745 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:12:42,745 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:42,745 INFO L85 PathProgramCache]: Analyzing trace with hash -1430774157, now seen corresponding path program 1 times [2025-02-06 19:12:42,745 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:42,746 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1008595425] [2025-02-06 19:12:42,746 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:12:42,746 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:42,752 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 22 statements into 1 equivalence classes. [2025-02-06 19:12:42,756 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 22 of 22 statements. [2025-02-06 19:12:42,759 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:42,759 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:12:42,799 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:12:42,799 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:12:42,799 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1008595425] [2025-02-06 19:12:42,799 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1008595425] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:12:42,799 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:12:42,799 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:12:42,800 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [933745904] [2025-02-06 19:12:42,800 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:12:42,800 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:12:42,800 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:12:42,800 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:12:42,800 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:12:42,801 INFO L87 Difference]: Start difference. First operand 126 states and 198 transitions. cyclomatic complexity: 76 Second operand has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:42,818 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:12:42,818 INFO L93 Difference]: Finished difference Result 246 states and 382 transitions. [2025-02-06 19:12:42,819 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 246 states and 382 transitions. [2025-02-06 19:12:42,823 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 244 [2025-02-06 19:12:42,824 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 246 states to 246 states and 382 transitions. [2025-02-06 19:12:42,824 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 246 [2025-02-06 19:12:42,825 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 246 [2025-02-06 19:12:42,825 INFO L73 IsDeterministic]: Start isDeterministic. Operand 246 states and 382 transitions. [2025-02-06 19:12:42,826 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:12:42,826 INFO L218 hiAutomatonCegarLoop]: Abstraction has 246 states and 382 transitions. [2025-02-06 19:12:42,827 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 246 states and 382 transitions. [2025-02-06 19:12:42,840 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 246 to 246. [2025-02-06 19:12:42,840 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 246 states, 246 states have (on average 1.5528455284552845) internal successors, (382), 245 states have internal predecessors, (382), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:42,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 246 states to 246 states and 382 transitions. [2025-02-06 19:12:42,842 INFO L240 hiAutomatonCegarLoop]: Abstraction has 246 states and 382 transitions. [2025-02-06 19:12:42,842 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:12:42,843 INFO L432 stractBuchiCegarLoop]: Abstraction has 246 states and 382 transitions. [2025-02-06 19:12:42,843 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-02-06 19:12:42,843 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 246 states and 382 transitions. [2025-02-06 19:12:42,844 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 244 [2025-02-06 19:12:42,844 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:12:42,844 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:12:42,845 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 19:12:42,845 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:12:42,845 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_~cond~0#1;" [2025-02-06 19:12:42,845 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet14#1;main_~cond~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" [2025-02-06 19:12:42,845 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:42,845 INFO L85 PathProgramCache]: Analyzing trace with hash 4288, now seen corresponding path program 4 times [2025-02-06 19:12:42,845 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:42,845 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [853337299] [2025-02-06 19:12:42,845 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 19:12:42,845 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:42,851 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-02-06 19:12:42,853 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:42,854 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-06 19:12:42,854 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:42,854 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:12:42,859 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:42,860 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:42,860 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:42,860 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:42,861 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:12:42,866 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:42,866 INFO L85 PathProgramCache]: Analyzing trace with hash 1867120786, now seen corresponding path program 1 times [2025-02-06 19:12:42,866 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:42,866 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [161335761] [2025-02-06 19:12:42,866 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:12:42,866 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:42,869 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 22 statements into 1 equivalence classes. [2025-02-06 19:12:42,873 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 22 of 22 statements. [2025-02-06 19:12:42,874 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:42,874 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:12:42,901 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:12:42,901 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:12:42,901 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [161335761] [2025-02-06 19:12:42,901 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [161335761] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:12:42,902 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:12:42,902 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:12:42,902 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [756285407] [2025-02-06 19:12:42,902 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:12:42,902 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:12:42,902 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:12:42,902 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:12:42,902 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:12:42,903 INFO L87 Difference]: Start difference. First operand 246 states and 382 transitions. cyclomatic complexity: 144 Second operand has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:42,925 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:12:42,925 INFO L93 Difference]: Finished difference Result 482 states and 738 transitions. [2025-02-06 19:12:42,925 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 482 states and 738 transitions. [2025-02-06 19:12:42,928 INFO L131 ngComponentsAnalysis]: Automaton has 16 accepting balls. 480 [2025-02-06 19:12:42,932 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 482 states to 482 states and 738 transitions. [2025-02-06 19:12:42,932 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 482 [2025-02-06 19:12:42,933 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 482 [2025-02-06 19:12:42,933 INFO L73 IsDeterministic]: Start isDeterministic. Operand 482 states and 738 transitions. [2025-02-06 19:12:42,934 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:12:42,934 INFO L218 hiAutomatonCegarLoop]: Abstraction has 482 states and 738 transitions. [2025-02-06 19:12:42,939 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 482 states and 738 transitions. [2025-02-06 19:12:42,957 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 482 to 482. [2025-02-06 19:12:42,958 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 482 states, 482 states have (on average 1.5311203319502074) internal successors, (738), 481 states have internal predecessors, (738), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:42,961 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 482 states to 482 states and 738 transitions. [2025-02-06 19:12:42,962 INFO L240 hiAutomatonCegarLoop]: Abstraction has 482 states and 738 transitions. [2025-02-06 19:12:42,963 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:12:42,963 INFO L432 stractBuchiCegarLoop]: Abstraction has 482 states and 738 transitions. [2025-02-06 19:12:42,963 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-02-06 19:12:42,963 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 482 states and 738 transitions. [2025-02-06 19:12:42,965 INFO L131 ngComponentsAnalysis]: Automaton has 16 accepting balls. 480 [2025-02-06 19:12:42,965 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:12:42,965 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:12:42,966 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 19:12:42,966 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:12:42,966 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_~cond~0#1;" [2025-02-06 19:12:42,966 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet14#1;main_~cond~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" [2025-02-06 19:12:42,966 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:42,966 INFO L85 PathProgramCache]: Analyzing trace with hash 4288, now seen corresponding path program 5 times [2025-02-06 19:12:42,967 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:42,967 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1677578195] [2025-02-06 19:12:42,967 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-06 19:12:42,967 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:42,970 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:42,976 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:42,976 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:12:42,976 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:42,976 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:12:42,977 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:42,978 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:42,978 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:42,978 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:42,982 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:12:42,982 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:42,982 INFO L85 PathProgramCache]: Analyzing trace with hash -1074536813, now seen corresponding path program 1 times [2025-02-06 19:12:42,982 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:42,982 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1028962161] [2025-02-06 19:12:42,982 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:12:42,982 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:42,989 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 22 statements into 1 equivalence classes. [2025-02-06 19:12:42,996 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 22 of 22 statements. [2025-02-06 19:12:42,997 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:42,997 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:12:43,018 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:12:43,019 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:12:43,019 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1028962161] [2025-02-06 19:12:43,019 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1028962161] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:12:43,019 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:12:43,019 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:12:43,019 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [852453180] [2025-02-06 19:12:43,019 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:12:43,019 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:12:43,019 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:12:43,020 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:12:43,020 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:12:43,020 INFO L87 Difference]: Start difference. First operand 482 states and 738 transitions. cyclomatic complexity: 272 Second operand has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:43,042 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:12:43,042 INFO L93 Difference]: Finished difference Result 946 states and 1426 transitions. [2025-02-06 19:12:43,042 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 946 states and 1426 transitions. [2025-02-06 19:12:43,048 INFO L131 ngComponentsAnalysis]: Automaton has 32 accepting balls. 944 [2025-02-06 19:12:43,053 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 946 states to 946 states and 1426 transitions. [2025-02-06 19:12:43,054 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 946 [2025-02-06 19:12:43,054 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 946 [2025-02-06 19:12:43,055 INFO L73 IsDeterministic]: Start isDeterministic. Operand 946 states and 1426 transitions. [2025-02-06 19:12:43,056 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:12:43,058 INFO L218 hiAutomatonCegarLoop]: Abstraction has 946 states and 1426 transitions. [2025-02-06 19:12:43,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 946 states and 1426 transitions. [2025-02-06 19:12:43,069 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 946 to 946. [2025-02-06 19:12:43,087 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 946 states, 946 states have (on average 1.507399577167019) internal successors, (1426), 945 states have internal predecessors, (1426), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:43,090 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 946 states to 946 states and 1426 transitions. [2025-02-06 19:12:43,090 INFO L240 hiAutomatonCegarLoop]: Abstraction has 946 states and 1426 transitions. [2025-02-06 19:12:43,091 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:12:43,093 INFO L432 stractBuchiCegarLoop]: Abstraction has 946 states and 1426 transitions. [2025-02-06 19:12:43,093 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-02-06 19:12:43,093 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 946 states and 1426 transitions. [2025-02-06 19:12:43,097 INFO L131 ngComponentsAnalysis]: Automaton has 32 accepting balls. 944 [2025-02-06 19:12:43,097 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:12:43,097 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:12:43,097 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 19:12:43,097 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:12:43,097 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_~cond~0#1;" [2025-02-06 19:12:43,097 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet14#1;main_~cond~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" [2025-02-06 19:12:43,098 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:43,098 INFO L85 PathProgramCache]: Analyzing trace with hash 4288, now seen corresponding path program 6 times [2025-02-06 19:12:43,098 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:43,099 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1224712398] [2025-02-06 19:12:43,099 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-06 19:12:43,099 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:43,103 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:43,104 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:43,105 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-02-06 19:12:43,105 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:43,105 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:12:43,106 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:43,107 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:43,107 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:43,107 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:43,108 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:12:43,109 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:43,109 INFO L85 PathProgramCache]: Analyzing trace with hash -1585070990, now seen corresponding path program 1 times [2025-02-06 19:12:43,109 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:43,109 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1173744986] [2025-02-06 19:12:43,109 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:12:43,109 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:43,113 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 22 statements into 1 equivalence classes. [2025-02-06 19:12:43,116 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 22 of 22 statements. [2025-02-06 19:12:43,117 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:43,117 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:12:43,144 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:12:43,145 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:12:43,145 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1173744986] [2025-02-06 19:12:43,145 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1173744986] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:12:43,145 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:12:43,145 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:12:43,145 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [947827321] [2025-02-06 19:12:43,145 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:12:43,145 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:12:43,145 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:12:43,145 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:12:43,145 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:12:43,145 INFO L87 Difference]: Start difference. First operand 946 states and 1426 transitions. cyclomatic complexity: 512 Second operand has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:43,167 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:12:43,167 INFO L93 Difference]: Finished difference Result 1858 states and 2754 transitions. [2025-02-06 19:12:43,168 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1858 states and 2754 transitions. [2025-02-06 19:12:43,185 INFO L131 ngComponentsAnalysis]: Automaton has 64 accepting balls. 1856 [2025-02-06 19:12:43,194 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1858 states to 1858 states and 2754 transitions. [2025-02-06 19:12:43,194 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1858 [2025-02-06 19:12:43,199 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1858 [2025-02-06 19:12:43,199 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1858 states and 2754 transitions. [2025-02-06 19:12:43,201 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:12:43,202 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1858 states and 2754 transitions. [2025-02-06 19:12:43,203 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1858 states and 2754 transitions. [2025-02-06 19:12:43,221 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1858 to 1858. [2025-02-06 19:12:43,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1858 states, 1858 states have (on average 1.4822389666307858) internal successors, (2754), 1857 states have internal predecessors, (2754), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:43,229 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1858 states to 1858 states and 2754 transitions. [2025-02-06 19:12:43,229 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1858 states and 2754 transitions. [2025-02-06 19:12:43,230 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:12:43,231 INFO L432 stractBuchiCegarLoop]: Abstraction has 1858 states and 2754 transitions. [2025-02-06 19:12:43,231 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-02-06 19:12:43,231 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1858 states and 2754 transitions. [2025-02-06 19:12:43,239 INFO L131 ngComponentsAnalysis]: Automaton has 64 accepting balls. 1856 [2025-02-06 19:12:43,239 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:12:43,239 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:12:43,240 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 19:12:43,240 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:12:43,240 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_~cond~0#1;" [2025-02-06 19:12:43,240 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet14#1;main_~cond~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" [2025-02-06 19:12:43,240 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:43,240 INFO L85 PathProgramCache]: Analyzing trace with hash 4288, now seen corresponding path program 7 times [2025-02-06 19:12:43,241 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:43,241 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1047559409] [2025-02-06 19:12:43,241 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-02-06 19:12:43,241 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:43,244 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:43,246 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:43,246 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:43,246 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:43,246 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:12:43,248 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:43,249 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:43,250 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:43,250 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:43,251 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:12:43,253 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:43,253 INFO L85 PathProgramCache]: Analyzing trace with hash -77519181, now seen corresponding path program 1 times [2025-02-06 19:12:43,253 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:43,253 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2031881347] [2025-02-06 19:12:43,253 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:12:43,253 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:43,256 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 22 statements into 1 equivalence classes. [2025-02-06 19:12:43,260 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 22 of 22 statements. [2025-02-06 19:12:43,261 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:43,261 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:12:43,279 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:12:43,279 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:12:43,279 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2031881347] [2025-02-06 19:12:43,279 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2031881347] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:12:43,279 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:12:43,280 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:12:43,280 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [440010243] [2025-02-06 19:12:43,280 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:12:43,280 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:12:43,280 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:12:43,280 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:12:43,280 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:12:43,281 INFO L87 Difference]: Start difference. First operand 1858 states and 2754 transitions. cyclomatic complexity: 960 Second operand has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:43,303 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:12:43,303 INFO L93 Difference]: Finished difference Result 3650 states and 5314 transitions. [2025-02-06 19:12:43,303 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 3650 states and 5314 transitions. [2025-02-06 19:12:43,321 INFO L131 ngComponentsAnalysis]: Automaton has 128 accepting balls. 3648 [2025-02-06 19:12:43,334 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 3650 states to 3650 states and 5314 transitions. [2025-02-06 19:12:43,334 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 3650 [2025-02-06 19:12:43,336 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 3650 [2025-02-06 19:12:43,336 INFO L73 IsDeterministic]: Start isDeterministic. Operand 3650 states and 5314 transitions. [2025-02-06 19:12:43,340 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:12:43,340 INFO L218 hiAutomatonCegarLoop]: Abstraction has 3650 states and 5314 transitions. [2025-02-06 19:12:43,342 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3650 states and 5314 transitions. [2025-02-06 19:12:43,401 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3650 to 3650. [2025-02-06 19:12:43,405 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3650 states, 3650 states have (on average 1.4558904109589041) internal successors, (5314), 3649 states have internal predecessors, (5314), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:43,413 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3650 states to 3650 states and 5314 transitions. [2025-02-06 19:12:43,413 INFO L240 hiAutomatonCegarLoop]: Abstraction has 3650 states and 5314 transitions. [2025-02-06 19:12:43,414 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:12:43,415 INFO L432 stractBuchiCegarLoop]: Abstraction has 3650 states and 5314 transitions. [2025-02-06 19:12:43,415 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-02-06 19:12:43,415 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 3650 states and 5314 transitions. [2025-02-06 19:12:43,428 INFO L131 ngComponentsAnalysis]: Automaton has 128 accepting balls. 3648 [2025-02-06 19:12:43,428 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:12:43,428 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:12:43,429 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 19:12:43,430 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:12:43,430 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_~cond~0#1;" [2025-02-06 19:12:43,430 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet14#1;main_~cond~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" [2025-02-06 19:12:43,430 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:43,430 INFO L85 PathProgramCache]: Analyzing trace with hash 4288, now seen corresponding path program 8 times [2025-02-06 19:12:43,430 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:43,430 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [605811596] [2025-02-06 19:12:43,430 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:12:43,430 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:43,433 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:43,434 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:43,434 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:12:43,434 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:43,434 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:12:43,435 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:43,437 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:43,437 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:43,437 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:43,438 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:12:43,439 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:43,439 INFO L85 PathProgramCache]: Analyzing trace with hash -583077806, now seen corresponding path program 1 times [2025-02-06 19:12:43,439 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:43,439 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [920613793] [2025-02-06 19:12:43,439 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:12:43,439 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:43,445 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 22 statements into 1 equivalence classes. [2025-02-06 19:12:43,446 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 22 of 22 statements. [2025-02-06 19:12:43,446 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:43,446 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:12:43,463 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:12:43,464 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:12:43,464 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [920613793] [2025-02-06 19:12:43,464 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [920613793] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:12:43,464 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:12:43,464 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:12:43,464 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1674719531] [2025-02-06 19:12:43,464 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:12:43,464 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:12:43,464 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:12:43,464 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:12:43,464 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:12:43,464 INFO L87 Difference]: Start difference. First operand 3650 states and 5314 transitions. cyclomatic complexity: 1792 Second operand has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:43,497 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:12:43,497 INFO L93 Difference]: Finished difference Result 7170 states and 10242 transitions. [2025-02-06 19:12:43,498 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 7170 states and 10242 transitions. [2025-02-06 19:12:43,534 INFO L131 ngComponentsAnalysis]: Automaton has 256 accepting balls. 7168 [2025-02-06 19:12:43,560 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 7170 states to 7170 states and 10242 transitions. [2025-02-06 19:12:43,560 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7170 [2025-02-06 19:12:43,564 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7170 [2025-02-06 19:12:43,564 INFO L73 IsDeterministic]: Start isDeterministic. Operand 7170 states and 10242 transitions. [2025-02-06 19:12:43,569 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:12:43,569 INFO L218 hiAutomatonCegarLoop]: Abstraction has 7170 states and 10242 transitions. [2025-02-06 19:12:43,573 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7170 states and 10242 transitions. [2025-02-06 19:12:43,667 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7170 to 7170. [2025-02-06 19:12:43,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7170 states, 7170 states have (on average 1.4284518828451882) internal successors, (10242), 7169 states have internal predecessors, (10242), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:43,693 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7170 states to 7170 states and 10242 transitions. [2025-02-06 19:12:43,693 INFO L240 hiAutomatonCegarLoop]: Abstraction has 7170 states and 10242 transitions. [2025-02-06 19:12:43,693 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:12:43,693 INFO L432 stractBuchiCegarLoop]: Abstraction has 7170 states and 10242 transitions. [2025-02-06 19:12:43,693 INFO L338 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2025-02-06 19:12:43,694 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 7170 states and 10242 transitions. [2025-02-06 19:12:43,714 INFO L131 ngComponentsAnalysis]: Automaton has 256 accepting balls. 7168 [2025-02-06 19:12:43,715 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:12:43,715 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:12:43,715 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 19:12:43,715 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:12:43,715 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_~cond~0#1;" [2025-02-06 19:12:43,715 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet14#1;main_~cond~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" [2025-02-06 19:12:43,715 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:43,715 INFO L85 PathProgramCache]: Analyzing trace with hash 4288, now seen corresponding path program 9 times [2025-02-06 19:12:43,716 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:43,716 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2147134232] [2025-02-06 19:12:43,716 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:12:43,716 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:43,718 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:43,718 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:43,718 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-06 19:12:43,718 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:43,718 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:12:43,719 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:43,720 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:43,720 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:43,720 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:43,721 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:12:43,721 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:43,721 INFO L85 PathProgramCache]: Analyzing trace with hash -876480813, now seen corresponding path program 1 times [2025-02-06 19:12:43,721 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:43,721 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1260809265] [2025-02-06 19:12:43,721 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:12:43,721 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:43,723 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 22 statements into 1 equivalence classes. [2025-02-06 19:12:43,726 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 22 of 22 statements. [2025-02-06 19:12:43,726 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:43,726 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:12:43,739 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:12:43,739 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:12:43,739 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1260809265] [2025-02-06 19:12:43,739 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1260809265] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:12:43,739 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:12:43,740 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:12:43,740 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1764284215] [2025-02-06 19:12:43,740 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:12:43,740 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:12:43,740 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:12:43,740 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:12:43,740 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:12:43,740 INFO L87 Difference]: Start difference. First operand 7170 states and 10242 transitions. cyclomatic complexity: 3328 Second operand has 3 states, 3 states have (on average 7.333333333333333) internal successors, (22), 3 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:43,775 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:12:43,776 INFO L93 Difference]: Finished difference Result 14082 states and 19714 transitions. [2025-02-06 19:12:43,776 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 14082 states and 19714 transitions. [2025-02-06 19:12:43,862 INFO L131 ngComponentsAnalysis]: Automaton has 512 accepting balls. 14080 [2025-02-06 19:12:43,905 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 14082 states to 14082 states and 19714 transitions. [2025-02-06 19:12:43,905 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 14082 [2025-02-06 19:12:43,915 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 14082 [2025-02-06 19:12:43,915 INFO L73 IsDeterministic]: Start isDeterministic. Operand 14082 states and 19714 transitions. [2025-02-06 19:12:43,923 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:12:43,923 INFO L218 hiAutomatonCegarLoop]: Abstraction has 14082 states and 19714 transitions. [2025-02-06 19:12:43,931 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14082 states and 19714 transitions. [2025-02-06 19:12:44,075 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14082 to 14082. [2025-02-06 19:12:44,095 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14082 states, 14082 states have (on average 1.3999431898878) internal successors, (19714), 14081 states have internal predecessors, (19714), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:44,131 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14082 states to 14082 states and 19714 transitions. [2025-02-06 19:12:44,131 INFO L240 hiAutomatonCegarLoop]: Abstraction has 14082 states and 19714 transitions. [2025-02-06 19:12:44,131 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:12:44,132 INFO L432 stractBuchiCegarLoop]: Abstraction has 14082 states and 19714 transitions. [2025-02-06 19:12:44,132 INFO L338 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2025-02-06 19:12:44,132 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 14082 states and 19714 transitions. [2025-02-06 19:12:44,175 INFO L131 ngComponentsAnalysis]: Automaton has 512 accepting balls. 14080 [2025-02-06 19:12:44,175 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:12:44,176 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:12:44,176 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 19:12:44,176 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:12:44,176 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_~cond~0#1;" [2025-02-06 19:12:44,176 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet14#1;main_~cond~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" [2025-02-06 19:12:44,177 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:44,177 INFO L85 PathProgramCache]: Analyzing trace with hash 4288, now seen corresponding path program 10 times [2025-02-06 19:12:44,177 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:44,177 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1179268838] [2025-02-06 19:12:44,177 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 19:12:44,177 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:44,179 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-02-06 19:12:44,180 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:44,180 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-06 19:12:44,180 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:44,180 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:12:44,181 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:44,182 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:44,182 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:44,182 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:44,183 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:12:44,184 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:44,184 INFO L85 PathProgramCache]: Analyzing trace with hash -747398094, now seen corresponding path program 1 times [2025-02-06 19:12:44,184 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:44,184 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1128017400] [2025-02-06 19:12:44,184 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:12:44,184 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:44,186 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 22 statements into 1 equivalence classes. [2025-02-06 19:12:44,187 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 22 of 22 statements. [2025-02-06 19:12:44,187 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:44,187 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:12:44,202 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:12:44,203 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:12:44,203 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1128017400] [2025-02-06 19:12:44,203 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1128017400] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:12:44,203 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:12:44,203 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-02-06 19:12:44,204 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2129656970] [2025-02-06 19:12:44,205 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:12:44,205 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:12:44,205 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:12:44,205 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:12:44,205 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:12:44,205 INFO L87 Difference]: Start difference. First operand 14082 states and 19714 transitions. cyclomatic complexity: 6144 Second operand has 3 states, 2 states have (on average 11.0) internal successors, (22), 3 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:44,271 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:12:44,271 INFO L93 Difference]: Finished difference Result 27650 states and 37890 transitions. [2025-02-06 19:12:44,271 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27650 states and 37890 transitions. [2025-02-06 19:12:44,378 INFO L131 ngComponentsAnalysis]: Automaton has 1024 accepting balls. 27648 [2025-02-06 19:12:44,530 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27650 states to 27650 states and 37890 transitions. [2025-02-06 19:12:44,530 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 27650 [2025-02-06 19:12:44,545 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 27650 [2025-02-06 19:12:44,546 INFO L73 IsDeterministic]: Start isDeterministic. Operand 27650 states and 37890 transitions. [2025-02-06 19:12:44,557 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:12:44,557 INFO L218 hiAutomatonCegarLoop]: Abstraction has 27650 states and 37890 transitions. [2025-02-06 19:12:44,570 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27650 states and 37890 transitions. [2025-02-06 19:12:44,794 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27650 to 27650. [2025-02-06 19:12:44,836 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27650 states, 27650 states have (on average 1.3703435804701627) internal successors, (37890), 27649 states have internal predecessors, (37890), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:44,896 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27650 states to 27650 states and 37890 transitions. [2025-02-06 19:12:44,896 INFO L240 hiAutomatonCegarLoop]: Abstraction has 27650 states and 37890 transitions. [2025-02-06 19:12:44,896 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:12:44,897 INFO L432 stractBuchiCegarLoop]: Abstraction has 27650 states and 37890 transitions. [2025-02-06 19:12:44,897 INFO L338 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2025-02-06 19:12:44,897 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27650 states and 37890 transitions. [2025-02-06 19:12:45,015 INFO L131 ngComponentsAnalysis]: Automaton has 1024 accepting balls. 27648 [2025-02-06 19:12:45,015 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:12:45,015 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:12:45,016 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 19:12:45,016 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:12:45,016 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_~cond~0#1;" [2025-02-06 19:12:45,016 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet14#1;main_~cond~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" [2025-02-06 19:12:45,016 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:45,016 INFO L85 PathProgramCache]: Analyzing trace with hash 4288, now seen corresponding path program 11 times [2025-02-06 19:12:45,016 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:45,016 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1146119157] [2025-02-06 19:12:45,016 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-06 19:12:45,016 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:45,018 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:45,019 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:45,019 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:12:45,019 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:45,019 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:12:45,020 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:45,020 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:45,020 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:45,020 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:45,021 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:12:45,022 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:45,022 INFO L85 PathProgramCache]: Analyzing trace with hash 1750617843, now seen corresponding path program 1 times [2025-02-06 19:12:45,022 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:45,022 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1809380031] [2025-02-06 19:12:45,022 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:12:45,022 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:45,023 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 22 statements into 1 equivalence classes. [2025-02-06 19:12:45,024 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 22 of 22 statements. [2025-02-06 19:12:45,024 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:45,024 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:45,024 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:12:45,025 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 22 statements into 1 equivalence classes. [2025-02-06 19:12:45,025 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 22 of 22 statements. [2025-02-06 19:12:45,025 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:45,025 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:45,028 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:12:45,028 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:45,028 INFO L85 PathProgramCache]: Analyzing trace with hash -588401038, now seen corresponding path program 1 times [2025-02-06 19:12:45,028 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:45,028 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [760922518] [2025-02-06 19:12:45,028 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:12:45,028 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:45,030 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 24 statements into 1 equivalence classes. [2025-02-06 19:12:45,032 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 24 of 24 statements. [2025-02-06 19:12:45,032 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:45,032 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:45,032 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:12:45,033 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 24 statements into 1 equivalence classes. [2025-02-06 19:12:45,034 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 24 of 24 statements. [2025-02-06 19:12:45,034 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:45,034 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:45,036 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:12:45,375 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:45,376 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:45,376 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:45,376 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:45,376 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:12:45,379 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:45,380 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:45,380 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:45,380 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:45,404 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 06.02 07:12:45 BoogieIcfgContainer [2025-02-06 19:12:45,404 INFO L131 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2025-02-06 19:12:45,404 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-02-06 19:12:45,404 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-02-06 19:12:45,404 INFO L274 PluginConnector]: Witness Printer initialized [2025-02-06 19:12:45,405 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 06.02 07:12:42" (3/4) ... [2025-02-06 19:12:45,406 INFO L143 WitnessPrinter]: Generating witness for non-termination counterexample [2025-02-06 19:12:45,434 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/witness.graphml [2025-02-06 19:12:45,434 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-02-06 19:12:45,434 INFO L158 Benchmark]: Toolchain (without parser) took 3605.15ms. Allocated memory was 167.8MB in the beginning and 402.7MB in the end (delta: 234.9MB). Free memory was 124.7MB in the beginning and 115.7MB in the end (delta: 9.0MB). Peak memory consumption was 243.0MB. Max. memory is 16.1GB. [2025-02-06 19:12:45,435 INFO L158 Benchmark]: CDTParser took 0.17ms. Allocated memory is still 201.3MB. Free memory is still 118.1MB. There was no memory consumed. Max. memory is 16.1GB. [2025-02-06 19:12:45,435 INFO L158 Benchmark]: CACSL2BoogieTranslator took 181.26ms. Allocated memory is still 167.8MB. Free memory was 124.7MB in the beginning and 113.4MB in the end (delta: 11.3MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-02-06 19:12:45,435 INFO L158 Benchmark]: Boogie Procedure Inliner took 18.61ms. Allocated memory is still 167.8MB. Free memory was 113.4MB in the beginning and 112.0MB in the end (delta: 1.4MB). There was no memory consumed. Max. memory is 16.1GB. [2025-02-06 19:12:45,435 INFO L158 Benchmark]: Boogie Preprocessor took 20.56ms. Allocated memory is still 167.8MB. Free memory was 112.0MB in the beginning and 110.9MB in the end (delta: 1.1MB). There was no memory consumed. Max. memory is 16.1GB. [2025-02-06 19:12:45,435 INFO L158 Benchmark]: IcfgBuilder took 240.89ms. Allocated memory is still 167.8MB. Free memory was 110.9MB in the beginning and 96.7MB in the end (delta: 14.2MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-02-06 19:12:45,435 INFO L158 Benchmark]: BuchiAutomizer took 3109.88ms. Allocated memory was 167.8MB in the beginning and 402.7MB in the end (delta: 234.9MB). Free memory was 96.0MB in the beginning and 119.9MB in the end (delta: -23.9MB). Peak memory consumption was 209.4MB. Max. memory is 16.1GB. [2025-02-06 19:12:45,436 INFO L158 Benchmark]: Witness Printer took 29.64ms. Allocated memory is still 402.7MB. Free memory was 119.9MB in the beginning and 115.7MB in the end (delta: 4.2MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-02-06 19:12:45,436 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17ms. Allocated memory is still 201.3MB. Free memory is still 118.1MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 181.26ms. Allocated memory is still 167.8MB. Free memory was 124.7MB in the beginning and 113.4MB in the end (delta: 11.3MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 18.61ms. Allocated memory is still 167.8MB. Free memory was 113.4MB in the beginning and 112.0MB in the end (delta: 1.4MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 20.56ms. Allocated memory is still 167.8MB. Free memory was 112.0MB in the beginning and 110.9MB in the end (delta: 1.1MB). There was no memory consumed. Max. memory is 16.1GB. * IcfgBuilder took 240.89ms. Allocated memory is still 167.8MB. Free memory was 110.9MB in the beginning and 96.7MB in the end (delta: 14.2MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * BuchiAutomizer took 3109.88ms. Allocated memory was 167.8MB in the beginning and 402.7MB in the end (delta: 234.9MB). Free memory was 96.0MB in the beginning and 119.9MB in the end (delta: -23.9MB). Peak memory consumption was 209.4MB. Max. memory is 16.1GB. * Witness Printer took 29.64ms. Allocated memory is still 402.7MB. Free memory was 119.9MB in the beginning and 115.7MB in the end (delta: 4.2MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 10 terminating modules (10 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.10 modules have a trivial ranking function, the largest among these consists of 3 locations. The remainder module has 27650 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 3.0s and 11 iterations. TraceHistogramMax:1. Analysis of lassos took 0.9s. Construction of modules took 0.0s. Büchi inclusion checks took 1.7s. Highest rank in rank-based complementation 0. Minimization of det autom 10. Minimization of nondet autom 0. Automata minimization 0.9s AutomataMinimizationTime, 10 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations. Non-live state removal took 0.5s Buchi closure took 0.0s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 412 SdHoareTripleChecker+Valid, 0.1s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 412 mSDsluCounter, 1293 SdHoareTripleChecker+Invalid, 0.1s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 492 mSDsCounter, 20 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 52 IncrementalHoareTripleChecker+Invalid, 72 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 20 mSolverCounterUnsat, 801 mSDtfsCounter, 52 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont1 unkn0 SFLI10 SFLT0 conc0 concLT0 SILN0 SILU0 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - LassoShapedNonTerminationArgument [Line: 41]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite program execution. Stem: [L8] int p1 = __VERIFIER_nondet_int(); [L9] int lk1; [L11] int p2 = __VERIFIER_nondet_int(); [L12] int lk2; [L14] int p3 = __VERIFIER_nondet_int(); [L15] int lk3; [L17] int p4 = __VERIFIER_nondet_int(); [L18] int lk4; [L20] int p5 = __VERIFIER_nondet_int(); [L21] int lk5; [L23] int p6 = __VERIFIER_nondet_int(); [L24] int lk6; [L26] int p7 = __VERIFIER_nondet_int(); [L27] int lk7; [L29] int p8 = __VERIFIER_nondet_int(); [L30] int lk8; [L32] int p9 = __VERIFIER_nondet_int(); [L33] int lk9; [L35] int p10 = __VERIFIER_nondet_int(); [L36] int lk10; [L39] int cond; Loop: [L41] COND TRUE 1 [L42] cond = __VERIFIER_nondet_int() [L43] COND FALSE !(cond == 0) [L46] lk1 = 0 [L48] lk2 = 0 [L50] lk3 = 0 [L52] lk4 = 0 [L54] lk5 = 0 [L56] lk6 = 0 [L58] lk7 = 0 [L60] lk8 = 0 [L62] lk9 = 0 [L64] lk10 = 0 [L68] COND FALSE !(p1 != 0) [L72] COND FALSE !(p2 != 0) [L76] COND FALSE !(p3 != 0) [L80] COND FALSE !(p4 != 0) [L84] COND FALSE !(p5 != 0) [L88] COND FALSE !(p6 != 0) [L92] COND FALSE !(p7 != 0) [L96] COND FALSE !(p8 != 0) [L100] COND FALSE !(p9 != 0) [L104] COND FALSE !(p10 != 0) [L110] COND FALSE !(p1 != 0) [L115] COND FALSE !(p2 != 0) [L120] COND FALSE !(p3 != 0) [L125] COND FALSE !(p4 != 0) [L130] COND FALSE !(p5 != 0) [L135] COND FALSE !(p6 != 0) [L140] COND FALSE !(p7 != 0) [L145] COND FALSE !(p8 != 0) [L150] COND FALSE !(p9 != 0) [L155] COND FALSE !(p10 != 0) End of lasso representation. - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 41]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L8] int p1 = __VERIFIER_nondet_int(); [L9] int lk1; [L11] int p2 = __VERIFIER_nondet_int(); [L12] int lk2; [L14] int p3 = __VERIFIER_nondet_int(); [L15] int lk3; [L17] int p4 = __VERIFIER_nondet_int(); [L18] int lk4; [L20] int p5 = __VERIFIER_nondet_int(); [L21] int lk5; [L23] int p6 = __VERIFIER_nondet_int(); [L24] int lk6; [L26] int p7 = __VERIFIER_nondet_int(); [L27] int lk7; [L29] int p8 = __VERIFIER_nondet_int(); [L30] int lk8; [L32] int p9 = __VERIFIER_nondet_int(); [L33] int lk9; [L35] int p10 = __VERIFIER_nondet_int(); [L36] int lk10; [L39] int cond; Loop: [L41] COND TRUE 1 [L42] cond = __VERIFIER_nondet_int() [L43] COND FALSE !(cond == 0) [L46] lk1 = 0 [L48] lk2 = 0 [L50] lk3 = 0 [L52] lk4 = 0 [L54] lk5 = 0 [L56] lk6 = 0 [L58] lk7 = 0 [L60] lk8 = 0 [L62] lk9 = 0 [L64] lk10 = 0 [L68] COND FALSE !(p1 != 0) [L72] COND FALSE !(p2 != 0) [L76] COND FALSE !(p3 != 0) [L80] COND FALSE !(p4 != 0) [L84] COND FALSE !(p5 != 0) [L88] COND FALSE !(p6 != 0) [L92] COND FALSE !(p7 != 0) [L96] COND FALSE !(p8 != 0) [L100] COND FALSE !(p9 != 0) [L104] COND FALSE !(p10 != 0) [L110] COND FALSE !(p1 != 0) [L115] COND FALSE !(p2 != 0) [L120] COND FALSE !(p3 != 0) [L125] COND FALSE !(p4 != 0) [L130] COND FALSE !(p5 != 0) [L135] COND FALSE !(p6 != 0) [L140] COND FALSE !(p7 != 0) [L145] COND FALSE !(p8 != 0) [L150] COND FALSE !(p9 != 0) [L155] COND FALSE !(p10 != 0) End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2025-02-06 19:12:45,447 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM)