./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/locks/test_locks_12.c --full-output --architecture 32bit


--------------------------------------------------------------------------------


Checking for termination
Using default analysis
Version c00e63dc
Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/locks/test_locks_12.c -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) )

 --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 12c3feea735c5360de013afbcf9aaa3880d39f75cbb7661493cccf003151044d
--- Real Ultimate output ---
This is Ultimate 0.3.0-?-c00e63d-m
[2025-02-06 19:12:40,419 INFO  L188        SettingsManager]: Resetting all preferences to default values...
[2025-02-06 19:12:40,455 INFO  L114        SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf
[2025-02-06 19:12:40,458 WARN  L101        SettingsManager]: Preference file contains the following unknown settings:
[2025-02-06 19:12:40,458 WARN  L103        SettingsManager]:   * de.uni_freiburg.informatik.ultimate.core.Log level for class
[2025-02-06 19:12:40,458 WARN  L103        SettingsManager]:   * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG
[2025-02-06 19:12:40,476 INFO  L130        SettingsManager]: Preferences different from defaults after loading the file:
[2025-02-06 19:12:40,477 INFO  L151        SettingsManager]: Preferences of UltimateCore differ from their defaults:
[2025-02-06 19:12:40,477 INFO  L153        SettingsManager]:  * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR;
[2025-02-06 19:12:40,477 INFO  L151        SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults:
[2025-02-06 19:12:40,477 INFO  L153        SettingsManager]:  * Use memory slicer=true
[2025-02-06 19:12:40,477 INFO  L151        SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults:
[2025-02-06 19:12:40,477 INFO  L153        SettingsManager]:  * Create parallel compositions if possible=false
[2025-02-06 19:12:40,477 INFO  L153        SettingsManager]:  * Use SBE=true
[2025-02-06 19:12:40,477 INFO  L151        SettingsManager]: Preferences of BuchiAutomizer differ from their defaults:
[2025-02-06 19:12:40,477 INFO  L153        SettingsManager]:  * NCSB implementation=INTSET_LAZY3
[2025-02-06 19:12:40,477 INFO  L153        SettingsManager]:  * Use old map elimination=false
[2025-02-06 19:12:40,478 INFO  L153        SettingsManager]:  * Use external solver (rank synthesis)=false
[2025-02-06 19:12:40,478 INFO  L153        SettingsManager]:  * Use only trivial implications for array writes=true
[2025-02-06 19:12:40,478 INFO  L153        SettingsManager]:  * Rank analysis=LINEAR_WITH_GUESSES
[2025-02-06 19:12:40,478 INFO  L151        SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults:
[2025-02-06 19:12:40,478 INFO  L153        SettingsManager]:  * Pointer base address is valid at dereference=ASSUME
[2025-02-06 19:12:40,478 INFO  L153        SettingsManager]:  * sizeof long=4
[2025-02-06 19:12:40,478 INFO  L153        SettingsManager]:  * Overapproximate operations on floating types=true
[2025-02-06 19:12:40,478 INFO  L153        SettingsManager]:  * sizeof POINTER=4
[2025-02-06 19:12:40,478 INFO  L153        SettingsManager]:  * Check division by zero=IGNORE
[2025-02-06 19:12:40,478 INFO  L153        SettingsManager]:  * Pointer to allocated memory at dereference=ASSUME
[2025-02-06 19:12:40,478 INFO  L153        SettingsManager]:  * If two pointers are subtracted or compared they have the same base address=ASSUME
[2025-02-06 19:12:40,478 INFO  L153        SettingsManager]:  * Check array bounds for arrays that are off heap=ASSUME
[2025-02-06 19:12:40,478 INFO  L153        SettingsManager]:  * Check unreachability of reach_error function=false
[2025-02-06 19:12:40,478 INFO  L153        SettingsManager]:  * sizeof long double=12
[2025-02-06 19:12:40,478 INFO  L153        SettingsManager]:  * Check if freed pointer was valid=false
[2025-02-06 19:12:40,478 INFO  L153        SettingsManager]:  * Assume nondeterminstic values are in range=false
[2025-02-06 19:12:40,478 INFO  L153        SettingsManager]:  * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR
[2025-02-06 19:12:40,478 INFO  L153        SettingsManager]:  * Use constant arrays=true
[2025-02-06 19:12:40,479 INFO  L151        SettingsManager]: Preferences of IcfgBuilder differ from their defaults:
[2025-02-06 19:12:40,479 INFO  L153        SettingsManager]:  * Size of a code block=SequenceOfStatements
[2025-02-06 19:12:40,479 INFO  L151        SettingsManager]: Preferences of TraceAbstraction differ from their defaults:
[2025-02-06 19:12:40,479 INFO  L153        SettingsManager]:  * Trace refinement strategy=CAMEL
[2025-02-06 19:12:40,479 INFO  L151        SettingsManager]: Preferences of IcfgTransformer differ from their defaults:
[2025-02-06 19:12:40,479 INFO  L153        SettingsManager]:  * TransformationType=MODULO_NEIGHBOR
Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) )


Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 12c3feea735c5360de013afbcf9aaa3880d39f75cbb7661493cccf003151044d
[2025-02-06 19:12:40,661 INFO  L75    nceAwareModelManager]: Repository-Root is: /tmp
[2025-02-06 19:12:40,666 INFO  L261   ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized
[2025-02-06 19:12:40,668 INFO  L217   ainManager$Toolchain]: [Toolchain 1]: Toolchain selected.
[2025-02-06 19:12:40,668 INFO  L270        PluginConnector]: Initializing CDTParser...
[2025-02-06 19:12:40,669 INFO  L274        PluginConnector]: CDTParser initialized
[2025-02-06 19:12:40,669 INFO  L431   ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/locks/test_locks_12.c
[2025-02-06 19:12:41,729 INFO  L533              CDTParser]: Created temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/e5d1d1c14/68be3a3085a4463b8e3889d8e23f8e30/FLAG38d493504
[2025-02-06 19:12:41,929 INFO  L384              CDTParser]: Found 1 translation units.
[2025-02-06 19:12:41,930 INFO  L180              CDTParser]: Scanning /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/locks/test_locks_12.c
[2025-02-06 19:12:41,949 INFO  L427              CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/e5d1d1c14/68be3a3085a4463b8e3889d8e23f8e30/FLAG38d493504
[2025-02-06 19:12:42,290 INFO  L435              CDTParser]: Successfully deleted /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/e5d1d1c14/68be3a3085a4463b8e3889d8e23f8e30
[2025-02-06 19:12:42,292 INFO  L299   ainManager$Toolchain]: ####################### [Toolchain 1] #######################
[2025-02-06 19:12:42,293 INFO  L133        ToolchainWalker]: Walking toolchain with 6 elements.
[2025-02-06 19:12:42,293 INFO  L112        PluginConnector]: ------------------------CACSL2BoogieTranslator----------------------------
[2025-02-06 19:12:42,293 INFO  L270        PluginConnector]: Initializing CACSL2BoogieTranslator...
[2025-02-06 19:12:42,296 INFO  L274        PluginConnector]: CACSL2BoogieTranslator initialized
[2025-02-06 19:12:42,297 INFO  L184        PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.02 07:12:42" (1/1) ...
[2025-02-06 19:12:42,297 INFO  L204        PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@25918fbc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:42, skipping insertion in model container
[2025-02-06 19:12:42,297 INFO  L184        PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.02 07:12:42" (1/1) ...
[2025-02-06 19:12:42,306 INFO  L175         MainTranslator]: Built tables and reachable declarations
[2025-02-06 19:12:42,425 INFO  L210          PostProcessor]: Analyzing one entry point: main
[2025-02-06 19:12:42,433 INFO  L200         MainTranslator]: Completed pre-run
[2025-02-06 19:12:42,454 INFO  L210          PostProcessor]: Analyzing one entry point: main
[2025-02-06 19:12:42,465 INFO  L204         MainTranslator]: Completed translation
[2025-02-06 19:12:42,465 INFO  L201        PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:42 WrapperNode
[2025-02-06 19:12:42,465 INFO  L131        PluginConnector]: ------------------------ END CACSL2BoogieTranslator----------------------------
[2025-02-06 19:12:42,466 INFO  L112        PluginConnector]: ------------------------Boogie Procedure Inliner----------------------------
[2025-02-06 19:12:42,466 INFO  L270        PluginConnector]: Initializing Boogie Procedure Inliner...
[2025-02-06 19:12:42,466 INFO  L274        PluginConnector]: Boogie Procedure Inliner initialized
[2025-02-06 19:12:42,470 INFO  L184        PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:42" (1/1) ...
[2025-02-06 19:12:42,478 INFO  L184        PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:42" (1/1) ...
[2025-02-06 19:12:42,491 INFO  L138                Inliner]: procedures = 12, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 157
[2025-02-06 19:12:42,492 INFO  L131        PluginConnector]: ------------------------ END Boogie Procedure Inliner----------------------------
[2025-02-06 19:12:42,492 INFO  L112        PluginConnector]: ------------------------Boogie Preprocessor----------------------------
[2025-02-06 19:12:42,492 INFO  L270        PluginConnector]: Initializing Boogie Preprocessor...
[2025-02-06 19:12:42,493 INFO  L274        PluginConnector]: Boogie Preprocessor initialized
[2025-02-06 19:12:42,497 INFO  L184        PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:42" (1/1) ...
[2025-02-06 19:12:42,497 INFO  L184        PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:42" (1/1) ...
[2025-02-06 19:12:42,498 INFO  L184        PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:42" (1/1) ...
[2025-02-06 19:12:42,507 INFO  L175           MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0].
[2025-02-06 19:12:42,508 INFO  L184        PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:42" (1/1) ...
[2025-02-06 19:12:42,508 INFO  L184        PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:42" (1/1) ...
[2025-02-06 19:12:42,512 INFO  L184        PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:42" (1/1) ...
[2025-02-06 19:12:42,516 INFO  L184        PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:42" (1/1) ...
[2025-02-06 19:12:42,516 INFO  L184        PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:42" (1/1) ...
[2025-02-06 19:12:42,517 INFO  L184        PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:42" (1/1) ...
[2025-02-06 19:12:42,518 INFO  L131        PluginConnector]: ------------------------ END Boogie Preprocessor----------------------------
[2025-02-06 19:12:42,518 INFO  L112        PluginConnector]: ------------------------IcfgBuilder----------------------------
[2025-02-06 19:12:42,521 INFO  L270        PluginConnector]: Initializing IcfgBuilder...
[2025-02-06 19:12:42,521 INFO  L274        PluginConnector]: IcfgBuilder initialized
[2025-02-06 19:12:42,522 INFO  L184        PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:42" (1/1) ...
[2025-02-06 19:12:42,526 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000
[2025-02-06 19:12:42,536 INFO  L189       MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3
[2025-02-06 19:12:42,551 INFO  L229       MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null)
[2025-02-06 19:12:42,555 INFO  L327       MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process
[2025-02-06 19:12:42,572 INFO  L130     BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit
[2025-02-06 19:12:42,572 INFO  L130     BoogieDeclarations]: Found specification of procedure ULTIMATE.start
[2025-02-06 19:12:42,572 INFO  L138     BoogieDeclarations]: Found implementation of procedure ULTIMATE.start
[2025-02-06 19:12:42,572 INFO  L130     BoogieDeclarations]: Found specification of procedure write~init~int#0
[2025-02-06 19:12:42,637 INFO  L257             CfgBuilder]: Building ICFG
[2025-02-06 19:12:42,638 INFO  L287             CfgBuilder]: Building CFG for each procedure with an implementation
[2025-02-06 19:12:42,789 INFO  L?                        ?]: Removed 28 outVars from TransFormulas that were not future-live.
[2025-02-06 19:12:42,789 INFO  L308             CfgBuilder]: Performing block encoding
[2025-02-06 19:12:42,794 INFO  L332             CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start)
[2025-02-06 19:12:42,795 INFO  L337             CfgBuilder]: Removed 0 assume(true) statements.
[2025-02-06 19:12:42,795 INFO  L201        PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 06.02 07:12:42 BoogieIcfgContainer
[2025-02-06 19:12:42,795 INFO  L131        PluginConnector]: ------------------------ END IcfgBuilder----------------------------
[2025-02-06 19:12:42,796 INFO  L112        PluginConnector]: ------------------------BuchiAutomizer----------------------------
[2025-02-06 19:12:42,796 INFO  L270        PluginConnector]: Initializing BuchiAutomizer...
[2025-02-06 19:12:42,799 INFO  L274        PluginConnector]: BuchiAutomizer initialized
[2025-02-06 19:12:42,799 INFO  L99          BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis
[2025-02-06 19:12:42,799 INFO  L184        PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 06.02 07:12:42" (1/3) ...
[2025-02-06 19:12:42,800 INFO  L204        PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@6c8681d3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.02 07:12:42, skipping insertion in model container
[2025-02-06 19:12:42,800 INFO  L99          BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis
[2025-02-06 19:12:42,800 INFO  L184        PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:42" (2/3) ...
[2025-02-06 19:12:42,800 INFO  L204        PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@6c8681d3 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.02 07:12:42, skipping insertion in model container
[2025-02-06 19:12:42,800 INFO  L99          BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis
[2025-02-06 19:12:42,800 INFO  L184        PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 06.02 07:12:42" (3/3) ...
[2025-02-06 19:12:42,801 INFO  L363   chiAutomizerObserver]: Analyzing ICFG test_locks_12.c
[2025-02-06 19:12:42,826 INFO  L306   stractBuchiCegarLoop]: Interprodecural is true
[2025-02-06 19:12:42,827 INFO  L307   stractBuchiCegarLoop]: Hoare is None
[2025-02-06 19:12:42,827 INFO  L308   stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates
[2025-02-06 19:12:42,827 INFO  L309   stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE
[2025-02-06 19:12:42,827 INFO  L310   stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION
[2025-02-06 19:12:42,827 INFO  L311   stractBuchiCegarLoop]: Difference is false
[2025-02-06 19:12:42,827 INFO  L312   stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA
[2025-02-06 19:12:42,827 INFO  L316   stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ========
[2025-02-06 19:12:42,830 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand  has 46 states, 45 states have (on average 1.8444444444444446) internal successors, (83), 45 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-06 19:12:42,838 INFO  L131   ngComponentsAnalysis]: Automaton has 1 accepting balls. 38
[2025-02-06 19:12:42,838 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2025-02-06 19:12:42,838 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2025-02-06 19:12:42,841 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2025-02-06 19:12:42,841 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2025-02-06 19:12:42,841 INFO  L338   stractBuchiCegarLoop]: ======== Iteration 1 ============
[2025-02-06 19:12:42,841 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand  has 46 states, 45 states have (on average 1.8444444444444446) internal successors, (83), 45 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-06 19:12:42,843 INFO  L131   ngComponentsAnalysis]: Automaton has 1 accepting balls. 38
[2025-02-06 19:12:42,843 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2025-02-06 19:12:42,843 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2025-02-06 19:12:42,843 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2025-02-06 19:12:42,843 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2025-02-06 19:12:42,847 INFO  L752   eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_~cond~0#1;" 
[2025-02-06 19:12:42,847 INFO  L754   eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet16#1;main_~cond~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;" "assume 0 != main_~p1~0#1;main_~lk1~0#1 := 1;" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" 
[2025-02-06 19:12:42,850 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-06 19:12:42,850 INFO  L85        PathProgramCache]: Analyzing trace with hash 4864, now seen corresponding path program 1 times
[2025-02-06 19:12:42,855 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-06 19:12:42,855 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [626697953]
[2025-02-06 19:12:42,855 INFO  L97    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2025-02-06 19:12:42,855 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-06 19:12:42,892 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes.
[2025-02-06 19:12:42,899 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements.
[2025-02-06 19:12:42,899 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-06 19:12:42,899 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-06 19:12:42,899 INFO  L348             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2025-02-06 19:12:42,901 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes.
[2025-02-06 19:12:42,903 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements.
[2025-02-06 19:12:42,903 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-06 19:12:42,903 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-06 19:12:42,912 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2025-02-06 19:12:42,913 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-06 19:12:42,913 INFO  L85        PathProgramCache]: Analyzing trace with hash -76830934, now seen corresponding path program 1 times
[2025-02-06 19:12:42,913 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-06 19:12:42,914 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1627810870]
[2025-02-06 19:12:42,914 INFO  L97    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2025-02-06 19:12:42,914 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-06 19:12:42,921 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 26 statements into 1 equivalence classes.
[2025-02-06 19:12:42,926 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 26 of 26 statements.
[2025-02-06 19:12:42,926 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-06 19:12:42,926 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2025-02-06 19:12:42,979 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2025-02-06 19:12:42,980 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2025-02-06 19:12:42,980 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1627810870]
[2025-02-06 19:12:42,980 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1627810870] provided 1 perfect and 0 imperfect interpolant sequences
[2025-02-06 19:12:42,980 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2025-02-06 19:12:42,980 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2025-02-06 19:12:42,981 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1601778194]
[2025-02-06 19:12:42,981 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2025-02-06 19:12:42,983 INFO  L769   eck$LassoCheckResult]: loop already infeasible
[2025-02-06 19:12:42,983 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2025-02-06 19:12:42,997 INFO  L144   InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2025-02-06 19:12:42,998 INFO  L146   InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2025-02-06 19:12:42,999 INFO  L87              Difference]: Start difference. First operand  has 46 states, 45 states have (on average 1.8444444444444446) internal successors, (83), 45 states have internal predecessors, (83), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand  has 3 states, 3 states have (on average 8.666666666666666) internal successors, (26), 3 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-06 19:12:43,020 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2025-02-06 19:12:43,020 INFO  L93              Difference]: Finished difference Result 85 states and 153 transitions.
[2025-02-06 19:12:43,021 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 85 states and 153 transitions.
[2025-02-06 19:12:43,023 INFO  L131   ngComponentsAnalysis]: Automaton has 2 accepting balls. 75
[2025-02-06 19:12:43,027 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 85 states to 77 states and 123 transitions.
[2025-02-06 19:12:43,027 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 77
[2025-02-06 19:12:43,027 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 77
[2025-02-06 19:12:43,028 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 77 states and 123 transitions.
[2025-02-06 19:12:43,028 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2025-02-06 19:12:43,028 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 77 states and 123 transitions.
[2025-02-06 19:12:43,036 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 77 states and 123 transitions.
[2025-02-06 19:12:43,043 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 77.
[2025-02-06 19:12:43,043 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 77 states, 77 states have (on average 1.5974025974025974) internal successors, (123), 76 states have internal predecessors, (123), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-06 19:12:43,044 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 123 transitions.
[2025-02-06 19:12:43,045 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 77 states and 123 transitions.
[2025-02-06 19:12:43,045 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2025-02-06 19:12:43,047 INFO  L432   stractBuchiCegarLoop]: Abstraction has 77 states and 123 transitions.
[2025-02-06 19:12:43,047 INFO  L338   stractBuchiCegarLoop]: ======== Iteration 2 ============
[2025-02-06 19:12:43,048 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 77 states and 123 transitions.
[2025-02-06 19:12:43,049 INFO  L131   ngComponentsAnalysis]: Automaton has 2 accepting balls. 75
[2025-02-06 19:12:43,049 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2025-02-06 19:12:43,049 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2025-02-06 19:12:43,049 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2025-02-06 19:12:43,049 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2025-02-06 19:12:43,049 INFO  L752   eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_~cond~0#1;" 
[2025-02-06 19:12:43,050 INFO  L754   eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet16#1;main_~cond~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" 
[2025-02-06 19:12:43,050 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-06 19:12:43,050 INFO  L85        PathProgramCache]: Analyzing trace with hash 4864, now seen corresponding path program 2 times
[2025-02-06 19:12:43,050 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-06 19:12:43,050 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [971642912]
[2025-02-06 19:12:43,050 INFO  L95    rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1
[2025-02-06 19:12:43,050 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-06 19:12:43,053 INFO  L108    AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes.
[2025-02-06 19:12:43,055 INFO  L111    AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements.
[2025-02-06 19:12:43,055 INFO  L114    AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s)
[2025-02-06 19:12:43,055 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-06 19:12:43,055 INFO  L348             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2025-02-06 19:12:43,060 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes.
[2025-02-06 19:12:43,061 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements.
[2025-02-06 19:12:43,061 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-06 19:12:43,061 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-06 19:12:43,062 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2025-02-06 19:12:43,063 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-06 19:12:43,063 INFO  L85        PathProgramCache]: Analyzing trace with hash -143837687, now seen corresponding path program 1 times
[2025-02-06 19:12:43,063 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-06 19:12:43,063 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1747646654]
[2025-02-06 19:12:43,063 INFO  L97    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2025-02-06 19:12:43,063 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-06 19:12:43,068 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 26 statements into 1 equivalence classes.
[2025-02-06 19:12:43,073 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 26 of 26 statements.
[2025-02-06 19:12:43,073 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-06 19:12:43,073 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2025-02-06 19:12:43,100 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2025-02-06 19:12:43,100 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2025-02-06 19:12:43,100 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1747646654]
[2025-02-06 19:12:43,100 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1747646654] provided 1 perfect and 0 imperfect interpolant sequences
[2025-02-06 19:12:43,100 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2025-02-06 19:12:43,100 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2025-02-06 19:12:43,101 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1568497670]
[2025-02-06 19:12:43,101 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2025-02-06 19:12:43,101 INFO  L769   eck$LassoCheckResult]: loop already infeasible
[2025-02-06 19:12:43,101 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2025-02-06 19:12:43,101 INFO  L144   InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2025-02-06 19:12:43,101 INFO  L146   InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2025-02-06 19:12:43,102 INFO  L87              Difference]: Start difference. First operand 77 states and 123 transitions. cyclomatic complexity: 48 Second operand  has 3 states, 3 states have (on average 8.666666666666666) internal successors, (26), 3 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-06 19:12:43,115 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2025-02-06 19:12:43,115 INFO  L93              Difference]: Finished difference Result 150 states and 238 transitions.
[2025-02-06 19:12:43,116 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 150 states and 238 transitions.
[2025-02-06 19:12:43,117 INFO  L131   ngComponentsAnalysis]: Automaton has 4 accepting balls. 148
[2025-02-06 19:12:43,119 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 150 states to 150 states and 238 transitions.
[2025-02-06 19:12:43,119 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 150
[2025-02-06 19:12:43,119 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 150
[2025-02-06 19:12:43,119 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 150 states and 238 transitions.
[2025-02-06 19:12:43,119 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2025-02-06 19:12:43,120 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 150 states and 238 transitions.
[2025-02-06 19:12:43,120 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 150 states and 238 transitions.
[2025-02-06 19:12:43,128 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 150.
[2025-02-06 19:12:43,129 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 150 states, 150 states have (on average 1.5866666666666667) internal successors, (238), 149 states have internal predecessors, (238), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-06 19:12:43,130 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 238 transitions.
[2025-02-06 19:12:43,130 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 150 states and 238 transitions.
[2025-02-06 19:12:43,130 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2025-02-06 19:12:43,131 INFO  L432   stractBuchiCegarLoop]: Abstraction has 150 states and 238 transitions.
[2025-02-06 19:12:43,131 INFO  L338   stractBuchiCegarLoop]: ======== Iteration 3 ============
[2025-02-06 19:12:43,131 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 150 states and 238 transitions.
[2025-02-06 19:12:43,132 INFO  L131   ngComponentsAnalysis]: Automaton has 4 accepting balls. 148
[2025-02-06 19:12:43,132 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2025-02-06 19:12:43,133 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2025-02-06 19:12:43,133 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2025-02-06 19:12:43,133 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2025-02-06 19:12:43,133 INFO  L752   eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_~cond~0#1;" 
[2025-02-06 19:12:43,133 INFO  L754   eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet16#1;main_~cond~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" 
[2025-02-06 19:12:43,134 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-06 19:12:43,134 INFO  L85        PathProgramCache]: Analyzing trace with hash 4864, now seen corresponding path program 3 times
[2025-02-06 19:12:43,134 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-06 19:12:43,134 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1144383874]
[2025-02-06 19:12:43,134 INFO  L95    rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2
[2025-02-06 19:12:43,134 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-06 19:12:43,137 INFO  L108    AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes.
[2025-02-06 19:12:43,139 INFO  L111    AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements.
[2025-02-06 19:12:43,139 INFO  L114    AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s)
[2025-02-06 19:12:43,139 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-06 19:12:43,139 INFO  L348             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2025-02-06 19:12:43,141 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes.
[2025-02-06 19:12:43,144 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements.
[2025-02-06 19:12:43,146 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-06 19:12:43,146 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-06 19:12:43,147 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2025-02-06 19:12:43,148 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-06 19:12:43,148 INFO  L85        PathProgramCache]: Analyzing trace with hash 1100926794, now seen corresponding path program 1 times
[2025-02-06 19:12:43,148 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-06 19:12:43,148 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [145807826]
[2025-02-06 19:12:43,148 INFO  L97    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2025-02-06 19:12:43,148 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-06 19:12:43,153 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 26 statements into 1 equivalence classes.
[2025-02-06 19:12:43,161 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 26 of 26 statements.
[2025-02-06 19:12:43,164 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-06 19:12:43,164 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2025-02-06 19:12:43,207 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2025-02-06 19:12:43,207 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2025-02-06 19:12:43,207 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [145807826]
[2025-02-06 19:12:43,207 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [145807826] provided 1 perfect and 0 imperfect interpolant sequences
[2025-02-06 19:12:43,207 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2025-02-06 19:12:43,207 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2025-02-06 19:12:43,209 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [120209884]
[2025-02-06 19:12:43,209 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2025-02-06 19:12:43,209 INFO  L769   eck$LassoCheckResult]: loop already infeasible
[2025-02-06 19:12:43,209 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2025-02-06 19:12:43,209 INFO  L144   InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2025-02-06 19:12:43,210 INFO  L146   InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2025-02-06 19:12:43,210 INFO  L87              Difference]: Start difference. First operand 150 states and 238 transitions. cyclomatic complexity: 92 Second operand  has 3 states, 3 states have (on average 8.666666666666666) internal successors, (26), 3 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-06 19:12:43,230 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2025-02-06 19:12:43,230 INFO  L93              Difference]: Finished difference Result 294 states and 462 transitions.
[2025-02-06 19:12:43,230 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 294 states and 462 transitions.
[2025-02-06 19:12:43,233 INFO  L131   ngComponentsAnalysis]: Automaton has 8 accepting balls. 292
[2025-02-06 19:12:43,238 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 294 states to 294 states and 462 transitions.
[2025-02-06 19:12:43,241 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 294
[2025-02-06 19:12:43,241 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 294
[2025-02-06 19:12:43,241 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 294 states and 462 transitions.
[2025-02-06 19:12:43,242 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2025-02-06 19:12:43,242 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 294 states and 462 transitions.
[2025-02-06 19:12:43,243 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 294 states and 462 transitions.
[2025-02-06 19:12:43,254 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 294 to 294.
[2025-02-06 19:12:43,257 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 294 states, 294 states have (on average 1.5714285714285714) internal successors, (462), 293 states have internal predecessors, (462), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-06 19:12:43,260 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 294 states to 294 states and 462 transitions.
[2025-02-06 19:12:43,264 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 294 states and 462 transitions.
[2025-02-06 19:12:43,264 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2025-02-06 19:12:43,265 INFO  L432   stractBuchiCegarLoop]: Abstraction has 294 states and 462 transitions.
[2025-02-06 19:12:43,265 INFO  L338   stractBuchiCegarLoop]: ======== Iteration 4 ============
[2025-02-06 19:12:43,265 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 294 states and 462 transitions.
[2025-02-06 19:12:43,267 INFO  L131   ngComponentsAnalysis]: Automaton has 8 accepting balls. 292
[2025-02-06 19:12:43,267 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2025-02-06 19:12:43,267 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2025-02-06 19:12:43,267 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2025-02-06 19:12:43,267 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2025-02-06 19:12:43,267 INFO  L752   eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_~cond~0#1;" 
[2025-02-06 19:12:43,268 INFO  L754   eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet16#1;main_~cond~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" 
[2025-02-06 19:12:43,268 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-06 19:12:43,268 INFO  L85        PathProgramCache]: Analyzing trace with hash 4864, now seen corresponding path program 4 times
[2025-02-06 19:12:43,271 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-06 19:12:43,271 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1461889025]
[2025-02-06 19:12:43,271 INFO  L95    rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST
[2025-02-06 19:12:43,272 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-06 19:12:43,275 INFO  L108    AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes.
[2025-02-06 19:12:43,278 INFO  L111    AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements.
[2025-02-06 19:12:43,278 INFO  L114    AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s)
[2025-02-06 19:12:43,278 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-06 19:12:43,278 INFO  L348             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2025-02-06 19:12:43,280 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes.
[2025-02-06 19:12:43,281 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements.
[2025-02-06 19:12:43,281 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-06 19:12:43,281 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-06 19:12:43,283 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2025-02-06 19:12:43,283 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-06 19:12:43,283 INFO  L85        PathProgramCache]: Analyzing trace with hash -937129495, now seen corresponding path program 1 times
[2025-02-06 19:12:43,283 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-06 19:12:43,283 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [660210802]
[2025-02-06 19:12:43,283 INFO  L97    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2025-02-06 19:12:43,283 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-06 19:12:43,287 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 26 statements into 1 equivalence classes.
[2025-02-06 19:12:43,290 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 26 of 26 statements.
[2025-02-06 19:12:43,290 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-06 19:12:43,290 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2025-02-06 19:12:43,334 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2025-02-06 19:12:43,334 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2025-02-06 19:12:43,334 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [660210802]
[2025-02-06 19:12:43,334 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [660210802] provided 1 perfect and 0 imperfect interpolant sequences
[2025-02-06 19:12:43,334 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2025-02-06 19:12:43,335 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2025-02-06 19:12:43,335 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [293628619]
[2025-02-06 19:12:43,335 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2025-02-06 19:12:43,335 INFO  L769   eck$LassoCheckResult]: loop already infeasible
[2025-02-06 19:12:43,335 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2025-02-06 19:12:43,335 INFO  L144   InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2025-02-06 19:12:43,335 INFO  L146   InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2025-02-06 19:12:43,336 INFO  L87              Difference]: Start difference. First operand 294 states and 462 transitions. cyclomatic complexity: 176 Second operand  has 3 states, 3 states have (on average 8.666666666666666) internal successors, (26), 3 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-06 19:12:43,353 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2025-02-06 19:12:43,353 INFO  L93              Difference]: Finished difference Result 578 states and 898 transitions.
[2025-02-06 19:12:43,353 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 578 states and 898 transitions.
[2025-02-06 19:12:43,356 INFO  L131   ngComponentsAnalysis]: Automaton has 16 accepting balls. 576
[2025-02-06 19:12:43,359 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 578 states to 578 states and 898 transitions.
[2025-02-06 19:12:43,359 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 578
[2025-02-06 19:12:43,359 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 578
[2025-02-06 19:12:43,360 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 578 states and 898 transitions.
[2025-02-06 19:12:43,361 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2025-02-06 19:12:43,361 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 578 states and 898 transitions.
[2025-02-06 19:12:43,361 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 578 states and 898 transitions.
[2025-02-06 19:12:43,377 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 578 to 578.
[2025-02-06 19:12:43,379 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 578 states, 578 states have (on average 1.5536332179930796) internal successors, (898), 577 states have internal predecessors, (898), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-06 19:12:43,381 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 578 states to 578 states and 898 transitions.
[2025-02-06 19:12:43,381 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 578 states and 898 transitions.
[2025-02-06 19:12:43,381 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2025-02-06 19:12:43,382 INFO  L432   stractBuchiCegarLoop]: Abstraction has 578 states and 898 transitions.
[2025-02-06 19:12:43,382 INFO  L338   stractBuchiCegarLoop]: ======== Iteration 5 ============
[2025-02-06 19:12:43,382 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 578 states and 898 transitions.
[2025-02-06 19:12:43,384 INFO  L131   ngComponentsAnalysis]: Automaton has 16 accepting balls. 576
[2025-02-06 19:12:43,384 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2025-02-06 19:12:43,385 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2025-02-06 19:12:43,385 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2025-02-06 19:12:43,385 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2025-02-06 19:12:43,385 INFO  L752   eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_~cond~0#1;" 
[2025-02-06 19:12:43,385 INFO  L754   eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet16#1;main_~cond~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" 
[2025-02-06 19:12:43,385 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-06 19:12:43,386 INFO  L85        PathProgramCache]: Analyzing trace with hash 4864, now seen corresponding path program 5 times
[2025-02-06 19:12:43,386 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-06 19:12:43,386 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1103587651]
[2025-02-06 19:12:43,386 INFO  L95    rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1
[2025-02-06 19:12:43,386 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-06 19:12:43,389 INFO  L108    AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes.
[2025-02-06 19:12:43,391 INFO  L111    AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements.
[2025-02-06 19:12:43,391 INFO  L114    AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s)
[2025-02-06 19:12:43,391 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-06 19:12:43,391 INFO  L348             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2025-02-06 19:12:43,392 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes.
[2025-02-06 19:12:43,393 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements.
[2025-02-06 19:12:43,393 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-06 19:12:43,393 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-06 19:12:43,394 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2025-02-06 19:12:43,394 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-06 19:12:43,395 INFO  L85        PathProgramCache]: Analyzing trace with hash -725778582, now seen corresponding path program 1 times
[2025-02-06 19:12:43,395 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-06 19:12:43,395 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1376502297]
[2025-02-06 19:12:43,395 INFO  L97    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2025-02-06 19:12:43,395 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-06 19:12:43,399 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 26 statements into 1 equivalence classes.
[2025-02-06 19:12:43,402 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 26 of 26 statements.
[2025-02-06 19:12:43,402 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-06 19:12:43,402 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2025-02-06 19:12:43,419 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2025-02-06 19:12:43,419 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2025-02-06 19:12:43,419 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1376502297]
[2025-02-06 19:12:43,419 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1376502297] provided 1 perfect and 0 imperfect interpolant sequences
[2025-02-06 19:12:43,420 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2025-02-06 19:12:43,420 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2025-02-06 19:12:43,420 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [314725474]
[2025-02-06 19:12:43,420 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2025-02-06 19:12:43,420 INFO  L769   eck$LassoCheckResult]: loop already infeasible
[2025-02-06 19:12:43,420 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2025-02-06 19:12:43,420 INFO  L144   InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2025-02-06 19:12:43,421 INFO  L146   InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2025-02-06 19:12:43,421 INFO  L87              Difference]: Start difference. First operand 578 states and 898 transitions. cyclomatic complexity: 336 Second operand  has 3 states, 3 states have (on average 8.666666666666666) internal successors, (26), 3 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-06 19:12:43,437 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2025-02-06 19:12:43,437 INFO  L93              Difference]: Finished difference Result 1138 states and 1746 transitions.
[2025-02-06 19:12:43,437 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 1138 states and 1746 transitions.
[2025-02-06 19:12:43,444 INFO  L131   ngComponentsAnalysis]: Automaton has 32 accepting balls. 1136
[2025-02-06 19:12:43,450 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 1138 states to 1138 states and 1746 transitions.
[2025-02-06 19:12:43,451 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 1138
[2025-02-06 19:12:43,451 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 1138
[2025-02-06 19:12:43,451 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 1138 states and 1746 transitions.
[2025-02-06 19:12:43,454 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2025-02-06 19:12:43,454 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 1138 states and 1746 transitions.
[2025-02-06 19:12:43,455 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 1138 states and 1746 transitions.
[2025-02-06 19:12:43,475 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 1138 to 1138.
[2025-02-06 19:12:43,476 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 1138 states, 1138 states have (on average 1.5342706502636203) internal successors, (1746), 1137 states have internal predecessors, (1746), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-06 19:12:43,481 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 1138 states to 1138 states and 1746 transitions.
[2025-02-06 19:12:43,481 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 1138 states and 1746 transitions.
[2025-02-06 19:12:43,481 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2025-02-06 19:12:43,482 INFO  L432   stractBuchiCegarLoop]: Abstraction has 1138 states and 1746 transitions.
[2025-02-06 19:12:43,482 INFO  L338   stractBuchiCegarLoop]: ======== Iteration 6 ============
[2025-02-06 19:12:43,482 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 1138 states and 1746 transitions.
[2025-02-06 19:12:43,486 INFO  L131   ngComponentsAnalysis]: Automaton has 32 accepting balls. 1136
[2025-02-06 19:12:43,486 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2025-02-06 19:12:43,486 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2025-02-06 19:12:43,486 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2025-02-06 19:12:43,487 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2025-02-06 19:12:43,487 INFO  L752   eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_~cond~0#1;" 
[2025-02-06 19:12:43,487 INFO  L754   eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet16#1;main_~cond~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" 
[2025-02-06 19:12:43,487 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-06 19:12:43,487 INFO  L85        PathProgramCache]: Analyzing trace with hash 4864, now seen corresponding path program 6 times
[2025-02-06 19:12:43,487 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-06 19:12:43,487 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1481301453]
[2025-02-06 19:12:43,488 INFO  L95    rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE
[2025-02-06 19:12:43,488 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-06 19:12:43,491 INFO  L108    AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes.
[2025-02-06 19:12:43,492 INFO  L111    AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements.
[2025-02-06 19:12:43,492 INFO  L114    AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s)
[2025-02-06 19:12:43,492 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-06 19:12:43,492 INFO  L348             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2025-02-06 19:12:43,493 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes.
[2025-02-06 19:12:43,494 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements.
[2025-02-06 19:12:43,494 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-06 19:12:43,494 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-06 19:12:43,495 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2025-02-06 19:12:43,495 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-06 19:12:43,495 INFO  L85        PathProgramCache]: Analyzing trace with hash -1134602807, now seen corresponding path program 1 times
[2025-02-06 19:12:43,495 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-06 19:12:43,496 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1899954883]
[2025-02-06 19:12:43,496 INFO  L97    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2025-02-06 19:12:43,496 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-06 19:12:43,499 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 26 statements into 1 equivalence classes.
[2025-02-06 19:12:43,501 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 26 of 26 statements.
[2025-02-06 19:12:43,501 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-06 19:12:43,501 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2025-02-06 19:12:43,519 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2025-02-06 19:12:43,519 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2025-02-06 19:12:43,520 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1899954883]
[2025-02-06 19:12:43,520 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1899954883] provided 1 perfect and 0 imperfect interpolant sequences
[2025-02-06 19:12:43,520 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2025-02-06 19:12:43,520 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2025-02-06 19:12:43,520 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1104782259]
[2025-02-06 19:12:43,520 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2025-02-06 19:12:43,520 INFO  L769   eck$LassoCheckResult]: loop already infeasible
[2025-02-06 19:12:43,520 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2025-02-06 19:12:43,521 INFO  L144   InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2025-02-06 19:12:43,521 INFO  L146   InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2025-02-06 19:12:43,521 INFO  L87              Difference]: Start difference. First operand 1138 states and 1746 transitions. cyclomatic complexity: 640 Second operand  has 3 states, 3 states have (on average 8.666666666666666) internal successors, (26), 3 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-06 19:12:43,538 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2025-02-06 19:12:43,539 INFO  L93              Difference]: Finished difference Result 2242 states and 3394 transitions.
[2025-02-06 19:12:43,539 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 2242 states and 3394 transitions.
[2025-02-06 19:12:43,551 INFO  L131   ngComponentsAnalysis]: Automaton has 64 accepting balls. 2240
[2025-02-06 19:12:43,560 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 2242 states to 2242 states and 3394 transitions.
[2025-02-06 19:12:43,560 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 2242
[2025-02-06 19:12:43,566 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 2242
[2025-02-06 19:12:43,566 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 2242 states and 3394 transitions.
[2025-02-06 19:12:43,569 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2025-02-06 19:12:43,569 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 2242 states and 3394 transitions.
[2025-02-06 19:12:43,570 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 2242 states and 3394 transitions.
[2025-02-06 19:12:43,590 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 2242 to 2242.
[2025-02-06 19:12:43,592 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 2242 states, 2242 states have (on average 1.5138269402319358) internal successors, (3394), 2241 states have internal predecessors, (3394), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-06 19:12:43,599 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 2242 states to 2242 states and 3394 transitions.
[2025-02-06 19:12:43,599 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 2242 states and 3394 transitions.
[2025-02-06 19:12:43,599 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2025-02-06 19:12:43,600 INFO  L432   stractBuchiCegarLoop]: Abstraction has 2242 states and 3394 transitions.
[2025-02-06 19:12:43,600 INFO  L338   stractBuchiCegarLoop]: ======== Iteration 7 ============
[2025-02-06 19:12:43,600 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 2242 states and 3394 transitions.
[2025-02-06 19:12:43,607 INFO  L131   ngComponentsAnalysis]: Automaton has 64 accepting balls. 2240
[2025-02-06 19:12:43,607 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2025-02-06 19:12:43,607 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2025-02-06 19:12:43,608 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2025-02-06 19:12:43,608 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2025-02-06 19:12:43,608 INFO  L752   eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_~cond~0#1;" 
[2025-02-06 19:12:43,608 INFO  L754   eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet16#1;main_~cond~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" 
[2025-02-06 19:12:43,608 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-06 19:12:43,608 INFO  L85        PathProgramCache]: Analyzing trace with hash 4864, now seen corresponding path program 7 times
[2025-02-06 19:12:43,608 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-06 19:12:43,609 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [181733778]
[2025-02-06 19:12:43,609 INFO  L95    rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY
[2025-02-06 19:12:43,609 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-06 19:12:43,614 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes.
[2025-02-06 19:12:43,615 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements.
[2025-02-06 19:12:43,615 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-06 19:12:43,615 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-06 19:12:43,616 INFO  L348             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2025-02-06 19:12:43,616 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes.
[2025-02-06 19:12:43,617 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements.
[2025-02-06 19:12:43,617 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-06 19:12:43,617 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-06 19:12:43,619 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2025-02-06 19:12:43,619 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-06 19:12:43,619 INFO  L85        PathProgramCache]: Analyzing trace with hash -1979074678, now seen corresponding path program 1 times
[2025-02-06 19:12:43,619 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-06 19:12:43,619 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [40518456]
[2025-02-06 19:12:43,619 INFO  L97    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2025-02-06 19:12:43,619 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-06 19:12:43,622 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 26 statements into 1 equivalence classes.
[2025-02-06 19:12:43,624 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 26 of 26 statements.
[2025-02-06 19:12:43,624 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-06 19:12:43,624 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2025-02-06 19:12:43,638 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2025-02-06 19:12:43,638 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2025-02-06 19:12:43,638 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [40518456]
[2025-02-06 19:12:43,638 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [40518456] provided 1 perfect and 0 imperfect interpolant sequences
[2025-02-06 19:12:43,638 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2025-02-06 19:12:43,638 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2025-02-06 19:12:43,638 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [795870931]
[2025-02-06 19:12:43,638 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2025-02-06 19:12:43,638 INFO  L769   eck$LassoCheckResult]: loop already infeasible
[2025-02-06 19:12:43,638 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2025-02-06 19:12:43,639 INFO  L144   InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2025-02-06 19:12:43,639 INFO  L146   InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2025-02-06 19:12:43,639 INFO  L87              Difference]: Start difference. First operand 2242 states and 3394 transitions. cyclomatic complexity: 1216 Second operand  has 3 states, 3 states have (on average 8.666666666666666) internal successors, (26), 3 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-06 19:12:43,707 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2025-02-06 19:12:43,707 INFO  L93              Difference]: Finished difference Result 4418 states and 6594 transitions.
[2025-02-06 19:12:43,707 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 4418 states and 6594 transitions.
[2025-02-06 19:12:43,728 INFO  L131   ngComponentsAnalysis]: Automaton has 128 accepting balls. 4416
[2025-02-06 19:12:43,743 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 4418 states to 4418 states and 6594 transitions.
[2025-02-06 19:12:43,743 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 4418
[2025-02-06 19:12:43,745 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 4418
[2025-02-06 19:12:43,745 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 4418 states and 6594 transitions.
[2025-02-06 19:12:43,749 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2025-02-06 19:12:43,749 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 4418 states and 6594 transitions.
[2025-02-06 19:12:43,751 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 4418 states and 6594 transitions.
[2025-02-06 19:12:43,789 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 4418 to 4418.
[2025-02-06 19:12:43,794 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 4418 states, 4418 states have (on average 1.4925305568130376) internal successors, (6594), 4417 states have internal predecessors, (6594), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-06 19:12:43,805 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 4418 states to 4418 states and 6594 transitions.
[2025-02-06 19:12:43,805 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 4418 states and 6594 transitions.
[2025-02-06 19:12:43,805 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2025-02-06 19:12:43,806 INFO  L432   stractBuchiCegarLoop]: Abstraction has 4418 states and 6594 transitions.
[2025-02-06 19:12:43,806 INFO  L338   stractBuchiCegarLoop]: ======== Iteration 8 ============
[2025-02-06 19:12:43,806 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 4418 states and 6594 transitions.
[2025-02-06 19:12:43,819 INFO  L131   ngComponentsAnalysis]: Automaton has 128 accepting balls. 4416
[2025-02-06 19:12:43,819 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2025-02-06 19:12:43,819 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2025-02-06 19:12:43,820 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2025-02-06 19:12:43,820 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2025-02-06 19:12:43,820 INFO  L752   eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_~cond~0#1;" 
[2025-02-06 19:12:43,820 INFO  L754   eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet16#1;main_~cond~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" 
[2025-02-06 19:12:43,821 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-06 19:12:43,821 INFO  L85        PathProgramCache]: Analyzing trace with hash 4864, now seen corresponding path program 8 times
[2025-02-06 19:12:43,821 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-06 19:12:43,821 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1315036722]
[2025-02-06 19:12:43,821 INFO  L95    rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1
[2025-02-06 19:12:43,821 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-06 19:12:43,823 INFO  L108    AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes.
[2025-02-06 19:12:43,824 INFO  L111    AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements.
[2025-02-06 19:12:43,824 INFO  L114    AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s)
[2025-02-06 19:12:43,824 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-06 19:12:43,824 INFO  L348             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2025-02-06 19:12:43,825 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes.
[2025-02-06 19:12:43,826 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements.
[2025-02-06 19:12:43,826 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-06 19:12:43,826 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-06 19:12:43,827 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2025-02-06 19:12:43,828 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-06 19:12:43,828 INFO  L85        PathProgramCache]: Analyzing trace with hash 1318820265, now seen corresponding path program 1 times
[2025-02-06 19:12:43,828 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-06 19:12:43,828 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [32256457]
[2025-02-06 19:12:43,828 INFO  L97    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2025-02-06 19:12:43,828 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-06 19:12:43,831 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 26 statements into 1 equivalence classes.
[2025-02-06 19:12:43,833 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 26 of 26 statements.
[2025-02-06 19:12:43,833 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-06 19:12:43,833 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2025-02-06 19:12:43,848 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2025-02-06 19:12:43,848 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2025-02-06 19:12:43,848 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [32256457]
[2025-02-06 19:12:43,848 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [32256457] provided 1 perfect and 0 imperfect interpolant sequences
[2025-02-06 19:12:43,848 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2025-02-06 19:12:43,848 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2025-02-06 19:12:43,848 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [85087752]
[2025-02-06 19:12:43,848 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2025-02-06 19:12:43,848 INFO  L769   eck$LassoCheckResult]: loop already infeasible
[2025-02-06 19:12:43,848 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2025-02-06 19:12:43,848 INFO  L144   InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2025-02-06 19:12:43,848 INFO  L146   InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2025-02-06 19:12:43,848 INFO  L87              Difference]: Start difference. First operand 4418 states and 6594 transitions. cyclomatic complexity: 2304 Second operand  has 3 states, 3 states have (on average 8.666666666666666) internal successors, (26), 3 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-06 19:12:43,913 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2025-02-06 19:12:43,913 INFO  L93              Difference]: Finished difference Result 8706 states and 12802 transitions.
[2025-02-06 19:12:43,913 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 8706 states and 12802 transitions.
[2025-02-06 19:12:43,944 INFO  L131   ngComponentsAnalysis]: Automaton has 256 accepting balls. 8704
[2025-02-06 19:12:43,971 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 8706 states to 8706 states and 12802 transitions.
[2025-02-06 19:12:43,971 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 8706
[2025-02-06 19:12:43,975 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 8706
[2025-02-06 19:12:43,975 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 8706 states and 12802 transitions.
[2025-02-06 19:12:43,981 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2025-02-06 19:12:43,981 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 8706 states and 12802 transitions.
[2025-02-06 19:12:43,985 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 8706 states and 12802 transitions.
[2025-02-06 19:12:44,093 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 8706 to 8706.
[2025-02-06 19:12:44,103 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 8706 states, 8706 states have (on average 1.4704801286469102) internal successors, (12802), 8705 states have internal predecessors, (12802), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-06 19:12:44,122 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 8706 states to 8706 states and 12802 transitions.
[2025-02-06 19:12:44,123 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 8706 states and 12802 transitions.
[2025-02-06 19:12:44,123 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2025-02-06 19:12:44,123 INFO  L432   stractBuchiCegarLoop]: Abstraction has 8706 states and 12802 transitions.
[2025-02-06 19:12:44,124 INFO  L338   stractBuchiCegarLoop]: ======== Iteration 9 ============
[2025-02-06 19:12:44,124 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 8706 states and 12802 transitions.
[2025-02-06 19:12:44,148 INFO  L131   ngComponentsAnalysis]: Automaton has 256 accepting balls. 8704
[2025-02-06 19:12:44,148 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2025-02-06 19:12:44,148 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2025-02-06 19:12:44,148 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2025-02-06 19:12:44,149 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2025-02-06 19:12:44,149 INFO  L752   eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_~cond~0#1;" 
[2025-02-06 19:12:44,149 INFO  L754   eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet16#1;main_~cond~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" 
[2025-02-06 19:12:44,149 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-06 19:12:44,149 INFO  L85        PathProgramCache]: Analyzing trace with hash 4864, now seen corresponding path program 9 times
[2025-02-06 19:12:44,149 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-06 19:12:44,150 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1116739877]
[2025-02-06 19:12:44,150 INFO  L95    rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2
[2025-02-06 19:12:44,150 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-06 19:12:44,152 INFO  L108    AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes.
[2025-02-06 19:12:44,153 INFO  L111    AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements.
[2025-02-06 19:12:44,153 INFO  L114    AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s)
[2025-02-06 19:12:44,153 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-06 19:12:44,153 INFO  L348             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2025-02-06 19:12:44,154 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes.
[2025-02-06 19:12:44,155 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements.
[2025-02-06 19:12:44,155 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-06 19:12:44,155 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-06 19:12:44,156 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2025-02-06 19:12:44,156 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-06 19:12:44,156 INFO  L85        PathProgramCache]: Analyzing trace with hash -1622837334, now seen corresponding path program 1 times
[2025-02-06 19:12:44,156 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-06 19:12:44,157 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [853244007]
[2025-02-06 19:12:44,157 INFO  L97    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2025-02-06 19:12:44,157 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-06 19:12:44,160 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 26 statements into 1 equivalence classes.
[2025-02-06 19:12:44,161 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 26 of 26 statements.
[2025-02-06 19:12:44,162 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-06 19:12:44,162 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2025-02-06 19:12:44,177 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2025-02-06 19:12:44,177 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2025-02-06 19:12:44,177 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [853244007]
[2025-02-06 19:12:44,177 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [853244007] provided 1 perfect and 0 imperfect interpolant sequences
[2025-02-06 19:12:44,177 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2025-02-06 19:12:44,177 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2025-02-06 19:12:44,177 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [453045538]
[2025-02-06 19:12:44,177 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2025-02-06 19:12:44,178 INFO  L769   eck$LassoCheckResult]: loop already infeasible
[2025-02-06 19:12:44,178 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2025-02-06 19:12:44,178 INFO  L144   InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2025-02-06 19:12:44,178 INFO  L146   InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2025-02-06 19:12:44,178 INFO  L87              Difference]: Start difference. First operand 8706 states and 12802 transitions. cyclomatic complexity: 4352 Second operand  has 3 states, 3 states have (on average 8.666666666666666) internal successors, (26), 3 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-06 19:12:44,235 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2025-02-06 19:12:44,235 INFO  L93              Difference]: Finished difference Result 17154 states and 24834 transitions.
[2025-02-06 19:12:44,235 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 17154 states and 24834 transitions.
[2025-02-06 19:12:44,308 INFO  L131   ngComponentsAnalysis]: Automaton has 512 accepting balls. 17152
[2025-02-06 19:12:44,355 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 17154 states to 17154 states and 24834 transitions.
[2025-02-06 19:12:44,355 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 17154
[2025-02-06 19:12:44,364 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 17154
[2025-02-06 19:12:44,364 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 17154 states and 24834 transitions.
[2025-02-06 19:12:44,383 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2025-02-06 19:12:44,383 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 17154 states and 24834 transitions.
[2025-02-06 19:12:44,394 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 17154 states and 24834 transitions.
[2025-02-06 19:12:44,724 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 17154 to 17154.
[2025-02-06 19:12:44,768 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 17154 states, 17154 states have (on average 1.4477089891570478) internal successors, (24834), 17153 states have internal predecessors, (24834), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-06 19:12:44,804 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 17154 states to 17154 states and 24834 transitions.
[2025-02-06 19:12:44,804 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 17154 states and 24834 transitions.
[2025-02-06 19:12:44,804 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2025-02-06 19:12:44,806 INFO  L432   stractBuchiCegarLoop]: Abstraction has 17154 states and 24834 transitions.
[2025-02-06 19:12:44,806 INFO  L338   stractBuchiCegarLoop]: ======== Iteration 10 ============
[2025-02-06 19:12:44,806 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 17154 states and 24834 transitions.
[2025-02-06 19:12:44,947 INFO  L131   ngComponentsAnalysis]: Automaton has 512 accepting balls. 17152
[2025-02-06 19:12:44,948 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2025-02-06 19:12:44,948 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2025-02-06 19:12:44,948 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2025-02-06 19:12:44,948 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2025-02-06 19:12:44,948 INFO  L752   eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_~cond~0#1;" 
[2025-02-06 19:12:44,948 INFO  L754   eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet16#1;main_~cond~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" 
[2025-02-06 19:12:44,949 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-06 19:12:44,949 INFO  L85        PathProgramCache]: Analyzing trace with hash 4864, now seen corresponding path program 10 times
[2025-02-06 19:12:44,949 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-06 19:12:44,949 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1368117671]
[2025-02-06 19:12:44,949 INFO  L95    rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST
[2025-02-06 19:12:44,949 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-06 19:12:44,953 INFO  L108    AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes.
[2025-02-06 19:12:44,954 INFO  L111    AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements.
[2025-02-06 19:12:44,954 INFO  L114    AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s)
[2025-02-06 19:12:44,954 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-06 19:12:44,957 INFO  L348             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2025-02-06 19:12:44,958 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes.
[2025-02-06 19:12:44,960 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements.
[2025-02-06 19:12:44,962 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-06 19:12:44,962 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-06 19:12:44,964 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2025-02-06 19:12:44,965 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-06 19:12:44,965 INFO  L85        PathProgramCache]: Analyzing trace with hash -2133371511, now seen corresponding path program 1 times
[2025-02-06 19:12:44,965 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-06 19:12:44,965 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [846832936]
[2025-02-06 19:12:44,965 INFO  L97    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2025-02-06 19:12:44,965 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-06 19:12:44,973 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 26 statements into 1 equivalence classes.
[2025-02-06 19:12:44,975 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 26 of 26 statements.
[2025-02-06 19:12:44,975 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-06 19:12:44,975 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2025-02-06 19:12:44,992 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2025-02-06 19:12:44,993 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2025-02-06 19:12:44,993 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [846832936]
[2025-02-06 19:12:44,993 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [846832936] provided 1 perfect and 0 imperfect interpolant sequences
[2025-02-06 19:12:44,993 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2025-02-06 19:12:44,993 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2025-02-06 19:12:44,993 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [269386525]
[2025-02-06 19:12:44,993 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2025-02-06 19:12:44,993 INFO  L769   eck$LassoCheckResult]: loop already infeasible
[2025-02-06 19:12:44,994 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2025-02-06 19:12:44,994 INFO  L144   InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2025-02-06 19:12:44,994 INFO  L146   InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2025-02-06 19:12:44,994 INFO  L87              Difference]: Start difference. First operand 17154 states and 24834 transitions. cyclomatic complexity: 8192 Second operand  has 3 states, 3 states have (on average 8.666666666666666) internal successors, (26), 3 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-06 19:12:45,049 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2025-02-06 19:12:45,049 INFO  L93              Difference]: Finished difference Result 33794 states and 48130 transitions.
[2025-02-06 19:12:45,049 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 33794 states and 48130 transitions.
[2025-02-06 19:12:45,287 INFO  L131   ngComponentsAnalysis]: Automaton has 1024 accepting balls. 33792
[2025-02-06 19:12:45,359 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 33794 states to 33794 states and 48130 transitions.
[2025-02-06 19:12:45,359 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 33794
[2025-02-06 19:12:45,386 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 33794
[2025-02-06 19:12:45,387 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 33794 states and 48130 transitions.
[2025-02-06 19:12:45,416 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2025-02-06 19:12:45,416 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 33794 states and 48130 transitions.
[2025-02-06 19:12:45,436 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 33794 states and 48130 transitions.
[2025-02-06 19:12:45,843 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 33794 to 33794.
[2025-02-06 19:12:45,893 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 33794 states, 33794 states have (on average 1.4242173166834349) internal successors, (48130), 33793 states have internal predecessors, (48130), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-06 19:12:45,969 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 33794 states to 33794 states and 48130 transitions.
[2025-02-06 19:12:45,970 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 33794 states and 48130 transitions.
[2025-02-06 19:12:45,970 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2025-02-06 19:12:45,971 INFO  L432   stractBuchiCegarLoop]: Abstraction has 33794 states and 48130 transitions.
[2025-02-06 19:12:45,971 INFO  L338   stractBuchiCegarLoop]: ======== Iteration 11 ============
[2025-02-06 19:12:45,972 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 33794 states and 48130 transitions.
[2025-02-06 19:12:46,062 INFO  L131   ngComponentsAnalysis]: Automaton has 1024 accepting balls. 33792
[2025-02-06 19:12:46,062 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2025-02-06 19:12:46,062 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2025-02-06 19:12:46,063 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2025-02-06 19:12:46,063 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2025-02-06 19:12:46,063 INFO  L752   eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_~cond~0#1;" 
[2025-02-06 19:12:46,063 INFO  L754   eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet16#1;main_~cond~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" 
[2025-02-06 19:12:46,064 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-06 19:12:46,064 INFO  L85        PathProgramCache]: Analyzing trace with hash 4864, now seen corresponding path program 11 times
[2025-02-06 19:12:46,064 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-06 19:12:46,064 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [527276110]
[2025-02-06 19:12:46,064 INFO  L95    rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1
[2025-02-06 19:12:46,064 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-06 19:12:46,067 INFO  L108    AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes.
[2025-02-06 19:12:46,068 INFO  L111    AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements.
[2025-02-06 19:12:46,068 INFO  L114    AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s)
[2025-02-06 19:12:46,068 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-06 19:12:46,069 INFO  L348             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2025-02-06 19:12:46,070 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes.
[2025-02-06 19:12:46,070 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements.
[2025-02-06 19:12:46,070 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-06 19:12:46,070 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-06 19:12:46,072 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2025-02-06 19:12:46,072 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-06 19:12:46,072 INFO  L85        PathProgramCache]: Analyzing trace with hash -625819702, now seen corresponding path program 1 times
[2025-02-06 19:12:46,072 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-06 19:12:46,073 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [500048758]
[2025-02-06 19:12:46,073 INFO  L97    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2025-02-06 19:12:46,073 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-06 19:12:46,077 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 26 statements into 1 equivalence classes.
[2025-02-06 19:12:46,078 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 26 of 26 statements.
[2025-02-06 19:12:46,078 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-06 19:12:46,078 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2025-02-06 19:12:46,094 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2025-02-06 19:12:46,094 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2025-02-06 19:12:46,094 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [500048758]
[2025-02-06 19:12:46,094 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [500048758] provided 1 perfect and 0 imperfect interpolant sequences
[2025-02-06 19:12:46,095 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2025-02-06 19:12:46,095 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2025-02-06 19:12:46,095 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [166866556]
[2025-02-06 19:12:46,095 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2025-02-06 19:12:46,095 INFO  L769   eck$LassoCheckResult]: loop already infeasible
[2025-02-06 19:12:46,095 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2025-02-06 19:12:46,095 INFO  L144   InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2025-02-06 19:12:46,096 INFO  L146   InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2025-02-06 19:12:46,096 INFO  L87              Difference]: Start difference. First operand 33794 states and 48130 transitions. cyclomatic complexity: 15360 Second operand  has 3 states, 3 states have (on average 8.666666666666666) internal successors, (26), 3 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-06 19:12:46,288 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2025-02-06 19:12:46,288 INFO  L93              Difference]: Finished difference Result 66562 states and 93186 transitions.
[2025-02-06 19:12:46,288 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 66562 states and 93186 transitions.
[2025-02-06 19:12:46,675 INFO  L131   ngComponentsAnalysis]: Automaton has 2048 accepting balls. 66560
[2025-02-06 19:12:46,844 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 66562 states to 66562 states and 93186 transitions.
[2025-02-06 19:12:46,845 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 66562
[2025-02-06 19:12:46,882 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 66562
[2025-02-06 19:12:46,883 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 66562 states and 93186 transitions.
[2025-02-06 19:12:46,927 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2025-02-06 19:12:46,928 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 66562 states and 93186 transitions.
[2025-02-06 19:12:46,955 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 66562 states and 93186 transitions.
[2025-02-06 19:12:47,820 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 66562 to 66562.
[2025-02-06 19:12:47,928 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 66562 states, 66562 states have (on average 1.3999879811303746) internal successors, (93186), 66561 states have internal predecessors, (93186), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-06 19:12:48,317 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 66562 states to 66562 states and 93186 transitions.
[2025-02-06 19:12:48,320 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 66562 states and 93186 transitions.
[2025-02-06 19:12:48,320 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2025-02-06 19:12:48,321 INFO  L432   stractBuchiCegarLoop]: Abstraction has 66562 states and 93186 transitions.
[2025-02-06 19:12:48,321 INFO  L338   stractBuchiCegarLoop]: ======== Iteration 12 ============
[2025-02-06 19:12:48,321 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 66562 states and 93186 transitions.
[2025-02-06 19:12:48,487 INFO  L131   ngComponentsAnalysis]: Automaton has 2048 accepting balls. 66560
[2025-02-06 19:12:48,488 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2025-02-06 19:12:48,488 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2025-02-06 19:12:48,489 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2025-02-06 19:12:48,489 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2025-02-06 19:12:48,489 INFO  L752   eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_~cond~0#1;" 
[2025-02-06 19:12:48,489 INFO  L754   eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet16#1;main_~cond~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" 
[2025-02-06 19:12:48,489 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-06 19:12:48,490 INFO  L85        PathProgramCache]: Analyzing trace with hash 4864, now seen corresponding path program 12 times
[2025-02-06 19:12:48,490 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-06 19:12:48,490 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [53584831]
[2025-02-06 19:12:48,490 INFO  L95    rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE
[2025-02-06 19:12:48,490 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-06 19:12:48,492 INFO  L108    AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes.
[2025-02-06 19:12:48,493 INFO  L111    AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements.
[2025-02-06 19:12:48,493 INFO  L114    AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s)
[2025-02-06 19:12:48,494 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-06 19:12:48,494 INFO  L348             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2025-02-06 19:12:48,494 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes.
[2025-02-06 19:12:48,495 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements.
[2025-02-06 19:12:48,495 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-06 19:12:48,495 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-06 19:12:48,496 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2025-02-06 19:12:48,496 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-06 19:12:48,496 INFO  L85        PathProgramCache]: Analyzing trace with hash -1131378327, now seen corresponding path program 1 times
[2025-02-06 19:12:48,497 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-06 19:12:48,497 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [627555476]
[2025-02-06 19:12:48,497 INFO  L97    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2025-02-06 19:12:48,497 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-06 19:12:48,499 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 26 statements into 1 equivalence classes.
[2025-02-06 19:12:48,500 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 26 of 26 statements.
[2025-02-06 19:12:48,500 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-06 19:12:48,500 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2025-02-06 19:12:48,510 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2025-02-06 19:12:48,510 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2025-02-06 19:12:48,510 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [627555476]
[2025-02-06 19:12:48,510 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [627555476] provided 1 perfect and 0 imperfect interpolant sequences
[2025-02-06 19:12:48,511 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2025-02-06 19:12:48,511 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2025-02-06 19:12:48,511 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1098361356]
[2025-02-06 19:12:48,511 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2025-02-06 19:12:48,511 INFO  L769   eck$LassoCheckResult]: loop already infeasible
[2025-02-06 19:12:48,511 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2025-02-06 19:12:48,511 INFO  L144   InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2025-02-06 19:12:48,511 INFO  L146   InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2025-02-06 19:12:48,512 INFO  L87              Difference]: Start difference. First operand 66562 states and 93186 transitions. cyclomatic complexity: 28672 Second operand  has 3 states, 2 states have (on average 13.0) internal successors, (26), 3 states have internal predecessors, (26), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-06 19:12:48,774 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2025-02-06 19:12:48,774 INFO  L93              Difference]: Finished difference Result 131074 states and 180226 transitions.
[2025-02-06 19:12:48,774 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 131074 states and 180226 transitions.
[2025-02-06 19:12:49,775 INFO  L131   ngComponentsAnalysis]: Automaton has 4096 accepting balls. 131072
[2025-02-06 19:12:50,116 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 131074 states to 131074 states and 180226 transitions.
[2025-02-06 19:12:50,116 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 131074
[2025-02-06 19:12:50,166 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 131074
[2025-02-06 19:12:50,167 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 131074 states and 180226 transitions.
[2025-02-06 19:12:50,228 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2025-02-06 19:12:50,228 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 131074 states and 180226 transitions.
[2025-02-06 19:12:50,276 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 131074 states and 180226 transitions.
[2025-02-06 19:12:51,221 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 131074 to 131074.
[2025-02-06 19:12:51,363 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 131074 states, 131074 states have (on average 1.3749942780414117) internal successors, (180226), 131073 states have internal predecessors, (180226), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-06 19:12:52,076 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 131074 states to 131074 states and 180226 transitions.
[2025-02-06 19:12:52,077 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 131074 states and 180226 transitions.
[2025-02-06 19:12:52,077 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2025-02-06 19:12:52,078 INFO  L432   stractBuchiCegarLoop]: Abstraction has 131074 states and 180226 transitions.
[2025-02-06 19:12:52,078 INFO  L338   stractBuchiCegarLoop]: ======== Iteration 13 ============
[2025-02-06 19:12:52,078 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 131074 states and 180226 transitions.
[2025-02-06 19:12:52,330 INFO  L131   ngComponentsAnalysis]: Automaton has 4096 accepting balls. 131072
[2025-02-06 19:12:52,331 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2025-02-06 19:12:52,331 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2025-02-06 19:12:52,333 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1]
[2025-02-06 19:12:52,333 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2025-02-06 19:12:52,333 INFO  L752   eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_~cond~0#1;" 
[2025-02-06 19:12:52,333 INFO  L754   eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet16#1;main_~cond~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" 
[2025-02-06 19:12:52,333 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-06 19:12:52,333 INFO  L85        PathProgramCache]: Analyzing trace with hash 4864, now seen corresponding path program 13 times
[2025-02-06 19:12:52,334 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-06 19:12:52,334 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [373477244]
[2025-02-06 19:12:52,334 INFO  L95    rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY
[2025-02-06 19:12:52,334 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-06 19:12:52,336 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes.
[2025-02-06 19:12:52,337 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements.
[2025-02-06 19:12:52,341 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-06 19:12:52,341 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-06 19:12:52,342 INFO  L348             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2025-02-06 19:12:52,342 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes.
[2025-02-06 19:12:52,343 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements.
[2025-02-06 19:12:52,343 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-06 19:12:52,343 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-06 19:12:52,344 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2025-02-06 19:12:52,344 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-06 19:12:52,344 INFO  L85        PathProgramCache]: Analyzing trace with hash -1424781334, now seen corresponding path program 1 times
[2025-02-06 19:12:52,344 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-06 19:12:52,345 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1383235612]
[2025-02-06 19:12:52,345 INFO  L97    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2025-02-06 19:12:52,345 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-06 19:12:52,347 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 26 statements into 1 equivalence classes.
[2025-02-06 19:12:52,351 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 26 of 26 statements.
[2025-02-06 19:12:52,351 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-06 19:12:52,352 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-06 19:12:52,352 INFO  L348             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2025-02-06 19:12:52,352 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 26 statements into 1 equivalence classes.
[2025-02-06 19:12:52,353 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 26 of 26 statements.
[2025-02-06 19:12:52,356 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-06 19:12:52,356 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-06 19:12:52,359 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2025-02-06 19:12:52,364 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-06 19:12:52,364 INFO  L85        PathProgramCache]: Analyzing trace with hash 1979765289, now seen corresponding path program 1 times
[2025-02-06 19:12:52,364 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-06 19:12:52,364 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [772830210]
[2025-02-06 19:12:52,364 INFO  L97    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2025-02-06 19:12:52,364 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-06 19:12:52,367 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes.
[2025-02-06 19:12:52,368 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements.
[2025-02-06 19:12:52,368 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-06 19:12:52,368 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-06 19:12:52,368 INFO  L348             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2025-02-06 19:12:52,369 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes.
[2025-02-06 19:12:52,370 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements.
[2025-02-06 19:12:52,370 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-06 19:12:52,371 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-06 19:12:52,373 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2025-02-06 19:12:52,936 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes.
[2025-02-06 19:12:52,937 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements.
[2025-02-06 19:12:52,937 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-06 19:12:52,937 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-06 19:12:52,937 INFO  L348             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2025-02-06 19:12:52,943 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes.
[2025-02-06 19:12:52,944 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements.
[2025-02-06 19:12:52,944 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-06 19:12:52,944 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-06 19:12:52,963 INFO  L201        PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 06.02 07:12:52 BoogieIcfgContainer
[2025-02-06 19:12:52,963 INFO  L131        PluginConnector]: ------------------------ END BuchiAutomizer----------------------------
[2025-02-06 19:12:52,963 INFO  L112        PluginConnector]: ------------------------Witness Printer----------------------------
[2025-02-06 19:12:52,963 INFO  L270        PluginConnector]: Initializing Witness Printer...
[2025-02-06 19:12:52,964 INFO  L274        PluginConnector]: Witness Printer initialized
[2025-02-06 19:12:52,964 INFO  L184        PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 06.02 07:12:42" (3/4) ...
[2025-02-06 19:12:52,965 INFO  L143         WitnessPrinter]: Generating witness for non-termination counterexample
[2025-02-06 19:12:52,988 INFO  L149         WitnessManager]: Wrote witness to /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/witness.graphml
[2025-02-06 19:12:52,989 INFO  L131        PluginConnector]: ------------------------ END Witness Printer----------------------------
[2025-02-06 19:12:52,989 INFO  L158              Benchmark]: Toolchain (without parser) took 10696.71ms. Allocated memory was 142.6MB in the beginning and 6.7GB in the end (delta: 6.5GB). Free memory was 112.3MB in the beginning and 5.7GB in the end (delta: -5.6GB). Peak memory consumption was 952.5MB. Max. memory is 16.1GB.
[2025-02-06 19:12:52,989 INFO  L158              Benchmark]: CDTParser took 0.22ms. Allocated memory is still 201.3MB. Free memory is still 128.5MB. There was no memory consumed. Max. memory is 16.1GB.
[2025-02-06 19:12:52,990 INFO  L158              Benchmark]: CACSL2BoogieTranslator took 172.28ms. Allocated memory is still 142.6MB. Free memory was 111.5MB in the beginning and 100.4MB in the end (delta: 11.1MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB.
[2025-02-06 19:12:52,990 INFO  L158              Benchmark]: Boogie Procedure Inliner took 25.74ms. Allocated memory is still 142.6MB. Free memory was 100.4MB in the beginning and 98.8MB in the end (delta: 1.6MB). There was no memory consumed. Max. memory is 16.1GB.
[2025-02-06 19:12:52,993 INFO  L158              Benchmark]: Boogie Preprocessor took 25.41ms. Allocated memory is still 142.6MB. Free memory was 98.8MB in the beginning and 98.0MB in the end (delta: 808.7kB). There was no memory consumed. Max. memory is 16.1GB.
[2025-02-06 19:12:52,994 INFO  L158              Benchmark]: IcfgBuilder took 276.84ms. Allocated memory is still 142.6MB. Free memory was 98.0MB in the beginning and 82.8MB in the end (delta: 15.2MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB.
[2025-02-06 19:12:52,994 INFO  L158              Benchmark]: BuchiAutomizer took 10167.29ms. Allocated memory was 142.6MB in the beginning and 6.7GB in the end (delta: 6.5GB). Free memory was 82.0MB in the beginning and 5.7GB in the end (delta: -5.6GB). Peak memory consumption was 918.9MB. Max. memory is 16.1GB.
[2025-02-06 19:12:52,994 INFO  L158              Benchmark]: Witness Printer took 25.34ms. Allocated memory is still 6.7GB. Free memory was 5.7GB in the beginning and 5.7GB in the end (delta: 4.6MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB.
[2025-02-06 19:12:52,995 INFO  L338   ainManager$Toolchain]: #######################  End [Toolchain 1] #######################
 --- Results ---
 * Results from de.uni_freiburg.informatik.ultimate.core:
  - StatisticsResult: Toolchain Benchmarks
    Benchmark results are:
 * CDTParser took 0.22ms. Allocated memory is still 201.3MB. Free memory is still 128.5MB. There was no memory consumed. Max. memory is 16.1GB.
 * CACSL2BoogieTranslator took 172.28ms. Allocated memory is still 142.6MB. Free memory was 111.5MB in the beginning and 100.4MB in the end (delta: 11.1MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB.
 * Boogie Procedure Inliner took 25.74ms. Allocated memory is still 142.6MB. Free memory was 100.4MB in the beginning and 98.8MB in the end (delta: 1.6MB). There was no memory consumed. Max. memory is 16.1GB.
 * Boogie Preprocessor took 25.41ms. Allocated memory is still 142.6MB. Free memory was 98.8MB in the beginning and 98.0MB in the end (delta: 808.7kB). There was no memory consumed. Max. memory is 16.1GB.
 * IcfgBuilder took 276.84ms. Allocated memory is still 142.6MB. Free memory was 98.0MB in the beginning and 82.8MB in the end (delta: 15.2MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB.
 * BuchiAutomizer took 10167.29ms. Allocated memory was 142.6MB in the beginning and 6.7GB in the end (delta: 6.5GB). Free memory was 82.0MB in the beginning and 5.7GB in the end (delta: -5.6GB). Peak memory consumption was 918.9MB. Max. memory is 16.1GB.
 * Witness Printer took 25.34ms. Allocated memory is still 6.7GB. Free memory was 5.7GB in the beginning and 5.7GB in the end (delta: 4.6MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB.
 * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction:
  - StatisticsResult: Constructed decomposition of program
    Your program was decomposed into 12 terminating modules (12 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.12 modules have a trivial ranking function, the largest among these consists of 3 locations. The remainder module has 131074 locations.
  - StatisticsResult: Timing statistics
    BüchiAutomizer plugin needed 10.1s and 13 iterations.  TraceHistogramMax:1. Analysis of lassos took 1.2s. Construction of modules took 0.0s. Büchi inclusion checks took 8.0s. Highest rank in rank-based complementation 0. Minimization of det autom 12. Minimization of nondet autom 0. Automata minimization 4.5s AutomataMinimizationTime, 12 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations. Non-live state removal took 2.4s Buchi closure took 0.1s. Biggest automaton had -1 states and ocurred in iteration -1.	Nontrivial modules had stage [0, 0, 0, 0, 0].	InterpolantCoveringCapabilityFinite: 0/0	InterpolantCoveringCapabilityBuchi: 0/0	HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 590 SdHoareTripleChecker+Valid, 0.1s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 590 mSDsluCounter, 1850 SdHoareTripleChecker+Invalid, 0.1s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 710 mSDsCounter, 24 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 62 IncrementalHoareTripleChecker+Invalid, 86 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 24 mSolverCounterUnsat, 1140 mSDtfsCounter, 62 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown	LassoAnalysisResults: nont1 unkn0 SFLI12 SFLT0 conc0 concLT0 SILN0 SILU0 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0	LassoNonterminationAnalysisSatUnbounded: 0	LassoNonterminationAnalysisUnsat: 0	LassoNonterminationAnalysisUnknown: 0	LassoNonterminationAnalysisTime: 0.0s	InitialAbstractionConstructionTime: 0.0s
  - TerminationAnalysisResult: Nontermination possible
    Buchi Automizer proved that your program is nonterminating for some inputs
  - LassoShapedNonTerminationArgument [Line: 47]: Nontermination argument in form of an infinite program execution.
    Nontermination argument in form of an infinite program execution.
Stem:
[L8]         int p1 = __VERIFIER_nondet_int();
[L9]         int lk1;
[L11]        int p2 = __VERIFIER_nondet_int();
[L12]        int lk2;
[L14]        int p3 = __VERIFIER_nondet_int();
[L15]        int lk3;
[L17]        int p4 = __VERIFIER_nondet_int();
[L18]        int lk4;
[L20]        int p5 = __VERIFIER_nondet_int();
[L21]        int lk5;
[L23]        int p6 = __VERIFIER_nondet_int();
[L24]        int lk6;
[L26]        int p7 = __VERIFIER_nondet_int();
[L27]        int lk7;
[L29]        int p8 = __VERIFIER_nondet_int();
[L30]        int lk8;
[L32]        int p9 = __VERIFIER_nondet_int();
[L33]        int lk9;
[L35]        int p10 = __VERIFIER_nondet_int();
[L36]        int lk10;
[L38]        int p11 = __VERIFIER_nondet_int();
[L39]        int lk11;
[L41]        int p12 = __VERIFIER_nondet_int();
[L42]        int lk12;
[L45]        int cond;
Loop:
[L47]   COND TRUE   1
[L48]               cond = __VERIFIER_nondet_int()
[L49]   COND FALSE  !(cond == 0)
[L52]               lk1 = 0
[L54]               lk2 = 0
[L56]               lk3 = 0
[L58]               lk4 = 0
[L60]               lk5 = 0
[L62]               lk6 = 0
[L64]               lk7 = 0
[L66]               lk8 = 0
[L68]               lk9 = 0
[L70]               lk10 = 0
[L72]               lk11 = 0
[L74]               lk12 = 0
[L78]   COND FALSE  !(p1 != 0)
[L82]   COND FALSE  !(p2 != 0)
[L86]   COND FALSE  !(p3 != 0)
[L90]   COND FALSE  !(p4 != 0)
[L94]   COND FALSE  !(p5 != 0)
[L98]   COND FALSE  !(p6 != 0)
[L102]  COND FALSE  !(p7 != 0)
[L106]  COND FALSE  !(p8 != 0)
[L110]  COND FALSE  !(p9 != 0)
[L114]  COND FALSE  !(p10 != 0)
[L118]  COND FALSE  !(p11 != 0)
[L122]  COND FALSE  !(p12 != 0)
[L128]  COND FALSE  !(p1 != 0)
[L133]  COND FALSE  !(p2 != 0)
[L138]  COND FALSE  !(p3 != 0)
[L143]  COND FALSE  !(p4 != 0)
[L148]  COND FALSE  !(p5 != 0)
[L153]  COND FALSE  !(p6 != 0)
[L158]  COND FALSE  !(p7 != 0)
[L163]  COND FALSE  !(p8 != 0)
[L168]  COND FALSE  !(p9 != 0)
[L173]  COND FALSE  !(p10 != 0)
[L178]  COND FALSE  !(p11 != 0)
[L183]  COND FALSE  !(p12 != 0)
End of lasso representation.
  - StatisticsResult: NonterminationArgumentStatistics
    Fixpoint
  - NonterminatingLassoResult [Line: 47]: Nonterminating execution
    Found a nonterminating execution for the following lasso shaped sequence of statements.
Stem:
[L8]         int p1 = __VERIFIER_nondet_int();
[L9]         int lk1;
[L11]        int p2 = __VERIFIER_nondet_int();
[L12]        int lk2;
[L14]        int p3 = __VERIFIER_nondet_int();
[L15]        int lk3;
[L17]        int p4 = __VERIFIER_nondet_int();
[L18]        int lk4;
[L20]        int p5 = __VERIFIER_nondet_int();
[L21]        int lk5;
[L23]        int p6 = __VERIFIER_nondet_int();
[L24]        int lk6;
[L26]        int p7 = __VERIFIER_nondet_int();
[L27]        int lk7;
[L29]        int p8 = __VERIFIER_nondet_int();
[L30]        int lk8;
[L32]        int p9 = __VERIFIER_nondet_int();
[L33]        int lk9;
[L35]        int p10 = __VERIFIER_nondet_int();
[L36]        int lk10;
[L38]        int p11 = __VERIFIER_nondet_int();
[L39]        int lk11;
[L41]        int p12 = __VERIFIER_nondet_int();
[L42]        int lk12;
[L45]        int cond;
Loop:
[L47]   COND TRUE   1
[L48]               cond = __VERIFIER_nondet_int()
[L49]   COND FALSE  !(cond == 0)
[L52]               lk1 = 0
[L54]               lk2 = 0
[L56]               lk3 = 0
[L58]               lk4 = 0
[L60]               lk5 = 0
[L62]               lk6 = 0
[L64]               lk7 = 0
[L66]               lk8 = 0
[L68]               lk9 = 0
[L70]               lk10 = 0
[L72]               lk11 = 0
[L74]               lk12 = 0
[L78]   COND FALSE  !(p1 != 0)
[L82]   COND FALSE  !(p2 != 0)
[L86]   COND FALSE  !(p3 != 0)
[L90]   COND FALSE  !(p4 != 0)
[L94]   COND FALSE  !(p5 != 0)
[L98]   COND FALSE  !(p6 != 0)
[L102]  COND FALSE  !(p7 != 0)
[L106]  COND FALSE  !(p8 != 0)
[L110]  COND FALSE  !(p9 != 0)
[L114]  COND FALSE  !(p10 != 0)
[L118]  COND FALSE  !(p11 != 0)
[L122]  COND FALSE  !(p12 != 0)
[L128]  COND FALSE  !(p1 != 0)
[L133]  COND FALSE  !(p2 != 0)
[L138]  COND FALSE  !(p3 != 0)
[L143]  COND FALSE  !(p4 != 0)
[L148]  COND FALSE  !(p5 != 0)
[L153]  COND FALSE  !(p6 != 0)
[L158]  COND FALSE  !(p7 != 0)
[L163]  COND FALSE  !(p8 != 0)
[L168]  COND FALSE  !(p9 != 0)
[L173]  COND FALSE  !(p10 != 0)
[L178]  COND FALSE  !(p11 != 0)
[L183]  COND FALSE  !(p12 != 0)
End of lasso representation.
RESULT: Ultimate proved your program to be incorrect!
[2025-02-06 19:12:53,014 INFO  L552       MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Ended with exit code 0
Received shutdown request...
--- End real Ultimate output ---

Execution finished normally
Writing output log to file Ultimate.log
Writing human readable error path to file UltimateCounterExample.errorpath
Result:
FALSE(TERM)