./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/locks/test_locks_13.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version c00e63dc Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/locks/test_locks_13.c -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 8fd6142dd23f608c3bc9ae24389b4aee583128e9e6b549483298584de0c08ecd --- Real Ultimate output --- This is Ultimate 0.3.0-?-c00e63d-m [2025-02-06 19:12:41,653 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-02-06 19:12:41,703 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2025-02-06 19:12:41,706 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-02-06 19:12:41,706 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-02-06 19:12:41,706 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-02-06 19:12:41,724 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-02-06 19:12:41,726 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-02-06 19:12:41,726 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-02-06 19:12:41,727 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-02-06 19:12:41,727 INFO L153 SettingsManager]: * Use memory slicer=true [2025-02-06 19:12:41,728 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-02-06 19:12:41,728 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-02-06 19:12:41,728 INFO L153 SettingsManager]: * Use SBE=true [2025-02-06 19:12:41,728 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-02-06 19:12:41,728 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-02-06 19:12:41,728 INFO L153 SettingsManager]: * Use old map elimination=false [2025-02-06 19:12:41,728 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-02-06 19:12:41,729 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-02-06 19:12:41,729 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-02-06 19:12:41,729 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-02-06 19:12:41,729 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-02-06 19:12:41,729 INFO L153 SettingsManager]: * sizeof long=4 [2025-02-06 19:12:41,729 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-02-06 19:12:41,729 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-02-06 19:12:41,729 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-02-06 19:12:41,729 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-02-06 19:12:41,729 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-02-06 19:12:41,729 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-02-06 19:12:41,729 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-02-06 19:12:41,730 INFO L153 SettingsManager]: * sizeof long double=12 [2025-02-06 19:12:41,730 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-02-06 19:12:41,730 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-02-06 19:12:41,730 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-02-06 19:12:41,730 INFO L153 SettingsManager]: * Use constant arrays=true [2025-02-06 19:12:41,730 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-02-06 19:12:41,730 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-02-06 19:12:41,730 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-02-06 19:12:41,730 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-02-06 19:12:41,731 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-02-06 19:12:41,731 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 8fd6142dd23f608c3bc9ae24389b4aee583128e9e6b549483298584de0c08ecd [2025-02-06 19:12:41,972 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-02-06 19:12:41,980 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-02-06 19:12:41,981 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-02-06 19:12:41,982 INFO L270 PluginConnector]: Initializing CDTParser... [2025-02-06 19:12:41,983 INFO L274 PluginConnector]: CDTParser initialized [2025-02-06 19:12:41,984 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/locks/test_locks_13.c [2025-02-06 19:12:43,184 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/672cc0502/f0570989a95b4a2f9fe51e148ff66977/FLAG5d9761b37 [2025-02-06 19:12:43,413 INFO L384 CDTParser]: Found 1 translation units. [2025-02-06 19:12:43,413 INFO L180 CDTParser]: Scanning /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/locks/test_locks_13.c [2025-02-06 19:12:43,420 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/672cc0502/f0570989a95b4a2f9fe51e148ff66977/FLAG5d9761b37 [2025-02-06 19:12:43,439 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/672cc0502/f0570989a95b4a2f9fe51e148ff66977 [2025-02-06 19:12:43,441 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-02-06 19:12:43,442 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-02-06 19:12:43,443 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-02-06 19:12:43,444 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-02-06 19:12:43,446 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-02-06 19:12:43,447 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.02 07:12:43" (1/1) ... [2025-02-06 19:12:43,448 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7aac3d81 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:43, skipping insertion in model container [2025-02-06 19:12:43,449 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.02 07:12:43" (1/1) ... [2025-02-06 19:12:43,464 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-02-06 19:12:43,583 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-06 19:12:43,593 INFO L200 MainTranslator]: Completed pre-run [2025-02-06 19:12:43,608 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-06 19:12:43,617 INFO L204 MainTranslator]: Completed translation [2025-02-06 19:12:43,617 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:43 WrapperNode [2025-02-06 19:12:43,617 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-02-06 19:12:43,618 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-02-06 19:12:43,618 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-02-06 19:12:43,618 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-02-06 19:12:43,622 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:43" (1/1) ... [2025-02-06 19:12:43,625 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:43" (1/1) ... [2025-02-06 19:12:43,635 INFO L138 Inliner]: procedures = 12, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 168 [2025-02-06 19:12:43,635 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-02-06 19:12:43,636 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-02-06 19:12:43,636 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-02-06 19:12:43,636 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-02-06 19:12:43,640 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:43" (1/1) ... [2025-02-06 19:12:43,640 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:43" (1/1) ... [2025-02-06 19:12:43,641 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:43" (1/1) ... [2025-02-06 19:12:43,647 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-02-06 19:12:43,647 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:43" (1/1) ... [2025-02-06 19:12:43,647 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:43" (1/1) ... [2025-02-06 19:12:43,650 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:43" (1/1) ... [2025-02-06 19:12:43,650 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:43" (1/1) ... [2025-02-06 19:12:43,651 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:43" (1/1) ... [2025-02-06 19:12:43,651 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:43" (1/1) ... [2025-02-06 19:12:43,652 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-02-06 19:12:43,653 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-02-06 19:12:43,653 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-02-06 19:12:43,653 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-02-06 19:12:43,653 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:43" (1/1) ... [2025-02-06 19:12:43,657 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 19:12:43,667 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 19:12:43,684 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 19:12:43,685 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-02-06 19:12:43,704 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-02-06 19:12:43,704 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-02-06 19:12:43,704 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-02-06 19:12:43,705 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-02-06 19:12:43,751 INFO L257 CfgBuilder]: Building ICFG [2025-02-06 19:12:43,752 INFO L287 CfgBuilder]: Building CFG for each procedure with an implementation [2025-02-06 19:12:43,977 INFO L? ?]: Removed 30 outVars from TransFormulas that were not future-live. [2025-02-06 19:12:43,977 INFO L308 CfgBuilder]: Performing block encoding [2025-02-06 19:12:43,983 INFO L332 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-02-06 19:12:43,984 INFO L337 CfgBuilder]: Removed 0 assume(true) statements. [2025-02-06 19:12:43,984 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 06.02 07:12:43 BoogieIcfgContainer [2025-02-06 19:12:43,984 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-02-06 19:12:43,985 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-02-06 19:12:43,985 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-02-06 19:12:43,990 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-02-06 19:12:43,990 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-06 19:12:43,990 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 06.02 07:12:43" (1/3) ... [2025-02-06 19:12:43,991 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4ba76c6d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.02 07:12:43, skipping insertion in model container [2025-02-06 19:12:43,991 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-06 19:12:43,991 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 07:12:43" (2/3) ... [2025-02-06 19:12:43,991 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@4ba76c6d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.02 07:12:43, skipping insertion in model container [2025-02-06 19:12:43,991 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-06 19:12:43,991 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 06.02 07:12:43" (3/3) ... [2025-02-06 19:12:43,992 INFO L363 chiAutomizerObserver]: Analyzing ICFG test_locks_13.c [2025-02-06 19:12:44,030 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-02-06 19:12:44,030 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-02-06 19:12:44,030 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-02-06 19:12:44,030 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-02-06 19:12:44,030 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-02-06 19:12:44,030 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-02-06 19:12:44,030 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-02-06 19:12:44,030 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-02-06 19:12:44,034 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 49 states, 48 states have (on average 1.8541666666666667) internal successors, (89), 48 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:44,045 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 41 [2025-02-06 19:12:44,045 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:12:44,045 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:12:44,049 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 19:12:44,049 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:12:44,049 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-02-06 19:12:44,050 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 49 states, 48 states have (on average 1.8541666666666667) internal successors, (89), 48 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:44,051 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 41 [2025-02-06 19:12:44,051 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:12:44,051 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:12:44,052 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 19:12:44,052 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:12:44,056 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-02-06 19:12:44,057 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume 0 != main_~p1~0#1;main_~lk1~0#1 := 1;" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume !(0 != main_~p6~0#1);" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-02-06 19:12:44,060 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:44,060 INFO L85 PathProgramCache]: Analyzing trace with hash 5152, now seen corresponding path program 1 times [2025-02-06 19:12:44,065 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:44,065 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1894952963] [2025-02-06 19:12:44,065 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:12:44,066 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:44,104 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:44,110 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:44,111 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:44,111 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:44,111 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:12:44,113 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:44,117 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:44,117 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:44,117 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:44,129 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:12:44,131 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:44,131 INFO L85 PathProgramCache]: Analyzing trace with hash -1267993302, now seen corresponding path program 1 times [2025-02-06 19:12:44,131 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:44,131 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1566062493] [2025-02-06 19:12:44,131 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:12:44,131 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:44,137 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-02-06 19:12:44,150 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-02-06 19:12:44,150 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:44,150 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:12:44,244 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:12:44,245 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:12:44,245 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1566062493] [2025-02-06 19:12:44,246 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1566062493] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:12:44,247 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:12:44,247 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:12:44,247 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1219582273] [2025-02-06 19:12:44,248 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:12:44,250 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:12:44,251 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:12:44,265 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:12:44,266 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:12:44,267 INFO L87 Difference]: Start difference. First operand has 49 states, 48 states have (on average 1.8541666666666667) internal successors, (89), 48 states have internal predecessors, (89), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:44,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:12:44,291 INFO L93 Difference]: Finished difference Result 91 states and 165 transitions. [2025-02-06 19:12:44,291 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 91 states and 165 transitions. [2025-02-06 19:12:44,293 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 81 [2025-02-06 19:12:44,297 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 91 states to 83 states and 133 transitions. [2025-02-06 19:12:44,298 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 83 [2025-02-06 19:12:44,298 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 83 [2025-02-06 19:12:44,298 INFO L73 IsDeterministic]: Start isDeterministic. Operand 83 states and 133 transitions. [2025-02-06 19:12:44,299 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:12:44,299 INFO L218 hiAutomatonCegarLoop]: Abstraction has 83 states and 133 transitions. [2025-02-06 19:12:44,306 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states and 133 transitions. [2025-02-06 19:12:44,313 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 83. [2025-02-06 19:12:44,314 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 83 states, 83 states have (on average 1.6024096385542168) internal successors, (133), 82 states have internal predecessors, (133), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:44,315 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 133 transitions. [2025-02-06 19:12:44,315 INFO L240 hiAutomatonCegarLoop]: Abstraction has 83 states and 133 transitions. [2025-02-06 19:12:44,316 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:12:44,318 INFO L432 stractBuchiCegarLoop]: Abstraction has 83 states and 133 transitions. [2025-02-06 19:12:44,318 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-02-06 19:12:44,318 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 83 states and 133 transitions. [2025-02-06 19:12:44,319 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 81 [2025-02-06 19:12:44,319 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:12:44,319 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:12:44,319 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 19:12:44,320 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:12:44,320 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-02-06 19:12:44,320 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume !(0 != main_~p6~0#1);" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-02-06 19:12:44,320 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:44,320 INFO L85 PathProgramCache]: Analyzing trace with hash 5152, now seen corresponding path program 2 times [2025-02-06 19:12:44,320 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:44,322 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1921220058] [2025-02-06 19:12:44,322 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:12:44,322 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:44,325 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:44,327 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:44,327 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:12:44,327 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:44,327 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:12:44,329 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:44,330 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:44,330 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:44,330 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:44,332 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:12:44,332 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:44,332 INFO L85 PathProgramCache]: Analyzing trace with hash -1236973495, now seen corresponding path program 1 times [2025-02-06 19:12:44,332 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:44,332 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1247093759] [2025-02-06 19:12:44,333 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:12:44,333 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:44,338 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-02-06 19:12:44,346 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-02-06 19:12:44,347 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:44,347 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:12:44,379 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:12:44,379 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:12:44,379 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1247093759] [2025-02-06 19:12:44,379 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1247093759] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:12:44,379 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:12:44,379 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:12:44,380 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1803139533] [2025-02-06 19:12:44,380 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:12:44,380 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:12:44,380 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:12:44,380 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:12:44,380 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:12:44,381 INFO L87 Difference]: Start difference. First operand 83 states and 133 transitions. cyclomatic complexity: 52 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:44,397 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:12:44,397 INFO L93 Difference]: Finished difference Result 162 states and 258 transitions. [2025-02-06 19:12:44,397 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 162 states and 258 transitions. [2025-02-06 19:12:44,399 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 160 [2025-02-06 19:12:44,400 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 162 states to 162 states and 258 transitions. [2025-02-06 19:12:44,400 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 162 [2025-02-06 19:12:44,401 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 162 [2025-02-06 19:12:44,401 INFO L73 IsDeterministic]: Start isDeterministic. Operand 162 states and 258 transitions. [2025-02-06 19:12:44,401 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:12:44,401 INFO L218 hiAutomatonCegarLoop]: Abstraction has 162 states and 258 transitions. [2025-02-06 19:12:44,402 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states and 258 transitions. [2025-02-06 19:12:44,408 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 162. [2025-02-06 19:12:44,409 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 162 states, 162 states have (on average 1.5925925925925926) internal successors, (258), 161 states have internal predecessors, (258), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:44,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 258 transitions. [2025-02-06 19:12:44,410 INFO L240 hiAutomatonCegarLoop]: Abstraction has 162 states and 258 transitions. [2025-02-06 19:12:44,410 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:12:44,411 INFO L432 stractBuchiCegarLoop]: Abstraction has 162 states and 258 transitions. [2025-02-06 19:12:44,411 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-02-06 19:12:44,411 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 162 states and 258 transitions. [2025-02-06 19:12:44,412 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 160 [2025-02-06 19:12:44,412 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:12:44,412 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:12:44,413 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 19:12:44,413 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:12:44,413 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-02-06 19:12:44,413 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume !(0 != main_~p6~0#1);" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-02-06 19:12:44,414 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:44,414 INFO L85 PathProgramCache]: Analyzing trace with hash 5152, now seen corresponding path program 3 times [2025-02-06 19:12:44,414 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:44,414 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1506196850] [2025-02-06 19:12:44,414 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:12:44,414 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:44,417 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:44,420 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:44,423 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-06 19:12:44,423 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:44,423 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:12:44,424 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:44,425 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:44,425 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:44,425 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:44,427 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:12:44,427 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:44,427 INFO L85 PathProgramCache]: Analyzing trace with hash 980784458, now seen corresponding path program 1 times [2025-02-06 19:12:44,427 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:44,427 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [455250919] [2025-02-06 19:12:44,427 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:12:44,427 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:44,435 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-02-06 19:12:44,442 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-02-06 19:12:44,442 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:44,442 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:12:44,468 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:12:44,469 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:12:44,469 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [455250919] [2025-02-06 19:12:44,469 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [455250919] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:12:44,469 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:12:44,469 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:12:44,469 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [157739091] [2025-02-06 19:12:44,469 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:12:44,469 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:12:44,469 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:12:44,470 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:12:44,470 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:12:44,470 INFO L87 Difference]: Start difference. First operand 162 states and 258 transitions. cyclomatic complexity: 100 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:44,493 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:12:44,493 INFO L93 Difference]: Finished difference Result 318 states and 502 transitions. [2025-02-06 19:12:44,493 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 318 states and 502 transitions. [2025-02-06 19:12:44,495 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 316 [2025-02-06 19:12:44,497 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 318 states to 318 states and 502 transitions. [2025-02-06 19:12:44,497 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 318 [2025-02-06 19:12:44,497 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 318 [2025-02-06 19:12:44,497 INFO L73 IsDeterministic]: Start isDeterministic. Operand 318 states and 502 transitions. [2025-02-06 19:12:44,498 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:12:44,498 INFO L218 hiAutomatonCegarLoop]: Abstraction has 318 states and 502 transitions. [2025-02-06 19:12:44,501 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 318 states and 502 transitions. [2025-02-06 19:12:44,510 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 318 to 318. [2025-02-06 19:12:44,512 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 318 states, 318 states have (on average 1.578616352201258) internal successors, (502), 317 states have internal predecessors, (502), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:44,514 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 318 states to 318 states and 502 transitions. [2025-02-06 19:12:44,516 INFO L240 hiAutomatonCegarLoop]: Abstraction has 318 states and 502 transitions. [2025-02-06 19:12:44,517 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:12:44,517 INFO L432 stractBuchiCegarLoop]: Abstraction has 318 states and 502 transitions. [2025-02-06 19:12:44,517 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-02-06 19:12:44,517 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 318 states and 502 transitions. [2025-02-06 19:12:44,519 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 316 [2025-02-06 19:12:44,519 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:12:44,519 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:12:44,519 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 19:12:44,519 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:12:44,520 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-02-06 19:12:44,520 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume !(0 != main_~p6~0#1);" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-02-06 19:12:44,520 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:44,520 INFO L85 PathProgramCache]: Analyzing trace with hash 5152, now seen corresponding path program 4 times [2025-02-06 19:12:44,520 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:44,521 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1604479882] [2025-02-06 19:12:44,521 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 19:12:44,521 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:44,526 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-02-06 19:12:44,527 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:44,527 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-06 19:12:44,527 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:44,527 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:12:44,530 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:44,531 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:44,531 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:44,531 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:44,536 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:12:44,536 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:44,536 INFO L85 PathProgramCache]: Analyzing trace with hash 913777705, now seen corresponding path program 1 times [2025-02-06 19:12:44,537 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:44,537 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2143018048] [2025-02-06 19:12:44,537 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:12:44,537 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:44,540 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-02-06 19:12:44,544 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-02-06 19:12:44,544 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:44,544 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:12:44,570 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:12:44,571 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:12:44,571 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2143018048] [2025-02-06 19:12:44,571 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2143018048] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:12:44,571 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:12:44,571 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:12:44,571 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1418102497] [2025-02-06 19:12:44,571 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:12:44,571 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:12:44,572 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:12:44,572 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:12:44,572 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:12:44,572 INFO L87 Difference]: Start difference. First operand 318 states and 502 transitions. cyclomatic complexity: 192 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:44,592 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:12:44,592 INFO L93 Difference]: Finished difference Result 626 states and 978 transitions. [2025-02-06 19:12:44,592 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 626 states and 978 transitions. [2025-02-06 19:12:44,601 INFO L131 ngComponentsAnalysis]: Automaton has 16 accepting balls. 624 [2025-02-06 19:12:44,604 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 626 states to 626 states and 978 transitions. [2025-02-06 19:12:44,604 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 626 [2025-02-06 19:12:44,605 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 626 [2025-02-06 19:12:44,606 INFO L73 IsDeterministic]: Start isDeterministic. Operand 626 states and 978 transitions. [2025-02-06 19:12:44,610 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:12:44,612 INFO L218 hiAutomatonCegarLoop]: Abstraction has 626 states and 978 transitions. [2025-02-06 19:12:44,613 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 626 states and 978 transitions. [2025-02-06 19:12:44,628 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 626 to 626. [2025-02-06 19:12:44,629 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 626 states, 626 states have (on average 1.5623003194888179) internal successors, (978), 625 states have internal predecessors, (978), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:44,632 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 626 states to 626 states and 978 transitions. [2025-02-06 19:12:44,632 INFO L240 hiAutomatonCegarLoop]: Abstraction has 626 states and 978 transitions. [2025-02-06 19:12:44,634 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:12:44,634 INFO L432 stractBuchiCegarLoop]: Abstraction has 626 states and 978 transitions. [2025-02-06 19:12:44,635 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-02-06 19:12:44,635 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 626 states and 978 transitions. [2025-02-06 19:12:44,637 INFO L131 ngComponentsAnalysis]: Automaton has 16 accepting balls. 624 [2025-02-06 19:12:44,638 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:12:44,638 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:12:44,639 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 19:12:44,639 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:12:44,639 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-02-06 19:12:44,639 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume !(0 != main_~p6~0#1);" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-02-06 19:12:44,639 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:44,639 INFO L85 PathProgramCache]: Analyzing trace with hash 5152, now seen corresponding path program 5 times [2025-02-06 19:12:44,640 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:44,640 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1941195651] [2025-02-06 19:12:44,640 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-06 19:12:44,640 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:44,644 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:44,647 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:44,647 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:12:44,647 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:44,647 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:12:44,649 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:44,650 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:44,650 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:44,650 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:44,651 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:12:44,652 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:44,652 INFO L85 PathProgramCache]: Analyzing trace with hash -2136425110, now seen corresponding path program 1 times [2025-02-06 19:12:44,652 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:44,652 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1371414895] [2025-02-06 19:12:44,652 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:12:44,652 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:44,659 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-02-06 19:12:44,662 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-02-06 19:12:44,662 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:44,662 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:12:44,707 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:12:44,707 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:12:44,707 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1371414895] [2025-02-06 19:12:44,707 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1371414895] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:12:44,707 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:12:44,708 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:12:44,708 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [684872190] [2025-02-06 19:12:44,708 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:12:44,708 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:12:44,708 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:12:44,708 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:12:44,708 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:12:44,708 INFO L87 Difference]: Start difference. First operand 626 states and 978 transitions. cyclomatic complexity: 368 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:44,727 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:12:44,727 INFO L93 Difference]: Finished difference Result 1234 states and 1906 transitions. [2025-02-06 19:12:44,727 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1234 states and 1906 transitions. [2025-02-06 19:12:44,735 INFO L131 ngComponentsAnalysis]: Automaton has 32 accepting balls. 1232 [2025-02-06 19:12:44,741 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1234 states to 1234 states and 1906 transitions. [2025-02-06 19:12:44,741 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1234 [2025-02-06 19:12:44,742 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1234 [2025-02-06 19:12:44,742 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1234 states and 1906 transitions. [2025-02-06 19:12:44,744 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:12:44,744 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1234 states and 1906 transitions. [2025-02-06 19:12:44,745 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1234 states and 1906 transitions. [2025-02-06 19:12:44,758 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1234 to 1234. [2025-02-06 19:12:44,760 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1234 states, 1234 states have (on average 1.5445705024311183) internal successors, (1906), 1233 states have internal predecessors, (1906), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:44,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1234 states to 1234 states and 1906 transitions. [2025-02-06 19:12:44,764 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1234 states and 1906 transitions. [2025-02-06 19:12:44,764 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:12:44,765 INFO L432 stractBuchiCegarLoop]: Abstraction has 1234 states and 1906 transitions. [2025-02-06 19:12:44,766 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-02-06 19:12:44,766 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1234 states and 1906 transitions. [2025-02-06 19:12:44,770 INFO L131 ngComponentsAnalysis]: Automaton has 32 accepting balls. 1232 [2025-02-06 19:12:44,770 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:12:44,771 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:12:44,772 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 19:12:44,772 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:12:44,773 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-02-06 19:12:44,773 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-02-06 19:12:44,773 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:44,774 INFO L85 PathProgramCache]: Analyzing trace with hash 5152, now seen corresponding path program 6 times [2025-02-06 19:12:44,774 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:44,774 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2094732463] [2025-02-06 19:12:44,774 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-06 19:12:44,775 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:44,779 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:44,782 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:44,783 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-02-06 19:12:44,783 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:44,783 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:12:44,784 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:44,786 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:44,786 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:44,786 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:44,787 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:12:44,789 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:44,789 INFO L85 PathProgramCache]: Analyzing trace with hash 120485897, now seen corresponding path program 1 times [2025-02-06 19:12:44,789 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:44,789 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [268449866] [2025-02-06 19:12:44,789 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:12:44,790 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:44,792 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-02-06 19:12:44,799 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-02-06 19:12:44,799 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:44,799 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:12:44,819 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:12:44,820 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:12:44,820 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [268449866] [2025-02-06 19:12:44,820 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [268449866] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:12:44,820 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:12:44,820 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:12:44,820 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1750070987] [2025-02-06 19:12:44,820 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:12:44,820 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:12:44,820 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:12:44,823 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:12:44,823 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:12:44,823 INFO L87 Difference]: Start difference. First operand 1234 states and 1906 transitions. cyclomatic complexity: 704 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:44,842 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:12:44,843 INFO L93 Difference]: Finished difference Result 2434 states and 3714 transitions. [2025-02-06 19:12:44,843 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2434 states and 3714 transitions. [2025-02-06 19:12:44,858 INFO L131 ngComponentsAnalysis]: Automaton has 64 accepting balls. 2432 [2025-02-06 19:12:44,868 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2434 states to 2434 states and 3714 transitions. [2025-02-06 19:12:44,868 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2434 [2025-02-06 19:12:44,870 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2434 [2025-02-06 19:12:44,870 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2434 states and 3714 transitions. [2025-02-06 19:12:44,873 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:12:44,873 INFO L218 hiAutomatonCegarLoop]: Abstraction has 2434 states and 3714 transitions. [2025-02-06 19:12:44,874 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2434 states and 3714 transitions. [2025-02-06 19:12:44,897 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2434 to 2434. [2025-02-06 19:12:44,900 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2434 states, 2434 states have (on average 1.5258833196384551) internal successors, (3714), 2433 states have internal predecessors, (3714), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:44,907 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2434 states to 2434 states and 3714 transitions. [2025-02-06 19:12:44,907 INFO L240 hiAutomatonCegarLoop]: Abstraction has 2434 states and 3714 transitions. [2025-02-06 19:12:44,907 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:12:44,910 INFO L432 stractBuchiCegarLoop]: Abstraction has 2434 states and 3714 transitions. [2025-02-06 19:12:44,910 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-02-06 19:12:44,910 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 2434 states and 3714 transitions. [2025-02-06 19:12:44,918 INFO L131 ngComponentsAnalysis]: Automaton has 64 accepting balls. 2432 [2025-02-06 19:12:44,918 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:12:44,919 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:12:44,919 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 19:12:44,919 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:12:44,919 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-02-06 19:12:44,920 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-02-06 19:12:44,920 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:44,920 INFO L85 PathProgramCache]: Analyzing trace with hash 5152, now seen corresponding path program 7 times [2025-02-06 19:12:44,920 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:44,920 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [21153079] [2025-02-06 19:12:44,920 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-02-06 19:12:44,920 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:44,923 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:44,926 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:44,926 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:44,926 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:44,926 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:12:44,927 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:44,928 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:44,929 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:44,929 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:44,930 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:12:44,931 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:44,931 INFO L85 PathProgramCache]: Analyzing trace with hash -288338328, now seen corresponding path program 1 times [2025-02-06 19:12:44,931 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:44,932 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [221455074] [2025-02-06 19:12:44,932 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:12:44,932 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:44,934 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-02-06 19:12:44,937 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-02-06 19:12:44,937 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:44,937 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:12:44,957 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:12:44,958 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:12:44,958 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [221455074] [2025-02-06 19:12:44,958 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [221455074] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:12:44,958 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:12:44,958 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:12:44,958 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [277869967] [2025-02-06 19:12:44,958 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:12:44,959 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:12:44,959 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:12:44,959 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:12:44,959 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:12:44,959 INFO L87 Difference]: Start difference. First operand 2434 states and 3714 transitions. cyclomatic complexity: 1344 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:44,987 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:12:44,988 INFO L93 Difference]: Finished difference Result 4802 states and 7234 transitions. [2025-02-06 19:12:44,988 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 4802 states and 7234 transitions. [2025-02-06 19:12:45,014 INFO L131 ngComponentsAnalysis]: Automaton has 128 accepting balls. 4800 [2025-02-06 19:12:45,053 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 4802 states to 4802 states and 7234 transitions. [2025-02-06 19:12:45,054 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 4802 [2025-02-06 19:12:45,057 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 4802 [2025-02-06 19:12:45,057 INFO L73 IsDeterministic]: Start isDeterministic. Operand 4802 states and 7234 transitions. [2025-02-06 19:12:45,061 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:12:45,061 INFO L218 hiAutomatonCegarLoop]: Abstraction has 4802 states and 7234 transitions. [2025-02-06 19:12:45,063 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4802 states and 7234 transitions. [2025-02-06 19:12:45,110 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4802 to 4802. [2025-02-06 19:12:45,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4802 states, 4802 states have (on average 1.5064556434818825) internal successors, (7234), 4801 states have internal predecessors, (7234), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:45,128 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4802 states to 4802 states and 7234 transitions. [2025-02-06 19:12:45,128 INFO L240 hiAutomatonCegarLoop]: Abstraction has 4802 states and 7234 transitions. [2025-02-06 19:12:45,129 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:12:45,130 INFO L432 stractBuchiCegarLoop]: Abstraction has 4802 states and 7234 transitions. [2025-02-06 19:12:45,130 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-02-06 19:12:45,130 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 4802 states and 7234 transitions. [2025-02-06 19:12:45,147 INFO L131 ngComponentsAnalysis]: Automaton has 128 accepting balls. 4800 [2025-02-06 19:12:45,147 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:12:45,147 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:12:45,149 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 19:12:45,149 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:12:45,149 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-02-06 19:12:45,149 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-02-06 19:12:45,149 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:45,149 INFO L85 PathProgramCache]: Analyzing trace with hash 5152, now seen corresponding path program 8 times [2025-02-06 19:12:45,150 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:45,150 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [379698895] [2025-02-06 19:12:45,150 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 19:12:45,150 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:45,152 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:45,154 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:45,154 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:12:45,154 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:45,154 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:12:45,154 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:45,156 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:45,156 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:45,156 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:45,157 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:12:45,158 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:45,158 INFO L85 PathProgramCache]: Analyzing trace with hash -1132810199, now seen corresponding path program 1 times [2025-02-06 19:12:45,158 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:45,158 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [46594394] [2025-02-06 19:12:45,158 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:12:45,159 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:45,161 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-02-06 19:12:45,162 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-02-06 19:12:45,162 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:45,162 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:12:45,174 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:12:45,174 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:12:45,174 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [46594394] [2025-02-06 19:12:45,174 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [46594394] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:12:45,174 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:12:45,174 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:12:45,175 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1185633054] [2025-02-06 19:12:45,175 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:12:45,177 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:12:45,177 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:12:45,177 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:12:45,177 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:12:45,177 INFO L87 Difference]: Start difference. First operand 4802 states and 7234 transitions. cyclomatic complexity: 2560 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:45,213 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:12:45,214 INFO L93 Difference]: Finished difference Result 9474 states and 14082 transitions. [2025-02-06 19:12:45,214 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 9474 states and 14082 transitions. [2025-02-06 19:12:45,253 INFO L131 ngComponentsAnalysis]: Automaton has 256 accepting balls. 9472 [2025-02-06 19:12:45,318 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 9474 states to 9474 states and 14082 transitions. [2025-02-06 19:12:45,318 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 9474 [2025-02-06 19:12:45,323 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9474 [2025-02-06 19:12:45,323 INFO L73 IsDeterministic]: Start isDeterministic. Operand 9474 states and 14082 transitions. [2025-02-06 19:12:45,332 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:12:45,332 INFO L218 hiAutomatonCegarLoop]: Abstraction has 9474 states and 14082 transitions. [2025-02-06 19:12:45,336 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9474 states and 14082 transitions. [2025-02-06 19:12:45,430 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9474 to 9474. [2025-02-06 19:12:45,443 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9474 states, 9474 states have (on average 1.486383787207093) internal successors, (14082), 9473 states have internal predecessors, (14082), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:45,494 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9474 states to 9474 states and 14082 transitions. [2025-02-06 19:12:45,495 INFO L240 hiAutomatonCegarLoop]: Abstraction has 9474 states and 14082 transitions. [2025-02-06 19:12:45,495 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:12:45,497 INFO L432 stractBuchiCegarLoop]: Abstraction has 9474 states and 14082 transitions. [2025-02-06 19:12:45,497 INFO L338 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2025-02-06 19:12:45,497 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 9474 states and 14082 transitions. [2025-02-06 19:12:45,521 INFO L131 ngComponentsAnalysis]: Automaton has 256 accepting balls. 9472 [2025-02-06 19:12:45,521 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:12:45,521 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:12:45,522 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 19:12:45,522 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:12:45,522 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-02-06 19:12:45,522 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-02-06 19:12:45,523 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:45,523 INFO L85 PathProgramCache]: Analyzing trace with hash 5152, now seen corresponding path program 9 times [2025-02-06 19:12:45,523 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:45,523 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [108055544] [2025-02-06 19:12:45,523 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 19:12:45,523 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:45,527 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:45,528 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:45,528 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-06 19:12:45,528 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:45,528 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:12:45,529 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:45,529 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:45,529 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:45,529 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:45,530 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:12:45,531 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:45,531 INFO L85 PathProgramCache]: Analyzing trace with hash -2129882552, now seen corresponding path program 1 times [2025-02-06 19:12:45,531 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:45,531 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2060627748] [2025-02-06 19:12:45,531 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:12:45,531 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:45,537 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-02-06 19:12:45,539 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-02-06 19:12:45,539 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:45,539 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:12:45,557 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:12:45,557 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:12:45,557 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2060627748] [2025-02-06 19:12:45,558 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2060627748] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:12:45,558 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:12:45,558 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:12:45,558 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [137463534] [2025-02-06 19:12:45,559 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:12:45,559 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:12:45,559 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:12:45,559 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:12:45,559 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:12:45,559 INFO L87 Difference]: Start difference. First operand 9474 states and 14082 transitions. cyclomatic complexity: 4864 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:45,604 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:12:45,605 INFO L93 Difference]: Finished difference Result 18690 states and 27394 transitions. [2025-02-06 19:12:45,605 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 18690 states and 27394 transitions. [2025-02-06 19:12:45,745 INFO L131 ngComponentsAnalysis]: Automaton has 512 accepting balls. 18688 [2025-02-06 19:12:45,874 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 18690 states to 18690 states and 27394 transitions. [2025-02-06 19:12:45,874 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 18690 [2025-02-06 19:12:45,889 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 18690 [2025-02-06 19:12:45,890 INFO L73 IsDeterministic]: Start isDeterministic. Operand 18690 states and 27394 transitions. [2025-02-06 19:12:45,912 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:12:45,912 INFO L218 hiAutomatonCegarLoop]: Abstraction has 18690 states and 27394 transitions. [2025-02-06 19:12:45,923 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 18690 states and 27394 transitions. [2025-02-06 19:12:46,147 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 18690 to 18690. [2025-02-06 19:12:46,173 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 18690 states, 18690 states have (on average 1.4657035848047084) internal successors, (27394), 18689 states have internal predecessors, (27394), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:46,216 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 18690 states to 18690 states and 27394 transitions. [2025-02-06 19:12:46,216 INFO L240 hiAutomatonCegarLoop]: Abstraction has 18690 states and 27394 transitions. [2025-02-06 19:12:46,217 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:12:46,217 INFO L432 stractBuchiCegarLoop]: Abstraction has 18690 states and 27394 transitions. [2025-02-06 19:12:46,217 INFO L338 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2025-02-06 19:12:46,217 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 18690 states and 27394 transitions. [2025-02-06 19:12:46,264 INFO L131 ngComponentsAnalysis]: Automaton has 512 accepting balls. 18688 [2025-02-06 19:12:46,264 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:12:46,264 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:12:46,264 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 19:12:46,265 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:12:46,265 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-02-06 19:12:46,265 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-02-06 19:12:46,265 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:46,265 INFO L85 PathProgramCache]: Analyzing trace with hash 5152, now seen corresponding path program 10 times [2025-02-06 19:12:46,266 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:46,266 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2119365351] [2025-02-06 19:12:46,266 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 19:12:46,266 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:46,268 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-02-06 19:12:46,271 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:46,271 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-06 19:12:46,271 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:46,271 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:12:46,272 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:46,273 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:46,273 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:46,273 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:46,274 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:12:46,275 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:46,275 INFO L85 PathProgramCache]: Analyzing trace with hash -776572855, now seen corresponding path program 1 times [2025-02-06 19:12:46,275 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:46,275 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [815072989] [2025-02-06 19:12:46,275 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:12:46,275 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:46,277 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-02-06 19:12:46,278 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-02-06 19:12:46,278 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:46,278 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:12:46,291 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:12:46,291 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:12:46,291 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [815072989] [2025-02-06 19:12:46,291 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [815072989] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:12:46,291 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:12:46,291 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:12:46,291 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1104563385] [2025-02-06 19:12:46,292 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:12:46,292 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:12:46,292 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:12:46,292 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:12:46,292 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:12:46,292 INFO L87 Difference]: Start difference. First operand 18690 states and 27394 transitions. cyclomatic complexity: 9216 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:46,468 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:12:46,468 INFO L93 Difference]: Finished difference Result 36866 states and 53250 transitions. [2025-02-06 19:12:46,468 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 36866 states and 53250 transitions. [2025-02-06 19:12:46,594 INFO L131 ngComponentsAnalysis]: Automaton has 1024 accepting balls. 36864 [2025-02-06 19:12:46,741 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 36866 states to 36866 states and 53250 transitions. [2025-02-06 19:12:46,742 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 36866 [2025-02-06 19:12:46,771 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 36866 [2025-02-06 19:12:46,771 INFO L73 IsDeterministic]: Start isDeterministic. Operand 36866 states and 53250 transitions. [2025-02-06 19:12:46,796 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:12:46,796 INFO L218 hiAutomatonCegarLoop]: Abstraction has 36866 states and 53250 transitions. [2025-02-06 19:12:46,821 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36866 states and 53250 transitions. [2025-02-06 19:12:47,248 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36866 to 36866. [2025-02-06 19:12:47,300 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36866 states, 36866 states have (on average 1.4444203330982477) internal successors, (53250), 36865 states have internal predecessors, (53250), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:47,387 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36866 states to 36866 states and 53250 transitions. [2025-02-06 19:12:47,388 INFO L240 hiAutomatonCegarLoop]: Abstraction has 36866 states and 53250 transitions. [2025-02-06 19:12:47,388 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:12:47,389 INFO L432 stractBuchiCegarLoop]: Abstraction has 36866 states and 53250 transitions. [2025-02-06 19:12:47,389 INFO L338 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2025-02-06 19:12:47,389 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 36866 states and 53250 transitions. [2025-02-06 19:12:47,498 INFO L131 ngComponentsAnalysis]: Automaton has 1024 accepting balls. 36864 [2025-02-06 19:12:47,499 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:12:47,499 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:12:47,499 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 19:12:47,499 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:12:47,500 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-02-06 19:12:47,500 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-02-06 19:12:47,500 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:47,500 INFO L85 PathProgramCache]: Analyzing trace with hash 5152, now seen corresponding path program 11 times [2025-02-06 19:12:47,500 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:47,501 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1126473042] [2025-02-06 19:12:47,501 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-06 19:12:47,501 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:47,503 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:47,504 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:47,505 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 19:12:47,505 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:47,505 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:12:47,506 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:47,507 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:47,507 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:47,507 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:47,509 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:12:47,509 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:47,510 INFO L85 PathProgramCache]: Analyzing trace with hash -1287107032, now seen corresponding path program 1 times [2025-02-06 19:12:47,510 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:47,510 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [31895448] [2025-02-06 19:12:47,510 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:12:47,510 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:47,513 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-02-06 19:12:47,517 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-02-06 19:12:47,518 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:47,518 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:12:47,533 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:12:47,533 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:12:47,533 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [31895448] [2025-02-06 19:12:47,534 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [31895448] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:12:47,534 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:12:47,534 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 19:12:47,534 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1946022782] [2025-02-06 19:12:47,534 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:12:47,534 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:12:47,534 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:12:47,534 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:12:47,534 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:12:47,535 INFO L87 Difference]: Start difference. First operand 36866 states and 53250 transitions. cyclomatic complexity: 17408 Second operand has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:47,718 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:12:47,719 INFO L93 Difference]: Finished difference Result 72706 states and 103426 transitions. [2025-02-06 19:12:47,719 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 72706 states and 103426 transitions. [2025-02-06 19:12:48,096 INFO L131 ngComponentsAnalysis]: Automaton has 2048 accepting balls. 72704 [2025-02-06 19:12:48,378 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 72706 states to 72706 states and 103426 transitions. [2025-02-06 19:12:48,378 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 72706 [2025-02-06 19:12:48,414 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 72706 [2025-02-06 19:12:48,415 INFO L73 IsDeterministic]: Start isDeterministic. Operand 72706 states and 103426 transitions. [2025-02-06 19:12:48,449 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:12:48,449 INFO L218 hiAutomatonCegarLoop]: Abstraction has 72706 states and 103426 transitions. [2025-02-06 19:12:48,478 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 72706 states and 103426 transitions. [2025-02-06 19:12:49,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 72706 to 72706. [2025-02-06 19:12:49,306 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 72706 states, 72706 states have (on average 1.4225235881495337) internal successors, (103426), 72705 states have internal predecessors, (103426), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:49,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 72706 states to 72706 states and 103426 transitions. [2025-02-06 19:12:49,555 INFO L240 hiAutomatonCegarLoop]: Abstraction has 72706 states and 103426 transitions. [2025-02-06 19:12:49,556 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:12:49,556 INFO L432 stractBuchiCegarLoop]: Abstraction has 72706 states and 103426 transitions. [2025-02-06 19:12:49,556 INFO L338 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2025-02-06 19:12:49,556 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 72706 states and 103426 transitions. [2025-02-06 19:12:49,683 INFO L131 ngComponentsAnalysis]: Automaton has 2048 accepting balls. 72704 [2025-02-06 19:12:49,683 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:12:49,683 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:12:49,684 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 19:12:49,684 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:12:49,684 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-02-06 19:12:49,684 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-02-06 19:12:49,685 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:49,685 INFO L85 PathProgramCache]: Analyzing trace with hash 5152, now seen corresponding path program 12 times [2025-02-06 19:12:49,685 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:49,685 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [473009094] [2025-02-06 19:12:49,685 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-06 19:12:49,685 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:49,687 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:49,688 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:49,688 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-02-06 19:12:49,688 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:49,688 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:12:49,689 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:49,689 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:49,689 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:49,689 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:49,693 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:12:49,694 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:49,694 INFO L85 PathProgramCache]: Analyzing trace with hash 220444777, now seen corresponding path program 1 times [2025-02-06 19:12:49,694 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:49,694 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1609736489] [2025-02-06 19:12:49,694 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:12:49,694 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:49,696 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-02-06 19:12:49,697 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-02-06 19:12:49,697 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:49,697 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 19:12:49,710 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 19:12:49,710 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 19:12:49,710 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1609736489] [2025-02-06 19:12:49,710 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1609736489] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 19:12:49,710 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 19:12:49,711 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-02-06 19:12:49,711 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2133132287] [2025-02-06 19:12:49,711 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 19:12:49,711 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 19:12:49,711 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 19:12:49,711 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 19:12:49,711 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 19:12:49,711 INFO L87 Difference]: Start difference. First operand 72706 states and 103426 transitions. cyclomatic complexity: 32768 Second operand has 3 states, 2 states have (on average 14.0) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:50,114 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 19:12:50,114 INFO L93 Difference]: Finished difference Result 143362 states and 200706 transitions. [2025-02-06 19:12:50,114 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 143362 states and 200706 transitions. [2025-02-06 19:12:50,843 INFO L131 ngComponentsAnalysis]: Automaton has 4096 accepting balls. 143360 [2025-02-06 19:12:51,121 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 143362 states to 143362 states and 200706 transitions. [2025-02-06 19:12:51,122 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 143362 [2025-02-06 19:12:51,187 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 143362 [2025-02-06 19:12:51,187 INFO L73 IsDeterministic]: Start isDeterministic. Operand 143362 states and 200706 transitions. [2025-02-06 19:12:51,246 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 19:12:51,246 INFO L218 hiAutomatonCegarLoop]: Abstraction has 143362 states and 200706 transitions. [2025-02-06 19:12:51,292 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143362 states and 200706 transitions. [2025-02-06 19:12:52,427 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143362 to 143362. [2025-02-06 19:12:52,744 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 143362 states, 143362 states have (on average 1.399994419720707) internal successors, (200706), 143361 states have internal predecessors, (200706), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 19:12:52,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143362 states to 143362 states and 200706 transitions. [2025-02-06 19:12:52,988 INFO L240 hiAutomatonCegarLoop]: Abstraction has 143362 states and 200706 transitions. [2025-02-06 19:12:52,989 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 19:12:52,989 INFO L432 stractBuchiCegarLoop]: Abstraction has 143362 states and 200706 transitions. [2025-02-06 19:12:52,989 INFO L338 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2025-02-06 19:12:52,989 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 143362 states and 200706 transitions. [2025-02-06 19:12:53,455 INFO L131 ngComponentsAnalysis]: Automaton has 4096 accepting balls. 143360 [2025-02-06 19:12:53,455 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 19:12:53,455 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 19:12:53,457 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 19:12:53,457 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 19:12:53,457 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" [2025-02-06 19:12:53,457 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" [2025-02-06 19:12:53,458 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:53,458 INFO L85 PathProgramCache]: Analyzing trace with hash 5152, now seen corresponding path program 13 times [2025-02-06 19:12:53,458 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:53,458 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [337958302] [2025-02-06 19:12:53,458 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-02-06 19:12:53,458 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:53,460 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:53,460 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:53,460 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:53,461 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:53,461 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:12:53,461 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:53,462 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:53,462 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:53,462 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:53,463 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:12:53,463 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:53,463 INFO L85 PathProgramCache]: Analyzing trace with hash -285113848, now seen corresponding path program 1 times [2025-02-06 19:12:53,463 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:53,463 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1458681034] [2025-02-06 19:12:53,463 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:12:53,463 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:53,465 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-02-06 19:12:53,466 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-02-06 19:12:53,466 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:53,466 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:53,466 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:12:53,467 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-02-06 19:12:53,468 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-02-06 19:12:53,468 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:53,468 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:53,472 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:12:53,472 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 19:12:53,472 INFO L85 PathProgramCache]: Analyzing trace with hash 763904423, now seen corresponding path program 1 times [2025-02-06 19:12:53,472 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 19:12:53,473 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [866566792] [2025-02-06 19:12:53,473 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 19:12:53,473 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 19:12:53,475 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-02-06 19:12:53,476 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-02-06 19:12:53,476 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:53,476 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:53,477 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:12:53,477 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-02-06 19:12:53,479 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-02-06 19:12:53,479 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:53,479 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:53,481 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 19:12:53,885 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:53,886 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:53,886 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:53,886 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:53,886 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 19:12:53,890 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 19:12:53,891 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 19:12:53,891 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 19:12:53,891 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 19:12:53,923 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 06.02 07:12:53 BoogieIcfgContainer [2025-02-06 19:12:53,923 INFO L131 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2025-02-06 19:12:53,924 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-02-06 19:12:53,924 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-02-06 19:12:53,924 INFO L274 PluginConnector]: Witness Printer initialized [2025-02-06 19:12:53,925 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 06.02 07:12:43" (3/4) ... [2025-02-06 19:12:53,927 INFO L143 WitnessPrinter]: Generating witness for non-termination counterexample [2025-02-06 19:12:53,962 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/witness.graphml [2025-02-06 19:12:53,963 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-02-06 19:12:53,966 INFO L158 Benchmark]: Toolchain (without parser) took 10521.34ms. Allocated memory was 167.8MB in the beginning and 5.3GB in the end (delta: 5.2GB). Free memory was 123.1MB in the beginning and 4.2GB in the end (delta: -4.1GB). Peak memory consumption was 1.0GB. Max. memory is 16.1GB. [2025-02-06 19:12:53,966 INFO L158 Benchmark]: CDTParser took 0.24ms. Allocated memory is still 201.3MB. Free memory is still 121.7MB. There was no memory consumed. Max. memory is 16.1GB. [2025-02-06 19:12:53,966 INFO L158 Benchmark]: CACSL2BoogieTranslator took 174.58ms. Allocated memory is still 167.8MB. Free memory was 123.1MB in the beginning and 111.4MB in the end (delta: 11.8MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-02-06 19:12:53,966 INFO L158 Benchmark]: Boogie Procedure Inliner took 17.57ms. Allocated memory is still 167.8MB. Free memory was 111.4MB in the beginning and 110.1MB in the end (delta: 1.3MB). There was no memory consumed. Max. memory is 16.1GB. [2025-02-06 19:12:53,966 INFO L158 Benchmark]: Boogie Preprocessor took 16.38ms. Allocated memory is still 167.8MB. Free memory was 110.1MB in the beginning and 108.7MB in the end (delta: 1.3MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-02-06 19:12:53,966 INFO L158 Benchmark]: IcfgBuilder took 331.54ms. Allocated memory is still 167.8MB. Free memory was 108.7MB in the beginning and 92.9MB in the end (delta: 15.9MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-02-06 19:12:53,967 INFO L158 Benchmark]: BuchiAutomizer took 9938.63ms. Allocated memory was 167.8MB in the beginning and 5.3GB in the end (delta: 5.2GB). Free memory was 92.9MB in the beginning and 4.2GB in the end (delta: -4.1GB). Peak memory consumption was 1.0GB. Max. memory is 16.1GB. [2025-02-06 19:12:53,967 INFO L158 Benchmark]: Witness Printer took 38.83ms. Allocated memory is still 5.3GB. Free memory was 4.2GB in the beginning and 4.2GB in the end (delta: 4.3MB). There was no memory consumed. Max. memory is 16.1GB. [2025-02-06 19:12:53,968 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.24ms. Allocated memory is still 201.3MB. Free memory is still 121.7MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 174.58ms. Allocated memory is still 167.8MB. Free memory was 123.1MB in the beginning and 111.4MB in the end (delta: 11.8MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 17.57ms. Allocated memory is still 167.8MB. Free memory was 111.4MB in the beginning and 110.1MB in the end (delta: 1.3MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 16.38ms. Allocated memory is still 167.8MB. Free memory was 110.1MB in the beginning and 108.7MB in the end (delta: 1.3MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * IcfgBuilder took 331.54ms. Allocated memory is still 167.8MB. Free memory was 108.7MB in the beginning and 92.9MB in the end (delta: 15.9MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * BuchiAutomizer took 9938.63ms. Allocated memory was 167.8MB in the beginning and 5.3GB in the end (delta: 5.2GB). Free memory was 92.9MB in the beginning and 4.2GB in the end (delta: -4.1GB). Peak memory consumption was 1.0GB. Max. memory is 16.1GB. * Witness Printer took 38.83ms. Allocated memory is still 5.3GB. Free memory was 4.2GB in the beginning and 4.2GB in the end (delta: 4.3MB). There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 12 terminating modules (12 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.12 modules have a trivial ranking function, the largest among these consists of 3 locations. The remainder module has 143362 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 9.8s and 13 iterations. TraceHistogramMax:1. Analysis of lassos took 1.1s. Construction of modules took 0.0s. Büchi inclusion checks took 7.8s. Highest rank in rank-based complementation 0. Minimization of det autom 12. Minimization of nondet autom 0. Automata minimization 4.1s AutomataMinimizationTime, 12 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations. Non-live state removal took 2.4s Buchi closure took 0.1s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 639 SdHoareTripleChecker+Valid, 0.1s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 639 mSDsluCounter, 2002 SdHoareTripleChecker+Invalid, 0.1s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 771 mSDsCounter, 24 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 62 IncrementalHoareTripleChecker+Invalid, 86 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 24 mSolverCounterUnsat, 1231 mSDtfsCounter, 62 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont1 unkn0 SFLI12 SFLT0 conc0 concLT0 SILN0 SILU0 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - LassoShapedNonTerminationArgument [Line: 50]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite program execution. Stem: [L8] int p1 = __VERIFIER_nondet_int(); [L9] int lk1; [L11] int p2 = __VERIFIER_nondet_int(); [L12] int lk2; [L14] int p3 = __VERIFIER_nondet_int(); [L15] int lk3; [L17] int p4 = __VERIFIER_nondet_int(); [L18] int lk4; [L20] int p5 = __VERIFIER_nondet_int(); [L21] int lk5; [L23] int p6 = __VERIFIER_nondet_int(); [L24] int lk6; [L26] int p7 = __VERIFIER_nondet_int(); [L27] int lk7; [L29] int p8 = __VERIFIER_nondet_int(); [L30] int lk8; [L32] int p9 = __VERIFIER_nondet_int(); [L33] int lk9; [L35] int p10 = __VERIFIER_nondet_int(); [L36] int lk10; [L38] int p11 = __VERIFIER_nondet_int(); [L39] int lk11; [L41] int p12 = __VERIFIER_nondet_int(); [L42] int lk12; [L44] int p13 = __VERIFIER_nondet_int(); [L45] int lk13; [L48] int cond; Loop: [L50] COND TRUE 1 [L51] cond = __VERIFIER_nondet_int() [L52] COND FALSE !(cond == 0) [L55] lk1 = 0 [L57] lk2 = 0 [L59] lk3 = 0 [L61] lk4 = 0 [L63] lk5 = 0 [L65] lk6 = 0 [L67] lk7 = 0 [L69] lk8 = 0 [L71] lk9 = 0 [L73] lk10 = 0 [L75] lk11 = 0 [L77] lk12 = 0 [L79] lk13 = 0 [L83] COND FALSE !(p1 != 0) [L87] COND FALSE !(p2 != 0) [L91] COND FALSE !(p3 != 0) [L95] COND FALSE !(p4 != 0) [L99] COND FALSE !(p5 != 0) [L103] COND FALSE !(p6 != 0) [L107] COND FALSE !(p7 != 0) [L111] COND FALSE !(p8 != 0) [L115] COND FALSE !(p9 != 0) [L119] COND FALSE !(p10 != 0) [L123] COND FALSE !(p11 != 0) [L127] COND FALSE !(p12 != 0) [L131] COND FALSE !(p13 != 0) [L137] COND FALSE !(p1 != 0) [L142] COND FALSE !(p2 != 0) [L147] COND FALSE !(p3 != 0) [L152] COND FALSE !(p4 != 0) [L157] COND FALSE !(p5 != 0) [L162] COND FALSE !(p6 != 0) [L167] COND FALSE !(p7 != 0) [L172] COND FALSE !(p8 != 0) [L177] COND FALSE !(p9 != 0) [L182] COND FALSE !(p10 != 0) [L187] COND FALSE !(p11 != 0) [L192] COND FALSE !(p12 != 0) [L197] COND FALSE !(p13 != 0) End of lasso representation. - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 50]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L8] int p1 = __VERIFIER_nondet_int(); [L9] int lk1; [L11] int p2 = __VERIFIER_nondet_int(); [L12] int lk2; [L14] int p3 = __VERIFIER_nondet_int(); [L15] int lk3; [L17] int p4 = __VERIFIER_nondet_int(); [L18] int lk4; [L20] int p5 = __VERIFIER_nondet_int(); [L21] int lk5; [L23] int p6 = __VERIFIER_nondet_int(); [L24] int lk6; [L26] int p7 = __VERIFIER_nondet_int(); [L27] int lk7; [L29] int p8 = __VERIFIER_nondet_int(); [L30] int lk8; [L32] int p9 = __VERIFIER_nondet_int(); [L33] int lk9; [L35] int p10 = __VERIFIER_nondet_int(); [L36] int lk10; [L38] int p11 = __VERIFIER_nondet_int(); [L39] int lk11; [L41] int p12 = __VERIFIER_nondet_int(); [L42] int lk12; [L44] int p13 = __VERIFIER_nondet_int(); [L45] int lk13; [L48] int cond; Loop: [L50] COND TRUE 1 [L51] cond = __VERIFIER_nondet_int() [L52] COND FALSE !(cond == 0) [L55] lk1 = 0 [L57] lk2 = 0 [L59] lk3 = 0 [L61] lk4 = 0 [L63] lk5 = 0 [L65] lk6 = 0 [L67] lk7 = 0 [L69] lk8 = 0 [L71] lk9 = 0 [L73] lk10 = 0 [L75] lk11 = 0 [L77] lk12 = 0 [L79] lk13 = 0 [L83] COND FALSE !(p1 != 0) [L87] COND FALSE !(p2 != 0) [L91] COND FALSE !(p3 != 0) [L95] COND FALSE !(p4 != 0) [L99] COND FALSE !(p5 != 0) [L103] COND FALSE !(p6 != 0) [L107] COND FALSE !(p7 != 0) [L111] COND FALSE !(p8 != 0) [L115] COND FALSE !(p9 != 0) [L119] COND FALSE !(p10 != 0) [L123] COND FALSE !(p11 != 0) [L127] COND FALSE !(p12 != 0) [L131] COND FALSE !(p13 != 0) [L137] COND FALSE !(p1 != 0) [L142] COND FALSE !(p2 != 0) [L147] COND FALSE !(p3 != 0) [L152] COND FALSE !(p4 != 0) [L157] COND FALSE !(p5 != 0) [L162] COND FALSE !(p6 != 0) [L167] COND FALSE !(p7 != 0) [L172] COND FALSE !(p8 != 0) [L177] COND FALSE !(p9 != 0) [L182] COND FALSE !(p10 != 0) [L187] COND FALSE !(p11 != 0) [L192] COND FALSE !(p12 != 0) [L197] COND FALSE !(p13 != 0) End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2025-02-06 19:12:53,982 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM)