./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/uthash-2.0.2/uthash_BER_test10-1.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version c00e63dc Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/uthash-2.0.2/uthash_BER_test10-1.i -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 9885703216edf9cfe4bfb438db591a48e102e73a3e0423f90ce871c05fdf2b57 --- Real Ultimate output --- This is Ultimate 0.3.0-?-c00e63d-m [2025-02-06 20:03:48,629 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-02-06 20:03:48,668 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2025-02-06 20:03:48,671 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-02-06 20:03:48,671 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-02-06 20:03:48,671 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-02-06 20:03:48,685 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-02-06 20:03:48,685 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-02-06 20:03:48,685 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-02-06 20:03:48,686 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-02-06 20:03:48,686 INFO L153 SettingsManager]: * Use memory slicer=true [2025-02-06 20:03:48,686 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-02-06 20:03:48,686 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-02-06 20:03:48,686 INFO L153 SettingsManager]: * Use SBE=true [2025-02-06 20:03:48,686 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-02-06 20:03:48,686 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-02-06 20:03:48,686 INFO L153 SettingsManager]: * Use old map elimination=false [2025-02-06 20:03:48,686 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-02-06 20:03:48,686 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-02-06 20:03:48,687 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-02-06 20:03:48,687 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-02-06 20:03:48,687 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-02-06 20:03:48,687 INFO L153 SettingsManager]: * sizeof long=4 [2025-02-06 20:03:48,687 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-02-06 20:03:48,687 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-02-06 20:03:48,687 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-02-06 20:03:48,687 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-02-06 20:03:48,687 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-02-06 20:03:48,687 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-02-06 20:03:48,687 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-02-06 20:03:48,687 INFO L153 SettingsManager]: * sizeof long double=12 [2025-02-06 20:03:48,687 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-02-06 20:03:48,687 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-02-06 20:03:48,687 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-02-06 20:03:48,687 INFO L153 SettingsManager]: * Use constant arrays=true [2025-02-06 20:03:48,687 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-02-06 20:03:48,687 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-02-06 20:03:48,688 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-02-06 20:03:48,688 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-02-06 20:03:48,688 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-02-06 20:03:48,688 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 9885703216edf9cfe4bfb438db591a48e102e73a3e0423f90ce871c05fdf2b57 [2025-02-06 20:03:48,900 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-02-06 20:03:48,905 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-02-06 20:03:48,907 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-02-06 20:03:48,907 INFO L270 PluginConnector]: Initializing CDTParser... [2025-02-06 20:03:48,908 INFO L274 PluginConnector]: CDTParser initialized [2025-02-06 20:03:48,908 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/uthash-2.0.2/uthash_BER_test10-1.i [2025-02-06 20:03:50,003 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/de22939f4/e695c6c09b4447909e368ceb7580d628/FLAGf30a5b6d4 [2025-02-06 20:03:50,411 INFO L384 CDTParser]: Found 1 translation units. [2025-02-06 20:03:50,412 INFO L180 CDTParser]: Scanning /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/uthash-2.0.2/uthash_BER_test10-1.i [2025-02-06 20:03:50,429 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/de22939f4/e695c6c09b4447909e368ceb7580d628/FLAGf30a5b6d4 [2025-02-06 20:03:50,580 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/de22939f4/e695c6c09b4447909e368ceb7580d628 [2025-02-06 20:03:50,582 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-02-06 20:03:50,584 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-02-06 20:03:50,585 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-02-06 20:03:50,585 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-02-06 20:03:50,589 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-02-06 20:03:50,590 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.02 08:03:50" (1/1) ... [2025-02-06 20:03:50,592 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@718da415 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 08:03:50, skipping insertion in model container [2025-02-06 20:03:50,592 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.02 08:03:50" (1/1) ... [2025-02-06 20:03:50,622 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-02-06 20:03:51,090 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-06 20:03:51,105 INFO L200 MainTranslator]: Completed pre-run [2025-02-06 20:03:51,219 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-06 20:03:51,250 INFO L204 MainTranslator]: Completed translation [2025-02-06 20:03:51,251 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 08:03:51 WrapperNode [2025-02-06 20:03:51,251 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-02-06 20:03:51,252 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-02-06 20:03:51,252 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-02-06 20:03:51,252 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-02-06 20:03:51,256 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 08:03:51" (1/1) ... [2025-02-06 20:03:51,282 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 08:03:51" (1/1) ... [2025-02-06 20:03:51,349 INFO L138 Inliner]: procedures = 177, calls = 507, calls flagged for inlining = 11, calls inlined = 38, statements flattened = 3503 [2025-02-06 20:03:51,350 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-02-06 20:03:51,351 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-02-06 20:03:51,351 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-02-06 20:03:51,351 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-02-06 20:03:51,360 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 08:03:51" (1/1) ... [2025-02-06 20:03:51,360 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 08:03:51" (1/1) ... [2025-02-06 20:03:51,376 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 08:03:51" (1/1) ... [2025-02-06 20:03:51,495 INFO L175 MemorySlicer]: Split 480 memory accesses to 3 slices as follows [2, 106, 372]. 78 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0, 0]. The 86 writes are split as follows [0, 4, 82]. [2025-02-06 20:03:51,495 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 08:03:51" (1/1) ... [2025-02-06 20:03:51,495 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 08:03:51" (1/1) ... [2025-02-06 20:03:51,529 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 08:03:51" (1/1) ... [2025-02-06 20:03:51,534 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 08:03:51" (1/1) ... [2025-02-06 20:03:51,539 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 08:03:51" (1/1) ... [2025-02-06 20:03:51,543 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 08:03:51" (1/1) ... [2025-02-06 20:03:51,558 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-02-06 20:03:51,558 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-02-06 20:03:51,558 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-02-06 20:03:51,558 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-02-06 20:03:51,560 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 08:03:51" (1/1) ... [2025-02-06 20:03:51,563 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 20:03:51,574 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 20:03:51,592 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 20:03:51,594 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-02-06 20:03:51,614 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2025-02-06 20:03:51,614 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2025-02-06 20:03:51,614 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#2 [2025-02-06 20:03:51,614 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2025-02-06 20:03:51,614 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2025-02-06 20:03:51,614 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#2 [2025-02-06 20:03:51,614 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#0 [2025-02-06 20:03:51,614 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#1 [2025-02-06 20:03:51,614 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#2 [2025-02-06 20:03:51,614 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#0 [2025-02-06 20:03:51,614 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#1 [2025-02-06 20:03:51,614 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#2 [2025-02-06 20:03:51,614 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2025-02-06 20:03:51,614 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-02-06 20:03:51,614 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#0 [2025-02-06 20:03:51,614 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#1 [2025-02-06 20:03:51,614 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#2 [2025-02-06 20:03:51,615 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2025-02-06 20:03:51,615 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#0 [2025-02-06 20:03:51,615 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#1 [2025-02-06 20:03:51,615 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#2 [2025-02-06 20:03:51,615 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2025-02-06 20:03:51,615 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-02-06 20:03:51,615 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2025-02-06 20:03:51,615 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#2 [2025-02-06 20:03:51,615 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-02-06 20:03:51,615 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-02-06 20:03:51,838 INFO L257 CfgBuilder]: Building ICFG [2025-02-06 20:03:51,840 INFO L287 CfgBuilder]: Building CFG for each procedure with an implementation [2025-02-06 20:03:53,963 INFO L1309 $ProcedureCfgBuilder]: dead code at ProgramPoint L731: call ULTIMATE.dealloc(main_~#i~0#1.base, main_~#i~0#1.offset);havoc main_~#i~0#1.base, main_~#i~0#1.offset; [2025-02-06 20:03:54,154 INFO L? ?]: Removed 892 outVars from TransFormulas that were not future-live. [2025-02-06 20:03:54,154 INFO L308 CfgBuilder]: Performing block encoding [2025-02-06 20:03:54,235 INFO L332 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-02-06 20:03:54,235 INFO L337 CfgBuilder]: Removed 2 assume(true) statements. [2025-02-06 20:03:54,236 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 06.02 08:03:54 BoogieIcfgContainer [2025-02-06 20:03:54,236 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-02-06 20:03:54,236 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-02-06 20:03:54,236 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-02-06 20:03:54,244 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-02-06 20:03:54,245 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-06 20:03:54,245 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 06.02 08:03:50" (1/3) ... [2025-02-06 20:03:54,249 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@591c5b47 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.02 08:03:54, skipping insertion in model container [2025-02-06 20:03:54,249 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-06 20:03:54,249 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 08:03:51" (2/3) ... [2025-02-06 20:03:54,249 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@591c5b47 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.02 08:03:54, skipping insertion in model container [2025-02-06 20:03:54,249 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-06 20:03:54,249 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 06.02 08:03:54" (3/3) ... [2025-02-06 20:03:54,250 INFO L363 chiAutomizerObserver]: Analyzing ICFG uthash_BER_test10-1.i [2025-02-06 20:03:54,299 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-02-06 20:03:54,300 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-02-06 20:03:54,300 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-02-06 20:03:54,300 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-02-06 20:03:54,300 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-02-06 20:03:54,300 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-02-06 20:03:54,300 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-02-06 20:03:54,300 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-02-06 20:03:54,306 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 1085 states, 1077 states have (on average 1.6174558960074281) internal successors, (1742), 1077 states have internal predecessors, (1742), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:03:54,358 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 983 [2025-02-06 20:03:54,358 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:03:54,358 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:03:54,363 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:03:54,363 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:03:54,363 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-02-06 20:03:54,365 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 1085 states, 1077 states have (on average 1.6174558960074281) internal successors, (1742), 1077 states have internal predecessors, (1742), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:03:54,373 INFO L131 ngComponentsAnalysis]: Automaton has 6 accepting balls. 983 [2025-02-06 20:03:54,374 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:03:54,374 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:03:54,374 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:03:54,374 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:03:54,377 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:03:54,378 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false;" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume !true;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:03:54,381 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:03:54,381 INFO L85 PathProgramCache]: Analyzing trace with hash 62528, now seen corresponding path program 1 times [2025-02-06 20:03:54,385 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:03:54,386 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1040996396] [2025-02-06 20:03:54,386 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:03:54,386 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:03:54,447 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:03:54,459 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:03:54,459 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:03:54,459 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:03:54,459 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:03:54,471 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:03:54,478 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:03:54,478 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:03:54,479 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:03:54,507 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:03:54,510 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:03:54,510 INFO L85 PathProgramCache]: Analyzing trace with hash -1798755724, now seen corresponding path program 1 times [2025-02-06 20:03:54,510 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:03:54,511 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [991144698] [2025-02-06 20:03:54,511 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:03:54,511 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:03:54,523 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 7 statements into 1 equivalence classes. [2025-02-06 20:03:54,528 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 7 of 7 statements. [2025-02-06 20:03:54,529 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:03:54,529 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:03:54,567 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:03:54,570 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:03:54,571 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [991144698] [2025-02-06 20:03:54,571 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [991144698] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:03:54,571 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:03:54,571 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-02-06 20:03:54,571 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [908460722] [2025-02-06 20:03:54,572 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:03:54,574 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:03:54,578 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:03:54,599 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2025-02-06 20:03:54,600 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2025-02-06 20:03:54,603 INFO L87 Difference]: Start difference. First operand has 1085 states, 1077 states have (on average 1.6174558960074281) internal successors, (1742), 1077 states have internal predecessors, (1742), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Second operand has 2 states, 2 states have (on average 3.5) internal successors, (7), 2 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:03:54,791 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:03:54,792 INFO L93 Difference]: Finished difference Result 1069 states and 1560 transitions. [2025-02-06 20:03:54,793 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1069 states and 1560 transitions. [2025-02-06 20:03:54,801 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 611 [2025-02-06 20:03:54,813 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1069 states to 1030 states and 1515 transitions. [2025-02-06 20:03:54,815 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1030 [2025-02-06 20:03:54,818 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1030 [2025-02-06 20:03:54,819 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1030 states and 1515 transitions. [2025-02-06 20:03:54,823 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:03:54,826 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1030 states and 1515 transitions. [2025-02-06 20:03:54,840 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1030 states and 1515 transitions. [2025-02-06 20:03:54,881 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1030 to 1030. [2025-02-06 20:03:54,883 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1030 states, 1023 states have (on average 1.469208211143695) internal successors, (1503), 1022 states have internal predecessors, (1503), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:03:54,886 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1030 states to 1030 states and 1515 transitions. [2025-02-06 20:03:54,887 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1030 states and 1515 transitions. [2025-02-06 20:03:54,890 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-02-06 20:03:54,891 INFO L432 stractBuchiCegarLoop]: Abstraction has 1030 states and 1515 transitions. [2025-02-06 20:03:54,893 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-02-06 20:03:54,893 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1030 states and 1515 transitions. [2025-02-06 20:03:54,898 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 611 [2025-02-06 20:03:54,899 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:03:54,899 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:03:54,902 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:03:54,902 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:03:54,902 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:03:54,906 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem182#1 := read~int#2(main_~_hj_key~1#1.base, 10 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 16777216 * (main_#t~mem182#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem184#1 := read~int#2(main_~_hj_key~1#1.base, 8 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 256 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem185#1 := read~int#2(main_~_hj_key~1#1.base, 7 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 16777216 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem186#1 := read~int#2(main_~_hj_key~1#1.base, 6 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 65536 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem187#1 := read~int#2(main_~_hj_key~1#1.base, 5 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 256 * (main_#t~mem187#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem188#1 := read~int#2(main_~_hj_key~1#1.base, 4 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + (if main_#t~mem188#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem188#1 % 256 % 4294967296 else main_#t~mem188#1 % 256 % 4294967296 - 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise194#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:03:54,906 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:03:54,906 INFO L85 PathProgramCache]: Analyzing trace with hash 62528, now seen corresponding path program 2 times [2025-02-06 20:03:54,906 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:03:54,906 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [134346737] [2025-02-06 20:03:54,906 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 20:03:54,906 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:03:54,922 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:03:54,926 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:03:54,927 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 20:03:54,927 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:03:54,927 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:03:54,932 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:03:54,935 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:03:54,935 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:03:54,935 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:03:54,946 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:03:54,947 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:03:54,947 INFO L85 PathProgramCache]: Analyzing trace with hash -1373366913, now seen corresponding path program 1 times [2025-02-06 20:03:54,947 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:03:54,947 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [235972520] [2025-02-06 20:03:54,947 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:03:54,947 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:03:54,981 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 76 statements into 1 equivalence classes. [2025-02-06 20:03:54,996 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 76 of 76 statements. [2025-02-06 20:03:55,000 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:03:55,000 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:03:55,324 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:03:55,324 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:03:55,324 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [235972520] [2025-02-06 20:03:55,324 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [235972520] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:03:55,324 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:03:55,324 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-06 20:03:55,324 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1066154608] [2025-02-06 20:03:55,324 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:03:55,324 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:03:55,324 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:03:55,325 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-06 20:03:55,325 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-06 20:03:55,325 INFO L87 Difference]: Start difference. First operand 1030 states and 1515 transitions. cyclomatic complexity: 495 Second operand has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:03:55,669 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:03:55,669 INFO L93 Difference]: Finished difference Result 1033 states and 1511 transitions. [2025-02-06 20:03:55,669 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1033 states and 1511 transitions. [2025-02-06 20:03:55,675 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 614 [2025-02-06 20:03:55,680 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1033 states to 1033 states and 1511 transitions. [2025-02-06 20:03:55,680 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1033 [2025-02-06 20:03:55,681 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1033 [2025-02-06 20:03:55,681 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1033 states and 1511 transitions. [2025-02-06 20:03:55,682 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:03:55,682 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1033 states and 1511 transitions. [2025-02-06 20:03:55,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1033 states and 1511 transitions. [2025-02-06 20:03:55,707 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1033 to 1030. [2025-02-06 20:03:55,708 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1030 states, 1023 states have (on average 1.4623655913978495) internal successors, (1496), 1022 states have internal predecessors, (1496), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:03:55,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1030 states to 1030 states and 1508 transitions. [2025-02-06 20:03:55,711 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1030 states and 1508 transitions. [2025-02-06 20:03:55,712 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-06 20:03:55,712 INFO L432 stractBuchiCegarLoop]: Abstraction has 1030 states and 1508 transitions. [2025-02-06 20:03:55,712 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-02-06 20:03:55,712 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1030 states and 1508 transitions. [2025-02-06 20:03:55,715 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 611 [2025-02-06 20:03:55,715 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:03:55,716 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:03:55,716 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:03:55,717 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:03:55,717 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:03:55,717 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise194#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:03:55,718 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:03:55,718 INFO L85 PathProgramCache]: Analyzing trace with hash 62528, now seen corresponding path program 3 times [2025-02-06 20:03:55,718 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:03:55,718 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1101531508] [2025-02-06 20:03:55,718 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 20:03:55,718 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:03:55,728 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:03:55,731 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:03:55,731 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-06 20:03:55,731 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:03:55,731 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:03:55,736 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:03:55,738 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:03:55,739 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:03:55,739 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:03:55,745 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:03:55,745 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:03:55,745 INFO L85 PathProgramCache]: Analyzing trace with hash -1752637179, now seen corresponding path program 1 times [2025-02-06 20:03:55,746 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:03:55,746 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [604561362] [2025-02-06 20:03:55,746 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:03:55,746 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:03:55,817 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 76 statements into 1 equivalence classes. [2025-02-06 20:03:56,033 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 76 of 76 statements. [2025-02-06 20:03:56,033 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:03:56,033 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:03:56,514 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:03:56,515 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:03:56,515 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [604561362] [2025-02-06 20:03:56,515 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [604561362] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:03:56,515 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:03:56,515 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-06 20:03:56,515 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1632000432] [2025-02-06 20:03:56,516 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:03:56,516 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:03:56,516 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:03:56,516 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-06 20:03:56,517 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-06 20:03:56,517 INFO L87 Difference]: Start difference. First operand 1030 states and 1508 transitions. cyclomatic complexity: 488 Second operand has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:03:57,415 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:03:57,415 INFO L93 Difference]: Finished difference Result 1064 states and 1550 transitions. [2025-02-06 20:03:57,415 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1064 states and 1550 transitions. [2025-02-06 20:03:57,420 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 645 [2025-02-06 20:03:57,427 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1064 states to 1064 states and 1550 transitions. [2025-02-06 20:03:57,427 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1064 [2025-02-06 20:03:57,428 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1064 [2025-02-06 20:03:57,429 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1064 states and 1550 transitions. [2025-02-06 20:03:57,430 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:03:57,430 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1064 states and 1550 transitions. [2025-02-06 20:03:57,432 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1064 states and 1550 transitions. [2025-02-06 20:03:57,470 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1064 to 1060. [2025-02-06 20:03:57,471 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1060 states, 1053 states have (on average 1.4558404558404558) internal successors, (1533), 1052 states have internal predecessors, (1533), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:03:57,475 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1060 states to 1060 states and 1545 transitions. [2025-02-06 20:03:57,475 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1060 states and 1545 transitions. [2025-02-06 20:03:57,476 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-06 20:03:57,476 INFO L432 stractBuchiCegarLoop]: Abstraction has 1060 states and 1545 transitions. [2025-02-06 20:03:57,477 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-02-06 20:03:57,477 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1060 states and 1545 transitions. [2025-02-06 20:03:57,481 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 641 [2025-02-06 20:03:57,481 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:03:57,481 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:03:57,481 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:03:57,482 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:03:57,482 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:03:57,482 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise194#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:03:57,483 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:03:57,483 INFO L85 PathProgramCache]: Analyzing trace with hash 62528, now seen corresponding path program 4 times [2025-02-06 20:03:57,483 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:03:57,483 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [630308420] [2025-02-06 20:03:57,483 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 20:03:57,484 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:03:57,493 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-02-06 20:03:57,496 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:03:57,497 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-06 20:03:57,497 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:03:57,497 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:03:57,503 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:03:57,505 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:03:57,505 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:03:57,506 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:03:57,515 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:03:57,515 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:03:57,516 INFO L85 PathProgramCache]: Analyzing trace with hash -514293335, now seen corresponding path program 1 times [2025-02-06 20:03:57,516 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:03:57,516 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2125831691] [2025-02-06 20:03:57,516 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:03:57,516 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:03:57,561 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 77 statements into 1 equivalence classes. [2025-02-06 20:03:57,597 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 77 of 77 statements. [2025-02-06 20:03:57,599 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:03:57,599 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:03:57,849 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:03:57,853 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:03:57,854 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2125831691] [2025-02-06 20:03:57,854 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2125831691] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:03:57,854 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:03:57,854 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-02-06 20:03:57,854 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [899255435] [2025-02-06 20:03:57,854 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:03:57,854 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:03:57,854 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:03:57,854 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-06 20:03:57,854 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-02-06 20:03:57,854 INFO L87 Difference]: Start difference. First operand 1060 states and 1545 transitions. cyclomatic complexity: 495 Second operand has 7 states, 7 states have (on average 11.0) internal successors, (77), 7 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:03:58,792 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:03:58,793 INFO L93 Difference]: Finished difference Result 1072 states and 1562 transitions. [2025-02-06 20:03:58,793 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1072 states and 1562 transitions. [2025-02-06 20:03:58,798 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 653 [2025-02-06 20:03:58,803 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1072 states to 1072 states and 1562 transitions. [2025-02-06 20:03:58,803 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1072 [2025-02-06 20:03:58,804 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1072 [2025-02-06 20:03:58,804 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1072 states and 1562 transitions. [2025-02-06 20:03:58,805 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:03:58,805 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1072 states and 1562 transitions. [2025-02-06 20:03:58,807 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1072 states and 1562 transitions. [2025-02-06 20:03:58,815 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1072 to 1069. [2025-02-06 20:03:58,817 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1069 states, 1062 states have (on average 1.4557438794726931) internal successors, (1546), 1061 states have internal predecessors, (1546), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:03:58,820 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1069 states to 1069 states and 1558 transitions. [2025-02-06 20:03:58,820 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1069 states and 1558 transitions. [2025-02-06 20:03:58,820 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-02-06 20:03:58,821 INFO L432 stractBuchiCegarLoop]: Abstraction has 1069 states and 1558 transitions. [2025-02-06 20:03:58,821 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-02-06 20:03:58,821 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1069 states and 1558 transitions. [2025-02-06 20:03:58,824 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 650 [2025-02-06 20:03:58,824 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:03:58,824 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:03:58,825 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:03:58,825 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:03:58,825 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:03:58,825 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise194#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:03:58,826 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:03:58,826 INFO L85 PathProgramCache]: Analyzing trace with hash 62528, now seen corresponding path program 5 times [2025-02-06 20:03:58,826 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:03:58,826 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [814448029] [2025-02-06 20:03:58,826 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-06 20:03:58,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:03:58,840 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:03:58,842 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:03:58,842 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 20:03:58,842 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:03:58,842 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:03:58,846 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:03:58,847 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:03:58,848 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:03:58,848 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:03:58,854 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:03:58,854 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:03:58,854 INFO L85 PathProgramCache]: Analyzing trace with hash 1214663134, now seen corresponding path program 1 times [2025-02-06 20:03:58,854 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:03:58,854 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1955197533] [2025-02-06 20:03:58,854 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:03:58,855 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:03:58,880 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 78 statements into 1 equivalence classes. [2025-02-06 20:03:58,904 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 78 of 78 statements. [2025-02-06 20:03:58,904 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:03:58,905 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:03:59,293 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:03:59,293 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:03:59,293 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1955197533] [2025-02-06 20:03:59,293 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1955197533] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:03:59,293 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:03:59,293 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-02-06 20:03:59,294 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1595941879] [2025-02-06 20:03:59,294 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:03:59,294 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:03:59,295 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:03:59,295 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-02-06 20:03:59,295 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2025-02-06 20:03:59,295 INFO L87 Difference]: Start difference. First operand 1069 states and 1558 transitions. cyclomatic complexity: 499 Second operand has 9 states, 9 states have (on average 8.666666666666666) internal successors, (78), 9 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:04:00,599 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:04:00,599 INFO L93 Difference]: Finished difference Result 1083 states and 1576 transitions. [2025-02-06 20:04:00,599 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1083 states and 1576 transitions. [2025-02-06 20:04:00,606 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 664 [2025-02-06 20:04:00,611 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1083 states to 1083 states and 1576 transitions. [2025-02-06 20:04:00,611 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1083 [2025-02-06 20:04:00,612 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1083 [2025-02-06 20:04:00,612 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1083 states and 1576 transitions. [2025-02-06 20:04:00,614 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:04:00,614 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1083 states and 1576 transitions. [2025-02-06 20:04:00,615 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1083 states and 1576 transitions. [2025-02-06 20:04:00,624 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1083 to 1077. [2025-02-06 20:04:00,626 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1077 states, 1070 states have (on average 1.4542056074766354) internal successors, (1556), 1069 states have internal predecessors, (1556), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:04:00,629 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1077 states to 1077 states and 1568 transitions. [2025-02-06 20:04:00,629 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1077 states and 1568 transitions. [2025-02-06 20:04:00,630 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-02-06 20:04:00,631 INFO L432 stractBuchiCegarLoop]: Abstraction has 1077 states and 1568 transitions. [2025-02-06 20:04:00,632 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-02-06 20:04:00,632 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1077 states and 1568 transitions. [2025-02-06 20:04:00,636 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 658 [2025-02-06 20:04:00,636 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:04:00,636 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:04:00,637 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:04:00,637 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:04:00,637 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:04:00,638 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise193#1 := 0;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise194#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:04:00,638 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:04:00,638 INFO L85 PathProgramCache]: Analyzing trace with hash 62528, now seen corresponding path program 6 times [2025-02-06 20:04:00,638 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:04:00,638 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [937203457] [2025-02-06 20:04:00,638 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-06 20:04:00,638 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:04:00,648 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:04:00,651 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:04:00,651 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-02-06 20:04:00,651 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:04:00,651 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:04:00,656 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:04:00,657 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:04:00,657 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:04:00,657 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:04:00,665 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:04:00,668 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:04:00,668 INFO L85 PathProgramCache]: Analyzing trace with hash 578000578, now seen corresponding path program 1 times [2025-02-06 20:04:00,668 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:04:00,668 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1414293230] [2025-02-06 20:04:00,668 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:04:00,668 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:04:00,700 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 78 statements into 1 equivalence classes. [2025-02-06 20:04:00,718 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 78 of 78 statements. [2025-02-06 20:04:00,719 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:04:00,719 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:04:00,905 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:04:00,907 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:04:00,907 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1414293230] [2025-02-06 20:04:00,907 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1414293230] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:04:00,907 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:04:00,907 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-06 20:04:00,907 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1203347769] [2025-02-06 20:04:00,907 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:04:00,907 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:04:00,908 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:04:00,908 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-06 20:04:00,908 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2025-02-06 20:04:00,908 INFO L87 Difference]: Start difference. First operand 1077 states and 1568 transitions. cyclomatic complexity: 501 Second operand has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:04:01,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:04:01,766 INFO L93 Difference]: Finished difference Result 1080 states and 1571 transitions. [2025-02-06 20:04:01,766 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1080 states and 1571 transitions. [2025-02-06 20:04:01,770 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 661 [2025-02-06 20:04:01,774 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1080 states to 1080 states and 1571 transitions. [2025-02-06 20:04:01,774 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1080 [2025-02-06 20:04:01,775 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1080 [2025-02-06 20:04:01,775 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1080 states and 1571 transitions. [2025-02-06 20:04:01,776 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:04:01,776 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1080 states and 1571 transitions. [2025-02-06 20:04:01,777 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1080 states and 1571 transitions. [2025-02-06 20:04:01,786 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1080 to 1080. [2025-02-06 20:04:01,787 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1080 states, 1073 states have (on average 1.4529356943150047) internal successors, (1559), 1072 states have internal predecessors, (1559), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:04:01,791 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1080 states to 1080 states and 1571 transitions. [2025-02-06 20:04:01,791 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1080 states and 1571 transitions. [2025-02-06 20:04:01,794 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-06 20:04:01,795 INFO L432 stractBuchiCegarLoop]: Abstraction has 1080 states and 1571 transitions. [2025-02-06 20:04:01,795 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-02-06 20:04:01,795 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1080 states and 1571 transitions. [2025-02-06 20:04:01,798 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 661 [2025-02-06 20:04:01,798 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:04:01,798 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:04:01,799 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:04:01,800 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:04:01,800 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:04:01,800 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise194#1;assume main_#t~bitwise194#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:04:01,801 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:04:01,801 INFO L85 PathProgramCache]: Analyzing trace with hash 62528, now seen corresponding path program 7 times [2025-02-06 20:04:01,801 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:04:01,801 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [446849782] [2025-02-06 20:04:01,801 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-02-06 20:04:01,801 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:04:01,809 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:04:01,811 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:04:01,811 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:04:01,811 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:04:01,811 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:04:01,815 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:04:01,817 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:04:01,818 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:04:01,818 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:04:01,823 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:04:01,824 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:04:01,825 INFO L85 PathProgramCache]: Analyzing trace with hash -375244551, now seen corresponding path program 1 times [2025-02-06 20:04:01,825 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:04:01,825 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [55504741] [2025-02-06 20:04:01,825 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:04:01,825 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:04:01,851 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 79 statements into 1 equivalence classes. [2025-02-06 20:04:02,051 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 79 of 79 statements. [2025-02-06 20:04:02,051 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:04:02,051 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:04:02,589 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:04:02,590 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:04:02,590 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [55504741] [2025-02-06 20:04:02,590 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [55504741] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:04:02,590 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:04:02,590 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2025-02-06 20:04:02,590 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1407681884] [2025-02-06 20:04:02,590 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:04:02,591 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:04:02,591 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:04:02,591 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-02-06 20:04:02,591 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2025-02-06 20:04:02,591 INFO L87 Difference]: Start difference. First operand 1080 states and 1571 transitions. cyclomatic complexity: 501 Second operand has 13 states, 13 states have (on average 6.076923076923077) internal successors, (79), 13 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:04:05,278 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:04:05,279 INFO L93 Difference]: Finished difference Result 1178 states and 1711 transitions. [2025-02-06 20:04:05,279 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1178 states and 1711 transitions. [2025-02-06 20:04:05,282 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 759 [2025-02-06 20:04:05,287 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1178 states to 1178 states and 1711 transitions. [2025-02-06 20:04:05,287 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1178 [2025-02-06 20:04:05,288 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1178 [2025-02-06 20:04:05,288 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1178 states and 1711 transitions. [2025-02-06 20:04:05,290 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:04:05,290 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1178 states and 1711 transitions. [2025-02-06 20:04:05,291 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1178 states and 1711 transitions. [2025-02-06 20:04:05,300 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1178 to 1086. [2025-02-06 20:04:05,301 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1086 states, 1079 states have (on average 1.4522706209453198) internal successors, (1567), 1078 states have internal predecessors, (1567), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:04:05,304 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1086 states to 1086 states and 1579 transitions. [2025-02-06 20:04:05,304 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1086 states and 1579 transitions. [2025-02-06 20:04:05,304 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2025-02-06 20:04:05,305 INFO L432 stractBuchiCegarLoop]: Abstraction has 1086 states and 1579 transitions. [2025-02-06 20:04:05,305 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-02-06 20:04:05,305 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1086 states and 1579 transitions. [2025-02-06 20:04:05,307 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 667 [2025-02-06 20:04:05,307 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:04:05,307 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:04:05,307 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:04:05,307 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:04:05,308 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:04:05,308 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise193#1;assume main_#t~bitwise193#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise194#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:04:05,308 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:04:05,308 INFO L85 PathProgramCache]: Analyzing trace with hash 62528, now seen corresponding path program 8 times [2025-02-06 20:04:05,308 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:04:05,308 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1458906255] [2025-02-06 20:04:05,308 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 20:04:05,309 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:04:05,330 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:04:05,331 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:04:05,331 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 20:04:05,331 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:04:05,331 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:04:05,335 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:04:05,336 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:04:05,336 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:04:05,336 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:04:05,342 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:04:05,343 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:04:05,343 INFO L85 PathProgramCache]: Analyzing trace with hash -678305689, now seen corresponding path program 1 times [2025-02-06 20:04:05,343 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:04:05,343 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [769983374] [2025-02-06 20:04:05,343 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:04:05,343 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:04:05,371 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 79 statements into 1 equivalence classes. [2025-02-06 20:04:05,437 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 79 of 79 statements. [2025-02-06 20:04:05,437 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:04:05,438 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:04:05,607 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:04:05,607 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:04:05,607 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [769983374] [2025-02-06 20:04:05,607 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [769983374] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:04:05,607 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:04:05,607 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-02-06 20:04:05,609 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1211075933] [2025-02-06 20:04:05,609 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:04:05,609 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:04:05,610 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:04:05,610 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-06 20:04:05,610 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-02-06 20:04:05,610 INFO L87 Difference]: Start difference. First operand 1086 states and 1579 transitions. cyclomatic complexity: 503 Second operand has 7 states, 7 states have (on average 11.285714285714286) internal successors, (79), 7 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:04:06,520 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:04:06,521 INFO L93 Difference]: Finished difference Result 1093 states and 1588 transitions. [2025-02-06 20:04:06,521 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1093 states and 1588 transitions. [2025-02-06 20:04:06,523 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 674 [2025-02-06 20:04:06,528 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1093 states to 1093 states and 1588 transitions. [2025-02-06 20:04:06,528 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1093 [2025-02-06 20:04:06,529 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1093 [2025-02-06 20:04:06,529 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1093 states and 1588 transitions. [2025-02-06 20:04:06,530 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:04:06,530 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1093 states and 1588 transitions. [2025-02-06 20:04:06,531 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1093 states and 1588 transitions. [2025-02-06 20:04:06,539 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1093 to 1086. [2025-02-06 20:04:06,540 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1086 states, 1079 states have (on average 1.4522706209453198) internal successors, (1567), 1078 states have internal predecessors, (1567), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:04:06,542 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1086 states to 1086 states and 1579 transitions. [2025-02-06 20:04:06,542 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1086 states and 1579 transitions. [2025-02-06 20:04:06,542 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-02-06 20:04:06,543 INFO L432 stractBuchiCegarLoop]: Abstraction has 1086 states and 1579 transitions. [2025-02-06 20:04:06,543 INFO L338 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2025-02-06 20:04:06,543 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1086 states and 1579 transitions. [2025-02-06 20:04:06,545 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 667 [2025-02-06 20:04:06,545 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:04:06,545 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:04:06,546 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:04:06,547 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:04:06,547 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:04:06,547 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise193#1;assume main_#t~bitwise193#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise194#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:04:06,547 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:04:06,548 INFO L85 PathProgramCache]: Analyzing trace with hash 62528, now seen corresponding path program 9 times [2025-02-06 20:04:06,548 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:04:06,548 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1055788867] [2025-02-06 20:04:06,548 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 20:04:06,548 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:04:06,555 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:04:06,558 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:04:06,558 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-06 20:04:06,558 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:04:06,558 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:04:06,561 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:04:06,562 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:04:06,562 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:04:06,562 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:04:06,568 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:04:06,569 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:04:06,569 INFO L85 PathProgramCache]: Analyzing trace with hash 425247456, now seen corresponding path program 1 times [2025-02-06 20:04:06,569 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:04:06,569 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2076207459] [2025-02-06 20:04:06,569 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:04:06,569 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:04:06,595 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 80 statements into 1 equivalence classes. [2025-02-06 20:04:06,626 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 80 of 80 statements. [2025-02-06 20:04:06,626 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:04:06,626 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:04:06,803 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:04:06,803 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:04:06,803 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2076207459] [2025-02-06 20:04:06,803 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2076207459] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:04:06,803 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:04:06,803 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-02-06 20:04:06,803 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [210232243] [2025-02-06 20:04:06,803 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:04:06,803 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:04:06,804 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:04:06,804 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-02-06 20:04:06,804 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2025-02-06 20:04:06,804 INFO L87 Difference]: Start difference. First operand 1086 states and 1579 transitions. cyclomatic complexity: 503 Second operand has 9 states, 9 states have (on average 8.88888888888889) internal successors, (80), 9 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:04:07,972 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:04:07,973 INFO L93 Difference]: Finished difference Result 1106 states and 1605 transitions. [2025-02-06 20:04:07,974 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1106 states and 1605 transitions. [2025-02-06 20:04:07,976 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 687 [2025-02-06 20:04:07,979 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1106 states to 1106 states and 1605 transitions. [2025-02-06 20:04:07,980 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1106 [2025-02-06 20:04:07,982 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1106 [2025-02-06 20:04:07,982 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1106 states and 1605 transitions. [2025-02-06 20:04:07,983 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:04:07,983 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1106 states and 1605 transitions. [2025-02-06 20:04:07,984 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1106 states and 1605 transitions. [2025-02-06 20:04:07,991 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1106 to 1089. [2025-02-06 20:04:07,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1089 states, 1082 states have (on average 1.4519408502772644) internal successors, (1571), 1081 states have internal predecessors, (1571), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:04:07,994 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1089 states to 1089 states and 1583 transitions. [2025-02-06 20:04:07,994 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1089 states and 1583 transitions. [2025-02-06 20:04:07,995 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-02-06 20:04:07,995 INFO L432 stractBuchiCegarLoop]: Abstraction has 1089 states and 1583 transitions. [2025-02-06 20:04:07,995 INFO L338 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2025-02-06 20:04:07,995 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1089 states and 1583 transitions. [2025-02-06 20:04:07,997 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 670 [2025-02-06 20:04:07,997 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:04:07,997 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:04:07,997 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:04:07,997 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:04:07,997 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:04:07,998 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise193#1 := 0;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise194#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:04:07,998 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:04:07,999 INFO L85 PathProgramCache]: Analyzing trace with hash 62528, now seen corresponding path program 10 times [2025-02-06 20:04:07,999 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:04:07,999 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1493901653] [2025-02-06 20:04:07,999 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 20:04:07,999 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:04:08,007 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-02-06 20:04:08,009 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:04:08,009 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-06 20:04:08,009 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:04:08,009 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:04:08,012 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:04:08,013 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:04:08,013 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:04:08,013 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:04:08,018 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:04:08,019 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:04:08,019 INFO L85 PathProgramCache]: Analyzing trace with hash -1015380901, now seen corresponding path program 1 times [2025-02-06 20:04:08,019 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:04:08,019 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1501933841] [2025-02-06 20:04:08,019 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:04:08,019 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:04:08,047 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 80 statements into 1 equivalence classes. [2025-02-06 20:04:08,060 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 80 of 80 statements. [2025-02-06 20:04:08,060 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:04:08,060 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:04:08,249 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:04:08,250 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:04:08,250 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1501933841] [2025-02-06 20:04:08,250 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1501933841] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:04:08,250 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:04:08,250 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-02-06 20:04:08,250 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [41757345] [2025-02-06 20:04:08,250 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:04:08,250 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:04:08,250 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:04:08,251 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-02-06 20:04:08,251 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2025-02-06 20:04:08,251 INFO L87 Difference]: Start difference. First operand 1089 states and 1583 transitions. cyclomatic complexity: 504 Second operand has 9 states, 9 states have (on average 8.88888888888889) internal successors, (80), 9 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:04:09,224 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:04:09,224 INFO L93 Difference]: Finished difference Result 1102 states and 1599 transitions. [2025-02-06 20:04:09,224 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1102 states and 1599 transitions. [2025-02-06 20:04:09,227 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 683 [2025-02-06 20:04:09,230 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1102 states to 1102 states and 1599 transitions. [2025-02-06 20:04:09,230 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1102 [2025-02-06 20:04:09,231 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1102 [2025-02-06 20:04:09,231 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1102 states and 1599 transitions. [2025-02-06 20:04:09,232 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:04:09,232 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1102 states and 1599 transitions. [2025-02-06 20:04:09,233 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1102 states and 1599 transitions. [2025-02-06 20:04:09,240 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1102 to 1089. [2025-02-06 20:04:09,241 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1089 states, 1082 states have (on average 1.4519408502772644) internal successors, (1571), 1081 states have internal predecessors, (1571), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:04:09,242 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1089 states to 1089 states and 1583 transitions. [2025-02-06 20:04:09,243 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1089 states and 1583 transitions. [2025-02-06 20:04:09,243 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-02-06 20:04:09,243 INFO L432 stractBuchiCegarLoop]: Abstraction has 1089 states and 1583 transitions. [2025-02-06 20:04:09,243 INFO L338 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2025-02-06 20:04:09,243 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1089 states and 1583 transitions. [2025-02-06 20:04:09,245 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 670 [2025-02-06 20:04:09,245 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:04:09,245 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:04:09,245 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:04:09,245 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:04:09,245 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:04:09,246 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise194#1;assume main_#t~bitwise194#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 32 % 4294967296;main_#t~bitwise198#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:04:09,246 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:04:09,246 INFO L85 PathProgramCache]: Analyzing trace with hash 62528, now seen corresponding path program 11 times [2025-02-06 20:04:09,246 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:04:09,246 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1026611416] [2025-02-06 20:04:09,246 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-06 20:04:09,247 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:04:09,258 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:04:09,264 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:04:09,264 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 20:04:09,264 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:04:09,264 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:04:09,267 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:04:09,269 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:04:09,269 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:04:09,269 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:04:09,274 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:04:09,275 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:04:09,275 INFO L85 PathProgramCache]: Analyzing trace with hash -567982311, now seen corresponding path program 1 times [2025-02-06 20:04:09,275 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:04:09,275 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1295114688] [2025-02-06 20:04:09,275 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:04:09,275 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:04:09,298 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 80 statements into 1 equivalence classes. [2025-02-06 20:04:09,429 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 80 of 80 statements. [2025-02-06 20:04:09,429 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:04:09,429 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:04:09,999 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:04:09,999 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:04:09,999 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1295114688] [2025-02-06 20:04:09,999 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1295114688] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:04:09,999 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:04:09,999 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-02-06 20:04:10,000 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [82883668] [2025-02-06 20:04:10,000 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:04:10,000 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:04:10,000 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:04:10,001 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-02-06 20:04:10,001 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2025-02-06 20:04:10,002 INFO L87 Difference]: Start difference. First operand 1089 states and 1583 transitions. cyclomatic complexity: 504 Second operand has 9 states, 9 states have (on average 8.88888888888889) internal successors, (80), 9 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:04:10,882 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:04:10,882 INFO L93 Difference]: Finished difference Result 1085 states and 1577 transitions. [2025-02-06 20:04:10,882 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1085 states and 1577 transitions. [2025-02-06 20:04:10,884 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 666 [2025-02-06 20:04:10,887 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1085 states to 1085 states and 1577 transitions. [2025-02-06 20:04:10,888 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1085 [2025-02-06 20:04:10,892 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1085 [2025-02-06 20:04:10,892 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1085 states and 1577 transitions. [2025-02-06 20:04:10,893 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:04:10,896 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1085 states and 1577 transitions. [2025-02-06 20:04:10,898 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1085 states and 1577 transitions. [2025-02-06 20:04:10,913 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1085 to 1083. [2025-02-06 20:04:10,915 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1083 states, 1076 states have (on average 1.4516728624535316) internal successors, (1562), 1075 states have internal predecessors, (1562), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:04:10,916 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1083 states to 1083 states and 1574 transitions. [2025-02-06 20:04:10,920 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1083 states and 1574 transitions. [2025-02-06 20:04:10,921 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-02-06 20:04:10,921 INFO L432 stractBuchiCegarLoop]: Abstraction has 1083 states and 1574 transitions. [2025-02-06 20:04:10,921 INFO L338 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2025-02-06 20:04:10,925 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1083 states and 1574 transitions. [2025-02-06 20:04:10,928 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 664 [2025-02-06 20:04:10,928 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:04:10,928 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:04:10,928 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:04:10,928 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:04:10,929 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:04:10,929 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise193#1;assume main_#t~bitwise193#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise194#1 := 0;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:04:10,929 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:04:10,929 INFO L85 PathProgramCache]: Analyzing trace with hash 62528, now seen corresponding path program 12 times [2025-02-06 20:04:10,929 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:04:10,929 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [183052851] [2025-02-06 20:04:10,929 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-06 20:04:10,930 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:04:10,937 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:04:10,938 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:04:10,939 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-02-06 20:04:10,939 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:04:10,939 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:04:10,942 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:04:10,943 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:04:10,943 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:04:10,943 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:04:10,949 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:04:10,949 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:04:10,949 INFO L85 PathProgramCache]: Analyzing trace with hash 1881537540, now seen corresponding path program 1 times [2025-02-06 20:04:10,949 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:04:10,950 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [210540653] [2025-02-06 20:04:10,950 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:04:10,950 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:04:10,973 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 81 statements into 1 equivalence classes. [2025-02-06 20:04:11,037 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 81 of 81 statements. [2025-02-06 20:04:11,038 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:04:11,038 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:04:11,229 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:04:11,229 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:04:11,229 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [210540653] [2025-02-06 20:04:11,229 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [210540653] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:04:11,229 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:04:11,230 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-02-06 20:04:11,230 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1310079328] [2025-02-06 20:04:11,230 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:04:11,230 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:04:11,230 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:04:11,230 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-06 20:04:11,230 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-02-06 20:04:11,231 INFO L87 Difference]: Start difference. First operand 1083 states and 1574 transitions. cyclomatic complexity: 501 Second operand has 7 states, 7 states have (on average 11.571428571428571) internal successors, (81), 7 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:04:12,100 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:04:12,100 INFO L93 Difference]: Finished difference Result 1088 states and 1580 transitions. [2025-02-06 20:04:12,100 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1088 states and 1580 transitions. [2025-02-06 20:04:12,103 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 669 [2025-02-06 20:04:12,106 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1088 states to 1088 states and 1580 transitions. [2025-02-06 20:04:12,106 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1088 [2025-02-06 20:04:12,107 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1088 [2025-02-06 20:04:12,107 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1088 states and 1580 transitions. [2025-02-06 20:04:12,108 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:04:12,108 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1088 states and 1580 transitions. [2025-02-06 20:04:12,109 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1088 states and 1580 transitions. [2025-02-06 20:04:12,115 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1088 to 1087. [2025-02-06 20:04:12,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1087 states, 1080 states have (on average 1.450925925925926) internal successors, (1567), 1079 states have internal predecessors, (1567), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:04:12,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1087 states to 1087 states and 1579 transitions. [2025-02-06 20:04:12,118 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1087 states and 1579 transitions. [2025-02-06 20:04:12,118 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-02-06 20:04:12,119 INFO L432 stractBuchiCegarLoop]: Abstraction has 1087 states and 1579 transitions. [2025-02-06 20:04:12,119 INFO L338 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2025-02-06 20:04:12,119 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1087 states and 1579 transitions. [2025-02-06 20:04:12,121 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 668 [2025-02-06 20:04:12,122 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:04:12,122 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:04:12,122 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:04:12,122 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:04:12,122 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:04:12,123 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise193#1;assume main_#t~bitwise193#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise194#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise196#1 := main_~_hj_i~1#1;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:04:12,123 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:04:12,123 INFO L85 PathProgramCache]: Analyzing trace with hash 62528, now seen corresponding path program 13 times [2025-02-06 20:04:12,123 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:04:12,123 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1081395068] [2025-02-06 20:04:12,124 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-02-06 20:04:12,124 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:04:12,132 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:04:12,133 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:04:12,133 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:04:12,133 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:04:12,133 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:04:12,137 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:04:12,137 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:04:12,138 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:04:12,138 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:04:12,143 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:04:12,144 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:04:12,144 INFO L85 PathProgramCache]: Analyzing trace with hash 572704288, now seen corresponding path program 1 times [2025-02-06 20:04:12,144 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:04:12,144 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2064641640] [2025-02-06 20:04:12,144 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:04:12,144 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:04:12,173 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 81 statements into 1 equivalence classes. [2025-02-06 20:04:12,240 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 81 of 81 statements. [2025-02-06 20:04:12,241 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:04:12,241 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:04:12,478 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:04:12,478 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:04:12,478 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2064641640] [2025-02-06 20:04:12,478 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2064641640] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:04:12,478 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:04:12,478 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-02-06 20:04:12,479 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [682378923] [2025-02-06 20:04:12,479 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:04:12,479 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:04:12,479 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:04:12,479 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-02-06 20:04:12,479 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2025-02-06 20:04:12,479 INFO L87 Difference]: Start difference. First operand 1087 states and 1579 transitions. cyclomatic complexity: 502 Second operand has 10 states, 10 states have (on average 8.1) internal successors, (81), 10 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:04:13,708 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:04:13,709 INFO L93 Difference]: Finished difference Result 1107 states and 1606 transitions. [2025-02-06 20:04:13,709 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1107 states and 1606 transitions. [2025-02-06 20:04:13,712 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 688 [2025-02-06 20:04:13,715 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1107 states to 1107 states and 1606 transitions. [2025-02-06 20:04:13,715 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1107 [2025-02-06 20:04:13,716 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1107 [2025-02-06 20:04:13,716 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1107 states and 1606 transitions. [2025-02-06 20:04:13,717 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:04:13,717 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1107 states and 1606 transitions. [2025-02-06 20:04:13,718 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1107 states and 1606 transitions. [2025-02-06 20:04:13,724 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1107 to 1100. [2025-02-06 20:04:13,725 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1100 states, 1093 states have (on average 1.4492223238792314) internal successors, (1584), 1092 states have internal predecessors, (1584), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:04:13,727 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1100 states to 1100 states and 1596 transitions. [2025-02-06 20:04:13,727 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1100 states and 1596 transitions. [2025-02-06 20:04:13,729 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-02-06 20:04:13,729 INFO L432 stractBuchiCegarLoop]: Abstraction has 1100 states and 1596 transitions. [2025-02-06 20:04:13,730 INFO L338 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2025-02-06 20:04:13,730 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1100 states and 1596 transitions. [2025-02-06 20:04:13,731 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 681 [2025-02-06 20:04:13,732 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:04:13,732 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:04:13,732 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:04:13,732 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:04:13,732 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:04:13,733 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise193#1 := 0;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise194#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise196#1 := main_~_hj_i~1#1;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:04:13,733 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:04:13,733 INFO L85 PathProgramCache]: Analyzing trace with hash 62528, now seen corresponding path program 14 times [2025-02-06 20:04:13,733 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:04:13,733 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [523655032] [2025-02-06 20:04:13,733 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 20:04:13,733 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:04:13,741 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:04:13,743 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:04:13,743 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 20:04:13,744 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:04:13,744 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:04:13,747 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:04:13,748 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:04:13,748 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:04:13,748 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:04:13,755 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:04:13,756 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:04:13,756 INFO L85 PathProgramCache]: Analyzing trace with hash -1137101819, now seen corresponding path program 1 times [2025-02-06 20:04:13,756 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:04:13,756 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1670876121] [2025-02-06 20:04:13,756 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:04:13,756 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:04:13,780 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 81 statements into 1 equivalence classes. [2025-02-06 20:04:13,794 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 81 of 81 statements. [2025-02-06 20:04:13,794 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:04:13,794 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:04:14,071 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:04:14,072 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:04:14,072 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1670876121] [2025-02-06 20:04:14,072 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1670876121] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:04:14,072 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:04:14,072 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-02-06 20:04:14,072 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1394549757] [2025-02-06 20:04:14,072 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:04:14,073 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:04:14,073 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:04:14,073 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-02-06 20:04:14,073 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2025-02-06 20:04:14,073 INFO L87 Difference]: Start difference. First operand 1100 states and 1596 transitions. cyclomatic complexity: 506 Second operand has 10 states, 10 states have (on average 8.1) internal successors, (81), 10 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:04:15,114 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:04:15,114 INFO L93 Difference]: Finished difference Result 1113 states and 1613 transitions. [2025-02-06 20:04:15,114 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1113 states and 1613 transitions. [2025-02-06 20:04:15,117 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 694 [2025-02-06 20:04:15,121 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1113 states to 1113 states and 1613 transitions. [2025-02-06 20:04:15,121 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1113 [2025-02-06 20:04:15,121 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1113 [2025-02-06 20:04:15,121 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1113 states and 1613 transitions. [2025-02-06 20:04:15,122 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:04:15,122 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1113 states and 1613 transitions. [2025-02-06 20:04:15,123 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1113 states and 1613 transitions. [2025-02-06 20:04:15,138 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1113 to 1100. [2025-02-06 20:04:15,143 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1100 states, 1093 states have (on average 1.4483074107959744) internal successors, (1583), 1092 states have internal predecessors, (1583), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:04:15,144 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1100 states to 1100 states and 1595 transitions. [2025-02-06 20:04:15,144 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1100 states and 1595 transitions. [2025-02-06 20:04:15,145 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-02-06 20:04:15,146 INFO L432 stractBuchiCegarLoop]: Abstraction has 1100 states and 1595 transitions. [2025-02-06 20:04:15,149 INFO L338 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2025-02-06 20:04:15,149 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1100 states and 1595 transitions. [2025-02-06 20:04:15,151 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 681 [2025-02-06 20:04:15,151 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:04:15,151 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:04:15,152 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:04:15,152 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:04:15,152 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:04:15,152 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise193#1;assume main_#t~bitwise193#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise194#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:04:15,153 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:04:15,153 INFO L85 PathProgramCache]: Analyzing trace with hash 62528, now seen corresponding path program 15 times [2025-02-06 20:04:15,153 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:04:15,154 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1980873645] [2025-02-06 20:04:15,154 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 20:04:15,155 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:04:15,167 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:04:15,169 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:04:15,169 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-06 20:04:15,169 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:04:15,169 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:04:15,174 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:04:15,175 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:04:15,175 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:04:15,175 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:04:15,181 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:04:15,182 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:04:15,182 INFO L85 PathProgramCache]: Analyzing trace with hash -1439893312, now seen corresponding path program 1 times [2025-02-06 20:04:15,182 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:04:15,182 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1620316885] [2025-02-06 20:04:15,182 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:04:15,182 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:04:15,212 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 81 statements into 1 equivalence classes. [2025-02-06 20:04:15,272 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 81 of 81 statements. [2025-02-06 20:04:15,272 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:04:15,272 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:04:15,488 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:04:15,488 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:04:15,488 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1620316885] [2025-02-06 20:04:15,488 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1620316885] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:04:15,488 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:04:15,488 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-02-06 20:04:15,488 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1442179625] [2025-02-06 20:04:15,488 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:04:15,489 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:04:15,489 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:04:15,489 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-06 20:04:15,489 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-02-06 20:04:15,489 INFO L87 Difference]: Start difference. First operand 1100 states and 1595 transitions. cyclomatic complexity: 505 Second operand has 7 states, 7 states have (on average 11.571428571428571) internal successors, (81), 7 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:04:16,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:04:16,327 INFO L93 Difference]: Finished difference Result 1106 states and 1600 transitions. [2025-02-06 20:04:16,327 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1106 states and 1600 transitions. [2025-02-06 20:04:16,329 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 687 [2025-02-06 20:04:16,332 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1106 states to 1106 states and 1600 transitions. [2025-02-06 20:04:16,332 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1106 [2025-02-06 20:04:16,333 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1106 [2025-02-06 20:04:16,333 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1106 states and 1600 transitions. [2025-02-06 20:04:16,334 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:04:16,334 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1106 states and 1600 transitions. [2025-02-06 20:04:16,335 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1106 states and 1600 transitions. [2025-02-06 20:04:16,341 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1106 to 1100. [2025-02-06 20:04:16,342 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1100 states, 1093 states have (on average 1.4473924977127173) internal successors, (1582), 1092 states have internal predecessors, (1582), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:04:16,344 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1100 states to 1100 states and 1594 transitions. [2025-02-06 20:04:16,344 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1100 states and 1594 transitions. [2025-02-06 20:04:16,347 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-02-06 20:04:16,348 INFO L432 stractBuchiCegarLoop]: Abstraction has 1100 states and 1594 transitions. [2025-02-06 20:04:16,348 INFO L338 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2025-02-06 20:04:16,348 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1100 states and 1594 transitions. [2025-02-06 20:04:16,350 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 681 [2025-02-06 20:04:16,351 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:04:16,351 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:04:16,351 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:04:16,351 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:04:16,351 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:04:16,351 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise194#1;assume main_#t~bitwise194#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise196#1 := main_~_hj_i~1#1;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:04:16,352 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:04:16,352 INFO L85 PathProgramCache]: Analyzing trace with hash 62528, now seen corresponding path program 16 times [2025-02-06 20:04:16,352 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:04:16,352 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [752173035] [2025-02-06 20:04:16,352 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 20:04:16,352 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:04:16,360 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-02-06 20:04:16,366 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:04:16,366 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-06 20:04:16,366 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:04:16,366 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:04:16,371 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:04:16,372 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:04:16,372 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:04:16,372 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:04:16,381 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:04:16,382 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:04:16,382 INFO L85 PathProgramCache]: Analyzing trace with hash -243318222, now seen corresponding path program 1 times [2025-02-06 20:04:16,382 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:04:16,382 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1001600124] [2025-02-06 20:04:16,382 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:04:16,382 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:04:16,407 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 81 statements into 1 equivalence classes. [2025-02-06 20:04:16,454 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 81 of 81 statements. [2025-02-06 20:04:16,454 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:04:16,454 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:04:17,026 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:04:17,026 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:04:17,026 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1001600124] [2025-02-06 20:04:17,026 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1001600124] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:04:17,026 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:04:17,027 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-02-06 20:04:17,027 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2072157768] [2025-02-06 20:04:17,027 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:04:17,027 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:04:17,027 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:04:17,027 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-02-06 20:04:17,027 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2025-02-06 20:04:17,027 INFO L87 Difference]: Start difference. First operand 1100 states and 1594 transitions. cyclomatic complexity: 504 Second operand has 9 states, 9 states have (on average 9.0) internal successors, (81), 9 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:04:18,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:04:18,386 INFO L93 Difference]: Finished difference Result 1107 states and 1601 transitions. [2025-02-06 20:04:18,386 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1107 states and 1601 transitions. [2025-02-06 20:04:18,388 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 688 [2025-02-06 20:04:18,391 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1107 states to 1107 states and 1601 transitions. [2025-02-06 20:04:18,391 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1107 [2025-02-06 20:04:18,392 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1107 [2025-02-06 20:04:18,392 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1107 states and 1601 transitions. [2025-02-06 20:04:18,392 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:04:18,393 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1107 states and 1601 transitions. [2025-02-06 20:04:18,393 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1107 states and 1601 transitions. [2025-02-06 20:04:18,399 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1107 to 1100. [2025-02-06 20:04:18,400 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1100 states, 1093 states have (on average 1.4464775846294602) internal successors, (1581), 1092 states have internal predecessors, (1581), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:04:18,402 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1100 states to 1100 states and 1593 transitions. [2025-02-06 20:04:18,402 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1100 states and 1593 transitions. [2025-02-06 20:04:18,402 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-02-06 20:04:18,402 INFO L432 stractBuchiCegarLoop]: Abstraction has 1100 states and 1593 transitions. [2025-02-06 20:04:18,402 INFO L338 stractBuchiCegarLoop]: ======== Iteration 17 ============ [2025-02-06 20:04:18,402 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1100 states and 1593 transitions. [2025-02-06 20:04:18,404 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 681 [2025-02-06 20:04:18,404 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:04:18,404 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:04:18,405 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:04:18,405 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:04:18,405 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:04:18,405 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise194#1;assume main_#t~bitwise194#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume !(0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_ha_hashv~1#1 % 4294967296 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := 0;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:04:18,405 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:04:18,406 INFO L85 PathProgramCache]: Analyzing trace with hash 62528, now seen corresponding path program 17 times [2025-02-06 20:04:18,406 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:04:18,406 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1728366109] [2025-02-06 20:04:18,406 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-06 20:04:18,406 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:04:18,413 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:04:18,414 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:04:18,414 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 20:04:18,414 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:04:18,414 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:04:18,416 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:04:18,417 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:04:18,417 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:04:18,417 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:04:18,421 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:04:18,421 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:04:18,421 INFO L85 PathProgramCache]: Analyzing trace with hash 497567350, now seen corresponding path program 1 times [2025-02-06 20:04:18,421 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:04:18,421 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [995802527] [2025-02-06 20:04:18,421 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:04:18,421 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:04:18,448 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 81 statements into 1 equivalence classes. [2025-02-06 20:04:18,580 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 81 of 81 statements. [2025-02-06 20:04:18,581 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:04:18,581 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:04:19,006 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:04:19,007 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:04:19,007 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [995802527] [2025-02-06 20:04:19,007 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [995802527] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:04:19,007 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:04:19,007 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2025-02-06 20:04:19,007 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [626314046] [2025-02-06 20:04:19,007 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:04:19,007 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:04:19,007 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:04:19,007 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-02-06 20:04:19,007 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=123, Unknown=0, NotChecked=0, Total=156 [2025-02-06 20:04:19,007 INFO L87 Difference]: Start difference. First operand 1100 states and 1593 transitions. cyclomatic complexity: 503 Second operand has 13 states, 13 states have (on average 6.230769230769231) internal successors, (81), 13 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:04:20,297 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:04:20,298 INFO L93 Difference]: Finished difference Result 1154 states and 1672 transitions. [2025-02-06 20:04:20,298 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1154 states and 1672 transitions. [2025-02-06 20:04:20,300 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 735 [2025-02-06 20:04:20,304 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1154 states to 1154 states and 1672 transitions. [2025-02-06 20:04:20,304 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1154 [2025-02-06 20:04:20,305 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1154 [2025-02-06 20:04:20,305 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1154 states and 1672 transitions. [2025-02-06 20:04:20,306 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:04:20,306 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1154 states and 1672 transitions. [2025-02-06 20:04:20,307 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1154 states and 1672 transitions. [2025-02-06 20:04:20,314 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1154 to 1108. [2025-02-06 20:04:20,315 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1108 states, 1101 states have (on average 1.4459582198001817) internal successors, (1592), 1100 states have internal predecessors, (1592), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:04:20,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1108 states to 1108 states and 1604 transitions. [2025-02-06 20:04:20,317 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1108 states and 1604 transitions. [2025-02-06 20:04:20,321 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-02-06 20:04:20,321 INFO L432 stractBuchiCegarLoop]: Abstraction has 1108 states and 1604 transitions. [2025-02-06 20:04:20,321 INFO L338 stractBuchiCegarLoop]: ======== Iteration 18 ============ [2025-02-06 20:04:20,321 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1108 states and 1604 transitions. [2025-02-06 20:04:20,324 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 689 [2025-02-06 20:04:20,324 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:04:20,324 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:04:20,324 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:04:20,324 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:04:20,325 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:04:20,325 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise194#1;assume main_#t~bitwise194#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume !(0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~1#1 % 4294967296 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise195#1;assume main_#t~bitwise195#1 % 4294967296 <= main_~_ha_hashv~1#1 % 4294967296 + main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:04:20,325 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:04:20,325 INFO L85 PathProgramCache]: Analyzing trace with hash 62528, now seen corresponding path program 18 times [2025-02-06 20:04:20,326 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:04:20,326 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [244996305] [2025-02-06 20:04:20,326 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-06 20:04:20,326 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:04:20,334 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:04:20,336 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:04:20,336 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-02-06 20:04:20,336 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:04:20,336 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:04:20,338 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:04:20,339 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:04:20,339 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:04:20,339 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:04:20,345 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:04:20,345 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:04:20,346 INFO L85 PathProgramCache]: Analyzing trace with hash -991628552, now seen corresponding path program 1 times [2025-02-06 20:04:20,346 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:04:20,346 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1771555633] [2025-02-06 20:04:20,346 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:04:20,346 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:04:20,382 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 82 statements into 1 equivalence classes. [2025-02-06 20:04:20,517 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 82 of 82 statements. [2025-02-06 20:04:20,518 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:04:20,518 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:04:21,300 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:04:21,301 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:04:21,301 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1771555633] [2025-02-06 20:04:21,301 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1771555633] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:04:21,301 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:04:21,301 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2025-02-06 20:04:21,302 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [634978490] [2025-02-06 20:04:21,302 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:04:21,303 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:04:21,303 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:04:21,303 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2025-02-06 20:04:21,304 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=265, Unknown=0, NotChecked=0, Total=306 [2025-02-06 20:04:21,304 INFO L87 Difference]: Start difference. First operand 1108 states and 1604 transitions. cyclomatic complexity: 506 Second operand has 18 states, 18 states have (on average 4.555555555555555) internal successors, (82), 18 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:04:24,979 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:04:24,980 INFO L93 Difference]: Finished difference Result 1220 states and 1765 transitions. [2025-02-06 20:04:24,980 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1220 states and 1765 transitions. [2025-02-06 20:04:24,983 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 801 [2025-02-06 20:04:24,986 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1220 states to 1220 states and 1765 transitions. [2025-02-06 20:04:24,987 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1220 [2025-02-06 20:04:24,987 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1220 [2025-02-06 20:04:24,988 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1220 states and 1765 transitions. [2025-02-06 20:04:24,988 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:04:24,988 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1220 states and 1765 transitions. [2025-02-06 20:04:24,989 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1220 states and 1765 transitions. [2025-02-06 20:04:24,994 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1220 to 1121. [2025-02-06 20:04:24,996 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1121 states, 1114 states have (on average 1.44524236983842) internal successors, (1610), 1113 states have internal predecessors, (1610), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:04:24,997 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1121 states to 1121 states and 1622 transitions. [2025-02-06 20:04:24,997 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1121 states and 1622 transitions. [2025-02-06 20:04:24,999 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2025-02-06 20:04:24,999 INFO L432 stractBuchiCegarLoop]: Abstraction has 1121 states and 1622 transitions. [2025-02-06 20:04:24,999 INFO L338 stractBuchiCegarLoop]: ======== Iteration 19 ============ [2025-02-06 20:04:24,999 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1121 states and 1622 transitions. [2025-02-06 20:04:25,001 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 702 [2025-02-06 20:04:25,001 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:04:25,001 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:04:25,002 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:04:25,002 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:04:25,002 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:04:25,002 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise194#1;assume main_#t~bitwise194#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume !(0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_ha_hashv~1#1 % 4294967296 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := 0;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 32 % 4294967296;main_#t~bitwise198#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:04:25,002 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:04:25,003 INFO L85 PathProgramCache]: Analyzing trace with hash 62528, now seen corresponding path program 19 times [2025-02-06 20:04:25,003 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:04:25,003 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [945501009] [2025-02-06 20:04:25,003 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-02-06 20:04:25,003 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:04:25,012 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:04:25,013 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:04:25,013 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:04:25,013 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:04:25,013 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:04:25,016 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:04:25,016 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:04:25,017 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:04:25,017 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:04:25,022 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:04:25,023 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:04:25,023 INFO L85 PathProgramCache]: Analyzing trace with hash 719382844, now seen corresponding path program 1 times [2025-02-06 20:04:25,023 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:04:25,023 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1703132433] [2025-02-06 20:04:25,023 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:04:25,023 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:04:25,047 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 82 statements into 1 equivalence classes. [2025-02-06 20:04:25,112 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 82 of 82 statements. [2025-02-06 20:04:25,112 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:04:25,112 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:04:25,899 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:04:25,899 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:04:25,900 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1703132433] [2025-02-06 20:04:25,900 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1703132433] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:04:25,900 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:04:25,900 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2025-02-06 20:04:25,900 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1967783577] [2025-02-06 20:04:25,900 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:04:25,901 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:04:25,901 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:04:25,901 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2025-02-06 20:04:25,901 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=235, Unknown=0, NotChecked=0, Total=272 [2025-02-06 20:04:25,901 INFO L87 Difference]: Start difference. First operand 1121 states and 1622 transitions. cyclomatic complexity: 511 Second operand has 17 states, 17 states have (on average 4.823529411764706) internal successors, (82), 17 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:04:28,305 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:04:28,306 INFO L93 Difference]: Finished difference Result 1139 states and 1649 transitions. [2025-02-06 20:04:28,306 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1139 states and 1649 transitions. [2025-02-06 20:04:28,308 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 720 [2025-02-06 20:04:28,317 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1139 states to 1139 states and 1649 transitions. [2025-02-06 20:04:28,317 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1139 [2025-02-06 20:04:28,318 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1139 [2025-02-06 20:04:28,318 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1139 states and 1649 transitions. [2025-02-06 20:04:28,318 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:04:28,318 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1139 states and 1649 transitions. [2025-02-06 20:04:28,319 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1139 states and 1649 transitions. [2025-02-06 20:04:28,324 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1139 to 1126. [2025-02-06 20:04:28,330 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1126 states, 1119 states have (on average 1.4450402144772119) internal successors, (1617), 1118 states have internal predecessors, (1617), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:04:28,331 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1126 states to 1126 states and 1629 transitions. [2025-02-06 20:04:28,331 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1126 states and 1629 transitions. [2025-02-06 20:04:28,331 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2025-02-06 20:04:28,332 INFO L432 stractBuchiCegarLoop]: Abstraction has 1126 states and 1629 transitions. [2025-02-06 20:04:28,332 INFO L338 stractBuchiCegarLoop]: ======== Iteration 20 ============ [2025-02-06 20:04:28,332 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1126 states and 1629 transitions. [2025-02-06 20:04:28,334 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 707 [2025-02-06 20:04:28,334 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:04:28,334 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:04:28,334 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:04:28,334 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:04:28,334 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:04:28,335 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise194#1;assume main_#t~bitwise194#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume !(0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_ha_hashv~1#1 % 4294967296 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := 0;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 65536 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise197#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:04:28,335 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:04:28,335 INFO L85 PathProgramCache]: Analyzing trace with hash 62528, now seen corresponding path program 20 times [2025-02-06 20:04:28,335 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:04:28,335 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1828169720] [2025-02-06 20:04:28,335 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 20:04:28,335 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:04:28,343 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:04:28,345 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:04:28,345 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 20:04:28,345 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:04:28,345 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:04:28,347 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:04:28,347 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:04:28,347 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:04:28,347 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:04:28,352 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:04:28,352 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:04:28,352 INFO L85 PathProgramCache]: Analyzing trace with hash -961602013, now seen corresponding path program 1 times [2025-02-06 20:04:28,352 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:04:28,353 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2137290530] [2025-02-06 20:04:28,353 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:04:28,353 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:04:28,378 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 82 statements into 1 equivalence classes. [2025-02-06 20:04:28,447 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 82 of 82 statements. [2025-02-06 20:04:28,447 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:04:28,447 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:04:28,874 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:04:28,874 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:04:28,874 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2137290530] [2025-02-06 20:04:28,874 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2137290530] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:04:28,874 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:04:28,874 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2025-02-06 20:04:28,875 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [523605501] [2025-02-06 20:04:28,875 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:04:28,875 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:04:28,875 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:04:28,875 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-02-06 20:04:28,876 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2025-02-06 20:04:28,876 INFO L87 Difference]: Start difference. First operand 1126 states and 1629 transitions. cyclomatic complexity: 513 Second operand has 13 states, 13 states have (on average 6.3076923076923075) internal successors, (82), 13 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:04:30,368 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:04:30,368 INFO L93 Difference]: Finished difference Result 1136 states and 1642 transitions. [2025-02-06 20:04:30,369 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1136 states and 1642 transitions. [2025-02-06 20:04:30,371 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 717 [2025-02-06 20:04:30,378 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1136 states to 1136 states and 1642 transitions. [2025-02-06 20:04:30,378 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1136 [2025-02-06 20:04:30,383 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1136 [2025-02-06 20:04:30,383 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1136 states and 1642 transitions. [2025-02-06 20:04:30,384 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:04:30,384 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1136 states and 1642 transitions. [2025-02-06 20:04:30,390 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1136 states and 1642 transitions. [2025-02-06 20:04:30,401 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1136 to 1131. [2025-02-06 20:04:30,407 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1131 states, 1124 states have (on average 1.4448398576512456) internal successors, (1624), 1123 states have internal predecessors, (1624), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:04:30,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1131 states to 1131 states and 1636 transitions. [2025-02-06 20:04:30,411 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1131 states and 1636 transitions. [2025-02-06 20:04:30,411 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-02-06 20:04:30,412 INFO L432 stractBuchiCegarLoop]: Abstraction has 1131 states and 1636 transitions. [2025-02-06 20:04:30,412 INFO L338 stractBuchiCegarLoop]: ======== Iteration 21 ============ [2025-02-06 20:04:30,412 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1131 states and 1636 transitions. [2025-02-06 20:04:30,414 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 712 [2025-02-06 20:04:30,414 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:04:30,414 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:04:30,415 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:04:30,415 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:04:30,415 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:04:30,416 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise194#1;assume main_#t~bitwise194#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume !(0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_ha_hashv~1#1 % 4294967296 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := 0;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise196#1 := main_~_hj_i~1#1;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:04:30,416 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:04:30,416 INFO L85 PathProgramCache]: Analyzing trace with hash 62528, now seen corresponding path program 21 times [2025-02-06 20:04:30,416 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:04:30,416 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [577962453] [2025-02-06 20:04:30,416 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 20:04:30,416 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:04:30,425 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:04:30,426 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:04:30,426 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-06 20:04:30,426 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:04:30,427 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:04:30,430 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:04:30,431 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:04:30,431 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:04:30,431 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:04:30,437 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:04:30,437 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:04:30,437 INFO L85 PathProgramCache]: Analyzing trace with hash -1480346294, now seen corresponding path program 1 times [2025-02-06 20:04:30,438 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:04:30,438 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1392767136] [2025-02-06 20:04:30,438 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:04:30,438 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:04:30,462 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 82 statements into 1 equivalence classes. [2025-02-06 20:04:30,588 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 82 of 82 statements. [2025-02-06 20:04:30,588 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:04:30,588 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:04:30,882 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:04:30,883 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:04:30,883 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1392767136] [2025-02-06 20:04:30,883 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1392767136] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:04:30,883 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:04:30,883 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-02-06 20:04:30,883 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [439559996] [2025-02-06 20:04:30,883 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:04:30,883 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:04:30,887 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:04:30,888 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-02-06 20:04:30,888 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2025-02-06 20:04:30,888 INFO L87 Difference]: Start difference. First operand 1131 states and 1636 transitions. cyclomatic complexity: 515 Second operand has 8 states, 8 states have (on average 10.25) internal successors, (82), 8 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:04:43,351 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 12.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=false, quantifiers [] [2025-02-06 20:04:43,679 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:04:43,679 INFO L93 Difference]: Finished difference Result 1227 states and 1772 transitions. [2025-02-06 20:04:43,679 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1227 states and 1772 transitions. [2025-02-06 20:04:43,682 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 808 [2025-02-06 20:04:43,687 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1227 states to 1227 states and 1772 transitions. [2025-02-06 20:04:43,687 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1227 [2025-02-06 20:04:43,688 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1227 [2025-02-06 20:04:43,688 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1227 states and 1772 transitions. [2025-02-06 20:04:43,689 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:04:43,689 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1227 states and 1772 transitions. [2025-02-06 20:04:43,690 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1227 states and 1772 transitions. [2025-02-06 20:04:43,696 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1227 to 1137. [2025-02-06 20:04:43,697 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1137 states, 1130 states have (on average 1.4442477876106194) internal successors, (1632), 1129 states have internal predecessors, (1632), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:04:43,698 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1137 states to 1137 states and 1644 transitions. [2025-02-06 20:04:43,698 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1137 states and 1644 transitions. [2025-02-06 20:04:43,699 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-02-06 20:04:43,699 INFO L432 stractBuchiCegarLoop]: Abstraction has 1137 states and 1644 transitions. [2025-02-06 20:04:43,699 INFO L338 stractBuchiCegarLoop]: ======== Iteration 22 ============ [2025-02-06 20:04:43,699 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1137 states and 1644 transitions. [2025-02-06 20:04:43,701 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 718 [2025-02-06 20:04:43,702 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:04:43,703 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:04:43,703 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:04:43,703 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:04:43,703 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:04:43,703 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise193#1 := 0;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise194#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume !(0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~1#1 % 4294967296 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise195#1;assume main_#t~bitwise195#1 % 4294967296 <= main_~_ha_hashv~1#1 % 4294967296 + main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:04:43,704 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:04:43,704 INFO L85 PathProgramCache]: Analyzing trace with hash 62528, now seen corresponding path program 22 times [2025-02-06 20:04:43,704 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:04:43,704 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [791269241] [2025-02-06 20:04:43,704 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 20:04:43,704 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:04:43,714 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-02-06 20:04:43,715 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:04:43,715 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-06 20:04:43,716 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:04:43,716 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:04:43,718 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:04:43,719 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:04:43,719 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:04:43,719 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:04:43,723 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:04:43,724 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:04:43,724 INFO L85 PathProgramCache]: Analyzing trace with hash 1365851013, now seen corresponding path program 1 times [2025-02-06 20:04:43,724 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:04:43,725 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1786184911] [2025-02-06 20:04:43,725 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:04:43,725 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:04:43,748 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 82 statements into 1 equivalence classes. [2025-02-06 20:04:43,831 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 82 of 82 statements. [2025-02-06 20:04:43,832 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:04:43,832 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:04:44,109 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:04:44,109 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:04:44,109 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1786184911] [2025-02-06 20:04:44,109 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1786184911] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:04:44,110 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:04:44,110 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-02-06 20:04:44,110 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [746843499] [2025-02-06 20:04:44,110 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:04:44,111 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:04:44,111 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:04:44,111 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-02-06 20:04:44,111 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2025-02-06 20:04:44,111 INFO L87 Difference]: Start difference. First operand 1137 states and 1644 transitions. cyclomatic complexity: 517 Second operand has 10 states, 10 states have (on average 8.2) internal successors, (82), 10 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:04:45,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:04:45,386 INFO L93 Difference]: Finished difference Result 1149 states and 1661 transitions. [2025-02-06 20:04:45,386 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1149 states and 1661 transitions. [2025-02-06 20:04:45,389 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 730 [2025-02-06 20:04:45,391 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1149 states to 1149 states and 1661 transitions. [2025-02-06 20:04:45,391 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1149 [2025-02-06 20:04:45,392 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1149 [2025-02-06 20:04:45,392 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1149 states and 1661 transitions. [2025-02-06 20:04:45,393 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:04:45,393 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1149 states and 1661 transitions. [2025-02-06 20:04:45,394 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1149 states and 1661 transitions. [2025-02-06 20:04:45,399 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1149 to 1141. [2025-02-06 20:04:45,400 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1141 states, 1134 states have (on average 1.443562610229277) internal successors, (1637), 1133 states have internal predecessors, (1637), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:04:45,401 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1141 states to 1141 states and 1649 transitions. [2025-02-06 20:04:45,401 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1141 states and 1649 transitions. [2025-02-06 20:04:45,402 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-02-06 20:04:45,402 INFO L432 stractBuchiCegarLoop]: Abstraction has 1141 states and 1649 transitions. [2025-02-06 20:04:45,402 INFO L338 stractBuchiCegarLoop]: ======== Iteration 23 ============ [2025-02-06 20:04:45,402 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1141 states and 1649 transitions. [2025-02-06 20:04:45,404 INFO L131 ngComponentsAnalysis]: Automaton has 10 accepting balls. 722 [2025-02-06 20:04:45,404 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:04:45,404 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:04:45,405 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:04:45,405 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:04:45,405 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:04:45,405 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise193#1;assume main_#t~bitwise193#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise194#1;assume main_#t~bitwise194#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:04:45,406 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:04:45,406 INFO L85 PathProgramCache]: Analyzing trace with hash 62528, now seen corresponding path program 23 times [2025-02-06 20:04:45,406 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:04:45,406 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1913978139] [2025-02-06 20:04:45,406 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-06 20:04:45,406 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:04:45,416 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:04:45,418 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:04:45,418 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 20:04:45,418 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:04:45,418 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:04:45,421 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:04:45,425 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:04:45,425 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:04:45,425 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:04:45,430 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:04:45,431 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:04:45,431 INFO L85 PathProgramCache]: Analyzing trace with hash -1062115753, now seen corresponding path program 1 times [2025-02-06 20:04:45,431 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:04:45,431 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1941728838] [2025-02-06 20:04:45,431 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:04:45,431 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:04:45,458 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 82 statements into 1 equivalence classes. [2025-02-06 20:04:45,553 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 82 of 82 statements. [2025-02-06 20:04:45,553 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:04:45,553 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:04:57,814 WARN L286 SmtUtils]: Spent 12.00s on a formula simplification that was a NOOP. DAG size: 10 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2025-02-06 20:05:09,826 WARN L286 SmtUtils]: Spent 12.01s on a formula simplification that was a NOOP. DAG size: 32 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify) [2025-02-06 20:05:21,856 WARN L851 $PredicateComparison]: unable to prove that (let ((.cse2 (* (div |c_ULTIMATE.start_main_~_hj_j~1#1| 4294967296) 524288))) (let ((.cse1 (+ |c_ULTIMATE.start_main_~_ha_hashv~1#1| .cse2)) (.cse0 (div |c_ULTIMATE.start_main_~_hj_j~1#1| 8192))) (and (= .cse0 .cse1) (or (< .cse1 (+ (mod |c_ULTIMATE.start_main_~_hj_i~1#1| 4294967296) .cse0)) (< 4408680405129836980 (+ (* 2147483648 (div |c_ULTIMATE.start_main_~_hj_i~1#1| 4294967296)) (* |c_ULTIMATE.start_main_~_hj_j~1#1| 2061579059) (* 1030789530 |c_ULTIMATE.start_main_~_ha_hashv~1#1|) (* (div (+ (* (- 1) .cse0) (* (- 2061579059) |c_ULTIMATE.start_main_~_hj_i~1#1|) (* (- 2061579059) |c_ULTIMATE.start_main_~_ha_hashv~1#1|) 8817360810260198248 (* (- 4123158118) |c_ULTIMATE.start_main_~_hj_j~1#1|) .cse2) 4294967296) 2147483648) (* 1030789529 |c_ULTIMATE.start_main_~_hj_i~1#1|))))))) is different from false