./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test10-3.i --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version c00e63dc Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test10-3.i -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash fa6de94809ad211882523114a33a27b3a82ed66d6bff27089fdf2c6fcaa93aae --- Real Ultimate output --- This is Ultimate 0.3.0-?-c00e63d-m [2025-02-06 20:23:08,740 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-02-06 20:23:08,820 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2025-02-06 20:23:08,828 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-02-06 20:23:08,828 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-02-06 20:23:08,828 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-02-06 20:23:08,860 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-02-06 20:23:08,861 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-02-06 20:23:08,861 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-02-06 20:23:08,862 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-02-06 20:23:08,862 INFO L153 SettingsManager]: * Use memory slicer=true [2025-02-06 20:23:08,863 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-02-06 20:23:08,863 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-02-06 20:23:08,863 INFO L153 SettingsManager]: * Use SBE=true [2025-02-06 20:23:08,863 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-02-06 20:23:08,864 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-02-06 20:23:08,864 INFO L153 SettingsManager]: * Use old map elimination=false [2025-02-06 20:23:08,864 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-02-06 20:23:08,864 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-02-06 20:23:08,864 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-02-06 20:23:08,864 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-02-06 20:23:08,864 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-02-06 20:23:08,864 INFO L153 SettingsManager]: * sizeof long=4 [2025-02-06 20:23:08,864 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-02-06 20:23:08,864 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-02-06 20:23:08,865 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-02-06 20:23:08,865 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-02-06 20:23:08,865 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-02-06 20:23:08,865 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-02-06 20:23:08,865 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-02-06 20:23:08,865 INFO L153 SettingsManager]: * sizeof long double=12 [2025-02-06 20:23:08,865 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-02-06 20:23:08,865 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-02-06 20:23:08,865 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-02-06 20:23:08,865 INFO L153 SettingsManager]: * Use constant arrays=true [2025-02-06 20:23:08,866 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-02-06 20:23:08,866 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-02-06 20:23:08,866 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-02-06 20:23:08,866 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-02-06 20:23:08,867 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-02-06 20:23:08,867 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> fa6de94809ad211882523114a33a27b3a82ed66d6bff27089fdf2c6fcaa93aae [2025-02-06 20:23:09,167 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-02-06 20:23:09,174 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-02-06 20:23:09,178 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-02-06 20:23:09,179 INFO L270 PluginConnector]: Initializing CDTParser... [2025-02-06 20:23:09,179 INFO L274 PluginConnector]: CDTParser initialized [2025-02-06 20:23:09,181 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test10-3.i [2025-02-06 20:23:10,513 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/f227ce18b/5acf03f8f5ba4c8b8b00dad9e93a37fd/FLAG8f5bd15e9 [2025-02-06 20:23:10,880 INFO L384 CDTParser]: Found 1 translation units. [2025-02-06 20:23:10,883 INFO L180 CDTParser]: Scanning /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/uthash-2.0.2/uthash_SFH_test10-3.i [2025-02-06 20:23:10,902 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/f227ce18b/5acf03f8f5ba4c8b8b00dad9e93a37fd/FLAG8f5bd15e9 [2025-02-06 20:23:10,919 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/f227ce18b/5acf03f8f5ba4c8b8b00dad9e93a37fd [2025-02-06 20:23:10,922 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-02-06 20:23:10,924 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-02-06 20:23:10,925 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-02-06 20:23:10,925 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-02-06 20:23:10,929 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-02-06 20:23:10,930 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.02 08:23:10" (1/1) ... [2025-02-06 20:23:10,932 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@23629fdd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 08:23:10, skipping insertion in model container [2025-02-06 20:23:10,932 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 06.02 08:23:10" (1/1) ... [2025-02-06 20:23:10,976 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-02-06 20:23:11,710 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-06 20:23:11,725 INFO L200 MainTranslator]: Completed pre-run [2025-02-06 20:23:11,897 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-06 20:23:11,936 INFO L204 MainTranslator]: Completed translation [2025-02-06 20:23:11,937 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 08:23:11 WrapperNode [2025-02-06 20:23:11,937 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-02-06 20:23:11,938 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-02-06 20:23:11,938 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-02-06 20:23:11,938 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-02-06 20:23:11,943 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 08:23:11" (1/1) ... [2025-02-06 20:23:11,977 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 08:23:11" (1/1) ... [2025-02-06 20:23:12,093 INFO L138 Inliner]: procedures = 177, calls = 606, calls flagged for inlining = 11, calls inlined = 38, statements flattened = 3807 [2025-02-06 20:23:12,094 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-02-06 20:23:12,094 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-02-06 20:23:12,094 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-02-06 20:23:12,094 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-02-06 20:23:12,102 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 08:23:11" (1/1) ... [2025-02-06 20:23:12,103 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 08:23:11" (1/1) ... [2025-02-06 20:23:12,133 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 08:23:11" (1/1) ... [2025-02-06 20:23:12,340 INFO L175 MemorySlicer]: Split 574 memory accesses to 3 slices as follows [2, 106, 466]. 81 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2, 0, 0]. The 102 writes are split as follows [0, 4, 98]. [2025-02-06 20:23:12,341 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 08:23:11" (1/1) ... [2025-02-06 20:23:12,341 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 08:23:11" (1/1) ... [2025-02-06 20:23:12,408 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 08:23:11" (1/1) ... [2025-02-06 20:23:12,413 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 08:23:11" (1/1) ... [2025-02-06 20:23:12,422 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 08:23:11" (1/1) ... [2025-02-06 20:23:12,429 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 08:23:11" (1/1) ... [2025-02-06 20:23:12,445 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-02-06 20:23:12,448 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-02-06 20:23:12,448 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-02-06 20:23:12,448 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-02-06 20:23:12,449 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 08:23:11" (1/1) ... [2025-02-06 20:23:12,454 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-06 20:23:12,467 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-06 20:23:12,484 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-06 20:23:12,490 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-02-06 20:23:12,512 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2025-02-06 20:23:12,512 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2025-02-06 20:23:12,512 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#2 [2025-02-06 20:23:12,513 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2025-02-06 20:23:12,513 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2025-02-06 20:23:12,513 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#2 [2025-02-06 20:23:12,513 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#0 [2025-02-06 20:23:12,513 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#1 [2025-02-06 20:23:12,513 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#2 [2025-02-06 20:23:12,513 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#0 [2025-02-06 20:23:12,513 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#1 [2025-02-06 20:23:12,513 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#2 [2025-02-06 20:23:12,513 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2025-02-06 20:23:12,514 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-02-06 20:23:12,514 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#0 [2025-02-06 20:23:12,514 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#1 [2025-02-06 20:23:12,514 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#2 [2025-02-06 20:23:12,514 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2025-02-06 20:23:12,514 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#0 [2025-02-06 20:23:12,514 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#1 [2025-02-06 20:23:12,515 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#2 [2025-02-06 20:23:12,515 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2025-02-06 20:23:12,515 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-02-06 20:23:12,515 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2025-02-06 20:23:12,515 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#2 [2025-02-06 20:23:12,515 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-02-06 20:23:12,515 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-02-06 20:23:12,862 INFO L257 CfgBuilder]: Building ICFG [2025-02-06 20:23:12,864 INFO L287 CfgBuilder]: Building CFG for each procedure with an implementation [2025-02-06 20:23:15,948 INFO L1309 $ProcedureCfgBuilder]: dead code at ProgramPoint L731: call ULTIMATE.dealloc(main_~#i~0#1.base, main_~#i~0#1.offset);havoc main_~#i~0#1.base, main_~#i~0#1.offset; [2025-02-06 20:23:16,229 INFO L? ?]: Removed 934 outVars from TransFormulas that were not future-live. [2025-02-06 20:23:16,229 INFO L308 CfgBuilder]: Performing block encoding [2025-02-06 20:23:16,340 INFO L332 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-02-06 20:23:16,340 INFO L337 CfgBuilder]: Removed 2 assume(true) statements. [2025-02-06 20:23:16,340 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 06.02 08:23:16 BoogieIcfgContainer [2025-02-06 20:23:16,340 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-02-06 20:23:16,341 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-02-06 20:23:16,341 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-02-06 20:23:16,348 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-02-06 20:23:16,349 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-06 20:23:16,349 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 06.02 08:23:10" (1/3) ... [2025-02-06 20:23:16,350 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@29e16c72 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.02 08:23:16, skipping insertion in model container [2025-02-06 20:23:16,350 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-06 20:23:16,350 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 06.02 08:23:11" (2/3) ... [2025-02-06 20:23:16,351 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@29e16c72 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 06.02 08:23:16, skipping insertion in model container [2025-02-06 20:23:16,351 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-06 20:23:16,352 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 06.02 08:23:16" (3/3) ... [2025-02-06 20:23:16,353 INFO L363 chiAutomizerObserver]: Analyzing ICFG uthash_SFH_test10-3.i [2025-02-06 20:23:16,419 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-02-06 20:23:16,420 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-02-06 20:23:16,420 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-02-06 20:23:16,420 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-02-06 20:23:16,420 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-02-06 20:23:16,420 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-02-06 20:23:16,420 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-02-06 20:23:16,420 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-02-06 20:23:16,429 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 1145 states, 1137 states have (on average 1.6191732629727353) internal successors, (1841), 1137 states have internal predecessors, (1841), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:23:16,501 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 1041 [2025-02-06 20:23:16,502 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:23:16,502 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:23:16,510 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:23:16,511 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:23:16,511 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-02-06 20:23:16,513 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 1145 states, 1137 states have (on average 1.6191732629727353) internal successors, (1841), 1137 states have internal predecessors, (1841), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:23:16,536 INFO L131 ngComponentsAnalysis]: Automaton has 7 accepting balls. 1041 [2025-02-06 20:23:16,536 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:23:16,536 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:23:16,537 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:23:16,537 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:23:16,542 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:23:16,542 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume main_~user~0#1.base == 0 && main_~user~0#1.offset == 0;assume false;" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume !true;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:23:16,547 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:16,547 INFO L85 PathProgramCache]: Analyzing trace with hash 65760, now seen corresponding path program 1 times [2025-02-06 20:23:16,554 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:16,554 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [406334608] [2025-02-06 20:23:16,555 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:23:16,555 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:16,649 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:23:16,673 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:16,674 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:16,674 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:16,675 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:23:16,688 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:23:16,695 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:16,695 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:16,695 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:16,732 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:23:16,738 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:16,739 INFO L85 PathProgramCache]: Analyzing trace with hash 632731897, now seen corresponding path program 1 times [2025-02-06 20:23:16,739 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:16,739 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1753333211] [2025-02-06 20:23:16,739 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:23:16,739 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:16,752 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 7 statements into 1 equivalence classes. [2025-02-06 20:23:16,758 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 7 of 7 statements. [2025-02-06 20:23:16,761 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:16,762 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:23:16,813 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:23:16,814 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:23:16,814 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1753333211] [2025-02-06 20:23:16,814 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1753333211] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:23:16,814 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:23:16,815 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-02-06 20:23:16,815 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1111772507] [2025-02-06 20:23:16,816 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:23:16,818 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:23:16,819 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:23:16,842 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2025-02-06 20:23:16,843 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2025-02-06 20:23:16,849 INFO L87 Difference]: Start difference. First operand has 1145 states, 1137 states have (on average 1.6191732629727353) internal successors, (1841), 1137 states have internal predecessors, (1841), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) Second operand has 2 states, 2 states have (on average 3.5) internal successors, (7), 2 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:23:17,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:23:17,104 INFO L93 Difference]: Finished difference Result 1129 states and 1643 transitions. [2025-02-06 20:23:17,105 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1129 states and 1643 transitions. [2025-02-06 20:23:17,116 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 669 [2025-02-06 20:23:17,140 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1129 states to 1110 states and 1624 transitions. [2025-02-06 20:23:17,142 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1110 [2025-02-06 20:23:17,144 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1110 [2025-02-06 20:23:17,145 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1110 states and 1624 transitions. [2025-02-06 20:23:17,154 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:23:17,155 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1110 states and 1624 transitions. [2025-02-06 20:23:17,200 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1110 states and 1624 transitions. [2025-02-06 20:23:17,262 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1110 to 1110. [2025-02-06 20:23:17,265 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1110 states, 1103 states have (on average 1.4614687216681777) internal successors, (1612), 1102 states have internal predecessors, (1612), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:23:17,272 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1110 states to 1110 states and 1624 transitions. [2025-02-06 20:23:17,273 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1110 states and 1624 transitions. [2025-02-06 20:23:17,274 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-02-06 20:23:17,277 INFO L432 stractBuchiCegarLoop]: Abstraction has 1110 states and 1624 transitions. [2025-02-06 20:23:17,278 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-02-06 20:23:17,278 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1110 states and 1624 transitions. [2025-02-06 20:23:17,284 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 669 [2025-02-06 20:23:17,284 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:23:17,284 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:23:17,286 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:23:17,286 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:23:17,286 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:23:17,288 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem182#1 := read~int#2(main_~_hj_key~1#1.base, 10 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 16777216 * (main_#t~mem182#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem183#1 := read~int#2(main_~_hj_key~1#1.base, 9 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 65536 * (main_#t~mem183#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem184#1 := read~int#2(main_~_hj_key~1#1.base, 8 + main_~_hj_key~1#1.offset, 1);main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 + 256 * (main_#t~mem184#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem185#1 := read~int#2(main_~_hj_key~1#1.base, 7 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 16777216 * (main_#t~mem185#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem186#1 := read~int#2(main_~_hj_key~1#1.base, 6 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 65536 * (main_#t~mem186#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem187#1 := read~int#2(main_~_hj_key~1#1.base, 5 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + 256 * (main_#t~mem187#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem188#1 := read~int#2(main_~_hj_key~1#1.base, 4 + main_~_hj_key~1#1.offset, 1);main_~_hj_j~1#1 := main_~_hj_j~1#1 + (if main_#t~mem188#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem188#1 % 256 % 4294967296 else main_#t~mem188#1 % 256 % 4294967296 - 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise194#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:23:17,289 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:17,289 INFO L85 PathProgramCache]: Analyzing trace with hash 65760, now seen corresponding path program 2 times [2025-02-06 20:23:17,289 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:17,289 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1523672771] [2025-02-06 20:23:17,289 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 20:23:17,289 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:17,307 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:23:17,319 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:17,319 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 20:23:17,319 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:17,319 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:23:17,343 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:23:17,352 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:17,353 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:17,353 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:17,364 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:23:17,368 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:17,369 INFO L85 PathProgramCache]: Analyzing trace with hash 2080129791, now seen corresponding path program 1 times [2025-02-06 20:23:17,369 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:17,369 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [769135301] [2025-02-06 20:23:17,369 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:23:17,370 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:17,427 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 76 statements into 1 equivalence classes. [2025-02-06 20:23:17,457 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 76 of 76 statements. [2025-02-06 20:23:17,460 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:17,460 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:23:17,890 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:23:17,891 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:23:17,891 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [769135301] [2025-02-06 20:23:17,891 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [769135301] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:23:17,891 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:23:17,891 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-06 20:23:17,891 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1070942469] [2025-02-06 20:23:17,891 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:23:17,892 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:23:17,892 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:23:17,893 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-06 20:23:17,893 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-06 20:23:17,893 INFO L87 Difference]: Start difference. First operand 1110 states and 1624 transitions. cyclomatic complexity: 525 Second operand has 4 states, 4 states have (on average 19.0) internal successors, (76), 4 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:23:18,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:23:18,425 INFO L93 Difference]: Finished difference Result 1113 states and 1620 transitions. [2025-02-06 20:23:18,425 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1113 states and 1620 transitions. [2025-02-06 20:23:18,437 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 672 [2025-02-06 20:23:18,450 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1113 states to 1113 states and 1620 transitions. [2025-02-06 20:23:18,452 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1113 [2025-02-06 20:23:18,454 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1113 [2025-02-06 20:23:18,455 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1113 states and 1620 transitions. [2025-02-06 20:23:18,458 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:23:18,459 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1113 states and 1620 transitions. [2025-02-06 20:23:18,462 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1113 states and 1620 transitions. [2025-02-06 20:23:18,486 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1113 to 1110. [2025-02-06 20:23:18,489 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1110 states, 1103 states have (on average 1.455122393472348) internal successors, (1605), 1102 states have internal predecessors, (1605), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:23:18,494 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1110 states to 1110 states and 1617 transitions. [2025-02-06 20:23:18,495 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1110 states and 1617 transitions. [2025-02-06 20:23:18,496 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-06 20:23:18,497 INFO L432 stractBuchiCegarLoop]: Abstraction has 1110 states and 1617 transitions. [2025-02-06 20:23:18,497 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-02-06 20:23:18,497 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1110 states and 1617 transitions. [2025-02-06 20:23:18,503 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 669 [2025-02-06 20:23:18,503 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:23:18,503 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:23:18,505 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:23:18,507 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:23:18,507 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:23:18,508 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise194#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:23:18,508 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:18,508 INFO L85 PathProgramCache]: Analyzing trace with hash 65760, now seen corresponding path program 3 times [2025-02-06 20:23:18,508 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:18,508 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1308800967] [2025-02-06 20:23:18,508 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 20:23:18,508 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:18,523 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:23:18,530 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:18,534 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-06 20:23:18,535 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:18,535 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:23:18,544 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:23:18,547 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:18,547 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:18,547 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:18,557 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:23:18,558 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:18,558 INFO L85 PathProgramCache]: Analyzing trace with hash -1289714042, now seen corresponding path program 1 times [2025-02-06 20:23:18,558 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:18,558 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [97062646] [2025-02-06 20:23:18,558 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:23:18,558 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:18,609 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 76 statements into 1 equivalence classes. [2025-02-06 20:23:18,616 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 76 of 76 statements. [2025-02-06 20:23:18,616 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:18,616 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:23:18,793 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:23:18,794 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:23:18,794 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [97062646] [2025-02-06 20:23:18,794 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [97062646] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:23:18,794 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:23:18,794 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-06 20:23:18,794 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1123647950] [2025-02-06 20:23:18,794 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:23:18,794 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:23:18,794 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:23:18,795 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-06 20:23:18,795 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-06 20:23:18,795 INFO L87 Difference]: Start difference. First operand 1110 states and 1617 transitions. cyclomatic complexity: 518 Second operand has 3 states, 3 states have (on average 25.333333333333332) internal successors, (76), 3 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:23:19,127 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:23:19,127 INFO L93 Difference]: Finished difference Result 1116 states and 1623 transitions. [2025-02-06 20:23:19,127 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1116 states and 1623 transitions. [2025-02-06 20:23:19,138 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 675 [2025-02-06 20:23:19,150 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1116 states to 1116 states and 1623 transitions. [2025-02-06 20:23:19,151 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1116 [2025-02-06 20:23:19,154 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1116 [2025-02-06 20:23:19,155 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1116 states and 1623 transitions. [2025-02-06 20:23:19,161 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:23:19,161 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1116 states and 1623 transitions. [2025-02-06 20:23:19,165 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1116 states and 1623 transitions. [2025-02-06 20:23:19,193 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1116 to 1116. [2025-02-06 20:23:19,196 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1116 states, 1109 states have (on average 1.4526600541027954) internal successors, (1611), 1108 states have internal predecessors, (1611), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:23:19,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1116 states to 1116 states and 1623 transitions. [2025-02-06 20:23:19,201 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1116 states and 1623 transitions. [2025-02-06 20:23:19,201 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-06 20:23:19,202 INFO L432 stractBuchiCegarLoop]: Abstraction has 1116 states and 1623 transitions. [2025-02-06 20:23:19,203 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-02-06 20:23:19,203 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1116 states and 1623 transitions. [2025-02-06 20:23:19,210 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 675 [2025-02-06 20:23:19,210 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:23:19,210 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:23:19,211 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:23:19,211 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:23:19,212 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:23:19,212 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise194#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:23:19,213 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:19,213 INFO L85 PathProgramCache]: Analyzing trace with hash 65760, now seen corresponding path program 4 times [2025-02-06 20:23:19,213 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:19,213 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1526201616] [2025-02-06 20:23:19,215 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 20:23:19,215 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:19,233 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-02-06 20:23:19,236 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:19,236 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-06 20:23:19,236 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:19,236 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:23:19,248 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:23:19,250 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:19,251 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:19,251 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:19,264 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:23:19,264 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:19,264 INFO L85 PathProgramCache]: Analyzing trace with hash 1872062661, now seen corresponding path program 1 times [2025-02-06 20:23:19,265 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:19,265 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2139848464] [2025-02-06 20:23:19,265 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:23:19,265 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:19,308 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 76 statements into 1 equivalence classes. [2025-02-06 20:23:19,463 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 76 of 76 statements. [2025-02-06 20:23:19,463 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:19,463 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:23:20,065 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:23:20,066 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:23:20,066 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2139848464] [2025-02-06 20:23:20,066 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2139848464] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:23:20,066 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:23:20,066 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-06 20:23:20,066 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [795079146] [2025-02-06 20:23:20,066 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:23:20,067 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:23:20,067 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:23:20,067 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-06 20:23:20,067 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-06 20:23:20,067 INFO L87 Difference]: Start difference. First operand 1116 states and 1623 transitions. cyclomatic complexity: 518 Second operand has 6 states, 6 states have (on average 12.666666666666666) internal successors, (76), 6 states have internal predecessors, (76), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:23:21,334 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:23:21,335 INFO L93 Difference]: Finished difference Result 1156 states and 1671 transitions. [2025-02-06 20:23:21,335 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1156 states and 1671 transitions. [2025-02-06 20:23:21,344 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 715 [2025-02-06 20:23:21,352 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1156 states to 1156 states and 1671 transitions. [2025-02-06 20:23:21,352 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1156 [2025-02-06 20:23:21,354 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1156 [2025-02-06 20:23:21,354 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1156 states and 1671 transitions. [2025-02-06 20:23:21,356 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:23:21,356 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1156 states and 1671 transitions. [2025-02-06 20:23:21,359 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1156 states and 1671 transitions. [2025-02-06 20:23:21,373 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1156 to 1152. [2025-02-06 20:23:21,376 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1152 states, 1145 states have (on average 1.4445414847161573) internal successors, (1654), 1144 states have internal predecessors, (1654), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:23:21,380 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1152 states to 1152 states and 1666 transitions. [2025-02-06 20:23:21,380 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1152 states and 1666 transitions. [2025-02-06 20:23:21,381 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-06 20:23:21,383 INFO L432 stractBuchiCegarLoop]: Abstraction has 1152 states and 1666 transitions. [2025-02-06 20:23:21,383 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-02-06 20:23:21,383 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1152 states and 1666 transitions. [2025-02-06 20:23:21,389 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 711 [2025-02-06 20:23:21,390 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:23:21,390 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:23:21,391 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:23:21,391 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:23:21,391 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:23:21,391 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise194#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:23:21,392 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:21,392 INFO L85 PathProgramCache]: Analyzing trace with hash 65760, now seen corresponding path program 5 times [2025-02-06 20:23:21,392 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:21,392 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [111281166] [2025-02-06 20:23:21,392 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-06 20:23:21,392 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:21,405 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:23:21,408 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:21,409 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 20:23:21,409 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:21,409 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:23:21,415 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:23:21,416 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:21,417 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:21,417 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:21,426 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:23:21,427 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:21,427 INFO L85 PathProgramCache]: Analyzing trace with hash 1148891499, now seen corresponding path program 1 times [2025-02-06 20:23:21,427 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:21,427 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1400125346] [2025-02-06 20:23:21,427 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:23:21,428 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:21,461 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 77 statements into 1 equivalence classes. [2025-02-06 20:23:21,466 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 77 of 77 statements. [2025-02-06 20:23:21,466 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:21,467 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:23:21,576 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:23:21,578 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:23:21,578 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1400125346] [2025-02-06 20:23:21,578 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1400125346] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:23:21,578 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:23:21,578 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-06 20:23:21,578 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1901054954] [2025-02-06 20:23:21,578 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:23:21,579 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:23:21,579 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:23:21,579 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-06 20:23:21,579 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-06 20:23:21,579 INFO L87 Difference]: Start difference. First operand 1152 states and 1666 transitions. cyclomatic complexity: 525 Second operand has 4 states, 4 states have (on average 19.25) internal successors, (77), 4 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:23:21,946 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:23:21,946 INFO L93 Difference]: Finished difference Result 1066 states and 1541 transitions. [2025-02-06 20:23:21,946 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1066 states and 1541 transitions. [2025-02-06 20:23:21,953 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 625 [2025-02-06 20:23:21,958 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1066 states to 1066 states and 1541 transitions. [2025-02-06 20:23:21,959 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1066 [2025-02-06 20:23:21,960 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1066 [2025-02-06 20:23:21,960 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1066 states and 1541 transitions. [2025-02-06 20:23:21,961 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:23:21,961 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1066 states and 1541 transitions. [2025-02-06 20:23:21,963 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1066 states and 1541 transitions. [2025-02-06 20:23:21,974 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1066 to 1066. [2025-02-06 20:23:21,976 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1066 states, 1059 states have (on average 1.4438149197355996) internal successors, (1529), 1058 states have internal predecessors, (1529), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:23:21,980 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1066 states to 1066 states and 1541 transitions. [2025-02-06 20:23:21,981 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1066 states and 1541 transitions. [2025-02-06 20:23:21,981 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-06 20:23:21,983 INFO L432 stractBuchiCegarLoop]: Abstraction has 1066 states and 1541 transitions. [2025-02-06 20:23:21,983 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-02-06 20:23:21,984 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1066 states and 1541 transitions. [2025-02-06 20:23:21,988 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 625 [2025-02-06 20:23:21,989 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:23:21,989 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:23:21,989 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:23:21,989 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:23:21,990 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:23:21,991 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise194#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:23:21,991 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:21,991 INFO L85 PathProgramCache]: Analyzing trace with hash 65760, now seen corresponding path program 6 times [2025-02-06 20:23:21,991 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:21,991 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1018330225] [2025-02-06 20:23:21,991 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-06 20:23:21,991 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:22,004 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:23:22,007 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:22,007 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-02-06 20:23:22,007 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:22,007 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:23:22,013 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:23:22,017 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:22,017 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:22,017 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:22,027 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:23:22,027 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:22,028 INFO L85 PathProgramCache]: Analyzing trace with hash 182252110, now seen corresponding path program 1 times [2025-02-06 20:23:22,028 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:22,028 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [433505305] [2025-02-06 20:23:22,028 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:23:22,028 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:22,065 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 77 statements into 1 equivalence classes. [2025-02-06 20:23:22,093 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 77 of 77 statements. [2025-02-06 20:23:22,093 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:22,093 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:23:22,392 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:23:22,393 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:23:22,393 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [433505305] [2025-02-06 20:23:22,393 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [433505305] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:23:22,393 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:23:22,393 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-02-06 20:23:22,394 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [676381620] [2025-02-06 20:23:22,394 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:23:22,394 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:23:22,394 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:23:22,395 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-06 20:23:22,395 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-02-06 20:23:22,396 INFO L87 Difference]: Start difference. First operand 1066 states and 1541 transitions. cyclomatic complexity: 486 Second operand has 7 states, 7 states have (on average 11.0) internal successors, (77), 7 states have internal predecessors, (77), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:23:23,284 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:23:23,285 INFO L93 Difference]: Finished difference Result 1071 states and 1547 transitions. [2025-02-06 20:23:23,285 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1071 states and 1547 transitions. [2025-02-06 20:23:23,292 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 630 [2025-02-06 20:23:23,298 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1071 states to 1071 states and 1547 transitions. [2025-02-06 20:23:23,299 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1071 [2025-02-06 20:23:23,300 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1071 [2025-02-06 20:23:23,300 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1071 states and 1547 transitions. [2025-02-06 20:23:23,302 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:23:23,302 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1071 states and 1547 transitions. [2025-02-06 20:23:23,303 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1071 states and 1547 transitions. [2025-02-06 20:23:23,316 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1071 to 1070. [2025-02-06 20:23:23,318 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1070 states, 1063 states have (on average 1.4430856067732831) internal successors, (1534), 1062 states have internal predecessors, (1534), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:23:23,321 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1070 states to 1070 states and 1546 transitions. [2025-02-06 20:23:23,321 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1070 states and 1546 transitions. [2025-02-06 20:23:23,322 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-02-06 20:23:23,322 INFO L432 stractBuchiCegarLoop]: Abstraction has 1070 states and 1546 transitions. [2025-02-06 20:23:23,322 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-02-06 20:23:23,322 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1070 states and 1546 transitions. [2025-02-06 20:23:23,327 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 629 [2025-02-06 20:23:23,327 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:23:23,327 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:23:23,328 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:23:23,328 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:23:23,328 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:23:23,328 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise194#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:23:23,329 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:23,329 INFO L85 PathProgramCache]: Analyzing trace with hash 65760, now seen corresponding path program 7 times [2025-02-06 20:23:23,329 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:23,329 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [79440986] [2025-02-06 20:23:23,329 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-02-06 20:23:23,329 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:23,340 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:23:23,342 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:23,343 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:23,343 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:23,343 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:23:23,352 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:23:23,353 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:23,354 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:23,354 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:23,363 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:23:23,364 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:23,364 INFO L85 PathProgramCache]: Analyzing trace with hash 1332735550, now seen corresponding path program 1 times [2025-02-06 20:23:23,364 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:23,364 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1184024551] [2025-02-06 20:23:23,365 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:23:23,365 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:23,403 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 78 statements into 1 equivalence classes. [2025-02-06 20:23:23,428 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 78 of 78 statements. [2025-02-06 20:23:23,428 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:23,428 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:23:23,851 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:23:23,851 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:23:23,852 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1184024551] [2025-02-06 20:23:23,852 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1184024551] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:23:23,852 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:23:23,852 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-02-06 20:23:23,852 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1935215774] [2025-02-06 20:23:23,852 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:23:23,852 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:23:23,852 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:23:23,852 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-02-06 20:23:23,852 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2025-02-06 20:23:23,853 INFO L87 Difference]: Start difference. First operand 1070 states and 1546 transitions. cyclomatic complexity: 487 Second operand has 9 states, 9 states have (on average 8.666666666666666) internal successors, (78), 9 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:23:25,029 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:23:25,030 INFO L93 Difference]: Finished difference Result 1081 states and 1560 transitions. [2025-02-06 20:23:25,030 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1081 states and 1560 transitions. [2025-02-06 20:23:25,036 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 640 [2025-02-06 20:23:25,065 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1081 states to 1081 states and 1560 transitions. [2025-02-06 20:23:25,066 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1081 [2025-02-06 20:23:25,067 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1081 [2025-02-06 20:23:25,067 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1081 states and 1560 transitions. [2025-02-06 20:23:25,069 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:23:25,069 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1081 states and 1560 transitions. [2025-02-06 20:23:25,071 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1081 states and 1560 transitions. [2025-02-06 20:23:25,082 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1081 to 1078. [2025-02-06 20:23:25,084 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1078 states, 1071 states have (on average 1.4416433239962652) internal successors, (1544), 1070 states have internal predecessors, (1544), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:23:25,087 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1078 states to 1078 states and 1556 transitions. [2025-02-06 20:23:25,087 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1078 states and 1556 transitions. [2025-02-06 20:23:25,087 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-02-06 20:23:25,089 INFO L432 stractBuchiCegarLoop]: Abstraction has 1078 states and 1556 transitions. [2025-02-06 20:23:25,090 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-02-06 20:23:25,090 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1078 states and 1556 transitions. [2025-02-06 20:23:25,093 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 637 [2025-02-06 20:23:25,093 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:23:25,093 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:23:25,094 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:23:25,094 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:23:25,094 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:23:25,095 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise193#1 := 0;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise194#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:23:25,095 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:25,095 INFO L85 PathProgramCache]: Analyzing trace with hash 65760, now seen corresponding path program 8 times [2025-02-06 20:23:25,095 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:25,096 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1101688920] [2025-02-06 20:23:25,096 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 20:23:25,096 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:25,108 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:23:25,110 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:25,110 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 20:23:25,111 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:25,111 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:23:25,118 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:23:25,121 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:25,121 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:25,121 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:25,131 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:23:25,131 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:25,131 INFO L85 PathProgramCache]: Analyzing trace with hash 696072994, now seen corresponding path program 1 times [2025-02-06 20:23:25,131 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:25,132 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1002925187] [2025-02-06 20:23:25,132 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:23:25,132 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:25,169 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 78 statements into 1 equivalence classes. [2025-02-06 20:23:25,196 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 78 of 78 statements. [2025-02-06 20:23:25,197 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:25,197 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:23:25,432 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:23:25,432 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:23:25,432 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1002925187] [2025-02-06 20:23:25,433 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1002925187] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:23:25,433 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:23:25,433 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-06 20:23:25,433 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [821181586] [2025-02-06 20:23:25,433 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:23:25,433 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:23:25,434 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:23:25,435 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-06 20:23:25,435 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2025-02-06 20:23:25,435 INFO L87 Difference]: Start difference. First operand 1078 states and 1556 transitions. cyclomatic complexity: 489 Second operand has 6 states, 6 states have (on average 13.0) internal successors, (78), 6 states have internal predecessors, (78), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:23:26,014 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:23:26,014 INFO L93 Difference]: Finished difference Result 1081 states and 1559 transitions. [2025-02-06 20:23:26,014 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1081 states and 1559 transitions. [2025-02-06 20:23:26,019 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 640 [2025-02-06 20:23:26,024 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1081 states to 1081 states and 1559 transitions. [2025-02-06 20:23:26,024 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1081 [2025-02-06 20:23:26,025 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1081 [2025-02-06 20:23:26,025 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1081 states and 1559 transitions. [2025-02-06 20:23:26,027 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:23:26,027 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1081 states and 1559 transitions. [2025-02-06 20:23:26,029 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1081 states and 1559 transitions. [2025-02-06 20:23:26,040 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1081 to 1081. [2025-02-06 20:23:26,042 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1081 states, 1074 states have (on average 1.4404096834264433) internal successors, (1547), 1073 states have internal predecessors, (1547), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:23:26,045 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1081 states to 1081 states and 1559 transitions. [2025-02-06 20:23:26,045 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1081 states and 1559 transitions. [2025-02-06 20:23:26,046 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-06 20:23:26,046 INFO L432 stractBuchiCegarLoop]: Abstraction has 1081 states and 1559 transitions. [2025-02-06 20:23:26,046 INFO L338 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2025-02-06 20:23:26,046 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1081 states and 1559 transitions. [2025-02-06 20:23:26,049 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 640 [2025-02-06 20:23:26,050 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:23:26,050 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:23:26,050 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:23:26,050 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:23:26,050 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:23:26,051 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise194#1;assume main_#t~bitwise194#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:23:26,051 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:26,051 INFO L85 PathProgramCache]: Analyzing trace with hash 65760, now seen corresponding path program 9 times [2025-02-06 20:23:26,052 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:26,052 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1457603734] [2025-02-06 20:23:26,052 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 20:23:26,052 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:26,062 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:23:26,064 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:26,065 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-06 20:23:26,065 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:26,065 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:23:26,070 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:23:26,071 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:26,072 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:26,072 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:26,081 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:23:26,081 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:26,081 INFO L85 PathProgramCache]: Analyzing trace with hash -1009966850, now seen corresponding path program 1 times [2025-02-06 20:23:26,081 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:26,082 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1154901458] [2025-02-06 20:23:26,082 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:23:26,082 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:26,117 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 79 statements into 1 equivalence classes. [2025-02-06 20:23:26,409 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 79 of 79 statements. [2025-02-06 20:23:26,409 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:26,409 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:23:27,144 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:23:27,144 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:23:27,144 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1154901458] [2025-02-06 20:23:27,145 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1154901458] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:23:27,145 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:23:27,145 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2025-02-06 20:23:27,145 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1124421038] [2025-02-06 20:23:27,145 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:23:27,145 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:23:27,145 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:23:27,146 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-02-06 20:23:27,146 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2025-02-06 20:23:27,147 INFO L87 Difference]: Start difference. First operand 1081 states and 1559 transitions. cyclomatic complexity: 489 Second operand has 13 states, 13 states have (on average 6.076923076923077) internal successors, (79), 13 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:23:28,982 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:23:28,982 INFO L93 Difference]: Finished difference Result 1152 states and 1659 transitions. [2025-02-06 20:23:28,982 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1152 states and 1659 transitions. [2025-02-06 20:23:28,987 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 711 [2025-02-06 20:23:28,994 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1152 states to 1152 states and 1659 transitions. [2025-02-06 20:23:28,994 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1152 [2025-02-06 20:23:28,996 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1152 [2025-02-06 20:23:28,997 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1152 states and 1659 transitions. [2025-02-06 20:23:28,999 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:23:28,999 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1152 states and 1659 transitions. [2025-02-06 20:23:29,002 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1152 states and 1659 transitions. [2025-02-06 20:23:29,016 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1152 to 1087. [2025-02-06 20:23:29,018 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1087 states, 1080 states have (on average 1.4398148148148149) internal successors, (1555), 1079 states have internal predecessors, (1555), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:23:29,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1087 states to 1087 states and 1567 transitions. [2025-02-06 20:23:29,021 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1087 states and 1567 transitions. [2025-02-06 20:23:29,022 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2025-02-06 20:23:29,023 INFO L432 stractBuchiCegarLoop]: Abstraction has 1087 states and 1567 transitions. [2025-02-06 20:23:29,023 INFO L338 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2025-02-06 20:23:29,024 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1087 states and 1567 transitions. [2025-02-06 20:23:29,027 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 646 [2025-02-06 20:23:29,027 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:23:29,027 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:23:29,028 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:23:29,029 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:23:29,029 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, 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main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:23:29,029 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise193#1;assume main_#t~bitwise193#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise194#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:23:29,030 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:29,030 INFO L85 PathProgramCache]: Analyzing trace with hash 65760, now seen corresponding path program 10 times [2025-02-06 20:23:29,030 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:29,030 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2127933946] [2025-02-06 20:23:29,031 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 20:23:29,031 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:29,044 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-02-06 20:23:29,046 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:29,046 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-06 20:23:29,046 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:29,047 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:23:29,052 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:23:29,054 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:29,054 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:29,054 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:29,063 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:23:29,064 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:29,065 INFO L85 PathProgramCache]: Analyzing trace with hash -1313027988, now seen corresponding path program 1 times [2025-02-06 20:23:29,065 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:29,065 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1526413935] [2025-02-06 20:23:29,065 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:23:29,065 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:29,103 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 79 statements into 1 equivalence classes. [2025-02-06 20:23:29,253 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 79 of 79 statements. [2025-02-06 20:23:29,253 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:29,253 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:23:29,466 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:23:29,466 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:23:29,467 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1526413935] [2025-02-06 20:23:29,467 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1526413935] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:23:29,467 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:23:29,467 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-02-06 20:23:29,467 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [4473351] [2025-02-06 20:23:29,467 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:23:29,467 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:23:29,467 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:23:29,468 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-06 20:23:29,468 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-02-06 20:23:29,468 INFO L87 Difference]: Start difference. First operand 1087 states and 1567 transitions. cyclomatic complexity: 491 Second operand has 7 states, 7 states have (on average 11.285714285714286) internal successors, (79), 7 states have internal predecessors, (79), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:23:30,346 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:23:30,346 INFO L93 Difference]: Finished difference Result 1092 states and 1573 transitions. [2025-02-06 20:23:30,346 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1092 states and 1573 transitions. [2025-02-06 20:23:30,351 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 651 [2025-02-06 20:23:30,356 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1092 states to 1092 states and 1573 transitions. [2025-02-06 20:23:30,356 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1092 [2025-02-06 20:23:30,358 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1092 [2025-02-06 20:23:30,358 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1092 states and 1573 transitions. [2025-02-06 20:23:30,359 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:23:30,360 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1092 states and 1573 transitions. [2025-02-06 20:23:30,361 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1092 states and 1573 transitions. [2025-02-06 20:23:30,371 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1092 to 1087. [2025-02-06 20:23:30,373 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1087 states, 1080 states have (on average 1.4398148148148149) internal successors, (1555), 1079 states have internal predecessors, (1555), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:23:30,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1087 states to 1087 states and 1567 transitions. [2025-02-06 20:23:30,377 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1087 states and 1567 transitions. [2025-02-06 20:23:30,377 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-02-06 20:23:30,378 INFO L432 stractBuchiCegarLoop]: Abstraction has 1087 states and 1567 transitions. [2025-02-06 20:23:30,378 INFO L338 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2025-02-06 20:23:30,378 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1087 states and 1567 transitions. [2025-02-06 20:23:30,381 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 646 [2025-02-06 20:23:30,381 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:23:30,381 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:23:30,382 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:23:30,382 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:23:30,382 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, 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main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:23:30,382 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise193#1;assume main_#t~bitwise193#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise194#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:23:30,383 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:30,383 INFO L85 PathProgramCache]: Analyzing trace with hash 65760, now seen corresponding path program 11 times [2025-02-06 20:23:30,383 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:30,383 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [997245816] [2025-02-06 20:23:30,383 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-06 20:23:30,383 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:30,395 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:23:30,396 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:30,396 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 20:23:30,396 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:30,396 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:23:30,401 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:23:30,403 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:30,404 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:30,404 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:30,412 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:23:30,412 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:30,413 INFO L85 PathProgramCache]: Analyzing trace with hash -2071274528, now seen corresponding path program 1 times [2025-02-06 20:23:30,413 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:30,413 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [340848722] [2025-02-06 20:23:30,413 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:23:30,413 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:30,475 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 80 statements into 1 equivalence classes. [2025-02-06 20:23:30,623 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 80 of 80 statements. [2025-02-06 20:23:30,624 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:30,624 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:23:30,876 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:23:30,876 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:23:30,876 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [340848722] [2025-02-06 20:23:30,876 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [340848722] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:23:30,876 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:23:30,876 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-02-06 20:23:30,876 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1971336637] [2025-02-06 20:23:30,877 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:23:30,877 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:23:30,877 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:23:30,877 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-02-06 20:23:30,877 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2025-02-06 20:23:30,878 INFO L87 Difference]: Start difference. First operand 1087 states and 1567 transitions. cyclomatic complexity: 491 Second operand has 9 states, 9 states have (on average 8.88888888888889) internal successors, (80), 9 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:23:32,074 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:23:32,074 INFO L93 Difference]: Finished difference Result 1097 states and 1579 transitions. [2025-02-06 20:23:32,074 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1097 states and 1579 transitions. [2025-02-06 20:23:32,078 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 656 [2025-02-06 20:23:32,085 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1097 states to 1097 states and 1579 transitions. [2025-02-06 20:23:32,085 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1097 [2025-02-06 20:23:32,086 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1097 [2025-02-06 20:23:32,086 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1097 states and 1579 transitions. [2025-02-06 20:23:32,088 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:23:32,088 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1097 states and 1579 transitions. [2025-02-06 20:23:32,091 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1097 states and 1579 transitions. [2025-02-06 20:23:32,105 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1097 to 1090. [2025-02-06 20:23:32,107 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1090 states, 1083 states have (on average 1.4395198522622346) internal successors, (1559), 1082 states have internal predecessors, (1559), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:23:32,110 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1090 states to 1090 states and 1571 transitions. [2025-02-06 20:23:32,110 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1090 states and 1571 transitions. [2025-02-06 20:23:32,111 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-02-06 20:23:32,113 INFO L432 stractBuchiCegarLoop]: Abstraction has 1090 states and 1571 transitions. [2025-02-06 20:23:32,113 INFO L338 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2025-02-06 20:23:32,113 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1090 states and 1571 transitions. [2025-02-06 20:23:32,117 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 649 [2025-02-06 20:23:32,117 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:23:32,117 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:23:32,119 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:23:32,119 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:23:32,119 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, 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main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:23:32,120 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise193#1 := 0;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise194#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:23:32,120 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:32,121 INFO L85 PathProgramCache]: Analyzing trace with hash 65760, now seen corresponding path program 12 times [2025-02-06 20:23:32,121 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:32,121 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [588714901] [2025-02-06 20:23:32,121 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-06 20:23:32,121 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:32,136 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:23:32,138 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:32,138 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-02-06 20:23:32,138 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:32,138 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:23:32,144 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:23:32,146 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:32,146 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:32,146 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:32,158 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:23:32,158 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:32,159 INFO L85 PathProgramCache]: Analyzing trace with hash 783064411, now seen corresponding path program 1 times [2025-02-06 20:23:32,159 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:32,159 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [766038414] [2025-02-06 20:23:32,159 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:23:32,159 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:32,203 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 80 statements into 1 equivalence classes. [2025-02-06 20:23:32,232 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 80 of 80 statements. [2025-02-06 20:23:32,232 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:32,232 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:23:32,488 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:23:32,488 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:23:32,488 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [766038414] [2025-02-06 20:23:32,488 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [766038414] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:23:32,489 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:23:32,489 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-02-06 20:23:32,489 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1500320348] [2025-02-06 20:23:32,489 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:23:32,489 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:23:32,489 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:23:32,489 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-02-06 20:23:32,489 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2025-02-06 20:23:32,489 INFO L87 Difference]: Start difference. First operand 1090 states and 1571 transitions. cyclomatic complexity: 492 Second operand has 9 states, 9 states have (on average 8.88888888888889) internal successors, (80), 9 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:23:33,401 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:23:33,401 INFO L93 Difference]: Finished difference Result 1100 states and 1583 transitions. [2025-02-06 20:23:33,402 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1100 states and 1583 transitions. [2025-02-06 20:23:33,404 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 659 [2025-02-06 20:23:33,410 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1100 states to 1100 states and 1583 transitions. [2025-02-06 20:23:33,410 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1100 [2025-02-06 20:23:33,411 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1100 [2025-02-06 20:23:33,411 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1100 states and 1583 transitions. [2025-02-06 20:23:33,413 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:23:33,413 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1100 states and 1583 transitions. [2025-02-06 20:23:33,415 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1100 states and 1583 transitions. [2025-02-06 20:23:33,426 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1100 to 1090. [2025-02-06 20:23:33,428 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1090 states, 1083 states have (on average 1.4395198522622346) internal successors, (1559), 1082 states have internal predecessors, (1559), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:23:33,431 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1090 states to 1090 states and 1571 transitions. [2025-02-06 20:23:33,432 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1090 states and 1571 transitions. [2025-02-06 20:23:33,432 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-02-06 20:23:33,434 INFO L432 stractBuchiCegarLoop]: Abstraction has 1090 states and 1571 transitions. [2025-02-06 20:23:33,434 INFO L338 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2025-02-06 20:23:33,434 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1090 states and 1571 transitions. [2025-02-06 20:23:33,437 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 649 [2025-02-06 20:23:33,437 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:23:33,437 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:23:33,439 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:23:33,439 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:23:33,440 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:23:33,440 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise194#1;assume main_#t~bitwise194#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 32 % 4294967296;main_#t~bitwise198#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:23:33,441 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:33,441 INFO L85 PathProgramCache]: Analyzing trace with hash 65760, now seen corresponding path program 13 times [2025-02-06 20:23:33,441 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:33,441 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1055794217] [2025-02-06 20:23:33,441 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-02-06 20:23:33,442 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:33,453 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:23:33,458 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:33,458 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:33,458 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:33,458 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:23:33,463 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:23:33,465 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:33,465 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:33,465 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:33,474 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:23:33,475 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:33,476 INFO L85 PathProgramCache]: Analyzing trace with hash 1230463001, now seen corresponding path program 1 times [2025-02-06 20:23:33,476 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:33,476 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [959050116] [2025-02-06 20:23:33,476 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:23:33,476 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:33,511 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 80 statements into 1 equivalence classes. [2025-02-06 20:23:33,748 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 80 of 80 statements. [2025-02-06 20:23:33,748 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:33,748 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:23:34,502 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:23:34,503 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:23:34,503 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [959050116] [2025-02-06 20:23:34,503 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [959050116] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:23:34,503 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:23:34,503 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-02-06 20:23:34,503 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1739335297] [2025-02-06 20:23:34,503 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:23:34,503 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:23:34,503 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:23:34,504 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-02-06 20:23:34,504 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=52, Unknown=0, NotChecked=0, Total=72 [2025-02-06 20:23:34,504 INFO L87 Difference]: Start difference. First operand 1090 states and 1571 transitions. cyclomatic complexity: 492 Second operand has 9 states, 9 states have (on average 8.88888888888889) internal successors, (80), 9 states have internal predecessors, (80), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:23:35,263 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:23:35,263 INFO L93 Difference]: Finished difference Result 1086 states and 1565 transitions. [2025-02-06 20:23:35,263 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1086 states and 1565 transitions. [2025-02-06 20:23:35,266 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 645 [2025-02-06 20:23:35,269 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1086 states to 1086 states and 1565 transitions. [2025-02-06 20:23:35,269 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1086 [2025-02-06 20:23:35,270 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1086 [2025-02-06 20:23:35,270 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1086 states and 1565 transitions. [2025-02-06 20:23:35,271 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:23:35,272 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1086 states and 1565 transitions. [2025-02-06 20:23:35,273 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1086 states and 1565 transitions. [2025-02-06 20:23:35,318 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1086 to 1084. [2025-02-06 20:23:35,321 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1084 states, 1077 states have (on average 1.4391829155060354) internal successors, (1550), 1076 states have internal predecessors, (1550), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:23:35,323 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1084 states to 1084 states and 1562 transitions. [2025-02-06 20:23:35,323 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1084 states and 1562 transitions. [2025-02-06 20:23:35,324 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-02-06 20:23:35,326 INFO L432 stractBuchiCegarLoop]: Abstraction has 1084 states and 1562 transitions. [2025-02-06 20:23:35,326 INFO L338 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2025-02-06 20:23:35,326 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1084 states and 1562 transitions. [2025-02-06 20:23:35,328 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 643 [2025-02-06 20:23:35,329 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:23:35,329 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:23:35,329 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:23:35,329 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:23:35,330 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:23:35,330 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise194#1;assume main_#t~bitwise194#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume !(0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_ha_hashv~1#1 % 4294967296 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := 0;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:23:35,330 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:35,331 INFO L85 PathProgramCache]: Analyzing trace with hash 65760, now seen corresponding path program 14 times [2025-02-06 20:23:35,331 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:35,331 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2012166333] [2025-02-06 20:23:35,331 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 20:23:35,331 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:35,343 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:23:35,345 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:35,345 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 20:23:35,346 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:35,346 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:23:35,352 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:23:35,353 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:35,353 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:35,354 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:35,369 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:23:35,369 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:35,370 INFO L85 PathProgramCache]: Analyzing trace with hash 414797275, now seen corresponding path program 1 times [2025-02-06 20:23:35,370 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:35,370 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [452089149] [2025-02-06 20:23:35,370 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:23:35,370 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:35,407 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 81 statements into 1 equivalence classes. [2025-02-06 20:23:35,532 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 81 of 81 statements. [2025-02-06 20:23:35,532 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:35,532 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:23:36,141 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:23:36,141 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:23:36,141 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [452089149] [2025-02-06 20:23:36,141 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [452089149] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:23:36,141 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:23:36,142 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2025-02-06 20:23:36,142 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1105678305] [2025-02-06 20:23:36,142 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:23:36,142 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:23:36,142 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:23:36,142 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-02-06 20:23:36,142 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=123, Unknown=0, NotChecked=0, Total=156 [2025-02-06 20:23:36,143 INFO L87 Difference]: Start difference. First operand 1084 states and 1562 transitions. cyclomatic complexity: 489 Second operand has 13 states, 13 states have (on average 6.230769230769231) internal successors, (81), 13 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:23:37,383 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:23:37,383 INFO L93 Difference]: Finished difference Result 1113 states and 1604 transitions. [2025-02-06 20:23:37,383 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1113 states and 1604 transitions. [2025-02-06 20:23:37,388 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 672 [2025-02-06 20:23:37,393 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1113 states to 1113 states and 1604 transitions. [2025-02-06 20:23:37,393 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1113 [2025-02-06 20:23:37,394 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1113 [2025-02-06 20:23:37,394 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1113 states and 1604 transitions. [2025-02-06 20:23:37,395 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:23:37,395 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1113 states and 1604 transitions. [2025-02-06 20:23:37,397 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1113 states and 1604 transitions. [2025-02-06 20:23:37,406 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1113 to 1092. [2025-02-06 20:23:37,407 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1092 states, 1085 states have (on average 1.4387096774193548) internal successors, (1561), 1084 states have internal predecessors, (1561), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:23:37,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1092 states to 1092 states and 1573 transitions. [2025-02-06 20:23:37,410 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1092 states and 1573 transitions. [2025-02-06 20:23:37,410 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-02-06 20:23:37,411 INFO L432 stractBuchiCegarLoop]: Abstraction has 1092 states and 1573 transitions. [2025-02-06 20:23:37,411 INFO L338 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2025-02-06 20:23:37,411 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1092 states and 1573 transitions. [2025-02-06 20:23:37,414 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 651 [2025-02-06 20:23:37,414 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:23:37,414 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:23:37,416 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:23:37,416 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:23:37,416 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:23:37,416 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise193#1 := 0;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise194#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise196#1 := main_~_hj_i~1#1;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:23:37,417 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:37,417 INFO L85 PathProgramCache]: Analyzing trace with hash 65760, now seen corresponding path program 15 times [2025-02-06 20:23:37,417 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:37,417 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1570032008] [2025-02-06 20:23:37,417 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 20:23:37,417 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:37,429 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:23:37,430 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:37,431 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-06 20:23:37,431 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:37,431 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:23:37,438 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:23:37,439 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:37,439 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:37,440 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:37,448 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:23:37,449 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:37,449 INFO L85 PathProgramCache]: Analyzing trace with hash -1219871894, now seen corresponding path program 1 times [2025-02-06 20:23:37,449 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:37,449 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [302910831] [2025-02-06 20:23:37,449 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:23:37,449 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:37,482 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 81 statements into 1 equivalence classes. [2025-02-06 20:23:37,502 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 81 of 81 statements. [2025-02-06 20:23:37,503 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:37,503 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:23:37,787 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:23:37,787 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:23:37,787 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [302910831] [2025-02-06 20:23:37,787 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [302910831] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:23:37,787 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:23:37,788 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-02-06 20:23:37,788 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [371617484] [2025-02-06 20:23:37,788 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:23:37,788 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:23:37,788 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:23:37,788 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-02-06 20:23:37,788 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2025-02-06 20:23:37,789 INFO L87 Difference]: Start difference. First operand 1092 states and 1573 transitions. cyclomatic complexity: 492 Second operand has 10 states, 10 states have (on average 8.1) internal successors, (81), 10 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:23:38,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:23:38,942 INFO L93 Difference]: Finished difference Result 1108 states and 1594 transitions. [2025-02-06 20:23:38,942 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1108 states and 1594 transitions. [2025-02-06 20:23:38,946 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 667 [2025-02-06 20:23:38,949 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1108 states to 1108 states and 1594 transitions. [2025-02-06 20:23:38,949 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1108 [2025-02-06 20:23:38,950 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1108 [2025-02-06 20:23:38,950 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1108 states and 1594 transitions. [2025-02-06 20:23:38,952 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:23:38,952 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1108 states and 1594 transitions. [2025-02-06 20:23:38,953 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1108 states and 1594 transitions. [2025-02-06 20:23:38,965 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1108 to 1102. [2025-02-06 20:23:38,967 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1102 states, 1095 states have (on average 1.4365296803652967) internal successors, (1573), 1094 states have internal predecessors, (1573), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:23:38,970 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1102 states to 1102 states and 1585 transitions. [2025-02-06 20:23:38,970 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1102 states and 1585 transitions. [2025-02-06 20:23:38,971 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-02-06 20:23:38,972 INFO L432 stractBuchiCegarLoop]: Abstraction has 1102 states and 1585 transitions. [2025-02-06 20:23:38,972 INFO L338 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2025-02-06 20:23:38,972 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1102 states and 1585 transitions. [2025-02-06 20:23:38,975 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 661 [2025-02-06 20:23:38,975 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:23:38,975 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:23:38,976 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:23:38,976 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:23:38,976 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:23:38,977 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise193#1;assume main_#t~bitwise193#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise194#1 := 256 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise196#1 := main_~_hj_i~1#1;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:23:38,977 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:38,977 INFO L85 PathProgramCache]: Analyzing trace with hash 65760, now seen corresponding path program 16 times [2025-02-06 20:23:38,977 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:38,977 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [64860141] [2025-02-06 20:23:38,977 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-06 20:23:38,978 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:38,990 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-02-06 20:23:38,991 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:38,992 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-06 20:23:38,992 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:38,992 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:23:38,999 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:23:39,000 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:39,000 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:39,000 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:39,009 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:23:39,009 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:39,009 INFO L85 PathProgramCache]: Analyzing trace with hash 489934213, now seen corresponding path program 1 times [2025-02-06 20:23:39,010 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:39,010 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [554137090] [2025-02-06 20:23:39,010 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:23:39,010 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:39,043 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 81 statements into 1 equivalence classes. [2025-02-06 20:23:39,092 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 81 of 81 statements. [2025-02-06 20:23:39,092 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:39,092 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:23:39,361 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:23:39,361 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:23:39,361 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [554137090] [2025-02-06 20:23:39,361 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [554137090] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:23:39,362 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:23:39,362 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-02-06 20:23:39,362 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1329032516] [2025-02-06 20:23:39,362 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:23:39,362 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:23:39,362 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:23:39,362 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-02-06 20:23:39,363 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2025-02-06 20:23:39,363 INFO L87 Difference]: Start difference. First operand 1102 states and 1585 transitions. cyclomatic complexity: 494 Second operand has 10 states, 10 states have (on average 8.1) internal successors, (81), 10 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:23:40,413 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:23:40,413 INFO L93 Difference]: Finished difference Result 1118 states and 1607 transitions. [2025-02-06 20:23:40,413 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1118 states and 1607 transitions. [2025-02-06 20:23:40,416 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 677 [2025-02-06 20:23:40,418 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1118 states to 1118 states and 1607 transitions. [2025-02-06 20:23:40,419 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1118 [2025-02-06 20:23:40,419 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1118 [2025-02-06 20:23:40,419 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1118 states and 1607 transitions. [2025-02-06 20:23:40,420 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:23:40,420 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1118 states and 1607 transitions. [2025-02-06 20:23:40,421 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1118 states and 1607 transitions. [2025-02-06 20:23:40,429 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1118 to 1105. [2025-02-06 20:23:40,430 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1105 states, 1098 states have (on average 1.4362477231329691) internal successors, (1577), 1097 states have internal predecessors, (1577), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:23:40,432 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1105 states to 1105 states and 1589 transitions. [2025-02-06 20:23:40,432 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1105 states and 1589 transitions. [2025-02-06 20:23:40,433 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-02-06 20:23:40,434 INFO L432 stractBuchiCegarLoop]: Abstraction has 1105 states and 1589 transitions. [2025-02-06 20:23:40,434 INFO L338 stractBuchiCegarLoop]: ======== Iteration 17 ============ [2025-02-06 20:23:40,434 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1105 states and 1589 transitions. [2025-02-06 20:23:40,436 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 664 [2025-02-06 20:23:40,436 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:23:40,436 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:23:40,437 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:23:40,437 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:23:40,437 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:23:40,437 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise193#1;assume main_#t~bitwise193#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise194#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:23:40,438 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:40,438 INFO L85 PathProgramCache]: Analyzing trace with hash 65760, now seen corresponding path program 17 times [2025-02-06 20:23:40,439 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:40,439 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [310128147] [2025-02-06 20:23:40,439 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-06 20:23:40,439 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:40,448 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:23:40,450 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:40,450 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 20:23:40,450 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:40,450 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:23:40,454 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:23:40,455 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:40,455 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:40,455 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:40,462 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:23:40,463 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:40,463 INFO L85 PathProgramCache]: Analyzing trace with hash -1522663387, now seen corresponding path program 1 times [2025-02-06 20:23:40,463 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:40,463 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2146171530] [2025-02-06 20:23:40,463 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:23:40,463 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:40,525 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 81 statements into 1 equivalence classes. [2025-02-06 20:23:40,649 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 81 of 81 statements. [2025-02-06 20:23:40,649 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:40,650 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:23:41,133 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:23:41,134 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:23:41,134 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2146171530] [2025-02-06 20:23:41,134 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2146171530] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:23:41,134 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:23:41,134 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-02-06 20:23:41,134 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1552799989] [2025-02-06 20:23:41,134 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:23:41,134 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:23:41,134 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:23:41,134 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-06 20:23:41,135 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-02-06 20:23:41,135 INFO L87 Difference]: Start difference. First operand 1105 states and 1589 transitions. cyclomatic complexity: 495 Second operand has 7 states, 7 states have (on average 11.571428571428571) internal successors, (81), 7 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:23:41,740 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:23:41,740 INFO L93 Difference]: Finished difference Result 1110 states and 1593 transitions. [2025-02-06 20:23:41,740 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1110 states and 1593 transitions. [2025-02-06 20:23:41,743 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 669 [2025-02-06 20:23:41,746 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1110 states to 1110 states and 1593 transitions. [2025-02-06 20:23:41,746 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1110 [2025-02-06 20:23:41,746 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1110 [2025-02-06 20:23:41,746 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1110 states and 1593 transitions. [2025-02-06 20:23:41,747 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:23:41,747 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1110 states and 1593 transitions. [2025-02-06 20:23:41,748 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1110 states and 1593 transitions. [2025-02-06 20:23:41,756 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1110 to 1105. [2025-02-06 20:23:41,757 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1105 states, 1098 states have (on average 1.4353369763205828) internal successors, (1576), 1097 states have internal predecessors, (1576), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:23:41,759 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1105 states to 1105 states and 1588 transitions. [2025-02-06 20:23:41,760 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1105 states and 1588 transitions. [2025-02-06 20:23:41,760 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-02-06 20:23:41,761 INFO L432 stractBuchiCegarLoop]: Abstraction has 1105 states and 1588 transitions. [2025-02-06 20:23:41,761 INFO L338 stractBuchiCegarLoop]: ======== Iteration 18 ============ [2025-02-06 20:23:41,761 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1105 states and 1588 transitions. [2025-02-06 20:23:41,763 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 664 [2025-02-06 20:23:41,763 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:23:41,763 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:23:41,764 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:23:41,764 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:23:41,764 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:23:41,765 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise193#1 := main_~_ha_hashv~1#1 % 4294967296 / 8192;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise194#1;assume main_#t~bitwise194#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume 0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise195#1 := main_~_ha_hashv~1#1;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 / 4096 % 4294967296;main_#t~bitwise196#1 := main_~_hj_i~1#1;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:23:41,765 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:41,765 INFO L85 PathProgramCache]: Analyzing trace with hash 65760, now seen corresponding path program 18 times [2025-02-06 20:23:41,765 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:41,765 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [584247010] [2025-02-06 20:23:41,765 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-06 20:23:41,766 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:41,776 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:23:41,782 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:41,782 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-02-06 20:23:41,782 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:41,782 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:23:41,786 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:23:41,790 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:41,790 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:41,790 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:41,798 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:23:41,798 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:41,798 INFO L85 PathProgramCache]: Analyzing trace with hash -326088297, now seen corresponding path program 1 times [2025-02-06 20:23:41,798 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:41,799 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1005902469] [2025-02-06 20:23:41,799 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:23:41,799 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:41,828 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 81 statements into 1 equivalence classes. [2025-02-06 20:23:41,872 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 81 of 81 statements. [2025-02-06 20:23:41,872 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:41,872 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:23:42,351 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:23:42,352 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:23:42,352 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1005902469] [2025-02-06 20:23:42,352 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1005902469] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:23:42,352 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:23:42,352 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2025-02-06 20:23:42,352 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [156750868] [2025-02-06 20:23:42,352 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:23:42,352 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:23:42,352 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:23:42,353 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2025-02-06 20:23:42,353 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2025-02-06 20:23:42,353 INFO L87 Difference]: Start difference. First operand 1105 states and 1588 transitions. cyclomatic complexity: 494 Second operand has 9 states, 9 states have (on average 9.0) internal successors, (81), 9 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:23:43,577 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:23:43,578 INFO L93 Difference]: Finished difference Result 1109 states and 1591 transitions. [2025-02-06 20:23:43,578 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1109 states and 1591 transitions. [2025-02-06 20:23:43,580 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 668 [2025-02-06 20:23:43,584 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1109 states to 1109 states and 1591 transitions. [2025-02-06 20:23:43,584 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1109 [2025-02-06 20:23:43,584 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1109 [2025-02-06 20:23:43,584 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1109 states and 1591 transitions. [2025-02-06 20:23:43,585 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:23:43,585 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1109 states and 1591 transitions. [2025-02-06 20:23:43,586 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1109 states and 1591 transitions. [2025-02-06 20:23:43,594 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1109 to 1105. [2025-02-06 20:23:43,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1105 states, 1098 states have (on average 1.4344262295081966) internal successors, (1575), 1097 states have internal predecessors, (1575), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:23:43,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1105 states to 1105 states and 1587 transitions. [2025-02-06 20:23:43,597 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1105 states and 1587 transitions. [2025-02-06 20:23:43,598 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-02-06 20:23:43,598 INFO L432 stractBuchiCegarLoop]: Abstraction has 1105 states and 1587 transitions. [2025-02-06 20:23:43,598 INFO L338 stractBuchiCegarLoop]: ======== Iteration 19 ============ [2025-02-06 20:23:43,598 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1105 states and 1587 transitions. [2025-02-06 20:23:43,601 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 664 [2025-02-06 20:23:43,601 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:23:43,601 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:23:43,602 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:23:43,602 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:23:43,602 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:23:43,603 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise193#1;assume main_#t~bitwise193#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise194#1 := 0;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:23:43,603 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:43,603 INFO L85 PathProgramCache]: Analyzing trace with hash 65760, now seen corresponding path program 19 times [2025-02-06 20:23:43,603 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:43,604 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [712980292] [2025-02-06 20:23:43,604 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-02-06 20:23:43,604 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:43,618 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:23:43,620 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:43,620 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:43,620 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:43,620 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:23:43,625 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:23:43,627 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:43,627 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:43,627 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:43,638 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:23:43,639 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:43,639 INFO L85 PathProgramCache]: Analyzing trace with hash 1798767465, now seen corresponding path program 1 times [2025-02-06 20:23:43,640 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:43,640 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [404657796] [2025-02-06 20:23:43,640 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:23:43,640 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:43,681 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 81 statements into 1 equivalence classes. [2025-02-06 20:23:43,723 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 81 of 81 statements. [2025-02-06 20:23:43,723 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:43,723 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:23:43,969 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:23:43,970 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:23:43,970 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [404657796] [2025-02-06 20:23:43,970 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [404657796] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:23:43,970 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:23:43,970 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-02-06 20:23:43,970 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1178518175] [2025-02-06 20:23:43,970 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:23:43,970 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:23:43,971 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:23:43,972 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-06 20:23:43,972 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-02-06 20:23:43,973 INFO L87 Difference]: Start difference. First operand 1105 states and 1587 transitions. cyclomatic complexity: 493 Second operand has 7 states, 7 states have (on average 11.571428571428571) internal successors, (81), 7 states have internal predecessors, (81), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:23:44,648 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:23:44,648 INFO L93 Difference]: Finished difference Result 1108 states and 1590 transitions. [2025-02-06 20:23:44,648 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1108 states and 1590 transitions. [2025-02-06 20:23:44,651 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 667 [2025-02-06 20:23:44,655 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1108 states to 1108 states and 1590 transitions. [2025-02-06 20:23:44,655 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1108 [2025-02-06 20:23:44,656 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1108 [2025-02-06 20:23:44,656 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1108 states and 1590 transitions. [2025-02-06 20:23:44,657 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:23:44,657 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1108 states and 1590 transitions. [2025-02-06 20:23:44,658 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1108 states and 1590 transitions. [2025-02-06 20:23:44,665 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1108 to 1108. [2025-02-06 20:23:44,666 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1108 states, 1101 states have (on average 1.4332425068119892) internal successors, (1578), 1100 states have internal predecessors, (1578), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:23:44,667 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1108 states to 1108 states and 1590 transitions. [2025-02-06 20:23:44,667 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1108 states and 1590 transitions. [2025-02-06 20:23:44,669 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-02-06 20:23:44,669 INFO L432 stractBuchiCegarLoop]: Abstraction has 1108 states and 1590 transitions. [2025-02-06 20:23:44,669 INFO L338 stractBuchiCegarLoop]: ======== Iteration 20 ============ [2025-02-06 20:23:44,669 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1108 states and 1590 transitions. [2025-02-06 20:23:44,672 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 667 [2025-02-06 20:23:44,672 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:23:44,672 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:23:44,672 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:23:44,672 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:23:44,673 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:23:44,673 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;main_#t~bitwise193#1 := 0;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume 0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;main_#t~bitwise194#1 := main_~_hj_j~1#1;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296);" "assume !(0 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_ha_hashv~1#1 % 4294967296 == main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise195#1;assume main_#t~bitwise195#1 % 4294967296 <= main_~_ha_hashv~1#1 % 4294967296 + main_~_hj_j~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:23:44,673 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:44,673 INFO L85 PathProgramCache]: Analyzing trace with hash 65760, now seen corresponding path program 20 times [2025-02-06 20:23:44,673 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:44,674 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [781419833] [2025-02-06 20:23:44,674 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-06 20:23:44,674 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:44,683 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:23:44,684 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:44,684 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-06 20:23:44,684 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:44,684 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:23:44,686 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:23:44,687 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:44,687 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:44,687 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:44,694 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:23:44,694 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:44,694 INFO L85 PathProgramCache]: Analyzing trace with hash -1200021211, now seen corresponding path program 1 times [2025-02-06 20:23:44,694 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:44,694 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1048378363] [2025-02-06 20:23:44,694 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:23:44,694 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:44,750 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 82 statements into 1 equivalence classes. [2025-02-06 20:23:44,871 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 82 of 82 statements. [2025-02-06 20:23:44,871 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:44,871 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:23:45,228 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-06 20:23:45,228 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-06 20:23:45,228 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1048378363] [2025-02-06 20:23:45,228 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1048378363] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-06 20:23:45,229 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-06 20:23:45,229 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-02-06 20:23:45,229 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1342535395] [2025-02-06 20:23:45,229 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-06 20:23:45,229 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-06 20:23:45,229 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-06 20:23:45,229 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-02-06 20:23:45,230 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=72, Unknown=0, NotChecked=0, Total=90 [2025-02-06 20:23:45,230 INFO L87 Difference]: Start difference. First operand 1108 states and 1590 transitions. cyclomatic complexity: 493 Second operand has 10 states, 10 states have (on average 8.2) internal successors, (82), 10 states have internal predecessors, (82), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-06 20:23:46,389 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-06 20:23:46,389 INFO L93 Difference]: Finished difference Result 1120 states and 1607 transitions. [2025-02-06 20:23:46,389 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1120 states and 1607 transitions. [2025-02-06 20:23:46,391 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 679 [2025-02-06 20:23:46,396 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1120 states to 1120 states and 1607 transitions. [2025-02-06 20:23:46,396 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1120 [2025-02-06 20:23:46,396 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1120 [2025-02-06 20:23:46,396 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1120 states and 1607 transitions. [2025-02-06 20:23:46,397 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-06 20:23:46,397 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1120 states and 1607 transitions. [2025-02-06 20:23:46,398 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1120 states and 1607 transitions. [2025-02-06 20:23:46,403 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1120 to 1112. [2025-02-06 20:23:46,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1112 states, 1105 states have (on average 1.432579185520362) internal successors, (1583), 1104 states have internal predecessors, (1583), 6 states have call successors, (6), 1 states have call predecessors, (6), 1 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-06 20:23:46,405 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1112 states to 1112 states and 1595 transitions. [2025-02-06 20:23:46,405 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1112 states and 1595 transitions. [2025-02-06 20:23:46,406 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-02-06 20:23:46,406 INFO L432 stractBuchiCegarLoop]: Abstraction has 1112 states and 1595 transitions. [2025-02-06 20:23:46,406 INFO L338 stractBuchiCegarLoop]: ======== Iteration 21 ============ [2025-02-06 20:23:46,406 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1112 states and 1595 transitions. [2025-02-06 20:23:46,409 INFO L131 ngComponentsAnalysis]: Automaton has 11 accepting balls. 671 [2025-02-06 20:23:46,409 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-06 20:23:46,409 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-06 20:23:46,410 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1] [2025-02-06 20:23:46,410 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-06 20:23:46,410 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(22, 2);~count_int_int~0 := 0;" "assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~mem5#1, main_#t~malloc6#1.base, main_#t~malloc6#1.offset, main_#t~mem7#1, main_#t~mem8#1, main_#t~mem9#1, main_#t~mem10#1, main_#t~mem12#1, main_#t~mem11#1, main_#t~mem13#1, main_#t~mem14#1, main_#t~mem16#1, main_#t~mem15#1, main_#t~mem17#1, main_#t~mem18#1, main_#t~mem20#1, main_#t~mem19#1, main_#t~mem21#1, main_#t~mem22#1, main_#t~bitwise23#1, main_#t~bitwise24#1, main_#t~bitwise25#1, main_#t~bitwise26#1, main_#t~bitwise27#1, main_#t~bitwise28#1, main_#t~bitwise29#1, main_#t~bitwise30#1, main_#t~bitwise31#1, main_#t~switch32#1, main_#t~mem33#1, main_#t~mem34#1, main_#t~mem35#1, main_#t~mem36#1, main_#t~mem37#1, main_#t~mem38#1, main_#t~mem39#1, main_#t~mem40#1, main_#t~mem41#1, main_#t~mem42#1, main_#t~mem43#1, main_#t~bitwise44#1, main_#t~bitwise45#1, main_#t~bitwise46#1, main_#t~bitwise47#1, main_#t~bitwise48#1, main_#t~bitwise49#1, main_#t~bitwise50#1, main_#t~bitwise51#1, main_#t~bitwise52#1, main_~_hj_i~0#1, main_~_hj_j~0#1, main_~_hj_k~0#1, main_~_hj_key~0#1.base, main_~_hj_key~0#1.offset, main_#t~malloc53#1.base, main_#t~malloc53#1.offset, main_#t~mem54#1.base, main_#t~mem54#1.offset, main_#t~mem55#1.base, main_#t~mem55#1.offset, main_#t~memset~res56#1.base, main_#t~memset~res56#1.offset, main_#t~mem57#1.base, main_#t~mem57#1.offset, main_#t~mem58#1.base, main_#t~mem58#1.offset, main_#t~mem59#1.base, main_#t~mem59#1.offset, main_#t~mem60#1.base, main_#t~mem60#1.offset, main_#t~mem61#1.base, main_#t~mem61#1.offset, main_#t~malloc62#1.base, main_#t~malloc62#1.offset, main_#t~mem63#1.base, main_#t~mem63#1.offset, main_#t~mem64#1.base, main_#t~mem64#1.offset, main_#t~mem65#1.base, main_#t~mem65#1.offset, main_#t~mem66#1.base, main_#t~mem66#1.offset, main_#t~mem67#1.base, main_#t~mem67#1.offset, main_#t~mem68#1.base, main_#t~mem68#1.offset, main_#t~memset~res69#1.base, main_#t~memset~res69#1.offset, main_#t~mem70#1.base, main_#t~mem70#1.offset, main_#t~mem71#1.base, main_#t~mem71#1.offset, main_#t~mem72#1.base, main_#t~mem72#1.offset, main_#t~mem73#1.base, main_#t~mem73#1.offset, main_#t~mem74#1, main_#t~mem75#1.base, main_#t~mem75#1.offset, main_#t~mem76#1.base, main_#t~mem76#1.offset, main_#t~mem77#1.base, main_#t~mem77#1.offset, main_#t~mem78#1.base, main_#t~mem78#1.offset, main_#t~mem79#1, main_#t~post80#1, main_#t~mem81#1.base, main_#t~mem81#1.offset, main_#t~mem82#1, main_#t~bitwise83#1, main_#t~mem84#1.base, main_#t~mem84#1.offset, main_#t~mem85#1.base, main_#t~mem85#1.offset, main_#t~mem86#1, main_#t~post87#1, main_#t~mem88#1.base, main_#t~mem88#1.offset, main_#t~mem89#1.base, main_#t~mem89#1.offset, main_#t~mem90#1.base, main_#t~mem90#1.offset, main_#t~mem92#1, main_#t~mem91#1, main_#t~mem93#1.base, main_#t~mem93#1.offset, main_#t~mem94#1, main_#t~short95#1, main_#t~mem96#1.base, main_#t~mem96#1.offset, main_#t~mem97#1, main_#t~malloc98#1.base, main_#t~malloc98#1.offset, main_#t~mem99#1.base, main_#t~mem99#1.offset, main_#t~mem100#1, main_#t~memset~res101#1.base, main_#t~memset~res101#1.offset, main_#t~mem102#1.base, main_#t~mem102#1.offset, main_#t~mem103#1.base, main_#t~mem103#1.offset, main_#t~mem106#1, main_#t~mem104#1.base, main_#t~mem104#1.offset, main_#t~mem105#1, main_#t~bitwise107#1, main_#t~mem108#1.base, main_#t~mem108#1.offset, main_#t~mem111#1, main_#t~mem109#1.base, main_#t~mem109#1.offset, main_#t~mem110#1, main_#t~bitwise112#1, main_#t~mem113#1.base, main_#t~mem113#1.offset, main_#t~mem114#1.base, main_#t~mem114#1.offset, main_#t~mem115#1, main_#t~mem116#1.base, main_#t~mem116#1.offset, main_#t~mem117#1.base, main_#t~mem117#1.offset, main_#t~mem118#1.base, main_#t~mem118#1.offset, main_#t~mem119#1.base, main_#t~mem119#1.offset, main_#t~mem122#1, main_#t~mem120#1.base, main_#t~mem120#1.offset, main_#t~mem121#1, main_#t~bitwise123#1, main_#t~mem124#1, main_#t~pre125#1, main_#t~mem126#1.base, main_#t~mem126#1.offset, main_#t~mem127#1, main_#t~mem128#1.base, main_#t~mem128#1.offset, main_#t~mem129#1, main_#t~post130#1, main_#t~mem134#1, main_#t~mem132#1, main_#t~mem131#1.base, main_#t~mem131#1.offset, main_#t~mem133#1, main_#t~mem135#1, main_#t~post136#1, main_#t~mem137#1.base, main_#t~mem137#1.offset, main_#t~mem138#1.base, main_#t~mem138#1.offset, main_#t~mem139#1.base, main_#t~mem139#1.offset, main_#t~post140#1, main_#t~mem141#1.base, main_#t~mem141#1.offset, main_#t~mem142#1.base, main_#t~mem142#1.offset, main_#t~mem143#1.base, main_#t~mem143#1.offset, main_#t~mem144#1, main_#t~mem145#1.base, main_#t~mem145#1.offset, main_#t~mem146#1, main_#t~post147#1, main_#t~mem148#1.base, main_#t~mem148#1.offset, main_#t~mem149#1.base, main_#t~mem149#1.offset, main_#t~mem150#1.base, main_#t~mem150#1.offset, main_#t~mem153#1, main_#t~mem151#1.base, main_#t~mem151#1.offset, main_#t~mem152#1, main_#t~ite156#1, main_#t~mem154#1.base, main_#t~mem154#1.offset, main_#t~mem155#1, main_#t~mem157#1.base, main_#t~mem157#1.offset, main_#t~mem158#1, main_#t~mem159#1.base, main_#t~mem159#1.offset, main_~_he_bkt~0#1, main_~_he_bkt_i~0#1, main_~_he_thh~0#1.base, main_~_he_thh~0#1.offset, main_~_he_hh_nxt~0#1.base, main_~_he_hh_nxt~0#1.offset, main_~_he_new_buckets~0#1.base, main_~_he_new_buckets~0#1.offset, main_~_he_newbkt~0#1.base, main_~_he_newbkt~0#1.offset, main_~_ha_head~0#1.base, main_~_ha_head~0#1.offset, main_~_ha_bkt~0#1, main_~_ha_hashv~0#1, main_#t~mem161#1, main_#t~mem160#1, main_#t~mem162#1, main_#t~mem163#1, main_#t~mem165#1, main_#t~mem164#1, main_#t~mem166#1, main_#t~mem167#1, main_#t~mem169#1, main_#t~mem168#1, main_#t~mem170#1, main_#t~mem171#1, main_#t~bitwise172#1, main_#t~bitwise173#1, main_#t~bitwise174#1, main_#t~bitwise175#1, main_#t~bitwise176#1, main_#t~bitwise177#1, main_#t~bitwise178#1, main_#t~bitwise179#1, main_#t~bitwise180#1, main_#t~switch181#1, main_#t~mem182#1, main_#t~mem183#1, main_#t~mem184#1, main_#t~mem185#1, main_#t~mem186#1, main_#t~mem187#1, main_#t~mem188#1, main_#t~mem189#1, main_#t~mem190#1, main_#t~mem191#1, main_#t~mem192#1, main_#t~bitwise193#1, main_#t~bitwise194#1, main_#t~bitwise195#1, main_#t~bitwise196#1, main_#t~bitwise197#1, main_#t~bitwise198#1, main_#t~bitwise199#1, main_#t~bitwise200#1, main_#t~bitwise201#1, main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, main_#t~malloc202#1.base, main_#t~malloc202#1.offset, main_#t~mem203#1.base, main_#t~mem203#1.offset, main_#t~mem204#1.base, main_#t~mem204#1.offset, main_#t~memset~res205#1.base, main_#t~memset~res205#1.offset, main_#t~mem206#1.base, main_#t~mem206#1.offset, main_#t~mem207#1.base, main_#t~mem207#1.offset, main_#t~mem208#1.base, main_#t~mem208#1.offset, main_#t~mem209#1.base, main_#t~mem209#1.offset, main_#t~mem210#1.base, main_#t~mem210#1.offset, main_#t~malloc211#1.base, main_#t~malloc211#1.offset, main_#t~mem212#1.base, main_#t~mem212#1.offset, main_#t~mem213#1.base, main_#t~mem213#1.offset, main_#t~mem214#1.base, main_#t~mem214#1.offset, main_#t~mem215#1.base, main_#t~mem215#1.offset, main_#t~mem216#1.base, main_#t~mem216#1.offset, main_#t~mem217#1.base, main_#t~mem217#1.offset, main_#t~memset~res218#1.base, main_#t~memset~res218#1.offset, main_#t~mem219#1.base, main_#t~mem219#1.offset, main_#t~mem220#1.base, main_#t~mem220#1.offset, main_#t~mem221#1.base, main_#t~mem221#1.offset, main_#t~mem222#1.base, main_#t~mem222#1.offset, main_#t~mem223#1, main_#t~mem224#1.base, main_#t~mem224#1.offset, main_#t~mem225#1.base, main_#t~mem225#1.offset, main_#t~mem226#1.base, main_#t~mem226#1.offset, main_#t~mem227#1.base, main_#t~mem227#1.offset, main_#t~mem228#1, main_#t~post229#1, main_#t~mem230#1.base, main_#t~mem230#1.offset, main_#t~mem231#1, main_#t~bitwise232#1, main_#t~mem233#1.base, main_#t~mem233#1.offset, main_#t~mem234#1.base, main_#t~mem234#1.offset, main_#t~mem235#1, main_#t~post236#1, main_#t~mem237#1.base, main_#t~mem237#1.offset, main_#t~mem238#1.base, main_#t~mem238#1.offset, main_#t~mem239#1.base, main_#t~mem239#1.offset, main_#t~mem241#1, main_#t~mem240#1, main_#t~mem242#1.base, main_#t~mem242#1.offset, main_#t~mem243#1, main_#t~short244#1, main_#t~mem245#1.base, main_#t~mem245#1.offset, main_#t~mem246#1, main_#t~malloc247#1.base, main_#t~malloc247#1.offset, main_#t~mem248#1.base, main_#t~mem248#1.offset, main_#t~mem249#1, main_#t~memset~res250#1.base, main_#t~memset~res250#1.offset, main_#t~mem251#1.base, main_#t~mem251#1.offset, main_#t~mem252#1.base, main_#t~mem252#1.offset, main_#t~mem255#1, main_#t~mem253#1.base, main_#t~mem253#1.offset, main_#t~mem254#1, main_#t~bitwise256#1, main_#t~mem257#1.base, main_#t~mem257#1.offset, main_#t~mem260#1, main_#t~mem258#1.base, main_#t~mem258#1.offset, main_#t~mem259#1, main_#t~bitwise261#1, main_#t~mem262#1.base, main_#t~mem262#1.offset, main_#t~mem263#1.base, main_#t~mem263#1.offset, main_#t~mem264#1, main_#t~mem265#1.base, main_#t~mem265#1.offset, main_#t~mem266#1.base, main_#t~mem266#1.offset, main_#t~mem267#1.base, main_#t~mem267#1.offset, main_#t~mem268#1.base, main_#t~mem268#1.offset, main_#t~mem271#1, main_#t~mem269#1.base, main_#t~mem269#1.offset, main_#t~mem270#1, main_#t~bitwise272#1, main_#t~mem273#1, main_#t~pre274#1, main_#t~mem275#1.base, main_#t~mem275#1.offset, main_#t~mem276#1, main_#t~mem277#1.base, main_#t~mem277#1.offset, main_#t~mem278#1, main_#t~post279#1, main_#t~mem283#1, main_#t~mem281#1, main_#t~mem280#1.base, main_#t~mem280#1.offset, main_#t~mem282#1, main_#t~mem284#1, main_#t~post285#1, main_#t~mem286#1.base, main_#t~mem286#1.offset, main_#t~mem287#1.base, main_#t~mem287#1.offset, main_#t~mem288#1.base, main_#t~mem288#1.offset, main_#t~post289#1, main_#t~mem290#1.base, main_#t~mem290#1.offset, main_#t~mem291#1.base, main_#t~mem291#1.offset, main_#t~mem292#1.base, main_#t~mem292#1.offset, main_#t~mem293#1, main_#t~mem294#1.base, main_#t~mem294#1.offset, main_#t~mem295#1, main_#t~post296#1, main_#t~mem297#1.base, main_#t~mem297#1.offset, main_#t~mem298#1.base, main_#t~mem298#1.offset, main_#t~mem299#1.base, main_#t~mem299#1.offset, main_#t~mem302#1, main_#t~mem300#1.base, main_#t~mem300#1.offset, main_#t~mem301#1, main_#t~ite305#1, main_#t~mem303#1.base, main_#t~mem303#1.offset, main_#t~mem304#1, main_#t~mem306#1.base, main_#t~mem306#1.offset, main_#t~mem307#1, main_#t~mem308#1.base, main_#t~mem308#1.offset, main_~_he_bkt~1#1, main_~_he_bkt_i~1#1, main_~_he_thh~1#1.base, main_~_he_thh~1#1.offset, main_~_he_hh_nxt~1#1.base, main_~_he_hh_nxt~1#1.offset, main_~_he_new_buckets~1#1.base, main_~_he_new_buckets~1#1.offset, main_~_he_newbkt~1#1.base, main_~_he_newbkt~1#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, main_~_ha_bkt~1#1, main_~_ha_hashv~1#1, main_#t~mem309#1, main_#t~post310#1, main_#t~mem312#1, main_#t~mem311#1, main_#t~mem313#1, main_#t~mem314#1, main_#t~mem316#1, main_#t~mem315#1, main_#t~mem317#1, main_#t~mem318#1, main_#t~mem320#1, main_#t~mem319#1, main_#t~mem321#1, main_#t~mem322#1, main_#t~bitwise323#1, main_#t~bitwise324#1, main_#t~bitwise325#1, main_#t~bitwise326#1, main_#t~bitwise327#1, main_#t~bitwise328#1, main_#t~bitwise329#1, main_#t~bitwise330#1, main_#t~bitwise331#1, main_#t~switch332#1, main_#t~mem333#1, main_#t~mem334#1, main_#t~mem335#1, main_#t~mem336#1, main_#t~mem337#1, main_#t~mem338#1, main_#t~mem339#1, main_#t~mem340#1, main_#t~mem341#1, main_#t~mem342#1, main_#t~mem343#1, main_#t~bitwise344#1, main_#t~bitwise345#1, main_#t~bitwise346#1, main_#t~bitwise347#1, main_#t~bitwise348#1, main_#t~bitwise349#1, main_#t~bitwise350#1, main_#t~bitwise351#1, main_#t~bitwise352#1, main_~_hj_i~2#1, main_~_hj_j~2#1, main_~_hj_k~2#1, main_~_hj_key~2#1.base, main_~_hj_key~2#1.offset, main_#t~mem353#1.base, main_#t~mem353#1.offset, main_#t~mem354#1, main_#t~bitwise355#1, main_#t~mem356#1.base, main_#t~mem356#1.offset, main_#t~mem357#1.base, main_#t~mem357#1.offset, main_#t~mem358#1.base, main_#t~mem358#1.offset, main_#t~mem359#1.base, main_#t~mem359#1.offset, main_#t~mem360#1.base, main_#t~mem360#1.offset, main_#t~mem361#1.base, main_#t~mem361#1.offset, main_#t~mem362#1.base, main_#t~mem362#1.offset, main_#t~mem363#1, main_#t~mem364#1, main_#t~mem365#1, main_#t~short366#1, main_#t~mem367#1.base, main_#t~mem367#1.offset, main_#t~nondet368#1, main_#t~mem369#1.base, main_#t~mem369#1.offset, main_#t~mem370#1.base, main_#t~mem370#1.offset, main_#t~mem371#1.base, main_#t~mem371#1.offset, main_#t~mem372#1, main_~_hf_bkt~0#1, main_~_hf_hashv~0#1, main_#t~mem373#1, main_#t~mem375#1, main_#t~mem374#1, main_#t~mem376#1, main_#t~mem377#1, main_#t~mem379#1, main_#t~mem378#1, main_#t~mem380#1, main_#t~mem381#1, main_#t~mem383#1, main_#t~mem382#1, main_#t~mem384#1, main_#t~mem385#1, main_#t~bitwise386#1, main_#t~bitwise387#1, main_#t~bitwise388#1, main_#t~bitwise389#1, main_#t~bitwise390#1, main_#t~bitwise391#1, main_#t~bitwise392#1, main_#t~bitwise393#1, main_#t~bitwise394#1, main_#t~switch395#1, main_#t~mem396#1, main_#t~mem397#1, main_#t~mem398#1, main_#t~mem399#1, main_#t~mem400#1, main_#t~mem401#1, main_#t~mem402#1, main_#t~mem403#1, main_#t~mem404#1, main_#t~mem405#1, main_#t~mem406#1, main_#t~bitwise407#1, main_#t~bitwise408#1, main_#t~bitwise409#1, main_#t~bitwise410#1, main_#t~bitwise411#1, main_#t~bitwise412#1, main_#t~bitwise413#1, main_#t~bitwise414#1, main_#t~bitwise415#1, main_~_hj_i~3#1, main_~_hj_j~3#1, main_~_hj_k~3#1, main_~_hj_key~3#1.base, main_~_hj_key~3#1.offset, main_#t~mem416#1.base, main_#t~mem416#1.offset, main_#t~mem417#1, main_#t~bitwise418#1, main_#t~mem419#1.base, main_#t~mem419#1.offset, main_#t~mem420#1.base, main_#t~mem420#1.offset, main_#t~mem421#1.base, main_#t~mem421#1.offset, main_#t~mem422#1.base, main_#t~mem422#1.offset, main_#t~mem423#1.base, main_#t~mem423#1.offset, main_#t~mem424#1.base, main_#t~mem424#1.offset, main_#t~mem425#1.base, main_#t~mem425#1.offset, main_#t~mem426#1, main_#t~mem427#1, main_#t~mem428#1, main_#t~short429#1, main_#t~mem430#1.base, main_#t~mem430#1.offset, main_#t~nondet431#1, main_#t~mem432#1.base, main_#t~mem432#1.offset, main_#t~mem433#1.base, main_#t~mem433#1.offset, main_#t~mem434#1.base, main_#t~mem434#1.offset, main_#t~mem435#1, main_~_hf_bkt~1#1, main_~_hf_hashv~1#1, main_#t~mem436#1, main_#t~mem438#1, main_#t~mem437#1, main_#t~mem439#1, main_#t~mem440#1, main_#t~mem442#1, main_#t~mem441#1, main_#t~mem443#1, main_#t~mem444#1, main_#t~mem446#1, main_#t~mem445#1, main_#t~mem447#1, main_#t~mem448#1, main_#t~bitwise449#1, main_#t~bitwise450#1, main_#t~bitwise451#1, main_#t~bitwise452#1, main_#t~bitwise453#1, main_#t~bitwise454#1, main_#t~bitwise455#1, main_#t~bitwise456#1, main_#t~bitwise457#1, main_#t~switch458#1, main_#t~mem459#1, main_#t~mem460#1, main_#t~mem461#1, main_#t~mem462#1, main_#t~mem463#1, main_#t~mem464#1, main_#t~mem465#1, main_#t~mem466#1, main_#t~mem467#1, main_#t~mem468#1, main_#t~mem469#1, main_#t~bitwise470#1, main_#t~bitwise471#1, main_#t~bitwise472#1, main_#t~bitwise473#1, main_#t~bitwise474#1, main_#t~bitwise475#1, main_#t~bitwise476#1, main_#t~bitwise477#1, main_#t~bitwise478#1, main_~_hj_i~4#1, main_~_hj_j~4#1, main_~_hj_k~4#1, main_~_hj_key~4#1.base, main_~_hj_key~4#1.offset, main_#t~mem479#1.base, main_#t~mem479#1.offset, main_#t~mem480#1, main_#t~bitwise481#1, main_#t~mem482#1.base, main_#t~mem482#1.offset, main_#t~mem483#1.base, main_#t~mem483#1.offset, main_#t~mem484#1.base, main_#t~mem484#1.offset, main_#t~mem485#1.base, main_#t~mem485#1.offset, main_#t~mem486#1.base, main_#t~mem486#1.offset, main_#t~mem487#1.base, main_#t~mem487#1.offset, main_#t~mem488#1.base, main_#t~mem488#1.offset, main_#t~mem489#1, main_#t~mem490#1, main_#t~mem491#1, main_#t~short492#1, main_#t~mem493#1.base, main_#t~mem493#1.offset, main_#t~nondet494#1, main_#t~mem495#1.base, main_#t~mem495#1.offset, main_#t~mem496#1.base, main_#t~mem496#1.offset, main_#t~mem497#1.base, main_#t~mem497#1.offset, main_#t~mem498#1, main_~_hf_bkt~2#1, main_~_hf_hashv~2#1, main_#t~mem499#1, main_#t~mem501#1, main_#t~mem500#1, main_#t~mem502#1, main_#t~mem503#1, main_#t~mem505#1, main_#t~mem504#1, main_#t~mem506#1, main_#t~mem507#1, main_#t~mem509#1, main_#t~mem508#1, main_#t~mem510#1, main_#t~mem511#1, main_#t~bitwise512#1, main_#t~bitwise513#1, main_#t~bitwise514#1, main_#t~bitwise515#1, main_#t~bitwise516#1, main_#t~bitwise517#1, main_#t~bitwise518#1, main_#t~bitwise519#1, main_#t~bitwise520#1, main_#t~switch521#1, main_#t~mem522#1, main_#t~mem523#1, main_#t~mem524#1, main_#t~mem525#1, main_#t~mem526#1, main_#t~mem527#1, main_#t~mem528#1, main_#t~mem529#1, main_#t~mem530#1, main_#t~mem531#1, main_#t~mem532#1, main_#t~bitwise533#1, main_#t~bitwise534#1, main_#t~bitwise535#1, main_#t~bitwise536#1, main_#t~bitwise537#1, main_#t~bitwise538#1, main_#t~bitwise539#1, main_#t~bitwise540#1, main_#t~bitwise541#1, main_~_hj_i~5#1, main_~_hj_j~5#1, main_~_hj_k~5#1, main_~_hj_key~5#1.base, main_~_hj_key~5#1.offset, main_#t~mem542#1.base, main_#t~mem542#1.offset, main_#t~mem543#1, main_#t~bitwise544#1, main_#t~mem545#1.base, main_#t~mem545#1.offset, main_#t~mem546#1.base, main_#t~mem546#1.offset, main_#t~mem547#1.base, main_#t~mem547#1.offset, main_#t~mem548#1.base, main_#t~mem548#1.offset, main_#t~mem549#1.base, main_#t~mem549#1.offset, main_#t~mem550#1.base, main_#t~mem550#1.offset, main_#t~mem551#1.base, main_#t~mem551#1.offset, main_#t~mem552#1, main_#t~mem553#1, main_#t~mem554#1, main_#t~short555#1, main_#t~mem556#1.base, main_#t~mem556#1.offset, main_#t~nondet557#1, main_#t~mem558#1.base, main_#t~mem558#1.offset, main_#t~mem559#1.base, main_#t~mem559#1.offset, main_#t~mem560#1.base, main_#t~mem560#1.offset, main_#t~mem561#1, main_~_hf_bkt~3#1, main_~_hf_hashv~3#1, main_#t~mem562#1, main_#t~ite564#1.base, main_#t~ite564#1.offset, main_#t~mem563#1.base, main_#t~mem563#1.offset, main_#t~mem565#1.base, main_#t~mem565#1.offset, main_#t~mem566#1.base, main_#t~mem566#1.offset, main_#t~short567#1, main_#t~mem568#1.base, main_#t~mem568#1.offset, main_#t~mem569#1.base, main_#t~mem569#1.offset, main_#t~mem570#1.base, main_#t~mem570#1.offset, main_#t~mem571#1.base, main_#t~mem571#1.offset, main_#t~mem572#1.base, main_#t~mem572#1.offset, main_#t~mem573#1.base, main_#t~mem573#1.offset, main_#t~mem574#1.base, main_#t~mem574#1.offset, main_#t~mem575#1.base, main_#t~mem575#1.offset, main_#t~mem576#1, main_#t~mem577#1.base, main_#t~mem577#1.offset, main_#t~mem578#1.base, main_#t~mem578#1.offset, main_#t~mem579#1.base, main_#t~mem579#1.offset, main_#t~mem580#1, main_#t~mem581#1.base, main_#t~mem581#1.offset, main_#t~mem582#1.base, main_#t~mem582#1.offset, main_#t~mem583#1.base, main_#t~mem583#1.offset, main_#t~mem584#1.base, main_#t~mem584#1.offset, main_#t~mem585#1.base, main_#t~mem585#1.offset, main_#t~mem586#1, main_#t~mem587#1.base, main_#t~mem587#1.offset, main_#t~mem590#1, main_#t~mem588#1.base, main_#t~mem588#1.offset, main_#t~mem589#1, main_#t~bitwise591#1, main_#t~mem592#1.base, main_#t~mem592#1.offset, main_#t~mem593#1.base, main_#t~mem593#1.offset, main_#t~mem594#1, main_#t~post595#1, main_#t~mem596#1.base, main_#t~mem596#1.offset, main_#t~mem597#1.base, main_#t~mem597#1.offset, main_#t~mem598#1.base, main_#t~mem598#1.offset, main_#t~mem599#1.base, main_#t~mem599#1.offset, main_#t~mem600#1.base, main_#t~mem600#1.offset, main_#t~mem601#1.base, main_#t~mem601#1.offset, main_#t~mem602#1.base, main_#t~mem602#1.offset, main_#t~mem603#1.base, main_#t~mem603#1.offset, main_~_hd_head~0#1.base, main_~_hd_head~0#1.offset, main_#t~mem604#1.base, main_#t~mem604#1.offset, main_#t~mem605#1, main_#t~post606#1, main_~_hd_bkt~0#1, main_~_hd_hh_del~0#1.base, main_~_hd_hh_del~0#1.offset, main_#t~mem607#1.base, main_#t~mem607#1.offset, main_#t~mem608#1.base, main_#t~mem608#1.offset, main_#t~short609#1, main_#t~mem610#1.base, main_#t~mem610#1.offset, main_#t~mem611#1.base, main_#t~mem611#1.offset, main_#t~mem612#1.base, main_#t~mem612#1.offset, main_#t~mem613#1.base, main_#t~mem613#1.offset, main_#t~mem614#1.base, main_#t~mem614#1.offset, main_#t~mem615#1.base, main_#t~mem615#1.offset, main_#t~mem616#1.base, main_#t~mem616#1.offset, main_#t~mem617#1.base, main_#t~mem617#1.offset, main_#t~mem618#1, main_#t~mem619#1.base, main_#t~mem619#1.offset, main_#t~mem620#1.base, main_#t~mem620#1.offset, main_#t~mem621#1.base, main_#t~mem621#1.offset, main_#t~mem622#1, main_#t~mem623#1.base, main_#t~mem623#1.offset, main_#t~mem624#1.base, main_#t~mem624#1.offset, main_#t~mem625#1.base, main_#t~mem625#1.offset, main_#t~mem626#1.base, main_#t~mem626#1.offset, main_#t~mem627#1.base, main_#t~mem627#1.offset, main_#t~mem628#1, main_#t~mem629#1.base, main_#t~mem629#1.offset, main_#t~mem632#1, main_#t~mem630#1.base, main_#t~mem630#1.offset, main_#t~mem631#1, main_#t~bitwise633#1, main_#t~mem634#1.base, main_#t~mem634#1.offset, main_#t~mem635#1.base, main_#t~mem635#1.offset, main_#t~mem636#1, main_#t~post637#1, main_#t~mem638#1.base, main_#t~mem638#1.offset, main_#t~mem639#1.base, main_#t~mem639#1.offset, main_#t~mem640#1.base, main_#t~mem640#1.offset, main_#t~mem641#1.base, main_#t~mem641#1.offset, main_#t~mem642#1.base, main_#t~mem642#1.offset, main_#t~mem643#1.base, main_#t~mem643#1.offset, main_#t~mem644#1.base, main_#t~mem644#1.offset, main_#t~mem645#1.base, main_#t~mem645#1.offset, main_~_hd_head~1#1.base, main_~_hd_head~1#1.offset, main_#t~mem646#1.base, main_#t~mem646#1.offset, main_#t~mem647#1, main_#t~post648#1, main_~_hd_bkt~1#1, main_~_hd_hh_del~1#1.base, main_~_hd_hh_del~1#1.offset, main_~usertmp~0#1.base, main_~usertmp~0#1.offset, main_~userstmp~0#1.base, main_~userstmp~0#1.offset, main_#t~ite650#1.base, main_#t~ite650#1.offset, main_#t~mem649#1.base, main_#t~mem649#1.offset, main_~#i~0#1.base, main_~#i~0#1.offset, main_~user~0#1.base, main_~user~0#1.offset, main_~tmp~0#1.base, main_~tmp~0#1.offset, main_~users~0#1.base, main_~users~0#1.offset, main_~altusers~0#1.base, main_~altusers~0#1.offset, main_~temp~0#1.base, main_~temp~0#1.offset;call main_~#i~0#1.base, main_~#i~0#1.offset := #Ultimate.allocOnStack(4);havoc main_~user~0#1.base, main_~user~0#1.offset;havoc main_~tmp~0#1.base, main_~tmp~0#1.offset;main_~users~0#1.base, main_~users~0#1.offset := 0, 0;main_~altusers~0#1.base, main_~altusers~0#1.offset := 0, 0;call write~int#1(0, main_~#i~0#1.base, main_~#i~0#1.offset, 4);" [2025-02-06 20:23:46,410 INFO L754 eck$LassoCheckResult]: Loop: "assume true;call main_#t~mem5#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume main_#t~mem5#1 < 1000;havoc main_#t~mem5#1;call main_#t~malloc6#1.base, main_#t~malloc6#1.offset := #Ultimate.allocOnHeap(72);main_~user~0#1.base, main_~user~0#1.offset := main_#t~malloc6#1.base, main_#t~malloc6#1.offset;havoc main_#t~malloc6#1.base, main_#t~malloc6#1.offset;" "assume !(main_~user~0#1.base == 0 && main_~user~0#1.offset == 0);" "call main_#t~mem7#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem7#1, main_~user~0#1.base, main_~user~0#1.offset, 4);havoc main_#t~mem7#1;call main_#t~mem8#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call main_#t~mem9#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);call write~int#2(main_#t~mem8#1 * main_#t~mem9#1, main_~user~0#1.base, 4 + main_~user~0#1.offset, 4);havoc main_#t~mem8#1;havoc main_#t~mem9#1;call main_#t~mem10#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);" "assume !(main_#t~mem10#1 < 10);havoc main_#t~mem10#1;" "assume true;havoc main_~_ha_hashv~1#1;" "assume true;" "assume true;havoc main_~_hj_i~1#1;havoc main_~_hj_j~1#1;havoc main_~_hj_k~1#1;main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset := main_~user~0#1.base, main_~user~0#1.offset;main_~_ha_hashv~1#1 := 4276993775;main_~_hj_j~1#1 := 2654435769;main_~_hj_i~1#1 := main_~_hj_j~1#1;main_~_hj_k~1#1 := 4;" "assume !(main_~_hj_k~1#1 % 4294967296 >= 12);main_~_ha_hashv~1#1 := 4 + main_~_ha_hashv~1#1;main_#t~switch181#1 := 11 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 10 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 9 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 8 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 7 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 6 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 5 == main_~_hj_k~1#1;" "assume !main_#t~switch181#1;" "main_#t~switch181#1 := main_#t~switch181#1 || 4 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem189#1 := read~int#2(main_~_hj_key~1#1.base, 3 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 16777216 * (main_#t~mem189#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 3 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem190#1 := read~int#2(main_~_hj_key~1#1.base, 2 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 65536 * (main_#t~mem190#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 2 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem191#1 := read~int#2(main_~_hj_key~1#1.base, 1 + main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + 256 * (main_#t~mem191#1 % 256 % 4294967296);" "main_#t~switch181#1 := main_#t~switch181#1 || 1 == main_~_hj_k~1#1;" "assume main_#t~switch181#1;call main_#t~mem192#1 := read~int#2(main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset, 1);main_~_hj_i~1#1 := main_~_hj_i~1#1 + (if main_#t~mem192#1 % 256 % 4294967296 <= 2147483647 then main_#t~mem192#1 % 256 % 4294967296 else main_#t~mem192#1 % 256 % 4294967296 - 4294967296);" "havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;havoc main_#t~switch181#1;havoc main_#t~mem182#1;havoc main_#t~mem183#1;havoc main_#t~mem184#1;havoc main_#t~mem185#1;havoc main_#t~mem186#1;havoc main_#t~mem187#1;havoc main_#t~mem188#1;havoc main_#t~mem189#1;havoc main_#t~mem190#1;havoc main_#t~mem191#1;havoc main_#t~mem192#1;" "assume true;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume !(0 == main_~_hj_i~1#1 % 4294967296);" "assume !(0 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "assume !(main_~_hj_i~1#1 % 4294967296 == main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296);" "havoc main_#t~bitwise193#1;assume main_#t~bitwise193#1 % 4294967296 <= main_~_hj_i~1#1 % 4294967296 + main_~_ha_hashv~1#1 % 4294967296 / 8192 % 4294967296;" "main_~_hj_i~1#1 := main_#t~bitwise193#1;havoc main_#t~bitwise193#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume !(0 == main_~_hj_j~1#1 % 4294967296);" "assume !(0 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "assume !(main_~_hj_j~1#1 % 4294967296 == 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296);" "havoc main_#t~bitwise194#1;assume main_#t~bitwise194#1 % 4294967296 <= main_~_hj_j~1#1 % 4294967296 + 256 * (main_~_hj_i~1#1 % 4294967296) % 4294967296;" "main_~_hj_j~1#1 := main_#t~bitwise194#1;havoc main_#t~bitwise194#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise195#1 := main_~_hj_j~1#1 % 4294967296 / 8192;" "main_~_ha_hashv~1#1 := main_#t~bitwise195#1;havoc main_#t~bitwise195#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise196#1 := main_~_ha_hashv~1#1 % 4294967296 / 4096;" "main_~_hj_i~1#1 := main_#t~bitwise196#1;havoc main_#t~bitwise196#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise197#1 := 65536 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise197#1;havoc main_#t~bitwise197#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise198#1 := main_~_hj_j~1#1 % 4294967296 / 32;" "main_~_ha_hashv~1#1 := main_#t~bitwise198#1;havoc main_#t~bitwise198#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_hj_j~1#1;main_~_hj_i~1#1 := main_~_hj_i~1#1 - main_~_ha_hashv~1#1;" "assume 0 == main_~_hj_i~1#1 % 4294967296;main_#t~bitwise199#1 := main_~_ha_hashv~1#1 % 4294967296 / 8;" "main_~_hj_i~1#1 := main_#t~bitwise199#1;havoc main_#t~bitwise199#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_ha_hashv~1#1;main_~_hj_j~1#1 := main_~_hj_j~1#1 - main_~_hj_i~1#1;" "assume 0 == main_~_hj_j~1#1 % 4294967296;main_#t~bitwise200#1 := 1024 * (main_~_hj_i~1#1 % 4294967296);" "main_~_hj_j~1#1 := main_#t~bitwise200#1;havoc main_#t~bitwise200#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_i~1#1;main_~_ha_hashv~1#1 := main_~_ha_hashv~1#1 - main_~_hj_j~1#1;" "assume 0 == main_~_ha_hashv~1#1 % 4294967296;main_#t~bitwise201#1 := main_~_hj_j~1#1 % 4294967296 / 32768;" "main_~_ha_hashv~1#1 := main_#t~bitwise201#1;havoc main_#t~bitwise201#1;" "assume !false;" "havoc main_~_hj_i~1#1, main_~_hj_j~1#1, main_~_hj_k~1#1, main_~_hj_key~1#1.base, main_~_hj_key~1#1.offset;" "assume !false;" "assume !false;" "assume true;call write~int#2(main_~_ha_hashv~1#1, main_~user~0#1.base, 68 + main_~user~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_~user~0#1.base, 60 + main_~user~0#1.offset, 4);call write~int#2(4, main_~user~0#1.base, 64 + main_~user~0#1.offset, 4);" "assume !(main_~altusers~0#1.base == 0 && main_~altusers~0#1.offset == 0);call main_#t~mem219#1.base, main_#t~mem219#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_#t~mem219#1.base, main_#t~mem219#1.offset, main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);havoc main_#t~mem219#1.base, main_#t~mem219#1.offset;" "assume true;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 48 + main_~user~0#1.offset, 4);call main_#t~mem220#1.base, main_#t~mem220#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem221#1.base, main_#t~mem221#1.offset := read~$Pointer$#2(main_#t~mem220#1.base, 16 + main_#t~mem220#1.offset, 4);call main_#t~mem222#1.base, main_#t~mem222#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem223#1 := read~int#2(main_#t~mem222#1.base, 20 + main_#t~mem222#1.offset, 4);call write~$Pointer$#2(main_#t~mem221#1.base, main_#t~mem221#1.offset - main_#t~mem223#1, main_~user~0#1.base, 44 + main_~user~0#1.offset, 4);havoc main_#t~mem220#1.base, main_#t~mem220#1.offset;havoc main_#t~mem221#1.base, main_#t~mem221#1.offset;havoc main_#t~mem222#1.base, main_#t~mem222#1.offset;havoc main_#t~mem223#1;call main_#t~mem224#1.base, main_#t~mem224#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem225#1.base, main_#t~mem225#1.offset := read~$Pointer$#2(main_#t~mem224#1.base, 16 + main_#t~mem224#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, main_~user~0#1.offset, main_#t~mem225#1.base, 8 + main_#t~mem225#1.offset, 4);havoc main_#t~mem224#1.base, main_#t~mem224#1.offset;havoc main_#t~mem225#1.base, main_#t~mem225#1.offset;call main_#t~mem226#1.base, main_#t~mem226#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem226#1.base, 16 + main_#t~mem226#1.offset, 4);havoc main_#t~mem226#1.base, main_#t~mem226#1.offset;" "assume !false;" "assume true;havoc main_~_ha_bkt~1#1;call main_#t~mem227#1.base, main_#t~mem227#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem228#1 := read~int#2(main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);main_#t~post229#1 := main_#t~mem228#1;call write~int#2(1 + main_#t~post229#1, main_#t~mem227#1.base, 12 + main_#t~mem227#1.offset, 4);havoc main_#t~mem227#1.base, main_#t~mem227#1.offset;havoc main_#t~mem228#1;havoc main_#t~post229#1;" "assume true;call main_#t~mem230#1.base, main_#t~mem230#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem231#1 := read~int#2(main_#t~mem230#1.base, 4 + main_#t~mem230#1.offset, 4);" "assume 0 == main_~_ha_hashv~1#1 % 4294967296 || 0 == (main_#t~mem231#1 - 1) % 4294967296;main_#t~bitwise232#1 := 0;" "main_~_ha_bkt~1#1 := main_#t~bitwise232#1;havoc main_#t~mem230#1.base, main_#t~mem230#1.offset;havoc main_#t~mem231#1;havoc main_#t~bitwise232#1;" "assume !false;" "assume true;call main_#t~mem233#1.base, main_#t~mem233#1.offset := read~$Pointer$#2(main_~altusers~0#1.base, 40 + main_~altusers~0#1.offset, 4);call main_#t~mem234#1.base, main_#t~mem234#1.offset := read~$Pointer$#2(main_#t~mem233#1.base, main_#t~mem233#1.offset, 4);main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset := main_#t~mem234#1.base, main_#t~mem234#1.offset + 12 * (if main_~_ha_bkt~1#1 % 4294967296 % 4294967296 <= 2147483647 then main_~_ha_bkt~1#1 % 4294967296 % 4294967296 else main_~_ha_bkt~1#1 % 4294967296 % 4294967296 - 4294967296);havoc main_#t~mem233#1.base, main_#t~mem233#1.offset;havoc main_#t~mem234#1.base, main_#t~mem234#1.offset;call main_#t~mem235#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);main_#t~post236#1 := main_#t~mem235#1;call write~int#2(1 + main_#t~post236#1, main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);havoc main_#t~mem235#1;havoc main_#t~post236#1;call main_#t~mem237#1.base, main_#t~mem237#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_#t~mem237#1.base, main_#t~mem237#1.offset, main_~user~0#1.base, 56 + main_~user~0#1.offset, 4);havoc main_#t~mem237#1.base, main_#t~mem237#1.offset;call write~$Pointer$#2(0, 0, main_~user~0#1.base, 52 + main_~user~0#1.offset, 4);call main_#t~mem238#1.base, main_#t~mem238#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);" "assume main_#t~mem238#1.base != 0 || main_#t~mem238#1.offset != 0;havoc main_#t~mem238#1.base, main_#t~mem238#1.offset;call main_#t~mem239#1.base, main_#t~mem239#1.offset := read~$Pointer$#2(main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_#t~mem239#1.base, 12 + main_#t~mem239#1.offset, 4);havoc main_#t~mem239#1.base, main_#t~mem239#1.offset;" "call write~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset, 4);call main_#t~mem241#1 := read~int#2(main_~_ha_head~1#1.base, 4 + main_~_ha_head~1#1.offset, 4);call main_#t~mem240#1 := read~int#2(main_~_ha_head~1#1.base, 8 + main_~_ha_head~1#1.offset, 4);main_#t~short244#1 := main_#t~mem241#1 % 4294967296 >= 10 * (1 + main_#t~mem240#1) % 4294967296;" "assume main_#t~short244#1;call main_#t~mem242#1.base, main_#t~mem242#1.offset := read~$Pointer$#2(main_~user~0#1.base, 40 + main_~user~0#1.offset, 4);call main_#t~mem243#1 := read~int#2(main_#t~mem242#1.base, 36 + main_#t~mem242#1.offset, 4);main_#t~short244#1 := 0 == main_#t~mem243#1 % 4294967296;" "assume !main_#t~short244#1;havoc main_#t~mem241#1;havoc main_#t~mem240#1;havoc main_#t~mem242#1.base, main_#t~mem242#1.offset;havoc main_#t~mem243#1;havoc main_#t~short244#1;" "havoc main_~_ha_head~1#1.base, main_~_ha_head~1#1.offset;" "assume !false;" "havoc main_~_ha_bkt~1#1;" "assume !false;" "assume !false;" "havoc main_~_ha_hashv~1#1;" "assume !false;" "call main_#t~mem309#1 := read~int#1(main_~#i~0#1.base, main_~#i~0#1.offset, 4);main_#t~post310#1 := main_#t~mem309#1;call write~int#1(1 + main_#t~post310#1, main_~#i~0#1.base, main_~#i~0#1.offset, 4);havoc main_#t~mem309#1;havoc main_#t~post310#1;" [2025-02-06 20:23:46,411 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:46,411 INFO L85 PathProgramCache]: Analyzing trace with hash 65760, now seen corresponding path program 21 times [2025-02-06 20:23:46,411 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:46,411 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [285994333] [2025-02-06 20:23:46,411 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-06 20:23:46,411 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:46,421 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:23:46,422 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:46,422 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-06 20:23:46,422 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:46,422 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-06 20:23:46,426 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-06 20:23:46,427 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-06 20:23:46,427 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:46,427 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-06 20:23:46,434 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-06 20:23:46,435 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-06 20:23:46,435 INFO L85 PathProgramCache]: Analyzing trace with hash 666979319, now seen corresponding path program 1 times [2025-02-06 20:23:46,435 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-06 20:23:46,435 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [471805533] [2025-02-06 20:23:46,435 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-06 20:23:46,435 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-06 20:23:46,467 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 82 statements into 1 equivalence classes. [2025-02-06 20:23:46,571 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 82 of 82 statements. [2025-02-06 20:23:46,571 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-06 20:23:46,571 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-06 20:24:03,667 WARN L286 SmtUtils]: Spent 12.01s on a formula simplification that was a NOOP. DAG size: 32 (called from [L 728] de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher.simplify)