./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_arrays_bpbs_p3.c --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version c00e63dc Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_arrays_bpbs_p3.c -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 404ac2bd3423bef5ce605181ef24be34b1a7af016e0b24dd5c9fcdb327055474 --- Real Ultimate output --- This is Ultimate 0.3.0-?-c00e63d-m [2025-02-05 20:13:06,377 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-02-05 20:13:06,436 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Default.epf [2025-02-05 20:13:06,440 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-02-05 20:13:06,442 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-02-05 20:13:06,460 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-02-05 20:13:06,460 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-02-05 20:13:06,460 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-02-05 20:13:06,460 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-02-05 20:13:06,460 INFO L153 SettingsManager]: * Use memory slicer=true [2025-02-05 20:13:06,460 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2025-02-05 20:13:06,460 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2025-02-05 20:13:06,461 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-02-05 20:13:06,461 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-02-05 20:13:06,461 INFO L153 SettingsManager]: * Use SBE=true [2025-02-05 20:13:06,461 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-02-05 20:13:06,461 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2025-02-05 20:13:06,461 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-02-05 20:13:06,461 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-02-05 20:13:06,461 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2025-02-05 20:13:06,461 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2025-02-05 20:13:06,461 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2025-02-05 20:13:06,461 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-02-05 20:13:06,461 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-02-05 20:13:06,461 INFO L153 SettingsManager]: * Use constant arrays=true [2025-02-05 20:13:06,463 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-02-05 20:13:06,463 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-02-05 20:13:06,463 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-02-05 20:13:06,463 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-02-05 20:13:06,463 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-02-05 20:13:06,463 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-02-05 20:13:06,464 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2025-02-05 20:13:06,464 INFO L153 SettingsManager]: * Compute procedure contracts=false [2025-02-05 20:13:06,464 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2025-02-05 20:13:06,464 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-02-05 20:13:06,464 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2025-02-05 20:13:06,464 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2025-02-05 20:13:06,464 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2025-02-05 20:13:06,464 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2025-02-05 20:13:06,464 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2025-02-05 20:13:06,464 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 404ac2bd3423bef5ce605181ef24be34b1a7af016e0b24dd5c9fcdb327055474 [2025-02-05 20:13:06,661 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-02-05 20:13:06,676 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-02-05 20:13:06,677 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-02-05 20:13:06,682 INFO L270 PluginConnector]: Initializing CDTParser... [2025-02-05 20:13:06,682 INFO L274 PluginConnector]: CDTParser initialized [2025-02-05 20:13:06,682 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_arrays_bpbs_p3.c [2025-02-05 20:13:07,812 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/6b60eafcb/1cb6cf69c41741a2a8db64f730ed2b72/FLAG9816c2716 [2025-02-05 20:13:08,263 INFO L384 CDTParser]: Found 1 translation units. [2025-02-05 20:13:08,263 INFO L180 CDTParser]: Scanning /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_arrays_bpbs_p3.c [2025-02-05 20:13:08,274 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/6b60eafcb/1cb6cf69c41741a2a8db64f730ed2b72/FLAG9816c2716 [2025-02-05 20:13:08,284 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/6b60eafcb/1cb6cf69c41741a2a8db64f730ed2b72 [2025-02-05 20:13:08,286 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-02-05 20:13:08,287 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-02-05 20:13:08,288 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-02-05 20:13:08,288 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-02-05 20:13:08,291 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-02-05 20:13:08,292 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 05.02 08:13:08" (1/1) ... [2025-02-05 20:13:08,293 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6dbac680 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 08:13:08, skipping insertion in model container [2025-02-05 20:13:08,293 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 05.02 08:13:08" (1/1) ... [2025-02-05 20:13:08,339 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-02-05 20:13:08,446 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_arrays_bpbs_p3.c[1258,1271] [2025-02-05 20:13:08,695 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-05 20:13:08,702 INFO L200 MainTranslator]: Completed pre-run [2025-02-05 20:13:08,709 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_arrays_bpbs_p3.c[1258,1271] [2025-02-05 20:13:08,851 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-05 20:13:08,861 INFO L204 MainTranslator]: Completed translation [2025-02-05 20:13:08,862 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 08:13:08 WrapperNode [2025-02-05 20:13:08,862 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-02-05 20:13:08,863 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-02-05 20:13:08,863 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-02-05 20:13:08,863 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-02-05 20:13:08,867 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 08:13:08" (1/1) ... [2025-02-05 20:13:08,917 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 08:13:08" (1/1) ... [2025-02-05 20:13:09,224 INFO L138 Inliner]: procedures = 17, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 4446 [2025-02-05 20:13:09,224 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-02-05 20:13:09,225 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-02-05 20:13:09,225 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-02-05 20:13:09,225 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-02-05 20:13:09,231 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 08:13:08" (1/1) ... [2025-02-05 20:13:09,232 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 08:13:08" (1/1) ... [2025-02-05 20:13:09,299 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 08:13:08" (1/1) ... [2025-02-05 20:13:09,434 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-02-05 20:13:09,434 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 08:13:08" (1/1) ... [2025-02-05 20:13:09,435 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 08:13:08" (1/1) ... [2025-02-05 20:13:09,543 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 08:13:08" (1/1) ... [2025-02-05 20:13:09,565 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 08:13:08" (1/1) ... [2025-02-05 20:13:09,591 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 08:13:08" (1/1) ... [2025-02-05 20:13:09,621 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 08:13:08" (1/1) ... [2025-02-05 20:13:09,722 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-02-05 20:13:09,723 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-02-05 20:13:09,723 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-02-05 20:13:09,723 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-02-05 20:13:09,724 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 08:13:08" (1/1) ... [2025-02-05 20:13:09,732 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-02-05 20:13:09,754 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-05 20:13:09,779 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2025-02-05 20:13:09,783 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2025-02-05 20:13:09,807 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-02-05 20:13:09,811 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-02-05 20:13:09,811 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-02-05 20:13:09,811 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-02-05 20:13:10,157 INFO L257 CfgBuilder]: Building ICFG [2025-02-05 20:13:10,158 INFO L287 CfgBuilder]: Building CFG for each procedure with an implementation [2025-02-05 20:13:12,925 INFO L? ?]: Removed 2795 outVars from TransFormulas that were not future-live. [2025-02-05 20:13:12,926 INFO L308 CfgBuilder]: Performing block encoding [2025-02-05 20:13:13,136 INFO L332 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-02-05 20:13:13,136 INFO L337 CfgBuilder]: Removed 0 assume(true) statements. [2025-02-05 20:13:13,141 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 05.02 08:13:13 BoogieIcfgContainer [2025-02-05 20:13:13,141 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-02-05 20:13:13,143 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2025-02-05 20:13:13,143 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2025-02-05 20:13:13,153 INFO L274 PluginConnector]: TraceAbstraction initialized [2025-02-05 20:13:13,153 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 05.02 08:13:08" (1/3) ... [2025-02-05 20:13:13,153 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4a5e934b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 05.02 08:13:13, skipping insertion in model container [2025-02-05 20:13:13,153 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 08:13:08" (2/3) ... [2025-02-05 20:13:13,153 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4a5e934b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 05.02 08:13:13, skipping insertion in model container [2025-02-05 20:13:13,154 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 05.02 08:13:13" (3/3) ... [2025-02-05 20:13:13,154 INFO L128 eAbstractionObserver]: Analyzing ICFG btor2c-lazyMod.vis_arrays_bpbs_p3.c [2025-02-05 20:13:13,190 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2025-02-05 20:13:13,192 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG btor2c-lazyMod.vis_arrays_bpbs_p3.c that has 1 procedures, 1094 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2025-02-05 20:13:13,271 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2025-02-05 20:13:13,279 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@674e99b3, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-02-05 20:13:13,279 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2025-02-05 20:13:13,284 INFO L276 IsEmpty]: Start isEmpty. Operand has 1094 states, 1092 states have (on average 1.499084249084249) internal successors, (1637), 1093 states have internal predecessors, (1637), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:13,293 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 170 [2025-02-05 20:13:13,293 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:13,293 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:13,294 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:13,297 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:13,297 INFO L85 PathProgramCache]: Analyzing trace with hash 1644168596, now seen corresponding path program 1 times [2025-02-05 20:13:13,302 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:13,302 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [934818188] [2025-02-05 20:13:13,303 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:13,303 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:13,393 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 169 statements into 1 equivalence classes. [2025-02-05 20:13:13,543 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 169 of 169 statements. [2025-02-05 20:13:13,543 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:13,544 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:13:14,388 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:13:14,391 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:13:14,391 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [934818188] [2025-02-05 20:13:14,392 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [934818188] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:13:14,392 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:13:14,393 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-05 20:13:14,394 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1861028145] [2025-02-05 20:13:14,394 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:13:14,397 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-05 20:13:14,398 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:13:14,411 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-05 20:13:14,412 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-05 20:13:14,415 INFO L87 Difference]: Start difference. First operand has 1094 states, 1092 states have (on average 1.499084249084249) internal successors, (1637), 1093 states have internal predecessors, (1637), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 42.25) internal successors, (169), 4 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:14,905 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:13:14,906 INFO L93 Difference]: Finished difference Result 2049 states and 3069 transitions. [2025-02-05 20:13:14,907 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-05 20:13:14,908 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 42.25) internal successors, (169), 4 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 169 [2025-02-05 20:13:14,908 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:13:14,918 INFO L225 Difference]: With dead ends: 2049 [2025-02-05 20:13:14,918 INFO L226 Difference]: Without dead ends: 1093 [2025-02-05 20:13:14,922 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-05 20:13:14,924 INFO L435 NwaCegarLoop]: 1360 mSDtfsCounter, 0 mSDsluCounter, 2715 mSDsCounter, 0 mSdLazyCounter, 823 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 4075 SdHoareTripleChecker+Invalid, 823 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 823 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-02-05 20:13:14,924 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 4075 Invalid, 823 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 823 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-02-05 20:13:14,936 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1093 states. [2025-02-05 20:13:14,967 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1093 to 1093. [2025-02-05 20:13:14,970 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1093 states, 1092 states have (on average 1.4972527472527473) internal successors, (1635), 1092 states have internal predecessors, (1635), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:14,975 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1093 states to 1093 states and 1635 transitions. [2025-02-05 20:13:14,976 INFO L78 Accepts]: Start accepts. Automaton has 1093 states and 1635 transitions. Word has length 169 [2025-02-05 20:13:14,976 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:13:14,976 INFO L471 AbstractCegarLoop]: Abstraction has 1093 states and 1635 transitions. [2025-02-05 20:13:14,977 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 42.25) internal successors, (169), 4 states have internal predecessors, (169), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:14,977 INFO L276 IsEmpty]: Start isEmpty. Operand 1093 states and 1635 transitions. [2025-02-05 20:13:14,978 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 171 [2025-02-05 20:13:14,978 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:14,979 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:14,979 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2025-02-05 20:13:14,979 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:14,979 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:14,980 INFO L85 PathProgramCache]: Analyzing trace with hash -565700608, now seen corresponding path program 1 times [2025-02-05 20:13:14,980 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:14,980 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1955125930] [2025-02-05 20:13:14,980 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:14,980 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:15,060 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 170 statements into 1 equivalence classes. [2025-02-05 20:13:15,110 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 170 of 170 statements. [2025-02-05 20:13:15,110 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:15,110 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:13:15,446 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:13:15,447 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:13:15,447 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1955125930] [2025-02-05 20:13:15,447 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1955125930] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:13:15,447 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:13:15,447 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-05 20:13:15,447 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [296502951] [2025-02-05 20:13:15,447 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:13:15,448 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-05 20:13:15,448 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:13:15,449 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-05 20:13:15,449 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-05 20:13:15,449 INFO L87 Difference]: Start difference. First operand 1093 states and 1635 transitions. Second operand has 4 states, 4 states have (on average 42.5) internal successors, (170), 4 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:15,872 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:13:15,872 INFO L93 Difference]: Finished difference Result 2050 states and 3067 transitions. [2025-02-05 20:13:15,873 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-05 20:13:15,873 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 42.5) internal successors, (170), 4 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 170 [2025-02-05 20:13:15,873 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:13:15,879 INFO L225 Difference]: With dead ends: 2050 [2025-02-05 20:13:15,879 INFO L226 Difference]: Without dead ends: 1095 [2025-02-05 20:13:15,881 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-05 20:13:15,881 INFO L435 NwaCegarLoop]: 1360 mSDtfsCounter, 0 mSDsluCounter, 2712 mSDsCounter, 0 mSdLazyCounter, 826 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 4072 SdHoareTripleChecker+Invalid, 826 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 826 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-02-05 20:13:15,881 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 4072 Invalid, 826 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 826 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-02-05 20:13:15,884 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1095 states. [2025-02-05 20:13:15,901 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1095 to 1095. [2025-02-05 20:13:15,903 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1095 states, 1094 states have (on average 1.4963436928702012) internal successors, (1637), 1094 states have internal predecessors, (1637), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:15,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1095 states to 1095 states and 1637 transitions. [2025-02-05 20:13:15,906 INFO L78 Accepts]: Start accepts. Automaton has 1095 states and 1637 transitions. Word has length 170 [2025-02-05 20:13:15,907 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:13:15,907 INFO L471 AbstractCegarLoop]: Abstraction has 1095 states and 1637 transitions. [2025-02-05 20:13:15,907 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 42.5) internal successors, (170), 4 states have internal predecessors, (170), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:15,908 INFO L276 IsEmpty]: Start isEmpty. Operand 1095 states and 1637 transitions. [2025-02-05 20:13:15,911 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 172 [2025-02-05 20:13:15,911 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:15,911 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:15,911 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2025-02-05 20:13:15,911 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:15,913 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:15,913 INFO L85 PathProgramCache]: Analyzing trace with hash 1574660879, now seen corresponding path program 1 times [2025-02-05 20:13:15,913 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:15,913 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1977118961] [2025-02-05 20:13:15,913 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:15,913 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:15,972 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 171 statements into 1 equivalence classes. [2025-02-05 20:13:16,125 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 171 of 171 statements. [2025-02-05 20:13:16,126 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:16,126 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:13:16,584 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:13:16,585 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:13:16,585 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1977118961] [2025-02-05 20:13:16,585 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1977118961] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:13:16,585 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:13:16,585 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-05 20:13:16,585 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1909351646] [2025-02-05 20:13:16,585 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:13:16,585 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-05 20:13:16,585 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:13:16,586 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-05 20:13:16,586 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-02-05 20:13:16,586 INFO L87 Difference]: Start difference. First operand 1095 states and 1637 transitions. Second operand has 5 states, 5 states have (on average 34.2) internal successors, (171), 5 states have internal predecessors, (171), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:17,169 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:13:17,171 INFO L93 Difference]: Finished difference Result 2060 states and 3080 transitions. [2025-02-05 20:13:17,173 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-05 20:13:17,173 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 34.2) internal successors, (171), 5 states have internal predecessors, (171), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 171 [2025-02-05 20:13:17,173 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:13:17,178 INFO L225 Difference]: With dead ends: 2060 [2025-02-05 20:13:17,179 INFO L226 Difference]: Without dead ends: 1103 [2025-02-05 20:13:17,180 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-02-05 20:13:17,180 INFO L435 NwaCegarLoop]: 1357 mSDtfsCounter, 6 mSDsluCounter, 4063 mSDsCounter, 0 mSdLazyCounter, 1111 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 5420 SdHoareTripleChecker+Invalid, 1111 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1111 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-02-05 20:13:17,180 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 5420 Invalid, 1111 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1111 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-02-05 20:13:17,182 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1103 states. [2025-02-05 20:13:17,193 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1103 to 1101. [2025-02-05 20:13:17,195 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1101 states, 1100 states have (on average 1.4954545454545454) internal successors, (1645), 1100 states have internal predecessors, (1645), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:17,198 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1101 states to 1101 states and 1645 transitions. [2025-02-05 20:13:17,198 INFO L78 Accepts]: Start accepts. Automaton has 1101 states and 1645 transitions. Word has length 171 [2025-02-05 20:13:17,198 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:13:17,198 INFO L471 AbstractCegarLoop]: Abstraction has 1101 states and 1645 transitions. [2025-02-05 20:13:17,198 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 34.2) internal successors, (171), 5 states have internal predecessors, (171), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:17,198 INFO L276 IsEmpty]: Start isEmpty. Operand 1101 states and 1645 transitions. [2025-02-05 20:13:17,199 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 173 [2025-02-05 20:13:17,199 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:17,200 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:17,200 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2025-02-05 20:13:17,200 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:17,200 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:17,200 INFO L85 PathProgramCache]: Analyzing trace with hash 1223430312, now seen corresponding path program 1 times [2025-02-05 20:13:17,201 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:17,201 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [663646647] [2025-02-05 20:13:17,201 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:17,201 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:17,240 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 172 statements into 1 equivalence classes. [2025-02-05 20:13:17,388 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 172 of 172 statements. [2025-02-05 20:13:17,389 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:17,389 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:13:18,205 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:13:18,206 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:13:18,206 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [663646647] [2025-02-05 20:13:18,206 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [663646647] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:13:18,206 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:13:18,206 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-02-05 20:13:18,206 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1012213325] [2025-02-05 20:13:18,206 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:13:18,207 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-02-05 20:13:18,207 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:13:18,207 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-05 20:13:18,207 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2025-02-05 20:13:18,207 INFO L87 Difference]: Start difference. First operand 1101 states and 1645 transitions. Second operand has 7 states, 7 states have (on average 24.571428571428573) internal successors, (172), 7 states have internal predecessors, (172), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:18,854 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:13:18,854 INFO L93 Difference]: Finished difference Result 2072 states and 3096 transitions. [2025-02-05 20:13:18,854 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-02-05 20:13:18,854 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 24.571428571428573) internal successors, (172), 7 states have internal predecessors, (172), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 172 [2025-02-05 20:13:18,855 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:13:18,858 INFO L225 Difference]: With dead ends: 2072 [2025-02-05 20:13:18,858 INFO L226 Difference]: Without dead ends: 1109 [2025-02-05 20:13:18,859 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2025-02-05 20:13:18,860 INFO L435 NwaCegarLoop]: 1335 mSDtfsCounter, 1554 mSDsluCounter, 3997 mSDsCounter, 0 mSdLazyCounter, 1204 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1554 SdHoareTripleChecker+Valid, 5332 SdHoareTripleChecker+Invalid, 1205 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1204 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-02-05 20:13:18,860 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1554 Valid, 5332 Invalid, 1205 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1204 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2025-02-05 20:13:18,861 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1109 states. [2025-02-05 20:13:18,872 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1109 to 1106. [2025-02-05 20:13:18,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1106 states, 1105 states have (on average 1.4941176470588236) internal successors, (1651), 1105 states have internal predecessors, (1651), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:18,876 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1106 states to 1106 states and 1651 transitions. [2025-02-05 20:13:18,876 INFO L78 Accepts]: Start accepts. Automaton has 1106 states and 1651 transitions. Word has length 172 [2025-02-05 20:13:18,876 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:13:18,876 INFO L471 AbstractCegarLoop]: Abstraction has 1106 states and 1651 transitions. [2025-02-05 20:13:18,876 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 24.571428571428573) internal successors, (172), 7 states have internal predecessors, (172), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:18,877 INFO L276 IsEmpty]: Start isEmpty. Operand 1106 states and 1651 transitions. [2025-02-05 20:13:18,878 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2025-02-05 20:13:18,878 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:18,878 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:18,878 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2025-02-05 20:13:18,878 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:18,878 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:18,879 INFO L85 PathProgramCache]: Analyzing trace with hash -2131554752, now seen corresponding path program 1 times [2025-02-05 20:13:18,879 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:18,879 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1729803284] [2025-02-05 20:13:18,879 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:18,879 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:18,917 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 173 statements into 1 equivalence classes. [2025-02-05 20:13:18,942 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 173 of 173 statements. [2025-02-05 20:13:18,943 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:18,943 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:13:19,174 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:13:19,175 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:13:19,175 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1729803284] [2025-02-05 20:13:19,175 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1729803284] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:13:19,175 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:13:19,175 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-05 20:13:19,175 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [591882968] [2025-02-05 20:13:19,175 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:13:19,176 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-05 20:13:19,176 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:13:19,176 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-05 20:13:19,176 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-02-05 20:13:19,176 INFO L87 Difference]: Start difference. First operand 1106 states and 1651 transitions. Second operand has 5 states, 5 states have (on average 34.6) internal successors, (173), 5 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:19,613 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:13:19,613 INFO L93 Difference]: Finished difference Result 2076 states and 3099 transitions. [2025-02-05 20:13:19,614 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-05 20:13:19,614 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 34.6) internal successors, (173), 5 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 173 [2025-02-05 20:13:19,614 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:13:19,617 INFO L225 Difference]: With dead ends: 2076 [2025-02-05 20:13:19,617 INFO L226 Difference]: Without dead ends: 1108 [2025-02-05 20:13:19,619 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-02-05 20:13:19,621 INFO L435 NwaCegarLoop]: 1360 mSDtfsCounter, 0 mSDsluCounter, 2712 mSDsCounter, 0 mSdLazyCounter, 827 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 4072 SdHoareTripleChecker+Invalid, 828 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 827 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-02-05 20:13:19,621 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 4072 Invalid, 828 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 827 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-02-05 20:13:19,623 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1108 states. [2025-02-05 20:13:19,636 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1108 to 1108. [2025-02-05 20:13:19,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1108 states, 1107 states have (on average 1.4932249322493225) internal successors, (1653), 1107 states have internal predecessors, (1653), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:19,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1108 states to 1108 states and 1653 transitions. [2025-02-05 20:13:19,641 INFO L78 Accepts]: Start accepts. Automaton has 1108 states and 1653 transitions. Word has length 173 [2025-02-05 20:13:19,642 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:13:19,642 INFO L471 AbstractCegarLoop]: Abstraction has 1108 states and 1653 transitions. [2025-02-05 20:13:19,642 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 34.6) internal successors, (173), 5 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:19,642 INFO L276 IsEmpty]: Start isEmpty. Operand 1108 states and 1653 transitions. [2025-02-05 20:13:19,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2025-02-05 20:13:19,644 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:19,644 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:19,644 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2025-02-05 20:13:19,644 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:19,644 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:19,644 INFO L85 PathProgramCache]: Analyzing trace with hash -818807114, now seen corresponding path program 1 times [2025-02-05 20:13:19,645 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:19,645 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [881648147] [2025-02-05 20:13:19,645 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:19,645 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:19,708 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 173 statements into 1 equivalence classes. [2025-02-05 20:13:19,784 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 173 of 173 statements. [2025-02-05 20:13:19,784 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:19,784 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:13:20,314 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:13:20,315 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:13:20,315 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [881648147] [2025-02-05 20:13:20,315 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [881648147] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:13:20,315 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:13:20,317 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-02-05 20:13:20,317 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [881684415] [2025-02-05 20:13:20,317 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:13:20,317 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2025-02-05 20:13:20,317 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:13:20,318 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-02-05 20:13:20,318 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2025-02-05 20:13:20,318 INFO L87 Difference]: Start difference. First operand 1108 states and 1653 transitions. Second operand has 8 states, 8 states have (on average 21.625) internal successors, (173), 8 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:20,992 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:13:20,993 INFO L93 Difference]: Finished difference Result 2110 states and 3145 transitions. [2025-02-05 20:13:20,993 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-02-05 20:13:20,993 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 21.625) internal successors, (173), 8 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 173 [2025-02-05 20:13:20,994 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:13:20,997 INFO L225 Difference]: With dead ends: 2110 [2025-02-05 20:13:20,997 INFO L226 Difference]: Without dead ends: 1140 [2025-02-05 20:13:20,998 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2025-02-05 20:13:20,999 INFO L435 NwaCegarLoop]: 1355 mSDtfsCounter, 23 mSDsluCounter, 5449 mSDsCounter, 0 mSdLazyCounter, 1415 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 23 SdHoareTripleChecker+Valid, 6804 SdHoareTripleChecker+Invalid, 1415 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1415 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-02-05 20:13:20,999 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [23 Valid, 6804 Invalid, 1415 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1415 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2025-02-05 20:13:21,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1140 states. [2025-02-05 20:13:21,011 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1140 to 1136. [2025-02-05 20:13:21,012 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1136 states, 1135 states have (on average 1.490748898678414) internal successors, (1692), 1135 states have internal predecessors, (1692), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:21,015 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1136 states to 1136 states and 1692 transitions. [2025-02-05 20:13:21,015 INFO L78 Accepts]: Start accepts. Automaton has 1136 states and 1692 transitions. Word has length 173 [2025-02-05 20:13:21,015 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:13:21,015 INFO L471 AbstractCegarLoop]: Abstraction has 1136 states and 1692 transitions. [2025-02-05 20:13:21,015 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 21.625) internal successors, (173), 8 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:21,015 INFO L276 IsEmpty]: Start isEmpty. Operand 1136 states and 1692 transitions. [2025-02-05 20:13:21,017 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2025-02-05 20:13:21,018 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:21,018 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:21,019 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2025-02-05 20:13:21,019 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:21,019 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:21,019 INFO L85 PathProgramCache]: Analyzing trace with hash -610334437, now seen corresponding path program 1 times [2025-02-05 20:13:21,019 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:21,019 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1852363148] [2025-02-05 20:13:21,019 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:21,019 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:21,057 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 173 statements into 1 equivalence classes. [2025-02-05 20:13:21,140 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 173 of 173 statements. [2025-02-05 20:13:21,141 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:21,141 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:13:21,682 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:13:21,682 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:13:21,682 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1852363148] [2025-02-05 20:13:21,682 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1852363148] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:13:21,682 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:13:21,682 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-02-05 20:13:21,682 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [255954187] [2025-02-05 20:13:21,682 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:13:21,683 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2025-02-05 20:13:21,683 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:13:21,683 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-02-05 20:13:21,683 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2025-02-05 20:13:21,684 INFO L87 Difference]: Start difference. First operand 1136 states and 1692 transitions. Second operand has 10 states, 10 states have (on average 17.3) internal successors, (173), 10 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:22,575 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:13:22,576 INFO L93 Difference]: Finished difference Result 2148 states and 3197 transitions. [2025-02-05 20:13:22,576 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-02-05 20:13:22,576 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 17.3) internal successors, (173), 10 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 173 [2025-02-05 20:13:22,577 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:13:22,580 INFO L225 Difference]: With dead ends: 2148 [2025-02-05 20:13:22,580 INFO L226 Difference]: Without dead ends: 1150 [2025-02-05 20:13:22,581 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2025-02-05 20:13:22,582 INFO L435 NwaCegarLoop]: 1351 mSDtfsCounter, 35 mSDsluCounter, 8134 mSDsCounter, 0 mSdLazyCounter, 2011 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 35 SdHoareTripleChecker+Valid, 9485 SdHoareTripleChecker+Invalid, 2012 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 2011 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2025-02-05 20:13:22,582 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [35 Valid, 9485 Invalid, 2012 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 2011 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2025-02-05 20:13:22,584 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1150 states. [2025-02-05 20:13:22,594 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1150 to 1140. [2025-02-05 20:13:22,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1140 states, 1139 states have (on average 1.4907813871817384) internal successors, (1698), 1139 states have internal predecessors, (1698), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:22,598 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1140 states to 1140 states and 1698 transitions. [2025-02-05 20:13:22,598 INFO L78 Accepts]: Start accepts. Automaton has 1140 states and 1698 transitions. Word has length 173 [2025-02-05 20:13:22,598 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:13:22,598 INFO L471 AbstractCegarLoop]: Abstraction has 1140 states and 1698 transitions. [2025-02-05 20:13:22,599 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 17.3) internal successors, (173), 10 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:22,599 INFO L276 IsEmpty]: Start isEmpty. Operand 1140 states and 1698 transitions. [2025-02-05 20:13:22,600 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2025-02-05 20:13:22,600 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:22,600 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:22,600 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2025-02-05 20:13:22,600 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:22,600 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:22,601 INFO L85 PathProgramCache]: Analyzing trace with hash -1186679572, now seen corresponding path program 1 times [2025-02-05 20:13:22,601 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:22,602 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1129755594] [2025-02-05 20:13:22,602 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:22,602 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:22,642 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 173 statements into 1 equivalence classes. [2025-02-05 20:13:22,720 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 173 of 173 statements. [2025-02-05 20:13:22,721 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:22,721 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:13:22,934 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:13:22,935 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:13:22,935 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1129755594] [2025-02-05 20:13:22,935 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1129755594] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:13:22,935 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:13:22,935 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-05 20:13:22,935 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [11566182] [2025-02-05 20:13:22,935 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:13:22,936 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-05 20:13:22,936 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:13:22,936 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-05 20:13:22,936 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-05 20:13:22,936 INFO L87 Difference]: Start difference. First operand 1140 states and 1698 transitions. Second operand has 4 states, 4 states have (on average 43.25) internal successors, (173), 4 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:23,330 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:13:23,331 INFO L93 Difference]: Finished difference Result 2144 states and 3193 transitions. [2025-02-05 20:13:23,331 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-05 20:13:23,331 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 43.25) internal successors, (173), 4 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 173 [2025-02-05 20:13:23,331 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:13:23,335 INFO L225 Difference]: With dead ends: 2144 [2025-02-05 20:13:23,336 INFO L226 Difference]: Without dead ends: 1142 [2025-02-05 20:13:23,337 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-05 20:13:23,337 INFO L435 NwaCegarLoop]: 1360 mSDtfsCounter, 0 mSDsluCounter, 2712 mSDsCounter, 0 mSdLazyCounter, 826 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 4072 SdHoareTripleChecker+Invalid, 826 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 826 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-02-05 20:13:23,338 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 4072 Invalid, 826 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 826 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-02-05 20:13:23,339 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1142 states. [2025-02-05 20:13:23,351 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1142 to 1142. [2025-02-05 20:13:23,352 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1142 states, 1141 states have (on average 1.4899211218229622) internal successors, (1700), 1141 states have internal predecessors, (1700), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:23,355 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1142 states to 1142 states and 1700 transitions. [2025-02-05 20:13:23,355 INFO L78 Accepts]: Start accepts. Automaton has 1142 states and 1700 transitions. Word has length 173 [2025-02-05 20:13:23,355 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:13:23,355 INFO L471 AbstractCegarLoop]: Abstraction has 1142 states and 1700 transitions. [2025-02-05 20:13:23,356 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 43.25) internal successors, (173), 4 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:23,356 INFO L276 IsEmpty]: Start isEmpty. Operand 1142 states and 1700 transitions. [2025-02-05 20:13:23,357 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 175 [2025-02-05 20:13:23,357 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:23,357 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:23,358 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2025-02-05 20:13:23,358 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:23,359 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:23,359 INFO L85 PathProgramCache]: Analyzing trace with hash -48008509, now seen corresponding path program 1 times [2025-02-05 20:13:23,359 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:23,359 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [883401736] [2025-02-05 20:13:23,359 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:23,359 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:23,398 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 174 statements into 1 equivalence classes. [2025-02-05 20:13:23,451 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 174 of 174 statements. [2025-02-05 20:13:23,452 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:23,453 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:13:24,199 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:13:24,200 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:13:24,200 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [883401736] [2025-02-05 20:13:24,200 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [883401736] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:13:24,200 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:13:24,200 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2025-02-05 20:13:24,201 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [316734066] [2025-02-05 20:13:24,201 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:13:24,201 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2025-02-05 20:13:24,201 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:13:24,201 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-02-05 20:13:24,201 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2025-02-05 20:13:24,201 INFO L87 Difference]: Start difference. First operand 1142 states and 1700 transitions. Second operand has 10 states, 10 states have (on average 17.4) internal successors, (174), 10 states have internal predecessors, (174), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:25,005 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:13:25,005 INFO L93 Difference]: Finished difference Result 2179 states and 3243 transitions. [2025-02-05 20:13:25,006 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-02-05 20:13:25,006 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 17.4) internal successors, (174), 10 states have internal predecessors, (174), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 174 [2025-02-05 20:13:25,006 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:13:25,010 INFO L225 Difference]: With dead ends: 2179 [2025-02-05 20:13:25,010 INFO L226 Difference]: Without dead ends: 1175 [2025-02-05 20:13:25,011 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2025-02-05 20:13:25,014 INFO L435 NwaCegarLoop]: 1350 mSDtfsCounter, 39 mSDsluCounter, 6797 mSDsCounter, 0 mSdLazyCounter, 1741 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 39 SdHoareTripleChecker+Valid, 8147 SdHoareTripleChecker+Invalid, 1742 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1741 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2025-02-05 20:13:25,015 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [39 Valid, 8147 Invalid, 1742 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1741 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2025-02-05 20:13:25,016 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1175 states. [2025-02-05 20:13:25,028 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1175 to 1161. [2025-02-05 20:13:25,030 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1161 states, 1160 states have (on average 1.4896551724137932) internal successors, (1728), 1160 states have internal predecessors, (1728), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:25,031 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1161 states to 1161 states and 1728 transitions. [2025-02-05 20:13:25,032 INFO L78 Accepts]: Start accepts. Automaton has 1161 states and 1728 transitions. Word has length 174 [2025-02-05 20:13:25,032 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:13:25,032 INFO L471 AbstractCegarLoop]: Abstraction has 1161 states and 1728 transitions. [2025-02-05 20:13:25,032 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 17.4) internal successors, (174), 10 states have internal predecessors, (174), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:25,032 INFO L276 IsEmpty]: Start isEmpty. Operand 1161 states and 1728 transitions. [2025-02-05 20:13:25,033 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 175 [2025-02-05 20:13:25,033 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:25,033 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:25,034 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2025-02-05 20:13:25,034 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:25,034 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:25,034 INFO L85 PathProgramCache]: Analyzing trace with hash -1236373405, now seen corresponding path program 1 times [2025-02-05 20:13:25,034 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:25,034 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1169823771] [2025-02-05 20:13:25,034 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:25,034 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:25,068 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 174 statements into 1 equivalence classes. [2025-02-05 20:13:25,089 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 174 of 174 statements. [2025-02-05 20:13:25,090 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:25,090 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:13:25,278 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:13:25,278 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:13:25,278 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1169823771] [2025-02-05 20:13:25,279 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1169823771] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:13:25,279 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:13:25,279 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-05 20:13:25,279 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [850207691] [2025-02-05 20:13:25,279 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:13:25,279 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-05 20:13:25,279 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:13:25,280 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-05 20:13:25,280 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-02-05 20:13:25,280 INFO L87 Difference]: Start difference. First operand 1161 states and 1728 transitions. Second operand has 5 states, 5 states have (on average 34.8) internal successors, (174), 5 states have internal predecessors, (174), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:25,660 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:13:25,660 INFO L93 Difference]: Finished difference Result 2188 states and 3256 transitions. [2025-02-05 20:13:25,661 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-05 20:13:25,661 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 34.8) internal successors, (174), 5 states have internal predecessors, (174), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 174 [2025-02-05 20:13:25,661 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:13:25,664 INFO L225 Difference]: With dead ends: 2188 [2025-02-05 20:13:25,664 INFO L226 Difference]: Without dead ends: 1165 [2025-02-05 20:13:25,665 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-02-05 20:13:25,665 INFO L435 NwaCegarLoop]: 1360 mSDtfsCounter, 0 mSDsluCounter, 2712 mSDsCounter, 0 mSdLazyCounter, 827 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 4072 SdHoareTripleChecker+Invalid, 828 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 827 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-02-05 20:13:25,665 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 4072 Invalid, 828 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 827 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-02-05 20:13:25,667 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1165 states. [2025-02-05 20:13:25,676 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1165 to 1165. [2025-02-05 20:13:25,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1165 states, 1164 states have (on average 1.4879725085910653) internal successors, (1732), 1164 states have internal predecessors, (1732), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:25,679 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1165 states to 1165 states and 1732 transitions. [2025-02-05 20:13:25,679 INFO L78 Accepts]: Start accepts. Automaton has 1165 states and 1732 transitions. Word has length 174 [2025-02-05 20:13:25,679 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:13:25,679 INFO L471 AbstractCegarLoop]: Abstraction has 1165 states and 1732 transitions. [2025-02-05 20:13:25,680 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 34.8) internal successors, (174), 5 states have internal predecessors, (174), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:25,680 INFO L276 IsEmpty]: Start isEmpty. Operand 1165 states and 1732 transitions. [2025-02-05 20:13:25,681 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 175 [2025-02-05 20:13:25,681 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:25,681 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:25,681 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2025-02-05 20:13:25,681 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:25,681 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:25,681 INFO L85 PathProgramCache]: Analyzing trace with hash 2125620726, now seen corresponding path program 1 times [2025-02-05 20:13:25,682 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:25,682 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1271265501] [2025-02-05 20:13:25,682 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:25,682 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:25,715 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 174 statements into 1 equivalence classes. [2025-02-05 20:13:25,768 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 174 of 174 statements. [2025-02-05 20:13:25,769 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:25,769 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:13:26,097 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:13:26,097 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:13:26,097 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1271265501] [2025-02-05 20:13:26,097 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1271265501] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:13:26,097 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:13:26,097 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-05 20:13:26,097 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [976985972] [2025-02-05 20:13:26,097 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:13:26,097 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-05 20:13:26,097 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:13:26,098 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-05 20:13:26,098 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-02-05 20:13:26,098 INFO L87 Difference]: Start difference. First operand 1165 states and 1732 transitions. Second operand has 5 states, 5 states have (on average 34.8) internal successors, (174), 5 states have internal predecessors, (174), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:26,640 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:13:26,640 INFO L93 Difference]: Finished difference Result 2200 states and 3270 transitions. [2025-02-05 20:13:26,640 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-05 20:13:26,641 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 34.8) internal successors, (174), 5 states have internal predecessors, (174), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 174 [2025-02-05 20:13:26,641 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:13:26,644 INFO L225 Difference]: With dead ends: 2200 [2025-02-05 20:13:26,644 INFO L226 Difference]: Without dead ends: 1173 [2025-02-05 20:13:26,645 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-02-05 20:13:26,645 INFO L435 NwaCegarLoop]: 1357 mSDtfsCounter, 6 mSDsluCounter, 4063 mSDsCounter, 0 mSdLazyCounter, 1111 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 5420 SdHoareTripleChecker+Invalid, 1111 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1111 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-02-05 20:13:26,645 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 5420 Invalid, 1111 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1111 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-02-05 20:13:26,647 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1173 states. [2025-02-05 20:13:26,656 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1173 to 1171. [2025-02-05 20:13:26,657 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1171 states, 1170 states have (on average 1.4863247863247864) internal successors, (1739), 1170 states have internal predecessors, (1739), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:26,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1171 states to 1171 states and 1739 transitions. [2025-02-05 20:13:26,659 INFO L78 Accepts]: Start accepts. Automaton has 1171 states and 1739 transitions. Word has length 174 [2025-02-05 20:13:26,659 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:13:26,659 INFO L471 AbstractCegarLoop]: Abstraction has 1171 states and 1739 transitions. [2025-02-05 20:13:26,659 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 34.8) internal successors, (174), 5 states have internal predecessors, (174), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:26,660 INFO L276 IsEmpty]: Start isEmpty. Operand 1171 states and 1739 transitions. [2025-02-05 20:13:26,661 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 176 [2025-02-05 20:13:26,661 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:26,661 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:26,661 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2025-02-05 20:13:26,661 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:26,661 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:26,661 INFO L85 PathProgramCache]: Analyzing trace with hash -574209561, now seen corresponding path program 1 times [2025-02-05 20:13:26,662 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:26,662 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [749229978] [2025-02-05 20:13:26,662 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:26,662 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:26,694 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 175 statements into 1 equivalence classes. [2025-02-05 20:13:26,712 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 175 of 175 statements. [2025-02-05 20:13:26,712 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:26,712 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:13:26,858 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:13:26,859 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:13:26,859 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [749229978] [2025-02-05 20:13:26,859 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [749229978] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:13:26,859 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:13:26,859 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-05 20:13:26,859 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1241343350] [2025-02-05 20:13:26,860 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:13:26,860 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-05 20:13:26,860 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:13:26,861 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-05 20:13:26,861 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-05 20:13:26,861 INFO L87 Difference]: Start difference. First operand 1171 states and 1739 transitions. Second operand has 4 states, 4 states have (on average 43.75) internal successors, (175), 4 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:27,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:13:27,230 INFO L93 Difference]: Finished difference Result 2208 states and 3278 transitions. [2025-02-05 20:13:27,230 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-05 20:13:27,231 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 43.75) internal successors, (175), 4 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 175 [2025-02-05 20:13:27,231 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:13:27,233 INFO L225 Difference]: With dead ends: 2208 [2025-02-05 20:13:27,234 INFO L226 Difference]: Without dead ends: 1175 [2025-02-05 20:13:27,235 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-05 20:13:27,235 INFO L435 NwaCegarLoop]: 1360 mSDtfsCounter, 0 mSDsluCounter, 2712 mSDsCounter, 0 mSdLazyCounter, 826 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 4072 SdHoareTripleChecker+Invalid, 826 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 826 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-02-05 20:13:27,235 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 4072 Invalid, 826 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 826 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-02-05 20:13:27,236 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1175 states. [2025-02-05 20:13:27,244 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1175 to 1175. [2025-02-05 20:13:27,245 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1175 states, 1174 states have (on average 1.4846678023850086) internal successors, (1743), 1174 states have internal predecessors, (1743), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:27,247 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1175 states to 1175 states and 1743 transitions. [2025-02-05 20:13:27,247 INFO L78 Accepts]: Start accepts. Automaton has 1175 states and 1743 transitions. Word has length 175 [2025-02-05 20:13:27,247 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:13:27,247 INFO L471 AbstractCegarLoop]: Abstraction has 1175 states and 1743 transitions. [2025-02-05 20:13:27,247 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 43.75) internal successors, (175), 4 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:27,247 INFO L276 IsEmpty]: Start isEmpty. Operand 1175 states and 1743 transitions. [2025-02-05 20:13:27,248 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 176 [2025-02-05 20:13:27,248 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:27,248 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:27,249 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2025-02-05 20:13:27,249 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:27,249 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:27,249 INFO L85 PathProgramCache]: Analyzing trace with hash -158259574, now seen corresponding path program 1 times [2025-02-05 20:13:27,249 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:27,249 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [832770444] [2025-02-05 20:13:27,249 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:27,249 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:27,281 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 175 statements into 1 equivalence classes. [2025-02-05 20:13:27,426 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 175 of 175 statements. [2025-02-05 20:13:27,426 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:27,427 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:13:27,708 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:13:27,708 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:13:27,709 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [832770444] [2025-02-05 20:13:27,709 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [832770444] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:13:27,709 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:13:27,709 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-05 20:13:27,709 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [951414159] [2025-02-05 20:13:27,709 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:13:27,709 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-05 20:13:27,709 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:13:27,710 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-05 20:13:27,710 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-02-05 20:13:27,710 INFO L87 Difference]: Start difference. First operand 1175 states and 1743 transitions. Second operand has 5 states, 5 states have (on average 35.0) internal successors, (175), 5 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:28,211 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:13:28,212 INFO L93 Difference]: Finished difference Result 2220 states and 3292 transitions. [2025-02-05 20:13:28,212 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-05 20:13:28,212 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 35.0) internal successors, (175), 5 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 175 [2025-02-05 20:13:28,212 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:13:28,215 INFO L225 Difference]: With dead ends: 2220 [2025-02-05 20:13:28,215 INFO L226 Difference]: Without dead ends: 1183 [2025-02-05 20:13:28,216 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-02-05 20:13:28,217 INFO L435 NwaCegarLoop]: 1357 mSDtfsCounter, 6 mSDsluCounter, 4063 mSDsCounter, 0 mSdLazyCounter, 1111 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 5420 SdHoareTripleChecker+Invalid, 1111 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1111 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-02-05 20:13:28,217 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 5420 Invalid, 1111 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1111 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-02-05 20:13:28,218 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1183 states. [2025-02-05 20:13:28,227 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1183 to 1181. [2025-02-05 20:13:28,229 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1181 states, 1180 states have (on average 1.4838983050847459) internal successors, (1751), 1180 states have internal predecessors, (1751), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:28,230 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1181 states to 1181 states and 1751 transitions. [2025-02-05 20:13:28,230 INFO L78 Accepts]: Start accepts. Automaton has 1181 states and 1751 transitions. Word has length 175 [2025-02-05 20:13:28,230 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:13:28,230 INFO L471 AbstractCegarLoop]: Abstraction has 1181 states and 1751 transitions. [2025-02-05 20:13:28,231 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 35.0) internal successors, (175), 5 states have internal predecessors, (175), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:28,231 INFO L276 IsEmpty]: Start isEmpty. Operand 1181 states and 1751 transitions. [2025-02-05 20:13:28,232 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 177 [2025-02-05 20:13:28,232 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:28,233 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:28,233 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2025-02-05 20:13:28,233 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:28,233 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:28,233 INFO L85 PathProgramCache]: Analyzing trace with hash 2030948056, now seen corresponding path program 1 times [2025-02-05 20:13:28,234 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:28,234 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1041482059] [2025-02-05 20:13:28,234 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:28,234 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:28,268 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 176 statements into 1 equivalence classes. [2025-02-05 20:13:28,359 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 176 of 176 statements. [2025-02-05 20:13:28,359 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:28,360 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:13:28,754 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:13:28,755 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:13:28,755 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1041482059] [2025-02-05 20:13:28,755 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1041482059] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:13:28,755 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:13:28,755 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-02-05 20:13:28,755 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1215813346] [2025-02-05 20:13:28,755 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:13:28,756 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-02-05 20:13:28,756 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:13:28,756 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-05 20:13:28,756 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2025-02-05 20:13:28,756 INFO L87 Difference]: Start difference. First operand 1181 states and 1751 transitions. Second operand has 7 states, 7 states have (on average 25.142857142857142) internal successors, (176), 7 states have internal predecessors, (176), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:29,450 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:13:29,450 INFO L93 Difference]: Finished difference Result 2231 states and 3307 transitions. [2025-02-05 20:13:29,450 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-02-05 20:13:29,451 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 25.142857142857142) internal successors, (176), 7 states have internal predecessors, (176), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 176 [2025-02-05 20:13:29,451 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:13:29,455 INFO L225 Difference]: With dead ends: 2231 [2025-02-05 20:13:29,455 INFO L226 Difference]: Without dead ends: 1188 [2025-02-05 20:13:29,456 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2025-02-05 20:13:29,457 INFO L435 NwaCegarLoop]: 1332 mSDtfsCounter, 1475 mSDsluCounter, 5318 mSDsCounter, 0 mSdLazyCounter, 1515 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1475 SdHoareTripleChecker+Valid, 6650 SdHoareTripleChecker+Invalid, 1517 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 1515 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-02-05 20:13:29,457 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1475 Valid, 6650 Invalid, 1517 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 1515 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2025-02-05 20:13:29,459 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1188 states. [2025-02-05 20:13:29,469 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1188 to 1187. [2025-02-05 20:13:29,471 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1187 states, 1186 states have (on average 1.4822934232715008) internal successors, (1758), 1186 states have internal predecessors, (1758), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:29,472 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1187 states to 1187 states and 1758 transitions. [2025-02-05 20:13:29,473 INFO L78 Accepts]: Start accepts. Automaton has 1187 states and 1758 transitions. Word has length 176 [2025-02-05 20:13:29,473 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:13:29,473 INFO L471 AbstractCegarLoop]: Abstraction has 1187 states and 1758 transitions. [2025-02-05 20:13:29,473 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 25.142857142857142) internal successors, (176), 7 states have internal predecessors, (176), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:29,473 INFO L276 IsEmpty]: Start isEmpty. Operand 1187 states and 1758 transitions. [2025-02-05 20:13:29,475 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 178 [2025-02-05 20:13:29,475 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:29,475 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:29,475 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2025-02-05 20:13:29,475 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:29,475 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:29,475 INFO L85 PathProgramCache]: Analyzing trace with hash -131589673, now seen corresponding path program 1 times [2025-02-05 20:13:29,476 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:29,476 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [540333626] [2025-02-05 20:13:29,476 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:29,476 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:29,518 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 177 statements into 1 equivalence classes. [2025-02-05 20:13:29,718 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 177 of 177 statements. [2025-02-05 20:13:29,719 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:29,719 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:13:30,086 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:13:30,086 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:13:30,086 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [540333626] [2025-02-05 20:13:30,086 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [540333626] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:13:30,086 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:13:30,086 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-05 20:13:30,087 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1435707857] [2025-02-05 20:13:30,087 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:13:30,087 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-05 20:13:30,087 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:13:30,087 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-05 20:13:30,087 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-02-05 20:13:30,088 INFO L87 Difference]: Start difference. First operand 1187 states and 1758 transitions. Second operand has 5 states, 5 states have (on average 35.4) internal successors, (177), 5 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:30,547 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:13:30,548 INFO L93 Difference]: Finished difference Result 2241 states and 3317 transitions. [2025-02-05 20:13:30,548 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-05 20:13:30,548 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 35.4) internal successors, (177), 5 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 177 [2025-02-05 20:13:30,548 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:13:30,551 INFO L225 Difference]: With dead ends: 2241 [2025-02-05 20:13:30,551 INFO L226 Difference]: Without dead ends: 1192 [2025-02-05 20:13:30,552 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-02-05 20:13:30,553 INFO L435 NwaCegarLoop]: 1335 mSDtfsCounter, 1555 mSDsluCounter, 2664 mSDsCounter, 0 mSdLazyCounter, 899 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1555 SdHoareTripleChecker+Valid, 3999 SdHoareTripleChecker+Invalid, 899 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 899 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-02-05 20:13:30,554 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1555 Valid, 3999 Invalid, 899 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 899 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-02-05 20:13:30,555 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1192 states. [2025-02-05 20:13:30,562 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1192 to 1192. [2025-02-05 20:13:30,563 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1192 states, 1191 states have (on average 1.4811083123425692) internal successors, (1764), 1191 states have internal predecessors, (1764), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:30,564 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1192 states to 1192 states and 1764 transitions. [2025-02-05 20:13:30,564 INFO L78 Accepts]: Start accepts. Automaton has 1192 states and 1764 transitions. Word has length 177 [2025-02-05 20:13:30,565 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:13:30,565 INFO L471 AbstractCegarLoop]: Abstraction has 1192 states and 1764 transitions. [2025-02-05 20:13:30,565 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 35.4) internal successors, (177), 5 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:30,565 INFO L276 IsEmpty]: Start isEmpty. Operand 1192 states and 1764 transitions. [2025-02-05 20:13:30,566 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 178 [2025-02-05 20:13:30,566 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:30,566 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:30,566 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2025-02-05 20:13:30,566 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:30,566 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:30,567 INFO L85 PathProgramCache]: Analyzing trace with hash 474727897, now seen corresponding path program 1 times [2025-02-05 20:13:30,567 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:30,567 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [646421406] [2025-02-05 20:13:30,567 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:30,567 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:30,599 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 177 statements into 1 equivalence classes. [2025-02-05 20:13:30,644 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 177 of 177 statements. [2025-02-05 20:13:30,644 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:30,644 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:13:30,976 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:13:30,976 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:13:30,976 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [646421406] [2025-02-05 20:13:30,976 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [646421406] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:13:30,976 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:13:30,976 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-05 20:13:30,976 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1304214752] [2025-02-05 20:13:30,976 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:13:30,977 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-02-05 20:13:30,977 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:13:30,977 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-05 20:13:30,977 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2025-02-05 20:13:30,977 INFO L87 Difference]: Start difference. First operand 1192 states and 1764 transitions. Second operand has 6 states, 6 states have (on average 29.5) internal successors, (177), 6 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:31,522 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:13:31,522 INFO L93 Difference]: Finished difference Result 2549 states and 3759 transitions. [2025-02-05 20:13:31,522 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-05 20:13:31,523 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 29.5) internal successors, (177), 6 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 177 [2025-02-05 20:13:31,523 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:13:31,526 INFO L225 Difference]: With dead ends: 2549 [2025-02-05 20:13:31,526 INFO L226 Difference]: Without dead ends: 1495 [2025-02-05 20:13:31,527 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2025-02-05 20:13:31,527 INFO L435 NwaCegarLoop]: 1336 mSDtfsCounter, 2147 mSDsluCounter, 3998 mSDsCounter, 0 mSdLazyCounter, 1196 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2147 SdHoareTripleChecker+Valid, 5334 SdHoareTripleChecker+Invalid, 1196 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1196 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-02-05 20:13:31,528 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2147 Valid, 5334 Invalid, 1196 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1196 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-02-05 20:13:31,529 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1495 states. [2025-02-05 20:13:31,537 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1495 to 1327. [2025-02-05 20:13:31,538 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1327 states, 1326 states have (on average 1.4819004524886878) internal successors, (1965), 1326 states have internal predecessors, (1965), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:31,540 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1327 states to 1327 states and 1965 transitions. [2025-02-05 20:13:31,540 INFO L78 Accepts]: Start accepts. Automaton has 1327 states and 1965 transitions. Word has length 177 [2025-02-05 20:13:31,540 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:13:31,540 INFO L471 AbstractCegarLoop]: Abstraction has 1327 states and 1965 transitions. [2025-02-05 20:13:31,540 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 29.5) internal successors, (177), 6 states have internal predecessors, (177), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:31,540 INFO L276 IsEmpty]: Start isEmpty. Operand 1327 states and 1965 transitions. [2025-02-05 20:13:31,541 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 179 [2025-02-05 20:13:31,541 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:31,541 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:31,542 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2025-02-05 20:13:31,542 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:31,542 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:31,542 INFO L85 PathProgramCache]: Analyzing trace with hash -1651512984, now seen corresponding path program 1 times [2025-02-05 20:13:31,542 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:31,542 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2085581723] [2025-02-05 20:13:31,542 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:31,543 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:31,575 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 178 statements into 1 equivalence classes. [2025-02-05 20:13:31,632 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 178 of 178 statements. [2025-02-05 20:13:31,632 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:31,632 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:13:31,979 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:13:31,979 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:13:31,979 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2085581723] [2025-02-05 20:13:31,979 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2085581723] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:13:31,979 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:13:31,980 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-05 20:13:31,980 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [391807295] [2025-02-05 20:13:31,980 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:13:31,980 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-02-05 20:13:31,980 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:13:31,981 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-05 20:13:31,982 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2025-02-05 20:13:31,982 INFO L87 Difference]: Start difference. First operand 1327 states and 1965 transitions. Second operand has 6 states, 6 states have (on average 29.666666666666668) internal successors, (178), 6 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:32,536 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:13:32,536 INFO L93 Difference]: Finished difference Result 2789 states and 4116 transitions. [2025-02-05 20:13:32,536 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-05 20:13:32,537 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 29.666666666666668) internal successors, (178), 6 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 178 [2025-02-05 20:13:32,537 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:13:32,540 INFO L225 Difference]: With dead ends: 2789 [2025-02-05 20:13:32,541 INFO L226 Difference]: Without dead ends: 1735 [2025-02-05 20:13:32,542 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2025-02-05 20:13:32,542 INFO L435 NwaCegarLoop]: 1336 mSDtfsCounter, 2131 mSDsluCounter, 3998 mSDsCounter, 0 mSdLazyCounter, 1196 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2131 SdHoareTripleChecker+Valid, 5334 SdHoareTripleChecker+Invalid, 1196 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1196 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-02-05 20:13:32,542 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2131 Valid, 5334 Invalid, 1196 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1196 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-02-05 20:13:32,544 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1735 states. [2025-02-05 20:13:32,554 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1735 to 1596. [2025-02-05 20:13:32,556 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1596 states, 1595 states have (on average 1.4802507836990595) internal successors, (2361), 1595 states have internal predecessors, (2361), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:32,557 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1596 states to 1596 states and 2361 transitions. [2025-02-05 20:13:32,557 INFO L78 Accepts]: Start accepts. Automaton has 1596 states and 2361 transitions. Word has length 178 [2025-02-05 20:13:32,557 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:13:32,557 INFO L471 AbstractCegarLoop]: Abstraction has 1596 states and 2361 transitions. [2025-02-05 20:13:32,558 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 29.666666666666668) internal successors, (178), 6 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:32,558 INFO L276 IsEmpty]: Start isEmpty. Operand 1596 states and 2361 transitions. [2025-02-05 20:13:32,559 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 179 [2025-02-05 20:13:32,559 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:32,559 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:32,559 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2025-02-05 20:13:32,559 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:32,560 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:32,560 INFO L85 PathProgramCache]: Analyzing trace with hash 234900171, now seen corresponding path program 1 times [2025-02-05 20:13:32,560 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:32,560 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2043631526] [2025-02-05 20:13:32,560 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:32,560 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:32,592 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 178 statements into 1 equivalence classes. [2025-02-05 20:13:32,612 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 178 of 178 statements. [2025-02-05 20:13:32,612 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:32,612 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:13:32,758 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:13:32,759 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:13:32,759 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2043631526] [2025-02-05 20:13:32,759 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2043631526] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:13:32,759 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:13:32,759 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-05 20:13:32,759 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [167667176] [2025-02-05 20:13:32,759 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:13:32,759 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-05 20:13:32,759 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:13:32,760 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-05 20:13:32,760 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-02-05 20:13:32,760 INFO L87 Difference]: Start difference. First operand 1596 states and 2361 transitions. Second operand has 5 states, 5 states have (on average 35.6) internal successors, (178), 5 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:33,121 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:13:33,121 INFO L93 Difference]: Finished difference Result 2654 states and 3925 transitions. [2025-02-05 20:13:33,121 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-05 20:13:33,121 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 35.6) internal successors, (178), 5 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 178 [2025-02-05 20:13:33,122 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:13:33,125 INFO L225 Difference]: With dead ends: 2654 [2025-02-05 20:13:33,125 INFO L226 Difference]: Without dead ends: 1600 [2025-02-05 20:13:33,126 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-02-05 20:13:33,126 INFO L435 NwaCegarLoop]: 1360 mSDtfsCounter, 0 mSDsluCounter, 2712 mSDsCounter, 0 mSdLazyCounter, 827 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 4072 SdHoareTripleChecker+Invalid, 828 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 827 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-02-05 20:13:33,127 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 4072 Invalid, 828 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 827 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-02-05 20:13:33,128 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1600 states. [2025-02-05 20:13:33,136 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1600 to 1600. [2025-02-05 20:13:33,138 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1600 states, 1599 states have (on average 1.479049405878674) internal successors, (2365), 1599 states have internal predecessors, (2365), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:33,140 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1600 states to 1600 states and 2365 transitions. [2025-02-05 20:13:33,140 INFO L78 Accepts]: Start accepts. Automaton has 1600 states and 2365 transitions. Word has length 178 [2025-02-05 20:13:33,140 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:13:33,140 INFO L471 AbstractCegarLoop]: Abstraction has 1600 states and 2365 transitions. [2025-02-05 20:13:33,140 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 35.6) internal successors, (178), 5 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:33,140 INFO L276 IsEmpty]: Start isEmpty. Operand 1600 states and 2365 transitions. [2025-02-05 20:13:33,141 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 179 [2025-02-05 20:13:33,141 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:33,141 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:33,141 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2025-02-05 20:13:33,142 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:33,142 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:33,142 INFO L85 PathProgramCache]: Analyzing trace with hash -1805466325, now seen corresponding path program 1 times [2025-02-05 20:13:33,142 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:33,142 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2083093414] [2025-02-05 20:13:33,142 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:33,142 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:33,188 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 178 statements into 1 equivalence classes. [2025-02-05 20:13:33,214 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 178 of 178 statements. [2025-02-05 20:13:33,214 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:33,214 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:13:33,518 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:13:33,518 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:13:33,518 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2083093414] [2025-02-05 20:13:33,518 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2083093414] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:13:33,518 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:13:33,518 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-02-05 20:13:33,518 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [450388839] [2025-02-05 20:13:33,519 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:13:33,519 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2025-02-05 20:13:33,519 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:13:33,520 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-02-05 20:13:33,520 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2025-02-05 20:13:33,520 INFO L87 Difference]: Start difference. First operand 1600 states and 2365 transitions. Second operand has 8 states, 8 states have (on average 22.25) internal successors, (178), 8 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:34,197 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:13:34,197 INFO L93 Difference]: Finished difference Result 2689 states and 3972 transitions. [2025-02-05 20:13:34,197 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-02-05 20:13:34,197 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 22.25) internal successors, (178), 8 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 178 [2025-02-05 20:13:34,198 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:13:34,202 INFO L225 Difference]: With dead ends: 2689 [2025-02-05 20:13:34,202 INFO L226 Difference]: Without dead ends: 1631 [2025-02-05 20:13:34,203 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2025-02-05 20:13:34,203 INFO L435 NwaCegarLoop]: 1354 mSDtfsCounter, 23 mSDsluCounter, 6775 mSDsCounter, 0 mSdLazyCounter, 1694 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 23 SdHoareTripleChecker+Valid, 8129 SdHoareTripleChecker+Invalid, 1694 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1694 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-02-05 20:13:34,203 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [23 Valid, 8129 Invalid, 1694 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1694 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2025-02-05 20:13:34,205 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1631 states. [2025-02-05 20:13:34,216 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1631 to 1627. [2025-02-05 20:13:34,218 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1627 states, 1626 states have (on average 1.4784747847478474) internal successors, (2404), 1626 states have internal predecessors, (2404), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:34,219 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1627 states to 1627 states and 2404 transitions. [2025-02-05 20:13:34,219 INFO L78 Accepts]: Start accepts. Automaton has 1627 states and 2404 transitions. Word has length 178 [2025-02-05 20:13:34,220 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:13:34,220 INFO L471 AbstractCegarLoop]: Abstraction has 1627 states and 2404 transitions. [2025-02-05 20:13:34,220 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 22.25) internal successors, (178), 8 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:34,220 INFO L276 IsEmpty]: Start isEmpty. Operand 1627 states and 2404 transitions. [2025-02-05 20:13:34,221 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 179 [2025-02-05 20:13:34,221 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:34,221 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:34,221 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2025-02-05 20:13:34,222 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:34,222 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:34,222 INFO L85 PathProgramCache]: Analyzing trace with hash 518383841, now seen corresponding path program 1 times [2025-02-05 20:13:34,222 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:34,222 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1398207661] [2025-02-05 20:13:34,222 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:34,222 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:34,256 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 178 statements into 1 equivalence classes. [2025-02-05 20:13:34,337 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 178 of 178 statements. [2025-02-05 20:13:34,338 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:34,338 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:13:34,527 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:13:34,528 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:13:34,528 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1398207661] [2025-02-05 20:13:34,528 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1398207661] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:13:34,528 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:13:34,528 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-05 20:13:34,528 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [598954724] [2025-02-05 20:13:34,528 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:13:34,528 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-05 20:13:34,528 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:13:34,529 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-05 20:13:34,529 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-05 20:13:34,529 INFO L87 Difference]: Start difference. First operand 1627 states and 2404 transitions. Second operand has 4 states, 4 states have (on average 44.5) internal successors, (178), 4 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:34,896 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:13:34,896 INFO L93 Difference]: Finished difference Result 2716 states and 4011 transitions. [2025-02-05 20:13:34,897 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-05 20:13:34,897 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 44.5) internal successors, (178), 4 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 178 [2025-02-05 20:13:34,897 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:13:34,900 INFO L225 Difference]: With dead ends: 2716 [2025-02-05 20:13:34,900 INFO L226 Difference]: Without dead ends: 1631 [2025-02-05 20:13:34,901 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-05 20:13:34,902 INFO L435 NwaCegarLoop]: 1360 mSDtfsCounter, 0 mSDsluCounter, 2712 mSDsCounter, 0 mSdLazyCounter, 826 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 4072 SdHoareTripleChecker+Invalid, 826 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 826 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-02-05 20:13:34,902 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 4072 Invalid, 826 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 826 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-02-05 20:13:34,903 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1631 states. [2025-02-05 20:13:34,911 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1631 to 1631. [2025-02-05 20:13:34,912 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1631 states, 1630 states have (on average 1.4773006134969324) internal successors, (2408), 1630 states have internal predecessors, (2408), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:34,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1631 states to 1631 states and 2408 transitions. [2025-02-05 20:13:34,914 INFO L78 Accepts]: Start accepts. Automaton has 1631 states and 2408 transitions. Word has length 178 [2025-02-05 20:13:34,914 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:13:34,914 INFO L471 AbstractCegarLoop]: Abstraction has 1631 states and 2408 transitions. [2025-02-05 20:13:34,914 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 44.5) internal successors, (178), 4 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:34,914 INFO L276 IsEmpty]: Start isEmpty. Operand 1631 states and 2408 transitions. [2025-02-05 20:13:34,915 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 179 [2025-02-05 20:13:34,915 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:34,916 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:34,916 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2025-02-05 20:13:34,916 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:34,916 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:34,916 INFO L85 PathProgramCache]: Analyzing trace with hash 937561911, now seen corresponding path program 1 times [2025-02-05 20:13:34,916 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:34,916 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1566971633] [2025-02-05 20:13:34,917 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:34,917 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:34,955 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 178 statements into 1 equivalence classes. [2025-02-05 20:13:35,013 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 178 of 178 statements. [2025-02-05 20:13:35,013 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:35,013 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:13:35,346 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:13:35,346 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:13:35,346 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1566971633] [2025-02-05 20:13:35,346 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1566971633] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:13:35,346 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:13:35,346 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-05 20:13:35,346 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1476545542] [2025-02-05 20:13:35,346 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:13:35,347 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-05 20:13:35,347 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:13:35,347 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-05 20:13:35,347 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-02-05 20:13:35,347 INFO L87 Difference]: Start difference. First operand 1631 states and 2408 transitions. Second operand has 5 states, 5 states have (on average 35.6) internal successors, (178), 5 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:35,797 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:13:35,797 INFO L93 Difference]: Finished difference Result 2728 states and 4024 transitions. [2025-02-05 20:13:35,798 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-05 20:13:35,798 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 35.6) internal successors, (178), 5 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 178 [2025-02-05 20:13:35,798 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:13:35,801 INFO L225 Difference]: With dead ends: 2728 [2025-02-05 20:13:35,801 INFO L226 Difference]: Without dead ends: 1639 [2025-02-05 20:13:35,802 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-02-05 20:13:35,802 INFO L435 NwaCegarLoop]: 1335 mSDtfsCounter, 1530 mSDsluCounter, 2664 mSDsCounter, 0 mSdLazyCounter, 899 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1530 SdHoareTripleChecker+Valid, 3999 SdHoareTripleChecker+Invalid, 899 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 899 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-02-05 20:13:35,802 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1530 Valid, 3999 Invalid, 899 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 899 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-02-05 20:13:35,803 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1639 states. [2025-02-05 20:13:35,812 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1639 to 1639. [2025-02-05 20:13:35,813 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1639 states, 1638 states have (on average 1.4755799755799757) internal successors, (2417), 1638 states have internal predecessors, (2417), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:35,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1639 states to 1639 states and 2417 transitions. [2025-02-05 20:13:35,814 INFO L78 Accepts]: Start accepts. Automaton has 1639 states and 2417 transitions. Word has length 178 [2025-02-05 20:13:35,815 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:13:35,815 INFO L471 AbstractCegarLoop]: Abstraction has 1639 states and 2417 transitions. [2025-02-05 20:13:35,815 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 35.6) internal successors, (178), 5 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:35,826 INFO L276 IsEmpty]: Start isEmpty. Operand 1639 states and 2417 transitions. [2025-02-05 20:13:35,827 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 179 [2025-02-05 20:13:35,827 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:35,831 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:35,831 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2025-02-05 20:13:35,831 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:35,831 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:35,831 INFO L85 PathProgramCache]: Analyzing trace with hash -2141668821, now seen corresponding path program 1 times [2025-02-05 20:13:35,832 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:35,832 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1737603356] [2025-02-05 20:13:35,832 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:35,832 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:35,864 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 178 statements into 1 equivalence classes. [2025-02-05 20:13:35,995 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 178 of 178 statements. [2025-02-05 20:13:35,996 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:35,996 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:13:36,454 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:13:36,454 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:13:36,454 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1737603356] [2025-02-05 20:13:36,454 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1737603356] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:13:36,454 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:13:36,454 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2025-02-05 20:13:36,454 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1740027965] [2025-02-05 20:13:36,454 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:13:36,455 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2025-02-05 20:13:36,455 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:13:36,455 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2025-02-05 20:13:36,455 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2025-02-05 20:13:36,455 INFO L87 Difference]: Start difference. First operand 1639 states and 2417 transitions. Second operand has 12 states, 12 states have (on average 14.833333333333334) internal successors, (178), 12 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:37,610 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:13:37,610 INFO L93 Difference]: Finished difference Result 2784 states and 4096 transitions. [2025-02-05 20:13:37,610 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2025-02-05 20:13:37,610 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 12 states have (on average 14.833333333333334) internal successors, (178), 12 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 178 [2025-02-05 20:13:37,611 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:13:37,616 INFO L225 Difference]: With dead ends: 2784 [2025-02-05 20:13:37,616 INFO L226 Difference]: Without dead ends: 1687 [2025-02-05 20:13:37,617 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2025-02-05 20:13:37,618 INFO L435 NwaCegarLoop]: 1349 mSDtfsCounter, 35 mSDsluCounter, 13474 mSDsCounter, 0 mSdLazyCounter, 3150 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 35 SdHoareTripleChecker+Valid, 14823 SdHoareTripleChecker+Invalid, 3151 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 3150 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2025-02-05 20:13:37,619 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [35 Valid, 14823 Invalid, 3151 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 3150 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2025-02-05 20:13:37,620 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1687 states. [2025-02-05 20:13:37,629 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1687 to 1672. [2025-02-05 20:13:37,631 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1672 states, 1671 states have (on average 1.4727707959305805) internal successors, (2461), 1671 states have internal predecessors, (2461), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:37,632 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1672 states to 1672 states and 2461 transitions. [2025-02-05 20:13:37,632 INFO L78 Accepts]: Start accepts. Automaton has 1672 states and 2461 transitions. Word has length 178 [2025-02-05 20:13:37,632 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:13:37,632 INFO L471 AbstractCegarLoop]: Abstraction has 1672 states and 2461 transitions. [2025-02-05 20:13:37,632 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 12 states have (on average 14.833333333333334) internal successors, (178), 12 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:37,632 INFO L276 IsEmpty]: Start isEmpty. Operand 1672 states and 2461 transitions. [2025-02-05 20:13:37,633 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 179 [2025-02-05 20:13:37,634 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:37,634 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:37,634 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2025-02-05 20:13:37,634 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:37,634 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:37,634 INFO L85 PathProgramCache]: Analyzing trace with hash 92411695, now seen corresponding path program 1 times [2025-02-05 20:13:37,634 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:37,635 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1513267417] [2025-02-05 20:13:37,635 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:37,635 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:37,679 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 178 statements into 1 equivalence classes. [2025-02-05 20:13:37,791 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 178 of 178 statements. [2025-02-05 20:13:37,792 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:37,792 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:13:38,162 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:13:38,163 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:13:38,163 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1513267417] [2025-02-05 20:13:38,163 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1513267417] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:13:38,163 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:13:38,163 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-05 20:13:38,163 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [276503187] [2025-02-05 20:13:38,163 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:13:38,164 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-02-05 20:13:38,164 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:13:38,164 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-05 20:13:38,164 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-02-05 20:13:38,165 INFO L87 Difference]: Start difference. First operand 1672 states and 2461 transitions. Second operand has 6 states, 6 states have (on average 29.666666666666668) internal successors, (178), 6 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:39,040 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:13:39,040 INFO L93 Difference]: Finished difference Result 3545 states and 5195 transitions. [2025-02-05 20:13:39,041 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-05 20:13:39,041 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 29.666666666666668) internal successors, (178), 6 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 178 [2025-02-05 20:13:39,041 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:13:39,045 INFO L225 Difference]: With dead ends: 3545 [2025-02-05 20:13:39,045 INFO L226 Difference]: Without dead ends: 2419 [2025-02-05 20:13:39,046 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-02-05 20:13:39,046 INFO L435 NwaCegarLoop]: 1109 mSDtfsCounter, 2064 mSDsluCounter, 3316 mSDsCounter, 0 mSdLazyCounter, 2105 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2064 SdHoareTripleChecker+Valid, 4425 SdHoareTripleChecker+Invalid, 2105 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2105 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.8s IncrementalHoareTripleChecker+Time [2025-02-05 20:13:39,047 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2064 Valid, 4425 Invalid, 2105 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2105 Invalid, 0 Unknown, 0 Unchecked, 0.8s Time] [2025-02-05 20:13:39,048 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2419 states. [2025-02-05 20:13:39,062 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2419 to 2288. [2025-02-05 20:13:39,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2288 states, 2287 states have (on average 1.4704853519895058) internal successors, (3363), 2287 states have internal predecessors, (3363), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:39,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2288 states to 2288 states and 3363 transitions. [2025-02-05 20:13:39,065 INFO L78 Accepts]: Start accepts. Automaton has 2288 states and 3363 transitions. Word has length 178 [2025-02-05 20:13:39,065 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:13:39,065 INFO L471 AbstractCegarLoop]: Abstraction has 2288 states and 3363 transitions. [2025-02-05 20:13:39,066 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 29.666666666666668) internal successors, (178), 6 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:39,066 INFO L276 IsEmpty]: Start isEmpty. Operand 2288 states and 3363 transitions. [2025-02-05 20:13:39,067 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 179 [2025-02-05 20:13:39,067 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:39,068 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:39,068 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2025-02-05 20:13:39,068 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:39,068 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:39,068 INFO L85 PathProgramCache]: Analyzing trace with hash 1629489429, now seen corresponding path program 1 times [2025-02-05 20:13:39,068 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:39,068 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [345286880] [2025-02-05 20:13:39,069 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:39,069 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:39,100 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 178 statements into 1 equivalence classes. [2025-02-05 20:13:39,198 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 178 of 178 statements. [2025-02-05 20:13:39,198 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:39,198 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:13:39,409 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:13:39,409 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:13:39,409 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [345286880] [2025-02-05 20:13:39,409 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [345286880] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:13:39,410 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:13:39,410 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-05 20:13:39,410 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1880762369] [2025-02-05 20:13:39,410 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:13:39,410 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-02-05 20:13:39,410 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:13:39,411 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-05 20:13:39,411 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-02-05 20:13:39,411 INFO L87 Difference]: Start difference. First operand 2288 states and 3363 transitions. Second operand has 6 states, 6 states have (on average 29.666666666666668) internal successors, (178), 6 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:40,347 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:13:40,348 INFO L93 Difference]: Finished difference Result 3625 states and 5299 transitions. [2025-02-05 20:13:40,348 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-05 20:13:40,348 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 29.666666666666668) internal successors, (178), 6 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 178 [2025-02-05 20:13:40,348 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:13:40,352 INFO L225 Difference]: With dead ends: 3625 [2025-02-05 20:13:40,352 INFO L226 Difference]: Without dead ends: 2419 [2025-02-05 20:13:40,353 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-02-05 20:13:40,354 INFO L435 NwaCegarLoop]: 1109 mSDtfsCounter, 2084 mSDsluCounter, 3315 mSDsCounter, 0 mSdLazyCounter, 2105 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2084 SdHoareTripleChecker+Valid, 4424 SdHoareTripleChecker+Invalid, 2105 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2105 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2025-02-05 20:13:40,354 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2084 Valid, 4424 Invalid, 2105 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2105 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2025-02-05 20:13:40,356 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2419 states. [2025-02-05 20:13:40,385 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2419 to 2288. [2025-02-05 20:13:40,389 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2288 states, 2287 states have (on average 1.4687363358111063) internal successors, (3359), 2287 states have internal predecessors, (3359), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:40,391 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2288 states to 2288 states and 3359 transitions. [2025-02-05 20:13:40,391 INFO L78 Accepts]: Start accepts. Automaton has 2288 states and 3359 transitions. Word has length 178 [2025-02-05 20:13:40,391 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:13:40,391 INFO L471 AbstractCegarLoop]: Abstraction has 2288 states and 3359 transitions. [2025-02-05 20:13:40,391 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 29.666666666666668) internal successors, (178), 6 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:40,391 INFO L276 IsEmpty]: Start isEmpty. Operand 2288 states and 3359 transitions. [2025-02-05 20:13:40,393 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 179 [2025-02-05 20:13:40,393 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:40,393 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:40,393 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2025-02-05 20:13:40,394 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:40,394 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:40,394 INFO L85 PathProgramCache]: Analyzing trace with hash -1028639336, now seen corresponding path program 1 times [2025-02-05 20:13:40,394 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:40,394 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [358196669] [2025-02-05 20:13:40,394 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:40,394 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:40,434 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 178 statements into 1 equivalence classes. [2025-02-05 20:13:40,454 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 178 of 178 statements. [2025-02-05 20:13:40,454 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:40,454 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:13:40,626 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:13:40,626 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:13:40,626 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [358196669] [2025-02-05 20:13:40,626 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [358196669] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:13:40,626 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:13:40,626 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-05 20:13:40,626 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1462484402] [2025-02-05 20:13:40,626 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:13:40,627 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-05 20:13:40,627 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:13:40,627 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-05 20:13:40,627 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-02-05 20:13:40,627 INFO L87 Difference]: Start difference. First operand 2288 states and 3359 transitions. Second operand has 5 states, 5 states have (on average 35.6) internal successors, (178), 5 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:40,995 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:13:40,996 INFO L93 Difference]: Finished difference Result 3583 states and 5236 transitions. [2025-02-05 20:13:40,996 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-05 20:13:40,996 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 35.6) internal successors, (178), 5 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 178 [2025-02-05 20:13:40,996 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:13:40,999 INFO L225 Difference]: With dead ends: 3583 [2025-02-05 20:13:40,999 INFO L226 Difference]: Without dead ends: 2304 [2025-02-05 20:13:41,000 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-02-05 20:13:41,001 INFO L435 NwaCegarLoop]: 1360 mSDtfsCounter, 0 mSDsluCounter, 2712 mSDsCounter, 0 mSdLazyCounter, 827 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 4072 SdHoareTripleChecker+Invalid, 828 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 827 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-02-05 20:13:41,002 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 4072 Invalid, 828 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 827 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-02-05 20:13:41,005 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2304 states. [2025-02-05 20:13:41,017 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2304 to 2288. [2025-02-05 20:13:41,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2288 states, 2287 states have (on average 1.4687363358111063) internal successors, (3359), 2287 states have internal predecessors, (3359), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:41,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2288 states to 2288 states and 3359 transitions. [2025-02-05 20:13:41,021 INFO L78 Accepts]: Start accepts. Automaton has 2288 states and 3359 transitions. Word has length 178 [2025-02-05 20:13:41,021 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:13:41,022 INFO L471 AbstractCegarLoop]: Abstraction has 2288 states and 3359 transitions. [2025-02-05 20:13:41,022 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 35.6) internal successors, (178), 5 states have internal predecessors, (178), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:41,022 INFO L276 IsEmpty]: Start isEmpty. Operand 2288 states and 3359 transitions. [2025-02-05 20:13:41,023 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2025-02-05 20:13:41,023 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:41,024 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:41,024 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2025-02-05 20:13:41,024 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:41,024 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:41,024 INFO L85 PathProgramCache]: Analyzing trace with hash -1155622539, now seen corresponding path program 1 times [2025-02-05 20:13:41,024 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:41,024 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1977680519] [2025-02-05 20:13:41,024 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:41,024 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:41,057 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 179 statements into 1 equivalence classes. [2025-02-05 20:13:41,108 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 179 of 179 statements. [2025-02-05 20:13:41,108 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:41,108 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:13:41,448 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:13:41,449 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:13:41,449 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1977680519] [2025-02-05 20:13:41,449 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1977680519] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:13:41,449 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:13:41,449 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-02-05 20:13:41,449 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1774637638] [2025-02-05 20:13:41,449 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:13:41,449 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-02-05 20:13:41,450 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:13:41,450 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-05 20:13:41,450 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2025-02-05 20:13:41,450 INFO L87 Difference]: Start difference. First operand 2288 states and 3359 transitions. Second operand has 7 states, 7 states have (on average 25.571428571428573) internal successors, (179), 7 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:42,159 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:13:42,159 INFO L93 Difference]: Finished difference Result 4792 states and 7007 transitions. [2025-02-05 20:13:42,160 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-05 20:13:42,160 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 25.571428571428573) internal successors, (179), 7 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 179 [2025-02-05 20:13:42,160 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:13:42,165 INFO L225 Difference]: With dead ends: 4792 [2025-02-05 20:13:42,165 INFO L226 Difference]: Without dead ends: 3616 [2025-02-05 20:13:42,167 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2025-02-05 20:13:42,167 INFO L435 NwaCegarLoop]: 1336 mSDtfsCounter, 2139 mSDsluCounter, 5329 mSDsCounter, 0 mSdLazyCounter, 1498 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2139 SdHoareTripleChecker+Valid, 6665 SdHoareTripleChecker+Invalid, 1499 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1498 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2025-02-05 20:13:42,167 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2139 Valid, 6665 Invalid, 1499 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1498 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2025-02-05 20:13:42,169 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3616 states. [2025-02-05 20:13:42,187 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3616 to 2304. [2025-02-05 20:13:42,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2304 states, 2303 states have (on average 1.4689535388623534) internal successors, (3383), 2303 states have internal predecessors, (3383), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:42,191 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2304 states to 2304 states and 3383 transitions. [2025-02-05 20:13:42,192 INFO L78 Accepts]: Start accepts. Automaton has 2304 states and 3383 transitions. Word has length 179 [2025-02-05 20:13:42,192 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:13:42,192 INFO L471 AbstractCegarLoop]: Abstraction has 2304 states and 3383 transitions. [2025-02-05 20:13:42,192 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 25.571428571428573) internal successors, (179), 7 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:42,192 INFO L276 IsEmpty]: Start isEmpty. Operand 2304 states and 3383 transitions. [2025-02-05 20:13:42,194 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2025-02-05 20:13:42,194 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:42,194 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:42,194 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2025-02-05 20:13:42,194 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:42,194 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:42,194 INFO L85 PathProgramCache]: Analyzing trace with hash -495537610, now seen corresponding path program 1 times [2025-02-05 20:13:42,194 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:42,194 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [229799854] [2025-02-05 20:13:42,194 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:42,194 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:42,229 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 179 statements into 1 equivalence classes. [2025-02-05 20:13:42,452 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 179 of 179 statements. [2025-02-05 20:13:42,452 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:42,452 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:13:42,667 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:13:42,668 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:13:42,668 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [229799854] [2025-02-05 20:13:42,668 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [229799854] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:13:42,668 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:13:42,668 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-05 20:13:42,668 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1003096382] [2025-02-05 20:13:42,668 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:13:42,668 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-02-05 20:13:42,668 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:13:42,669 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-05 20:13:42,669 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-02-05 20:13:42,669 INFO L87 Difference]: Start difference. First operand 2304 states and 3383 transitions. Second operand has 6 states, 6 states have (on average 29.833333333333332) internal successors, (179), 6 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:43,599 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:13:43,599 INFO L93 Difference]: Finished difference Result 3563 states and 5213 transitions. [2025-02-05 20:13:43,599 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-05 20:13:43,600 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 29.833333333333332) internal successors, (179), 6 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 179 [2025-02-05 20:13:43,600 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:13:43,603 INFO L225 Difference]: With dead ends: 3563 [2025-02-05 20:13:43,603 INFO L226 Difference]: Without dead ends: 2435 [2025-02-05 20:13:43,604 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-02-05 20:13:43,605 INFO L435 NwaCegarLoop]: 1109 mSDtfsCounter, 1828 mSDsluCounter, 3318 mSDsCounter, 0 mSdLazyCounter, 2105 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1828 SdHoareTripleChecker+Valid, 4427 SdHoareTripleChecker+Invalid, 2105 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2105 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2025-02-05 20:13:43,605 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1828 Valid, 4427 Invalid, 2105 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2105 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2025-02-05 20:13:43,606 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2435 states. [2025-02-05 20:13:43,617 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2435 to 2377. [2025-02-05 20:13:43,619 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2377 states, 2376 states have (on average 1.4642255892255893) internal successors, (3479), 2376 states have internal predecessors, (3479), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:43,621 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2377 states to 2377 states and 3479 transitions. [2025-02-05 20:13:43,621 INFO L78 Accepts]: Start accepts. Automaton has 2377 states and 3479 transitions. Word has length 179 [2025-02-05 20:13:43,621 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:13:43,621 INFO L471 AbstractCegarLoop]: Abstraction has 2377 states and 3479 transitions. [2025-02-05 20:13:43,621 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 29.833333333333332) internal successors, (179), 6 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:43,621 INFO L276 IsEmpty]: Start isEmpty. Operand 2377 states and 3479 transitions. [2025-02-05 20:13:43,623 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2025-02-05 20:13:43,623 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:43,623 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:43,623 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2025-02-05 20:13:43,623 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:43,624 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:43,624 INFO L85 PathProgramCache]: Analyzing trace with hash -1400647207, now seen corresponding path program 1 times [2025-02-05 20:13:43,624 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:43,624 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1187779634] [2025-02-05 20:13:43,624 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:43,624 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:43,655 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 179 statements into 1 equivalence classes. [2025-02-05 20:13:43,854 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 179 of 179 statements. [2025-02-05 20:13:43,855 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:43,855 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:13:44,350 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:13:44,350 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:13:44,350 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1187779634] [2025-02-05 20:13:44,350 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1187779634] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:13:44,350 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:13:44,350 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-02-05 20:13:44,350 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1227572513] [2025-02-05 20:13:44,351 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:13:44,351 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-02-05 20:13:44,351 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:13:44,351 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-05 20:13:44,351 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2025-02-05 20:13:44,351 INFO L87 Difference]: Start difference. First operand 2377 states and 3479 transitions. Second operand has 7 states, 7 states have (on average 25.571428571428573) internal successors, (179), 7 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:44,909 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:13:44,909 INFO L93 Difference]: Finished difference Result 3511 states and 5142 transitions. [2025-02-05 20:13:44,909 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-02-05 20:13:44,910 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 25.571428571428573) internal successors, (179), 7 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 179 [2025-02-05 20:13:44,910 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:13:44,913 INFO L225 Difference]: With dead ends: 3511 [2025-02-05 20:13:44,913 INFO L226 Difference]: Without dead ends: 2383 [2025-02-05 20:13:44,915 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2025-02-05 20:13:44,915 INFO L435 NwaCegarLoop]: 1335 mSDtfsCounter, 1522 mSDsluCounter, 3999 mSDsCounter, 0 mSdLazyCounter, 1203 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1522 SdHoareTripleChecker+Valid, 5334 SdHoareTripleChecker+Invalid, 1203 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1203 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-02-05 20:13:44,915 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1522 Valid, 5334 Invalid, 1203 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1203 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-02-05 20:13:44,917 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2383 states. [2025-02-05 20:13:44,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2383 to 2383. [2025-02-05 20:13:44,932 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2383 states, 2382 states have (on average 1.4630562552476911) internal successors, (3485), 2382 states have internal predecessors, (3485), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:44,933 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2383 states to 2383 states and 3485 transitions. [2025-02-05 20:13:44,934 INFO L78 Accepts]: Start accepts. Automaton has 2383 states and 3485 transitions. Word has length 179 [2025-02-05 20:13:44,934 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:13:44,934 INFO L471 AbstractCegarLoop]: Abstraction has 2383 states and 3485 transitions. [2025-02-05 20:13:44,934 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 25.571428571428573) internal successors, (179), 7 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:44,934 INFO L276 IsEmpty]: Start isEmpty. Operand 2383 states and 3485 transitions. [2025-02-05 20:13:44,936 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2025-02-05 20:13:44,936 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:44,936 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:44,936 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2025-02-05 20:13:44,936 INFO L396 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:44,936 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:44,937 INFO L85 PathProgramCache]: Analyzing trace with hash -744648746, now seen corresponding path program 1 times [2025-02-05 20:13:44,937 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:44,937 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1484855401] [2025-02-05 20:13:44,937 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:44,937 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:44,969 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 179 statements into 1 equivalence classes. [2025-02-05 20:13:45,106 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 179 of 179 statements. [2025-02-05 20:13:45,107 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:45,107 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:13:45,694 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:13:45,694 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:13:45,694 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1484855401] [2025-02-05 20:13:45,694 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1484855401] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:13:45,694 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:13:45,695 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2025-02-05 20:13:45,695 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1846853616] [2025-02-05 20:13:45,695 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:13:45,695 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 11 states [2025-02-05 20:13:45,695 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:13:45,695 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2025-02-05 20:13:45,696 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2025-02-05 20:13:45,696 INFO L87 Difference]: Start difference. First operand 2383 states and 3485 transitions. Second operand has 11 states, 11 states have (on average 16.272727272727273) internal successors, (179), 11 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:46,860 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:13:46,860 INFO L93 Difference]: Finished difference Result 4048 states and 5879 transitions. [2025-02-05 20:13:46,860 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2025-02-05 20:13:46,860 INFO L78 Accepts]: Start accepts. Automaton has has 11 states, 11 states have (on average 16.272727272727273) internal successors, (179), 11 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 179 [2025-02-05 20:13:46,861 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:13:46,865 INFO L225 Difference]: With dead ends: 4048 [2025-02-05 20:13:46,865 INFO L226 Difference]: Without dead ends: 2914 [2025-02-05 20:13:46,866 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=44, Invalid=138, Unknown=0, NotChecked=0, Total=182 [2025-02-05 20:13:46,867 INFO L435 NwaCegarLoop]: 1328 mSDtfsCounter, 2114 mSDsluCounter, 10589 mSDsCounter, 0 mSdLazyCounter, 2776 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2114 SdHoareTripleChecker+Valid, 11917 SdHoareTripleChecker+Invalid, 2777 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 2776 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2025-02-05 20:13:46,867 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2114 Valid, 11917 Invalid, 2777 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 2776 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2025-02-05 20:13:46,868 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2914 states. [2025-02-05 20:13:46,885 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2914 to 2770. [2025-02-05 20:13:46,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2770 states, 2769 states have (on average 1.447453954496208) internal successors, (4008), 2769 states have internal predecessors, (4008), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:46,889 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2770 states to 2770 states and 4008 transitions. [2025-02-05 20:13:46,890 INFO L78 Accepts]: Start accepts. Automaton has 2770 states and 4008 transitions. Word has length 179 [2025-02-05 20:13:46,890 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:13:46,890 INFO L471 AbstractCegarLoop]: Abstraction has 2770 states and 4008 transitions. [2025-02-05 20:13:46,890 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 11 states, 11 states have (on average 16.272727272727273) internal successors, (179), 11 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:46,890 INFO L276 IsEmpty]: Start isEmpty. Operand 2770 states and 4008 transitions. [2025-02-05 20:13:46,892 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2025-02-05 20:13:46,892 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:46,892 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:46,892 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2025-02-05 20:13:46,893 INFO L396 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:46,893 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:46,893 INFO L85 PathProgramCache]: Analyzing trace with hash -1470667210, now seen corresponding path program 1 times [2025-02-05 20:13:46,893 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:46,893 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1120043799] [2025-02-05 20:13:46,893 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:46,893 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:46,926 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 179 statements into 1 equivalence classes. [2025-02-05 20:13:46,951 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 179 of 179 statements. [2025-02-05 20:13:46,951 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:46,951 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:13:47,117 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:13:47,118 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:13:47,118 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1120043799] [2025-02-05 20:13:47,118 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1120043799] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:13:47,118 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:13:47,118 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-05 20:13:47,118 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [161074294] [2025-02-05 20:13:47,118 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:13:47,118 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-05 20:13:47,118 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:13:47,119 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-05 20:13:47,119 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-02-05 20:13:47,119 INFO L87 Difference]: Start difference. First operand 2770 states and 4008 transitions. Second operand has 5 states, 5 states have (on average 35.8) internal successors, (179), 5 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:47,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:13:47,487 INFO L93 Difference]: Finished difference Result 4154 states and 6014 transitions. [2025-02-05 20:13:47,487 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-05 20:13:47,487 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 35.8) internal successors, (179), 5 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 179 [2025-02-05 20:13:47,487 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:13:47,491 INFO L225 Difference]: With dead ends: 4154 [2025-02-05 20:13:47,491 INFO L226 Difference]: Without dead ends: 2778 [2025-02-05 20:13:47,493 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2025-02-05 20:13:47,493 INFO L435 NwaCegarLoop]: 1360 mSDtfsCounter, 0 mSDsluCounter, 2712 mSDsCounter, 0 mSdLazyCounter, 827 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 4072 SdHoareTripleChecker+Invalid, 828 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 827 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-02-05 20:13:47,494 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 4072 Invalid, 828 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 827 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-02-05 20:13:47,495 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2778 states. [2025-02-05 20:13:47,511 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2778 to 2778. [2025-02-05 20:13:47,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2778 states, 2777 states have (on average 1.4461649261793301) internal successors, (4016), 2777 states have internal predecessors, (4016), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:47,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2778 states to 2778 states and 4016 transitions. [2025-02-05 20:13:47,515 INFO L78 Accepts]: Start accepts. Automaton has 2778 states and 4016 transitions. Word has length 179 [2025-02-05 20:13:47,515 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:13:47,516 INFO L471 AbstractCegarLoop]: Abstraction has 2778 states and 4016 transitions. [2025-02-05 20:13:47,516 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 35.8) internal successors, (179), 5 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:47,516 INFO L276 IsEmpty]: Start isEmpty. Operand 2778 states and 4016 transitions. [2025-02-05 20:13:47,518 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2025-02-05 20:13:47,518 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:47,518 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:47,518 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2025-02-05 20:13:47,518 INFO L396 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:47,518 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:47,519 INFO L85 PathProgramCache]: Analyzing trace with hash 217953885, now seen corresponding path program 1 times [2025-02-05 20:13:47,519 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:47,519 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2039451742] [2025-02-05 20:13:47,519 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:47,519 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:47,554 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 179 statements into 1 equivalence classes. [2025-02-05 20:13:47,680 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 179 of 179 statements. [2025-02-05 20:13:47,681 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:47,681 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:13:48,235 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:13:48,235 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:13:48,235 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2039451742] [2025-02-05 20:13:48,235 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2039451742] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:13:48,235 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:13:48,235 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2025-02-05 20:13:48,236 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [184762015] [2025-02-05 20:13:48,236 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:13:48,236 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 15 states [2025-02-05 20:13:48,236 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:13:48,236 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2025-02-05 20:13:48,236 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2025-02-05 20:13:48,237 INFO L87 Difference]: Start difference. First operand 2778 states and 4016 transitions. Second operand has 15 states, 15 states have (on average 11.933333333333334) internal successors, (179), 15 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:49,450 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:13:49,450 INFO L93 Difference]: Finished difference Result 4358 states and 6286 transitions. [2025-02-05 20:13:49,450 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2025-02-05 20:13:49,451 INFO L78 Accepts]: Start accepts. Automaton has has 15 states, 15 states have (on average 11.933333333333334) internal successors, (179), 15 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 179 [2025-02-05 20:13:49,451 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:13:49,459 INFO L225 Difference]: With dead ends: 4358 [2025-02-05 20:13:49,462 INFO L226 Difference]: Without dead ends: 2974 [2025-02-05 20:13:49,464 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=179, Unknown=0, NotChecked=0, Total=210 [2025-02-05 20:13:49,464 INFO L435 NwaCegarLoop]: 1344 mSDtfsCounter, 55 mSDsluCounter, 16126 mSDsCounter, 0 mSdLazyCounter, 3797 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 55 SdHoareTripleChecker+Valid, 17470 SdHoareTripleChecker+Invalid, 3797 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 3797 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.2s IncrementalHoareTripleChecker+Time [2025-02-05 20:13:49,464 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [55 Valid, 17470 Invalid, 3797 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 3797 Invalid, 0 Unknown, 0 Unchecked, 1.2s Time] [2025-02-05 20:13:49,466 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2974 states. [2025-02-05 20:13:49,489 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2974 to 2926. [2025-02-05 20:13:49,496 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2926 states, 2925 states have (on average 1.442051282051282) internal successors, (4218), 2925 states have internal predecessors, (4218), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:49,502 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2926 states to 2926 states and 4218 transitions. [2025-02-05 20:13:49,505 INFO L78 Accepts]: Start accepts. Automaton has 2926 states and 4218 transitions. Word has length 179 [2025-02-05 20:13:49,506 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:13:49,506 INFO L471 AbstractCegarLoop]: Abstraction has 2926 states and 4218 transitions. [2025-02-05 20:13:49,506 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 15 states, 15 states have (on average 11.933333333333334) internal successors, (179), 15 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:49,506 INFO L276 IsEmpty]: Start isEmpty. Operand 2926 states and 4218 transitions. [2025-02-05 20:13:49,508 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2025-02-05 20:13:49,512 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:49,512 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:49,513 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2025-02-05 20:13:49,513 INFO L396 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:49,513 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:49,513 INFO L85 PathProgramCache]: Analyzing trace with hash -359052167, now seen corresponding path program 1 times [2025-02-05 20:13:49,513 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:49,513 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [960333548] [2025-02-05 20:13:49,513 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:49,513 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:49,551 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 179 statements into 1 equivalence classes. [2025-02-05 20:13:49,588 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 179 of 179 statements. [2025-02-05 20:13:49,589 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:49,589 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:13:49,921 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:13:49,921 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:13:49,922 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [960333548] [2025-02-05 20:13:49,922 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [960333548] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:13:49,922 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:13:49,922 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-05 20:13:49,922 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [607009554] [2025-02-05 20:13:49,922 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:13:49,922 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-02-05 20:13:49,922 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:13:49,923 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-05 20:13:49,923 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2025-02-05 20:13:49,923 INFO L87 Difference]: Start difference. First operand 2926 states and 4218 transitions. Second operand has 6 states, 6 states have (on average 29.833333333333332) internal successors, (179), 6 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:50,478 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:13:50,478 INFO L93 Difference]: Finished difference Result 6251 states and 8946 transitions. [2025-02-05 20:13:50,479 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-05 20:13:50,479 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 29.833333333333332) internal successors, (179), 6 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 179 [2025-02-05 20:13:50,479 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:13:50,484 INFO L225 Difference]: With dead ends: 6251 [2025-02-05 20:13:50,484 INFO L226 Difference]: Without dead ends: 4695 [2025-02-05 20:13:50,486 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2025-02-05 20:13:50,486 INFO L435 NwaCegarLoop]: 1336 mSDtfsCounter, 2121 mSDsluCounter, 3999 mSDsCounter, 0 mSdLazyCounter, 1196 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2121 SdHoareTripleChecker+Valid, 5335 SdHoareTripleChecker+Invalid, 1196 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1196 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-02-05 20:13:50,487 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2121 Valid, 5335 Invalid, 1196 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1196 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-02-05 20:13:50,490 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4695 states. [2025-02-05 20:13:50,516 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4695 to 4350. [2025-02-05 20:13:50,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4350 states, 4349 states have (on average 1.4357323522648884) internal successors, (6244), 4349 states have internal predecessors, (6244), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:50,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4350 states to 4350 states and 6244 transitions. [2025-02-05 20:13:50,523 INFO L78 Accepts]: Start accepts. Automaton has 4350 states and 6244 transitions. Word has length 179 [2025-02-05 20:13:50,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:13:50,524 INFO L471 AbstractCegarLoop]: Abstraction has 4350 states and 6244 transitions. [2025-02-05 20:13:50,524 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 29.833333333333332) internal successors, (179), 6 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:50,524 INFO L276 IsEmpty]: Start isEmpty. Operand 4350 states and 6244 transitions. [2025-02-05 20:13:50,527 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2025-02-05 20:13:50,527 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:50,527 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:50,528 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2025-02-05 20:13:50,528 INFO L396 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:50,528 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:50,528 INFO L85 PathProgramCache]: Analyzing trace with hash 986219226, now seen corresponding path program 1 times [2025-02-05 20:13:50,528 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:50,528 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1328995894] [2025-02-05 20:13:50,528 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:50,528 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:50,560 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 179 statements into 1 equivalence classes. [2025-02-05 20:13:50,637 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 179 of 179 statements. [2025-02-05 20:13:50,638 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:50,638 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:13:50,860 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:13:50,860 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:13:50,861 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1328995894] [2025-02-05 20:13:50,861 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1328995894] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:13:50,861 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:13:50,861 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-05 20:13:50,861 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1546374007] [2025-02-05 20:13:50,861 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:13:50,861 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-05 20:13:50,861 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:13:50,862 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-05 20:13:50,862 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-02-05 20:13:50,862 INFO L87 Difference]: Start difference. First operand 4350 states and 6244 transitions. Second operand has 5 states, 5 states have (on average 35.8) internal successors, (179), 5 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:51,353 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:13:51,354 INFO L93 Difference]: Finished difference Result 6186 states and 8846 transitions. [2025-02-05 20:13:51,354 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-05 20:13:51,354 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 35.8) internal successors, (179), 5 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 179 [2025-02-05 20:13:51,354 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:13:51,358 INFO L225 Difference]: With dead ends: 6186 [2025-02-05 20:13:51,358 INFO L226 Difference]: Without dead ends: 4434 [2025-02-05 20:13:51,360 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2025-02-05 20:13:51,360 INFO L435 NwaCegarLoop]: 1358 mSDtfsCounter, 217 mSDsluCounter, 4060 mSDsCounter, 0 mSdLazyCounter, 1122 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 217 SdHoareTripleChecker+Valid, 5418 SdHoareTripleChecker+Invalid, 1122 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1122 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-02-05 20:13:51,360 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [217 Valid, 5418 Invalid, 1122 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1122 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-02-05 20:13:51,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4434 states. [2025-02-05 20:13:51,387 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4434 to 4290. [2025-02-05 20:13:51,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4290 states, 4289 states have (on average 1.4334343669853113) internal successors, (6148), 4289 states have internal predecessors, (6148), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:51,393 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4290 states to 4290 states and 6148 transitions. [2025-02-05 20:13:51,393 INFO L78 Accepts]: Start accepts. Automaton has 4290 states and 6148 transitions. Word has length 179 [2025-02-05 20:13:51,394 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:13:51,394 INFO L471 AbstractCegarLoop]: Abstraction has 4290 states and 6148 transitions. [2025-02-05 20:13:51,394 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 35.8) internal successors, (179), 5 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:51,394 INFO L276 IsEmpty]: Start isEmpty. Operand 4290 states and 6148 transitions. [2025-02-05 20:13:51,397 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2025-02-05 20:13:51,398 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:51,398 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:51,398 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2025-02-05 20:13:51,398 INFO L396 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:51,398 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:51,398 INFO L85 PathProgramCache]: Analyzing trace with hash -2005556165, now seen corresponding path program 1 times [2025-02-05 20:13:51,399 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:51,399 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [297355575] [2025-02-05 20:13:51,399 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:51,399 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:51,430 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 179 statements into 1 equivalence classes. [2025-02-05 20:13:51,566 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 179 of 179 statements. [2025-02-05 20:13:51,567 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:51,567 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:13:51,780 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:13:51,781 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:13:51,781 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [297355575] [2025-02-05 20:13:51,781 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [297355575] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:13:51,781 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:13:51,781 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-05 20:13:51,781 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1511471158] [2025-02-05 20:13:51,781 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:13:51,781 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-05 20:13:51,781 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:13:51,782 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-05 20:13:51,782 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-02-05 20:13:51,782 INFO L87 Difference]: Start difference. First operand 4290 states and 6148 transitions. Second operand has 5 states, 5 states have (on average 35.8) internal successors, (179), 5 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:52,270 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:13:52,271 INFO L93 Difference]: Finished difference Result 5830 states and 8355 transitions. [2025-02-05 20:13:52,271 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-05 20:13:52,271 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 35.8) internal successors, (179), 5 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 179 [2025-02-05 20:13:52,271 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:13:52,275 INFO L225 Difference]: With dead ends: 5830 [2025-02-05 20:13:52,275 INFO L226 Difference]: Without dead ends: 4056 [2025-02-05 20:13:52,277 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2025-02-05 20:13:52,277 INFO L435 NwaCegarLoop]: 1362 mSDtfsCounter, 223 mSDsluCounter, 4068 mSDsCounter, 0 mSdLazyCounter, 1128 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 223 SdHoareTripleChecker+Valid, 5430 SdHoareTripleChecker+Invalid, 1128 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1128 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-02-05 20:13:52,277 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [223 Valid, 5430 Invalid, 1128 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1128 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-02-05 20:13:52,279 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 4056 states. [2025-02-05 20:13:52,304 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 4056 to 3984. [2025-02-05 20:13:52,307 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3984 states, 3983 states have (on average 1.4426311825257343) internal successors, (5746), 3983 states have internal predecessors, (5746), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:52,311 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3984 states to 3984 states and 5746 transitions. [2025-02-05 20:13:52,311 INFO L78 Accepts]: Start accepts. Automaton has 3984 states and 5746 transitions. Word has length 179 [2025-02-05 20:13:52,311 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:13:52,311 INFO L471 AbstractCegarLoop]: Abstraction has 3984 states and 5746 transitions. [2025-02-05 20:13:52,312 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 35.8) internal successors, (179), 5 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:52,312 INFO L276 IsEmpty]: Start isEmpty. Operand 3984 states and 5746 transitions. [2025-02-05 20:13:52,315 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2025-02-05 20:13:52,315 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:52,316 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:52,316 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33 [2025-02-05 20:13:52,316 INFO L396 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:52,316 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:52,316 INFO L85 PathProgramCache]: Analyzing trace with hash -500212282, now seen corresponding path program 1 times [2025-02-05 20:13:52,316 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:52,316 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [656542122] [2025-02-05 20:13:52,317 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:52,317 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:52,349 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 179 statements into 1 equivalence classes. [2025-02-05 20:13:52,470 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 179 of 179 statements. [2025-02-05 20:13:52,471 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:52,471 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:13:52,738 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:13:52,738 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:13:52,738 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [656542122] [2025-02-05 20:13:52,738 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [656542122] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:13:52,738 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:13:52,738 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-02-05 20:13:52,738 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1286029064] [2025-02-05 20:13:52,738 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:13:52,739 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-02-05 20:13:52,739 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:13:52,739 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-05 20:13:52,739 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-02-05 20:13:52,739 INFO L87 Difference]: Start difference. First operand 3984 states and 5746 transitions. Second operand has 7 states, 7 states have (on average 25.571428571428573) internal successors, (179), 7 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:54,372 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:13:54,372 INFO L93 Difference]: Finished difference Result 8225 states and 11842 transitions. [2025-02-05 20:13:54,372 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-02-05 20:13:54,373 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 25.571428571428573) internal successors, (179), 7 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 179 [2025-02-05 20:13:54,373 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:13:54,377 INFO L225 Difference]: With dead ends: 8225 [2025-02-05 20:13:54,377 INFO L226 Difference]: Without dead ends: 5352 [2025-02-05 20:13:54,380 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2025-02-05 20:13:54,380 INFO L435 NwaCegarLoop]: 2462 mSDtfsCounter, 1574 mSDsluCounter, 10963 mSDsCounter, 0 mSdLazyCounter, 3328 mSolverCounterSat, 61 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1574 SdHoareTripleChecker+Valid, 13425 SdHoareTripleChecker+Invalid, 3389 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 61 IncrementalHoareTripleChecker+Valid, 3328 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.5s IncrementalHoareTripleChecker+Time [2025-02-05 20:13:54,380 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1574 Valid, 13425 Invalid, 3389 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [61 Valid, 3328 Invalid, 0 Unknown, 0 Unchecked, 1.5s Time] [2025-02-05 20:13:54,383 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5352 states. [2025-02-05 20:13:54,441 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5352 to 4944. [2025-02-05 20:13:54,445 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 4944 states, 4943 states have (on average 1.4497268865061703) internal successors, (7166), 4943 states have internal predecessors, (7166), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:54,451 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 4944 states to 4944 states and 7166 transitions. [2025-02-05 20:13:54,451 INFO L78 Accepts]: Start accepts. Automaton has 4944 states and 7166 transitions. Word has length 179 [2025-02-05 20:13:54,452 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:13:54,452 INFO L471 AbstractCegarLoop]: Abstraction has 4944 states and 7166 transitions. [2025-02-05 20:13:54,452 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 25.571428571428573) internal successors, (179), 7 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:54,452 INFO L276 IsEmpty]: Start isEmpty. Operand 4944 states and 7166 transitions. [2025-02-05 20:13:54,457 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2025-02-05 20:13:54,457 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:54,457 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:54,458 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2025-02-05 20:13:54,458 INFO L396 AbstractCegarLoop]: === Iteration 36 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:54,458 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:54,458 INFO L85 PathProgramCache]: Analyzing trace with hash 1036865452, now seen corresponding path program 1 times [2025-02-05 20:13:54,458 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:54,458 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1289626287] [2025-02-05 20:13:54,458 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:54,459 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:54,503 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 179 statements into 1 equivalence classes. [2025-02-05 20:13:54,689 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 179 of 179 statements. [2025-02-05 20:13:54,689 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:54,689 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:13:54,883 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:13:54,883 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:13:54,883 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1289626287] [2025-02-05 20:13:54,883 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1289626287] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:13:54,883 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:13:54,883 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-02-05 20:13:54,883 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [121788580] [2025-02-05 20:13:54,883 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:13:54,884 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-02-05 20:13:54,884 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:13:54,884 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-05 20:13:54,884 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2025-02-05 20:13:54,884 INFO L87 Difference]: Start difference. First operand 4944 states and 7166 transitions. Second operand has 7 states, 7 states have (on average 25.571428571428573) internal successors, (179), 7 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:55,997 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:13:55,997 INFO L93 Difference]: Finished difference Result 6944 states and 10009 transitions. [2025-02-05 20:13:55,998 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-02-05 20:13:55,998 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 25.571428571428573) internal successors, (179), 7 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 179 [2025-02-05 20:13:55,998 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:13:56,002 INFO L225 Difference]: With dead ends: 6944 [2025-02-05 20:13:56,002 INFO L226 Difference]: Without dead ends: 5476 [2025-02-05 20:13:56,004 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2025-02-05 20:13:56,004 INFO L435 NwaCegarLoop]: 1592 mSDtfsCounter, 236 mSDsluCounter, 7107 mSDsCounter, 0 mSdLazyCounter, 2496 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 236 SdHoareTripleChecker+Valid, 8699 SdHoareTripleChecker+Invalid, 2498 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 2496 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.1s IncrementalHoareTripleChecker+Time [2025-02-05 20:13:56,005 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [236 Valid, 8699 Invalid, 2498 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 2496 Invalid, 0 Unknown, 0 Unchecked, 1.1s Time] [2025-02-05 20:13:56,006 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5476 states. [2025-02-05 20:13:56,033 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5476 to 5356. [2025-02-05 20:13:56,037 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5356 states, 5355 states have (on average 1.442577030812325) internal successors, (7725), 5355 states have internal predecessors, (7725), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:56,040 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5356 states to 5356 states and 7725 transitions. [2025-02-05 20:13:56,041 INFO L78 Accepts]: Start accepts. Automaton has 5356 states and 7725 transitions. Word has length 179 [2025-02-05 20:13:56,041 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:13:56,041 INFO L471 AbstractCegarLoop]: Abstraction has 5356 states and 7725 transitions. [2025-02-05 20:13:56,041 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 25.571428571428573) internal successors, (179), 7 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:56,041 INFO L276 IsEmpty]: Start isEmpty. Operand 5356 states and 7725 transitions. [2025-02-05 20:13:56,045 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2025-02-05 20:13:56,045 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:56,046 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:56,046 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable35 [2025-02-05 20:13:56,046 INFO L396 AbstractCegarLoop]: === Iteration 37 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:56,046 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:56,046 INFO L85 PathProgramCache]: Analyzing trace with hash 716979943, now seen corresponding path program 1 times [2025-02-05 20:13:56,046 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:56,046 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1316087993] [2025-02-05 20:13:56,047 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:56,047 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:56,079 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 179 statements into 1 equivalence classes. [2025-02-05 20:13:56,120 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 179 of 179 statements. [2025-02-05 20:13:56,120 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:56,120 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:13:56,488 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:13:56,489 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:13:56,489 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1316087993] [2025-02-05 20:13:56,489 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1316087993] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:13:56,489 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:13:56,489 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-02-05 20:13:56,489 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1275509706] [2025-02-05 20:13:56,489 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:13:56,489 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-02-05 20:13:56,489 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:13:56,490 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-05 20:13:56,490 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2025-02-05 20:13:56,490 INFO L87 Difference]: Start difference. First operand 5356 states and 7725 transitions. Second operand has 7 states, 7 states have (on average 25.571428571428573) internal successors, (179), 7 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:57,134 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:13:57,134 INFO L93 Difference]: Finished difference Result 11831 states and 16921 transitions. [2025-02-05 20:13:57,135 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-05 20:13:57,135 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 25.571428571428573) internal successors, (179), 7 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 179 [2025-02-05 20:13:57,135 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:13:57,148 INFO L225 Difference]: With dead ends: 11831 [2025-02-05 20:13:57,149 INFO L226 Difference]: Without dead ends: 9138 [2025-02-05 20:13:57,152 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2025-02-05 20:13:57,153 INFO L435 NwaCegarLoop]: 1336 mSDtfsCounter, 1889 mSDsluCounter, 5331 mSDsCounter, 0 mSdLazyCounter, 1498 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1889 SdHoareTripleChecker+Valid, 6667 SdHoareTripleChecker+Invalid, 1499 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1498 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-02-05 20:13:57,153 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1889 Valid, 6667 Invalid, 1499 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1498 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2025-02-05 20:13:57,157 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 9138 states. [2025-02-05 20:13:57,201 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 9138 to 6692. [2025-02-05 20:13:57,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6692 states, 6691 states have (on average 1.4513525631445225) internal successors, (9711), 6691 states have internal predecessors, (9711), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:57,211 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6692 states to 6692 states and 9711 transitions. [2025-02-05 20:13:57,211 INFO L78 Accepts]: Start accepts. Automaton has 6692 states and 9711 transitions. Word has length 179 [2025-02-05 20:13:57,211 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:13:57,212 INFO L471 AbstractCegarLoop]: Abstraction has 6692 states and 9711 transitions. [2025-02-05 20:13:57,212 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 25.571428571428573) internal successors, (179), 7 states have internal predecessors, (179), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:57,212 INFO L276 IsEmpty]: Start isEmpty. Operand 6692 states and 9711 transitions. [2025-02-05 20:13:57,217 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 181 [2025-02-05 20:13:57,217 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:57,217 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:57,217 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36 [2025-02-05 20:13:57,218 INFO L396 AbstractCegarLoop]: === Iteration 38 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:57,218 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:57,218 INFO L85 PathProgramCache]: Analyzing trace with hash 2001291168, now seen corresponding path program 1 times [2025-02-05 20:13:57,218 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:57,218 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [89552583] [2025-02-05 20:13:57,218 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:57,218 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:57,259 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 180 statements into 1 equivalence classes. [2025-02-05 20:13:57,372 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 180 of 180 statements. [2025-02-05 20:13:57,372 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:57,372 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:13:57,709 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:13:57,709 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:13:57,709 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [89552583] [2025-02-05 20:13:57,710 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [89552583] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:13:57,710 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:13:57,710 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-02-05 20:13:57,710 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [671031257] [2025-02-05 20:13:57,710 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:13:57,711 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-02-05 20:13:57,711 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:13:57,712 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-05 20:13:57,712 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2025-02-05 20:13:57,712 INFO L87 Difference]: Start difference. First operand 6692 states and 9711 transitions. Second operand has 7 states, 7 states have (on average 25.714285714285715) internal successors, (180), 7 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:58,433 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:13:58,433 INFO L93 Difference]: Finished difference Result 13690 states and 19777 transitions. [2025-02-05 20:13:58,434 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-05 20:13:58,434 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 25.714285714285715) internal successors, (180), 7 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 180 [2025-02-05 20:13:58,434 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:13:58,445 INFO L225 Difference]: With dead ends: 13690 [2025-02-05 20:13:58,445 INFO L226 Difference]: Without dead ends: 12058 [2025-02-05 20:13:58,449 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2025-02-05 20:13:58,450 INFO L435 NwaCegarLoop]: 1336 mSDtfsCounter, 1870 mSDsluCounter, 5331 mSDsCounter, 0 mSdLazyCounter, 1498 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1870 SdHoareTripleChecker+Valid, 6667 SdHoareTripleChecker+Invalid, 1499 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1498 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2025-02-05 20:13:58,450 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1870 Valid, 6667 Invalid, 1499 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1498 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2025-02-05 20:13:58,456 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12058 states. [2025-02-05 20:13:58,513 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12058 to 6764. [2025-02-05 20:13:58,517 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6764 states, 6763 states have (on average 1.451870471684164) internal successors, (9819), 6763 states have internal predecessors, (9819), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:58,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6764 states to 6764 states and 9819 transitions. [2025-02-05 20:13:58,523 INFO L78 Accepts]: Start accepts. Automaton has 6764 states and 9819 transitions. Word has length 180 [2025-02-05 20:13:58,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:13:58,523 INFO L471 AbstractCegarLoop]: Abstraction has 6764 states and 9819 transitions. [2025-02-05 20:13:58,523 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 25.714285714285715) internal successors, (180), 7 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:58,523 INFO L276 IsEmpty]: Start isEmpty. Operand 6764 states and 9819 transitions. [2025-02-05 20:13:58,529 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 181 [2025-02-05 20:13:58,530 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:58,530 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:58,530 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37 [2025-02-05 20:13:58,531 INFO L396 AbstractCegarLoop]: === Iteration 39 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:58,531 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:58,531 INFO L85 PathProgramCache]: Analyzing trace with hash -1914562841, now seen corresponding path program 1 times [2025-02-05 20:13:58,531 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:58,531 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2118725004] [2025-02-05 20:13:58,531 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:58,532 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:58,564 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 180 statements into 1 equivalence classes. [2025-02-05 20:13:58,683 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 180 of 180 statements. [2025-02-05 20:13:58,683 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:58,683 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:13:58,895 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:13:58,895 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:13:58,895 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2118725004] [2025-02-05 20:13:58,895 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2118725004] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:13:58,895 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:13:58,895 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-05 20:13:58,895 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1076431273] [2025-02-05 20:13:58,895 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:13:58,895 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-05 20:13:58,895 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:13:58,896 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-05 20:13:58,896 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-02-05 20:13:58,896 INFO L87 Difference]: Start difference. First operand 6764 states and 9819 transitions. Second operand has 5 states, 5 states have (on average 36.0) internal successors, (180), 5 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:59,387 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:13:59,387 INFO L93 Difference]: Finished difference Result 8288 states and 12006 transitions. [2025-02-05 20:13:59,388 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-05 20:13:59,388 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 36.0) internal successors, (180), 5 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 180 [2025-02-05 20:13:59,388 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:13:59,393 INFO L225 Difference]: With dead ends: 8288 [2025-02-05 20:13:59,393 INFO L226 Difference]: Without dead ends: 6816 [2025-02-05 20:13:59,395 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2025-02-05 20:13:59,396 INFO L435 NwaCegarLoop]: 1362 mSDtfsCounter, 193 mSDsluCounter, 4068 mSDsCounter, 0 mSdLazyCounter, 1128 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 193 SdHoareTripleChecker+Valid, 5430 SdHoareTripleChecker+Invalid, 1128 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1128 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-02-05 20:13:59,397 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [193 Valid, 5430 Invalid, 1128 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1128 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-02-05 20:13:59,399 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6816 states. [2025-02-05 20:13:59,435 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6816 to 6760. [2025-02-05 20:13:59,440 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6760 states, 6759 states have (on average 1.4515460866992158) internal successors, (9811), 6759 states have internal predecessors, (9811), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:59,445 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6760 states to 6760 states and 9811 transitions. [2025-02-05 20:13:59,446 INFO L78 Accepts]: Start accepts. Automaton has 6760 states and 9811 transitions. Word has length 180 [2025-02-05 20:13:59,446 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:13:59,446 INFO L471 AbstractCegarLoop]: Abstraction has 6760 states and 9811 transitions. [2025-02-05 20:13:59,446 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 36.0) internal successors, (180), 5 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:13:59,446 INFO L276 IsEmpty]: Start isEmpty. Operand 6760 states and 9811 transitions. [2025-02-05 20:13:59,453 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 181 [2025-02-05 20:13:59,453 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:13:59,453 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:13:59,453 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable38 [2025-02-05 20:13:59,453 INFO L396 AbstractCegarLoop]: === Iteration 40 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:13:59,453 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:13:59,454 INFO L85 PathProgramCache]: Analyzing trace with hash 1028129636, now seen corresponding path program 1 times [2025-02-05 20:13:59,454 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:13:59,454 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [836345572] [2025-02-05 20:13:59,454 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:13:59,454 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:13:59,487 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 180 statements into 1 equivalence classes. [2025-02-05 20:13:59,586 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 180 of 180 statements. [2025-02-05 20:13:59,587 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:13:59,587 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:14:00,208 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:14:00,208 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:14:00,208 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [836345572] [2025-02-05 20:14:00,208 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [836345572] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:14:00,208 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:14:00,208 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2025-02-05 20:14:00,209 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1663870727] [2025-02-05 20:14:00,209 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:14:00,209 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 19 states [2025-02-05 20:14:00,209 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:14:00,210 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2025-02-05 20:14:00,210 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=307, Unknown=0, NotChecked=0, Total=342 [2025-02-05 20:14:00,211 INFO L87 Difference]: Start difference. First operand 6760 states and 9811 transitions. Second operand has 19 states, 19 states have (on average 9.473684210526315) internal successors, (180), 19 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:14:02,267 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:14:02,268 INFO L93 Difference]: Finished difference Result 8434 states and 12209 transitions. [2025-02-05 20:14:02,268 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2025-02-05 20:14:02,268 INFO L78 Accepts]: Start accepts. Automaton has has 19 states, 19 states have (on average 9.473684210526315) internal successors, (180), 19 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 180 [2025-02-05 20:14:02,269 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:14:02,275 INFO L225 Difference]: With dead ends: 8434 [2025-02-05 20:14:02,275 INFO L226 Difference]: Without dead ends: 6966 [2025-02-05 20:14:02,277 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 21 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=43, Invalid=377, Unknown=0, NotChecked=0, Total=420 [2025-02-05 20:14:02,278 INFO L435 NwaCegarLoop]: 1337 mSDtfsCounter, 86 mSDsluCounter, 22688 mSDsCounter, 0 mSdLazyCounter, 5510 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 86 SdHoareTripleChecker+Valid, 24025 SdHoareTripleChecker+Invalid, 5510 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 5510 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.9s IncrementalHoareTripleChecker+Time [2025-02-05 20:14:02,278 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [86 Valid, 24025 Invalid, 5510 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 5510 Invalid, 0 Unknown, 0 Unchecked, 1.9s Time] [2025-02-05 20:14:02,282 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6966 states. [2025-02-05 20:14:02,321 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6966 to 6941. [2025-02-05 20:14:02,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6941 states, 6940 states have (on average 1.4504322766570605) internal successors, (10066), 6940 states have internal predecessors, (10066), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:14:02,332 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6941 states to 6941 states and 10066 transitions. [2025-02-05 20:14:02,332 INFO L78 Accepts]: Start accepts. Automaton has 6941 states and 10066 transitions. Word has length 180 [2025-02-05 20:14:02,332 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:14:02,333 INFO L471 AbstractCegarLoop]: Abstraction has 6941 states and 10066 transitions. [2025-02-05 20:14:02,333 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 19 states, 19 states have (on average 9.473684210526315) internal successors, (180), 19 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:14:02,333 INFO L276 IsEmpty]: Start isEmpty. Operand 6941 states and 10066 transitions. [2025-02-05 20:14:02,338 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 181 [2025-02-05 20:14:02,338 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:14:02,338 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:14:02,339 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable39 [2025-02-05 20:14:02,339 INFO L396 AbstractCegarLoop]: === Iteration 41 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:14:02,339 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:14:02,339 INFO L85 PathProgramCache]: Analyzing trace with hash -2031113184, now seen corresponding path program 1 times [2025-02-05 20:14:02,339 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:14:02,339 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [325698093] [2025-02-05 20:14:02,339 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:14:02,340 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:14:02,373 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 180 statements into 1 equivalence classes. [2025-02-05 20:14:02,485 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 180 of 180 statements. [2025-02-05 20:14:02,486 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:14:02,486 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:14:03,330 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:14:03,330 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:14:03,330 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [325698093] [2025-02-05 20:14:03,330 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [325698093] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:14:03,330 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:14:03,330 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-02-05 20:14:03,330 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1007592003] [2025-02-05 20:14:03,330 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:14:03,331 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2025-02-05 20:14:03,331 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:14:03,331 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-02-05 20:14:03,331 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2025-02-05 20:14:03,331 INFO L87 Difference]: Start difference. First operand 6941 states and 10066 transitions. Second operand has 8 states, 8 states have (on average 22.5) internal successors, (180), 8 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:14:04,115 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:14:04,115 INFO L93 Difference]: Finished difference Result 14707 states and 21278 transitions. [2025-02-05 20:14:04,115 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-02-05 20:14:04,115 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 22.5) internal successors, (180), 8 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 180 [2025-02-05 20:14:04,116 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:14:04,127 INFO L225 Difference]: With dead ends: 14707 [2025-02-05 20:14:04,127 INFO L226 Difference]: Without dead ends: 13098 [2025-02-05 20:14:04,132 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=80, Unknown=0, NotChecked=0, Total=110 [2025-02-05 20:14:04,132 INFO L435 NwaCegarLoop]: 1335 mSDtfsCounter, 2196 mSDsluCounter, 6661 mSDsCounter, 0 mSdLazyCounter, 1803 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2196 SdHoareTripleChecker+Valid, 7996 SdHoareTripleChecker+Invalid, 1803 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1803 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2025-02-05 20:14:04,133 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2196 Valid, 7996 Invalid, 1803 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1803 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2025-02-05 20:14:04,140 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13098 states. [2025-02-05 20:14:04,219 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13098 to 13094. [2025-02-05 20:14:04,229 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13094 states, 13093 states have (on average 1.4477965324982816) internal successors, (18956), 13093 states have internal predecessors, (18956), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:14:04,242 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13094 states to 13094 states and 18956 transitions. [2025-02-05 20:14:04,242 INFO L78 Accepts]: Start accepts. Automaton has 13094 states and 18956 transitions. Word has length 180 [2025-02-05 20:14:04,242 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:14:04,243 INFO L471 AbstractCegarLoop]: Abstraction has 13094 states and 18956 transitions. [2025-02-05 20:14:04,243 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 22.5) internal successors, (180), 8 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:14:04,243 INFO L276 IsEmpty]: Start isEmpty. Operand 13094 states and 18956 transitions. [2025-02-05 20:14:04,254 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 181 [2025-02-05 20:14:04,254 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:14:04,254 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:14:04,255 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable40 [2025-02-05 20:14:04,255 INFO L396 AbstractCegarLoop]: === Iteration 42 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:14:04,255 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:14:04,255 INFO L85 PathProgramCache]: Analyzing trace with hash -1476279387, now seen corresponding path program 1 times [2025-02-05 20:14:04,255 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:14:04,255 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2033894518] [2025-02-05 20:14:04,255 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:14:04,256 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:14:04,288 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 180 statements into 1 equivalence classes. [2025-02-05 20:14:04,392 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 180 of 180 statements. [2025-02-05 20:14:04,392 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:14:04,392 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:14:04,773 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:14:04,773 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:14:04,773 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2033894518] [2025-02-05 20:14:04,773 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2033894518] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:14:04,773 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:14:04,773 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-02-05 20:14:04,773 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [723722424] [2025-02-05 20:14:04,774 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:14:04,774 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-02-05 20:14:04,774 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:14:04,774 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-05 20:14:04,774 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2025-02-05 20:14:04,774 INFO L87 Difference]: Start difference. First operand 13094 states and 18956 transitions. Second operand has 7 states, 7 states have (on average 25.714285714285715) internal successors, (180), 7 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:14:05,454 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:14:05,454 INFO L93 Difference]: Finished difference Result 14707 states and 21278 transitions. [2025-02-05 20:14:05,455 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-02-05 20:14:05,455 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 25.714285714285715) internal successors, (180), 7 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 180 [2025-02-05 20:14:05,455 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:14:05,467 INFO L225 Difference]: With dead ends: 14707 [2025-02-05 20:14:05,467 INFO L226 Difference]: Without dead ends: 13098 [2025-02-05 20:14:05,472 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2025-02-05 20:14:05,473 INFO L435 NwaCegarLoop]: 1334 mSDtfsCounter, 1628 mSDsluCounter, 5112 mSDsCounter, 0 mSdLazyCounter, 1473 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1628 SdHoareTripleChecker+Valid, 6446 SdHoareTripleChecker+Invalid, 1474 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1473 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-02-05 20:14:05,473 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1628 Valid, 6446 Invalid, 1474 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1473 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2025-02-05 20:14:05,481 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13098 states. [2025-02-05 20:14:05,601 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13098 to 13094. [2025-02-05 20:14:05,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13094 states, 13093 states have (on average 1.4477965324982816) internal successors, (18956), 13093 states have internal predecessors, (18956), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:14:05,623 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13094 states to 13094 states and 18956 transitions. [2025-02-05 20:14:05,624 INFO L78 Accepts]: Start accepts. Automaton has 13094 states and 18956 transitions. Word has length 180 [2025-02-05 20:14:05,624 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:14:05,624 INFO L471 AbstractCegarLoop]: Abstraction has 13094 states and 18956 transitions. [2025-02-05 20:14:05,624 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 25.714285714285715) internal successors, (180), 7 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:14:05,624 INFO L276 IsEmpty]: Start isEmpty. Operand 13094 states and 18956 transitions. [2025-02-05 20:14:05,635 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 181 [2025-02-05 20:14:05,635 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:14:05,635 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:14:05,635 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable41 [2025-02-05 20:14:05,635 INFO L396 AbstractCegarLoop]: === Iteration 43 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:14:05,636 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:14:05,636 INFO L85 PathProgramCache]: Analyzing trace with hash 9400458, now seen corresponding path program 1 times [2025-02-05 20:14:05,636 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:14:05,636 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [212005624] [2025-02-05 20:14:05,636 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:14:05,636 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:14:05,667 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 180 statements into 1 equivalence classes. [2025-02-05 20:14:05,685 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 180 of 180 statements. [2025-02-05 20:14:05,685 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:14:05,685 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:14:05,860 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:14:05,860 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:14:05,861 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [212005624] [2025-02-05 20:14:05,861 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [212005624] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:14:05,861 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:14:05,861 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-05 20:14:05,862 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1561513155] [2025-02-05 20:14:05,862 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:14:05,862 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-02-05 20:14:05,862 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:14:05,863 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-05 20:14:05,863 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2025-02-05 20:14:05,863 INFO L87 Difference]: Start difference. First operand 13094 states and 18956 transitions. Second operand has 6 states, 6 states have (on average 30.0) internal successors, (180), 6 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:14:06,428 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:14:06,429 INFO L93 Difference]: Finished difference Result 14739 states and 21326 transitions. [2025-02-05 20:14:06,429 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-05 20:14:06,429 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 30.0) internal successors, (180), 6 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 180 [2025-02-05 20:14:06,429 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:14:06,441 INFO L225 Difference]: With dead ends: 14739 [2025-02-05 20:14:06,441 INFO L226 Difference]: Without dead ends: 13130 [2025-02-05 20:14:06,445 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2025-02-05 20:14:06,446 INFO L435 NwaCegarLoop]: 1359 mSDtfsCounter, 16 mSDsluCounter, 5421 mSDsCounter, 0 mSdLazyCounter, 1384 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 16 SdHoareTripleChecker+Valid, 6780 SdHoareTripleChecker+Invalid, 1385 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1384 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-02-05 20:14:06,447 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [16 Valid, 6780 Invalid, 1385 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1384 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-02-05 20:14:06,454 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13130 states. [2025-02-05 20:14:06,534 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13130 to 13130. [2025-02-05 20:14:06,545 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13130 states, 13129 states have (on average 1.447787341000838) internal successors, (19008), 13129 states have internal predecessors, (19008), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:14:06,560 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13130 states to 13130 states and 19008 transitions. [2025-02-05 20:14:06,560 INFO L78 Accepts]: Start accepts. Automaton has 13130 states and 19008 transitions. Word has length 180 [2025-02-05 20:14:06,560 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:14:06,560 INFO L471 AbstractCegarLoop]: Abstraction has 13130 states and 19008 transitions. [2025-02-05 20:14:06,560 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 30.0) internal successors, (180), 6 states have internal predecessors, (180), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:14:06,560 INFO L276 IsEmpty]: Start isEmpty. Operand 13130 states and 19008 transitions. [2025-02-05 20:14:06,573 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 182 [2025-02-05 20:14:06,573 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:14:06,573 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:14:06,574 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable42 [2025-02-05 20:14:06,574 INFO L396 AbstractCegarLoop]: === Iteration 44 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:14:06,574 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:14:06,574 INFO L85 PathProgramCache]: Analyzing trace with hash 760064816, now seen corresponding path program 1 times [2025-02-05 20:14:06,574 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:14:06,574 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2057430260] [2025-02-05 20:14:06,574 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:14:06,575 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:14:06,611 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 181 statements into 1 equivalence classes. [2025-02-05 20:14:06,722 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 181 of 181 statements. [2025-02-05 20:14:06,722 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:14:06,722 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:14:07,487 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:14:07,488 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:14:07,488 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2057430260] [2025-02-05 20:14:07,488 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2057430260] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:14:07,488 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:14:07,488 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2025-02-05 20:14:07,488 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1262928475] [2025-02-05 20:14:07,488 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:14:07,488 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 18 states [2025-02-05 20:14:07,489 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:14:07,489 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2025-02-05 20:14:07,489 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=269, Unknown=0, NotChecked=0, Total=306 [2025-02-05 20:14:07,490 INFO L87 Difference]: Start difference. First operand 13130 states and 19008 transitions. Second operand has 18 states, 18 states have (on average 10.055555555555555) internal successors, (181), 18 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:14:08,825 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:14:08,826 INFO L93 Difference]: Finished difference Result 14914 states and 21562 transitions. [2025-02-05 20:14:08,826 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2025-02-05 20:14:08,826 INFO L78 Accepts]: Start accepts. Automaton has has 18 states, 18 states have (on average 10.055555555555555) internal successors, (181), 18 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 181 [2025-02-05 20:14:08,826 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:14:08,838 INFO L225 Difference]: With dead ends: 14914 [2025-02-05 20:14:08,839 INFO L226 Difference]: Without dead ends: 13188 [2025-02-05 20:14:08,844 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=37, Invalid=269, Unknown=0, NotChecked=0, Total=306 [2025-02-05 20:14:08,844 INFO L435 NwaCegarLoop]: 1342 mSDtfsCounter, 80 mSDsluCounter, 16152 mSDsCounter, 0 mSdLazyCounter, 3929 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 80 SdHoareTripleChecker+Valid, 17494 SdHoareTripleChecker+Invalid, 3929 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 3929 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.3s IncrementalHoareTripleChecker+Time [2025-02-05 20:14:08,845 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [80 Valid, 17494 Invalid, 3929 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 3929 Invalid, 0 Unknown, 0 Unchecked, 1.3s Time] [2025-02-05 20:14:08,851 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13188 states. [2025-02-05 20:14:08,930 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13188 to 13146. [2025-02-05 20:14:08,938 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13146 states, 13145 states have (on average 1.4475465956637505) internal successors, (19028), 13145 states have internal predecessors, (19028), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:14:08,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13146 states to 13146 states and 19028 transitions. [2025-02-05 20:14:08,952 INFO L78 Accepts]: Start accepts. Automaton has 13146 states and 19028 transitions. Word has length 181 [2025-02-05 20:14:08,952 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:14:08,952 INFO L471 AbstractCegarLoop]: Abstraction has 13146 states and 19028 transitions. [2025-02-05 20:14:08,952 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 18 states, 18 states have (on average 10.055555555555555) internal successors, (181), 18 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:14:08,952 INFO L276 IsEmpty]: Start isEmpty. Operand 13146 states and 19028 transitions. [2025-02-05 20:14:08,963 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 182 [2025-02-05 20:14:08,963 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:14:08,964 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:14:08,964 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable43 [2025-02-05 20:14:08,964 INFO L396 AbstractCegarLoop]: === Iteration 45 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:14:08,964 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:14:08,964 INFO L85 PathProgramCache]: Analyzing trace with hash 1868670334, now seen corresponding path program 1 times [2025-02-05 20:14:08,964 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:14:08,964 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [241499069] [2025-02-05 20:14:08,964 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:14:08,965 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:14:09,008 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 181 statements into 1 equivalence classes. [2025-02-05 20:14:09,116 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 181 of 181 statements. [2025-02-05 20:14:09,117 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:14:09,117 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:14:09,297 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:14:09,297 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:14:09,297 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [241499069] [2025-02-05 20:14:09,297 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [241499069] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:14:09,297 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:14:09,298 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-05 20:14:09,298 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1123197478] [2025-02-05 20:14:09,298 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:14:09,298 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-02-05 20:14:09,298 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:14:09,298 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-05 20:14:09,298 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-02-05 20:14:09,299 INFO L87 Difference]: Start difference. First operand 13146 states and 19028 transitions. Second operand has 6 states, 6 states have (on average 30.166666666666668) internal successors, (181), 6 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:14:10,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:14:10,220 INFO L93 Difference]: Finished difference Result 15129 states and 21866 transitions. [2025-02-05 20:14:10,221 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-05 20:14:10,221 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 30.166666666666668) internal successors, (181), 6 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 181 [2025-02-05 20:14:10,221 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:14:10,233 INFO L225 Difference]: With dead ends: 15129 [2025-02-05 20:14:10,233 INFO L226 Difference]: Without dead ends: 13318 [2025-02-05 20:14:10,237 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-02-05 20:14:10,238 INFO L435 NwaCegarLoop]: 1115 mSDtfsCounter, 1799 mSDsluCounter, 3328 mSDsCounter, 0 mSdLazyCounter, 2114 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1799 SdHoareTripleChecker+Valid, 4443 SdHoareTripleChecker+Invalid, 2115 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 2114 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.9s IncrementalHoareTripleChecker+Time [2025-02-05 20:14:10,238 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1799 Valid, 4443 Invalid, 2115 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 2114 Invalid, 0 Unknown, 0 Unchecked, 0.9s Time] [2025-02-05 20:14:10,243 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13318 states. [2025-02-05 20:14:10,423 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13318 to 13318. [2025-02-05 20:14:10,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 13318 states, 13317 states have (on average 1.445370578959225) internal successors, (19248), 13317 states have internal predecessors, (19248), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:14:10,448 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 13318 states to 13318 states and 19248 transitions. [2025-02-05 20:14:10,449 INFO L78 Accepts]: Start accepts. Automaton has 13318 states and 19248 transitions. Word has length 181 [2025-02-05 20:14:10,449 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:14:10,449 INFO L471 AbstractCegarLoop]: Abstraction has 13318 states and 19248 transitions. [2025-02-05 20:14:10,449 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 30.166666666666668) internal successors, (181), 6 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:14:10,449 INFO L276 IsEmpty]: Start isEmpty. Operand 13318 states and 19248 transitions. [2025-02-05 20:14:10,460 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 182 [2025-02-05 20:14:10,460 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:14:10,461 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:14:10,461 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable44 [2025-02-05 20:14:10,461 INFO L396 AbstractCegarLoop]: === Iteration 46 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:14:10,461 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:14:10,461 INFO L85 PathProgramCache]: Analyzing trace with hash 749841100, now seen corresponding path program 1 times [2025-02-05 20:14:10,461 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:14:10,461 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1296706468] [2025-02-05 20:14:10,462 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:14:10,462 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:14:10,493 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 181 statements into 1 equivalence classes. [2025-02-05 20:14:10,546 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 181 of 181 statements. [2025-02-05 20:14:10,546 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:14:10,546 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:14:10,911 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:14:10,911 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:14:10,911 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1296706468] [2025-02-05 20:14:10,911 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1296706468] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:14:10,911 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:14:10,912 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-02-05 20:14:10,912 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1604237103] [2025-02-05 20:14:10,912 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:14:10,912 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-02-05 20:14:10,912 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:14:10,912 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-05 20:14:10,912 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2025-02-05 20:14:10,912 INFO L87 Difference]: Start difference. First operand 13318 states and 19248 transitions. Second operand has 7 states, 7 states have (on average 25.857142857142858) internal successors, (181), 7 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:14:11,565 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:14:11,565 INFO L93 Difference]: Finished difference Result 25716 states and 36972 transitions. [2025-02-05 20:14:11,565 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-05 20:14:11,565 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 25.857142857142858) internal successors, (181), 7 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 181 [2025-02-05 20:14:11,565 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:14:11,585 INFO L225 Difference]: With dead ends: 25716 [2025-02-05 20:14:11,586 INFO L226 Difference]: Without dead ends: 23540 [2025-02-05 20:14:11,594 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2025-02-05 20:14:11,596 INFO L435 NwaCegarLoop]: 1336 mSDtfsCounter, 2122 mSDsluCounter, 5329 mSDsCounter, 0 mSdLazyCounter, 1498 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 2122 SdHoareTripleChecker+Valid, 6665 SdHoareTripleChecker+Invalid, 1499 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1498 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-02-05 20:14:11,596 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [2122 Valid, 6665 Invalid, 1499 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1498 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2025-02-05 20:14:11,607 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23540 states. [2025-02-05 20:14:11,742 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23540 to 23022. [2025-02-05 20:14:11,760 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23022 states, 23021 states have (on average 1.441118978324139) internal successors, (33176), 23021 states have internal predecessors, (33176), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:14:11,784 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23022 states to 23022 states and 33176 transitions. [2025-02-05 20:14:11,785 INFO L78 Accepts]: Start accepts. Automaton has 23022 states and 33176 transitions. Word has length 181 [2025-02-05 20:14:11,785 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:14:11,785 INFO L471 AbstractCegarLoop]: Abstraction has 23022 states and 33176 transitions. [2025-02-05 20:14:11,785 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 25.857142857142858) internal successors, (181), 7 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:14:11,785 INFO L276 IsEmpty]: Start isEmpty. Operand 23022 states and 33176 transitions. [2025-02-05 20:14:11,802 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 182 [2025-02-05 20:14:11,803 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:14:11,803 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:14:11,803 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable45 [2025-02-05 20:14:11,803 INFO L396 AbstractCegarLoop]: === Iteration 47 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:14:11,803 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:14:11,803 INFO L85 PathProgramCache]: Analyzing trace with hash -1934595885, now seen corresponding path program 1 times [2025-02-05 20:14:11,804 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:14:11,804 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1941268871] [2025-02-05 20:14:11,804 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:14:11,804 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:14:11,851 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 181 statements into 1 equivalence classes. [2025-02-05 20:14:11,895 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 181 of 181 statements. [2025-02-05 20:14:11,895 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:14:11,895 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:14:12,435 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:14:12,435 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:14:12,436 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1941268871] [2025-02-05 20:14:12,436 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1941268871] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:14:12,436 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:14:12,436 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-05 20:14:12,436 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1218252628] [2025-02-05 20:14:12,436 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:14:12,436 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-02-05 20:14:12,436 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:14:12,437 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-05 20:14:12,437 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2025-02-05 20:14:12,437 INFO L87 Difference]: Start difference. First operand 23022 states and 33176 transitions. Second operand has 6 states, 6 states have (on average 30.166666666666668) internal successors, (181), 6 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:14:13,160 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:14:13,160 INFO L93 Difference]: Finished difference Result 49552 states and 70934 transitions. [2025-02-05 20:14:13,160 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-05 20:14:13,160 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 30.166666666666668) internal successors, (181), 6 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 181 [2025-02-05 20:14:13,160 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:14:13,202 INFO L225 Difference]: With dead ends: 49552 [2025-02-05 20:14:13,202 INFO L226 Difference]: Without dead ends: 43502 [2025-02-05 20:14:13,219 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2025-02-05 20:14:13,220 INFO L435 NwaCegarLoop]: 1336 mSDtfsCounter, 1872 mSDsluCounter, 4000 mSDsCounter, 0 mSdLazyCounter, 1196 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.5s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1872 SdHoareTripleChecker+Valid, 5336 SdHoareTripleChecker+Invalid, 1196 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1196 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-02-05 20:14:13,220 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1872 Valid, 5336 Invalid, 1196 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1196 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2025-02-05 20:14:13,245 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43502 states. [2025-02-05 20:14:13,484 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43502 to 31142. [2025-02-05 20:14:13,510 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31142 states, 31141 states have (on average 1.450692013743939) internal successors, (45176), 31141 states have internal predecessors, (45176), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:14:13,547 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31142 states to 31142 states and 45176 transitions. [2025-02-05 20:14:13,548 INFO L78 Accepts]: Start accepts. Automaton has 31142 states and 45176 transitions. Word has length 181 [2025-02-05 20:14:13,548 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:14:13,548 INFO L471 AbstractCegarLoop]: Abstraction has 31142 states and 45176 transitions. [2025-02-05 20:14:13,549 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 30.166666666666668) internal successors, (181), 6 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:14:13,549 INFO L276 IsEmpty]: Start isEmpty. Operand 31142 states and 45176 transitions. [2025-02-05 20:14:13,577 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 182 [2025-02-05 20:14:13,577 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:14:13,577 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:14:13,577 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable46 [2025-02-05 20:14:13,577 INFO L396 AbstractCegarLoop]: === Iteration 48 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:14:13,578 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:14:13,578 INFO L85 PathProgramCache]: Analyzing trace with hash 1967148709, now seen corresponding path program 1 times [2025-02-05 20:14:13,578 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:14:13,578 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1136306971] [2025-02-05 20:14:13,578 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:14:13,578 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:14:13,610 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 181 statements into 1 equivalence classes. [2025-02-05 20:14:13,687 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 181 of 181 statements. [2025-02-05 20:14:13,687 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:14:13,687 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:14:13,891 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:14:13,891 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:14:13,891 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1136306971] [2025-02-05 20:14:13,891 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1136306971] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:14:13,891 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:14:13,891 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-05 20:14:13,891 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1902046130] [2025-02-05 20:14:13,891 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:14:13,892 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-02-05 20:14:13,892 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:14:13,892 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-05 20:14:13,892 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 20:14:13,892 INFO L87 Difference]: Start difference. First operand 31142 states and 45176 transitions. Second operand has 6 states, 6 states have (on average 30.166666666666668) internal successors, (181), 6 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:14:15,061 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:14:15,062 INFO L93 Difference]: Finished difference Result 32948 states and 47777 transitions. [2025-02-05 20:14:15,062 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-05 20:14:15,062 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 30.166666666666668) internal successors, (181), 6 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 181 [2025-02-05 20:14:15,062 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:14:15,090 INFO L225 Difference]: With dead ends: 32948 [2025-02-05 20:14:15,090 INFO L226 Difference]: Without dead ends: 31166 [2025-02-05 20:14:15,096 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 20:14:15,096 INFO L435 NwaCegarLoop]: 1562 mSDtfsCounter, 215 mSDsluCounter, 5060 mSDsCounter, 0 mSdLazyCounter, 2613 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 215 SdHoareTripleChecker+Valid, 6622 SdHoareTripleChecker+Invalid, 2613 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2613 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2025-02-05 20:14:15,096 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [215 Valid, 6622 Invalid, 2613 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2613 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2025-02-05 20:14:15,110 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31166 states. [2025-02-05 20:14:15,302 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31166 to 31154. [2025-02-05 20:14:15,328 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31154 states, 31153 states have (on average 1.4505184091419767) internal successors, (45188), 31153 states have internal predecessors, (45188), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:14:15,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31154 states to 31154 states and 45188 transitions. [2025-02-05 20:14:15,365 INFO L78 Accepts]: Start accepts. Automaton has 31154 states and 45188 transitions. Word has length 181 [2025-02-05 20:14:15,365 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:14:15,365 INFO L471 AbstractCegarLoop]: Abstraction has 31154 states and 45188 transitions. [2025-02-05 20:14:15,365 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 30.166666666666668) internal successors, (181), 6 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:14:15,366 INFO L276 IsEmpty]: Start isEmpty. Operand 31154 states and 45188 transitions. [2025-02-05 20:14:15,393 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 182 [2025-02-05 20:14:15,393 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:14:15,393 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:14:15,393 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable47 [2025-02-05 20:14:15,393 INFO L396 AbstractCegarLoop]: === Iteration 49 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:14:15,394 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:14:15,394 INFO L85 PathProgramCache]: Analyzing trace with hash 1892312459, now seen corresponding path program 1 times [2025-02-05 20:14:15,394 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:14:15,394 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [339102409] [2025-02-05 20:14:15,394 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:14:15,394 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:14:15,425 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 181 statements into 1 equivalence classes. [2025-02-05 20:14:15,541 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 181 of 181 statements. [2025-02-05 20:14:15,542 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:14:15,542 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:14:15,836 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:14:15,836 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:14:15,836 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [339102409] [2025-02-05 20:14:15,836 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [339102409] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:14:15,836 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:14:15,836 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-05 20:14:15,836 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2072947677] [2025-02-05 20:14:15,836 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:14:15,836 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-02-05 20:14:15,837 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:14:15,837 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-05 20:14:15,837 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-02-05 20:14:15,837 INFO L87 Difference]: Start difference. First operand 31154 states and 45188 transitions. Second operand has 6 states, 6 states have (on average 30.166666666666668) internal successors, (181), 6 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:14:16,970 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:14:16,970 INFO L93 Difference]: Finished difference Result 35562 states and 51340 transitions. [2025-02-05 20:14:16,970 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-05 20:14:16,970 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 30.166666666666668) internal successors, (181), 6 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 181 [2025-02-05 20:14:16,971 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:14:17,002 INFO L225 Difference]: With dead ends: 35562 [2025-02-05 20:14:17,002 INFO L226 Difference]: Without dead ends: 33698 [2025-02-05 20:14:17,014 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2025-02-05 20:14:17,014 INFO L435 NwaCegarLoop]: 1162 mSDtfsCounter, 1579 mSDsluCounter, 3414 mSDsCounter, 0 mSdLazyCounter, 2154 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.9s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1579 SdHoareTripleChecker+Valid, 4576 SdHoareTripleChecker+Invalid, 2155 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 2154 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2025-02-05 20:14:17,014 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1579 Valid, 4576 Invalid, 2155 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 2154 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2025-02-05 20:14:17,029 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33698 states. [2025-02-05 20:14:17,306 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33698 to 31994. [2025-02-05 20:14:17,333 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31994 states, 31993 states have (on average 1.4479417372550245) internal successors, (46324), 31993 states have internal predecessors, (46324), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:14:17,370 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31994 states to 31994 states and 46324 transitions. [2025-02-05 20:14:17,371 INFO L78 Accepts]: Start accepts. Automaton has 31994 states and 46324 transitions. Word has length 181 [2025-02-05 20:14:17,371 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:14:17,371 INFO L471 AbstractCegarLoop]: Abstraction has 31994 states and 46324 transitions. [2025-02-05 20:14:17,371 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 30.166666666666668) internal successors, (181), 6 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:14:17,371 INFO L276 IsEmpty]: Start isEmpty. Operand 31994 states and 46324 transitions. [2025-02-05 20:14:17,398 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 182 [2025-02-05 20:14:17,398 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:14:17,398 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:14:17,399 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable48 [2025-02-05 20:14:17,399 INFO L396 AbstractCegarLoop]: === Iteration 50 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:14:17,399 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:14:17,399 INFO L85 PathProgramCache]: Analyzing trace with hash -865577103, now seen corresponding path program 1 times [2025-02-05 20:14:17,399 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:14:17,399 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [343259371] [2025-02-05 20:14:17,399 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:14:17,399 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:14:17,431 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 181 statements into 1 equivalence classes. [2025-02-05 20:14:17,564 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 181 of 181 statements. [2025-02-05 20:14:17,564 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:14:17,564 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:14:18,206 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:14:18,206 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:14:18,207 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [343259371] [2025-02-05 20:14:18,207 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [343259371] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:14:18,207 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:14:18,207 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-02-05 20:14:18,207 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [72378938] [2025-02-05 20:14:18,207 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:14:18,207 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-02-05 20:14:18,207 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:14:18,208 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-05 20:14:18,208 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2025-02-05 20:14:18,208 INFO L87 Difference]: Start difference. First operand 31994 states and 46324 transitions. Second operand has 7 states, 7 states have (on average 25.857142857142858) internal successors, (181), 7 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:14:20,187 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:14:20,187 INFO L93 Difference]: Finished difference Result 37730 states and 54290 transitions. [2025-02-05 20:14:20,188 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-05 20:14:20,188 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 25.857142857142858) internal successors, (181), 7 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 181 [2025-02-05 20:14:20,188 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:14:20,222 INFO L225 Difference]: With dead ends: 37730 [2025-02-05 20:14:20,222 INFO L226 Difference]: Without dead ends: 35538 [2025-02-05 20:14:20,235 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2025-02-05 20:14:20,236 INFO L435 NwaCegarLoop]: 1176 mSDtfsCounter, 1714 mSDsluCounter, 3440 mSDsCounter, 0 mSdLazyCounter, 2136 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 1.7s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1714 SdHoareTripleChecker+Valid, 4616 SdHoareTripleChecker+Invalid, 2137 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 2136 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.9s IncrementalHoareTripleChecker+Time [2025-02-05 20:14:20,236 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1714 Valid, 4616 Invalid, 2137 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 2136 Invalid, 0 Unknown, 0 Unchecked, 1.9s Time] [2025-02-05 20:14:20,257 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35538 states. [2025-02-05 20:14:20,591 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35538 to 33766. [2025-02-05 20:14:20,618 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33766 states, 33765 states have (on average 1.4436250555308752) internal successors, (48744), 33765 states have internal predecessors, (48744), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:14:20,654 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33766 states to 33766 states and 48744 transitions. [2025-02-05 20:14:20,656 INFO L78 Accepts]: Start accepts. Automaton has 33766 states and 48744 transitions. Word has length 181 [2025-02-05 20:14:20,657 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:14:20,657 INFO L471 AbstractCegarLoop]: Abstraction has 33766 states and 48744 transitions. [2025-02-05 20:14:20,657 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 25.857142857142858) internal successors, (181), 7 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:14:20,657 INFO L276 IsEmpty]: Start isEmpty. Operand 33766 states and 48744 transitions. [2025-02-05 20:14:20,684 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 182 [2025-02-05 20:14:20,684 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:14:20,684 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:14:20,685 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable49 [2025-02-05 20:14:20,685 INFO L396 AbstractCegarLoop]: === Iteration 51 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:14:20,685 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:14:20,685 INFO L85 PathProgramCache]: Analyzing trace with hash -1969037652, now seen corresponding path program 1 times [2025-02-05 20:14:20,685 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:14:20,685 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [680059159] [2025-02-05 20:14:20,685 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:14:20,685 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:14:20,720 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 181 statements into 1 equivalence classes. [2025-02-05 20:14:20,797 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 181 of 181 statements. [2025-02-05 20:14:20,797 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:14:20,797 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 20:14:21,127 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 20:14:21,127 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 20:14:21,127 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [680059159] [2025-02-05 20:14:21,127 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [680059159] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 20:14:21,127 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 20:14:21,127 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-02-05 20:14:21,127 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [801752106] [2025-02-05 20:14:21,128 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 20:14:21,128 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-02-05 20:14:21,128 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 20:14:21,128 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-05 20:14:21,128 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2025-02-05 20:14:21,128 INFO L87 Difference]: Start difference. First operand 33766 states and 48744 transitions. Second operand has 7 states, 7 states have (on average 25.857142857142858) internal successors, (181), 7 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:14:21,953 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 20:14:21,953 INFO L93 Difference]: Finished difference Result 71034 states and 102166 transitions. [2025-02-05 20:14:21,954 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-05 20:14:21,954 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 25.857142857142858) internal successors, (181), 7 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 181 [2025-02-05 20:14:21,954 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 20:14:22,010 INFO L225 Difference]: With dead ends: 71034 [2025-02-05 20:14:22,010 INFO L226 Difference]: Without dead ends: 63140 [2025-02-05 20:14:22,030 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2025-02-05 20:14:22,031 INFO L435 NwaCegarLoop]: 1336 mSDtfsCounter, 1883 mSDsluCounter, 5330 mSDsCounter, 0 mSdLazyCounter, 1498 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1883 SdHoareTripleChecker+Valid, 6666 SdHoareTripleChecker+Invalid, 1499 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 1498 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2025-02-05 20:14:22,031 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1883 Valid, 6666 Invalid, 1499 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 1498 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2025-02-05 20:14:22,062 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63140 states. [2025-02-05 20:14:22,610 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63140 to 41310. [2025-02-05 20:14:22,644 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41310 states, 41309 states have (on average 1.4530489723789004) internal successors, (60024), 41309 states have internal predecessors, (60024), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:14:22,698 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41310 states to 41310 states and 60024 transitions. [2025-02-05 20:14:22,699 INFO L78 Accepts]: Start accepts. Automaton has 41310 states and 60024 transitions. Word has length 181 [2025-02-05 20:14:22,699 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 20:14:22,699 INFO L471 AbstractCegarLoop]: Abstraction has 41310 states and 60024 transitions. [2025-02-05 20:14:22,699 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 25.857142857142858) internal successors, (181), 7 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 20:14:22,699 INFO L276 IsEmpty]: Start isEmpty. Operand 41310 states and 60024 transitions. [2025-02-05 20:14:22,743 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 183 [2025-02-05 20:14:22,743 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 20:14:22,743 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:14:22,743 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable50 [2025-02-05 20:14:22,744 INFO L396 AbstractCegarLoop]: === Iteration 52 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 20:14:22,744 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 20:14:22,744 INFO L85 PathProgramCache]: Analyzing trace with hash -556655653, now seen corresponding path program 1 times [2025-02-05 20:14:22,744 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 20:14:22,744 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [56481390] [2025-02-05 20:14:22,744 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 20:14:22,744 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 20:14:22,786 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 182 statements into 1 equivalence classes. [2025-02-05 20:14:23,002 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 182 of 182 statements. [2025-02-05 20:14:23,002 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:14:23,002 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-05 20:14:23,002 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-05 20:14:23,018 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 182 statements into 1 equivalence classes. [2025-02-05 20:14:23,213 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 182 of 182 statements. [2025-02-05 20:14:23,214 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 20:14:23,214 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-05 20:14:23,317 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-05 20:14:23,317 INFO L340 BasicCegarLoop]: Counterexample is feasible [2025-02-05 20:14:23,318 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2025-02-05 20:14:23,319 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable51 [2025-02-05 20:14:23,321 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 20:14:23,407 WARN L310 BoogieBacktranslator]: Removing null node from list of ATEs: ATE program state null [2025-02-05 20:14:23,434 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2025-02-05 20:14:23,436 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 05.02 08:14:23 BoogieIcfgContainer [2025-02-05 20:14:23,436 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2025-02-05 20:14:23,436 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-02-05 20:14:23,436 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-02-05 20:14:23,436 INFO L274 PluginConnector]: Witness Printer initialized [2025-02-05 20:14:23,437 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 05.02 08:13:13" (3/4) ... [2025-02-05 20:14:23,438 INFO L149 WitnessPrinter]: No result that supports witness generation found [2025-02-05 20:14:23,439 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-02-05 20:14:23,439 INFO L158 Benchmark]: Toolchain (without parser) took 75152.50ms. Allocated memory was 167.8MB in the beginning and 2.3GB in the end (delta: 2.1GB). Free memory was 121.2MB in the beginning and 1.5GB in the end (delta: -1.4GB). Peak memory consumption was 705.2MB. Max. memory is 16.1GB. [2025-02-05 20:14:23,439 INFO L158 Benchmark]: CDTParser took 0.14ms. Allocated memory is still 201.3MB. Free memory is still 117.1MB. There was no memory consumed. Max. memory is 16.1GB. [2025-02-05 20:14:23,440 INFO L158 Benchmark]: CACSL2BoogieTranslator took 574.52ms. Allocated memory is still 167.8MB. Free memory was 121.2MB in the beginning and 43.0MB in the end (delta: 78.3MB). Peak memory consumption was 83.9MB. Max. memory is 16.1GB. [2025-02-05 20:14:23,440 INFO L158 Benchmark]: Boogie Procedure Inliner took 362.13ms. Allocated memory was 167.8MB in the beginning and 176.2MB in the end (delta: 8.4MB). Free memory was 43.0MB in the beginning and 70.7MB in the end (delta: -27.7MB). Peak memory consumption was 44.7MB. Max. memory is 16.1GB. [2025-02-05 20:14:23,440 INFO L158 Benchmark]: Boogie Preprocessor took 497.30ms. Allocated memory was 176.2MB in the beginning and 394.3MB in the end (delta: 218.1MB). Free memory was 70.7MB in the beginning and 270.4MB in the end (delta: -199.8MB). Peak memory consumption was 61.5MB. Max. memory is 16.1GB. [2025-02-05 20:14:23,440 INFO L158 Benchmark]: IcfgBuilder took 3417.87ms. Allocated memory is still 394.3MB. Free memory was 270.4MB in the beginning and 223.0MB in the end (delta: 47.4MB). Peak memory consumption was 218.4MB. Max. memory is 16.1GB. [2025-02-05 20:14:23,440 INFO L158 Benchmark]: TraceAbstraction took 70293.05ms. Allocated memory was 394.3MB in the beginning and 2.3GB in the end (delta: 1.9GB). Free memory was 219.3MB in the beginning and 1.5GB in the end (delta: -1.3GB). Peak memory consumption was 577.9MB. Max. memory is 16.1GB. [2025-02-05 20:14:23,440 INFO L158 Benchmark]: Witness Printer took 2.79ms. Allocated memory is still 2.3GB. Free memory was 1.5GB in the beginning and 1.5GB in the end (delta: 148.5kB). There was no memory consumed. Max. memory is 16.1GB. [2025-02-05 20:14:23,441 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14ms. Allocated memory is still 201.3MB. Free memory is still 117.1MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 574.52ms. Allocated memory is still 167.8MB. Free memory was 121.2MB in the beginning and 43.0MB in the end (delta: 78.3MB). Peak memory consumption was 83.9MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 362.13ms. Allocated memory was 167.8MB in the beginning and 176.2MB in the end (delta: 8.4MB). Free memory was 43.0MB in the beginning and 70.7MB in the end (delta: -27.7MB). Peak memory consumption was 44.7MB. Max. memory is 16.1GB. * Boogie Preprocessor took 497.30ms. Allocated memory was 176.2MB in the beginning and 394.3MB in the end (delta: 218.1MB). Free memory was 70.7MB in the beginning and 270.4MB in the end (delta: -199.8MB). Peak memory consumption was 61.5MB. Max. memory is 16.1GB. * IcfgBuilder took 3417.87ms. Allocated memory is still 394.3MB. Free memory was 270.4MB in the beginning and 223.0MB in the end (delta: 47.4MB). Peak memory consumption was 218.4MB. Max. memory is 16.1GB. * TraceAbstraction took 70293.05ms. Allocated memory was 394.3MB in the beginning and 2.3GB in the end (delta: 1.9GB). Free memory was 219.3MB in the beginning and 1.5GB in the end (delta: -1.3GB). Peak memory consumption was 577.9MB. Max. memory is 16.1GB. * Witness Printer took 2.79ms. Allocated memory is still 2.3GB. Free memory was 1.5GB in the beginning and 1.5GB in the end (delta: 148.5kB). There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - UnprovableResult [Line: 21]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: overapproximation of bitwiseAnd at line 467, overapproximation of bitwiseAnd at line 369. Possible FailurePath: [L26] const SORT_1 mask_SORT_1 = (SORT_1)-1 >> (sizeof(SORT_1) * 8 - 1); [L27] const SORT_1 msb_SORT_1 = (SORT_1)1 << (1 - 1); [L29] const SORT_3 mask_SORT_3 = (SORT_3)-1 >> (sizeof(SORT_3) * 8 - 2); [L30] const SORT_3 msb_SORT_3 = (SORT_3)1 << (2 - 1); [L32] const SORT_26 mask_SORT_26 = (SORT_26)-1 >> (sizeof(SORT_26) * 8 - 4); [L33] const SORT_26 msb_SORT_26 = (SORT_26)1 << (4 - 1); [L35] const SORT_165 mask_SORT_165 = (SORT_165)-1 >> (sizeof(SORT_165) * 8 - 32); [L36] const SORT_165 msb_SORT_165 = (SORT_165)1 << (32 - 1); [L38] const SORT_196 mask_SORT_196 = (SORT_196)-1 >> (sizeof(SORT_196) * 8 - 3); [L39] const SORT_196 msb_SORT_196 = (SORT_196)1 << (3 - 1); [L41] const SORT_1 var_11 = 0; [L42] const SORT_3 var_14 = 2; [L43] const SORT_1 var_29 = 1; [L44] const SORT_165 var_167 = 1; [L45] const SORT_3 var_250 = 0; [L46] const SORT_3 var_251 = 3; [L47] const SORT_165 var_260 = 0; [L48] const SORT_165 var_471 = 2; [L50] SORT_1 input_2; [L51] SORT_3 input_4; [L52] SORT_3 input_5; [L53] SORT_1 input_6; [L54] SORT_3 input_7; [L55] SORT_1 input_8; [L56] SORT_1 input_9; [L57] SORT_1 input_186; [L58] SORT_3 input_249; [L59] SORT_3 input_265; [L60] SORT_3 input_266; [L61] SORT_3 input_267; [L62] SORT_3 input_268; [L63] SORT_3 input_295; [L64] SORT_3 input_296; [L65] SORT_3 input_297; [L66] SORT_3 input_306; [L67] SORT_3 input_360; [L68] SORT_3 input_372; [L69] SORT_3 input_373; [L70] SORT_3 input_374; [L71] SORT_3 input_375; [L72] SORT_3 input_384; [L73] SORT_3 input_405; [L74] SORT_3 input_406; [L75] SORT_3 input_407; [L76] SORT_3 input_416; [L77] SORT_3 input_418; [L78] SORT_3 input_464; [L79] SORT_3 input_478; [L80] SORT_3 input_479; [L81] SORT_3 input_480; [L82] SORT_3 input_481; [L83] SORT_3 input_490; [L84] SORT_3 input_492; [L85] SORT_3 input_514; [L86] SORT_3 input_515; [L87] SORT_3 input_516; [L88] SORT_3 input_525; [L89] SORT_3 input_527; [L90] SORT_3 input_529; [L91] SORT_3 input_575; [L92] SORT_3 input_586; [L93] SORT_3 input_587; [L94] SORT_3 input_588; [L95] SORT_3 input_596; [L96] SORT_3 input_598; [L97] SORT_3 input_600; [L98] SORT_3 input_620; [L99] SORT_3 input_621; [L100] SORT_3 input_629; [L101] SORT_3 input_631; [L102] SORT_3 input_633; [L103] SORT_3 input_635; [L105] EXPR __VERIFIER_nondet_uchar() & mask_SORT_1 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_26=15, mask_SORT_3=3, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L105] SORT_1 state_10 = __VERIFIER_nondet_uchar() & mask_SORT_1; [L106] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_26=15, mask_SORT_3=3, state_10=1, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L106] SORT_3 state_13 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L107] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_26=15, mask_SORT_3=3, state_10=1, state_13=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L107] SORT_3 state_16 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L108] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_26=15, mask_SORT_3=3, state_10=1, state_13=0, state_16=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L108] SORT_3 state_19 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L109] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_26=15, mask_SORT_3=3, state_10=1, state_13=0, state_16=0, state_19=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L109] SORT_3 state_22 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L110] EXPR __VERIFIER_nondet_uchar() & mask_SORT_26 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=1, state_13=0, state_16=0, state_19=0, state_22=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L110] SORT_26 state_27 = __VERIFIER_nondet_uchar() & mask_SORT_26; [L111] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=1, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L111] SORT_3 state_32 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L112] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=1, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L112] SORT_3 state_34 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L113] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=1, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L113] SORT_3 state_37 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L114] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=1, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L114] SORT_3 state_40 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L115] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=1, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L115] SORT_3 state_48 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L116] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=1, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L116] SORT_3 state_50 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L117] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=1, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L117] SORT_3 state_53 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L118] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=1, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L118] SORT_3 state_56 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L119] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=1, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L119] SORT_3 state_64 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L120] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=1, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L120] SORT_3 state_66 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L121] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=1, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L121] SORT_3 state_69 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L122] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=1, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L122] SORT_3 state_72 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L123] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=1, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L123] SORT_3 state_127 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L124] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=1, state_127=0, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L124] SORT_3 state_128 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L125] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=1, state_127=0, state_128=0, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L125] SORT_3 state_129 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L126] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=1, state_127=0, state_128=0, state_129=0, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L126] SORT_3 state_130 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L127] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=1, state_127=0, state_128=0, state_129=0, state_130=0, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L127] SORT_3 state_131 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L128] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=1, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L128] SORT_3 state_132 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L129] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=1, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L129] SORT_3 state_133 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L130] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=1, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L130] SORT_3 state_134 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L131] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=1, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L131] SORT_3 state_135 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L132] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=1, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L132] SORT_3 state_136 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L133] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=1, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L133] SORT_3 state_137 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L134] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=1, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L134] SORT_3 state_138 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L135] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=1, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L135] SORT_3 state_139 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L136] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=1, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L136] SORT_3 state_140 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L137] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=1, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L137] SORT_3 state_141 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L138] EXPR __VERIFIER_nondet_uchar() & mask_SORT_3 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=1, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L138] SORT_3 state_142 = __VERIFIER_nondet_uchar() & mask_SORT_3; [L142] input_2 = __VERIFIER_nondet_uchar() [L143] EXPR input_2 & mask_SORT_1 VAL [mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=1, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L143] input_2 = input_2 & mask_SORT_1 [L144] input_4 = __VERIFIER_nondet_uchar() [L145] input_5 = __VERIFIER_nondet_uchar() [L146] input_6 = __VERIFIER_nondet_uchar() [L147] input_7 = __VERIFIER_nondet_uchar() [L148] input_8 = __VERIFIER_nondet_uchar() [L149] input_9 = __VERIFIER_nondet_uchar() [L150] EXPR input_9 & mask_SORT_1 VAL [input_2=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_10=1, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L150] input_9 = input_9 & mask_SORT_1 [L151] input_186 = __VERIFIER_nondet_uchar() [L152] input_249 = __VERIFIER_nondet_uchar() [L153] input_265 = __VERIFIER_nondet_uchar() [L154] input_266 = __VERIFIER_nondet_uchar() [L155] input_267 = __VERIFIER_nondet_uchar() [L156] input_268 = __VERIFIER_nondet_uchar() [L157] input_295 = __VERIFIER_nondet_uchar() [L158] input_296 = __VERIFIER_nondet_uchar() [L159] input_297 = __VERIFIER_nondet_uchar() [L160] input_306 = __VERIFIER_nondet_uchar() [L161] input_360 = __VERIFIER_nondet_uchar() [L162] input_372 = __VERIFIER_nondet_uchar() [L163] input_373 = __VERIFIER_nondet_uchar() [L164] input_374 = __VERIFIER_nondet_uchar() [L165] input_375 = __VERIFIER_nondet_uchar() [L166] input_384 = __VERIFIER_nondet_uchar() [L167] input_405 = __VERIFIER_nondet_uchar() [L168] input_406 = __VERIFIER_nondet_uchar() [L169] input_407 = __VERIFIER_nondet_uchar() [L170] input_416 = __VERIFIER_nondet_uchar() [L171] input_418 = __VERIFIER_nondet_uchar() [L172] input_464 = __VERIFIER_nondet_uchar() [L173] input_478 = __VERIFIER_nondet_uchar() [L174] input_479 = __VERIFIER_nondet_uchar() [L175] input_480 = __VERIFIER_nondet_uchar() [L176] input_481 = __VERIFIER_nondet_uchar() [L177] input_490 = __VERIFIER_nondet_uchar() [L178] input_492 = __VERIFIER_nondet_uchar() [L179] input_514 = __VERIFIER_nondet_uchar() [L180] input_515 = __VERIFIER_nondet_uchar() [L181] input_516 = __VERIFIER_nondet_uchar() [L182] input_525 = __VERIFIER_nondet_uchar() [L183] input_527 = __VERIFIER_nondet_uchar() [L184] input_529 = __VERIFIER_nondet_uchar() [L185] input_575 = __VERIFIER_nondet_uchar() [L186] input_586 = __VERIFIER_nondet_uchar() [L187] input_587 = __VERIFIER_nondet_uchar() [L188] input_588 = __VERIFIER_nondet_uchar() [L189] input_596 = __VERIFIER_nondet_uchar() [L190] input_598 = __VERIFIER_nondet_uchar() [L191] input_600 = __VERIFIER_nondet_uchar() [L192] input_620 = __VERIFIER_nondet_uchar() [L193] input_621 = __VERIFIER_nondet_uchar() [L194] input_629 = __VERIFIER_nondet_uchar() [L195] input_631 = __VERIFIER_nondet_uchar() [L196] input_633 = __VERIFIER_nondet_uchar() [L197] input_635 = __VERIFIER_nondet_uchar() [L200] SORT_1 var_12_arg_0 = state_10; [L201] SORT_1 var_12_arg_1 = var_11; [L202] SORT_1 var_12 = var_12_arg_0 == var_12_arg_1; [L203] SORT_3 var_15_arg_0 = state_13; [L204] SORT_3 var_15_arg_1 = var_14; [L205] SORT_1 var_15 = var_15_arg_0 >= var_15_arg_1; [L206] SORT_3 var_17_arg_0 = state_16; [L207] SORT_3 var_17_arg_1 = var_14; [L208] SORT_1 var_17 = var_17_arg_0 >= var_17_arg_1; [L209] SORT_1 var_18_arg_0 = var_15; [L210] SORT_1 var_18_arg_1 = var_17; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_18_arg_0=0, var_18_arg_1=0, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L211] EXPR var_18_arg_0 & var_18_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L211] SORT_1 var_18 = var_18_arg_0 & var_18_arg_1; [L212] SORT_3 var_20_arg_0 = state_19; [L213] SORT_3 var_20_arg_1 = var_14; [L214] SORT_1 var_20 = var_20_arg_0 >= var_20_arg_1; [L215] SORT_1 var_21_arg_0 = var_18; [L216] SORT_1 var_21_arg_1 = var_20; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_21_arg_0=0, var_21_arg_1=0, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L217] EXPR var_21_arg_0 & var_21_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L217] SORT_1 var_21 = var_21_arg_0 & var_21_arg_1; [L218] SORT_3 var_23_arg_0 = state_22; [L219] SORT_3 var_23_arg_1 = var_14; [L220] SORT_1 var_23 = var_23_arg_0 >= var_23_arg_1; [L221] SORT_1 var_24_arg_0 = var_21; [L222] SORT_1 var_24_arg_1 = var_23; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_24_arg_0=0, var_24_arg_1=0, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L223] EXPR var_24_arg_0 & var_24_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_29=1, var_471=2] [L223] SORT_1 var_24 = var_24_arg_0 & var_24_arg_1; [L224] SORT_1 var_25_arg_0 = var_24; [L225] SORT_1 var_25 = ~var_25_arg_0; [L226] SORT_26 var_28_arg_0 = state_27; [L227] SORT_1 var_28 = var_28_arg_0 >> 3; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_25=-1, var_260=0, var_28=0, var_29=1, var_471=2] [L228] EXPR var_28 & mask_SORT_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_25=-1, var_260=0, var_29=1, var_471=2] [L228] var_28 = var_28 & mask_SORT_1 [L229] SORT_1 var_30_arg_0 = var_28; [L230] SORT_1 var_30_arg_1 = var_29; [L231] SORT_1 var_30 = var_30_arg_0 == var_30_arg_1; [L232] SORT_1 var_31_arg_0 = var_25; [L233] SORT_1 var_31_arg_1 = var_30; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_31_arg_0=-1, var_31_arg_1=0, var_471=2] [L234] EXPR var_31_arg_0 | var_31_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_471=2] [L234] SORT_1 var_31 = var_31_arg_0 | var_31_arg_1; [L235] SORT_3 var_33_arg_0 = state_32; [L236] SORT_3 var_33_arg_1 = var_14; [L237] SORT_1 var_33 = var_33_arg_0 >= var_33_arg_1; [L238] SORT_3 var_35_arg_0 = state_34; [L239] SORT_3 var_35_arg_1 = var_14; [L240] SORT_1 var_35 = var_35_arg_0 >= var_35_arg_1; [L241] SORT_1 var_36_arg_0 = var_33; [L242] SORT_1 var_36_arg_1 = var_35; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_31=255, var_36_arg_0=0, var_36_arg_1=0, var_471=2] [L243] EXPR var_36_arg_0 & var_36_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_31=255, var_471=2] [L243] SORT_1 var_36 = var_36_arg_0 & var_36_arg_1; [L244] SORT_3 var_38_arg_0 = state_37; [L245] SORT_3 var_38_arg_1 = var_14; [L246] SORT_1 var_38 = var_38_arg_0 >= var_38_arg_1; [L247] SORT_1 var_39_arg_0 = var_36; [L248] SORT_1 var_39_arg_1 = var_38; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_31=255, var_39_arg_0=0, var_39_arg_1=0, var_471=2] [L249] EXPR var_39_arg_0 & var_39_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_31=255, var_471=2] [L249] SORT_1 var_39 = var_39_arg_0 & var_39_arg_1; [L250] SORT_3 var_41_arg_0 = state_40; [L251] SORT_3 var_41_arg_1 = var_14; [L252] SORT_1 var_41 = var_41_arg_0 >= var_41_arg_1; [L253] SORT_1 var_42_arg_0 = var_39; [L254] SORT_1 var_42_arg_1 = var_41; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_31=255, var_42_arg_0=0, var_42_arg_1=0, var_471=2] [L255] EXPR var_42_arg_0 & var_42_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_31=255, var_471=2] [L255] SORT_1 var_42 = var_42_arg_0 & var_42_arg_1; [L256] SORT_1 var_43_arg_0 = var_42; [L257] SORT_1 var_43 = ~var_43_arg_0; [L258] SORT_26 var_44_arg_0 = state_27; [L259] SORT_1 var_44 = var_44_arg_0 >> 2; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_31=255, var_43=-1, var_44=0, var_471=2] [L260] EXPR var_44 & mask_SORT_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_31=255, var_43=-1, var_471=2] [L260] var_44 = var_44 & mask_SORT_1 [L261] SORT_1 var_45_arg_0 = var_44; [L262] SORT_1 var_45_arg_1 = var_29; [L263] SORT_1 var_45 = var_45_arg_0 >= var_45_arg_1; [L264] SORT_1 var_46_arg_0 = var_43; [L265] SORT_1 var_46_arg_1 = var_45; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_31=255, var_44=0, var_46_arg_0=-1, var_46_arg_1=0, var_471=2] [L266] EXPR var_46_arg_0 | var_46_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_31=255, var_44=0, var_471=2] [L266] SORT_1 var_46 = var_46_arg_0 | var_46_arg_1; [L267] SORT_1 var_47_arg_0 = var_31; [L268] SORT_1 var_47_arg_1 = var_46; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_47_arg_0=255, var_47_arg_1=255] [L269] EXPR var_47_arg_0 & var_47_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2] [L269] SORT_1 var_47 = var_47_arg_0 & var_47_arg_1; [L270] SORT_3 var_49_arg_0 = state_48; [L271] SORT_3 var_49_arg_1 = var_14; [L272] SORT_1 var_49 = var_49_arg_0 >= var_49_arg_1; [L273] SORT_3 var_51_arg_0 = state_50; [L274] SORT_3 var_51_arg_1 = var_14; [L275] SORT_1 var_51 = var_51_arg_0 >= var_51_arg_1; [L276] SORT_1 var_52_arg_0 = var_49; [L277] SORT_1 var_52_arg_1 = var_51; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_47=255, var_52_arg_0=0, var_52_arg_1=0] [L278] EXPR var_52_arg_0 & var_52_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_47=255] [L278] SORT_1 var_52 = var_52_arg_0 & var_52_arg_1; [L279] SORT_3 var_54_arg_0 = state_53; [L280] SORT_3 var_54_arg_1 = var_14; [L281] SORT_1 var_54 = var_54_arg_0 >= var_54_arg_1; [L282] SORT_1 var_55_arg_0 = var_52; [L283] SORT_1 var_55_arg_1 = var_54; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_47=255, var_55_arg_0=0, var_55_arg_1=0] [L284] EXPR var_55_arg_0 & var_55_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_47=255] [L284] SORT_1 var_55 = var_55_arg_0 & var_55_arg_1; [L285] SORT_3 var_57_arg_0 = state_56; [L286] SORT_3 var_57_arg_1 = var_14; [L287] SORT_1 var_57 = var_57_arg_0 >= var_57_arg_1; [L288] SORT_1 var_58_arg_0 = var_55; [L289] SORT_1 var_58_arg_1 = var_57; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_47=255, var_58_arg_0=0, var_58_arg_1=0] [L290] EXPR var_58_arg_0 & var_58_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_47=255] [L290] SORT_1 var_58 = var_58_arg_0 & var_58_arg_1; [L291] SORT_1 var_59_arg_0 = var_58; [L292] SORT_1 var_59 = ~var_59_arg_0; [L293] SORT_26 var_60_arg_0 = state_27; [L294] SORT_1 var_60 = var_60_arg_0 >> 1; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_47=255, var_59=-1, var_60=0] [L295] EXPR var_60 & mask_SORT_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_47=255, var_59=-1] [L295] var_60 = var_60 & mask_SORT_1 [L296] SORT_1 var_61_arg_0 = var_60; [L297] SORT_1 var_61_arg_1 = var_29; [L298] SORT_1 var_61 = var_61_arg_0 >= var_61_arg_1; [L299] SORT_1 var_62_arg_0 = var_59; [L300] SORT_1 var_62_arg_1 = var_61; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_47=255, var_60=0, var_62_arg_0=-1, var_62_arg_1=0] [L301] EXPR var_62_arg_0 | var_62_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_47=255, var_60=0] [L301] SORT_1 var_62 = var_62_arg_0 | var_62_arg_1; [L302] SORT_1 var_63_arg_0 = var_47; [L303] SORT_1 var_63_arg_1 = var_62; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_63_arg_0=255, var_63_arg_1=255] [L304] EXPR var_63_arg_0 & var_63_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0] [L304] SORT_1 var_63 = var_63_arg_0 & var_63_arg_1; [L305] SORT_3 var_65_arg_0 = state_64; [L306] SORT_3 var_65_arg_1 = var_14; [L307] SORT_1 var_65 = var_65_arg_0 >= var_65_arg_1; [L308] SORT_3 var_67_arg_0 = state_66; [L309] SORT_3 var_67_arg_1 = var_14; [L310] SORT_1 var_67 = var_67_arg_0 >= var_67_arg_1; [L311] SORT_1 var_68_arg_0 = var_65; [L312] SORT_1 var_68_arg_1 = var_67; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_63=255, var_68_arg_0=0, var_68_arg_1=0] [L313] EXPR var_68_arg_0 & var_68_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_63=255] [L313] SORT_1 var_68 = var_68_arg_0 & var_68_arg_1; [L314] SORT_3 var_70_arg_0 = state_69; [L315] SORT_3 var_70_arg_1 = var_14; [L316] SORT_1 var_70 = var_70_arg_0 >= var_70_arg_1; [L317] SORT_1 var_71_arg_0 = var_68; [L318] SORT_1 var_71_arg_1 = var_70; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_63=255, var_71_arg_0=0, var_71_arg_1=0] [L319] EXPR var_71_arg_0 & var_71_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_63=255] [L319] SORT_1 var_71 = var_71_arg_0 & var_71_arg_1; [L320] SORT_3 var_73_arg_0 = state_72; [L321] SORT_3 var_73_arg_1 = var_14; [L322] SORT_1 var_73 = var_73_arg_0 >= var_73_arg_1; [L323] SORT_1 var_74_arg_0 = var_71; [L324] SORT_1 var_74_arg_1 = var_73; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_63=255, var_74_arg_0=0, var_74_arg_1=0] [L325] EXPR var_74_arg_0 & var_74_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_27=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_63=255] [L325] SORT_1 var_74 = var_74_arg_0 & var_74_arg_1; [L326] SORT_1 var_75_arg_0 = var_74; [L327] SORT_1 var_75 = ~var_75_arg_0; [L328] SORT_26 var_76_arg_0 = state_27; [L329] SORT_1 var_76 = var_76_arg_0 >> 0; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_63=255, var_75=-1, var_76=0] [L330] EXPR var_76 & mask_SORT_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_63=255, var_75=-1] [L330] var_76 = var_76 & mask_SORT_1 [L331] SORT_1 var_77_arg_0 = var_76; [L332] SORT_1 var_77_arg_1 = var_29; [L333] SORT_1 var_77 = var_77_arg_0 >= var_77_arg_1; [L334] SORT_1 var_78_arg_0 = var_75; [L335] SORT_1 var_78_arg_1 = var_77; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_63=255, var_76=0, var_78_arg_0=-1, var_78_arg_1=0] [L336] EXPR var_78_arg_0 | var_78_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_63=255, var_76=0] [L336] SORT_1 var_78 = var_78_arg_0 | var_78_arg_1; [L337] SORT_1 var_79_arg_0 = var_63; [L338] SORT_1 var_79_arg_1 = var_78; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_79_arg_0=255, var_79_arg_1=255] [L339] EXPR var_79_arg_0 & var_79_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_13=0, state_140=0, state_141=0, state_142=0, state_16=0, state_19=0, state_22=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L339] SORT_1 var_79 = var_79_arg_0 & var_79_arg_1; [L340] SORT_3 var_80_arg_0 = state_13; [L341] SORT_3 var_80_arg_1 = var_14; [L342] SORT_1 var_80 = var_80_arg_0 >= var_80_arg_1; [L343] SORT_3 var_81_arg_0 = state_16; [L344] SORT_3 var_81_arg_1 = var_14; [L345] SORT_1 var_81 = var_81_arg_0 >= var_81_arg_1; [L346] SORT_1 var_82_arg_0 = var_80; [L347] SORT_1 var_82_arg_1 = var_81; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_19=0, state_22=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_79=255, var_82_arg_0=0, var_82_arg_1=0] [L348] EXPR var_82_arg_0 | var_82_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_19=0, state_22=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_79=255] [L348] SORT_1 var_82 = var_82_arg_0 | var_82_arg_1; [L349] SORT_3 var_83_arg_0 = state_19; [L350] SORT_3 var_83_arg_1 = var_14; [L351] SORT_1 var_83 = var_83_arg_0 >= var_83_arg_1; [L352] SORT_1 var_84_arg_0 = var_82; [L353] SORT_1 var_84_arg_1 = var_83; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_22=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_79=255, var_84_arg_0=0, var_84_arg_1=0] [L354] EXPR var_84_arg_0 | var_84_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_22=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_79=255] [L354] SORT_1 var_84 = var_84_arg_0 | var_84_arg_1; [L355] SORT_3 var_85_arg_0 = state_22; [L356] SORT_3 var_85_arg_1 = var_14; [L357] SORT_1 var_85 = var_85_arg_0 >= var_85_arg_1; [L358] SORT_1 var_86_arg_0 = var_84; [L359] SORT_1 var_86_arg_1 = var_85; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_79=255, var_86_arg_0=0, var_86_arg_1=0] [L360] EXPR var_86_arg_0 | var_86_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_79=255] [L360] SORT_1 var_86 = var_86_arg_0 | var_86_arg_1; [L361] SORT_1 var_87_arg_0 = var_28; [L362] SORT_1 var_87_arg_1 = var_11; [L363] SORT_1 var_87 = var_87_arg_0 == var_87_arg_1; [L364] SORT_1 var_88_arg_0 = var_86; [L365] SORT_1 var_88_arg_1 = var_87; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_79=255, var_88_arg_0=0, var_88_arg_1=1] [L366] EXPR var_88_arg_0 | var_88_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_79=255] [L366] SORT_1 var_88 = var_88_arg_0 | var_88_arg_1; [L367] SORT_1 var_89_arg_0 = var_79; [L368] SORT_1 var_89_arg_1 = var_88; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_89_arg_0=255, var_89_arg_1=1] [L369] EXPR var_89_arg_0 & var_89_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_32=0, state_34=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L369] SORT_1 var_89 = var_89_arg_0 & var_89_arg_1; [L370] SORT_3 var_90_arg_0 = state_32; [L371] SORT_3 var_90_arg_1 = var_14; [L372] SORT_1 var_90 = var_90_arg_0 >= var_90_arg_1; [L373] SORT_3 var_91_arg_0 = state_34; [L374] SORT_3 var_91_arg_1 = var_14; [L375] SORT_1 var_91 = var_91_arg_0 >= var_91_arg_1; [L376] SORT_1 var_92_arg_0 = var_90; [L377] SORT_1 var_92_arg_1 = var_91; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_89=0, var_92_arg_0=0, var_92_arg_1=0] [L378] EXPR var_92_arg_0 | var_92_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_37=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_89=0] [L378] SORT_1 var_92 = var_92_arg_0 | var_92_arg_1; [L379] SORT_3 var_93_arg_0 = state_37; [L380] SORT_3 var_93_arg_1 = var_14; [L381] SORT_1 var_93 = var_93_arg_0 >= var_93_arg_1; [L382] SORT_1 var_94_arg_0 = var_92; [L383] SORT_1 var_94_arg_1 = var_93; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_89=0, var_94_arg_0=0, var_94_arg_1=0] [L384] EXPR var_94_arg_0 | var_94_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_40=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_89=0] [L384] SORT_1 var_94 = var_94_arg_0 | var_94_arg_1; [L385] SORT_3 var_95_arg_0 = state_40; [L386] SORT_3 var_95_arg_1 = var_14; [L387] SORT_1 var_95 = var_95_arg_0 >= var_95_arg_1; [L388] SORT_1 var_96_arg_0 = var_94; [L389] SORT_1 var_96_arg_1 = var_95; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_89=0, var_96_arg_0=0, var_96_arg_1=0] [L390] EXPR var_96_arg_0 | var_96_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_89=0] [L390] SORT_1 var_96 = var_96_arg_0 | var_96_arg_1; [L391] SORT_1 var_97_arg_0 = var_44; [L392] SORT_1 var_97_arg_1 = var_11; [L393] SORT_1 var_97 = var_97_arg_0 == var_97_arg_1; [L394] SORT_1 var_98_arg_0 = var_96; [L395] SORT_1 var_98_arg_1 = var_97; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_89=0, var_98_arg_0=0, var_98_arg_1=1] [L396] EXPR var_98_arg_0 | var_98_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_89=0] [L396] SORT_1 var_98 = var_98_arg_0 | var_98_arg_1; [L397] SORT_1 var_99_arg_0 = var_89; [L398] SORT_1 var_99_arg_1 = var_98; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_99_arg_0=0, var_99_arg_1=1] [L399] EXPR var_99_arg_0 & var_99_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_48=0, state_50=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L399] SORT_1 var_99 = var_99_arg_0 & var_99_arg_1; [L400] SORT_3 var_100_arg_0 = state_48; [L401] SORT_3 var_100_arg_1 = var_14; [L402] SORT_1 var_100 = var_100_arg_0 >= var_100_arg_1; [L403] SORT_3 var_101_arg_0 = state_50; [L404] SORT_3 var_101_arg_1 = var_14; [L405] SORT_1 var_101 = var_101_arg_0 >= var_101_arg_1; [L406] SORT_1 var_102_arg_0 = var_100; [L407] SORT_1 var_102_arg_1 = var_101; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_102_arg_0=0, var_102_arg_1=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_99=0] [L408] EXPR var_102_arg_0 | var_102_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_53=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_99=0] [L408] SORT_1 var_102 = var_102_arg_0 | var_102_arg_1; [L409] SORT_3 var_103_arg_0 = state_53; [L410] SORT_3 var_103_arg_1 = var_14; [L411] SORT_1 var_103 = var_103_arg_0 >= var_103_arg_1; [L412] SORT_1 var_104_arg_0 = var_102; [L413] SORT_1 var_104_arg_1 = var_103; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_104_arg_0=0, var_104_arg_1=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_99=0] [L414] EXPR var_104_arg_0 | var_104_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_56=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_99=0] [L414] SORT_1 var_104 = var_104_arg_0 | var_104_arg_1; [L415] SORT_3 var_105_arg_0 = state_56; [L416] SORT_3 var_105_arg_1 = var_14; [L417] SORT_1 var_105 = var_105_arg_0 >= var_105_arg_1; [L418] SORT_1 var_106_arg_0 = var_104; [L419] SORT_1 var_106_arg_1 = var_105; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_64=0, state_66=0, state_69=0, state_72=0, var_106_arg_0=0, var_106_arg_1=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_99=0] [L420] EXPR var_106_arg_0 | var_106_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_99=0] [L420] SORT_1 var_106 = var_106_arg_0 | var_106_arg_1; [L421] SORT_1 var_107_arg_0 = var_60; [L422] SORT_1 var_107_arg_1 = var_11; [L423] SORT_1 var_107 = var_107_arg_0 == var_107_arg_1; [L424] SORT_1 var_108_arg_0 = var_106; [L425] SORT_1 var_108_arg_1 = var_107; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_64=0, state_66=0, state_69=0, state_72=0, var_108_arg_0=0, var_108_arg_1=1, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_99=0] [L426] EXPR var_108_arg_0 | var_108_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0, var_99=0] [L426] SORT_1 var_108 = var_108_arg_0 | var_108_arg_1; [L427] SORT_1 var_109_arg_0 = var_99; [L428] SORT_1 var_109_arg_1 = var_108; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_64=0, state_66=0, state_69=0, state_72=0, var_109_arg_0=0, var_109_arg_1=1, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L429] EXPR var_109_arg_0 & var_109_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_64=0, state_66=0, state_69=0, state_72=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L429] SORT_1 var_109 = var_109_arg_0 & var_109_arg_1; [L430] SORT_3 var_110_arg_0 = state_64; [L431] SORT_3 var_110_arg_1 = var_14; [L432] SORT_1 var_110 = var_110_arg_0 >= var_110_arg_1; [L433] SORT_3 var_111_arg_0 = state_66; [L434] SORT_3 var_111_arg_1 = var_14; [L435] SORT_1 var_111 = var_111_arg_0 >= var_111_arg_1; [L436] SORT_1 var_112_arg_0 = var_110; [L437] SORT_1 var_112_arg_1 = var_111; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_69=0, state_72=0, var_109=0, var_112_arg_0=0, var_112_arg_1=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L438] EXPR var_112_arg_0 | var_112_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_69=0, state_72=0, var_109=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L438] SORT_1 var_112 = var_112_arg_0 | var_112_arg_1; [L439] SORT_3 var_113_arg_0 = state_69; [L440] SORT_3 var_113_arg_1 = var_14; [L441] SORT_1 var_113 = var_113_arg_0 >= var_113_arg_1; [L442] SORT_1 var_114_arg_0 = var_112; [L443] SORT_1 var_114_arg_1 = var_113; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_72=0, var_109=0, var_114_arg_0=0, var_114_arg_1=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L444] EXPR var_114_arg_0 | var_114_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, state_72=0, var_109=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L444] SORT_1 var_114 = var_114_arg_0 | var_114_arg_1; [L445] SORT_3 var_115_arg_0 = state_72; [L446] SORT_3 var_115_arg_1 = var_14; [L447] SORT_1 var_115 = var_115_arg_0 >= var_115_arg_1; [L448] SORT_1 var_116_arg_0 = var_114; [L449] SORT_1 var_116_arg_1 = var_115; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, var_109=0, var_116_arg_0=0, var_116_arg_1=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L450] EXPR var_116_arg_0 | var_116_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, var_109=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L450] SORT_1 var_116 = var_116_arg_0 | var_116_arg_1; [L451] SORT_1 var_117_arg_0 = var_76; [L452] SORT_1 var_117_arg_1 = var_11; [L453] SORT_1 var_117 = var_117_arg_0 == var_117_arg_1; [L454] SORT_1 var_118_arg_0 = var_116; [L455] SORT_1 var_118_arg_1 = var_117; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, var_109=0, var_118_arg_0=0, var_118_arg_1=1, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L456] EXPR var_118_arg_0 | var_118_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, var_109=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L456] SORT_1 var_118 = var_118_arg_0 | var_118_arg_1; [L457] SORT_1 var_119_arg_0 = var_109; [L458] SORT_1 var_119_arg_1 = var_118; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, var_119_arg_0=0, var_119_arg_1=1, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L459] EXPR var_119_arg_0 & var_119_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, var_11=0, var_12=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L459] SORT_1 var_119 = var_119_arg_0 & var_119_arg_1; [L460] SORT_1 var_120_arg_0 = var_12; [L461] SORT_1 var_120_arg_1 = var_119; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, var_11=0, var_120_arg_0=0, var_120_arg_1=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L462] EXPR var_120_arg_0 | var_120_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L462] SORT_1 var_120 = var_120_arg_0 | var_120_arg_1; [L463] SORT_1 var_123_arg_0 = var_120; [L464] SORT_1 var_123 = ~var_123_arg_0; [L465] SORT_1 var_124_arg_0 = var_29; [L466] SORT_1 var_124_arg_1 = var_123; VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, var_11=0, var_124_arg_0=1, var_124_arg_1=-1, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L467] EXPR var_124_arg_0 & var_124_arg_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L467] SORT_1 var_124 = var_124_arg_0 & var_124_arg_1; [L468] EXPR var_124 & mask_SORT_1 VAL [input_2=0, input_9=0, mask_SORT_196=7, mask_SORT_1=1, mask_SORT_3=3, state_127=0, state_128=0, state_129=0, state_130=0, state_131=0, state_132=0, state_133=0, state_134=0, state_135=0, state_136=0, state_137=0, state_138=0, state_139=0, state_140=0, state_141=0, state_142=0, var_11=0, var_14=2, var_167=1, var_250=0, var_251=3, var_260=0, var_28=0, var_29=1, var_44=0, var_471=2, var_60=0, var_76=0] [L468] var_124 = var_124 & mask_SORT_1 [L469] SORT_1 bad_125_arg_0 = var_124; [L470] CALL __VERIFIER_assert(!(bad_125_arg_0)) [L21] COND TRUE !(cond) [L21] reach_error() - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 1094 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 70.1s, OverallIterations: 52, TraceHistogramMax: 1, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.3s, AutomataDifference: 39.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 45884 SdHoareTripleChecker+Valid, 35.7s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 45884 mSDsluCounter, 348417 SdHoareTripleChecker+Invalid, 30.0s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 279434 mSDsCounter, 85 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 84806 IncrementalHoareTripleChecker+Invalid, 84891 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 85 mSolverCounterUnsat, 68983 mSDtfsCounter, 84806 mSolverCounterSat, 0.5s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 421 GetRequests, 137 SyntacticMatches, 1 SemanticMatches, 283 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 101 ImplicationChecksByTransitivity, 1.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=41310occurred in iteration=51, InterpolantAutomatonStates: 343, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 3.9s AutomataMinimizationTime, 51 MinimizatonAttempts, 49360 StatesRemovedByMinimization, 37 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.6s SsaConstructionTime, 4.9s SatisfiabilityAnalysisTime, 19.1s InterpolantComputationTime, 9236 NumberOfCodeBlocks, 9236 NumberOfCodeBlocksAsserted, 52 NumberOfCheckSat, 9003 ConstructedInterpolants, 0 QuantifiedInterpolants, 26868 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 51 InterpolantComputations, 51 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces [2025-02-05 20:14:23,463 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Using bit-precise analysis Retrying with bit-precise analysis ### Bit-precise run ### Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_arrays_bpbs_p3.c -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Bitvector.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 404ac2bd3423bef5ce605181ef24be34b1a7af016e0b24dd5c9fcdb327055474 --- Real Ultimate output --- This is Ultimate 0.3.0-?-c00e63d-m [2025-02-05 20:14:25,545 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-02-05 20:14:25,649 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-64bit-Automizer_Bitvector.epf [2025-02-05 20:14:25,656 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-02-05 20:14:25,656 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-02-05 20:14:25,682 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-02-05 20:14:25,683 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-02-05 20:14:25,683 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-02-05 20:14:25,684 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-02-05 20:14:25,684 INFO L153 SettingsManager]: * Use memory slicer=true [2025-02-05 20:14:25,684 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2025-02-05 20:14:25,684 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2025-02-05 20:14:25,684 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-02-05 20:14:25,684 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-02-05 20:14:25,684 INFO L153 SettingsManager]: * Use SBE=true [2025-02-05 20:14:25,684 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-02-05 20:14:25,684 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2025-02-05 20:14:25,684 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-02-05 20:14:25,684 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2025-02-05 20:14:25,684 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2025-02-05 20:14:25,684 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2025-02-05 20:14:25,685 INFO L153 SettingsManager]: * Adapt memory model on pointer casts if necessary=true [2025-02-05 20:14:25,685 INFO L153 SettingsManager]: * Use bitvectors instead of ints=true [2025-02-05 20:14:25,685 INFO L153 SettingsManager]: * Memory model=HoenickeLindenmann_4ByteResolution [2025-02-05 20:14:25,685 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-02-05 20:14:25,685 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-02-05 20:14:25,685 INFO L153 SettingsManager]: * Use constant arrays=true [2025-02-05 20:14:25,685 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-02-05 20:14:25,685 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-02-05 20:14:25,685 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-02-05 20:14:25,685 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-02-05 20:14:25,685 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-02-05 20:14:25,685 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-02-05 20:14:25,685 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2025-02-05 20:14:25,685 INFO L153 SettingsManager]: * Compute procedure contracts=false [2025-02-05 20:14:25,685 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2025-02-05 20:14:25,686 INFO L153 SettingsManager]: * Trace refinement strategy=FOX [2025-02-05 20:14:25,686 INFO L153 SettingsManager]: * Command for external solver=cvc4 --incremental --print-success --lang smt [2025-02-05 20:14:25,686 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2025-02-05 20:14:25,686 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2025-02-05 20:14:25,686 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2025-02-05 20:14:25,686 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2025-02-05 20:14:25,686 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 404ac2bd3423bef5ce605181ef24be34b1a7af016e0b24dd5c9fcdb327055474 [2025-02-05 20:14:25,932 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-02-05 20:14:25,940 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-02-05 20:14:25,942 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-02-05 20:14:25,943 INFO L270 PluginConnector]: Initializing CDTParser... [2025-02-05 20:14:25,943 INFO L274 PluginConnector]: CDTParser initialized [2025-02-05 20:14:25,944 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/hardware-verification-bv/btor2c-lazyMod.vis_arrays_bpbs_p3.c