./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/nla-digbench-scaling/fermat2-ll_unwindbound100.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version c00e63dc Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/nla-digbench-scaling/fermat2-ll_unwindbound100.c -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 36da946a83103a61b88f0f1db9af94484aad5eefbde5313f974f53b267bd14bf --- Real Ultimate output --- This is Ultimate 0.3.0-?-c00e63d-m [2025-02-05 15:11:16,376 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-02-05 15:11:16,418 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2025-02-05 15:11:16,422 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-02-05 15:11:16,422 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-02-05 15:11:16,436 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-02-05 15:11:16,436 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-02-05 15:11:16,436 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-02-05 15:11:16,437 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-02-05 15:11:16,437 INFO L153 SettingsManager]: * Use memory slicer=true [2025-02-05 15:11:16,437 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2025-02-05 15:11:16,437 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2025-02-05 15:11:16,437 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-02-05 15:11:16,437 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-02-05 15:11:16,437 INFO L153 SettingsManager]: * Use SBE=true [2025-02-05 15:11:16,437 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-02-05 15:11:16,438 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2025-02-05 15:11:16,438 INFO L153 SettingsManager]: * sizeof long=4 [2025-02-05 15:11:16,438 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-02-05 15:11:16,438 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-02-05 15:11:16,438 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-02-05 15:11:16,438 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2025-02-05 15:11:16,438 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2025-02-05 15:11:16,438 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2025-02-05 15:11:16,438 INFO L153 SettingsManager]: * sizeof long double=12 [2025-02-05 15:11:16,438 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-02-05 15:11:16,438 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-02-05 15:11:16,438 INFO L153 SettingsManager]: * Use constant arrays=true [2025-02-05 15:11:16,438 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-02-05 15:11:16,438 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-02-05 15:11:16,438 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-02-05 15:11:16,438 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-02-05 15:11:16,438 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-02-05 15:11:16,438 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-02-05 15:11:16,438 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2025-02-05 15:11:16,438 INFO L153 SettingsManager]: * Compute procedure contracts=false [2025-02-05 15:11:16,439 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2025-02-05 15:11:16,439 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-02-05 15:11:16,439 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2025-02-05 15:11:16,439 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2025-02-05 15:11:16,439 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2025-02-05 15:11:16,439 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2025-02-05 15:11:16,439 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2025-02-05 15:11:16,439 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 36da946a83103a61b88f0f1db9af94484aad5eefbde5313f974f53b267bd14bf [2025-02-05 15:11:16,701 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-02-05 15:11:16,710 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-02-05 15:11:16,716 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-02-05 15:11:16,716 INFO L270 PluginConnector]: Initializing CDTParser... [2025-02-05 15:11:16,717 INFO L274 PluginConnector]: CDTParser initialized [2025-02-05 15:11:16,717 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/nla-digbench-scaling/fermat2-ll_unwindbound100.c [2025-02-05 15:11:17,927 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/6f583f9a6/9d533a3f671040d29773ad96b4228303/FLAG272a14add [2025-02-05 15:11:18,120 INFO L384 CDTParser]: Found 1 translation units. [2025-02-05 15:11:18,122 INFO L180 CDTParser]: Scanning /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/nla-digbench-scaling/fermat2-ll_unwindbound100.c [2025-02-05 15:11:18,134 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/6f583f9a6/9d533a3f671040d29773ad96b4228303/FLAG272a14add [2025-02-05 15:11:18,503 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/6f583f9a6/9d533a3f671040d29773ad96b4228303 [2025-02-05 15:11:18,505 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-02-05 15:11:18,507 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-02-05 15:11:18,508 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-02-05 15:11:18,508 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-02-05 15:11:18,511 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-02-05 15:11:18,512 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 05.02 03:11:18" (1/1) ... [2025-02-05 15:11:18,513 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5bf97972 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 03:11:18, skipping insertion in model container [2025-02-05 15:11:18,513 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 05.02 03:11:18" (1/1) ... [2025-02-05 15:11:18,528 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-02-05 15:11:18,631 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/nla-digbench-scaling/fermat2-ll_unwindbound100.c[524,537] [2025-02-05 15:11:18,645 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-05 15:11:18,652 INFO L200 MainTranslator]: Completed pre-run [2025-02-05 15:11:18,659 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/nla-digbench-scaling/fermat2-ll_unwindbound100.c[524,537] [2025-02-05 15:11:18,668 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-05 15:11:18,679 INFO L204 MainTranslator]: Completed translation [2025-02-05 15:11:18,680 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 03:11:18 WrapperNode [2025-02-05 15:11:18,681 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-02-05 15:11:18,682 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-02-05 15:11:18,682 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-02-05 15:11:18,682 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-02-05 15:11:18,686 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 03:11:18" (1/1) ... [2025-02-05 15:11:18,692 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 03:11:18" (1/1) ... [2025-02-05 15:11:18,703 INFO L138 Inliner]: procedures = 14, calls = 11, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 46 [2025-02-05 15:11:18,704 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-02-05 15:11:18,705 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-02-05 15:11:18,705 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-02-05 15:11:18,706 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-02-05 15:11:18,711 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 03:11:18" (1/1) ... [2025-02-05 15:11:18,712 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 03:11:18" (1/1) ... [2025-02-05 15:11:18,717 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 03:11:18" (1/1) ... [2025-02-05 15:11:18,725 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-02-05 15:11:18,726 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 03:11:18" (1/1) ... [2025-02-05 15:11:18,726 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 03:11:18" (1/1) ... [2025-02-05 15:11:18,727 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 03:11:18" (1/1) ... [2025-02-05 15:11:18,728 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 03:11:18" (1/1) ... [2025-02-05 15:11:18,728 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 03:11:18" (1/1) ... [2025-02-05 15:11:18,729 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 03:11:18" (1/1) ... [2025-02-05 15:11:18,730 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-02-05 15:11:18,730 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-02-05 15:11:18,731 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-02-05 15:11:18,731 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-02-05 15:11:18,731 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 03:11:18" (1/1) ... [2025-02-05 15:11:18,735 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-02-05 15:11:18,743 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-05 15:11:18,753 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2025-02-05 15:11:18,755 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2025-02-05 15:11:18,771 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-02-05 15:11:18,771 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2025-02-05 15:11:18,771 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2025-02-05 15:11:18,771 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-02-05 15:11:18,771 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-02-05 15:11:18,771 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-02-05 15:11:18,771 INFO L130 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2025-02-05 15:11:18,772 INFO L138 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2025-02-05 15:11:18,807 INFO L257 CfgBuilder]: Building ICFG [2025-02-05 15:11:18,809 INFO L287 CfgBuilder]: Building CFG for each procedure with an implementation [2025-02-05 15:11:18,895 INFO L? ?]: Removed 7 outVars from TransFormulas that were not future-live. [2025-02-05 15:11:18,896 INFO L308 CfgBuilder]: Performing block encoding [2025-02-05 15:11:18,901 INFO L332 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-02-05 15:11:18,902 INFO L337 CfgBuilder]: Removed 0 assume(true) statements. [2025-02-05 15:11:18,902 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 05.02 03:11:18 BoogieIcfgContainer [2025-02-05 15:11:18,902 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-02-05 15:11:18,903 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2025-02-05 15:11:18,904 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2025-02-05 15:11:18,907 INFO L274 PluginConnector]: TraceAbstraction initialized [2025-02-05 15:11:18,907 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 05.02 03:11:18" (1/3) ... [2025-02-05 15:11:18,908 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@40809f1f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 05.02 03:11:18, skipping insertion in model container [2025-02-05 15:11:18,908 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 03:11:18" (2/3) ... [2025-02-05 15:11:18,908 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@40809f1f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 05.02 03:11:18, skipping insertion in model container [2025-02-05 15:11:18,908 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 05.02 03:11:18" (3/3) ... [2025-02-05 15:11:18,909 INFO L128 eAbstractionObserver]: Analyzing ICFG fermat2-ll_unwindbound100.c [2025-02-05 15:11:18,919 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2025-02-05 15:11:18,920 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG fermat2-ll_unwindbound100.c that has 3 procedures, 25 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2025-02-05 15:11:18,951 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2025-02-05 15:11:18,958 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@63b34a0a, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-02-05 15:11:18,958 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2025-02-05 15:11:18,961 INFO L276 IsEmpty]: Start isEmpty. Operand has 25 states, 17 states have (on average 1.411764705882353) internal successors, (24), 18 states have internal predecessors, (24), 4 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) [2025-02-05 15:11:18,964 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2025-02-05 15:11:18,965 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 15:11:18,965 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 15:11:18,965 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 15:11:18,968 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 15:11:18,969 INFO L85 PathProgramCache]: Analyzing trace with hash -1157229416, now seen corresponding path program 1 times [2025-02-05 15:11:18,974 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 15:11:18,974 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [777665252] [2025-02-05 15:11:18,974 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 15:11:18,975 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 15:11:19,019 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 18 statements into 1 equivalence classes. [2025-02-05 15:11:19,029 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 18 of 18 statements. [2025-02-05 15:11:19,030 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 15:11:19,030 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 15:11:19,058 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2025-02-05 15:11:19,059 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 15:11:19,059 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [777665252] [2025-02-05 15:11:19,059 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [777665252] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-05 15:11:19,060 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2041860405] [2025-02-05 15:11:19,060 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 15:11:19,060 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 15:11:19,060 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-05 15:11:19,062 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-05 15:11:19,063 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2025-02-05 15:11:19,088 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 18 statements into 1 equivalence classes. [2025-02-05 15:11:19,100 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 18 of 18 statements. [2025-02-05 15:11:19,100 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 15:11:19,100 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 15:11:19,101 INFO L256 TraceCheckSpWp]: Trace formula consists of 61 conjuncts, 1 conjuncts are in the unsatisfiable core [2025-02-05 15:11:19,103 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-05 15:11:19,109 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2025-02-05 15:11:19,110 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-02-05 15:11:19,110 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2041860405] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 15:11:19,110 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-02-05 15:11:19,110 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [2] total 2 [2025-02-05 15:11:19,111 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [608666841] [2025-02-05 15:11:19,111 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 15:11:19,113 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2025-02-05 15:11:19,114 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 15:11:19,124 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2025-02-05 15:11:19,125 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2025-02-05 15:11:19,126 INFO L87 Difference]: Start difference. First operand has 25 states, 17 states have (on average 1.411764705882353) internal successors, (24), 18 states have internal predecessors, (24), 4 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (4), 4 states have call predecessors, (4), 4 states have call successors, (4) Second operand has 2 states, 2 states have (on average 6.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) [2025-02-05 15:11:19,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 15:11:19,135 INFO L93 Difference]: Finished difference Result 47 states and 64 transitions. [2025-02-05 15:11:19,136 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-02-05 15:11:19,136 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 6.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) Word has length 18 [2025-02-05 15:11:19,137 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 15:11:19,140 INFO L225 Difference]: With dead ends: 47 [2025-02-05 15:11:19,140 INFO L226 Difference]: Without dead ends: 21 [2025-02-05 15:11:19,142 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 19 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2025-02-05 15:11:19,143 INFO L435 NwaCegarLoop]: 29 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 29 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 15:11:19,144 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 29 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 15:11:19,152 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2025-02-05 15:11:19,159 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2025-02-05 15:11:19,160 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 14 states have (on average 1.2857142857142858) internal successors, (18), 15 states have internal predecessors, (18), 4 states have call successors, (4), 2 states have call predecessors, (4), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-02-05 15:11:19,162 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 25 transitions. [2025-02-05 15:11:19,163 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 25 transitions. Word has length 18 [2025-02-05 15:11:19,163 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 15:11:19,164 INFO L471 AbstractCegarLoop]: Abstraction has 21 states and 25 transitions. [2025-02-05 15:11:19,164 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 6.0) internal successors, (12), 2 states have internal predecessors, (12), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 2 states have call successors, (2) [2025-02-05 15:11:19,164 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 25 transitions. [2025-02-05 15:11:19,165 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2025-02-05 15:11:19,165 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 15:11:19,165 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 15:11:19,171 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Forceful destruction successful, exit code 0 [2025-02-05 15:11:19,365 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable0 [2025-02-05 15:11:19,366 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 15:11:19,367 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 15:11:19,368 INFO L85 PathProgramCache]: Analyzing trace with hash -250313654, now seen corresponding path program 1 times [2025-02-05 15:11:19,368 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 15:11:19,368 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1789375525] [2025-02-05 15:11:19,368 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 15:11:19,368 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 15:11:19,380 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 19 statements into 1 equivalence classes. [2025-02-05 15:11:19,430 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 19 of 19 statements. [2025-02-05 15:11:19,431 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 15:11:19,432 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unknown [2025-02-05 15:11:19,434 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [215740403] [2025-02-05 15:11:19,435 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 15:11:19,436 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 15:11:19,436 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-05 15:11:19,437 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-05 15:11:19,439 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2025-02-05 15:11:19,474 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 19 statements into 1 equivalence classes. [2025-02-05 15:11:19,499 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 19 of 19 statements. [2025-02-05 15:11:19,499 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 15:11:19,499 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 15:11:19,500 INFO L256 TraceCheckSpWp]: Trace formula consists of 65 conjuncts, 9 conjuncts are in the unsatisfiable core [2025-02-05 15:11:19,502 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-05 15:11:19,671 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-05 15:11:19,671 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-02-05 15:11:19,672 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 15:11:19,672 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1789375525] [2025-02-05 15:11:19,672 WARN L311 FreeRefinementEngine]: Interpolation failed due to KNOWN_IGNORE: SMT_SOLVER_CANNOT_INTERPOLATE_INPUT [2025-02-05 15:11:19,672 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [215740403] [2025-02-05 15:11:19,672 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [215740403] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 15:11:19,672 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 15:11:19,673 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-05 15:11:19,673 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1178076197] [2025-02-05 15:11:19,673 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 15:11:19,673 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-05 15:11:19,673 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 15:11:19,674 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-05 15:11:19,674 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-02-05 15:11:19,674 INFO L87 Difference]: Start difference. First operand 21 states and 25 transitions. Second operand has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2025-02-05 15:11:23,727 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 4.00s for a HTC check with result UNKNOWN. Formula has sorts [Bool, Int], hasArrays=false, hasNonlinArith=true, quantifiers [] [2025-02-05 15:11:23,741 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 15:11:23,741 INFO L93 Difference]: Finished difference Result 33 states and 40 transitions. [2025-02-05 15:11:23,741 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-05 15:11:23,742 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 19 [2025-02-05 15:11:23,742 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 15:11:23,743 INFO L225 Difference]: With dead ends: 33 [2025-02-05 15:11:23,743 INFO L226 Difference]: Without dead ends: 31 [2025-02-05 15:11:23,743 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 15 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2025-02-05 15:11:23,744 INFO L435 NwaCegarLoop]: 18 mSDtfsCounter, 5 mSDsluCounter, 51 mSDsCounter, 0 mSdLazyCounter, 30 mSolverCounterSat, 0 mSolverCounterUnsat, 1 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 4.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 69 SdHoareTripleChecker+Invalid, 31 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 30 IncrementalHoareTripleChecker+Invalid, 1 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 4.0s IncrementalHoareTripleChecker+Time [2025-02-05 15:11:23,744 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 69 Invalid, 31 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 30 Invalid, 1 Unknown, 0 Unchecked, 4.0s Time] [2025-02-05 15:11:23,744 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2025-02-05 15:11:23,750 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 28. [2025-02-05 15:11:23,750 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 19 states have (on average 1.263157894736842) internal successors, (24), 21 states have internal predecessors, (24), 5 states have call successors, (5), 3 states have call predecessors, (5), 3 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2025-02-05 15:11:23,751 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 33 transitions. [2025-02-05 15:11:23,751 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 33 transitions. Word has length 19 [2025-02-05 15:11:23,752 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 15:11:23,752 INFO L471 AbstractCegarLoop]: Abstraction has 28 states and 33 transitions. [2025-02-05 15:11:23,752 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 2.2) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2025-02-05 15:11:23,752 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 33 transitions. [2025-02-05 15:11:23,754 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2025-02-05 15:11:23,754 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 15:11:23,754 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 15:11:23,761 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Ended with exit code 0 [2025-02-05 15:11:23,958 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1,3 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 15:11:23,959 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 15:11:23,960 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 15:11:23,960 INFO L85 PathProgramCache]: Analyzing trace with hash -249449715, now seen corresponding path program 1 times [2025-02-05 15:11:23,960 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 15:11:23,960 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [346997013] [2025-02-05 15:11:23,960 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 15:11:23,960 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 15:11:23,967 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 19 statements into 1 equivalence classes. [2025-02-05 15:11:23,983 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 19 of 19 statements. [2025-02-05 15:11:23,983 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 15:11:23,983 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 15:11:24,049 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-05 15:11:24,049 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 15:11:24,049 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [346997013] [2025-02-05 15:11:24,050 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [346997013] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 15:11:24,050 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 15:11:24,050 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-05 15:11:24,050 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [870224508] [2025-02-05 15:11:24,050 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 15:11:24,050 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-05 15:11:24,050 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 15:11:24,051 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-05 15:11:24,051 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-05 15:11:24,051 INFO L87 Difference]: Start difference. First operand 28 states and 33 transitions. Second operand has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2025-02-05 15:11:24,063 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 15:11:24,064 INFO L93 Difference]: Finished difference Result 35 states and 39 transitions. [2025-02-05 15:11:24,064 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-05 15:11:24,064 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) Word has length 19 [2025-02-05 15:11:24,064 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 15:11:24,065 INFO L225 Difference]: With dead ends: 35 [2025-02-05 15:11:24,065 INFO L226 Difference]: Without dead ends: 28 [2025-02-05 15:11:24,066 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-05 15:11:24,066 INFO L435 NwaCegarLoop]: 23 mSDtfsCounter, 5 mSDsluCounter, 34 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 57 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 15:11:24,066 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [5 Valid, 57 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 15:11:24,067 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2025-02-05 15:11:24,070 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2025-02-05 15:11:24,070 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 28 states, 19 states have (on average 1.2105263157894737) internal successors, (23), 21 states have internal predecessors, (23), 5 states have call successors, (5), 3 states have call predecessors, (5), 3 states have return successors, (4), 3 states have call predecessors, (4), 4 states have call successors, (4) [2025-02-05 15:11:24,071 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 32 transitions. [2025-02-05 15:11:24,071 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 32 transitions. Word has length 19 [2025-02-05 15:11:24,071 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 15:11:24,071 INFO L471 AbstractCegarLoop]: Abstraction has 28 states and 32 transitions. [2025-02-05 15:11:24,071 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 2.75) internal successors, (11), 4 states have internal predecessors, (11), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (2), 1 states have call predecessors, (2), 1 states have call successors, (2) [2025-02-05 15:11:24,072 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 32 transitions. [2025-02-05 15:11:24,072 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2025-02-05 15:11:24,072 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 15:11:24,072 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 15:11:24,072 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2025-02-05 15:11:24,072 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 15:11:24,073 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 15:11:24,073 INFO L85 PathProgramCache]: Analyzing trace with hash 1168504528, now seen corresponding path program 1 times [2025-02-05 15:11:24,073 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 15:11:24,073 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [907666523] [2025-02-05 15:11:24,073 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 15:11:24,073 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 15:11:24,077 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 25 statements into 1 equivalence classes. [2025-02-05 15:11:24,089 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 25 of 25 statements. [2025-02-05 15:11:24,089 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 15:11:24,089 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 15:11:24,307 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-05 15:11:24,307 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 15:11:24,308 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [907666523] [2025-02-05 15:11:24,308 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [907666523] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-05 15:11:24,308 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [851631741] [2025-02-05 15:11:24,308 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 15:11:24,308 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 15:11:24,308 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-05 15:11:24,310 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-05 15:11:24,314 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2025-02-05 15:11:24,334 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 25 statements into 1 equivalence classes. [2025-02-05 15:11:24,344 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 25 of 25 statements. [2025-02-05 15:11:24,344 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 15:11:24,344 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 15:11:24,345 INFO L256 TraceCheckSpWp]: Trace formula consists of 76 conjuncts, 10 conjuncts are in the unsatisfiable core [2025-02-05 15:11:24,346 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-05 15:11:24,398 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-05 15:11:24,398 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-05 15:11:24,502 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-05 15:11:24,503 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [851631741] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-05 15:11:24,503 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-05 15:11:24,503 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 8, 8] total 12 [2025-02-05 15:11:24,503 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1049734979] [2025-02-05 15:11:24,503 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-05 15:11:24,503 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 12 states [2025-02-05 15:11:24,504 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 15:11:24,504 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2025-02-05 15:11:24,504 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=31, Invalid=101, Unknown=0, NotChecked=0, Total=132 [2025-02-05 15:11:24,504 INFO L87 Difference]: Start difference. First operand 28 states and 32 transitions. Second operand has 12 states, 11 states have (on average 1.9090909090909092) internal successors, (21), 8 states have internal predecessors, (21), 2 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (5), 4 states have call predecessors, (5), 1 states have call successors, (5) [2025-02-05 15:11:24,580 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 15:11:24,581 INFO L93 Difference]: Finished difference Result 35 states and 38 transitions. [2025-02-05 15:11:24,581 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-02-05 15:11:24,581 INFO L78 Accepts]: Start accepts. Automaton has has 12 states, 11 states have (on average 1.9090909090909092) internal successors, (21), 8 states have internal predecessors, (21), 2 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (5), 4 states have call predecessors, (5), 1 states have call successors, (5) Word has length 25 [2025-02-05 15:11:24,581 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 15:11:24,581 INFO L225 Difference]: With dead ends: 35 [2025-02-05 15:11:24,582 INFO L226 Difference]: Without dead ends: 30 [2025-02-05 15:11:24,582 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 58 GetRequests, 45 SyntacticMatches, 2 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=117, Unknown=0, NotChecked=0, Total=156 [2025-02-05 15:11:24,582 INFO L435 NwaCegarLoop]: 18 mSDtfsCounter, 12 mSDsluCounter, 78 mSDsCounter, 0 mSdLazyCounter, 52 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 12 SdHoareTripleChecker+Valid, 96 SdHoareTripleChecker+Invalid, 60 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 52 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-02-05 15:11:24,583 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [12 Valid, 96 Invalid, 60 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 52 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-02-05 15:11:24,583 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2025-02-05 15:11:24,587 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 25. [2025-02-05 15:11:24,587 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25 states, 18 states have (on average 1.1111111111111112) internal successors, (20), 18 states have internal predecessors, (20), 4 states have call successors, (4), 3 states have call predecessors, (4), 2 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-02-05 15:11:24,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 27 transitions. [2025-02-05 15:11:24,588 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 27 transitions. Word has length 25 [2025-02-05 15:11:24,588 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 15:11:24,588 INFO L471 AbstractCegarLoop]: Abstraction has 25 states and 27 transitions. [2025-02-05 15:11:24,588 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 12 states, 11 states have (on average 1.9090909090909092) internal successors, (21), 8 states have internal predecessors, (21), 2 states have call successors, (5), 3 states have call predecessors, (5), 2 states have return successors, (5), 4 states have call predecessors, (5), 1 states have call successors, (5) [2025-02-05 15:11:24,588 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 27 transitions. [2025-02-05 15:11:24,588 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2025-02-05 15:11:24,588 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 15:11:24,588 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 15:11:24,595 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Ended with exit code 0 [2025-02-05 15:11:24,789 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3,4 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 15:11:24,789 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 15:11:24,789 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 15:11:24,790 INFO L85 PathProgramCache]: Analyzing trace with hash 766770828, now seen corresponding path program 1 times [2025-02-05 15:11:24,791 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 15:11:24,791 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [842207570] [2025-02-05 15:11:24,791 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 15:11:24,791 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 15:11:24,798 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-02-05 15:11:24,804 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-02-05 15:11:24,804 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 15:11:24,804 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 15:11:24,930 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-05 15:11:24,931 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 15:11:24,931 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [842207570] [2025-02-05 15:11:24,931 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [842207570] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-05 15:11:24,931 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1238920022] [2025-02-05 15:11:24,931 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 15:11:24,931 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 15:11:24,931 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-05 15:11:24,935 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-05 15:11:24,937 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2025-02-05 15:11:24,959 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-02-05 15:11:24,971 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-02-05 15:11:24,971 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 15:11:24,972 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 15:11:24,972 INFO L256 TraceCheckSpWp]: Trace formula consists of 85 conjuncts, 5 conjuncts are in the unsatisfiable core [2025-02-05 15:11:24,973 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-05 15:11:25,013 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-05 15:11:25,013 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-05 15:11:25,051 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-05 15:11:25,051 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1238920022] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-05 15:11:25,051 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-05 15:11:25,051 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 4, 5] total 10 [2025-02-05 15:11:25,051 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [249279004] [2025-02-05 15:11:25,051 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-05 15:11:25,052 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 10 states [2025-02-05 15:11:25,052 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 15:11:25,052 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-02-05 15:11:25,052 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2025-02-05 15:11:25,052 INFO L87 Difference]: Start difference. First operand 25 states and 27 transitions. Second operand has 10 states, 10 states have (on average 3.8) internal successors, (38), 10 states have internal predecessors, (38), 6 states have call successors, (10), 4 states have call predecessors, (10), 3 states have return successors, (9), 5 states have call predecessors, (9), 5 states have call successors, (9) [2025-02-05 15:11:25,097 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 15:11:25,097 INFO L93 Difference]: Finished difference Result 57 states and 64 transitions. [2025-02-05 15:11:25,098 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-02-05 15:11:25,098 INFO L78 Accepts]: Start accepts. Automaton has has 10 states, 10 states have (on average 3.8) internal successors, (38), 10 states have internal predecessors, (38), 6 states have call successors, (10), 4 states have call predecessors, (10), 3 states have return successors, (9), 5 states have call predecessors, (9), 5 states have call successors, (9) Word has length 28 [2025-02-05 15:11:25,098 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 15:11:25,098 INFO L225 Difference]: With dead ends: 57 [2025-02-05 15:11:25,098 INFO L226 Difference]: Without dead ends: 52 [2025-02-05 15:11:25,099 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 62 GetRequests, 52 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2025-02-05 15:11:25,099 INFO L435 NwaCegarLoop]: 22 mSDtfsCounter, 24 mSDsluCounter, 60 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 24 SdHoareTripleChecker+Valid, 82 SdHoareTripleChecker+Invalid, 28 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 15:11:25,099 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [24 Valid, 82 Invalid, 28 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 26 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 15:11:25,100 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2025-02-05 15:11:25,106 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2025-02-05 15:11:25,107 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 52 states, 39 states have (on average 1.1282051282051282) internal successors, (44), 39 states have internal predecessors, (44), 7 states have call successors, (7), 6 states have call predecessors, (7), 5 states have return successors, (6), 6 states have call predecessors, (6), 6 states have call successors, (6) [2025-02-05 15:11:25,107 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 57 transitions. [2025-02-05 15:11:25,107 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 57 transitions. Word has length 28 [2025-02-05 15:11:25,107 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 15:11:25,107 INFO L471 AbstractCegarLoop]: Abstraction has 52 states and 57 transitions. [2025-02-05 15:11:25,107 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 10 states, 10 states have (on average 3.8) internal successors, (38), 10 states have internal predecessors, (38), 6 states have call successors, (10), 4 states have call predecessors, (10), 3 states have return successors, (9), 5 states have call predecessors, (9), 5 states have call successors, (9) [2025-02-05 15:11:25,108 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 57 transitions. [2025-02-05 15:11:25,108 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2025-02-05 15:11:25,108 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 15:11:25,108 INFO L218 NwaCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 4, 4, 4, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 15:11:25,114 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2025-02-05 15:11:25,309 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4,5 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 15:11:25,309 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 15:11:25,310 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 15:11:25,310 INFO L85 PathProgramCache]: Analyzing trace with hash -986007347, now seen corresponding path program 2 times [2025-02-05 15:11:25,310 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 15:11:25,310 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1334694746] [2025-02-05 15:11:25,310 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-05 15:11:25,310 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 15:11:25,316 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 55 statements into 2 equivalence classes. [2025-02-05 15:11:25,323 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 55 of 55 statements. [2025-02-05 15:11:25,323 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-02-05 15:11:25,324 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 15:11:25,520 INFO L134 CoverageAnalysis]: Checked inductivity of 74 backedges. 8 proven. 38 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2025-02-05 15:11:25,520 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 15:11:25,520 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1334694746] [2025-02-05 15:11:25,521 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1334694746] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-05 15:11:25,521 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [134976469] [2025-02-05 15:11:25,521 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-05 15:11:25,521 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 15:11:25,521 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-05 15:11:25,523 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-05 15:11:25,525 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2025-02-05 15:11:25,551 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 55 statements into 2 equivalence classes. [2025-02-05 15:11:25,569 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 55 of 55 statements. [2025-02-05 15:11:25,569 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-02-05 15:11:25,570 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 15:11:25,570 INFO L256 TraceCheckSpWp]: Trace formula consists of 145 conjuncts, 11 conjuncts are in the unsatisfiable core [2025-02-05 15:11:25,572 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-05 15:11:25,642 INFO L134 CoverageAnalysis]: Checked inductivity of 74 backedges. 8 proven. 62 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-05 15:11:25,642 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-05 15:11:25,748 INFO L134 CoverageAnalysis]: Checked inductivity of 74 backedges. 8 proven. 38 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2025-02-05 15:11:25,749 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [134976469] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-05 15:11:25,749 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-05 15:11:25,749 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 7, 8] total 17 [2025-02-05 15:11:25,749 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [720464209] [2025-02-05 15:11:25,749 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-05 15:11:25,749 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 17 states [2025-02-05 15:11:25,750 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 15:11:25,750 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2025-02-05 15:11:25,750 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=106, Invalid=166, Unknown=0, NotChecked=0, Total=272 [2025-02-05 15:11:25,751 INFO L87 Difference]: Start difference. First operand 52 states and 57 transitions. Second operand has 17 states, 17 states have (on average 4.294117647058823) internal successors, (73), 17 states have internal predecessors, (73), 12 states have call successors, (19), 7 states have call predecessors, (19), 6 states have return successors, (18), 11 states have call predecessors, (18), 11 states have call successors, (18) [2025-02-05 15:11:25,899 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 15:11:25,899 INFO L93 Difference]: Finished difference Result 111 states and 127 transitions. [2025-02-05 15:11:25,900 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2025-02-05 15:11:25,900 INFO L78 Accepts]: Start accepts. Automaton has has 17 states, 17 states have (on average 4.294117647058823) internal successors, (73), 17 states have internal predecessors, (73), 12 states have call successors, (19), 7 states have call predecessors, (19), 6 states have return successors, (18), 11 states have call predecessors, (18), 11 states have call successors, (18) Word has length 55 [2025-02-05 15:11:25,900 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 15:11:25,902 INFO L225 Difference]: With dead ends: 111 [2025-02-05 15:11:25,902 INFO L226 Difference]: Without dead ends: 106 [2025-02-05 15:11:25,902 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 103 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 92 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=215, Invalid=385, Unknown=0, NotChecked=0, Total=600 [2025-02-05 15:11:25,903 INFO L435 NwaCegarLoop]: 22 mSDtfsCounter, 63 mSDsluCounter, 96 mSDsCounter, 0 mSdLazyCounter, 50 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 63 SdHoareTripleChecker+Valid, 118 SdHoareTripleChecker+Invalid, 56 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 50 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-02-05 15:11:25,904 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [63 Valid, 118 Invalid, 56 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 50 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-02-05 15:11:25,904 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2025-02-05 15:11:25,917 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 106. [2025-02-05 15:11:25,917 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 106 states, 81 states have (on average 1.1358024691358024) internal successors, (92), 81 states have internal predecessors, (92), 13 states have call successors, (13), 12 states have call predecessors, (13), 11 states have return successors, (12), 12 states have call predecessors, (12), 12 states have call successors, (12) [2025-02-05 15:11:25,918 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 117 transitions. [2025-02-05 15:11:25,918 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 117 transitions. Word has length 55 [2025-02-05 15:11:25,919 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 15:11:25,919 INFO L471 AbstractCegarLoop]: Abstraction has 106 states and 117 transitions. [2025-02-05 15:11:25,919 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 17 states, 17 states have (on average 4.294117647058823) internal successors, (73), 17 states have internal predecessors, (73), 12 states have call successors, (19), 7 states have call predecessors, (19), 6 states have return successors, (18), 11 states have call predecessors, (18), 11 states have call successors, (18) [2025-02-05 15:11:25,919 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 117 transitions. [2025-02-05 15:11:25,921 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2025-02-05 15:11:25,921 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 15:11:25,921 INFO L218 NwaCegarLoop]: trace histogram [11, 11, 10, 10, 10, 10, 10, 10, 10, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 15:11:25,927 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Forceful destruction successful, exit code 0 [2025-02-05 15:11:26,125 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5,6 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 15:11:26,125 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 15:11:26,126 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 15:11:26,126 INFO L85 PathProgramCache]: Analyzing trace with hash 1774419309, now seen corresponding path program 3 times [2025-02-05 15:11:26,126 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 15:11:26,126 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1009824606] [2025-02-05 15:11:26,126 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-05 15:11:26,126 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 15:11:26,133 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 109 statements into 11 equivalence classes. [2025-02-05 15:11:26,197 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) and asserted 109 of 109 statements. [2025-02-05 15:11:26,197 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2025-02-05 15:11:26,198 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 15:11:26,929 INFO L134 CoverageAnalysis]: Checked inductivity of 449 backedges. 20 proven. 245 refuted. 0 times theorem prover too weak. 184 trivial. 0 not checked. [2025-02-05 15:11:26,929 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 15:11:26,929 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1009824606] [2025-02-05 15:11:26,929 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1009824606] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-05 15:11:26,929 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1498713928] [2025-02-05 15:11:26,929 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-05 15:11:26,930 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 15:11:26,930 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-05 15:11:26,934 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-05 15:11:26,935 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2025-02-05 15:11:26,963 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 109 statements into 11 equivalence classes. [2025-02-05 15:11:27,361 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) and asserted 109 of 109 statements. [2025-02-05 15:11:27,361 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 11 check-sat command(s) [2025-02-05 15:11:27,361 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 15:11:27,363 INFO L256 TraceCheckSpWp]: Trace formula consists of 265 conjuncts, 23 conjuncts are in the unsatisfiable core [2025-02-05 15:11:27,365 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-05 15:11:27,515 INFO L134 CoverageAnalysis]: Checked inductivity of 449 backedges. 20 proven. 425 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-05 15:11:27,516 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-05 15:11:27,851 INFO L134 CoverageAnalysis]: Checked inductivity of 449 backedges. 20 proven. 245 refuted. 0 times theorem prover too weak. 184 trivial. 0 not checked. [2025-02-05 15:11:27,852 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1498713928] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-05 15:11:27,852 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-05 15:11:27,852 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 13, 14] total 35 [2025-02-05 15:11:27,852 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [648283383] [2025-02-05 15:11:27,852 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-05 15:11:27,853 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 35 states [2025-02-05 15:11:27,853 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 15:11:27,853 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2025-02-05 15:11:27,854 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=490, Invalid=700, Unknown=0, NotChecked=0, Total=1190 [2025-02-05 15:11:27,854 INFO L87 Difference]: Start difference. First operand 106 states and 117 transitions. Second operand has 35 states, 35 states have (on average 4.314285714285714) internal successors, (151), 35 states have internal predecessors, (151), 24 states have call successors, (37), 13 states have call predecessors, (37), 12 states have return successors, (36), 23 states have call predecessors, (36), 23 states have call successors, (36) [2025-02-05 15:11:28,260 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 15:11:28,260 INFO L93 Difference]: Finished difference Result 219 states and 253 transitions. [2025-02-05 15:11:28,261 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2025-02-05 15:11:28,261 INFO L78 Accepts]: Start accepts. Automaton has has 35 states, 35 states have (on average 4.314285714285714) internal successors, (151), 35 states have internal predecessors, (151), 24 states have call successors, (37), 13 states have call predecessors, (37), 12 states have return successors, (36), 23 states have call predecessors, (36), 23 states have call successors, (36) Word has length 109 [2025-02-05 15:11:28,261 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 15:11:28,262 INFO L225 Difference]: With dead ends: 219 [2025-02-05 15:11:28,262 INFO L226 Difference]: Without dead ends: 214 [2025-02-05 15:11:28,263 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 252 GetRequests, 205 SyntacticMatches, 0 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 301 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=857, Invalid=1495, Unknown=0, NotChecked=0, Total=2352 [2025-02-05 15:11:28,264 INFO L435 NwaCegarLoop]: 22 mSDtfsCounter, 165 mSDsluCounter, 192 mSDsCounter, 0 mSdLazyCounter, 124 mSolverCounterSat, 20 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 165 SdHoareTripleChecker+Valid, 214 SdHoareTripleChecker+Invalid, 144 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 20 IncrementalHoareTripleChecker+Valid, 124 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-02-05 15:11:28,264 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [165 Valid, 214 Invalid, 144 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [20 Valid, 124 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-02-05 15:11:28,264 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 214 states. [2025-02-05 15:11:28,288 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 214 to 214. [2025-02-05 15:11:28,288 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 214 states, 165 states have (on average 1.1393939393939394) internal successors, (188), 165 states have internal predecessors, (188), 25 states have call successors, (25), 24 states have call predecessors, (25), 23 states have return successors, (24), 24 states have call predecessors, (24), 24 states have call successors, (24) [2025-02-05 15:11:28,289 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 214 states to 214 states and 237 transitions. [2025-02-05 15:11:28,290 INFO L78 Accepts]: Start accepts. Automaton has 214 states and 237 transitions. Word has length 109 [2025-02-05 15:11:28,290 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 15:11:28,290 INFO L471 AbstractCegarLoop]: Abstraction has 214 states and 237 transitions. [2025-02-05 15:11:28,290 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 35 states, 35 states have (on average 4.314285714285714) internal successors, (151), 35 states have internal predecessors, (151), 24 states have call successors, (37), 13 states have call predecessors, (37), 12 states have return successors, (36), 23 states have call predecessors, (36), 23 states have call successors, (36) [2025-02-05 15:11:28,291 INFO L276 IsEmpty]: Start isEmpty. Operand 214 states and 237 transitions. [2025-02-05 15:11:28,292 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 218 [2025-02-05 15:11:28,292 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 15:11:28,292 INFO L218 NwaCegarLoop]: trace histogram [23, 23, 22, 22, 22, 22, 22, 22, 22, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 15:11:28,297 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Ended with exit code 0 [2025-02-05 15:11:28,497 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable6 [2025-02-05 15:11:28,497 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 15:11:28,497 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 15:11:28,497 INFO L85 PathProgramCache]: Analyzing trace with hash 2067652269, now seen corresponding path program 4 times [2025-02-05 15:11:28,497 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 15:11:28,497 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1929842267] [2025-02-05 15:11:28,497 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-05 15:11:28,498 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 15:11:28,507 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 217 statements into 2 equivalence classes. [2025-02-05 15:11:28,592 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 217 of 217 statements. [2025-02-05 15:11:28,592 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-05 15:11:28,592 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 15:11:29,853 INFO L134 CoverageAnalysis]: Checked inductivity of 2171 backedges. 44 proven. 1199 refuted. 0 times theorem prover too weak. 928 trivial. 0 not checked. [2025-02-05 15:11:29,853 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 15:11:29,853 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1929842267] [2025-02-05 15:11:29,853 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1929842267] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-05 15:11:29,853 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [298071126] [2025-02-05 15:11:29,853 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-05 15:11:29,853 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 15:11:29,854 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-05 15:11:29,858 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-05 15:11:29,859 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2025-02-05 15:11:29,899 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 217 statements into 2 equivalence classes. [2025-02-05 15:11:29,954 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 217 of 217 statements. [2025-02-05 15:11:29,954 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-05 15:11:29,954 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 15:11:29,956 INFO L256 TraceCheckSpWp]: Trace formula consists of 505 conjuncts, 47 conjuncts are in the unsatisfiable core [2025-02-05 15:11:29,964 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-05 15:11:30,291 INFO L134 CoverageAnalysis]: Checked inductivity of 2171 backedges. 44 proven. 2123 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-05 15:11:30,292 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-05 15:11:31,202 INFO L134 CoverageAnalysis]: Checked inductivity of 2171 backedges. 44 proven. 1199 refuted. 0 times theorem prover too weak. 928 trivial. 0 not checked. [2025-02-05 15:11:31,203 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [298071126] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-05 15:11:31,203 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-05 15:11:31,203 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 25, 26] total 57 [2025-02-05 15:11:31,203 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [536738020] [2025-02-05 15:11:31,203 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-05 15:11:31,204 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 57 states [2025-02-05 15:11:31,204 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 15:11:31,205 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 57 interpolants. [2025-02-05 15:11:31,207 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1269, Invalid=1923, Unknown=0, NotChecked=0, Total=3192 [2025-02-05 15:11:31,207 INFO L87 Difference]: Start difference. First operand 214 states and 237 transitions. Second operand has 57 states, 56 states have (on average 4.892857142857143) internal successors, (274), 56 states have internal predecessors, (274), 49 states have call successors, (74), 26 states have call predecessors, (74), 24 states have return successors, (72), 47 states have call predecessors, (72), 47 states have call successors, (72) [2025-02-05 15:11:32,599 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 15:11:32,599 INFO L93 Difference]: Finished difference Result 435 states and 505 transitions. [2025-02-05 15:11:32,599 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 94 states. [2025-02-05 15:11:32,599 INFO L78 Accepts]: Start accepts. Automaton has has 57 states, 56 states have (on average 4.892857142857143) internal successors, (274), 56 states have internal predecessors, (274), 49 states have call successors, (74), 26 states have call predecessors, (74), 24 states have return successors, (72), 47 states have call predecessors, (72), 47 states have call successors, (72) Word has length 217 [2025-02-05 15:11:32,600 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 15:11:32,602 INFO L225 Difference]: With dead ends: 435 [2025-02-05 15:11:32,602 INFO L226 Difference]: Without dead ends: 430 [2025-02-05 15:11:32,605 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 507 GetRequests, 408 SyntacticMatches, 0 SemanticMatches, 99 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1578 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=3446, Invalid=6654, Unknown=0, NotChecked=0, Total=10100 [2025-02-05 15:11:32,606 INFO L435 NwaCegarLoop]: 22 mSDtfsCounter, 337 mSDsluCounter, 399 mSDsCounter, 0 mSdLazyCounter, 217 mSolverCounterSat, 30 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 337 SdHoareTripleChecker+Valid, 421 SdHoareTripleChecker+Invalid, 247 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 30 IncrementalHoareTripleChecker+Valid, 217 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-02-05 15:11:32,606 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [337 Valid, 421 Invalid, 247 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [30 Valid, 217 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-02-05 15:11:32,607 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 430 states. [2025-02-05 15:11:32,653 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 430 to 430. [2025-02-05 15:11:32,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 430 states, 333 states have (on average 1.1411411411411412) internal successors, (380), 333 states have internal predecessors, (380), 49 states have call successors, (49), 48 states have call predecessors, (49), 47 states have return successors, (48), 48 states have call predecessors, (48), 48 states have call successors, (48) [2025-02-05 15:11:32,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 430 states to 430 states and 477 transitions. [2025-02-05 15:11:32,655 INFO L78 Accepts]: Start accepts. Automaton has 430 states and 477 transitions. Word has length 217 [2025-02-05 15:11:32,656 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 15:11:32,656 INFO L471 AbstractCegarLoop]: Abstraction has 430 states and 477 transitions. [2025-02-05 15:11:32,656 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 57 states, 56 states have (on average 4.892857142857143) internal successors, (274), 56 states have internal predecessors, (274), 49 states have call successors, (74), 26 states have call predecessors, (74), 24 states have return successors, (72), 47 states have call predecessors, (72), 47 states have call successors, (72) [2025-02-05 15:11:32,656 INFO L276 IsEmpty]: Start isEmpty. Operand 430 states and 477 transitions. [2025-02-05 15:11:32,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 434 [2025-02-05 15:11:32,660 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 15:11:32,660 INFO L218 NwaCegarLoop]: trace histogram [47, 47, 46, 46, 46, 46, 46, 46, 46, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 15:11:32,668 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2025-02-05 15:11:32,864 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7,8 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 15:11:32,864 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 15:11:32,865 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 15:11:32,865 INFO L85 PathProgramCache]: Analyzing trace with hash -22150867, now seen corresponding path program 5 times [2025-02-05 15:11:32,866 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 15:11:32,866 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1641442532] [2025-02-05 15:11:32,866 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-05 15:11:32,867 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 15:11:32,892 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 433 statements into 47 equivalence classes. [2025-02-05 15:11:33,062 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) and asserted 433 of 433 statements. [2025-02-05 15:11:33,063 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2025-02-05 15:11:33,063 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 15:11:36,040 INFO L134 CoverageAnalysis]: Checked inductivity of 9503 backedges. 92 proven. 5267 refuted. 0 times theorem prover too weak. 4144 trivial. 0 not checked. [2025-02-05 15:11:36,040 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 15:11:36,040 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1641442532] [2025-02-05 15:11:36,040 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1641442532] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-05 15:11:36,040 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1939149949] [2025-02-05 15:11:36,040 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-05 15:11:36,040 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 15:11:36,040 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-05 15:11:36,042 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-05 15:11:36,045 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2025-02-05 15:11:36,100 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 433 statements into 47 equivalence classes. [2025-02-05 15:11:38,285 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) and asserted 433 of 433 statements. [2025-02-05 15:11:38,285 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 47 check-sat command(s) [2025-02-05 15:11:38,285 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 15:11:38,292 INFO L256 TraceCheckSpWp]: Trace formula consists of 985 conjuncts, 95 conjuncts are in the unsatisfiable core [2025-02-05 15:11:38,299 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-05 15:11:38,743 INFO L134 CoverageAnalysis]: Checked inductivity of 9503 backedges. 92 proven. 9407 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-05 15:11:38,743 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-05 15:11:41,304 INFO L134 CoverageAnalysis]: Checked inductivity of 9503 backedges. 92 proven. 5267 refuted. 0 times theorem prover too weak. 4144 trivial. 0 not checked. [2025-02-05 15:11:41,304 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1939149949] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-05 15:11:41,304 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-05 15:11:41,304 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [51, 49, 50] total 99 [2025-02-05 15:11:41,304 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2034232731] [2025-02-05 15:11:41,305 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-05 15:11:41,305 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 99 states [2025-02-05 15:11:41,306 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 15:11:41,308 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 99 interpolants. [2025-02-05 15:11:41,310 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=4658, Invalid=5044, Unknown=0, NotChecked=0, Total=9702 [2025-02-05 15:11:41,310 INFO L87 Difference]: Start difference. First operand 430 states and 477 transitions. Second operand has 99 states, 99 states have (on average 5.353535353535354) internal successors, (530), 99 states have internal predecessors, (530), 95 states have call successors, (145), 49 states have call predecessors, (145), 48 states have return successors, (144), 94 states have call predecessors, (144), 94 states have call successors, (144) [2025-02-05 15:11:45,992 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 15:11:45,992 INFO L93 Difference]: Finished difference Result 867 states and 1009 transitions. [2025-02-05 15:11:45,992 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 190 states. [2025-02-05 15:11:45,993 INFO L78 Accepts]: Start accepts. Automaton has has 99 states, 99 states have (on average 5.353535353535354) internal successors, (530), 99 states have internal predecessors, (530), 95 states have call successors, (145), 49 states have call predecessors, (145), 48 states have return successors, (144), 94 states have call predecessors, (144), 94 states have call successors, (144) Word has length 433 [2025-02-05 15:11:45,994 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 15:11:45,997 INFO L225 Difference]: With dead ends: 867 [2025-02-05 15:11:45,997 INFO L226 Difference]: Without dead ends: 862 [2025-02-05 15:11:46,003 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1007 GetRequests, 818 SyntacticMatches, 0 SemanticMatches, 189 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5716 ImplicationChecksByTransitivity, 5.8s TimeCoverageRelationStatistics Valid=13540, Invalid=22750, Unknown=0, NotChecked=0, Total=36290 [2025-02-05 15:11:46,004 INFO L435 NwaCegarLoop]: 22 mSDtfsCounter, 978 mSDsluCounter, 610 mSDsCounter, 0 mSdLazyCounter, 381 mSolverCounterSat, 146 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 978 SdHoareTripleChecker+Valid, 632 SdHoareTripleChecker+Invalid, 527 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 146 IncrementalHoareTripleChecker+Valid, 381 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-02-05 15:11:46,004 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [978 Valid, 632 Invalid, 527 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [146 Valid, 381 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-02-05 15:11:46,005 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 862 states. [2025-02-05 15:11:46,080 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 862 to 862. [2025-02-05 15:11:46,082 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 862 states, 669 states have (on average 1.1420029895366217) internal successors, (764), 669 states have internal predecessors, (764), 97 states have call successors, (97), 96 states have call predecessors, (97), 95 states have return successors, (96), 96 states have call predecessors, (96), 96 states have call successors, (96) [2025-02-05 15:11:46,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 862 states to 862 states and 957 transitions. [2025-02-05 15:11:46,086 INFO L78 Accepts]: Start accepts. Automaton has 862 states and 957 transitions. Word has length 433 [2025-02-05 15:11:46,087 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 15:11:46,087 INFO L471 AbstractCegarLoop]: Abstraction has 862 states and 957 transitions. [2025-02-05 15:11:46,088 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 99 states, 99 states have (on average 5.353535353535354) internal successors, (530), 99 states have internal predecessors, (530), 95 states have call successors, (145), 49 states have call predecessors, (145), 48 states have return successors, (144), 94 states have call predecessors, (144), 94 states have call successors, (144) [2025-02-05 15:11:46,088 INFO L276 IsEmpty]: Start isEmpty. Operand 862 states and 957 transitions. [2025-02-05 15:11:46,100 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 866 [2025-02-05 15:11:46,100 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 15:11:46,101 INFO L218 NwaCegarLoop]: trace histogram [95, 95, 94, 94, 94, 94, 94, 94, 94, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 15:11:46,109 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2025-02-05 15:11:46,301 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8,9 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 15:11:46,302 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 15:11:46,302 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 15:11:46,303 INFO L85 PathProgramCache]: Analyzing trace with hash 574342701, now seen corresponding path program 6 times [2025-02-05 15:11:46,303 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 15:11:46,303 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [908751465] [2025-02-05 15:11:46,303 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-05 15:11:46,303 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 15:11:46,329 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 865 statements into 95 equivalence classes. [2025-02-05 15:11:46,970 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) and asserted 865 of 865 statements. [2025-02-05 15:11:46,970 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) [2025-02-05 15:11:46,970 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 15:12:02,806 INFO L134 CoverageAnalysis]: Checked inductivity of 39719 backedges. 188 proven. 22043 refuted. 0 times theorem prover too weak. 17488 trivial. 0 not checked. [2025-02-05 15:12:02,808 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 15:12:02,808 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [908751465] [2025-02-05 15:12:02,808 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [908751465] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-05 15:12:02,808 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1044547865] [2025-02-05 15:12:02,809 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-05 15:12:02,809 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 15:12:02,809 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-05 15:12:02,811 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-05 15:12:02,811 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2025-02-05 15:12:02,945 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 865 statements into 95 equivalence classes. [2025-02-05 15:12:21,366 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) and asserted 865 of 865 statements. [2025-02-05 15:12:21,366 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 95 check-sat command(s) [2025-02-05 15:12:21,366 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 15:12:21,393 INFO L256 TraceCheckSpWp]: Trace formula consists of 1945 conjuncts, 191 conjuncts are in the unsatisfiable core [2025-02-05 15:12:21,416 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-05 15:12:22,160 INFO L134 CoverageAnalysis]: Checked inductivity of 39719 backedges. 188 proven. 39527 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-05 15:12:22,161 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-05 15:12:26,371 INFO L134 CoverageAnalysis]: Checked inductivity of 39719 backedges. 188 proven. 22043 refuted. 0 times theorem prover too weak. 17488 trivial. 0 not checked. [2025-02-05 15:12:26,371 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1044547865] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-05 15:12:26,372 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-05 15:12:26,372 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [134, 97, 98] total 141 [2025-02-05 15:12:26,372 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1479997064] [2025-02-05 15:12:26,372 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-05 15:12:26,374 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 141 states [2025-02-05 15:12:26,375 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 15:12:26,379 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 141 interpolants. [2025-02-05 15:12:26,381 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7084, Invalid=12656, Unknown=0, NotChecked=0, Total=19740 [2025-02-05 15:12:26,382 INFO L87 Difference]: Start difference. First operand 862 states and 957 transitions. Second operand has 141 states, 141 states have (on average 5.49645390070922) internal successors, (775), 141 states have internal predecessors, (775), 102 states have call successors, (200), 97 states have call predecessors, (200), 96 states have return successors, (199), 101 states have call predecessors, (199), 101 states have call successors, (199) [2025-02-05 15:12:29,660 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 15:12:29,660 INFO L93 Difference]: Finished difference Result 921 states and 1027 transitions. [2025-02-05 15:12:29,660 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 202 states. [2025-02-05 15:12:29,661 INFO L78 Accepts]: Start accepts. Automaton has has 141 states, 141 states have (on average 5.49645390070922) internal successors, (775), 141 states have internal predecessors, (775), 102 states have call successors, (200), 97 states have call predecessors, (200), 96 states have return successors, (199), 101 states have call predecessors, (199), 101 states have call successors, (199) Word has length 865 [2025-02-05 15:12:29,662 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 15:12:29,666 INFO L225 Difference]: With dead ends: 921 [2025-02-05 15:12:29,666 INFO L226 Difference]: Without dead ends: 916 [2025-02-05 15:12:29,670 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 1926 GetRequests, 1633 SyntacticMatches, 90 SemanticMatches, 203 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10724 ImplicationChecksByTransitivity, 10.2s TimeCoverageRelationStatistics Valid=15560, Invalid=26260, Unknown=0, NotChecked=0, Total=41820 [2025-02-05 15:12:29,671 INFO L435 NwaCegarLoop]: 22 mSDtfsCounter, 659 mSDsluCounter, 660 mSDsCounter, 0 mSdLazyCounter, 454 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 659 SdHoareTripleChecker+Valid, 682 SdHoareTripleChecker+Invalid, 459 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 454 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-02-05 15:12:29,671 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [659 Valid, 682 Invalid, 459 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 454 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-02-05 15:12:29,672 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 916 states. [2025-02-05 15:12:29,718 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 916 to 916. [2025-02-05 15:12:29,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 916 states, 711 states have (on average 1.1420534458509142) internal successors, (812), 711 states have internal predecessors, (812), 103 states have call successors, (103), 102 states have call predecessors, (103), 101 states have return successors, (102), 102 states have call predecessors, (102), 102 states have call successors, (102) [2025-02-05 15:12:29,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 916 states to 916 states and 1017 transitions. [2025-02-05 15:12:29,722 INFO L78 Accepts]: Start accepts. Automaton has 916 states and 1017 transitions. Word has length 865 [2025-02-05 15:12:29,723 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 15:12:29,723 INFO L471 AbstractCegarLoop]: Abstraction has 916 states and 1017 transitions. [2025-02-05 15:12:29,724 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 141 states, 141 states have (on average 5.49645390070922) internal successors, (775), 141 states have internal predecessors, (775), 102 states have call successors, (200), 97 states have call predecessors, (200), 96 states have return successors, (199), 101 states have call predecessors, (199), 101 states have call successors, (199) [2025-02-05 15:12:29,724 INFO L276 IsEmpty]: Start isEmpty. Operand 916 states and 1017 transitions. [2025-02-05 15:12:29,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 920 [2025-02-05 15:12:29,739 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 15:12:29,739 INFO L218 NwaCegarLoop]: trace histogram [101, 101, 100, 100, 100, 100, 100, 100, 100, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 15:12:29,750 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2025-02-05 15:12:29,943 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9,10 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 15:12:29,943 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [__VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 15:12:29,944 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 15:12:29,944 INFO L85 PathProgramCache]: Analyzing trace with hash 603505357, now seen corresponding path program 7 times [2025-02-05 15:12:29,944 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 15:12:29,944 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1085073198] [2025-02-05 15:12:29,944 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-02-05 15:12:29,944 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 15:12:29,975 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 919 statements into 1 equivalence classes. [2025-02-05 15:12:30,308 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 919 of 919 statements. [2025-02-05 15:12:30,308 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 15:12:30,309 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unknown [2025-02-05 15:12:30,313 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleZ3 [309584210] [2025-02-05 15:12:30,313 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-02-05 15:12:30,313 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 15:12:30,313 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-05 15:12:30,315 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-05 15:12:30,316 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2025-02-05 15:12:30,394 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 919 statements into 1 equivalence classes. [2025-02-05 15:12:30,608 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 919 of 919 statements. [2025-02-05 15:12:30,608 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 15:12:30,608 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-05 15:12:30,608 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-05 15:12:30,680 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 919 statements into 1 equivalence classes. [2025-02-05 15:12:30,804 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 919 of 919 statements. [2025-02-05 15:12:30,804 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 15:12:30,804 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-05 15:12:30,941 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-05 15:12:30,941 INFO L340 BasicCegarLoop]: Counterexample is feasible [2025-02-05 15:12:30,942 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location __VERIFIER_assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2025-02-05 15:12:30,955 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Ended with exit code 0 [2025-02-05 15:12:31,143 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10,11 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 15:12:31,146 INFO L422 BasicCegarLoop]: Path program histogram: [7, 1, 1, 1, 1] [2025-02-05 15:12:31,261 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2025-02-05 15:12:31,263 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 05.02 03:12:31 BoogieIcfgContainer [2025-02-05 15:12:31,263 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2025-02-05 15:12:31,264 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-02-05 15:12:31,264 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-02-05 15:12:31,264 INFO L274 PluginConnector]: Witness Printer initialized [2025-02-05 15:12:31,265 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 05.02 03:11:18" (3/4) ... [2025-02-05 15:12:31,265 INFO L140 WitnessPrinter]: Generating witness for reachability counterexample [2025-02-05 15:12:31,376 INFO L127 tionWitnessGenerator]: Generated YAML witness of length 711. [2025-02-05 15:12:31,541 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/witness.graphml [2025-02-05 15:12:31,542 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/witness.yml [2025-02-05 15:12:31,542 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-02-05 15:12:31,543 INFO L158 Benchmark]: Toolchain (without parser) took 73035.56ms. Allocated memory was 201.3MB in the beginning and 2.0GB in the end (delta: 1.8GB). Free memory was 158.9MB in the beginning and 1.5GB in the end (delta: -1.4GB). Peak memory consumption was 363.2MB. Max. memory is 16.1GB. [2025-02-05 15:12:31,543 INFO L158 Benchmark]: CDTParser took 0.16ms. Allocated memory is still 218.1MB. Free memory is still 134.5MB. There was no memory consumed. Max. memory is 16.1GB. [2025-02-05 15:12:31,544 INFO L158 Benchmark]: CACSL2BoogieTranslator took 173.28ms. Allocated memory is still 201.3MB. Free memory was 158.6MB in the beginning and 147.6MB in the end (delta: 10.9MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-02-05 15:12:31,544 INFO L158 Benchmark]: Boogie Procedure Inliner took 22.53ms. Allocated memory is still 201.3MB. Free memory was 147.6MB in the beginning and 146.2MB in the end (delta: 1.4MB). There was no memory consumed. Max. memory is 16.1GB. [2025-02-05 15:12:31,544 INFO L158 Benchmark]: Boogie Preprocessor took 25.34ms. Allocated memory is still 201.3MB. Free memory was 146.2MB in the beginning and 145.3MB in the end (delta: 963.9kB). There was no memory consumed. Max. memory is 16.1GB. [2025-02-05 15:12:31,544 INFO L158 Benchmark]: IcfgBuilder took 171.79ms. Allocated memory is still 201.3MB. Free memory was 145.3MB in the beginning and 133.4MB in the end (delta: 11.8MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-02-05 15:12:31,545 INFO L158 Benchmark]: TraceAbstraction took 72360.01ms. Allocated memory was 201.3MB in the beginning and 2.0GB in the end (delta: 1.8GB). Free memory was 132.8MB in the beginning and 1.6GB in the end (delta: -1.5GB). Peak memory consumption was 287.7MB. Max. memory is 16.1GB. [2025-02-05 15:12:31,545 INFO L158 Benchmark]: Witness Printer took 277.96ms. Allocated memory is still 2.0GB. Free memory was 1.6GB in the beginning and 1.5GB in the end (delta: 46.1MB). Peak memory consumption was 50.3MB. Max. memory is 16.1GB. [2025-02-05 15:12:31,546 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16ms. Allocated memory is still 218.1MB. Free memory is still 134.5MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 173.28ms. Allocated memory is still 201.3MB. Free memory was 158.6MB in the beginning and 147.6MB in the end (delta: 10.9MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 22.53ms. Allocated memory is still 201.3MB. Free memory was 147.6MB in the beginning and 146.2MB in the end (delta: 1.4MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 25.34ms. Allocated memory is still 201.3MB. Free memory was 146.2MB in the beginning and 145.3MB in the end (delta: 963.9kB). There was no memory consumed. Max. memory is 16.1GB. * IcfgBuilder took 171.79ms. Allocated memory is still 201.3MB. Free memory was 145.3MB in the beginning and 133.4MB in the end (delta: 11.8MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * TraceAbstraction took 72360.01ms. Allocated memory was 201.3MB in the beginning and 2.0GB in the end (delta: 1.8GB). Free memory was 132.8MB in the beginning and 1.6GB in the end (delta: -1.5GB). Peak memory consumption was 287.7MB. Max. memory is 16.1GB. * Witness Printer took 277.96ms. Allocated memory is still 2.0GB. Free memory was 1.6GB in the beginning and 1.5GB in the end (delta: 46.1MB). Peak memory consumption was 50.3MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 14]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L19] int counter = 0; VAL [counter=0] [L21] int A, R; [L22] long long u, v, r; [L23] A = __VERIFIER_nondet_int() [L24] R = __VERIFIER_nondet_int() [L26] CALL assume_abort_if_not(((long long) R - 1) * ((long long) R - 1) < A) VAL [\old(cond)=1, counter=0] [L9] COND FALSE !(!cond) VAL [\old(cond)=1, counter=0] [L26] RET assume_abort_if_not(((long long) R - 1) * ((long long) R - 1) < A) VAL [A=25010003, R=5002, counter=0] [L28] CALL assume_abort_if_not(A % 2 == 1) VAL [\old(cond)=1, counter=0] [L9] COND FALSE !(!cond) VAL [\old(cond)=1, counter=0] [L28] RET assume_abort_if_not(A % 2 == 1) VAL [A=25010003, R=5002, counter=0] [L30] u = ((long long) 2 * R) + 1 [L31] v = 1 [L32] r = ((long long) R * R) - A VAL [A=25010003, counter=0, r=10001, u=10005, v=1] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=1, r=10001, u=10005, v=1] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=1] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=1] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=1, r=10001, u=10005, v=1] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=1, r=10001, u=10005, v=1] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=1, r=10000, u=10005, v=3] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=2, r=10000, u=10005, v=3] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=2] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=2] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=2, r=10000, u=10005, v=3] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=2, r=10000, u=10005, v=3] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=2, r=9997, u=10005, v=5] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=3, r=9997, u=10005, v=5] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=3] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=3] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=3, r=9997, u=10005, v=5] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=3, r=9997, u=10005, v=5] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=3, r=9992, u=10005, v=7] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=4, r=9992, u=10005, v=7] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=4] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=4] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=4, r=9992, u=10005, v=7] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=4, r=9992, u=10005, v=7] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=4, r=9985, u=10005, v=9] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=5, r=9985, u=10005, v=9] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=5] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=5] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=5, r=9985, u=10005, v=9] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=5, r=9985, u=10005, v=9] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=5, r=9976, u=10005, v=11] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=6, r=9976, u=10005, v=11] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=6] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=6] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=6, r=9976, u=10005, v=11] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=6, r=9976, u=10005, v=11] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=6, r=9965, u=10005, v=13] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=7, r=9965, u=10005, v=13] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=7] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=7] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=7, r=9965, u=10005, v=13] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=7, r=9965, u=10005, v=13] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=7, r=9952, u=10005, v=15] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=8, r=9952, u=10005, v=15] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=8] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=8] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=8, r=9952, u=10005, v=15] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=8, r=9952, u=10005, v=15] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=8, r=9937, u=10005, v=17] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=9, r=9937, u=10005, v=17] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=9] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=9] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=9, r=9937, u=10005, v=17] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=9, r=9937, u=10005, v=17] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=9, r=9920, u=10005, v=19] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=10, r=9920, u=10005, v=19] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=10] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=10] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=10, r=9920, u=10005, v=19] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=10, r=9920, u=10005, v=19] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=10, r=9901, u=10005, v=21] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=11, r=9901, u=10005, v=21] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=11] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=11] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=11, r=9901, u=10005, v=21] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=11, r=9901, u=10005, v=21] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=11, r=9880, u=10005, v=23] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=12, r=9880, u=10005, v=23] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=12] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=12] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=12, r=9880, u=10005, v=23] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=12, r=9880, u=10005, v=23] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=12, r=9857, u=10005, v=25] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=13, r=9857, u=10005, v=25] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=13] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=13] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=13, r=9857, u=10005, v=25] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=13, r=9857, u=10005, v=25] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=13, r=9832, u=10005, v=27] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=14, r=9832, u=10005, v=27] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=14] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=14] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=14, r=9832, u=10005, v=27] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=14, r=9832, u=10005, v=27] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=14, r=9805, u=10005, v=29] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=15, r=9805, u=10005, v=29] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=15] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=15] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=15, r=9805, u=10005, v=29] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=15, r=9805, u=10005, v=29] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=15, r=9776, u=10005, v=31] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=16, r=9776, u=10005, v=31] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=16] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=16] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=16, r=9776, u=10005, v=31] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=16, r=9776, u=10005, v=31] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=16, r=9745, u=10005, v=33] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=17, r=9745, u=10005, v=33] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=17] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=17] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=17, r=9745, u=10005, v=33] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=17, r=9745, u=10005, v=33] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=17, r=9712, u=10005, v=35] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=18, r=9712, u=10005, v=35] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=18] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=18] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=18, r=9712, u=10005, v=35] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=18, r=9712, u=10005, v=35] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=18, r=9677, u=10005, v=37] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=19, r=9677, u=10005, v=37] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=19] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=19] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=19, r=9677, u=10005, v=37] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=19, r=9677, u=10005, v=37] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=19, r=9640, u=10005, v=39] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=20, r=9640, u=10005, v=39] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=20] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=20] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=20, r=9640, u=10005, v=39] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=20, r=9640, u=10005, v=39] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=20, r=9601, u=10005, v=41] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=21, r=9601, u=10005, v=41] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=21] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=21] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=21, r=9601, u=10005, v=41] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=21, r=9601, u=10005, v=41] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=21, r=9560, u=10005, v=43] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=22, r=9560, u=10005, v=43] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=22] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=22] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=22, r=9560, u=10005, v=43] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=22, r=9560, u=10005, v=43] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=22, r=9517, u=10005, v=45] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=23, r=9517, u=10005, v=45] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=23] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=23] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=23, r=9517, u=10005, v=45] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=23, r=9517, u=10005, v=45] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=23, r=9472, u=10005, v=47] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=24, r=9472, u=10005, v=47] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=24] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=24] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=24, r=9472, u=10005, v=47] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=24, r=9472, u=10005, v=47] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=24, r=9425, u=10005, v=49] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=25, r=9425, u=10005, v=49] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=25] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=25] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=25, r=9425, u=10005, v=49] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=25, r=9425, u=10005, v=49] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=25, r=9376, u=10005, v=51] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=26, r=9376, u=10005, v=51] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=26] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=26] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=26, r=9376, u=10005, v=51] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=26, r=9376, u=10005, v=51] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=26, r=9325, u=10005, v=53] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=27, r=9325, u=10005, v=53] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=27] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=27] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=27, r=9325, u=10005, v=53] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=27, r=9325, u=10005, v=53] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=27, r=9272, u=10005, v=55] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=28, r=9272, u=10005, v=55] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=28] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=28] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=28, r=9272, u=10005, v=55] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=28, r=9272, u=10005, v=55] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=28, r=9217, u=10005, v=57] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=29, r=9217, u=10005, v=57] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=29] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=29] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=29, r=9217, u=10005, v=57] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=29, r=9217, u=10005, v=57] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=29, r=9160, u=10005, v=59] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=30, r=9160, u=10005, v=59] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=30] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=30] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=30, r=9160, u=10005, v=59] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=30, r=9160, u=10005, v=59] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=30, r=9101, u=10005, v=61] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=31, r=9101, u=10005, v=61] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=31] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=31] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=31, r=9101, u=10005, v=61] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=31, r=9101, u=10005, v=61] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=31, r=9040, u=10005, v=63] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=32, r=9040, u=10005, v=63] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=32] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=32] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=32, r=9040, u=10005, v=63] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=32, r=9040, u=10005, v=63] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=32, r=8977, u=10005, v=65] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=33, r=8977, u=10005, v=65] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=33] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=33] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=33, r=8977, u=10005, v=65] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=33, r=8977, u=10005, v=65] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=33, r=8912, u=10005, v=67] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=34, r=8912, u=10005, v=67] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=34] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=34] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=34, r=8912, u=10005, v=67] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=34, r=8912, u=10005, v=67] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=34, r=8845, u=10005, v=69] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=35, r=8845, u=10005, v=69] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=35] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=35] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=35, r=8845, u=10005, v=69] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=35, r=8845, u=10005, v=69] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=35, r=8776, u=10005, v=71] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=36, r=8776, u=10005, v=71] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=36] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=36] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=36, r=8776, u=10005, v=71] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=36, r=8776, u=10005, v=71] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=36, r=8705, u=10005, v=73] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=37, r=8705, u=10005, v=73] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=37] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=37] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=37, r=8705, u=10005, v=73] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=37, r=8705, u=10005, v=73] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=37, r=8632, u=10005, v=75] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=38, r=8632, u=10005, v=75] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=38] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=38] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=38, r=8632, u=10005, v=75] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=38, r=8632, u=10005, v=75] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=38, r=8557, u=10005, v=77] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=39, r=8557, u=10005, v=77] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=39] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=39] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=39, r=8557, u=10005, v=77] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=39, r=8557, u=10005, v=77] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=39, r=8480, u=10005, v=79] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=40, r=8480, u=10005, v=79] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=40] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=40] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=40, r=8480, u=10005, v=79] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=40, r=8480, u=10005, v=79] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=40, r=8401, u=10005, v=81] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=41, r=8401, u=10005, v=81] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=41] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=41] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=41, r=8401, u=10005, v=81] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=41, r=8401, u=10005, v=81] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=41, r=8320, u=10005, v=83] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=42, r=8320, u=10005, v=83] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=42] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=42] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=42, r=8320, u=10005, v=83] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=42, r=8320, u=10005, v=83] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=42, r=8237, u=10005, v=85] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=43, r=8237, u=10005, v=85] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=43] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=43] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=43, r=8237, u=10005, v=85] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=43, r=8237, u=10005, v=85] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=43, r=8152, u=10005, v=87] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=44, r=8152, u=10005, v=87] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=44] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=44] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=44, r=8152, u=10005, v=87] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=44, r=8152, u=10005, v=87] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=44, r=8065, u=10005, v=89] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=45, r=8065, u=10005, v=89] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=45] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=45] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=45, r=8065, u=10005, v=89] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=45, r=8065, u=10005, v=89] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=45, r=7976, u=10005, v=91] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=46, r=7976, u=10005, v=91] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=46] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=46] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=46, r=7976, u=10005, v=91] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=46, r=7976, u=10005, v=91] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=46, r=7885, u=10005, v=93] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=47, r=7885, u=10005, v=93] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=47] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=47] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=47, r=7885, u=10005, v=93] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=47, r=7885, u=10005, v=93] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=47, r=7792, u=10005, v=95] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=48, r=7792, u=10005, v=95] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=48] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=48] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=48, r=7792, u=10005, v=95] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=48, r=7792, u=10005, v=95] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=48, r=7697, u=10005, v=97] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=49, r=7697, u=10005, v=97] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=49] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=49] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=49, r=7697, u=10005, v=97] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=49, r=7697, u=10005, v=97] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=49, r=7600, u=10005, v=99] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=50, r=7600, u=10005, v=99] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=50] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=50] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=50, r=7600, u=10005, v=99] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=50, r=7600, u=10005, v=99] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=50, r=7501, u=10005, v=101] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=51, r=7501, u=10005, v=101] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=51] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=51] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=51, r=7501, u=10005, v=101] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=51, r=7501, u=10005, v=101] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=51, r=7400, u=10005, v=103] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=52, r=7400, u=10005, v=103] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=52] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=52] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=52, r=7400, u=10005, v=103] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=52, r=7400, u=10005, v=103] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=52, r=7297, u=10005, v=105] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=53, r=7297, u=10005, v=105] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=53] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=53] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=53, r=7297, u=10005, v=105] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=53, r=7297, u=10005, v=105] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=53, r=7192, u=10005, v=107] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=54, r=7192, u=10005, v=107] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=54] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=54] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=54, r=7192, u=10005, v=107] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=54, r=7192, u=10005, v=107] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=54, r=7085, u=10005, v=109] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=55, r=7085, u=10005, v=109] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=55] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=55] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=55, r=7085, u=10005, v=109] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=55, r=7085, u=10005, v=109] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=55, r=6976, u=10005, v=111] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=56, r=6976, u=10005, v=111] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=56] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=56] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=56, r=6976, u=10005, v=111] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=56, r=6976, u=10005, v=111] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=56, r=6865, u=10005, v=113] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=57, r=6865, u=10005, v=113] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=57] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=57] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=57, r=6865, u=10005, v=113] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=57, r=6865, u=10005, v=113] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=57, r=6752, u=10005, v=115] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=58, r=6752, u=10005, v=115] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=58] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=58] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=58, r=6752, u=10005, v=115] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=58, r=6752, u=10005, v=115] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=58, r=6637, u=10005, v=117] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=59, r=6637, u=10005, v=117] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=59] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=59] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=59, r=6637, u=10005, v=117] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=59, r=6637, u=10005, v=117] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=59, r=6520, u=10005, v=119] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=60, r=6520, u=10005, v=119] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=60] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=60] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=60, r=6520, u=10005, v=119] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=60, r=6520, u=10005, v=119] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=60, r=6401, u=10005, v=121] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=61, r=6401, u=10005, v=121] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=61] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=61] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=61, r=6401, u=10005, v=121] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=61, r=6401, u=10005, v=121] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=61, r=6280, u=10005, v=123] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=62, r=6280, u=10005, v=123] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=62] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=62] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=62, r=6280, u=10005, v=123] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=62, r=6280, u=10005, v=123] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=62, r=6157, u=10005, v=125] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=63, r=6157, u=10005, v=125] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=63] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=63] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=63, r=6157, u=10005, v=125] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=63, r=6157, u=10005, v=125] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=63, r=6032, u=10005, v=127] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=64, r=6032, u=10005, v=127] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=64] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=64] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=64, r=6032, u=10005, v=127] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=64, r=6032, u=10005, v=127] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=64, r=5905, u=10005, v=129] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=65, r=5905, u=10005, v=129] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=65] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=65] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=65, r=5905, u=10005, v=129] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=65, r=5905, u=10005, v=129] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=65, r=5776, u=10005, v=131] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=66, r=5776, u=10005, v=131] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=66] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=66] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=66, r=5776, u=10005, v=131] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=66, r=5776, u=10005, v=131] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=66, r=5645, u=10005, v=133] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=67, r=5645, u=10005, v=133] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=67] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=67] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=67, r=5645, u=10005, v=133] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=67, r=5645, u=10005, v=133] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=67, r=5512, u=10005, v=135] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=68, r=5512, u=10005, v=135] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=68] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=68] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=68, r=5512, u=10005, v=135] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=68, r=5512, u=10005, v=135] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=68, r=5377, u=10005, v=137] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=69, r=5377, u=10005, v=137] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=69] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=69] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=69, r=5377, u=10005, v=137] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=69, r=5377, u=10005, v=137] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=69, r=5240, u=10005, v=139] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=70, r=5240, u=10005, v=139] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=70] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=70] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=70, r=5240, u=10005, v=139] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=70, r=5240, u=10005, v=139] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=70, r=5101, u=10005, v=141] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=71, r=5101, u=10005, v=141] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=71] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=71] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=71, r=5101, u=10005, v=141] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=71, r=5101, u=10005, v=141] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=71, r=4960, u=10005, v=143] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=72, r=4960, u=10005, v=143] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=72] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=72] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=72, r=4960, u=10005, v=143] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=72, r=4960, u=10005, v=143] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=72, r=4817, u=10005, v=145] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=73, r=4817, u=10005, v=145] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=73] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=73] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=73, r=4817, u=10005, v=145] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=73, r=4817, u=10005, v=145] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=73, r=4672, u=10005, v=147] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=74, r=4672, u=10005, v=147] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=74] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=74] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=74, r=4672, u=10005, v=147] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=74, r=4672, u=10005, v=147] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=74, r=4525, u=10005, v=149] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=75, r=4525, u=10005, v=149] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=75] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=75] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=75, r=4525, u=10005, v=149] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=75, r=4525, u=10005, v=149] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=75, r=4376, u=10005, v=151] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=76, r=4376, u=10005, v=151] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=76] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=76] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=76, r=4376, u=10005, v=151] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=76, r=4376, u=10005, v=151] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=76, r=4225, u=10005, v=153] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=77, r=4225, u=10005, v=153] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=77] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=77] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=77, r=4225, u=10005, v=153] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=77, r=4225, u=10005, v=153] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=77, r=4072, u=10005, v=155] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=78, r=4072, u=10005, v=155] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=78] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=78] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=78, r=4072, u=10005, v=155] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=78, r=4072, u=10005, v=155] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=78, r=3917, u=10005, v=157] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=79, r=3917, u=10005, v=157] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=79] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=79] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=79, r=3917, u=10005, v=157] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=79, r=3917, u=10005, v=157] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=79, r=3760, u=10005, v=159] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=80, r=3760, u=10005, v=159] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=80] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=80] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=80, r=3760, u=10005, v=159] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=80, r=3760, u=10005, v=159] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=80, r=3601, u=10005, v=161] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=81, r=3601, u=10005, v=161] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=81] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=81] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=81, r=3601, u=10005, v=161] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=81, r=3601, u=10005, v=161] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=81, r=3440, u=10005, v=163] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=82, r=3440, u=10005, v=163] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=82] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=82] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=82, r=3440, u=10005, v=163] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=82, r=3440, u=10005, v=163] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=82, r=3277, u=10005, v=165] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=83, r=3277, u=10005, v=165] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=83] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=83] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=83, r=3277, u=10005, v=165] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=83, r=3277, u=10005, v=165] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=83, r=3112, u=10005, v=167] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=84, r=3112, u=10005, v=167] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=84] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=84] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=84, r=3112, u=10005, v=167] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=84, r=3112, u=10005, v=167] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=84, r=2945, u=10005, v=169] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=85, r=2945, u=10005, v=169] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=85] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=85] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=85, r=2945, u=10005, v=169] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=85, r=2945, u=10005, v=169] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=85, r=2776, u=10005, v=171] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=86, r=2776, u=10005, v=171] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=86] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=86] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=86, r=2776, u=10005, v=171] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=86, r=2776, u=10005, v=171] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=86, r=2605, u=10005, v=173] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=87, r=2605, u=10005, v=173] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=87] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=87] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=87, r=2605, u=10005, v=173] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=87, r=2605, u=10005, v=173] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=87, r=2432, u=10005, v=175] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=88, r=2432, u=10005, v=175] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=88] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=88] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=88, r=2432, u=10005, v=175] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=88, r=2432, u=10005, v=175] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=88, r=2257, u=10005, v=177] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=89, r=2257, u=10005, v=177] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=89] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=89] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=89, r=2257, u=10005, v=177] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=89, r=2257, u=10005, v=177] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=89, r=2080, u=10005, v=179] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=90, r=2080, u=10005, v=179] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=90] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=90] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=90, r=2080, u=10005, v=179] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=90, r=2080, u=10005, v=179] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=90, r=1901, u=10005, v=181] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=91, r=1901, u=10005, v=181] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=91] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=91] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=91, r=1901, u=10005, v=181] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=91, r=1901, u=10005, v=181] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=91, r=1720, u=10005, v=183] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=92, r=1720, u=10005, v=183] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=92] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=92] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=92, r=1720, u=10005, v=183] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=92, r=1720, u=10005, v=183] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=92, r=1537, u=10005, v=185] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=93, r=1537, u=10005, v=185] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=93] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=93] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=93, r=1537, u=10005, v=185] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=93, r=1537, u=10005, v=185] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=93, r=1352, u=10005, v=187] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=94, r=1352, u=10005, v=187] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=94] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=94] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=94, r=1352, u=10005, v=187] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=94, r=1352, u=10005, v=187] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=94, r=1165, u=10005, v=189] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=95, r=1165, u=10005, v=189] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=95] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=95] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=95, r=1165, u=10005, v=189] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=95, r=1165, u=10005, v=189] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=95, r=976, u=10005, v=191] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=96, r=976, u=10005, v=191] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=96] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=96] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=96, r=976, u=10005, v=191] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=96, r=976, u=10005, v=191] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=96, r=785, u=10005, v=193] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=97, r=785, u=10005, v=193] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=97] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=97] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=97, r=785, u=10005, v=193] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=97, r=785, u=10005, v=193] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=97, r=592, u=10005, v=195] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=98, r=592, u=10005, v=195] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=98] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=98] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=98, r=592, u=10005, v=195] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=98, r=592, u=10005, v=195] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=98, r=397, u=10005, v=197] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=99, r=397, u=10005, v=197] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=99] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=99] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=99, r=397, u=10005, v=197] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=99, r=397, u=10005, v=197] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=99, r=200, u=10005, v=199] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=100, r=200, u=10005, v=199] [L34] COND TRUE counter++<100 [L35] CALL __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=1, counter=100] [L12] COND FALSE !(!(cond)) VAL [\old(cond)=1, counter=100] [L35] RET __VERIFIER_assert(4*(A+r) == u*u - v*v - 2*u + 2*v) VAL [A=25010003, counter=100, r=200, u=10005, v=199] [L36] COND FALSE !(!(r != 0)) VAL [A=25010003, counter=100, r=200, u=10005, v=199] [L38] COND TRUE r > 0 [L39] r = r - v [L40] v = v + 2 VAL [A=25010003, counter=100, r=1, u=10005, v=201] [L34] COND TRUE counter++<100 [L34] EXPR counter++ VAL [A=25010003, counter=101, r=1, u=10005, v=201] [L34] COND FALSE !(counter++<100) [L48] CALL __VERIFIER_assert(((long long) 4*A) == u*u - v*v - 2*u + 2*v) VAL [\old(cond)=0, counter=101] [L12] COND TRUE !(cond) VAL [\old(cond)=0, counter=101] [L14] reach_error() VAL [\old(cond)=0, counter=101] - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 25 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 72.2s, OverallIterations: 11, TraceHistogramMax: 101, PathProgramHistogramMax: 7, EmptinessCheckTime: 0.0s, AutomataDifference: 14.2s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 1 mSolverCounterUnknown, 2249 SdHoareTripleChecker+Valid, 5.6s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 2248 mSDsluCounter, 2400 SdHoareTripleChecker+Invalid, 5.3s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 2180 mSDsCounter, 217 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 1342 IncrementalHoareTripleChecker+Invalid, 1560 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 217 mSolverCounterUnsat, 220 mSDtfsCounter, 1342 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 3980 GetRequests, 3300 SyntacticMatches, 92 SemanticMatches, 588 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18452 ImplicationChecksByTransitivity, 19.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=916occurred in iteration=10, InterpolantAutomatonStates: 583, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 0.3s AutomataMinimizationTime, 10 MinimizatonAttempts, 8 StatesRemovedByMinimization, 2 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.3s SsaConstructionTime, 22.8s SatisfiabilityAnalysisTime, 31.8s InterpolantComputationTime, 5395 NumberOfCodeBlocks, 5395 NumberOfCodeBlocksAsserted, 325 NumberOfCheckSat, 5245 ConstructedInterpolants, 0 QuantifiedInterpolants, 12951 SizeOfPredicates, 179 NumberOfNonLiveVariables, 4132 ConjunctsInSsa, 392 ConjunctsInUnsatCore, 25 InterpolantComputations, 3 PerfectInterpolantSequences, 46667/155806 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2025-02-05 15:12:31,583 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE