./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.UNBOUNDED.pals.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version c00e63dc Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.UNBOUNDED.pals.c -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 906036225f588312d23f50dd6f109319810cf1ead43ce885e134bcc5a0be0190 --- Real Ultimate output --- This is Ultimate 0.3.0-?-c00e63d-m [2025-02-05 16:09:50,658 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-02-05 16:09:50,700 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2025-02-05 16:09:50,703 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-02-05 16:09:50,704 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-02-05 16:09:50,719 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-02-05 16:09:50,719 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-02-05 16:09:50,719 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-02-05 16:09:50,720 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-02-05 16:09:50,720 INFO L153 SettingsManager]: * Use memory slicer=true [2025-02-05 16:09:50,720 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2025-02-05 16:09:50,720 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2025-02-05 16:09:50,720 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-02-05 16:09:50,720 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-02-05 16:09:50,720 INFO L153 SettingsManager]: * Use SBE=true [2025-02-05 16:09:50,720 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-02-05 16:09:50,720 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2025-02-05 16:09:50,721 INFO L153 SettingsManager]: * sizeof long=4 [2025-02-05 16:09:50,721 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-02-05 16:09:50,721 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-02-05 16:09:50,721 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-02-05 16:09:50,721 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2025-02-05 16:09:50,721 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2025-02-05 16:09:50,721 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2025-02-05 16:09:50,721 INFO L153 SettingsManager]: * sizeof long double=12 [2025-02-05 16:09:50,721 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-02-05 16:09:50,721 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-02-05 16:09:50,721 INFO L153 SettingsManager]: * Use constant arrays=true [2025-02-05 16:09:50,722 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-02-05 16:09:50,722 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-02-05 16:09:50,722 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-02-05 16:09:50,722 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-02-05 16:09:50,722 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-02-05 16:09:50,722 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-02-05 16:09:50,722 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2025-02-05 16:09:50,722 INFO L153 SettingsManager]: * Compute procedure contracts=false [2025-02-05 16:09:50,722 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2025-02-05 16:09:50,722 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-02-05 16:09:50,722 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2025-02-05 16:09:50,722 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2025-02-05 16:09:50,722 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2025-02-05 16:09:50,722 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2025-02-05 16:09:50,722 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2025-02-05 16:09:50,723 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 906036225f588312d23f50dd6f109319810cf1ead43ce885e134bcc5a0be0190 [2025-02-05 16:09:50,921 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-02-05 16:09:50,926 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-02-05 16:09:50,927 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-02-05 16:09:50,928 INFO L270 PluginConnector]: Initializing CDTParser... [2025-02-05 16:09:50,928 INFO L274 PluginConnector]: CDTParser initialized [2025-02-05 16:09:50,928 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.UNBOUNDED.pals.c [2025-02-05 16:09:52,067 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/a4ba56436/7d0203c1fecc411aaac8aeed214bb88f/FLAG8d93e46bd [2025-02-05 16:09:52,335 INFO L384 CDTParser]: Found 1 translation units. [2025-02-05 16:09:52,336 INFO L180 CDTParser]: Scanning /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.UNBOUNDED.pals.c [2025-02-05 16:09:52,350 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/a4ba56436/7d0203c1fecc411aaac8aeed214bb88f/FLAG8d93e46bd [2025-02-05 16:09:52,641 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/a4ba56436/7d0203c1fecc411aaac8aeed214bb88f [2025-02-05 16:09:52,643 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-02-05 16:09:52,644 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-02-05 16:09:52,645 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-02-05 16:09:52,645 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-02-05 16:09:52,648 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-02-05 16:09:52,649 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 05.02 04:09:52" (1/1) ... [2025-02-05 16:09:52,650 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@fbdc5c5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 04:09:52, skipping insertion in model container [2025-02-05 16:09:52,650 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 05.02 04:09:52" (1/1) ... [2025-02-05 16:09:52,668 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-02-05 16:09:52,856 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.UNBOUNDED.pals.c[14682,14695] [2025-02-05 16:09:52,861 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-05 16:09:52,874 INFO L200 MainTranslator]: Completed pre-run [2025-02-05 16:09:52,928 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/seq-mthreaded/pals_STARTPALS_ActiveStandby.1.ufo.UNBOUNDED.pals.c[14682,14695] [2025-02-05 16:09:52,928 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-05 16:09:52,946 INFO L204 MainTranslator]: Completed translation [2025-02-05 16:09:52,951 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 04:09:52 WrapperNode [2025-02-05 16:09:52,951 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-02-05 16:09:52,952 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-02-05 16:09:52,952 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-02-05 16:09:52,952 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-02-05 16:09:52,957 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 04:09:52" (1/1) ... [2025-02-05 16:09:52,971 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 04:09:52" (1/1) ... [2025-02-05 16:09:52,999 INFO L138 Inliner]: procedures = 32, calls = 48, calls flagged for inlining = 12, calls inlined = 12, statements flattened = 504 [2025-02-05 16:09:53,000 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-02-05 16:09:53,001 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-02-05 16:09:53,001 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-02-05 16:09:53,001 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-02-05 16:09:53,011 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 04:09:52" (1/1) ... [2025-02-05 16:09:53,011 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 04:09:52" (1/1) ... [2025-02-05 16:09:53,015 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 04:09:52" (1/1) ... [2025-02-05 16:09:53,031 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-02-05 16:09:53,031 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 04:09:52" (1/1) ... [2025-02-05 16:09:53,031 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 04:09:52" (1/1) ... [2025-02-05 16:09:53,042 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 04:09:52" (1/1) ... [2025-02-05 16:09:53,047 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 04:09:52" (1/1) ... [2025-02-05 16:09:53,048 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 04:09:52" (1/1) ... [2025-02-05 16:09:53,054 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 04:09:52" (1/1) ... [2025-02-05 16:09:53,056 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-02-05 16:09:53,057 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-02-05 16:09:53,057 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-02-05 16:09:53,057 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-02-05 16:09:53,062 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 04:09:52" (1/1) ... [2025-02-05 16:09:53,070 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-02-05 16:09:53,080 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-05 16:09:53,097 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2025-02-05 16:09:53,108 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2025-02-05 16:09:53,125 INFO L130 BoogieDeclarations]: Found specification of procedure read_manual_selection_history [2025-02-05 16:09:53,125 INFO L138 BoogieDeclarations]: Found implementation of procedure read_manual_selection_history [2025-02-05 16:09:53,125 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-02-05 16:09:53,125 INFO L130 BoogieDeclarations]: Found specification of procedure read_side2_failed_history [2025-02-05 16:09:53,125 INFO L138 BoogieDeclarations]: Found implementation of procedure read_side2_failed_history [2025-02-05 16:09:53,125 INFO L130 BoogieDeclarations]: Found specification of procedure assert [2025-02-05 16:09:53,125 INFO L138 BoogieDeclarations]: Found implementation of procedure assert [2025-02-05 16:09:53,125 INFO L130 BoogieDeclarations]: Found specification of procedure flip_the_side [2025-02-05 16:09:53,125 INFO L138 BoogieDeclarations]: Found implementation of procedure flip_the_side [2025-02-05 16:09:53,125 INFO L130 BoogieDeclarations]: Found specification of procedure assume_abort_if_not [2025-02-05 16:09:53,125 INFO L138 BoogieDeclarations]: Found implementation of procedure assume_abort_if_not [2025-02-05 16:09:53,125 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-02-05 16:09:53,125 INFO L130 BoogieDeclarations]: Found specification of procedure read_side1_failed_history [2025-02-05 16:09:53,125 INFO L138 BoogieDeclarations]: Found implementation of procedure read_side1_failed_history [2025-02-05 16:09:53,125 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-02-05 16:09:53,125 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-02-05 16:09:53,125 INFO L130 BoogieDeclarations]: Found specification of procedure read_active_side_history [2025-02-05 16:09:53,125 INFO L138 BoogieDeclarations]: Found implementation of procedure read_active_side_history [2025-02-05 16:09:53,225 INFO L257 CfgBuilder]: Building ICFG [2025-02-05 16:09:53,227 INFO L287 CfgBuilder]: Building CFG for each procedure with an implementation [2025-02-05 16:09:53,731 INFO L? ?]: Removed 114 outVars from TransFormulas that were not future-live. [2025-02-05 16:09:53,732 INFO L308 CfgBuilder]: Performing block encoding [2025-02-05 16:09:53,741 INFO L332 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-02-05 16:09:53,741 INFO L337 CfgBuilder]: Removed 0 assume(true) statements. [2025-02-05 16:09:53,742 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 05.02 04:09:53 BoogieIcfgContainer [2025-02-05 16:09:53,742 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-02-05 16:09:53,743 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2025-02-05 16:09:53,743 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2025-02-05 16:09:53,747 INFO L274 PluginConnector]: TraceAbstraction initialized [2025-02-05 16:09:53,747 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 05.02 04:09:52" (1/3) ... [2025-02-05 16:09:53,748 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@73ddd149 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 05.02 04:09:53, skipping insertion in model container [2025-02-05 16:09:53,748 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 04:09:52" (2/3) ... [2025-02-05 16:09:53,748 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@73ddd149 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 05.02 04:09:53, skipping insertion in model container [2025-02-05 16:09:53,748 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 05.02 04:09:53" (3/3) ... [2025-02-05 16:09:53,749 INFO L128 eAbstractionObserver]: Analyzing ICFG pals_STARTPALS_ActiveStandby.1.ufo.UNBOUNDED.pals.c [2025-02-05 16:09:53,759 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2025-02-05 16:09:53,761 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG pals_STARTPALS_ActiveStandby.1.ufo.UNBOUNDED.pals.c that has 8 procedures, 179 locations, 1 initial locations, 1 loop locations, and 1 error locations. [2025-02-05 16:09:53,801 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2025-02-05 16:09:53,810 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@7e71f9b6, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-02-05 16:09:53,810 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2025-02-05 16:09:53,814 INFO L276 IsEmpty]: Start isEmpty. Operand has 179 states, 139 states have (on average 1.5539568345323742) internal successors, (216), 141 states have internal predecessors, (216), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2025-02-05 16:09:53,819 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2025-02-05 16:09:53,819 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:53,820 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:53,820 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:53,823 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:53,824 INFO L85 PathProgramCache]: Analyzing trace with hash -622136184, now seen corresponding path program 1 times [2025-02-05 16:09:53,830 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:53,832 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1924677310] [2025-02-05 16:09:53,833 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:53,833 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:53,892 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-02-05 16:09:53,934 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-02-05 16:09:53,934 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:53,934 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:54,062 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 16:09:54,067 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:54,067 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1924677310] [2025-02-05 16:09:54,068 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1924677310] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:54,068 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:54,068 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-02-05 16:09:54,069 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1227765692] [2025-02-05 16:09:54,069 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:54,072 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 2 states [2025-02-05 16:09:54,073 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:54,086 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2025-02-05 16:09:54,087 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2025-02-05 16:09:54,089 INFO L87 Difference]: Start difference. First operand has 179 states, 139 states have (on average 1.5539568345323742) internal successors, (216), 141 states have internal predecessors, (216), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) Second operand has 2 states, 2 states have (on average 12.0) internal successors, (24), 2 states have internal predecessors, (24), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-02-05 16:09:54,126 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:54,128 INFO L93 Difference]: Finished difference Result 339 states and 554 transitions. [2025-02-05 16:09:54,129 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2025-02-05 16:09:54,130 INFO L78 Accepts]: Start accepts. Automaton has has 2 states, 2 states have (on average 12.0) internal successors, (24), 2 states have internal predecessors, (24), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2025-02-05 16:09:54,130 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:54,137 INFO L225 Difference]: With dead ends: 339 [2025-02-05 16:09:54,137 INFO L226 Difference]: Without dead ends: 176 [2025-02-05 16:09:54,141 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2025-02-05 16:09:54,145 INFO L435 NwaCegarLoop]: 273 mSDtfsCounter, 0 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 0 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 273 SdHoareTripleChecker+Invalid, 0 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 0 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:54,148 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 273 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 0 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 16:09:54,161 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2025-02-05 16:09:54,185 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 176. [2025-02-05 16:09:54,187 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 176 states, 137 states have (on average 1.5401459854014599) internal successors, (211), 138 states have internal predecessors, (211), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2025-02-05 16:09:54,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 273 transitions. [2025-02-05 16:09:54,195 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 273 transitions. Word has length 28 [2025-02-05 16:09:54,195 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:54,196 INFO L471 AbstractCegarLoop]: Abstraction has 176 states and 273 transitions. [2025-02-05 16:09:54,196 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 2 states, 2 states have (on average 12.0) internal successors, (24), 2 states have internal predecessors, (24), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-02-05 16:09:54,196 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 273 transitions. [2025-02-05 16:09:54,197 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2025-02-05 16:09:54,198 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:54,198 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:54,199 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2025-02-05 16:09:54,199 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:54,200 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:54,201 INFO L85 PathProgramCache]: Analyzing trace with hash 1634774823, now seen corresponding path program 1 times [2025-02-05 16:09:54,201 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:54,201 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [283756610] [2025-02-05 16:09:54,201 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:54,201 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:54,221 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes. [2025-02-05 16:09:54,247 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements. [2025-02-05 16:09:54,247 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:54,247 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:54,470 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 16:09:54,470 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:54,470 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [283756610] [2025-02-05 16:09:54,470 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [283756610] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:54,470 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:54,471 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-05 16:09:54,471 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [440536338] [2025-02-05 16:09:54,471 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:54,471 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-02-05 16:09:54,472 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:54,472 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-05 16:09:54,472 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 16:09:54,472 INFO L87 Difference]: Start difference. First operand 176 states and 273 transitions. Second operand has 6 states, 5 states have (on average 4.8) internal successors, (24), 6 states have internal predecessors, (24), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-02-05 16:09:54,578 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:54,582 INFO L93 Difference]: Finished difference Result 338 states and 520 transitions. [2025-02-05 16:09:54,583 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-05 16:09:54,583 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 5 states have (on average 4.8) internal successors, (24), 6 states have internal predecessors, (24), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 28 [2025-02-05 16:09:54,583 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:54,585 INFO L225 Difference]: With dead ends: 338 [2025-02-05 16:09:54,585 INFO L226 Difference]: Without dead ends: 176 [2025-02-05 16:09:54,586 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 16:09:54,586 INFO L435 NwaCegarLoop]: 269 mSDtfsCounter, 0 mSDsluCounter, 1054 mSDsCounter, 0 mSdLazyCounter, 27 mSolverCounterSat, 11 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1323 SdHoareTripleChecker+Invalid, 38 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 11 IncrementalHoareTripleChecker+Valid, 27 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:54,586 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1323 Invalid, 38 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [11 Valid, 27 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-02-05 16:09:54,587 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2025-02-05 16:09:54,601 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 176. [2025-02-05 16:09:54,601 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 176 states, 137 states have (on average 1.4525547445255473) internal successors, (199), 138 states have internal predecessors, (199), 31 states have call successors, (31), 7 states have call predecessors, (31), 7 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2025-02-05 16:09:54,606 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 261 transitions. [2025-02-05 16:09:54,607 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 261 transitions. Word has length 28 [2025-02-05 16:09:54,607 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:54,607 INFO L471 AbstractCegarLoop]: Abstraction has 176 states and 261 transitions. [2025-02-05 16:09:54,607 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 5 states have (on average 4.8) internal successors, (24), 6 states have internal predecessors, (24), 2 states have call successors, (3), 2 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-02-05 16:09:54,607 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 261 transitions. [2025-02-05 16:09:54,608 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2025-02-05 16:09:54,608 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:54,608 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:54,608 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2025-02-05 16:09:54,608 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:54,612 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:54,612 INFO L85 PathProgramCache]: Analyzing trace with hash 1235463433, now seen corresponding path program 1 times [2025-02-05 16:09:54,612 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:54,612 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1084663851] [2025-02-05 16:09:54,612 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:54,612 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:54,627 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 39 statements into 1 equivalence classes. [2025-02-05 16:09:54,669 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 39 of 39 statements. [2025-02-05 16:09:54,669 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:54,669 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:54,867 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 16:09:54,867 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:54,867 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1084663851] [2025-02-05 16:09:54,867 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1084663851] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:54,868 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:54,869 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-05 16:09:54,869 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [369538234] [2025-02-05 16:09:54,869 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:54,869 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-05 16:09:54,869 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:54,869 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-05 16:09:54,869 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-05 16:09:54,870 INFO L87 Difference]: Start difference. First operand 176 states and 261 transitions. Second operand has 4 states, 4 states have (on average 8.75) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-02-05 16:09:54,928 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:54,928 INFO L93 Difference]: Finished difference Result 339 states and 512 transitions. [2025-02-05 16:09:54,928 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-05 16:09:54,928 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) Word has length 39 [2025-02-05 16:09:54,929 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:54,931 INFO L225 Difference]: With dead ends: 339 [2025-02-05 16:09:54,931 INFO L226 Difference]: Without dead ends: 180 [2025-02-05 16:09:54,931 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-02-05 16:09:54,934 INFO L435 NwaCegarLoop]: 255 mSDtfsCounter, 3 mSDsluCounter, 500 mSDsCounter, 0 mSdLazyCounter, 24 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 755 SdHoareTripleChecker+Invalid, 27 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 24 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:54,934 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 755 Invalid, 27 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 24 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 16:09:54,934 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2025-02-05 16:09:54,950 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 180. [2025-02-05 16:09:54,950 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 180 states, 140 states have (on average 1.4428571428571428) internal successors, (202), 141 states have internal predecessors, (202), 31 states have call successors, (31), 8 states have call predecessors, (31), 8 states have return successors, (31), 31 states have call predecessors, (31), 31 states have call successors, (31) [2025-02-05 16:09:54,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 264 transitions. [2025-02-05 16:09:54,954 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 264 transitions. Word has length 39 [2025-02-05 16:09:54,955 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:54,955 INFO L471 AbstractCegarLoop]: Abstraction has 180 states and 264 transitions. [2025-02-05 16:09:54,955 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 3 states have internal predecessors, (35), 2 states have call successors, (3), 3 states have call predecessors, (3), 1 states have return successors, (1), 1 states have call predecessors, (1), 1 states have call successors, (1) [2025-02-05 16:09:54,955 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 264 transitions. [2025-02-05 16:09:54,956 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2025-02-05 16:09:54,956 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:54,956 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:54,956 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2025-02-05 16:09:54,956 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:54,957 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:54,957 INFO L85 PathProgramCache]: Analyzing trace with hash -2140444031, now seen corresponding path program 1 times [2025-02-05 16:09:54,957 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:54,957 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1156063436] [2025-02-05 16:09:54,957 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:54,957 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:54,971 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 55 statements into 1 equivalence classes. [2025-02-05 16:09:54,987 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 55 of 55 statements. [2025-02-05 16:09:54,990 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:54,991 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:55,051 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-05 16:09:55,051 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:55,051 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1156063436] [2025-02-05 16:09:55,051 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1156063436] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:55,051 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:55,051 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-05 16:09:55,051 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2023014036] [2025-02-05 16:09:55,051 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:55,051 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-02-05 16:09:55,052 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:55,053 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-05 16:09:55,053 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:55,053 INFO L87 Difference]: Start difference. First operand 180 states and 264 transitions. Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-02-05 16:09:55,090 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:55,090 INFO L93 Difference]: Finished difference Result 494 states and 735 transitions. [2025-02-05 16:09:55,092 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-05 16:09:55,092 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 55 [2025-02-05 16:09:55,092 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:55,096 INFO L225 Difference]: With dead ends: 494 [2025-02-05 16:09:55,096 INFO L226 Difference]: Without dead ends: 331 [2025-02-05 16:09:55,096 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:55,097 INFO L435 NwaCegarLoop]: 271 mSDtfsCounter, 212 mSDsluCounter, 252 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 212 SdHoareTripleChecker+Valid, 523 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:55,097 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [212 Valid, 523 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 16:09:55,098 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 331 states. [2025-02-05 16:09:55,115 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 331 to 326. [2025-02-05 16:09:55,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 326 states, 249 states have (on average 1.461847389558233) internal successors, (364), 251 states have internal predecessors, (364), 60 states have call successors, (60), 16 states have call predecessors, (60), 16 states have return successors, (60), 59 states have call predecessors, (60), 60 states have call successors, (60) [2025-02-05 16:09:55,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 326 states to 326 states and 484 transitions. [2025-02-05 16:09:55,118 INFO L78 Accepts]: Start accepts. Automaton has 326 states and 484 transitions. Word has length 55 [2025-02-05 16:09:55,118 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:55,118 INFO L471 AbstractCegarLoop]: Abstraction has 326 states and 484 transitions. [2025-02-05 16:09:55,118 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-02-05 16:09:55,118 INFO L276 IsEmpty]: Start isEmpty. Operand 326 states and 484 transitions. [2025-02-05 16:09:55,119 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2025-02-05 16:09:55,119 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:55,119 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:55,120 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2025-02-05 16:09:55,120 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:55,120 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:55,120 INFO L85 PathProgramCache]: Analyzing trace with hash 2126138372, now seen corresponding path program 1 times [2025-02-05 16:09:55,120 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:55,120 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2013219251] [2025-02-05 16:09:55,120 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:55,120 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:55,132 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 56 statements into 1 equivalence classes. [2025-02-05 16:09:55,141 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 56 of 56 statements. [2025-02-05 16:09:55,141 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:55,141 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:55,187 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-05 16:09:55,188 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:55,188 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2013219251] [2025-02-05 16:09:55,188 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2013219251] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:55,188 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:55,188 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-05 16:09:55,188 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1059647906] [2025-02-05 16:09:55,188 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:55,203 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-02-05 16:09:55,203 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:55,203 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-05 16:09:55,203 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:55,203 INFO L87 Difference]: Start difference. First operand 326 states and 484 transitions. Second operand has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-02-05 16:09:55,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:55,257 INFO L93 Difference]: Finished difference Result 917 states and 1373 transitions. [2025-02-05 16:09:55,258 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-05 16:09:55,258 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 56 [2025-02-05 16:09:55,258 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:55,264 INFO L225 Difference]: With dead ends: 917 [2025-02-05 16:09:55,264 INFO L226 Difference]: Without dead ends: 608 [2025-02-05 16:09:55,265 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:55,265 INFO L435 NwaCegarLoop]: 291 mSDtfsCounter, 214 mSDsluCounter, 254 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 214 SdHoareTripleChecker+Valid, 545 SdHoareTripleChecker+Invalid, 8 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:55,265 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [214 Valid, 545 Invalid, 8 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 16:09:55,268 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 608 states. [2025-02-05 16:09:55,311 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 608 to 602. [2025-02-05 16:09:55,313 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 602 states, 453 states have (on average 1.4724061810154525) internal successors, (667), 457 states have internal predecessors, (667), 117 states have call successors, (117), 31 states have call predecessors, (117), 31 states have return successors, (117), 114 states have call predecessors, (117), 117 states have call successors, (117) [2025-02-05 16:09:55,318 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 602 states to 602 states and 901 transitions. [2025-02-05 16:09:55,319 INFO L78 Accepts]: Start accepts. Automaton has 602 states and 901 transitions. Word has length 56 [2025-02-05 16:09:55,319 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:55,319 INFO L471 AbstractCegarLoop]: Abstraction has 602 states and 901 transitions. [2025-02-05 16:09:55,319 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 15.0) internal successors, (45), 3 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-02-05 16:09:55,320 INFO L276 IsEmpty]: Start isEmpty. Operand 602 states and 901 transitions. [2025-02-05 16:09:55,324 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2025-02-05 16:09:55,324 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:55,324 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:55,324 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2025-02-05 16:09:55,324 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:55,325 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:55,325 INFO L85 PathProgramCache]: Analyzing trace with hash -661277115, now seen corresponding path program 1 times [2025-02-05 16:09:55,325 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:55,325 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [724561212] [2025-02-05 16:09:55,325 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:55,325 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:55,341 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 56 statements into 1 equivalence classes. [2025-02-05 16:09:55,363 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 56 of 56 statements. [2025-02-05 16:09:55,363 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:55,363 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:55,461 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-05 16:09:55,462 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:55,462 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [724561212] [2025-02-05 16:09:55,462 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [724561212] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:55,462 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:55,462 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-05 16:09:55,462 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2123685354] [2025-02-05 16:09:55,462 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:55,464 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-05 16:09:55,464 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:55,465 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-05 16:09:55,465 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-02-05 16:09:55,465 INFO L87 Difference]: Start difference. First operand 602 states and 901 transitions. Second operand has 5 states, 5 states have (on average 9.0) internal successors, (45), 5 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-02-05 16:09:55,623 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:55,623 INFO L93 Difference]: Finished difference Result 1291 states and 1928 transitions. [2025-02-05 16:09:55,623 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-05 16:09:55,624 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.0) internal successors, (45), 5 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 56 [2025-02-05 16:09:55,624 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:55,630 INFO L225 Difference]: With dead ends: 1291 [2025-02-05 16:09:55,630 INFO L226 Difference]: Without dead ends: 706 [2025-02-05 16:09:55,632 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-02-05 16:09:55,633 INFO L435 NwaCegarLoop]: 227 mSDtfsCounter, 368 mSDsluCounter, 442 mSDsCounter, 0 mSdLazyCounter, 98 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 368 SdHoareTripleChecker+Valid, 669 SdHoareTripleChecker+Invalid, 112 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 98 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:55,634 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [368 Valid, 669 Invalid, 112 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 98 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-02-05 16:09:55,634 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 706 states. [2025-02-05 16:09:55,688 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 706 to 690. [2025-02-05 16:09:55,689 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 690 states, 528 states have (on average 1.456439393939394) internal successors, (769), 531 states have internal predecessors, (769), 124 states have call successors, (124), 37 states have call predecessors, (124), 37 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-02-05 16:09:55,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 690 states to 690 states and 1017 transitions. [2025-02-05 16:09:55,693 INFO L78 Accepts]: Start accepts. Automaton has 690 states and 1017 transitions. Word has length 56 [2025-02-05 16:09:55,693 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:55,693 INFO L471 AbstractCegarLoop]: Abstraction has 690 states and 1017 transitions. [2025-02-05 16:09:55,693 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 9.0) internal successors, (45), 5 states have internal predecessors, (45), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-02-05 16:09:55,693 INFO L276 IsEmpty]: Start isEmpty. Operand 690 states and 1017 transitions. [2025-02-05 16:09:55,694 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2025-02-05 16:09:55,694 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:55,694 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:55,695 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2025-02-05 16:09:55,695 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:55,695 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:55,695 INFO L85 PathProgramCache]: Analyzing trace with hash -1641890866, now seen corresponding path program 1 times [2025-02-05 16:09:55,695 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:55,695 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [261822734] [2025-02-05 16:09:55,695 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:55,696 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:55,706 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 57 statements into 1 equivalence classes. [2025-02-05 16:09:55,721 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 57 of 57 statements. [2025-02-05 16:09:55,721 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:55,721 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:55,797 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-05 16:09:55,797 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:55,797 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [261822734] [2025-02-05 16:09:55,797 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [261822734] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:55,797 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:55,797 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-05 16:09:55,797 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [721064963] [2025-02-05 16:09:55,797 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:55,798 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-05 16:09:55,798 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:55,798 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-05 16:09:55,798 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-02-05 16:09:55,798 INFO L87 Difference]: Start difference. First operand 690 states and 1017 transitions. Second operand has 5 states, 5 states have (on average 9.2) internal successors, (46), 5 states have internal predecessors, (46), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-02-05 16:09:55,933 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:55,934 INFO L93 Difference]: Finished difference Result 1295 states and 1928 transitions. [2025-02-05 16:09:55,934 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-05 16:09:55,934 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 9.2) internal successors, (46), 5 states have internal predecessors, (46), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 57 [2025-02-05 16:09:55,935 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:55,938 INFO L225 Difference]: With dead ends: 1295 [2025-02-05 16:09:55,938 INFO L226 Difference]: Without dead ends: 710 [2025-02-05 16:09:55,939 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-02-05 16:09:55,940 INFO L435 NwaCegarLoop]: 227 mSDtfsCounter, 368 mSDsluCounter, 442 mSDsCounter, 0 mSdLazyCounter, 98 mSolverCounterSat, 14 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 368 SdHoareTripleChecker+Valid, 669 SdHoareTripleChecker+Invalid, 112 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 14 IncrementalHoareTripleChecker+Valid, 98 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:55,940 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [368 Valid, 669 Invalid, 112 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [14 Valid, 98 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-02-05 16:09:55,941 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 710 states. [2025-02-05 16:09:55,968 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 710 to 698. [2025-02-05 16:09:55,969 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 698 states, 536 states have (on average 1.4496268656716418) internal successors, (777), 539 states have internal predecessors, (777), 124 states have call successors, (124), 37 states have call predecessors, (124), 37 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-02-05 16:09:55,973 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 698 states to 698 states and 1025 transitions. [2025-02-05 16:09:55,973 INFO L78 Accepts]: Start accepts. Automaton has 698 states and 1025 transitions. Word has length 57 [2025-02-05 16:09:55,974 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:55,974 INFO L471 AbstractCegarLoop]: Abstraction has 698 states and 1025 transitions. [2025-02-05 16:09:55,974 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 9.2) internal successors, (46), 5 states have internal predecessors, (46), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-02-05 16:09:55,974 INFO L276 IsEmpty]: Start isEmpty. Operand 698 states and 1025 transitions. [2025-02-05 16:09:55,975 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2025-02-05 16:09:55,975 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:55,975 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:55,975 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2025-02-05 16:09:55,975 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:55,976 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:55,976 INFO L85 PathProgramCache]: Analyzing trace with hash 1535958823, now seen corresponding path program 1 times [2025-02-05 16:09:55,976 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:55,976 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1948149356] [2025-02-05 16:09:55,976 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:55,976 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:55,986 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 59 statements into 1 equivalence classes. [2025-02-05 16:09:56,009 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 59 of 59 statements. [2025-02-05 16:09:56,009 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:56,009 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:56,087 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-05 16:09:56,088 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:56,088 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1948149356] [2025-02-05 16:09:56,088 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1948149356] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:56,088 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:56,088 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-05 16:09:56,088 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1490590167] [2025-02-05 16:09:56,088 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:56,088 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-05 16:09:56,088 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:56,088 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-05 16:09:56,089 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-05 16:09:56,089 INFO L87 Difference]: Start difference. First operand 698 states and 1025 transitions. Second operand has 4 states, 4 states have (on average 12.0) internal successors, (48), 4 states have internal predecessors, (48), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-02-05 16:09:56,216 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:56,216 INFO L93 Difference]: Finished difference Result 1283 states and 1908 transitions. [2025-02-05 16:09:56,217 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-05 16:09:56,217 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 12.0) internal successors, (48), 4 states have internal predecessors, (48), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) Word has length 59 [2025-02-05 16:09:56,217 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:56,220 INFO L225 Difference]: With dead ends: 1283 [2025-02-05 16:09:56,221 INFO L226 Difference]: Without dead ends: 698 [2025-02-05 16:09:56,222 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-02-05 16:09:56,223 INFO L435 NwaCegarLoop]: 228 mSDtfsCounter, 61 mSDsluCounter, 435 mSDsCounter, 0 mSdLazyCounter, 104 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 61 SdHoareTripleChecker+Valid, 663 SdHoareTripleChecker+Invalid, 106 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 104 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:56,223 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [61 Valid, 663 Invalid, 106 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 104 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-02-05 16:09:56,223 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 698 states. [2025-02-05 16:09:56,249 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 698 to 698. [2025-02-05 16:09:56,250 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 698 states, 536 states have (on average 1.4421641791044777) internal successors, (773), 539 states have internal predecessors, (773), 124 states have call successors, (124), 37 states have call predecessors, (124), 37 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-02-05 16:09:56,253 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 698 states to 698 states and 1021 transitions. [2025-02-05 16:09:56,254 INFO L78 Accepts]: Start accepts. Automaton has 698 states and 1021 transitions. Word has length 59 [2025-02-05 16:09:56,255 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:56,255 INFO L471 AbstractCegarLoop]: Abstraction has 698 states and 1021 transitions. [2025-02-05 16:09:56,255 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 12.0) internal successors, (48), 4 states have internal predecessors, (48), 3 states have call successors, (5), 2 states have call predecessors, (5), 1 states have return successors, (3), 3 states have call predecessors, (3), 3 states have call successors, (3) [2025-02-05 16:09:56,255 INFO L276 IsEmpty]: Start isEmpty. Operand 698 states and 1021 transitions. [2025-02-05 16:09:56,256 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2025-02-05 16:09:56,256 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:56,256 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:56,256 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2025-02-05 16:09:56,256 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:56,256 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:56,257 INFO L85 PathProgramCache]: Analyzing trace with hash 1973899900, now seen corresponding path program 1 times [2025-02-05 16:09:56,257 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:56,257 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [139607494] [2025-02-05 16:09:56,257 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:56,257 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:56,266 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 60 statements into 1 equivalence classes. [2025-02-05 16:09:56,279 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 60 of 60 statements. [2025-02-05 16:09:56,279 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:56,279 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:56,403 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-05 16:09:56,403 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:56,403 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [139607494] [2025-02-05 16:09:56,403 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [139607494] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:56,403 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:56,403 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-05 16:09:56,404 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2109312446] [2025-02-05 16:09:56,404 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:56,404 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-05 16:09:56,404 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:56,405 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-05 16:09:56,405 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-05 16:09:56,405 INFO L87 Difference]: Start difference. First operand 698 states and 1021 transitions. Second operand has 4 states, 4 states have (on average 12.25) internal successors, (49), 3 states have internal predecessors, (49), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2025-02-05 16:09:56,458 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:56,458 INFO L93 Difference]: Finished difference Result 1303 states and 1932 transitions. [2025-02-05 16:09:56,459 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-05 16:09:56,459 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 12.25) internal successors, (49), 3 states have internal predecessors, (49), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) Word has length 60 [2025-02-05 16:09:56,459 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:56,465 INFO L225 Difference]: With dead ends: 1303 [2025-02-05 16:09:56,465 INFO L226 Difference]: Without dead ends: 718 [2025-02-05 16:09:56,467 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-02-05 16:09:56,469 INFO L435 NwaCegarLoop]: 257 mSDtfsCounter, 4 mSDsluCounter, 510 mSDsCounter, 0 mSdLazyCounter, 15 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 767 SdHoareTripleChecker+Invalid, 16 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 15 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:56,469 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 767 Invalid, 16 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 15 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 16:09:56,470 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 718 states. [2025-02-05 16:09:56,501 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 718 to 718. [2025-02-05 16:09:56,502 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 718 states, 552 states have (on average 1.4293478260869565) internal successors, (789), 555 states have internal predecessors, (789), 124 states have call successors, (124), 41 states have call predecessors, (124), 41 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-02-05 16:09:56,506 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 718 states to 718 states and 1037 transitions. [2025-02-05 16:09:56,507 INFO L78 Accepts]: Start accepts. Automaton has 718 states and 1037 transitions. Word has length 60 [2025-02-05 16:09:56,508 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:56,508 INFO L471 AbstractCegarLoop]: Abstraction has 718 states and 1037 transitions. [2025-02-05 16:09:56,508 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 12.25) internal successors, (49), 3 states have internal predecessors, (49), 2 states have call successors, (5), 3 states have call predecessors, (5), 1 states have return successors, (3), 1 states have call predecessors, (3), 1 states have call successors, (3) [2025-02-05 16:09:56,508 INFO L276 IsEmpty]: Start isEmpty. Operand 718 states and 1037 transitions. [2025-02-05 16:09:56,509 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2025-02-05 16:09:56,509 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:56,509 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:56,509 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2025-02-05 16:09:56,509 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:56,510 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:56,510 INFO L85 PathProgramCache]: Analyzing trace with hash 935868254, now seen corresponding path program 1 times [2025-02-05 16:09:56,510 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:56,510 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [551252189] [2025-02-05 16:09:56,510 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:56,510 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:56,521 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 68 statements into 1 equivalence classes. [2025-02-05 16:09:56,536 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 68 of 68 statements. [2025-02-05 16:09:56,537 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:56,537 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:56,674 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-05 16:09:56,674 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:56,674 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [551252189] [2025-02-05 16:09:56,674 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [551252189] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:56,674 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:56,674 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-05 16:09:56,674 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1554270888] [2025-02-05 16:09:56,674 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:56,674 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-05 16:09:56,674 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:56,675 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-05 16:09:56,675 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-05 16:09:56,675 INFO L87 Difference]: Start difference. First operand 718 states and 1037 transitions. Second operand has 4 states, 4 states have (on average 13.75) internal successors, (55), 3 states have internal predecessors, (55), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2025-02-05 16:09:56,734 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:56,734 INFO L93 Difference]: Finished difference Result 1343 states and 1976 transitions. [2025-02-05 16:09:56,735 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-05 16:09:56,735 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 13.75) internal successors, (55), 3 states have internal predecessors, (55), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) Word has length 68 [2025-02-05 16:09:56,735 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:56,739 INFO L225 Difference]: With dead ends: 1343 [2025-02-05 16:09:56,739 INFO L226 Difference]: Without dead ends: 738 [2025-02-05 16:09:56,740 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-02-05 16:09:56,741 INFO L435 NwaCegarLoop]: 254 mSDtfsCounter, 4 mSDsluCounter, 499 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 753 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:56,741 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 753 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 26 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 16:09:56,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 738 states. [2025-02-05 16:09:56,770 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 738 to 738. [2025-02-05 16:09:56,771 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 738 states, 568 states have (on average 1.4172535211267605) internal successors, (805), 571 states have internal predecessors, (805), 124 states have call successors, (124), 45 states have call predecessors, (124), 45 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-02-05 16:09:56,774 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 738 states to 738 states and 1053 transitions. [2025-02-05 16:09:56,775 INFO L78 Accepts]: Start accepts. Automaton has 738 states and 1053 transitions. Word has length 68 [2025-02-05 16:09:56,775 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:56,775 INFO L471 AbstractCegarLoop]: Abstraction has 738 states and 1053 transitions. [2025-02-05 16:09:56,775 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 13.75) internal successors, (55), 3 states have internal predecessors, (55), 2 states have call successors, (6), 3 states have call predecessors, (6), 1 states have return successors, (4), 1 states have call predecessors, (4), 1 states have call successors, (4) [2025-02-05 16:09:56,775 INFO L276 IsEmpty]: Start isEmpty. Operand 738 states and 1053 transitions. [2025-02-05 16:09:56,776 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2025-02-05 16:09:56,776 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:56,776 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:56,776 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2025-02-05 16:09:56,777 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:56,777 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:56,777 INFO L85 PathProgramCache]: Analyzing trace with hash 902024324, now seen corresponding path program 1 times [2025-02-05 16:09:56,777 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:56,777 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [892737458] [2025-02-05 16:09:56,777 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:56,777 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:56,787 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 76 statements into 1 equivalence classes. [2025-02-05 16:09:56,797 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 76 of 76 statements. [2025-02-05 16:09:56,797 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:56,797 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:56,907 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-05 16:09:56,908 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:56,908 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [892737458] [2025-02-05 16:09:56,908 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [892737458] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:56,908 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:56,908 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-05 16:09:56,908 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1420268059] [2025-02-05 16:09:56,908 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:56,908 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-05 16:09:56,908 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:56,908 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-05 16:09:56,908 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-05 16:09:56,909 INFO L87 Difference]: Start difference. First operand 738 states and 1053 transitions. Second operand has 4 states, 4 states have (on average 15.25) internal successors, (61), 3 states have internal predecessors, (61), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2025-02-05 16:09:56,964 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:56,964 INFO L93 Difference]: Finished difference Result 1379 states and 1992 transitions. [2025-02-05 16:09:56,964 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-05 16:09:56,964 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 15.25) internal successors, (61), 3 states have internal predecessors, (61), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 76 [2025-02-05 16:09:56,964 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:56,968 INFO L225 Difference]: With dead ends: 1379 [2025-02-05 16:09:56,968 INFO L226 Difference]: Without dead ends: 754 [2025-02-05 16:09:56,970 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-02-05 16:09:56,971 INFO L435 NwaCegarLoop]: 259 mSDtfsCounter, 3 mSDsluCounter, 504 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 763 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:56,971 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 763 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 21 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 16:09:56,972 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 754 states. [2025-02-05 16:09:57,000 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 754 to 754. [2025-02-05 16:09:57,001 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 754 states, 580 states have (on average 1.4086206896551725) internal successors, (817), 583 states have internal predecessors, (817), 124 states have call successors, (124), 49 states have call predecessors, (124), 49 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-02-05 16:09:57,004 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 754 states to 754 states and 1065 transitions. [2025-02-05 16:09:57,006 INFO L78 Accepts]: Start accepts. Automaton has 754 states and 1065 transitions. Word has length 76 [2025-02-05 16:09:57,006 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:57,006 INFO L471 AbstractCegarLoop]: Abstraction has 754 states and 1065 transitions. [2025-02-05 16:09:57,006 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 15.25) internal successors, (61), 3 states have internal predecessors, (61), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2025-02-05 16:09:57,006 INFO L276 IsEmpty]: Start isEmpty. Operand 754 states and 1065 transitions. [2025-02-05 16:09:57,007 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 77 [2025-02-05 16:09:57,007 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:57,007 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:57,007 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2025-02-05 16:09:57,008 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:57,008 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:57,008 INFO L85 PathProgramCache]: Analyzing trace with hash 270096061, now seen corresponding path program 1 times [2025-02-05 16:09:57,008 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:57,008 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1190622341] [2025-02-05 16:09:57,008 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:57,008 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:57,018 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 76 statements into 1 equivalence classes. [2025-02-05 16:09:57,030 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 76 of 76 statements. [2025-02-05 16:09:57,030 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:57,030 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:57,154 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2025-02-05 16:09:57,154 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:57,154 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1190622341] [2025-02-05 16:09:57,154 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1190622341] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:57,154 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:57,154 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-05 16:09:57,154 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [977625463] [2025-02-05 16:09:57,155 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:57,155 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-05 16:09:57,155 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:57,155 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-05 16:09:57,155 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-05 16:09:57,155 INFO L87 Difference]: Start difference. First operand 754 states and 1065 transitions. Second operand has 4 states, 4 states have (on average 15.25) internal successors, (61), 3 states have internal predecessors, (61), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2025-02-05 16:09:57,235 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:57,235 INFO L93 Difference]: Finished difference Result 1415 states and 2032 transitions. [2025-02-05 16:09:57,235 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-05 16:09:57,235 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 15.25) internal successors, (61), 3 states have internal predecessors, (61), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) Word has length 76 [2025-02-05 16:09:57,236 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:57,240 INFO L225 Difference]: With dead ends: 1415 [2025-02-05 16:09:57,240 INFO L226 Difference]: Without dead ends: 774 [2025-02-05 16:09:57,242 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-02-05 16:09:57,243 INFO L435 NwaCegarLoop]: 254 mSDtfsCounter, 4 mSDsluCounter, 499 mSDsCounter, 0 mSdLazyCounter, 26 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 4 SdHoareTripleChecker+Valid, 753 SdHoareTripleChecker+Invalid, 30 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 26 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:57,243 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [4 Valid, 753 Invalid, 30 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 26 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 16:09:57,244 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 774 states. [2025-02-05 16:09:57,281 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 774 to 774. [2025-02-05 16:09:57,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 774 states, 596 states have (on average 1.3976510067114094) internal successors, (833), 599 states have internal predecessors, (833), 124 states have call successors, (124), 53 states have call predecessors, (124), 53 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-02-05 16:09:57,286 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 774 states to 774 states and 1081 transitions. [2025-02-05 16:09:57,288 INFO L78 Accepts]: Start accepts. Automaton has 774 states and 1081 transitions. Word has length 76 [2025-02-05 16:09:57,288 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:57,288 INFO L471 AbstractCegarLoop]: Abstraction has 774 states and 1081 transitions. [2025-02-05 16:09:57,288 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 15.25) internal successors, (61), 3 states have internal predecessors, (61), 2 states have call successors, (7), 3 states have call predecessors, (7), 1 states have return successors, (5), 1 states have call predecessors, (5), 1 states have call successors, (5) [2025-02-05 16:09:57,288 INFO L276 IsEmpty]: Start isEmpty. Operand 774 states and 1081 transitions. [2025-02-05 16:09:57,290 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2025-02-05 16:09:57,290 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:57,290 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:57,290 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2025-02-05 16:09:57,290 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:57,291 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:57,291 INFO L85 PathProgramCache]: Analyzing trace with hash 1662429307, now seen corresponding path program 1 times [2025-02-05 16:09:57,291 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:57,291 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [847921976] [2025-02-05 16:09:57,291 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:57,291 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:57,304 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 84 statements into 1 equivalence classes. [2025-02-05 16:09:57,328 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 84 of 84 statements. [2025-02-05 16:09:57,328 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:57,328 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:57,479 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2025-02-05 16:09:57,479 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:57,479 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [847921976] [2025-02-05 16:09:57,479 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [847921976] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:57,479 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:57,479 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-05 16:09:57,479 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1231609267] [2025-02-05 16:09:57,479 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:57,480 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-05 16:09:57,480 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:57,480 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-05 16:09:57,480 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-05 16:09:57,480 INFO L87 Difference]: Start difference. First operand 774 states and 1081 transitions. Second operand has 4 states, 4 states have (on average 15.75) internal successors, (63), 3 states have internal predecessors, (63), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2025-02-05 16:09:57,543 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:57,543 INFO L93 Difference]: Finished difference Result 1459 states and 2060 transitions. [2025-02-05 16:09:57,543 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-05 16:09:57,544 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 15.75) internal successors, (63), 3 states have internal predecessors, (63), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) Word has length 84 [2025-02-05 16:09:57,544 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:57,548 INFO L225 Difference]: With dead ends: 1459 [2025-02-05 16:09:57,548 INFO L226 Difference]: Without dead ends: 798 [2025-02-05 16:09:57,550 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-02-05 16:09:57,550 INFO L435 NwaCegarLoop]: 258 mSDtfsCounter, 5 mSDsluCounter, 507 mSDsCounter, 0 mSdLazyCounter, 20 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 5 SdHoareTripleChecker+Valid, 765 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 20 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:57,550 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [5 Valid, 765 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 20 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 16:09:57,551 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 798 states. [2025-02-05 16:09:57,601 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 798 to 798. [2025-02-05 16:09:57,602 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 798 states, 616 states have (on average 1.3847402597402598) internal successors, (853), 619 states have internal predecessors, (853), 124 states have call successors, (124), 57 states have call predecessors, (124), 57 states have return successors, (124), 121 states have call predecessors, (124), 124 states have call successors, (124) [2025-02-05 16:09:57,605 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 798 states to 798 states and 1101 transitions. [2025-02-05 16:09:57,607 INFO L78 Accepts]: Start accepts. Automaton has 798 states and 1101 transitions. Word has length 84 [2025-02-05 16:09:57,607 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:57,607 INFO L471 AbstractCegarLoop]: Abstraction has 798 states and 1101 transitions. [2025-02-05 16:09:57,607 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 15.75) internal successors, (63), 3 states have internal predecessors, (63), 2 states have call successors, (8), 3 states have call predecessors, (8), 1 states have return successors, (6), 1 states have call predecessors, (6), 1 states have call successors, (6) [2025-02-05 16:09:57,607 INFO L276 IsEmpty]: Start isEmpty. Operand 798 states and 1101 transitions. [2025-02-05 16:09:57,608 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2025-02-05 16:09:57,608 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:57,608 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:57,608 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2025-02-05 16:09:57,608 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:57,609 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:57,609 INFO L85 PathProgramCache]: Analyzing trace with hash -1494106824, now seen corresponding path program 1 times [2025-02-05 16:09:57,609 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:57,609 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1794704508] [2025-02-05 16:09:57,609 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:57,609 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:57,619 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 87 statements into 1 equivalence classes. [2025-02-05 16:09:57,676 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 87 of 87 statements. [2025-02-05 16:09:57,676 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:57,676 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:58,032 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2025-02-05 16:09:58,032 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:58,032 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1794704508] [2025-02-05 16:09:58,032 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1794704508] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:58,032 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:58,032 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-02-05 16:09:58,032 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1675397943] [2025-02-05 16:09:58,033 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:58,033 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-02-05 16:09:58,033 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:58,033 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-05 16:09:58,033 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-02-05 16:09:58,033 INFO L87 Difference]: Start difference. First operand 798 states and 1101 transitions. Second operand has 7 states, 7 states have (on average 9.428571428571429) internal successors, (66), 6 states have internal predecessors, (66), 3 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 4 states have call predecessors, (7), 3 states have call successors, (7) [2025-02-05 16:09:58,274 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:58,277 INFO L93 Difference]: Finished difference Result 2053 states and 2823 transitions. [2025-02-05 16:09:58,277 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-02-05 16:09:58,277 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 9.428571428571429) internal successors, (66), 6 states have internal predecessors, (66), 3 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 4 states have call predecessors, (7), 3 states have call successors, (7) Word has length 87 [2025-02-05 16:09:58,277 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:58,284 INFO L225 Difference]: With dead ends: 2053 [2025-02-05 16:09:58,287 INFO L226 Difference]: Without dead ends: 1368 [2025-02-05 16:09:58,290 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2025-02-05 16:09:58,290 INFO L435 NwaCegarLoop]: 263 mSDtfsCounter, 196 mSDsluCounter, 1213 mSDsCounter, 0 mSdLazyCounter, 102 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 200 SdHoareTripleChecker+Valid, 1476 SdHoareTripleChecker+Invalid, 105 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 102 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:58,290 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [200 Valid, 1476 Invalid, 105 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 102 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-02-05 16:09:58,292 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1368 states. [2025-02-05 16:09:58,346 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1368 to 1082. [2025-02-05 16:09:58,347 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1082 states, 827 states have (on average 1.3724304715840387) internal successors, (1135), 832 states have internal predecessors, (1135), 172 states have call successors, (172), 82 states have call predecessors, (172), 82 states have return successors, (172), 167 states have call predecessors, (172), 172 states have call successors, (172) [2025-02-05 16:09:58,351 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1082 states to 1082 states and 1479 transitions. [2025-02-05 16:09:58,353 INFO L78 Accepts]: Start accepts. Automaton has 1082 states and 1479 transitions. Word has length 87 [2025-02-05 16:09:58,353 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:58,354 INFO L471 AbstractCegarLoop]: Abstraction has 1082 states and 1479 transitions. [2025-02-05 16:09:58,354 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 9.428571428571429) internal successors, (66), 6 states have internal predecessors, (66), 3 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 4 states have call predecessors, (7), 3 states have call successors, (7) [2025-02-05 16:09:58,354 INFO L276 IsEmpty]: Start isEmpty. Operand 1082 states and 1479 transitions. [2025-02-05 16:09:58,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2025-02-05 16:09:58,355 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:58,355 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:58,355 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2025-02-05 16:09:58,355 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:58,356 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:58,356 INFO L85 PathProgramCache]: Analyzing trace with hash -2086659143, now seen corresponding path program 1 times [2025-02-05 16:09:58,356 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:58,356 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [753456427] [2025-02-05 16:09:58,356 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:58,356 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:58,366 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 91 statements into 1 equivalence classes. [2025-02-05 16:09:58,376 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 91 of 91 statements. [2025-02-05 16:09:58,376 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:58,377 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:58,473 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2025-02-05 16:09:58,474 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:58,474 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [753456427] [2025-02-05 16:09:58,474 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [753456427] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:58,474 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:58,474 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-05 16:09:58,474 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1801289196] [2025-02-05 16:09:58,474 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:58,474 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-05 16:09:58,475 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:58,475 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-05 16:09:58,475 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-05 16:09:58,475 INFO L87 Difference]: Start difference. First operand 1082 states and 1479 transitions. Second operand has 4 states, 4 states have (on average 17.5) internal successors, (70), 3 states have internal predecessors, (70), 2 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2025-02-05 16:09:58,541 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:58,541 INFO L93 Difference]: Finished difference Result 2007 states and 2768 transitions. [2025-02-05 16:09:58,541 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-05 16:09:58,542 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 17.5) internal successors, (70), 3 states have internal predecessors, (70), 2 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) Word has length 91 [2025-02-05 16:09:58,542 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:58,547 INFO L225 Difference]: With dead ends: 2007 [2025-02-05 16:09:58,547 INFO L226 Difference]: Without dead ends: 1106 [2025-02-05 16:09:58,549 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-02-05 16:09:58,549 INFO L435 NwaCegarLoop]: 259 mSDtfsCounter, 3 mSDsluCounter, 504 mSDsCounter, 0 mSdLazyCounter, 21 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 763 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 21 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:58,549 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 763 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 21 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 16:09:58,550 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1106 states. [2025-02-05 16:09:58,593 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1106 to 1106. [2025-02-05 16:09:58,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1106 states, 845 states have (on average 1.3644970414201183) internal successors, (1153), 850 states have internal predecessors, (1153), 172 states have call successors, (172), 88 states have call predecessors, (172), 88 states have return successors, (172), 167 states have call predecessors, (172), 172 states have call successors, (172) [2025-02-05 16:09:58,598 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1106 states to 1106 states and 1497 transitions. [2025-02-05 16:09:58,599 INFO L78 Accepts]: Start accepts. Automaton has 1106 states and 1497 transitions. Word has length 91 [2025-02-05 16:09:58,600 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:58,600 INFO L471 AbstractCegarLoop]: Abstraction has 1106 states and 1497 transitions. [2025-02-05 16:09:58,600 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 17.5) internal successors, (70), 3 states have internal predecessors, (70), 2 states have call successors, (9), 3 states have call predecessors, (9), 1 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2025-02-05 16:09:58,600 INFO L276 IsEmpty]: Start isEmpty. Operand 1106 states and 1497 transitions. [2025-02-05 16:09:58,601 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2025-02-05 16:09:58,601 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:58,601 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:58,601 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2025-02-05 16:09:58,601 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:58,601 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:58,602 INFO L85 PathProgramCache]: Analyzing trace with hash 1461892803, now seen corresponding path program 1 times [2025-02-05 16:09:58,602 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:58,602 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2011789062] [2025-02-05 16:09:58,602 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:58,602 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:58,612 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 90 statements into 1 equivalence classes. [2025-02-05 16:09:58,620 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 90 of 90 statements. [2025-02-05 16:09:58,621 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:58,621 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:58,879 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2025-02-05 16:09:58,879 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:58,879 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2011789062] [2025-02-05 16:09:58,879 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2011789062] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-05 16:09:58,879 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1440403296] [2025-02-05 16:09:58,879 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:58,879 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 16:09:58,879 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-05 16:09:58,886 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-05 16:09:58,887 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2025-02-05 16:09:58,976 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 90 statements into 1 equivalence classes. [2025-02-05 16:09:59,030 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 90 of 90 statements. [2025-02-05 16:09:59,030 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:59,030 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:59,033 INFO L256 TraceCheckSpWp]: Trace formula consists of 477 conjuncts, 13 conjuncts are in the unsatisfiable core [2025-02-05 16:09:59,038 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-05 16:09:59,136 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2025-02-05 16:09:59,136 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-02-05 16:09:59,136 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1440403296] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:59,136 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-02-05 16:09:59,136 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [10] total 15 [2025-02-05 16:09:59,136 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [253681552] [2025-02-05 16:09:59,136 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:59,137 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2025-02-05 16:09:59,137 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:59,137 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-02-05 16:09:59,137 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=180, Unknown=0, NotChecked=0, Total=210 [2025-02-05 16:09:59,137 INFO L87 Difference]: Start difference. First operand 1106 states and 1497 transitions. Second operand has 8 states, 7 states have (on average 9.428571428571429) internal successors, (66), 7 states have internal predecessors, (66), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2025-02-05 16:09:59,348 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:59,348 INFO L93 Difference]: Finished difference Result 2371 states and 3335 transitions. [2025-02-05 16:09:59,349 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-02-05 16:09:59,349 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 7 states have (on average 9.428571428571429) internal successors, (66), 7 states have internal predecessors, (66), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) Word has length 90 [2025-02-05 16:09:59,349 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:59,356 INFO L225 Difference]: With dead ends: 2371 [2025-02-05 16:09:59,356 INFO L226 Difference]: Without dead ends: 1534 [2025-02-05 16:09:59,358 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 103 GetRequests, 87 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=261, Unknown=0, NotChecked=0, Total=306 [2025-02-05 16:09:59,359 INFO L435 NwaCegarLoop]: 438 mSDtfsCounter, 139 mSDsluCounter, 2428 mSDsCounter, 0 mSdLazyCounter, 124 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 165 SdHoareTripleChecker+Valid, 2866 SdHoareTripleChecker+Invalid, 126 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 124 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:59,359 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [165 Valid, 2866 Invalid, 126 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 124 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-02-05 16:09:59,360 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1534 states. [2025-02-05 16:09:59,416 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1534 to 1114. [2025-02-05 16:09:59,418 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1114 states, 849 states have (on average 1.3557126030624265) internal successors, (1151), 856 states have internal predecessors, (1151), 174 states have call successors, (174), 90 states have call predecessors, (174), 90 states have return successors, (174), 167 states have call predecessors, (174), 174 states have call successors, (174) [2025-02-05 16:09:59,421 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1114 states to 1114 states and 1499 transitions. [2025-02-05 16:09:59,423 INFO L78 Accepts]: Start accepts. Automaton has 1114 states and 1499 transitions. Word has length 90 [2025-02-05 16:09:59,423 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:59,423 INFO L471 AbstractCegarLoop]: Abstraction has 1114 states and 1499 transitions. [2025-02-05 16:09:59,423 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 7 states have (on average 9.428571428571429) internal successors, (66), 7 states have internal predecessors, (66), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 1 states have call predecessors, (7), 1 states have call successors, (7) [2025-02-05 16:09:59,424 INFO L276 IsEmpty]: Start isEmpty. Operand 1114 states and 1499 transitions. [2025-02-05 16:09:59,424 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2025-02-05 16:09:59,424 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:59,424 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:59,432 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2025-02-05 16:09:59,625 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable15 [2025-02-05 16:09:59,626 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:59,626 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:59,626 INFO L85 PathProgramCache]: Analyzing trace with hash -358349411, now seen corresponding path program 1 times [2025-02-05 16:09:59,626 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:59,626 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [721885561] [2025-02-05 16:09:59,627 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:59,627 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:59,643 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 93 statements into 1 equivalence classes. [2025-02-05 16:09:59,662 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 93 of 93 statements. [2025-02-05 16:09:59,662 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:59,662 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:59,779 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2025-02-05 16:09:59,779 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:59,779 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [721885561] [2025-02-05 16:09:59,779 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [721885561] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:59,779 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:59,779 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-02-05 16:09:59,779 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [28770923] [2025-02-05 16:09:59,780 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:59,780 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-02-05 16:09:59,780 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:59,780 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-05 16:09:59,780 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-02-05 16:09:59,781 INFO L87 Difference]: Start difference. First operand 1114 states and 1499 transitions. Second operand has 7 states, 7 states have (on average 9.857142857142858) internal successors, (69), 6 states have internal predecessors, (69), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) [2025-02-05 16:09:59,939 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:59,939 INFO L93 Difference]: Finished difference Result 2010 states and 2716 transitions. [2025-02-05 16:09:59,939 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-02-05 16:09:59,940 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 9.857142857142858) internal successors, (69), 6 states have internal predecessors, (69), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) Word has length 93 [2025-02-05 16:09:59,940 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:59,946 INFO L225 Difference]: With dead ends: 2010 [2025-02-05 16:09:59,946 INFO L226 Difference]: Without dead ends: 1159 [2025-02-05 16:09:59,948 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2025-02-05 16:09:59,948 INFO L435 NwaCegarLoop]: 259 mSDtfsCounter, 255 mSDsluCounter, 1226 mSDsCounter, 0 mSdLazyCounter, 75 mSolverCounterSat, 15 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 256 SdHoareTripleChecker+Valid, 1485 SdHoareTripleChecker+Invalid, 90 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 15 IncrementalHoareTripleChecker+Valid, 75 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:59,948 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [256 Valid, 1485 Invalid, 90 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [15 Valid, 75 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-02-05 16:09:59,949 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1159 states. [2025-02-05 16:09:59,997 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1159 to 1117. [2025-02-05 16:09:59,999 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1117 states, 863 states have (on average 1.3487833140208574) internal successors, (1164), 875 states have internal predecessors, (1164), 162 states have call successors, (162), 91 states have call predecessors, (162), 91 states have return successors, (162), 150 states have call predecessors, (162), 162 states have call successors, (162) [2025-02-05 16:10:00,002 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1117 states to 1117 states and 1488 transitions. [2025-02-05 16:10:00,005 INFO L78 Accepts]: Start accepts. Automaton has 1117 states and 1488 transitions. Word has length 93 [2025-02-05 16:10:00,005 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:10:00,005 INFO L471 AbstractCegarLoop]: Abstraction has 1117 states and 1488 transitions. [2025-02-05 16:10:00,005 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 9.857142857142858) internal successors, (69), 6 states have internal predecessors, (69), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) [2025-02-05 16:10:00,006 INFO L276 IsEmpty]: Start isEmpty. Operand 1117 states and 1488 transitions. [2025-02-05 16:10:00,006 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2025-02-05 16:10:00,007 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:10:00,007 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:10:00,007 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2025-02-05 16:10:00,007 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:10:00,007 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:10:00,007 INFO L85 PathProgramCache]: Analyzing trace with hash 2024609089, now seen corresponding path program 1 times [2025-02-05 16:10:00,008 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:10:00,008 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [167139396] [2025-02-05 16:10:00,008 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:10:00,008 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:10:00,018 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 95 statements into 1 equivalence classes. [2025-02-05 16:10:00,053 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 95 of 95 statements. [2025-02-05 16:10:00,053 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:10:00,053 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:10:00,410 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2025-02-05 16:10:00,411 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:10:00,412 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [167139396] [2025-02-05 16:10:00,412 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [167139396] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:10:00,412 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:10:00,412 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-02-05 16:10:00,412 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [605342689] [2025-02-05 16:10:00,412 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:10:00,412 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-02-05 16:10:00,412 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:10:00,413 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-05 16:10:00,413 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2025-02-05 16:10:00,413 INFO L87 Difference]: Start difference. First operand 1117 states and 1488 transitions. Second operand has 7 states, 7 states have (on average 9.714285714285714) internal successors, (68), 6 states have internal predecessors, (68), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2025-02-05 16:10:00,593 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:10:00,593 INFO L93 Difference]: Finished difference Result 1989 states and 2661 transitions. [2025-02-05 16:10:00,593 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-02-05 16:10:00,594 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 9.714285714285714) internal successors, (68), 6 states have internal predecessors, (68), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) Word has length 95 [2025-02-05 16:10:00,594 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:10:00,599 INFO L225 Difference]: With dead ends: 1989 [2025-02-05 16:10:00,599 INFO L226 Difference]: Without dead ends: 1115 [2025-02-05 16:10:00,601 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=83, Unknown=0, NotChecked=0, Total=110 [2025-02-05 16:10:00,601 INFO L435 NwaCegarLoop]: 288 mSDtfsCounter, 150 mSDsluCounter, 1313 mSDsCounter, 0 mSdLazyCounter, 78 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 152 SdHoareTripleChecker+Valid, 1601 SdHoareTripleChecker+Invalid, 80 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 78 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-02-05 16:10:00,601 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [152 Valid, 1601 Invalid, 80 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 78 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-02-05 16:10:00,602 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1115 states. [2025-02-05 16:10:00,643 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1115 to 1008. [2025-02-05 16:10:00,644 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1008 states, 781 states have (on average 1.3508322663252241) internal successors, (1055), 791 states have internal predecessors, (1055), 145 states have call successors, (145), 81 states have call predecessors, (145), 81 states have return successors, (145), 135 states have call predecessors, (145), 145 states have call successors, (145) [2025-02-05 16:10:00,647 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1008 states to 1008 states and 1345 transitions. [2025-02-05 16:10:00,648 INFO L78 Accepts]: Start accepts. Automaton has 1008 states and 1345 transitions. Word has length 95 [2025-02-05 16:10:00,649 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:10:00,649 INFO L471 AbstractCegarLoop]: Abstraction has 1008 states and 1345 transitions. [2025-02-05 16:10:00,649 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 9.714285714285714) internal successors, (68), 6 states have internal predecessors, (68), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2025-02-05 16:10:00,649 INFO L276 IsEmpty]: Start isEmpty. Operand 1008 states and 1345 transitions. [2025-02-05 16:10:00,649 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2025-02-05 16:10:00,649 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:10:00,649 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:10:00,649 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2025-02-05 16:10:00,650 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:10:00,650 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:10:00,650 INFO L85 PathProgramCache]: Analyzing trace with hash -1702479980, now seen corresponding path program 1 times [2025-02-05 16:10:00,650 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:10:00,650 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1949729931] [2025-02-05 16:10:00,650 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:10:00,650 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:10:00,659 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 96 statements into 1 equivalence classes. [2025-02-05 16:10:00,674 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 96 of 96 statements. [2025-02-05 16:10:00,674 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:10:00,674 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:10:01,098 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2025-02-05 16:10:01,098 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:10:01,098 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1949729931] [2025-02-05 16:10:01,098 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1949729931] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:10:01,098 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:10:01,098 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-02-05 16:10:01,098 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [738696752] [2025-02-05 16:10:01,098 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:10:01,099 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-02-05 16:10:01,099 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:10:01,099 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-05 16:10:01,099 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2025-02-05 16:10:01,099 INFO L87 Difference]: Start difference. First operand 1008 states and 1345 transitions. Second operand has 7 states, 7 states have (on average 10.428571428571429) internal successors, (73), 6 states have internal predecessors, (73), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2025-02-05 16:10:01,447 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:10:01,447 INFO L93 Difference]: Finished difference Result 1920 states and 2548 transitions. [2025-02-05 16:10:01,448 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-02-05 16:10:01,448 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 10.428571428571429) internal successors, (73), 6 states have internal predecessors, (73), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) Word has length 96 [2025-02-05 16:10:01,448 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:10:01,454 INFO L225 Difference]: With dead ends: 1920 [2025-02-05 16:10:01,454 INFO L226 Difference]: Without dead ends: 1075 [2025-02-05 16:10:01,455 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2025-02-05 16:10:01,456 INFO L435 NwaCegarLoop]: 281 mSDtfsCounter, 409 mSDsluCounter, 981 mSDsCounter, 0 mSdLazyCounter, 179 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 415 SdHoareTripleChecker+Valid, 1262 SdHoareTripleChecker+Invalid, 181 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 179 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-02-05 16:10:01,456 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [415 Valid, 1262 Invalid, 181 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 179 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-02-05 16:10:01,457 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1075 states. [2025-02-05 16:10:01,550 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1075 to 1024. [2025-02-05 16:10:01,552 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1024 states, 789 states have (on average 1.3282636248415716) internal successors, (1048), 800 states have internal predecessors, (1048), 148 states have call successors, (148), 86 states have call predecessors, (148), 86 states have return successors, (148), 137 states have call predecessors, (148), 148 states have call successors, (148) [2025-02-05 16:10:01,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1024 states to 1024 states and 1344 transitions. [2025-02-05 16:10:01,557 INFO L78 Accepts]: Start accepts. Automaton has 1024 states and 1344 transitions. Word has length 96 [2025-02-05 16:10:01,557 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:10:01,557 INFO L471 AbstractCegarLoop]: Abstraction has 1024 states and 1344 transitions. [2025-02-05 16:10:01,557 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 10.428571428571429) internal successors, (73), 6 states have internal predecessors, (73), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 3 states have call successors, (8) [2025-02-05 16:10:01,557 INFO L276 IsEmpty]: Start isEmpty. Operand 1024 states and 1344 transitions. [2025-02-05 16:10:01,558 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2025-02-05 16:10:01,558 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:10:01,558 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:10:01,558 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2025-02-05 16:10:01,558 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:10:01,559 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:10:01,559 INFO L85 PathProgramCache]: Analyzing trace with hash 1511004449, now seen corresponding path program 1 times [2025-02-05 16:10:01,559 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:10:01,559 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [882753473] [2025-02-05 16:10:01,559 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:10:01,559 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:10:01,571 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 97 statements into 1 equivalence classes. [2025-02-05 16:10:01,582 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 97 of 97 statements. [2025-02-05 16:10:01,582 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:10:01,582 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:10:01,645 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2025-02-05 16:10:01,645 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:10:01,645 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [882753473] [2025-02-05 16:10:01,645 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [882753473] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:10:01,645 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:10:01,645 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-05 16:10:01,646 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1486121950] [2025-02-05 16:10:01,646 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:10:01,646 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-05 16:10:01,646 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:10:01,647 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-05 16:10:01,647 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-05 16:10:01,647 INFO L87 Difference]: Start difference. First operand 1024 states and 1344 transitions. Second operand has 4 states, 4 states have (on average 18.25) internal successors, (73), 4 states have internal predecessors, (73), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2025-02-05 16:10:01,802 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:10:01,803 INFO L93 Difference]: Finished difference Result 2693 states and 3558 transitions. [2025-02-05 16:10:01,803 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-05 16:10:01,803 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 18.25) internal successors, (73), 4 states have internal predecessors, (73), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 97 [2025-02-05 16:10:01,803 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:10:01,812 INFO L225 Difference]: With dead ends: 2693 [2025-02-05 16:10:01,813 INFO L226 Difference]: Without dead ends: 1883 [2025-02-05 16:10:01,815 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-02-05 16:10:01,816 INFO L435 NwaCegarLoop]: 468 mSDtfsCounter, 201 mSDsluCounter, 699 mSDsCounter, 0 mSdLazyCounter, 35 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 201 SdHoareTripleChecker+Valid, 1167 SdHoareTripleChecker+Invalid, 42 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 35 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 16:10:01,816 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [201 Valid, 1167 Invalid, 42 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 35 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 16:10:01,820 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1883 states. [2025-02-05 16:10:01,978 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1883 to 1768. [2025-02-05 16:10:01,982 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1768 states, 1343 states have (on average 1.3209233060312733) internal successors, (1774), 1362 states have internal predecessors, (1774), 272 states have call successors, (272), 152 states have call predecessors, (272), 152 states have return successors, (272), 253 states have call predecessors, (272), 272 states have call successors, (272) [2025-02-05 16:10:01,987 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1768 states to 1768 states and 2318 transitions. [2025-02-05 16:10:01,989 INFO L78 Accepts]: Start accepts. Automaton has 1768 states and 2318 transitions. Word has length 97 [2025-02-05 16:10:01,989 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:10:01,989 INFO L471 AbstractCegarLoop]: Abstraction has 1768 states and 2318 transitions. [2025-02-05 16:10:01,990 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 18.25) internal successors, (73), 4 states have internal predecessors, (73), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2025-02-05 16:10:01,990 INFO L276 IsEmpty]: Start isEmpty. Operand 1768 states and 2318 transitions. [2025-02-05 16:10:01,991 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2025-02-05 16:10:01,991 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:10:01,991 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:10:01,991 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2025-02-05 16:10:01,991 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:10:01,992 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:10:01,992 INFO L85 PathProgramCache]: Analyzing trace with hash 22023108, now seen corresponding path program 1 times [2025-02-05 16:10:01,992 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:10:01,992 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [832743182] [2025-02-05 16:10:01,992 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:10:01,992 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:10:02,005 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 99 statements into 1 equivalence classes. [2025-02-05 16:10:02,013 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 99 of 99 statements. [2025-02-05 16:10:02,015 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:10:02,015 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:10:02,068 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2025-02-05 16:10:02,068 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:10:02,068 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [832743182] [2025-02-05 16:10:02,068 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [832743182] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:10:02,068 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:10:02,068 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-05 16:10:02,068 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [773150473] [2025-02-05 16:10:02,068 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:10:02,070 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-05 16:10:02,070 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:10:02,070 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-05 16:10:02,070 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-05 16:10:02,070 INFO L87 Difference]: Start difference. First operand 1768 states and 2318 transitions. Second operand has 4 states, 4 states have (on average 18.75) internal successors, (75), 4 states have internal predecessors, (75), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2025-02-05 16:10:02,261 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:10:02,261 INFO L93 Difference]: Finished difference Result 4093 states and 5395 transitions. [2025-02-05 16:10:02,261 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-05 16:10:02,262 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 18.75) internal successors, (75), 4 states have internal predecessors, (75), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 99 [2025-02-05 16:10:02,262 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:10:02,273 INFO L225 Difference]: With dead ends: 4093 [2025-02-05 16:10:02,273 INFO L226 Difference]: Without dead ends: 2626 [2025-02-05 16:10:02,277 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-02-05 16:10:02,278 INFO L435 NwaCegarLoop]: 486 mSDtfsCounter, 202 mSDsluCounter, 715 mSDsCounter, 0 mSdLazyCounter, 40 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 202 SdHoareTripleChecker+Valid, 1201 SdHoareTripleChecker+Invalid, 46 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 40 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 16:10:02,278 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [202 Valid, 1201 Invalid, 46 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 40 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 16:10:02,280 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2626 states. [2025-02-05 16:10:02,442 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2626 to 2509. [2025-02-05 16:10:02,446 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2509 states, 1894 states have (on average 1.3152059134107708) internal successors, (2491), 1921 states have internal predecessors, (2491), 396 states have call successors, (396), 218 states have call predecessors, (396), 218 states have return successors, (396), 369 states have call predecessors, (396), 396 states have call successors, (396) [2025-02-05 16:10:02,454 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2509 states to 2509 states and 3283 transitions. [2025-02-05 16:10:02,456 INFO L78 Accepts]: Start accepts. Automaton has 2509 states and 3283 transitions. Word has length 99 [2025-02-05 16:10:02,456 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:10:02,457 INFO L471 AbstractCegarLoop]: Abstraction has 2509 states and 3283 transitions. [2025-02-05 16:10:02,457 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 18.75) internal successors, (75), 4 states have internal predecessors, (75), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2025-02-05 16:10:02,457 INFO L276 IsEmpty]: Start isEmpty. Operand 2509 states and 3283 transitions. [2025-02-05 16:10:02,458 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2025-02-05 16:10:02,458 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:10:02,458 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:10:02,458 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2025-02-05 16:10:02,459 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:10:02,459 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:10:02,459 INFO L85 PathProgramCache]: Analyzing trace with hash -1122604506, now seen corresponding path program 1 times [2025-02-05 16:10:02,459 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:10:02,459 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [985870901] [2025-02-05 16:10:02,459 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:10:02,459 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:10:02,469 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 99 statements into 1 equivalence classes. [2025-02-05 16:10:02,495 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 99 of 99 statements. [2025-02-05 16:10:02,495 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:10:02,495 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:10:02,862 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2025-02-05 16:10:02,862 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:10:02,862 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [985870901] [2025-02-05 16:10:02,862 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [985870901] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:10:02,862 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:10:02,863 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2025-02-05 16:10:02,863 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1663390726] [2025-02-05 16:10:02,863 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:10:02,863 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 7 states [2025-02-05 16:10:02,863 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:10:02,864 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2025-02-05 16:10:02,864 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2025-02-05 16:10:02,864 INFO L87 Difference]: Start difference. First operand 2509 states and 3283 transitions. Second operand has 7 states, 7 states have (on average 10.857142857142858) internal successors, (76), 6 states have internal predecessors, (76), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 3 states have call predecessors, (8), 2 states have call successors, (8) [2025-02-05 16:10:03,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:10:03,291 INFO L93 Difference]: Finished difference Result 4878 states and 6386 transitions. [2025-02-05 16:10:03,292 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-02-05 16:10:03,292 INFO L78 Accepts]: Start accepts. Automaton has has 7 states, 7 states have (on average 10.857142857142858) internal successors, (76), 6 states have internal predecessors, (76), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 3 states have call predecessors, (8), 2 states have call successors, (8) Word has length 99 [2025-02-05 16:10:03,292 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:10:03,305 INFO L225 Difference]: With dead ends: 4878 [2025-02-05 16:10:03,305 INFO L226 Difference]: Without dead ends: 2765 [2025-02-05 16:10:03,310 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2025-02-05 16:10:03,313 INFO L435 NwaCegarLoop]: 321 mSDtfsCounter, 419 mSDsluCounter, 1151 mSDsCounter, 0 mSdLazyCounter, 181 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 425 SdHoareTripleChecker+Valid, 1472 SdHoareTripleChecker+Invalid, 183 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 181 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.2s IncrementalHoareTripleChecker+Time [2025-02-05 16:10:03,314 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [425 Valid, 1472 Invalid, 183 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 181 Invalid, 0 Unknown, 0 Unchecked, 0.2s Time] [2025-02-05 16:10:03,317 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2765 states. [2025-02-05 16:10:03,560 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2765 to 2516. [2025-02-05 16:10:03,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2516 states, 1890 states have (on average 1.3137566137566137) internal successors, (2483), 1918 states have internal predecessors, (2483), 403 states have call successors, (403), 222 states have call predecessors, (403), 222 states have return successors, (403), 375 states have call predecessors, (403), 403 states have call successors, (403) [2025-02-05 16:10:03,579 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2516 states to 2516 states and 3289 transitions. [2025-02-05 16:10:03,583 INFO L78 Accepts]: Start accepts. Automaton has 2516 states and 3289 transitions. Word has length 99 [2025-02-05 16:10:03,583 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:10:03,583 INFO L471 AbstractCegarLoop]: Abstraction has 2516 states and 3289 transitions. [2025-02-05 16:10:03,583 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 7 states, 7 states have (on average 10.857142857142858) internal successors, (76), 6 states have internal predecessors, (76), 3 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 3 states have call predecessors, (8), 2 states have call successors, (8) [2025-02-05 16:10:03,583 INFO L276 IsEmpty]: Start isEmpty. Operand 2516 states and 3289 transitions. [2025-02-05 16:10:03,586 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 102 [2025-02-05 16:10:03,586 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:10:03,586 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:10:03,586 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2025-02-05 16:10:03,586 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting assertErr0ASSERT_VIOLATIONERROR_FUNCTION === [assertErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:10:03,587 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:10:03,587 INFO L85 PathProgramCache]: Analyzing trace with hash -1200684505, now seen corresponding path program 1 times [2025-02-05 16:10:03,587 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:10:03,587 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2062088572] [2025-02-05 16:10:03,587 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:10:03,587 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:10:03,603 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 101 statements into 1 equivalence classes. [2025-02-05 16:10:03,652 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 101 of 101 statements. [2025-02-05 16:10:03,652 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:10:03,652 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-05 16:10:03,652 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-05 16:10:03,659 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 101 statements into 1 equivalence classes. [2025-02-05 16:10:03,740 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 101 of 101 statements. [2025-02-05 16:10:03,741 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:10:03,741 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-05 16:10:03,788 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-05 16:10:03,788 INFO L340 BasicCegarLoop]: Counterexample is feasible [2025-02-05 16:10:03,788 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location assertErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2025-02-05 16:10:03,790 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2025-02-05 16:10:03,792 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:10:03,914 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2025-02-05 16:10:03,917 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 05.02 04:10:03 BoogieIcfgContainer [2025-02-05 16:10:03,917 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2025-02-05 16:10:03,918 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-02-05 16:10:03,919 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-02-05 16:10:03,919 INFO L274 PluginConnector]: Witness Printer initialized [2025-02-05 16:10:03,920 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 05.02 04:09:53" (3/4) ... [2025-02-05 16:10:03,920 INFO L140 WitnessPrinter]: Generating witness for reachability counterexample [2025-02-05 16:10:04,054 INFO L127 tionWitnessGenerator]: Generated YAML witness of length 82. [2025-02-05 16:10:04,134 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/witness.graphml [2025-02-05 16:10:04,135 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/witness.yml [2025-02-05 16:10:04,135 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-02-05 16:10:04,135 INFO L158 Benchmark]: Toolchain (without parser) took 11491.12ms. Allocated memory was 167.8MB in the beginning and 755.0MB in the end (delta: 587.2MB). Free memory was 129.4MB in the beginning and 481.5MB in the end (delta: -352.1MB). Peak memory consumption was 235.1MB. Max. memory is 16.1GB. [2025-02-05 16:10:04,135 INFO L158 Benchmark]: CDTParser took 0.18ms. Allocated memory is still 201.3MB. Free memory is still 125.1MB. There was no memory consumed. Max. memory is 16.1GB. [2025-02-05 16:10:04,135 INFO L158 Benchmark]: CACSL2BoogieTranslator took 306.04ms. Allocated memory is still 167.8MB. Free memory was 129.4MB in the beginning and 111.4MB in the end (delta: 18.0MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-02-05 16:10:04,135 INFO L158 Benchmark]: Boogie Procedure Inliner took 48.34ms. Allocated memory is still 167.8MB. Free memory was 111.4MB in the beginning and 108.0MB in the end (delta: 3.4MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-02-05 16:10:04,136 INFO L158 Benchmark]: Boogie Preprocessor took 55.93ms. Allocated memory is still 167.8MB. Free memory was 108.0MB in the beginning and 104.3MB in the end (delta: 3.7MB). There was no memory consumed. Max. memory is 16.1GB. [2025-02-05 16:10:04,136 INFO L158 Benchmark]: IcfgBuilder took 684.74ms. Allocated memory is still 167.8MB. Free memory was 104.3MB in the beginning and 63.2MB in the end (delta: 41.1MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. [2025-02-05 16:10:04,136 INFO L158 Benchmark]: TraceAbstraction took 10174.15ms. Allocated memory was 167.8MB in the beginning and 755.0MB in the end (delta: 587.2MB). Free memory was 62.4MB in the beginning and 510.8MB in the end (delta: -448.5MB). Peak memory consumption was 134.5MB. Max. memory is 16.1GB. [2025-02-05 16:10:04,136 INFO L158 Benchmark]: Witness Printer took 216.56ms. Allocated memory is still 755.0MB. Free memory was 510.8MB in the beginning and 481.5MB in the end (delta: 29.4MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. [2025-02-05 16:10:04,141 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18ms. Allocated memory is still 201.3MB. Free memory is still 125.1MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 306.04ms. Allocated memory is still 167.8MB. Free memory was 129.4MB in the beginning and 111.4MB in the end (delta: 18.0MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 48.34ms. Allocated memory is still 167.8MB. Free memory was 111.4MB in the beginning and 108.0MB in the end (delta: 3.4MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Preprocessor took 55.93ms. Allocated memory is still 167.8MB. Free memory was 108.0MB in the beginning and 104.3MB in the end (delta: 3.7MB). There was no memory consumed. Max. memory is 16.1GB. * IcfgBuilder took 684.74ms. Allocated memory is still 167.8MB. Free memory was 104.3MB in the beginning and 63.2MB in the end (delta: 41.1MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. * TraceAbstraction took 10174.15ms. Allocated memory was 167.8MB in the beginning and 755.0MB in the end (delta: 587.2MB). Free memory was 62.4MB in the beginning and 510.8MB in the end (delta: -448.5MB). Peak memory consumption was 134.5MB. Max. memory is 16.1GB. * Witness Printer took 216.56ms. Allocated memory is still 755.0MB. Free memory was 510.8MB in the beginning and 481.5MB in the end (delta: 29.4MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 618]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L24] msg_t nomsg = (msg_t )-1; [L25] port_t cs1 ; [L26] int8_t cs1_old ; [L27] int8_t cs1_new ; [L28] port_t cs2 ; [L29] int8_t cs2_old ; [L30] int8_t cs2_new ; [L31] port_t s1s2 ; [L32] int8_t s1s2_old ; [L33] int8_t s1s2_new ; [L34] port_t s1s1 ; [L35] int8_t s1s1_old ; [L36] int8_t s1s1_new ; [L37] port_t s2s1 ; [L38] int8_t s2s1_old ; [L39] int8_t s2s1_new ; [L40] port_t s2s2 ; [L41] int8_t s2s2_old ; [L42] int8_t s2s2_new ; [L43] port_t s1p ; [L44] int8_t s1p_old ; [L45] int8_t s1p_new ; [L46] port_t s2p ; [L47] int8_t s2p_old ; [L48] int8_t s2p_new ; [L51] _Bool side1Failed ; [L52] _Bool side2Failed ; [L53] msg_t side1_written ; [L54] msg_t side2_written ; [L60] static _Bool side1Failed_History_0 ; [L61] static _Bool side1Failed_History_1 ; [L62] static _Bool side1Failed_History_2 ; [L63] static _Bool side2Failed_History_0 ; [L64] static _Bool side2Failed_History_1 ; [L65] static _Bool side2Failed_History_2 ; [L66] static int8_t active_side_History_0 ; [L67] static int8_t active_side_History_1 ; [L68] static int8_t active_side_History_2 ; [L69] static msg_t manual_selection_History_0 ; [L70] static msg_t manual_selection_History_1 ; [L71] static msg_t manual_selection_History_2 ; VAL [active_side_History_0=0, active_side_History_1=0, active_side_History_2=0, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L542] int c1 ; [L543] int i2 ; [L546] c1 = 0 [L547] side1Failed = __VERIFIER_nondet_bool() [L548] side2Failed = __VERIFIER_nondet_bool() [L549] side1_written = __VERIFIER_nondet_char() [L550] side2_written = __VERIFIER_nondet_char() [L551] side1Failed_History_0 = __VERIFIER_nondet_bool() [L552] side1Failed_History_1 = __VERIFIER_nondet_bool() [L553] side1Failed_History_2 = __VERIFIER_nondet_bool() [L554] side2Failed_History_0 = __VERIFIER_nondet_bool() [L555] side2Failed_History_1 = __VERIFIER_nondet_bool() [L556] side2Failed_History_2 = __VERIFIER_nondet_bool() [L557] active_side_History_0 = __VERIFIER_nondet_char() [L558] active_side_History_1 = __VERIFIER_nondet_char() [L559] active_side_History_2 = __VERIFIER_nondet_char() [L560] manual_selection_History_0 = __VERIFIER_nondet_char() [L561] manual_selection_History_1 = __VERIFIER_nondet_char() [L562] manual_selection_History_2 = __VERIFIER_nondet_char() [L563] CALL, EXPR init() [L197] COND FALSE !((int )side1Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L200] COND FALSE !((int )side2Failed_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L203] COND FALSE !((int )active_side_History_0 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L206] COND FALSE !((int )manual_selection_History_0 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L209] COND FALSE !((int )side1Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L212] COND FALSE !((int )side2Failed_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L215] COND FALSE !((int )active_side_History_1 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L218] COND FALSE !((int )manual_selection_History_1 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L221] COND FALSE !((int )side1Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L224] COND FALSE !((int )side2Failed_History_2 != 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L227] COND FALSE !((int )active_side_History_2 != -2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L230] COND FALSE !((int )manual_selection_History_2 != 0) [L233] return (1); VAL [\result=1, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L563] RET, EXPR init() [L563] i2 = init() [L564] CALL assume_abort_if_not(i2) VAL [\old(cond)=1, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L58] COND FALSE !(!cond) VAL [\old(cond)=1, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L564] RET assume_abort_if_not(i2) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=0, cs1_old=0, cs2=0, cs2_new=0, cs2_old=0, i2=1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=0, s1p_old=0, s1s1=0, s1s1_new=0, s1s1_old=0, s1s2=0, s1s2_new=0, s1s2_old=0, s2p=0, s2p_new=0, s2p_old=0, s2s1=0, s2s1_new=0, s2s1_old=0, s2s2=0, s2s2_new=0, s2s2_old=0, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L565] cs1_old = nomsg [L566] cs1_new = nomsg [L567] cs2_old = nomsg [L568] cs2_new = nomsg [L569] s1s2_old = nomsg [L570] s1s2_new = nomsg [L571] s1s1_old = nomsg [L572] s1s1_new = nomsg [L573] s2s1_old = nomsg [L574] s2s1_new = nomsg [L575] s2s2_old = nomsg [L576] s2s2_new = nomsg [L577] s1p_old = nomsg [L578] s1p_new = nomsg [L579] s2p_old = nomsg [L580] s2p_new = nomsg [L581] i2 = 0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, i2=1, manual_selection_History_0=0, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L582] COND TRUE 1 [L584] CALL Console_task_each_pals_period() [L251] msg_t manual_selection ; [L252] char tmp ; [L255] tmp = __VERIFIER_nondet_char() [L256] manual_selection = tmp [L257] CALL write_manual_selection_history(manual_selection) [L167] manual_selection_History_2 = manual_selection_History_1 [L168] manual_selection_History_1 = manual_selection_History_0 [L169] manual_selection_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=-1, cs2=0, cs2_new=-1, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L257] RET write_manual_selection_history(manual_selection) [L258] cs1_new = manual_selection != nomsg && cs1_new == nomsg ? manual_selection : cs1_new [L259] cs2_new = manual_selection != nomsg && cs2_new == nomsg ? manual_selection : cs2_new [L260] manual_selection = (msg_t )0 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=1, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L584] RET Console_task_each_pals_period() [L585] CALL Side1_activestandby_task_each_pals_period() [L266] int8_t side1 ; [L267] int8_t side2 ; [L268] msg_t manual_selection ; [L269] int8_t next_state ; [L272] side1 = nomsg [L273] side2 = nomsg [L274] manual_selection = (msg_t )0 [L275] side1Failed = __VERIFIER_nondet_bool() [L276] CALL write_side1_failed_history(side1Failed) [L77] side1Failed_History_2 = side1Failed_History_1 [L78] side1Failed_History_1 = side1Failed_History_0 [L79] side1Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L276] RET write_side1_failed_history(side1Failed) [L277] COND FALSE !(\read(side1Failed)) [L284] side1 = s1s1_old [L285] s1s1_old = nomsg [L286] side2 = s2s1_old [L287] s2s1_old = nomsg [L288] manual_selection = cs1_old [L289] cs1_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L290] COND TRUE (int )side1 == (int )side2 [L291] next_state = (int8_t )1 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, next_state=1, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=-1, s1s1=0, s1s1_new=-1, s1s1_old=-1, s1s2=0, s1s2_new=-1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=0, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L314] s1s1_new = next_state != nomsg && s1s1_new == nomsg ? next_state : s1s1_new [L315] s1s2_new = next_state != nomsg && s1s2_new == nomsg ? next_state : s1s2_new [L316] s1p_new = next_state != nomsg && s1p_new == nomsg ? next_state : s1p_new [L317] side1_written = next_state VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L585] RET Side1_activestandby_task_each_pals_period() [L586] CALL Side2_activestandby_task_each_pals_period() [L323] int8_t side1 ; [L324] int8_t side2 ; [L325] msg_t manual_selection ; [L326] int8_t next_state ; [L329] side1 = nomsg [L330] side2 = nomsg [L331] manual_selection = (msg_t )0 [L332] side2Failed = __VERIFIER_nondet_bool() [L333] CALL write_side2_failed_history(side2Failed) [L107] side2Failed_History_2 = side2Failed_History_1 [L108] side2Failed_History_1 = side2Failed_History_0 [L109] side2Failed_History_0 = val VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L333] RET write_side2_failed_history(side2Failed) [L334] COND FALSE !(\read(side2Failed)) [L341] side1 = s1s2_old [L342] s1s2_old = nomsg [L343] side2 = s2s2_old [L344] s2s2_old = nomsg [L345] manual_selection = cs2_old [L346] cs2_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L347] COND TRUE (int )side1 == (int )side2 [L348] next_state = (int8_t )1 VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, next_state=1, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=-1, s2p_old=-1, s2s1=0, s2s1_new=-1, s2s1_old=-1, s2s2=0, s2s2_new=-1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=0] [L371] s2s1_new = next_state != nomsg && s2s1_new == nomsg ? next_state : s2s1_new [L372] s2s2_new = next_state != nomsg && s2s2_new == nomsg ? next_state : s2s2_new [L373] s2p_new = next_state != nomsg && s2p_new == nomsg ? next_state : s2p_new [L374] side2_written = next_state VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L586] RET Side2_activestandby_task_each_pals_period() [L587] CALL Pendulum_prism_task_each_pals_period() [L380] int8_t active_side ; [L381] int8_t tmp ; [L382] int8_t side1 ; [L383] int8_t side2 ; VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L386] CALL, EXPR read_active_side_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L148] COND TRUE (int )index == 0 [L149] return (active_side_History_0); VAL [\old(index)=0, \result=-2, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L386] RET, EXPR read_active_side_history((unsigned char)0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L386] tmp = read_active_side_history((unsigned char)0) [L387] active_side = tmp [L388] side1 = nomsg [L389] side2 = nomsg [L390] side1 = s1p_old [L391] s1p_old = nomsg [L392] side2 = s2p_old [L393] s2p_old = nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L394] COND FALSE !((int )side1 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L397] COND FALSE !((int )side2 == 1) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L400] COND FALSE !((int )side1 == 0) VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L408] COND TRUE (int )side1 == (int )nomsg VAL [active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2=-1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L409] COND FALSE !((int )side2 == 0) [L412] active_side = (int8_t )0 VAL [active_side=0, active_side_History_0=-2, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L417] CALL write_active_side_history(active_side) [L137] active_side_History_2 = active_side_History_1 [L138] active_side_History_1 = active_side_History_0 [L139] active_side_History_0 = val VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=127, cs1_old=-1, cs2=0, cs2_new=127, cs2_old=-1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=1, s1p_old=-1, s1s1=0, s1s1_new=1, s1s1_old=-1, s1s2=0, s1s2_new=1, s1s2_old=-1, s2p=0, s2p_new=1, s2p_old=-1, s2s1=0, s2s1_new=1, s2s1_old=-1, s2s2=0, s2s2_new=1, s2s2_old=-1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L417] RET write_active_side_history(active_side) [L587] RET Pendulum_prism_task_each_pals_period() [L588] cs1_old = cs1_new [L589] cs1_new = nomsg [L590] cs2_old = cs2_new [L591] cs2_new = nomsg [L592] s1s2_old = s1s2_new [L593] s1s2_new = nomsg [L594] s1s1_old = s1s1_new [L595] s1s1_new = nomsg [L596] s2s1_old = s2s1_new [L597] s2s1_new = nomsg [L598] s2s2_old = s2s2_new [L599] s2s2_new = nomsg [L600] s1p_old = s1p_new [L601] s1p_new = nomsg [L602] s2p_old = s2p_new [L603] s2p_new = nomsg [L604] CALL, EXPR check() [L423] int tmp ; [L424] msg_t tmp___0 ; [L425] _Bool tmp___1 ; [L426] _Bool tmp___2 ; [L427] _Bool tmp___3 ; [L428] _Bool tmp___4 ; [L429] int8_t tmp___5 ; [L430] _Bool tmp___6 ; [L431] _Bool tmp___7 ; [L432] _Bool tmp___8 ; [L433] int8_t tmp___9 ; [L434] _Bool tmp___10 ; [L435] _Bool tmp___11 ; [L436] _Bool tmp___12 ; [L437] msg_t tmp___13 ; [L438] _Bool tmp___14 ; [L439] _Bool tmp___15 ; [L440] _Bool tmp___16 ; [L441] _Bool tmp___17 ; [L442] int8_t tmp___18 ; [L443] int8_t tmp___19 ; [L444] int8_t tmp___20 ; VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L447] COND TRUE ! side1Failed [L448] tmp = 1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L455] CALL assume_abort_if_not((_Bool )tmp) VAL [\old(cond)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L58] COND FALSE !(!cond) VAL [\old(cond)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L455] RET assume_abort_if_not((_Bool )tmp) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L456] CALL, EXPR read_manual_selection_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L178] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, index=1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L181] COND TRUE (int )index == 1 [L182] return (manual_selection_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L456] RET, EXPR read_manual_selection_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L456] tmp___0 = read_manual_selection_history((unsigned char)1) [L457] COND TRUE ! tmp___0 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L458] CALL, EXPR read_side1_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L88] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, index=1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L91] COND TRUE (int )index == 1 [L92] return (side1Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L458] RET, EXPR read_side1_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L458] tmp___1 = read_side1_failed_history((unsigned char)1) [L459] COND TRUE ! tmp___1 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L460] CALL, EXPR read_side1_failed_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L88] COND TRUE (int )index == 0 [L89] return (side1Failed_History_0); VAL [\old(index)=0, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L460] RET, EXPR read_side1_failed_history((unsigned char)0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L460] tmp___2 = read_side1_failed_history((unsigned char)0) [L461] COND TRUE ! tmp___2 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L462] CALL, EXPR read_side2_failed_history((unsigned char)1) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L118] COND FALSE !((int )index == 0) VAL [\old(index)=1, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, index=1, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L121] COND TRUE (int )index == 1 [L122] return (side2Failed_History_1); VAL [\old(index)=1, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L462] RET, EXPR read_side2_failed_history((unsigned char)1) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L462] tmp___3 = read_side2_failed_history((unsigned char)1) [L463] COND TRUE ! tmp___3 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L464] CALL, EXPR read_side2_failed_history((unsigned char)0) VAL [\old(index)=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L118] COND TRUE (int )index == 0 [L119] return (side2Failed_History_0); VAL [\old(index)=0, \result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L464] RET, EXPR read_side2_failed_history((unsigned char)0) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L464] tmp___4 = read_side2_failed_history((unsigned char)0) [L465] COND TRUE ! tmp___4 VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L466] COND FALSE !(! ((int )side1_written == 1)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L471] COND FALSE !(! (! ((int )side1_written == 0))) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L476] COND TRUE ! (! ((int )side1_written == 1)) VAL [active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L477] COND TRUE ! ((int )side2_written == 0) [L478] return (0); VAL [\result=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1, tmp=1] [L604] RET, EXPR check() [L604] c1 = check() [L605] CALL assert(c1) VAL [\old(arg)=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L616] COND TRUE ! arg VAL [\old(arg)=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] [L618] reach_error() VAL [\old(arg)=0, active_side_History_0=0, active_side_History_1=-2, active_side_History_2=-2, cs1=0, cs1_new=-1, cs1_old=127, cs2=0, cs2_new=-1, cs2_old=127, manual_selection_History_0=127, manual_selection_History_1=0, manual_selection_History_2=0, nomsg=-1, s1p=0, s1p_new=-1, s1p_old=1, s1s1=0, s1s1_new=-1, s1s1_old=1, s1s2=0, s1s2_new=-1, s1s2_old=1, s2p=0, s2p_new=-1, s2p_old=1, s2s1=0, s2s1_new=-1, s2s1_old=1, s2s2=0, s2s2_new=-1, s2s2_old=1, side1Failed=0, side1Failed_History_0=0, side1Failed_History_1=0, side1Failed_History_2=0, side1_written=1, side2Failed=0, side2Failed_History_0=0, side2Failed_History_1=0, side2Failed_History_2=0, side2_written=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 8 procedures, 179 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 10.0s, OverallIterations: 23, TraceHistogramMax: 2, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.0s, AutomataDifference: 3.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 3265 SdHoareTripleChecker+Valid, 1.5s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 3220 mSDsluCounter, 22514 SdHoareTripleChecker+Invalid, 1.2s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 16128 mSDsCounter, 98 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 1308 IncrementalHoareTripleChecker+Invalid, 1406 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 98 mSolverCounterUnsat, 6386 mSDtfsCounter, 1308 mSolverCounterSat, 0.1s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 256 GetRequests, 149 SyntacticMatches, 0 SemanticMatches, 107 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 48 ImplicationChecksByTransitivity, 0.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=2516occurred in iteration=22, InterpolantAutomatonStates: 119, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 1.4s AutomataMinimizationTime, 22 MinimizatonAttempts, 1426 StatesRemovedByMinimization, 12 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.6s SatisfiabilityAnalysisTime, 3.7s InterpolantComputationTime, 1780 NumberOfCodeBlocks, 1780 NumberOfCodeBlocksAsserted, 24 NumberOfCheckSat, 1656 ConstructedInterpolants, 0 QuantifiedInterpolants, 3676 SizeOfPredicates, 1 NumberOfNonLiveVariables, 477 ConjunctsInSsa, 13 ConjunctsInUnsatCore, 23 InterpolantComputations, 22 PerfectInterpolantSequences, 169/172 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2025-02-05 16:10:04,164 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE