./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.02.cil-2.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version c00e63dc Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.02.cil-2.c -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash d9dd329404607c04c3b8409033c911abc5eb1af40daa0f8673d76c8f1e85e1ae --- Real Ultimate output --- This is Ultimate 0.3.0-?-c00e63d-m [2025-02-05 17:56:20,126 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-02-05 17:56:20,178 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2025-02-05 17:56:20,183 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-02-05 17:56:20,183 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-02-05 17:56:20,204 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-02-05 17:56:20,205 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-02-05 17:56:20,205 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-02-05 17:56:20,206 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-02-05 17:56:20,206 INFO L153 SettingsManager]: * Use memory slicer=true [2025-02-05 17:56:20,207 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2025-02-05 17:56:20,207 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2025-02-05 17:56:20,207 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-02-05 17:56:20,207 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-02-05 17:56:20,207 INFO L153 SettingsManager]: * Use SBE=true [2025-02-05 17:56:20,208 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-02-05 17:56:20,208 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2025-02-05 17:56:20,208 INFO L153 SettingsManager]: * sizeof long=4 [2025-02-05 17:56:20,208 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-02-05 17:56:20,208 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-02-05 17:56:20,208 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-02-05 17:56:20,208 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2025-02-05 17:56:20,208 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2025-02-05 17:56:20,208 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2025-02-05 17:56:20,209 INFO L153 SettingsManager]: * sizeof long double=12 [2025-02-05 17:56:20,209 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-02-05 17:56:20,209 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-02-05 17:56:20,209 INFO L153 SettingsManager]: * Use constant arrays=true [2025-02-05 17:56:20,209 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-02-05 17:56:20,209 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-02-05 17:56:20,209 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-02-05 17:56:20,209 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-02-05 17:56:20,209 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-02-05 17:56:20,210 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-02-05 17:56:20,210 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2025-02-05 17:56:20,210 INFO L153 SettingsManager]: * Compute procedure contracts=false [2025-02-05 17:56:20,210 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2025-02-05 17:56:20,210 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-02-05 17:56:20,210 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2025-02-05 17:56:20,210 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2025-02-05 17:56:20,210 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2025-02-05 17:56:20,210 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2025-02-05 17:56:20,210 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2025-02-05 17:56:20,210 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> d9dd329404607c04c3b8409033c911abc5eb1af40daa0f8673d76c8f1e85e1ae [2025-02-05 17:56:20,431 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-02-05 17:56:20,438 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-02-05 17:56:20,440 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-02-05 17:56:20,441 INFO L270 PluginConnector]: Initializing CDTParser... [2025-02-05 17:56:20,441 INFO L274 PluginConnector]: CDTParser initialized [2025-02-05 17:56:20,442 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.02.cil-2.c [2025-02-05 17:56:21,606 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/1ebf909b2/353e1f56c304417a921312b5d63f30cc/FLAG615fe31aa [2025-02-05 17:56:21,818 INFO L384 CDTParser]: Found 1 translation units. [2025-02-05 17:56:21,818 INFO L180 CDTParser]: Scanning /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.02.cil-2.c [2025-02-05 17:56:21,826 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/1ebf909b2/353e1f56c304417a921312b5d63f30cc/FLAG615fe31aa [2025-02-05 17:56:21,840 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/1ebf909b2/353e1f56c304417a921312b5d63f30cc [2025-02-05 17:56:21,842 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-02-05 17:56:21,843 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-02-05 17:56:21,845 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-02-05 17:56:21,845 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-02-05 17:56:21,848 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-02-05 17:56:21,849 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 05.02 05:56:21" (1/1) ... [2025-02-05 17:56:21,851 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@3abe45d8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 05:56:21, skipping insertion in model container [2025-02-05 17:56:21,851 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 05.02 05:56:21" (1/1) ... [2025-02-05 17:56:21,879 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-02-05 17:56:21,992 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.02.cil-2.c[911,924] [2025-02-05 17:56:22,052 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.02.cil-2.c[8416,8429] [2025-02-05 17:56:22,099 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-05 17:56:22,107 INFO L200 MainTranslator]: Completed pre-run [2025-02-05 17:56:22,116 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.02.cil-2.c[911,924] [2025-02-05 17:56:22,141 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/combinations/pc_sfifo_3.cil+token_ring.02.cil-2.c[8416,8429] [2025-02-05 17:56:22,160 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-05 17:56:22,175 INFO L204 MainTranslator]: Completed translation [2025-02-05 17:56:22,175 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 05:56:22 WrapperNode [2025-02-05 17:56:22,176 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-02-05 17:56:22,176 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-02-05 17:56:22,176 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-02-05 17:56:22,177 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-02-05 17:56:22,183 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 05:56:22" (1/1) ... [2025-02-05 17:56:22,190 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 05:56:22" (1/1) ... [2025-02-05 17:56:22,226 INFO L138 Inliner]: procedures = 59, calls = 68, calls flagged for inlining = 27, calls inlined = 27, statements flattened = 485 [2025-02-05 17:56:22,226 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-02-05 17:56:22,227 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-02-05 17:56:22,227 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-02-05 17:56:22,227 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-02-05 17:56:22,241 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 05:56:22" (1/1) ... [2025-02-05 17:56:22,242 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 05:56:22" (1/1) ... [2025-02-05 17:56:22,244 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 05:56:22" (1/1) ... [2025-02-05 17:56:22,261 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-02-05 17:56:22,261 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 05:56:22" (1/1) ... [2025-02-05 17:56:22,261 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 05:56:22" (1/1) ... [2025-02-05 17:56:22,267 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 05:56:22" (1/1) ... [2025-02-05 17:56:22,268 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 05:56:22" (1/1) ... [2025-02-05 17:56:22,270 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 05:56:22" (1/1) ... [2025-02-05 17:56:22,271 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 05:56:22" (1/1) ... [2025-02-05 17:56:22,275 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-02-05 17:56:22,276 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-02-05 17:56:22,278 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-02-05 17:56:22,278 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-02-05 17:56:22,279 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 05:56:22" (1/1) ... [2025-02-05 17:56:22,283 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-02-05 17:56:22,291 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-05 17:56:22,302 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2025-02-05 17:56:22,304 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2025-02-05 17:56:22,321 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-02-05 17:56:22,322 INFO L130 BoogieDeclarations]: Found specification of procedure immediate_notify [2025-02-05 17:56:22,322 INFO L138 BoogieDeclarations]: Found implementation of procedure immediate_notify [2025-02-05 17:56:22,322 INFO L130 BoogieDeclarations]: Found specification of procedure is_do_write_p_triggered [2025-02-05 17:56:22,322 INFO L138 BoogieDeclarations]: Found implementation of procedure is_do_write_p_triggered [2025-02-05 17:56:22,322 INFO L130 BoogieDeclarations]: Found specification of procedure exists_runnable_thread1 [2025-02-05 17:56:22,322 INFO L138 BoogieDeclarations]: Found implementation of procedure exists_runnable_thread1 [2025-02-05 17:56:22,322 INFO L130 BoogieDeclarations]: Found specification of procedure exists_runnable_thread2 [2025-02-05 17:56:22,322 INFO L138 BoogieDeclarations]: Found implementation of procedure exists_runnable_thread2 [2025-02-05 17:56:22,322 INFO L130 BoogieDeclarations]: Found specification of procedure reset_delta_events1 [2025-02-05 17:56:22,322 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_delta_events1 [2025-02-05 17:56:22,322 INFO L130 BoogieDeclarations]: Found specification of procedure reset_delta_events2 [2025-02-05 17:56:22,322 INFO L138 BoogieDeclarations]: Found implementation of procedure reset_delta_events2 [2025-02-05 17:56:22,322 INFO L130 BoogieDeclarations]: Found specification of procedure activate_threads2 [2025-02-05 17:56:22,322 INFO L138 BoogieDeclarations]: Found implementation of procedure activate_threads2 [2025-02-05 17:56:22,322 INFO L130 BoogieDeclarations]: Found specification of procedure activate_threads1 [2025-02-05 17:56:22,322 INFO L138 BoogieDeclarations]: Found implementation of procedure activate_threads1 [2025-02-05 17:56:22,322 INFO L130 BoogieDeclarations]: Found specification of procedure is_do_read_c_triggered [2025-02-05 17:56:22,322 INFO L138 BoogieDeclarations]: Found implementation of procedure is_do_read_c_triggered [2025-02-05 17:56:22,322 INFO L130 BoogieDeclarations]: Found specification of procedure update_channels1 [2025-02-05 17:56:22,322 INFO L138 BoogieDeclarations]: Found implementation of procedure update_channels1 [2025-02-05 17:56:22,322 INFO L130 BoogieDeclarations]: Found specification of procedure update_channels2 [2025-02-05 17:56:22,322 INFO L138 BoogieDeclarations]: Found implementation of procedure update_channels2 [2025-02-05 17:56:22,322 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-02-05 17:56:22,322 INFO L130 BoogieDeclarations]: Found specification of procedure fire_delta_events2 [2025-02-05 17:56:22,323 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_delta_events2 [2025-02-05 17:56:22,323 INFO L130 BoogieDeclarations]: Found specification of procedure fire_delta_events1 [2025-02-05 17:56:22,323 INFO L138 BoogieDeclarations]: Found implementation of procedure fire_delta_events1 [2025-02-05 17:56:22,323 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-02-05 17:56:22,323 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-02-05 17:56:22,323 INFO L130 BoogieDeclarations]: Found specification of procedure error1 [2025-02-05 17:56:22,323 INFO L138 BoogieDeclarations]: Found implementation of procedure error1 [2025-02-05 17:56:22,323 INFO L130 BoogieDeclarations]: Found specification of procedure error2 [2025-02-05 17:56:22,323 INFO L138 BoogieDeclarations]: Found implementation of procedure error2 [2025-02-05 17:56:22,391 INFO L257 CfgBuilder]: Building ICFG [2025-02-05 17:56:22,392 INFO L287 CfgBuilder]: Building CFG for each procedure with an implementation [2025-02-05 17:56:22,750 INFO L1309 $ProcedureCfgBuilder]: dead code at ProgramPoint L225: do_read_c_~a~0#1 := ~a_t~0; [2025-02-05 17:56:22,750 INFO L1309 $ProcedureCfgBuilder]: dead code at ProgramPoint L226: assume 1 == ~q_free~0;~c_dr_st~0 := 2;~c_dr_pc~0 := 2;~a_t~0 := do_read_c_~a~0#1; [2025-02-05 17:56:22,750 INFO L1309 $ProcedureCfgBuilder]: dead code at ProgramPoint L226: assume !(1 == ~q_free~0); [2025-02-05 17:56:22,808 INFO L? ?]: Removed 74 outVars from TransFormulas that were not future-live. [2025-02-05 17:56:22,809 INFO L308 CfgBuilder]: Performing block encoding [2025-02-05 17:56:22,822 INFO L332 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-02-05 17:56:22,822 INFO L337 CfgBuilder]: Removed 0 assume(true) statements. [2025-02-05 17:56:22,822 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 05.02 05:56:22 BoogieIcfgContainer [2025-02-05 17:56:22,822 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-02-05 17:56:22,824 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2025-02-05 17:56:22,824 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2025-02-05 17:56:22,827 INFO L274 PluginConnector]: TraceAbstraction initialized [2025-02-05 17:56:22,828 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 05.02 05:56:21" (1/3) ... [2025-02-05 17:56:22,828 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@473c74db and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 05.02 05:56:22, skipping insertion in model container [2025-02-05 17:56:22,828 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 05:56:22" (2/3) ... [2025-02-05 17:56:22,828 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@473c74db and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 05.02 05:56:22, skipping insertion in model container [2025-02-05 17:56:22,829 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 05.02 05:56:22" (3/3) ... [2025-02-05 17:56:22,829 INFO L128 eAbstractionObserver]: Analyzing ICFG pc_sfifo_3.cil+token_ring.02.cil-2.c [2025-02-05 17:56:22,839 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2025-02-05 17:56:22,841 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG pc_sfifo_3.cil+token_ring.02.cil-2.c that has 16 procedures, 265 locations, 1 initial locations, 9 loop locations, and 2 error locations. [2025-02-05 17:56:22,879 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2025-02-05 17:56:22,887 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@60faab3c, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-02-05 17:56:22,887 INFO L334 AbstractCegarLoop]: Starting to check reachability of 2 error locations. [2025-02-05 17:56:22,890 INFO L276 IsEmpty]: Start isEmpty. Operand has 266 states, 213 states have (on average 1.5023474178403755) internal successors, (320), 222 states have internal predecessors, (320), 34 states have call successors, (34), 15 states have call predecessors, (34), 15 states have return successors, (34), 32 states have call predecessors, (34), 34 states have call successors, (34) [2025-02-05 17:56:22,897 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2025-02-05 17:56:22,897 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:56:22,898 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:56:22,898 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting error1Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:56:22,901 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:56:22,902 INFO L85 PathProgramCache]: Analyzing trace with hash 1928334765, now seen corresponding path program 1 times [2025-02-05 17:56:22,907 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:56:22,907 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [311403499] [2025-02-05 17:56:22,907 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:56:22,908 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:56:22,977 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 65 statements into 1 equivalence classes. [2025-02-05 17:56:23,002 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 65 of 65 statements. [2025-02-05 17:56:23,003 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:56:23,003 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:56:23,260 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 17:56:23,261 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 17:56:23,261 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [311403499] [2025-02-05 17:56:23,262 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [311403499] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 17:56:23,262 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 17:56:23,262 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-05 17:56:23,264 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1545232075] [2025-02-05 17:56:23,264 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 17:56:23,268 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-05 17:56:23,268 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 17:56:23,282 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-05 17:56:23,284 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-02-05 17:56:23,288 INFO L87 Difference]: Start difference. First operand has 266 states, 213 states have (on average 1.5023474178403755) internal successors, (320), 222 states have internal predecessors, (320), 34 states have call successors, (34), 15 states have call predecessors, (34), 15 states have return successors, (34), 32 states have call predecessors, (34), 34 states have call successors, (34) Second operand has 5 states, 5 states have (on average 10.0) internal successors, (50), 5 states have internal predecessors, (50), 3 states have call successors, (8), 3 states have call predecessors, (8), 3 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) [2025-02-05 17:56:23,867 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 17:56:23,867 INFO L93 Difference]: Finished difference Result 635 states and 933 transitions. [2025-02-05 17:56:23,872 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-05 17:56:23,873 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 10.0) internal successors, (50), 5 states have internal predecessors, (50), 3 states have call successors, (8), 3 states have call predecessors, (8), 3 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) Word has length 65 [2025-02-05 17:56:23,873 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 17:56:23,888 INFO L225 Difference]: With dead ends: 635 [2025-02-05 17:56:23,888 INFO L226 Difference]: Without dead ends: 375 [2025-02-05 17:56:23,894 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 5 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2025-02-05 17:56:23,895 INFO L435 NwaCegarLoop]: 256 mSDtfsCounter, 323 mSDsluCounter, 622 mSDsCounter, 0 mSdLazyCounter, 494 mSolverCounterSat, 55 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 332 SdHoareTripleChecker+Valid, 878 SdHoareTripleChecker+Invalid, 549 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 55 IncrementalHoareTripleChecker+Valid, 494 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.5s IncrementalHoareTripleChecker+Time [2025-02-05 17:56:23,896 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [332 Valid, 878 Invalid, 549 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [55 Valid, 494 Invalid, 0 Unknown, 0 Unchecked, 0.5s Time] [2025-02-05 17:56:23,906 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 375 states. [2025-02-05 17:56:23,935 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 375 to 368. [2025-02-05 17:56:23,936 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 368 states, 297 states have (on average 1.4343434343434343) internal successors, (426), 304 states have internal predecessors, (426), 47 states have call successors, (47), 22 states have call predecessors, (47), 22 states have return successors, (48), 44 states have call predecessors, (48), 43 states have call successors, (48) [2025-02-05 17:56:23,940 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 368 states to 368 states and 521 transitions. [2025-02-05 17:56:23,943 INFO L78 Accepts]: Start accepts. Automaton has 368 states and 521 transitions. Word has length 65 [2025-02-05 17:56:23,943 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 17:56:23,944 INFO L471 AbstractCegarLoop]: Abstraction has 368 states and 521 transitions. [2025-02-05 17:56:23,944 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 10.0) internal successors, (50), 5 states have internal predecessors, (50), 3 states have call successors, (8), 3 states have call predecessors, (8), 3 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) [2025-02-05 17:56:23,944 INFO L276 IsEmpty]: Start isEmpty. Operand 368 states and 521 transitions. [2025-02-05 17:56:23,946 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2025-02-05 17:56:23,946 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:56:23,946 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:56:23,948 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2025-02-05 17:56:23,949 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting error1Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:56:23,949 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:56:23,949 INFO L85 PathProgramCache]: Analyzing trace with hash 620295437, now seen corresponding path program 1 times [2025-02-05 17:56:23,950 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:56:23,950 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [374502035] [2025-02-05 17:56:23,950 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:56:23,950 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:56:23,990 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 65 statements into 1 equivalence classes. [2025-02-05 17:56:23,998 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 65 of 65 statements. [2025-02-05 17:56:23,999 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:56:23,999 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:56:24,144 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 17:56:24,145 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 17:56:24,145 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [374502035] [2025-02-05 17:56:24,145 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [374502035] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 17:56:24,145 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 17:56:24,145 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-05 17:56:24,145 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [443249681] [2025-02-05 17:56:24,145 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 17:56:24,146 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-02-05 17:56:24,146 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 17:56:24,146 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-05 17:56:24,146 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 17:56:24,147 INFO L87 Difference]: Start difference. First operand 368 states and 521 transitions. Second operand has 6 states, 6 states have (on average 8.333333333333334) internal successors, (50), 6 states have internal predecessors, (50), 3 states have call successors, (8), 3 states have call predecessors, (8), 3 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) [2025-02-05 17:56:24,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 17:56:24,804 INFO L93 Difference]: Finished difference Result 741 states and 1039 transitions. [2025-02-05 17:56:24,804 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-02-05 17:56:24,805 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 8.333333333333334) internal successors, (50), 6 states have internal predecessors, (50), 3 states have call successors, (8), 3 states have call predecessors, (8), 3 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) Word has length 65 [2025-02-05 17:56:24,805 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 17:56:24,808 INFO L225 Difference]: With dead ends: 741 [2025-02-05 17:56:24,808 INFO L226 Difference]: Without dead ends: 528 [2025-02-05 17:56:24,809 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2025-02-05 17:56:24,809 INFO L435 NwaCegarLoop]: 308 mSDtfsCounter, 512 mSDsluCounter, 856 mSDsCounter, 0 mSdLazyCounter, 789 mSolverCounterSat, 58 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.4s Time, 0 mProtectedPredicate, 0 mProtectedAction, 536 SdHoareTripleChecker+Valid, 1164 SdHoareTripleChecker+Invalid, 847 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 58 IncrementalHoareTripleChecker+Valid, 789 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.6s IncrementalHoareTripleChecker+Time [2025-02-05 17:56:24,810 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [536 Valid, 1164 Invalid, 847 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [58 Valid, 789 Invalid, 0 Unknown, 0 Unchecked, 0.6s Time] [2025-02-05 17:56:24,810 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 528 states. [2025-02-05 17:56:24,845 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 528 to 482. [2025-02-05 17:56:24,846 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 482 states, 389 states have (on average 1.4215938303341902) internal successors, (553), 398 states have internal predecessors, (553), 60 states have call successors, (60), 29 states have call predecessors, (60), 31 states have return successors, (69), 58 states have call predecessors, (69), 56 states have call successors, (69) [2025-02-05 17:56:24,848 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 482 states to 482 states and 682 transitions. [2025-02-05 17:56:24,849 INFO L78 Accepts]: Start accepts. Automaton has 482 states and 682 transitions. Word has length 65 [2025-02-05 17:56:24,849 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 17:56:24,849 INFO L471 AbstractCegarLoop]: Abstraction has 482 states and 682 transitions. [2025-02-05 17:56:24,849 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 8.333333333333334) internal successors, (50), 6 states have internal predecessors, (50), 3 states have call successors, (8), 3 states have call predecessors, (8), 3 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) [2025-02-05 17:56:24,850 INFO L276 IsEmpty]: Start isEmpty. Operand 482 states and 682 transitions. [2025-02-05 17:56:24,852 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2025-02-05 17:56:24,852 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:56:24,852 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:56:24,852 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2025-02-05 17:56:24,852 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting error1Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:56:24,853 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:56:24,853 INFO L85 PathProgramCache]: Analyzing trace with hash 1753486030, now seen corresponding path program 1 times [2025-02-05 17:56:24,853 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:56:24,853 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [973619732] [2025-02-05 17:56:24,853 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:56:24,853 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:56:24,860 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 65 statements into 1 equivalence classes. [2025-02-05 17:56:24,863 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 65 of 65 statements. [2025-02-05 17:56:24,864 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:56:24,864 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:56:24,951 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 17:56:24,952 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 17:56:24,952 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [973619732] [2025-02-05 17:56:24,952 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [973619732] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 17:56:24,952 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 17:56:24,952 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-02-05 17:56:24,953 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [104894695] [2025-02-05 17:56:24,953 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 17:56:24,953 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2025-02-05 17:56:24,954 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 17:56:24,954 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-02-05 17:56:24,954 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2025-02-05 17:56:24,954 INFO L87 Difference]: Start difference. First operand 482 states and 682 transitions. Second operand has 8 states, 8 states have (on average 6.25) internal successors, (50), 7 states have internal predecessors, (50), 5 states have call successors, (8), 3 states have call predecessors, (8), 3 states have return successors, (7), 3 states have call predecessors, (7), 5 states have call successors, (7) [2025-02-05 17:56:26,222 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 17:56:26,223 INFO L93 Difference]: Finished difference Result 1926 states and 2719 transitions. [2025-02-05 17:56:26,223 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2025-02-05 17:56:26,223 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 6.25) internal successors, (50), 7 states have internal predecessors, (50), 5 states have call successors, (8), 3 states have call predecessors, (8), 3 states have return successors, (7), 3 states have call predecessors, (7), 5 states have call successors, (7) Word has length 65 [2025-02-05 17:56:26,223 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 17:56:26,235 INFO L225 Difference]: With dead ends: 1926 [2025-02-05 17:56:26,235 INFO L226 Difference]: Without dead ends: 1587 [2025-02-05 17:56:26,238 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=88, Invalid=292, Unknown=0, NotChecked=0, Total=380 [2025-02-05 17:56:26,240 INFO L435 NwaCegarLoop]: 317 mSDtfsCounter, 1851 mSDsluCounter, 1054 mSDsCounter, 0 mSdLazyCounter, 1117 mSolverCounterSat, 423 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.8s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1869 SdHoareTripleChecker+Valid, 1371 SdHoareTripleChecker+Invalid, 1540 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 423 IncrementalHoareTripleChecker+Valid, 1117 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 1.0s IncrementalHoareTripleChecker+Time [2025-02-05 17:56:26,240 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1869 Valid, 1371 Invalid, 1540 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [423 Valid, 1117 Invalid, 0 Unknown, 0 Unchecked, 1.0s Time] [2025-02-05 17:56:26,243 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1587 states. [2025-02-05 17:56:26,355 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1587 to 1540. [2025-02-05 17:56:26,359 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1540 states, 1242 states have (on average 1.3679549114331724) internal successors, (1699), 1266 states have internal predecessors, (1699), 170 states have call successors, (170), 112 states have call predecessors, (170), 126 states have return successors, (202), 164 states have call predecessors, (202), 166 states have call successors, (202) [2025-02-05 17:56:26,369 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1540 states to 1540 states and 2071 transitions. [2025-02-05 17:56:26,370 INFO L78 Accepts]: Start accepts. Automaton has 1540 states and 2071 transitions. Word has length 65 [2025-02-05 17:56:26,370 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 17:56:26,370 INFO L471 AbstractCegarLoop]: Abstraction has 1540 states and 2071 transitions. [2025-02-05 17:56:26,371 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 6.25) internal successors, (50), 7 states have internal predecessors, (50), 5 states have call successors, (8), 3 states have call predecessors, (8), 3 states have return successors, (7), 3 states have call predecessors, (7), 5 states have call successors, (7) [2025-02-05 17:56:26,371 INFO L276 IsEmpty]: Start isEmpty. Operand 1540 states and 2071 transitions. [2025-02-05 17:56:26,373 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2025-02-05 17:56:26,374 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:56:26,374 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:56:26,374 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2025-02-05 17:56:26,375 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting error1Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:56:26,375 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:56:26,375 INFO L85 PathProgramCache]: Analyzing trace with hash -1835458759, now seen corresponding path program 1 times [2025-02-05 17:56:26,375 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:56:26,375 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [236366951] [2025-02-05 17:56:26,375 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:56:26,375 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:56:26,385 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 66 statements into 1 equivalence classes. [2025-02-05 17:56:26,392 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 66 of 66 statements. [2025-02-05 17:56:26,393 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:56:26,393 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:56:26,470 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 17:56:26,471 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 17:56:26,471 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [236366951] [2025-02-05 17:56:26,471 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [236366951] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 17:56:26,471 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 17:56:26,471 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-05 17:56:26,471 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2059437301] [2025-02-05 17:56:26,471 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 17:56:26,471 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-02-05 17:56:26,471 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 17:56:26,472 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-05 17:56:26,472 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 17:56:26,472 INFO L87 Difference]: Start difference. First operand 1540 states and 2071 transitions. Second operand has 6 states, 6 states have (on average 8.5) internal successors, (51), 5 states have internal predecessors, (51), 2 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) [2025-02-05 17:56:26,587 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 17:56:26,587 INFO L93 Difference]: Finished difference Result 2971 states and 4001 transitions. [2025-02-05 17:56:26,587 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-05 17:56:26,587 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 8.5) internal successors, (51), 5 states have internal predecessors, (51), 2 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) Word has length 66 [2025-02-05 17:56:26,588 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 17:56:26,596 INFO L225 Difference]: With dead ends: 2971 [2025-02-05 17:56:26,596 INFO L226 Difference]: Without dead ends: 1580 [2025-02-05 17:56:26,599 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 17:56:26,601 INFO L435 NwaCegarLoop]: 359 mSDtfsCounter, 0 mSDsluCounter, 1430 mSDsCounter, 0 mSdLazyCounter, 20 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1789 SdHoareTripleChecker+Invalid, 20 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 20 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 17:56:26,602 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1789 Invalid, 20 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 20 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 17:56:26,604 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1580 states. [2025-02-05 17:56:26,676 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1580 to 1580. [2025-02-05 17:56:26,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1580 states, 1274 states have (on average 1.3540031397174255) internal successors, (1725), 1298 states have internal predecessors, (1725), 170 states have call successors, (170), 112 states have call predecessors, (170), 134 states have return successors, (210), 172 states have call predecessors, (210), 166 states have call successors, (210) [2025-02-05 17:56:26,686 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1580 states to 1580 states and 2105 transitions. [2025-02-05 17:56:26,687 INFO L78 Accepts]: Start accepts. Automaton has 1580 states and 2105 transitions. Word has length 66 [2025-02-05 17:56:26,688 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 17:56:26,688 INFO L471 AbstractCegarLoop]: Abstraction has 1580 states and 2105 transitions. [2025-02-05 17:56:26,688 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 8.5) internal successors, (51), 5 states have internal predecessors, (51), 2 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) [2025-02-05 17:56:26,688 INFO L276 IsEmpty]: Start isEmpty. Operand 1580 states and 2105 transitions. [2025-02-05 17:56:26,689 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2025-02-05 17:56:26,689 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:56:26,689 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:56:26,689 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2025-02-05 17:56:26,689 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting error1Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:56:26,690 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:56:26,690 INFO L85 PathProgramCache]: Analyzing trace with hash -202654760, now seen corresponding path program 1 times [2025-02-05 17:56:26,690 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:56:26,690 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [303197887] [2025-02-05 17:56:26,691 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:56:26,691 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:56:26,698 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 66 statements into 1 equivalence classes. [2025-02-05 17:56:26,703 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 66 of 66 statements. [2025-02-05 17:56:26,707 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:56:26,708 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:56:26,786 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 17:56:26,787 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 17:56:26,787 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [303197887] [2025-02-05 17:56:26,787 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [303197887] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 17:56:26,787 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 17:56:26,787 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2025-02-05 17:56:26,787 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [633680307] [2025-02-05 17:56:26,787 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 17:56:26,788 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 8 states [2025-02-05 17:56:26,788 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 17:56:26,789 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2025-02-05 17:56:26,790 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2025-02-05 17:56:26,791 INFO L87 Difference]: Start difference. First operand 1580 states and 2105 transitions. Second operand has 8 states, 8 states have (on average 6.375) internal successors, (51), 7 states have internal predecessors, (51), 4 states have call successors, (8), 3 states have call predecessors, (8), 3 states have return successors, (7), 4 states have call predecessors, (7), 4 states have call successors, (7) [2025-02-05 17:56:27,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 17:56:27,715 INFO L93 Difference]: Finished difference Result 4852 states and 6488 transitions. [2025-02-05 17:56:27,715 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2025-02-05 17:56:27,716 INFO L78 Accepts]: Start accepts. Automaton has has 8 states, 8 states have (on average 6.375) internal successors, (51), 7 states have internal predecessors, (51), 4 states have call successors, (8), 3 states have call predecessors, (8), 3 states have return successors, (7), 4 states have call predecessors, (7), 4 states have call successors, (7) Word has length 66 [2025-02-05 17:56:27,716 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 17:56:27,727 INFO L225 Difference]: With dead ends: 4852 [2025-02-05 17:56:27,727 INFO L226 Difference]: Without dead ends: 1784 [2025-02-05 17:56:27,735 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 8 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=88, Invalid=292, Unknown=0, NotChecked=0, Total=380 [2025-02-05 17:56:27,735 INFO L435 NwaCegarLoop]: 323 mSDtfsCounter, 1867 mSDsluCounter, 1090 mSDsCounter, 0 mSdLazyCounter, 1097 mSolverCounterSat, 414 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.6s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1885 SdHoareTripleChecker+Valid, 1413 SdHoareTripleChecker+Invalid, 1511 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 414 IncrementalHoareTripleChecker+Valid, 1097 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.7s IncrementalHoareTripleChecker+Time [2025-02-05 17:56:27,735 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1885 Valid, 1413 Invalid, 1511 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [414 Valid, 1097 Invalid, 0 Unknown, 0 Unchecked, 0.7s Time] [2025-02-05 17:56:27,737 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1784 states. [2025-02-05 17:56:27,803 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1784 to 1725. [2025-02-05 17:56:27,806 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1725 states, 1356 states have (on average 1.306047197640118) internal successors, (1771), 1382 states have internal predecessors, (1771), 204 states have call successors, (204), 134 states have call predecessors, (204), 163 states have return successors, (245), 211 states have call predecessors, (245), 200 states have call successors, (245) [2025-02-05 17:56:27,813 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1725 states to 1725 states and 2220 transitions. [2025-02-05 17:56:27,815 INFO L78 Accepts]: Start accepts. Automaton has 1725 states and 2220 transitions. Word has length 66 [2025-02-05 17:56:27,816 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 17:56:27,816 INFO L471 AbstractCegarLoop]: Abstraction has 1725 states and 2220 transitions. [2025-02-05 17:56:27,816 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 8 states, 8 states have (on average 6.375) internal successors, (51), 7 states have internal predecessors, (51), 4 states have call successors, (8), 3 states have call predecessors, (8), 3 states have return successors, (7), 4 states have call predecessors, (7), 4 states have call successors, (7) [2025-02-05 17:56:27,816 INFO L276 IsEmpty]: Start isEmpty. Operand 1725 states and 2220 transitions. [2025-02-05 17:56:27,817 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2025-02-05 17:56:27,818 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:56:27,818 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:56:27,818 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2025-02-05 17:56:27,818 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:56:27,819 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:56:27,819 INFO L85 PathProgramCache]: Analyzing trace with hash 1400293655, now seen corresponding path program 1 times [2025-02-05 17:56:27,819 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:56:27,819 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1319115478] [2025-02-05 17:56:27,819 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:56:27,819 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:56:27,828 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 69 statements into 1 equivalence classes. [2025-02-05 17:56:27,831 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 69 of 69 statements. [2025-02-05 17:56:27,831 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:56:27,832 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:56:27,859 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 17:56:27,860 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 17:56:27,860 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1319115478] [2025-02-05 17:56:27,860 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1319115478] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 17:56:27,860 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 17:56:27,860 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-05 17:56:27,860 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1928640042] [2025-02-05 17:56:27,861 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 17:56:27,862 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-02-05 17:56:27,863 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 17:56:27,863 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-05 17:56:27,864 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 17:56:27,864 INFO L87 Difference]: Start difference. First operand 1725 states and 2220 transitions. Second operand has 3 states, 3 states have (on average 19.333333333333332) internal successors, (58), 3 states have internal predecessors, (58), 2 states have call successors, (6), 2 states have call predecessors, (6), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2025-02-05 17:56:27,906 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 17:56:27,906 INFO L93 Difference]: Finished difference Result 1858 states and 2413 transitions. [2025-02-05 17:56:27,906 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-05 17:56:27,907 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 19.333333333333332) internal successors, (58), 3 states have internal predecessors, (58), 2 states have call successors, (6), 2 states have call predecessors, (6), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 69 [2025-02-05 17:56:27,907 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 17:56:27,914 INFO L225 Difference]: With dead ends: 1858 [2025-02-05 17:56:27,914 INFO L226 Difference]: Without dead ends: 1725 [2025-02-05 17:56:27,915 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 17:56:27,916 INFO L435 NwaCegarLoop]: 350 mSDtfsCounter, 196 mSDsluCounter, 149 mSDsCounter, 0 mSdLazyCounter, 2 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 196 SdHoareTripleChecker+Valid, 499 SdHoareTripleChecker+Invalid, 2 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 17:56:27,916 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [196 Valid, 499 Invalid, 2 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 17:56:27,919 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1725 states. [2025-02-05 17:56:27,973 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1725 to 1725. [2025-02-05 17:56:27,975 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1725 states, 1356 states have (on average 1.3053097345132743) internal successors, (1770), 1382 states have internal predecessors, (1770), 204 states have call successors, (204), 134 states have call predecessors, (204), 163 states have return successors, (245), 211 states have call predecessors, (245), 200 states have call successors, (245) [2025-02-05 17:56:27,982 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1725 states to 1725 states and 2219 transitions. [2025-02-05 17:56:27,984 INFO L78 Accepts]: Start accepts. Automaton has 1725 states and 2219 transitions. Word has length 69 [2025-02-05 17:56:27,984 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 17:56:27,984 INFO L471 AbstractCegarLoop]: Abstraction has 1725 states and 2219 transitions. [2025-02-05 17:56:27,984 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 19.333333333333332) internal successors, (58), 3 states have internal predecessors, (58), 2 states have call successors, (6), 2 states have call predecessors, (6), 1 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2025-02-05 17:56:27,984 INFO L276 IsEmpty]: Start isEmpty. Operand 1725 states and 2219 transitions. [2025-02-05 17:56:27,985 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2025-02-05 17:56:27,985 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:56:27,985 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:56:27,985 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2025-02-05 17:56:27,985 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:56:27,986 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:56:27,986 INFO L85 PathProgramCache]: Analyzing trace with hash 1299381688, now seen corresponding path program 1 times [2025-02-05 17:56:27,986 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:56:27,986 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1503226816] [2025-02-05 17:56:27,986 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:56:27,986 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:56:28,021 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 69 statements into 1 equivalence classes. [2025-02-05 17:56:28,024 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 69 of 69 statements. [2025-02-05 17:56:28,025 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:56:28,025 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:56:28,068 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 17:56:28,068 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 17:56:28,068 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1503226816] [2025-02-05 17:56:28,068 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1503226816] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 17:56:28,068 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 17:56:28,068 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-05 17:56:28,069 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [25474442] [2025-02-05 17:56:28,069 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 17:56:28,069 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-05 17:56:28,069 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 17:56:28,069 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-05 17:56:28,069 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-02-05 17:56:28,069 INFO L87 Difference]: Start difference. First operand 1725 states and 2219 transitions. Second operand has 5 states, 5 states have (on average 11.6) internal successors, (58), 4 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2025-02-05 17:56:28,392 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 17:56:28,392 INFO L93 Difference]: Finished difference Result 1993 states and 2613 transitions. [2025-02-05 17:56:28,393 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-05 17:56:28,393 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 11.6) internal successors, (58), 4 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 69 [2025-02-05 17:56:28,393 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 17:56:28,401 INFO L225 Difference]: With dead ends: 1993 [2025-02-05 17:56:28,402 INFO L226 Difference]: Without dead ends: 1863 [2025-02-05 17:56:28,403 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2025-02-05 17:56:28,403 INFO L435 NwaCegarLoop]: 235 mSDtfsCounter, 509 mSDsluCounter, 511 mSDsCounter, 0 mSdLazyCounter, 397 mSolverCounterSat, 62 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 531 SdHoareTripleChecker+Valid, 746 SdHoareTripleChecker+Invalid, 459 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 62 IncrementalHoareTripleChecker+Valid, 397 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-02-05 17:56:28,404 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [531 Valid, 746 Invalid, 459 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [62 Valid, 397 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-02-05 17:56:28,405 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1863 states. [2025-02-05 17:56:28,463 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1863 to 1852. [2025-02-05 17:56:28,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1852 states, 1465 states have (on average 1.3187713310580205) internal successors, (1932), 1492 states have internal predecessors, (1932), 215 states have call successors, (215), 140 states have call predecessors, (215), 170 states have return successors, (257), 222 states have call predecessors, (257), 211 states have call successors, (257) [2025-02-05 17:56:28,473 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1852 states to 1852 states and 2404 transitions. [2025-02-05 17:56:28,475 INFO L78 Accepts]: Start accepts. Automaton has 1852 states and 2404 transitions. Word has length 69 [2025-02-05 17:56:28,475 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 17:56:28,475 INFO L471 AbstractCegarLoop]: Abstraction has 1852 states and 2404 transitions. [2025-02-05 17:56:28,476 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.6) internal successors, (58), 4 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2025-02-05 17:56:28,476 INFO L276 IsEmpty]: Start isEmpty. Operand 1852 states and 2404 transitions. [2025-02-05 17:56:28,476 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2025-02-05 17:56:28,476 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:56:28,477 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:56:28,477 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2025-02-05 17:56:28,477 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:56:28,477 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:56:28,477 INFO L85 PathProgramCache]: Analyzing trace with hash 1350738870, now seen corresponding path program 1 times [2025-02-05 17:56:28,477 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:56:28,477 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1447459103] [2025-02-05 17:56:28,477 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:56:28,478 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:56:28,484 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 69 statements into 1 equivalence classes. [2025-02-05 17:56:28,488 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 69 of 69 statements. [2025-02-05 17:56:28,489 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:56:28,489 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:56:28,553 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 17:56:28,553 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 17:56:28,554 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1447459103] [2025-02-05 17:56:28,554 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1447459103] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 17:56:28,554 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 17:56:28,554 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-05 17:56:28,554 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1351334067] [2025-02-05 17:56:28,554 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 17:56:28,554 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-02-05 17:56:28,554 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 17:56:28,555 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-05 17:56:28,556 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 17:56:28,556 INFO L87 Difference]: Start difference. First operand 1852 states and 2404 transitions. Second operand has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 5 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2025-02-05 17:56:29,028 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 17:56:29,029 INFO L93 Difference]: Finished difference Result 2264 states and 3008 transitions. [2025-02-05 17:56:29,029 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-02-05 17:56:29,029 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 5 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 69 [2025-02-05 17:56:29,030 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 17:56:29,036 INFO L225 Difference]: With dead ends: 2264 [2025-02-05 17:56:29,037 INFO L226 Difference]: Without dead ends: 2007 [2025-02-05 17:56:29,038 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2025-02-05 17:56:29,038 INFO L435 NwaCegarLoop]: 339 mSDtfsCounter, 498 mSDsluCounter, 946 mSDsCounter, 0 mSdLazyCounter, 693 mSolverCounterSat, 46 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 520 SdHoareTripleChecker+Valid, 1285 SdHoareTripleChecker+Invalid, 739 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 46 IncrementalHoareTripleChecker+Valid, 693 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-02-05 17:56:29,039 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [520 Valid, 1285 Invalid, 739 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [46 Valid, 693 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-02-05 17:56:29,040 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2007 states. [2025-02-05 17:56:29,109 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2007 to 1972. [2025-02-05 17:56:29,112 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1972 states, 1567 states have (on average 1.3273771537970644) internal successors, (2080), 1595 states have internal predecessors, (2080), 226 states have call successors, (226), 146 states have call predecessors, (226), 177 states have return successors, (271), 234 states have call predecessors, (271), 222 states have call successors, (271) [2025-02-05 17:56:29,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1972 states to 1972 states and 2577 transitions. [2025-02-05 17:56:29,120 INFO L78 Accepts]: Start accepts. Automaton has 1972 states and 2577 transitions. Word has length 69 [2025-02-05 17:56:29,120 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 17:56:29,120 INFO L471 AbstractCegarLoop]: Abstraction has 1972 states and 2577 transitions. [2025-02-05 17:56:29,120 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 5 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2025-02-05 17:56:29,121 INFO L276 IsEmpty]: Start isEmpty. Operand 1972 states and 2577 transitions. [2025-02-05 17:56:29,121 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2025-02-05 17:56:29,122 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:56:29,122 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:56:29,122 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2025-02-05 17:56:29,122 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:56:29,122 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:56:29,122 INFO L85 PathProgramCache]: Analyzing trace with hash 2044131575, now seen corresponding path program 1 times [2025-02-05 17:56:29,122 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:56:29,123 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [385823631] [2025-02-05 17:56:29,123 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:56:29,123 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:56:29,127 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 69 statements into 1 equivalence classes. [2025-02-05 17:56:29,129 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 69 of 69 statements. [2025-02-05 17:56:29,129 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:56:29,129 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:56:29,212 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 17:56:29,213 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 17:56:29,213 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [385823631] [2025-02-05 17:56:29,213 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [385823631] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 17:56:29,213 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 17:56:29,213 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-05 17:56:29,213 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1393672140] [2025-02-05 17:56:29,213 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 17:56:29,213 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-02-05 17:56:29,213 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 17:56:29,214 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-05 17:56:29,214 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 17:56:29,215 INFO L87 Difference]: Start difference. First operand 1972 states and 2577 transitions. Second operand has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 5 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2025-02-05 17:56:29,752 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 17:56:29,753 INFO L93 Difference]: Finished difference Result 2634 states and 3546 transitions. [2025-02-05 17:56:29,753 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-02-05 17:56:29,753 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 5 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 69 [2025-02-05 17:56:29,753 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 17:56:29,761 INFO L225 Difference]: With dead ends: 2634 [2025-02-05 17:56:29,761 INFO L226 Difference]: Without dead ends: 2257 [2025-02-05 17:56:29,763 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2025-02-05 17:56:29,763 INFO L435 NwaCegarLoop]: 335 mSDtfsCounter, 493 mSDsluCounter, 934 mSDsCounter, 0 mSdLazyCounter, 693 mSolverCounterSat, 46 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 515 SdHoareTripleChecker+Valid, 1269 SdHoareTripleChecker+Invalid, 739 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 46 IncrementalHoareTripleChecker+Valid, 693 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-02-05 17:56:29,763 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [515 Valid, 1269 Invalid, 739 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [46 Valid, 693 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-02-05 17:56:29,765 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2257 states. [2025-02-05 17:56:29,851 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2257 to 2221. [2025-02-05 17:56:29,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2221 states, 1778 states have (on average 1.3425196850393701) internal successors, (2387), 1810 states have internal predecessors, (2387), 248 states have call successors, (248), 158 states have call predecessors, (248), 193 states have return successors, (305), 258 states have call predecessors, (305), 244 states have call successors, (305) [2025-02-05 17:56:29,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2221 states to 2221 states and 2940 transitions. [2025-02-05 17:56:29,882 INFO L78 Accepts]: Start accepts. Automaton has 2221 states and 2940 transitions. Word has length 69 [2025-02-05 17:56:29,882 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 17:56:29,882 INFO L471 AbstractCegarLoop]: Abstraction has 2221 states and 2940 transitions. [2025-02-05 17:56:29,882 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 5 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2025-02-05 17:56:29,883 INFO L276 IsEmpty]: Start isEmpty. Operand 2221 states and 2940 transitions. [2025-02-05 17:56:29,884 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2025-02-05 17:56:29,884 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:56:29,884 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:56:29,884 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2025-02-05 17:56:29,884 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:56:29,885 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:56:29,885 INFO L85 PathProgramCache]: Analyzing trace with hash -1812826218, now seen corresponding path program 1 times [2025-02-05 17:56:29,885 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:56:29,885 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1331110041] [2025-02-05 17:56:29,885 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:56:29,885 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:56:29,890 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 69 statements into 1 equivalence classes. [2025-02-05 17:56:29,892 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 69 of 69 statements. [2025-02-05 17:56:29,892 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:56:29,892 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:56:29,949 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 17:56:29,949 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 17:56:29,950 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1331110041] [2025-02-05 17:56:29,950 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1331110041] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 17:56:29,950 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 17:56:29,950 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-05 17:56:29,950 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1928932131] [2025-02-05 17:56:29,950 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 17:56:29,950 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-02-05 17:56:29,950 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 17:56:29,951 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-05 17:56:29,951 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 17:56:29,951 INFO L87 Difference]: Start difference. First operand 2221 states and 2940 transitions. Second operand has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 5 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2025-02-05 17:56:30,465 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 17:56:30,466 INFO L93 Difference]: Finished difference Result 3481 states and 4796 transitions. [2025-02-05 17:56:30,466 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-02-05 17:56:30,466 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 5 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 69 [2025-02-05 17:56:30,466 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 17:56:30,477 INFO L225 Difference]: With dead ends: 3481 [2025-02-05 17:56:30,478 INFO L226 Difference]: Without dead ends: 2855 [2025-02-05 17:56:30,480 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2025-02-05 17:56:30,481 INFO L435 NwaCegarLoop]: 330 mSDtfsCounter, 562 mSDsluCounter, 914 mSDsCounter, 0 mSdLazyCounter, 696 mSolverCounterSat, 49 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 587 SdHoareTripleChecker+Valid, 1244 SdHoareTripleChecker+Invalid, 745 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 49 IncrementalHoareTripleChecker+Valid, 696 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-02-05 17:56:30,481 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [587 Valid, 1244 Invalid, 745 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [49 Valid, 696 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-02-05 17:56:30,483 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2855 states. [2025-02-05 17:56:30,628 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2855 to 2728. [2025-02-05 17:56:30,633 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2728 states, 2207 states have (on average 1.3661078386950611) internal successors, (3015), 2253 states have internal predecessors, (3015), 288 states have call successors, (288), 182 states have call predecessors, (288), 231 states have return successors, (393), 302 states have call predecessors, (393), 284 states have call successors, (393) [2025-02-05 17:56:30,640 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2728 states to 2728 states and 3696 transitions. [2025-02-05 17:56:30,642 INFO L78 Accepts]: Start accepts. Automaton has 2728 states and 3696 transitions. Word has length 69 [2025-02-05 17:56:30,642 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 17:56:30,643 INFO L471 AbstractCegarLoop]: Abstraction has 2728 states and 3696 transitions. [2025-02-05 17:56:30,643 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 5 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2025-02-05 17:56:30,643 INFO L276 IsEmpty]: Start isEmpty. Operand 2728 states and 3696 transitions. [2025-02-05 17:56:30,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2025-02-05 17:56:30,645 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:56:30,645 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:56:30,645 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2025-02-05 17:56:30,646 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:56:30,646 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:56:30,646 INFO L85 PathProgramCache]: Analyzing trace with hash 556607767, now seen corresponding path program 1 times [2025-02-05 17:56:30,646 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:56:30,646 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [33241179] [2025-02-05 17:56:30,646 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:56:30,647 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:56:30,651 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 69 statements into 1 equivalence classes. [2025-02-05 17:56:30,654 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 69 of 69 statements. [2025-02-05 17:56:30,655 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:56:30,655 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:56:30,712 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 17:56:30,713 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 17:56:30,713 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [33241179] [2025-02-05 17:56:30,713 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [33241179] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 17:56:30,713 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 17:56:30,713 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-05 17:56:30,713 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [886746806] [2025-02-05 17:56:30,713 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 17:56:30,714 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-02-05 17:56:30,715 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 17:56:30,715 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-05 17:56:30,715 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 17:56:30,715 INFO L87 Difference]: Start difference. First operand 2728 states and 3696 transitions. Second operand has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 5 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2025-02-05 17:56:31,281 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 17:56:31,281 INFO L93 Difference]: Finished difference Result 5064 states and 7218 transitions. [2025-02-05 17:56:31,282 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-02-05 17:56:31,282 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 5 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 69 [2025-02-05 17:56:31,282 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 17:56:31,297 INFO L225 Difference]: With dead ends: 5064 [2025-02-05 17:56:31,297 INFO L226 Difference]: Without dead ends: 3931 [2025-02-05 17:56:31,301 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2025-02-05 17:56:31,302 INFO L435 NwaCegarLoop]: 326 mSDtfsCounter, 526 mSDsluCounter, 902 mSDsCounter, 0 mSdLazyCounter, 696 mSolverCounterSat, 49 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 551 SdHoareTripleChecker+Valid, 1228 SdHoareTripleChecker+Invalid, 745 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 49 IncrementalHoareTripleChecker+Valid, 696 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-02-05 17:56:31,302 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [551 Valid, 1228 Invalid, 745 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [49 Valid, 696 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-02-05 17:56:31,306 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3931 states. [2025-02-05 17:56:31,519 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3931 to 3687. [2025-02-05 17:56:31,525 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3687 states, 2996 states have (on average 1.3828437917222964) internal successors, (4143), 3088 states have internal predecessors, (4143), 364 states have call successors, (364), 230 states have call predecessors, (364), 325 states have return successors, (661), 386 states have call predecessors, (661), 360 states have call successors, (661) [2025-02-05 17:56:31,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3687 states to 3687 states and 5168 transitions. [2025-02-05 17:56:31,536 INFO L78 Accepts]: Start accepts. Automaton has 3687 states and 5168 transitions. Word has length 69 [2025-02-05 17:56:31,537 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 17:56:31,537 INFO L471 AbstractCegarLoop]: Abstraction has 3687 states and 5168 transitions. [2025-02-05 17:56:31,537 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 5 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2025-02-05 17:56:31,537 INFO L276 IsEmpty]: Start isEmpty. Operand 3687 states and 5168 transitions. [2025-02-05 17:56:31,539 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2025-02-05 17:56:31,539 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:56:31,539 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:56:31,540 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2025-02-05 17:56:31,540 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:56:31,540 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:56:31,540 INFO L85 PathProgramCache]: Analyzing trace with hash 1325777782, now seen corresponding path program 1 times [2025-02-05 17:56:31,540 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:56:31,540 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1526092909] [2025-02-05 17:56:31,540 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:56:31,540 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:56:31,548 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 69 statements into 1 equivalence classes. [2025-02-05 17:56:31,550 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 69 of 69 statements. [2025-02-05 17:56:31,551 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:56:31,551 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:56:31,613 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 17:56:31,613 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 17:56:31,613 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1526092909] [2025-02-05 17:56:31,613 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1526092909] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 17:56:31,613 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 17:56:31,613 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-05 17:56:31,614 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [36863717] [2025-02-05 17:56:31,614 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 17:56:31,614 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-02-05 17:56:31,614 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 17:56:31,614 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-05 17:56:31,614 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 17:56:31,615 INFO L87 Difference]: Start difference. First operand 3687 states and 5168 transitions. Second operand has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 5 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2025-02-05 17:56:32,298 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 17:56:32,299 INFO L93 Difference]: Finished difference Result 7999 states and 11972 transitions. [2025-02-05 17:56:32,299 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2025-02-05 17:56:32,299 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 5 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 69 [2025-02-05 17:56:32,299 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 17:56:32,323 INFO L225 Difference]: With dead ends: 7999 [2025-02-05 17:56:32,323 INFO L226 Difference]: Without dead ends: 5907 [2025-02-05 17:56:32,329 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=24, Invalid=48, Unknown=0, NotChecked=0, Total=72 [2025-02-05 17:56:32,330 INFO L435 NwaCegarLoop]: 322 mSDtfsCounter, 492 mSDsluCounter, 898 mSDsCounter, 0 mSdLazyCounter, 689 mSolverCounterSat, 50 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 517 SdHoareTripleChecker+Valid, 1220 SdHoareTripleChecker+Invalid, 739 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 50 IncrementalHoareTripleChecker+Valid, 689 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-02-05 17:56:32,330 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [517 Valid, 1220 Invalid, 739 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [50 Valid, 689 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-02-05 17:56:32,334 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5907 states. [2025-02-05 17:56:32,634 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5907 to 5738. [2025-02-05 17:56:32,647 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5738 states, 4669 states have (on average 1.397087170700364) internal successors, (6523), 4907 states have internal predecessors, (6523), 504 states have call successors, (504), 322 states have call predecessors, (504), 563 states have return successors, (1569), 542 states have call predecessors, (1569), 500 states have call successors, (1569) [2025-02-05 17:56:32,663 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5738 states to 5738 states and 8596 transitions. [2025-02-05 17:56:32,667 INFO L78 Accepts]: Start accepts. Automaton has 5738 states and 8596 transitions. Word has length 69 [2025-02-05 17:56:32,668 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 17:56:32,668 INFO L471 AbstractCegarLoop]: Abstraction has 5738 states and 8596 transitions. [2025-02-05 17:56:32,668 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 9.666666666666666) internal successors, (58), 5 states have internal predecessors, (58), 2 states have call successors, (6), 3 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2025-02-05 17:56:32,668 INFO L276 IsEmpty]: Start isEmpty. Operand 5738 states and 8596 transitions. [2025-02-05 17:56:32,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 70 [2025-02-05 17:56:32,671 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:56:32,672 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:56:32,672 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2025-02-05 17:56:32,673 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:56:32,674 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:56:32,674 INFO L85 PathProgramCache]: Analyzing trace with hash -1835998921, now seen corresponding path program 1 times [2025-02-05 17:56:32,674 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:56:32,674 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1557980195] [2025-02-05 17:56:32,674 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:56:32,674 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:56:32,679 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 69 statements into 1 equivalence classes. [2025-02-05 17:56:32,681 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 69 of 69 statements. [2025-02-05 17:56:32,682 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:56:32,682 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:56:32,708 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 17:56:32,709 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 17:56:32,709 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1557980195] [2025-02-05 17:56:32,709 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1557980195] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 17:56:32,709 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 17:56:32,709 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-05 17:56:32,709 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2050571065] [2025-02-05 17:56:32,709 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 17:56:32,709 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-05 17:56:32,710 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 17:56:32,710 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-05 17:56:32,710 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-05 17:56:32,710 INFO L87 Difference]: Start difference. First operand 5738 states and 8596 transitions. Second operand has 4 states, 4 states have (on average 14.5) internal successors, (58), 4 states have internal predecessors, (58), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2025-02-05 17:56:33,119 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 17:56:33,120 INFO L93 Difference]: Finished difference Result 12057 states and 18664 transitions. [2025-02-05 17:56:33,120 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-05 17:56:33,121 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 14.5) internal successors, (58), 4 states have internal predecessors, (58), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) Word has length 69 [2025-02-05 17:56:33,121 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 17:56:33,161 INFO L225 Difference]: With dead ends: 12057 [2025-02-05 17:56:33,161 INFO L226 Difference]: Without dead ends: 7915 [2025-02-05 17:56:33,173 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-05 17:56:33,174 INFO L435 NwaCegarLoop]: 504 mSDtfsCounter, 478 mSDsluCounter, 413 mSDsCounter, 0 mSdLazyCounter, 101 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 478 SdHoareTripleChecker+Valid, 917 SdHoareTripleChecker+Invalid, 108 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 101 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-02-05 17:56:33,175 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [478 Valid, 917 Invalid, 108 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 101 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-02-05 17:56:33,181 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7915 states. [2025-02-05 17:56:33,800 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7915 to 7682. [2025-02-05 17:56:33,817 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7682 states, 6273 states have (on average 1.3860991551091981) internal successors, (8695), 6594 states have internal predecessors, (8695), 676 states have call successors, (676), 424 states have call predecessors, (676), 731 states have return successors, (1982), 697 states have call predecessors, (1982), 672 states have call successors, (1982) [2025-02-05 17:56:33,840 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7682 states to 7682 states and 11353 transitions. [2025-02-05 17:56:33,845 INFO L78 Accepts]: Start accepts. Automaton has 7682 states and 11353 transitions. Word has length 69 [2025-02-05 17:56:33,845 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 17:56:33,846 INFO L471 AbstractCegarLoop]: Abstraction has 7682 states and 11353 transitions. [2025-02-05 17:56:33,846 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 14.5) internal successors, (58), 4 states have internal predecessors, (58), 2 states have call successors, (6), 2 states have call predecessors, (6), 2 states have return successors, (5), 2 states have call predecessors, (5), 2 states have call successors, (5) [2025-02-05 17:56:33,846 INFO L276 IsEmpty]: Start isEmpty. Operand 7682 states and 11353 transitions. [2025-02-05 17:56:33,862 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 109 [2025-02-05 17:56:33,862 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:56:33,862 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:56:33,862 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2025-02-05 17:56:33,863 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting error1Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:56:33,863 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:56:33,863 INFO L85 PathProgramCache]: Analyzing trace with hash -46447341, now seen corresponding path program 1 times [2025-02-05 17:56:33,863 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:56:33,863 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1081509647] [2025-02-05 17:56:33,863 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:56:33,863 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:56:33,870 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 108 statements into 1 equivalence classes. [2025-02-05 17:56:33,874 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 108 of 108 statements. [2025-02-05 17:56:33,874 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:56:33,874 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:56:33,936 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2025-02-05 17:56:33,937 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 17:56:33,937 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1081509647] [2025-02-05 17:56:33,937 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1081509647] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 17:56:33,937 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 17:56:33,937 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-05 17:56:33,937 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [271942508] [2025-02-05 17:56:33,937 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 17:56:33,938 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-02-05 17:56:33,938 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 17:56:33,938 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-05 17:56:33,938 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 17:56:33,938 INFO L87 Difference]: Start difference. First operand 7682 states and 11353 transitions. Second operand has 6 states, 6 states have (on average 10.833333333333334) internal successors, (65), 5 states have internal predecessors, (65), 2 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) [2025-02-05 17:56:34,244 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 17:56:34,244 INFO L93 Difference]: Finished difference Result 9318 states and 13464 transitions. [2025-02-05 17:56:34,246 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-05 17:56:34,246 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 10.833333333333334) internal successors, (65), 5 states have internal predecessors, (65), 2 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) Word has length 108 [2025-02-05 17:56:34,246 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 17:56:34,267 INFO L225 Difference]: With dead ends: 9318 [2025-02-05 17:56:34,267 INFO L226 Difference]: Without dead ends: 7742 [2025-02-05 17:56:34,272 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 17:56:34,273 INFO L435 NwaCegarLoop]: 347 mSDtfsCounter, 0 mSDsluCounter, 1383 mSDsCounter, 0 mSdLazyCounter, 19 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 1730 SdHoareTripleChecker+Invalid, 19 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 19 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 17:56:34,273 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 1730 Invalid, 19 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 19 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 17:56:34,278 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7742 states. [2025-02-05 17:56:34,622 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7742 to 7742. [2025-02-05 17:56:34,629 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7742 states, 6321 states have (on average 1.3822180034804619) internal successors, (8737), 6642 states have internal predecessors, (8737), 676 states have call successors, (676), 424 states have call predecessors, (676), 743 states have return successors, (1994), 709 states have call predecessors, (1994), 672 states have call successors, (1994) [2025-02-05 17:56:34,645 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7742 states to 7742 states and 11407 transitions. [2025-02-05 17:56:34,648 INFO L78 Accepts]: Start accepts. Automaton has 7742 states and 11407 transitions. Word has length 108 [2025-02-05 17:56:34,648 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 17:56:34,648 INFO L471 AbstractCegarLoop]: Abstraction has 7742 states and 11407 transitions. [2025-02-05 17:56:34,649 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 10.833333333333334) internal successors, (65), 5 states have internal predecessors, (65), 2 states have call successors, (8), 2 states have call predecessors, (8), 3 states have return successors, (7), 3 states have call predecessors, (7), 2 states have call successors, (7) [2025-02-05 17:56:34,649 INFO L276 IsEmpty]: Start isEmpty. Operand 7742 states and 11407 transitions. [2025-02-05 17:56:34,661 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 109 [2025-02-05 17:56:34,662 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:56:34,662 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:56:34,663 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2025-02-05 17:56:34,663 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting error1Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:56:34,663 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:56:34,663 INFO L85 PathProgramCache]: Analyzing trace with hash 907781554, now seen corresponding path program 1 times [2025-02-05 17:56:34,663 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:56:34,663 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1690401250] [2025-02-05 17:56:34,663 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:56:34,663 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:56:34,670 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 108 statements into 1 equivalence classes. [2025-02-05 17:56:34,672 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 108 of 108 statements. [2025-02-05 17:56:34,673 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:56:34,673 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:56:34,780 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2025-02-05 17:56:34,781 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 17:56:34,781 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1690401250] [2025-02-05 17:56:34,781 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1690401250] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 17:56:34,781 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 17:56:34,781 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2025-02-05 17:56:34,781 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [374620421] [2025-02-05 17:56:34,781 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 17:56:34,781 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 6 states [2025-02-05 17:56:34,781 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 17:56:34,782 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2025-02-05 17:56:34,782 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 17:56:34,782 INFO L87 Difference]: Start difference. First operand 7742 states and 11407 transitions. Second operand has 6 states, 6 states have (on average 10.833333333333334) internal successors, (65), 6 states have internal predecessors, (65), 3 states have call successors, (8), 3 states have call predecessors, (8), 3 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) [2025-02-05 17:56:35,533 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 17:56:35,533 INFO L93 Difference]: Finished difference Result 9127 states and 13147 transitions. [2025-02-05 17:56:35,533 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-02-05 17:56:35,533 INFO L78 Accepts]: Start accepts. Automaton has has 6 states, 6 states have (on average 10.833333333333334) internal successors, (65), 6 states have internal predecessors, (65), 3 states have call successors, (8), 3 states have call predecessors, (8), 3 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) Word has length 108 [2025-02-05 17:56:35,534 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 17:56:35,556 INFO L225 Difference]: With dead ends: 9127 [2025-02-05 17:56:35,556 INFO L226 Difference]: Without dead ends: 7730 [2025-02-05 17:56:35,561 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 10 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=30, Invalid=60, Unknown=0, NotChecked=0, Total=90 [2025-02-05 17:56:35,562 INFO L435 NwaCegarLoop]: 238 mSDtfsCounter, 513 mSDsluCounter, 665 mSDsCounter, 0 mSdLazyCounter, 708 mSolverCounterSat, 69 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.3s Time, 0 mProtectedPredicate, 0 mProtectedAction, 536 SdHoareTripleChecker+Valid, 903 SdHoareTripleChecker+Invalid, 777 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 69 IncrementalHoareTripleChecker+Valid, 708 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.4s IncrementalHoareTripleChecker+Time [2025-02-05 17:56:35,562 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [536 Valid, 903 Invalid, 777 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [69 Valid, 708 Invalid, 0 Unknown, 0 Unchecked, 0.4s Time] [2025-02-05 17:56:35,567 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7730 states. [2025-02-05 17:56:35,888 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7730 to 7520. [2025-02-05 17:56:35,896 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7520 states, 6152 states have (on average 1.3847529258777633) internal successors, (8519), 6468 states have internal predecessors, (8519), 648 states have call successors, (648), 405 states have call predecessors, (648), 718 states have return successors, (1954), 679 states have call predecessors, (1954), 644 states have call successors, (1954) [2025-02-05 17:56:35,913 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7520 states to 7520 states and 11121 transitions. [2025-02-05 17:56:35,918 INFO L78 Accepts]: Start accepts. Automaton has 7520 states and 11121 transitions. Word has length 108 [2025-02-05 17:56:35,919 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 17:56:35,919 INFO L471 AbstractCegarLoop]: Abstraction has 7520 states and 11121 transitions. [2025-02-05 17:56:35,920 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 6 states, 6 states have (on average 10.833333333333334) internal successors, (65), 6 states have internal predecessors, (65), 3 states have call successors, (8), 3 states have call predecessors, (8), 3 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) [2025-02-05 17:56:35,920 INFO L276 IsEmpty]: Start isEmpty. Operand 7520 states and 11121 transitions. [2025-02-05 17:56:35,932 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 109 [2025-02-05 17:56:35,933 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:56:35,934 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:56:35,934 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2025-02-05 17:56:35,934 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting error1Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:56:35,934 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:56:35,934 INFO L85 PathProgramCache]: Analyzing trace with hash -2082792013, now seen corresponding path program 1 times [2025-02-05 17:56:35,934 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:56:35,934 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [875802701] [2025-02-05 17:56:35,934 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:56:35,934 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:56:35,940 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 108 statements into 1 equivalence classes. [2025-02-05 17:56:35,945 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 108 of 108 statements. [2025-02-05 17:56:35,945 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:56:35,946 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:56:35,987 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 20 proven. 0 refuted. 0 times theorem prover too weak. 25 trivial. 0 not checked. [2025-02-05 17:56:35,988 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 17:56:35,988 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [875802701] [2025-02-05 17:56:35,988 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [875802701] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 17:56:35,988 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 17:56:35,988 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-05 17:56:35,988 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [185280251] [2025-02-05 17:56:35,988 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 17:56:35,988 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-05 17:56:35,990 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 17:56:35,990 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-05 17:56:35,990 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-05 17:56:35,990 INFO L87 Difference]: Start difference. First operand 7520 states and 11121 transitions. Second operand has 4 states, 4 states have (on average 18.5) internal successors, (74), 4 states have internal predecessors, (74), 4 states have call successors, (9), 3 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 4 states have call successors, (8) [2025-02-05 17:56:36,934 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 17:56:36,935 INFO L93 Difference]: Finished difference Result 10349 states and 14753 transitions. [2025-02-05 17:56:36,935 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-05 17:56:36,935 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 18.5) internal successors, (74), 4 states have internal predecessors, (74), 4 states have call successors, (9), 3 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 4 states have call successors, (8) Word has length 108 [2025-02-05 17:56:36,935 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 17:56:36,964 INFO L225 Difference]: With dead ends: 10349 [2025-02-05 17:56:36,965 INFO L226 Difference]: Without dead ends: 8936 [2025-02-05 17:56:36,972 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-02-05 17:56:36,973 INFO L435 NwaCegarLoop]: 219 mSDtfsCounter, 436 mSDsluCounter, 235 mSDsCounter, 0 mSdLazyCounter, 270 mSolverCounterSat, 60 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.2s Time, 0 mProtectedPredicate, 0 mProtectedAction, 457 SdHoareTripleChecker+Valid, 454 SdHoareTripleChecker+Invalid, 330 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 60 IncrementalHoareTripleChecker+Valid, 270 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.3s IncrementalHoareTripleChecker+Time [2025-02-05 17:56:36,973 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [457 Valid, 454 Invalid, 330 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [60 Valid, 270 Invalid, 0 Unknown, 0 Unchecked, 0.3s Time] [2025-02-05 17:56:36,979 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8936 states. [2025-02-05 17:56:37,471 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8936 to 8936. [2025-02-05 17:56:37,482 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8936 states, 7257 states have (on average 1.361995314868403) internal successors, (9884), 7602 states have internal predecessors, (9884), 803 states have call successors, (803), 512 states have call predecessors, (803), 874 states have return successors, (2223), 855 states have call predecessors, (2223), 799 states have call successors, (2223) [2025-02-05 17:56:37,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8936 states to 8936 states and 12910 transitions. [2025-02-05 17:56:37,506 INFO L78 Accepts]: Start accepts. Automaton has 8936 states and 12910 transitions. Word has length 108 [2025-02-05 17:56:37,507 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 17:56:37,507 INFO L471 AbstractCegarLoop]: Abstraction has 8936 states and 12910 transitions. [2025-02-05 17:56:37,507 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 18.5) internal successors, (74), 4 states have internal predecessors, (74), 4 states have call successors, (9), 3 states have call predecessors, (9), 2 states have return successors, (8), 4 states have call predecessors, (8), 4 states have call successors, (8) [2025-02-05 17:56:37,507 INFO L276 IsEmpty]: Start isEmpty. Operand 8936 states and 12910 transitions. [2025-02-05 17:56:37,521 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 109 [2025-02-05 17:56:37,522 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:56:37,522 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:56:37,522 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2025-02-05 17:56:37,522 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting error1Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:56:37,523 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:56:37,523 INFO L85 PathProgramCache]: Analyzing trace with hash 1258973650, now seen corresponding path program 1 times [2025-02-05 17:56:37,523 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:56:37,523 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1501260357] [2025-02-05 17:56:37,524 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:56:37,524 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:56:37,533 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 108 statements into 1 equivalence classes. [2025-02-05 17:56:37,538 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 108 of 108 statements. [2025-02-05 17:56:37,541 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:56:37,542 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:56:37,559 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2025-02-05 17:56:37,560 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 17:56:37,560 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1501260357] [2025-02-05 17:56:37,560 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1501260357] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 17:56:37,560 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 17:56:37,560 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-05 17:56:37,560 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [453887322] [2025-02-05 17:56:37,560 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 17:56:37,561 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-02-05 17:56:37,561 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 17:56:37,561 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-05 17:56:37,561 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 17:56:37,562 INFO L87 Difference]: Start difference. First operand 8936 states and 12910 transitions. Second operand has 3 states, 3 states have (on average 21.666666666666668) internal successors, (65), 3 states have internal predecessors, (65), 3 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) [2025-02-05 17:56:37,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 17:56:37,832 INFO L93 Difference]: Finished difference Result 10349 states and 14648 transitions. [2025-02-05 17:56:37,834 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-05 17:56:37,835 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 21.666666666666668) internal successors, (65), 3 states have internal predecessors, (65), 3 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) Word has length 108 [2025-02-05 17:56:37,835 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 17:56:37,862 INFO L225 Difference]: With dead ends: 10349 [2025-02-05 17:56:37,863 INFO L226 Difference]: Without dead ends: 7520 [2025-02-05 17:56:37,871 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 17:56:37,871 INFO L435 NwaCegarLoop]: 346 mSDtfsCounter, 140 mSDsluCounter, 201 mSDsCounter, 0 mSdLazyCounter, 2 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 140 SdHoareTripleChecker+Valid, 547 SdHoareTripleChecker+Invalid, 2 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 17:56:37,871 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [140 Valid, 547 Invalid, 2 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 17:56:37,877 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7520 states. [2025-02-05 17:56:38,224 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7520 to 7520. [2025-02-05 17:56:38,232 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7520 states, 6152 states have (on average 1.3797139141742523) internal successors, (8488), 6468 states have internal predecessors, (8488), 648 states have call successors, (648), 405 states have call predecessors, (648), 718 states have return successors, (1954), 679 states have call predecessors, (1954), 644 states have call successors, (1954) [2025-02-05 17:56:38,248 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7520 states to 7520 states and 11090 transitions. [2025-02-05 17:56:38,253 INFO L78 Accepts]: Start accepts. Automaton has 7520 states and 11090 transitions. Word has length 108 [2025-02-05 17:56:38,253 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 17:56:38,253 INFO L471 AbstractCegarLoop]: Abstraction has 7520 states and 11090 transitions. [2025-02-05 17:56:38,253 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 21.666666666666668) internal successors, (65), 3 states have internal predecessors, (65), 3 states have call successors, (8), 2 states have call predecessors, (8), 1 states have return successors, (7), 3 states have call predecessors, (7), 3 states have call successors, (7) [2025-02-05 17:56:38,253 INFO L276 IsEmpty]: Start isEmpty. Operand 7520 states and 11090 transitions. [2025-02-05 17:56:38,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2025-02-05 17:56:38,264 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:56:38,264 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:56:38,265 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2025-02-05 17:56:38,265 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting error1Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:56:38,265 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:56:38,265 INFO L85 PathProgramCache]: Analyzing trace with hash -439084621, now seen corresponding path program 1 times [2025-02-05 17:56:38,265 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:56:38,265 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1054669729] [2025-02-05 17:56:38,265 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:56:38,266 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:56:38,270 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 110 statements into 1 equivalence classes. [2025-02-05 17:56:38,274 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 110 of 110 statements. [2025-02-05 17:56:38,275 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:56:38,275 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:56:38,336 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 27 proven. 3 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2025-02-05 17:56:38,337 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 17:56:38,337 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1054669729] [2025-02-05 17:56:38,337 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1054669729] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-05 17:56:38,337 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1969985813] [2025-02-05 17:56:38,337 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:56:38,337 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 17:56:38,337 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-05 17:56:38,339 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-05 17:56:38,341 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Waiting until timeout for monitored process [2025-02-05 17:56:38,386 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 110 statements into 1 equivalence classes. [2025-02-05 17:56:38,418 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 110 of 110 statements. [2025-02-05 17:56:38,419 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:56:38,419 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:56:38,421 INFO L256 TraceCheckSpWp]: Trace formula consists of 387 conjuncts, 2 conjuncts are in the unsatisfiable core [2025-02-05 17:56:38,426 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-05 17:56:38,522 INFO L134 CoverageAnalysis]: Checked inductivity of 48 backedges. 33 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2025-02-05 17:56:38,522 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-02-05 17:56:38,523 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1969985813] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 17:56:38,523 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-02-05 17:56:38,523 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [7] total 8 [2025-02-05 17:56:38,523 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1786286934] [2025-02-05 17:56:38,523 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 17:56:38,523 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-02-05 17:56:38,523 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 17:56:38,523 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-05 17:56:38,523 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2025-02-05 17:56:38,524 INFO L87 Difference]: Start difference. First operand 7520 states and 11090 transitions. Second operand has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 2 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2025-02-05 17:56:38,723 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 17:56:38,724 INFO L93 Difference]: Finished difference Result 7606 states and 11190 transitions. [2025-02-05 17:56:38,724 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-05 17:56:38,724 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 2 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 110 [2025-02-05 17:56:38,724 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 17:56:38,742 INFO L225 Difference]: With dead ends: 7606 [2025-02-05 17:56:38,742 INFO L226 Difference]: Without dead ends: 6098 [2025-02-05 17:56:38,747 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 119 GetRequests, 113 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2025-02-05 17:56:38,747 INFO L435 NwaCegarLoop]: 313 mSDtfsCounter, 45 mSDsluCounter, 201 mSDsCounter, 0 mSdLazyCounter, 1 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 45 SdHoareTripleChecker+Valid, 514 SdHoareTripleChecker+Invalid, 1 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 1 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 17:56:38,747 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [45 Valid, 514 Invalid, 1 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 1 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 17:56:38,750 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6098 states. [2025-02-05 17:56:39,011 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6098 to 6098. [2025-02-05 17:56:39,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6098 states, 5033 states have (on average 1.4094973177031591) internal successors, (7094), 5330 states have internal predecessors, (7094), 490 states have call successors, (490), 297 states have call predecessors, (490), 574 states have return successors, (1753), 502 states have call predecessors, (1753), 488 states have call successors, (1753) [2025-02-05 17:56:39,031 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6098 states to 6098 states and 9337 transitions. [2025-02-05 17:56:39,034 INFO L78 Accepts]: Start accepts. Automaton has 6098 states and 9337 transitions. Word has length 110 [2025-02-05 17:56:39,034 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 17:56:39,035 INFO L471 AbstractCegarLoop]: Abstraction has 6098 states and 9337 transitions. [2025-02-05 17:56:39,035 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 26.666666666666668) internal successors, (80), 3 states have internal predecessors, (80), 2 states have call successors, (9), 2 states have call predecessors, (9), 2 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2025-02-05 17:56:39,035 INFO L276 IsEmpty]: Start isEmpty. Operand 6098 states and 9337 transitions. [2025-02-05 17:56:39,045 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2025-02-05 17:56:39,045 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:56:39,046 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:56:39,053 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (2)] Ended with exit code 0 [2025-02-05 17:56:39,247 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 2 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable17 [2025-02-05 17:56:39,248 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:56:39,248 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:56:39,248 INFO L85 PathProgramCache]: Analyzing trace with hash -932006301, now seen corresponding path program 1 times [2025-02-05 17:56:39,248 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:56:39,248 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [406794383] [2025-02-05 17:56:39,248 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:56:39,248 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:56:39,257 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 113 statements into 1 equivalence classes. [2025-02-05 17:56:39,260 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 113 of 113 statements. [2025-02-05 17:56:39,260 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:56:39,260 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:56:39,299 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 17 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2025-02-05 17:56:39,299 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 17:56:39,300 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [406794383] [2025-02-05 17:56:39,300 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [406794383] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-05 17:56:39,300 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1454428247] [2025-02-05 17:56:39,300 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:56:39,300 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 17:56:39,300 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-05 17:56:39,302 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-05 17:56:39,303 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Waiting until timeout for monitored process [2025-02-05 17:56:39,351 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 113 statements into 1 equivalence classes. [2025-02-05 17:56:39,387 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 113 of 113 statements. [2025-02-05 17:56:39,387 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:56:39,387 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:56:39,389 INFO L256 TraceCheckSpWp]: Trace formula consists of 429 conjuncts, 2 conjuncts are in the unsatisfiable core [2025-02-05 17:56:39,391 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-05 17:56:39,436 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 14 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2025-02-05 17:56:39,438 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-02-05 17:56:39,438 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1454428247] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 17:56:39,438 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-02-05 17:56:39,438 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [5] total 6 [2025-02-05 17:56:39,438 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1434703578] [2025-02-05 17:56:39,438 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 17:56:39,438 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-02-05 17:56:39,438 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 17:56:39,439 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-05 17:56:39,439 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 17:56:39,439 INFO L87 Difference]: Start difference. First operand 6098 states and 9337 transitions. Second operand has 3 states, 3 states have (on average 27.333333333333332) internal successors, (82), 2 states have internal predecessors, (82), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 2 states have call predecessors, (7), 2 states have call successors, (7) [2025-02-05 17:56:39,849 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 17:56:39,849 INFO L93 Difference]: Finished difference Result 18079 states and 27833 transitions. [2025-02-05 17:56:39,850 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-05 17:56:39,850 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 27.333333333333332) internal successors, (82), 2 states have internal predecessors, (82), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 2 states have call predecessors, (7), 2 states have call successors, (7) Word has length 113 [2025-02-05 17:56:39,850 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 17:56:39,890 INFO L225 Difference]: With dead ends: 18079 [2025-02-05 17:56:39,890 INFO L226 Difference]: Without dead ends: 11993 [2025-02-05 17:56:39,908 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 113 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 17:56:39,909 INFO L435 NwaCegarLoop]: 198 mSDtfsCounter, 157 mSDsluCounter, 176 mSDsCounter, 0 mSdLazyCounter, 10 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 157 SdHoareTripleChecker+Valid, 374 SdHoareTripleChecker+Invalid, 12 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 10 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 17:56:39,909 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [157 Valid, 374 Invalid, 12 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 10 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 17:56:39,917 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11993 states. [2025-02-05 17:56:40,814 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11993 to 11839. [2025-02-05 17:56:40,828 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11839 states, 9750 states have (on average 1.4071794871794872) internal successors, (13720), 10342 states have internal predecessors, (13720), 944 states have call successors, (944), 589 states have call predecessors, (944), 1144 states have return successors, (3441), 939 states have call predecessors, (3441), 942 states have call successors, (3441) [2025-02-05 17:56:40,857 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11839 states to 11839 states and 18105 transitions. [2025-02-05 17:56:40,863 INFO L78 Accepts]: Start accepts. Automaton has 11839 states and 18105 transitions. Word has length 113 [2025-02-05 17:56:40,864 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 17:56:40,864 INFO L471 AbstractCegarLoop]: Abstraction has 11839 states and 18105 transitions. [2025-02-05 17:56:40,864 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 27.333333333333332) internal successors, (82), 2 states have internal predecessors, (82), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 2 states have call predecessors, (7), 2 states have call successors, (7) [2025-02-05 17:56:40,864 INFO L276 IsEmpty]: Start isEmpty. Operand 11839 states and 18105 transitions. [2025-02-05 17:56:40,879 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2025-02-05 17:56:40,880 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:56:40,880 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:56:40,887 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (3)] Forceful destruction successful, exit code 0 [2025-02-05 17:56:41,080 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18,3 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 17:56:41,080 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:56:41,081 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:56:41,081 INFO L85 PathProgramCache]: Analyzing trace with hash -1914442339, now seen corresponding path program 1 times [2025-02-05 17:56:41,081 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:56:41,081 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [226639529] [2025-02-05 17:56:41,081 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:56:41,081 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:56:41,091 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 113 statements into 1 equivalence classes. [2025-02-05 17:56:41,094 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 113 of 113 statements. [2025-02-05 17:56:41,095 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:56:41,095 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:56:41,143 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 17 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2025-02-05 17:56:41,144 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 17:56:41,144 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [226639529] [2025-02-05 17:56:41,144 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [226639529] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-05 17:56:41,144 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1908454971] [2025-02-05 17:56:41,144 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:56:41,144 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 17:56:41,144 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-05 17:56:41,147 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-05 17:56:41,149 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Waiting until timeout for monitored process [2025-02-05 17:56:41,192 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 113 statements into 1 equivalence classes. [2025-02-05 17:56:41,226 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 113 of 113 statements. [2025-02-05 17:56:41,226 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:56:41,226 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:56:41,227 INFO L256 TraceCheckSpWp]: Trace formula consists of 423 conjuncts, 2 conjuncts are in the unsatisfiable core [2025-02-05 17:56:41,229 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-05 17:56:41,264 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2025-02-05 17:56:41,264 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-02-05 17:56:41,264 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1908454971] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 17:56:41,264 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-02-05 17:56:41,265 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [5] total 6 [2025-02-05 17:56:41,265 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1368743272] [2025-02-05 17:56:41,265 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 17:56:41,265 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-02-05 17:56:41,265 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 17:56:41,265 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-05 17:56:41,265 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 17:56:41,266 INFO L87 Difference]: Start difference. First operand 11839 states and 18105 transitions. Second operand has 3 states, 3 states have (on average 25.333333333333332) internal successors, (76), 2 states have internal predecessors, (76), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 2 states have call predecessors, (7), 2 states have call successors, (7) [2025-02-05 17:56:42,101 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 17:56:42,101 INFO L93 Difference]: Finished difference Result 35100 states and 53979 transitions. [2025-02-05 17:56:42,101 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-05 17:56:42,101 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 25.333333333333332) internal successors, (76), 2 states have internal predecessors, (76), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 2 states have call predecessors, (7), 2 states have call successors, (7) Word has length 113 [2025-02-05 17:56:42,102 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 17:56:42,169 INFO L225 Difference]: With dead ends: 35100 [2025-02-05 17:56:42,170 INFO L226 Difference]: Without dead ends: 23273 [2025-02-05 17:56:42,197 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 113 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 17:56:42,198 INFO L435 NwaCegarLoop]: 198 mSDtfsCounter, 163 mSDsluCounter, 176 mSDsCounter, 0 mSdLazyCounter, 10 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 163 SdHoareTripleChecker+Valid, 374 SdHoareTripleChecker+Invalid, 12 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 10 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 17:56:42,198 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [163 Valid, 374 Invalid, 12 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 10 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 17:56:42,210 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23273 states. [2025-02-05 17:56:43,251 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23273 to 22969. [2025-02-05 17:56:43,269 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22969 states, 18874 states have (on average 1.404683691851224) internal successors, (26512), 20056 states have internal predecessors, (26512), 1818 states have call successors, (1818), 1165 states have call predecessors, (1818), 2276 states have return successors, (6783), 1779 states have call predecessors, (6783), 1816 states have call successors, (6783) [2025-02-05 17:56:43,314 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22969 states to 22969 states and 35113 transitions. [2025-02-05 17:56:43,323 INFO L78 Accepts]: Start accepts. Automaton has 22969 states and 35113 transitions. Word has length 113 [2025-02-05 17:56:43,323 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 17:56:43,323 INFO L471 AbstractCegarLoop]: Abstraction has 22969 states and 35113 transitions. [2025-02-05 17:56:43,323 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 25.333333333333332) internal successors, (76), 2 states have internal predecessors, (76), 2 states have call successors, (8), 2 states have call predecessors, (8), 2 states have return successors, (7), 2 states have call predecessors, (7), 2 states have call successors, (7) [2025-02-05 17:56:43,323 INFO L276 IsEmpty]: Start isEmpty. Operand 22969 states and 35113 transitions. [2025-02-05 17:56:43,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2025-02-05 17:56:43,340 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:56:43,340 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:56:43,346 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (4)] Forceful destruction successful, exit code 0 [2025-02-05 17:56:43,541 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19,4 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 17:56:43,542 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:56:43,542 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:56:43,542 INFO L85 PathProgramCache]: Analyzing trace with hash 762925399, now seen corresponding path program 1 times [2025-02-05 17:56:43,543 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:56:43,543 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [857672056] [2025-02-05 17:56:43,543 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:56:43,543 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:56:43,549 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 113 statements into 1 equivalence classes. [2025-02-05 17:56:43,554 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 113 of 113 statements. [2025-02-05 17:56:43,554 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:56:43,554 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:56:43,587 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 17 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2025-02-05 17:56:43,587 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 17:56:43,587 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [857672056] [2025-02-05 17:56:43,587 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [857672056] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-05 17:56:43,587 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1990388979] [2025-02-05 17:56:43,587 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:56:43,588 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 17:56:43,588 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-05 17:56:43,589 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-05 17:56:43,591 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Waiting until timeout for monitored process [2025-02-05 17:56:43,634 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 113 statements into 1 equivalence classes. [2025-02-05 17:56:43,663 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 113 of 113 statements. [2025-02-05 17:56:43,663 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:56:43,663 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:56:43,664 INFO L256 TraceCheckSpWp]: Trace formula consists of 417 conjuncts, 2 conjuncts are in the unsatisfiable core [2025-02-05 17:56:43,668 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-05 17:56:43,686 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2025-02-05 17:56:43,686 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-02-05 17:56:43,686 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1990388979] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 17:56:43,686 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-02-05 17:56:43,687 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [5] total 6 [2025-02-05 17:56:43,687 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [440407998] [2025-02-05 17:56:43,687 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 17:56:43,687 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-02-05 17:56:43,687 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 17:56:43,687 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-05 17:56:43,687 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 17:56:43,688 INFO L87 Difference]: Start difference. First operand 22969 states and 35113 transitions. Second operand has 3 states, 3 states have (on average 25.666666666666668) internal successors, (77), 3 states have internal predecessors, (77), 3 states have call successors, (9), 3 states have call predecessors, (9), 2 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2025-02-05 17:56:46,139 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 17:56:46,139 INFO L93 Difference]: Finished difference Result 67105 states and 103758 transitions. [2025-02-05 17:56:46,140 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-05 17:56:46,140 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 25.666666666666668) internal successors, (77), 3 states have internal predecessors, (77), 3 states have call successors, (9), 3 states have call predecessors, (9), 2 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 113 [2025-02-05 17:56:46,140 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 17:56:46,313 INFO L225 Difference]: With dead ends: 67105 [2025-02-05 17:56:46,313 INFO L226 Difference]: Without dead ends: 44149 [2025-02-05 17:56:46,370 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 117 GetRequests, 113 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 17:56:46,371 INFO L435 NwaCegarLoop]: 362 mSDtfsCounter, 157 mSDsluCounter, 197 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 157 SdHoareTripleChecker+Valid, 559 SdHoareTripleChecker+Invalid, 13 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 17:56:46,371 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [157 Valid, 559 Invalid, 13 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 17:56:46,404 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44149 states. [2025-02-05 17:56:48,615 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44149 to 44149. [2025-02-05 17:56:48,651 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 44149 states, 36247 states have (on average 1.393604987999007) internal successors, (50514), 38542 states have internal predecessors, (50514), 3423 states have call successors, (3423), 2255 states have call predecessors, (3423), 4478 states have return successors, (13758), 3415 states have call predecessors, (13758), 3421 states have call successors, (13758) [2025-02-05 17:56:48,749 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44149 states to 44149 states and 67695 transitions. [2025-02-05 17:56:48,766 INFO L78 Accepts]: Start accepts. Automaton has 44149 states and 67695 transitions. Word has length 113 [2025-02-05 17:56:48,766 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 17:56:48,766 INFO L471 AbstractCegarLoop]: Abstraction has 44149 states and 67695 transitions. [2025-02-05 17:56:48,766 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 25.666666666666668) internal successors, (77), 3 states have internal predecessors, (77), 3 states have call successors, (9), 3 states have call predecessors, (9), 2 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2025-02-05 17:56:48,766 INFO L276 IsEmpty]: Start isEmpty. Operand 44149 states and 67695 transitions. [2025-02-05 17:56:48,992 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 166 [2025-02-05 17:56:48,992 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:56:48,993 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:56:48,999 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (5)] Forceful destruction successful, exit code 0 [2025-02-05 17:56:49,193 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 5 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable20 [2025-02-05 17:56:49,193 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:56:49,194 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:56:49,194 INFO L85 PathProgramCache]: Analyzing trace with hash 1135531679, now seen corresponding path program 1 times [2025-02-05 17:56:49,194 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:56:49,194 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1797437850] [2025-02-05 17:56:49,194 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:56:49,194 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:56:49,200 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 165 statements into 1 equivalence classes. [2025-02-05 17:56:49,202 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 165 of 165 statements. [2025-02-05 17:56:49,202 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:56:49,202 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:56:49,246 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 32 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked. [2025-02-05 17:56:49,247 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 17:56:49,247 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1797437850] [2025-02-05 17:56:49,247 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1797437850] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-05 17:56:49,247 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2137353649] [2025-02-05 17:56:49,247 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:56:49,247 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 17:56:49,247 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-05 17:56:49,249 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-05 17:56:49,250 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Waiting until timeout for monitored process [2025-02-05 17:56:49,296 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 165 statements into 1 equivalence classes. [2025-02-05 17:56:49,335 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 165 of 165 statements. [2025-02-05 17:56:49,335 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:56:49,335 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:56:49,337 INFO L256 TraceCheckSpWp]: Trace formula consists of 555 conjuncts, 2 conjuncts are in the unsatisfiable core [2025-02-05 17:56:49,339 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-05 17:56:49,416 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 83 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2025-02-05 17:56:49,416 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-02-05 17:56:49,417 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2137353649] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 17:56:49,417 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-02-05 17:56:49,417 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [5] total 6 [2025-02-05 17:56:49,417 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1228146546] [2025-02-05 17:56:49,417 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 17:56:49,417 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-02-05 17:56:49,417 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 17:56:49,418 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-05 17:56:49,418 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 17:56:49,418 INFO L87 Difference]: Start difference. First operand 44149 states and 67695 transitions. Second operand has 3 states, 3 states have (on average 44.0) internal successors, (132), 3 states have internal predecessors, (132), 3 states have call successors, (10), 3 states have call predecessors, (10), 3 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2025-02-05 17:56:51,682 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 17:56:51,683 INFO L93 Difference]: Finished difference Result 66541 states and 101663 transitions. [2025-02-05 17:56:51,684 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-05 17:56:51,684 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 44.0) internal successors, (132), 3 states have internal predecessors, (132), 3 states have call successors, (10), 3 states have call predecessors, (10), 3 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) Word has length 165 [2025-02-05 17:56:51,684 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 17:56:51,827 INFO L225 Difference]: With dead ends: 66541 [2025-02-05 17:56:51,827 INFO L226 Difference]: Without dead ends: 35315 [2025-02-05 17:56:51,912 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 169 GetRequests, 165 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 17:56:51,917 INFO L435 NwaCegarLoop]: 195 mSDtfsCounter, 130 mSDsluCounter, 34 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 130 SdHoareTripleChecker+Valid, 229 SdHoareTripleChecker+Invalid, 12 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 17:56:51,917 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [130 Valid, 229 Invalid, 12 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 17:56:51,947 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35315 states. [2025-02-05 17:56:53,447 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35315 to 25019. [2025-02-05 17:56:53,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25019 states, 20933 states have (on average 1.3440978359528017) internal successors, (28136), 21662 states have internal predecessors, (28136), 1995 states have call successors, (1995), 1403 states have call predecessors, (1995), 2090 states have return successors, (4688), 1985 states have call predecessors, (4688), 1993 states have call successors, (4688) [2025-02-05 17:56:53,509 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25019 states to 25019 states and 34819 transitions. [2025-02-05 17:56:53,531 INFO L78 Accepts]: Start accepts. Automaton has 25019 states and 34819 transitions. Word has length 165 [2025-02-05 17:56:53,531 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 17:56:53,531 INFO L471 AbstractCegarLoop]: Abstraction has 25019 states and 34819 transitions. [2025-02-05 17:56:53,531 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 44.0) internal successors, (132), 3 states have internal predecessors, (132), 3 states have call successors, (10), 3 states have call predecessors, (10), 3 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2025-02-05 17:56:53,532 INFO L276 IsEmpty]: Start isEmpty. Operand 25019 states and 34819 transitions. [2025-02-05 17:56:53,563 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 166 [2025-02-05 17:56:53,563 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:56:53,563 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:56:53,570 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (6)] Ended with exit code 0 [2025-02-05 17:56:53,764 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 6 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable21 [2025-02-05 17:56:53,764 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:56:53,765 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:56:53,765 INFO L85 PathProgramCache]: Analyzing trace with hash -592958054, now seen corresponding path program 1 times [2025-02-05 17:56:53,765 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:56:53,765 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2019313705] [2025-02-05 17:56:53,765 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:56:53,765 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:56:53,770 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 165 statements into 1 equivalence classes. [2025-02-05 17:56:53,772 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 165 of 165 statements. [2025-02-05 17:56:53,772 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:56:53,772 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:56:53,805 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 32 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked. [2025-02-05 17:56:53,806 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 17:56:53,806 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2019313705] [2025-02-05 17:56:53,806 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2019313705] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-05 17:56:53,806 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1558168461] [2025-02-05 17:56:53,806 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:56:53,806 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 17:56:53,806 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-05 17:56:53,808 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-05 17:56:53,810 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Waiting until timeout for monitored process [2025-02-05 17:56:53,856 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 165 statements into 1 equivalence classes. [2025-02-05 17:56:53,894 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 165 of 165 statements. [2025-02-05 17:56:53,894 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:56:53,894 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:56:53,896 INFO L256 TraceCheckSpWp]: Trace formula consists of 552 conjuncts, 2 conjuncts are in the unsatisfiable core [2025-02-05 17:56:53,898 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-05 17:56:53,954 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 82 proven. 0 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2025-02-05 17:56:53,956 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-02-05 17:56:53,956 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1558168461] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 17:56:53,956 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-02-05 17:56:53,956 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [5] total 6 [2025-02-05 17:56:53,956 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [176741266] [2025-02-05 17:56:53,956 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 17:56:53,956 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-02-05 17:56:53,956 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 17:56:53,957 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-05 17:56:53,957 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 17:56:53,957 INFO L87 Difference]: Start difference. First operand 25019 states and 34819 transitions. Second operand has 3 states, 3 states have (on average 43.333333333333336) internal successors, (130), 3 states have internal predecessors, (130), 3 states have call successors, (11), 3 states have call predecessors, (11), 3 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2025-02-05 17:56:54,804 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 17:56:54,804 INFO L93 Difference]: Finished difference Result 41612 states and 58439 transitions. [2025-02-05 17:56:54,805 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-05 17:56:54,805 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 43.333333333333336) internal successors, (130), 3 states have internal predecessors, (130), 3 states have call successors, (11), 3 states have call predecessors, (11), 3 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) Word has length 165 [2025-02-05 17:56:54,805 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 17:56:54,865 INFO L225 Difference]: With dead ends: 41612 [2025-02-05 17:56:54,865 INFO L226 Difference]: Without dead ends: 21172 [2025-02-05 17:56:54,902 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 169 GetRequests, 165 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 17:56:54,903 INFO L435 NwaCegarLoop]: 194 mSDtfsCounter, 145 mSDsluCounter, 33 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 145 SdHoareTripleChecker+Valid, 227 SdHoareTripleChecker+Invalid, 12 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 17:56:54,903 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [145 Valid, 227 Invalid, 12 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 17:56:54,915 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21172 states. [2025-02-05 17:56:55,578 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21172 to 15596. [2025-02-05 17:56:55,591 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 15596 states, 13256 states have (on average 1.3021273385636694) internal successors, (17261), 13490 states have internal predecessors, (17261), 1225 states have call successors, (1225), 907 states have call predecessors, (1225), 1114 states have return successors, (1988), 1214 states have call predecessors, (1988), 1223 states have call successors, (1988) [2025-02-05 17:56:55,615 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 15596 states to 15596 states and 20474 transitions. [2025-02-05 17:56:55,630 INFO L78 Accepts]: Start accepts. Automaton has 15596 states and 20474 transitions. Word has length 165 [2025-02-05 17:56:55,630 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 17:56:55,630 INFO L471 AbstractCegarLoop]: Abstraction has 15596 states and 20474 transitions. [2025-02-05 17:56:55,630 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 43.333333333333336) internal successors, (130), 3 states have internal predecessors, (130), 3 states have call successors, (11), 3 states have call predecessors, (11), 3 states have return successors, (10), 3 states have call predecessors, (10), 3 states have call successors, (10) [2025-02-05 17:56:55,630 INFO L276 IsEmpty]: Start isEmpty. Operand 15596 states and 20474 transitions. [2025-02-05 17:56:55,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 166 [2025-02-05 17:56:55,644 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:56:55,644 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:56:55,650 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (7)] Forceful destruction successful, exit code 0 [2025-02-05 17:56:55,844 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 7 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable22 [2025-02-05 17:56:55,845 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:56:55,845 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:56:55,845 INFO L85 PathProgramCache]: Analyzing trace with hash -1569333573, now seen corresponding path program 1 times [2025-02-05 17:56:55,845 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:56:55,845 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1023712850] [2025-02-05 17:56:55,845 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:56:55,845 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:56:55,851 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 165 statements into 1 equivalence classes. [2025-02-05 17:56:55,855 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 165 of 165 statements. [2025-02-05 17:56:55,855 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:56:55,855 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:56:55,892 INFO L134 CoverageAnalysis]: Checked inductivity of 101 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked. [2025-02-05 17:56:55,892 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 17:56:55,892 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1023712850] [2025-02-05 17:56:55,892 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1023712850] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-05 17:56:55,893 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1418999311] [2025-02-05 17:56:55,893 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:56:55,893 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 17:56:55,893 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-05 17:56:55,895 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-05 17:56:55,896 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Waiting until timeout for monitored process [2025-02-05 17:56:55,941 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 165 statements into 1 equivalence classes. [2025-02-05 17:56:55,979 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 165 of 165 statements. [2025-02-05 17:56:55,979 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:56:55,979 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:56:55,981 INFO L256 TraceCheckSpWp]: Trace formula consists of 543 conjuncts, 3 conjuncts are in the unsatisfiable core [2025-02-05 17:56:55,984 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-05 17:56:56,019 INFO L134 CoverageAnalysis]: Checked inductivity of 101 backedges. 59 proven. 0 refuted. 0 times theorem prover too weak. 42 trivial. 0 not checked. [2025-02-05 17:56:56,020 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-02-05 17:56:56,020 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1418999311] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 17:56:56,020 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-02-05 17:56:56,020 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [5] total 6 [2025-02-05 17:56:56,021 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [755551578] [2025-02-05 17:56:56,021 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 17:56:56,021 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-02-05 17:56:56,021 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 17:56:56,021 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-05 17:56:56,021 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 17:56:56,021 INFO L87 Difference]: Start difference. First operand 15596 states and 20474 transitions. Second operand has 3 states, 3 states have (on average 36.0) internal successors, (108), 3 states have internal predecessors, (108), 3 states have call successors, (10), 3 states have call predecessors, (10), 3 states have return successors, (9), 3 states have call predecessors, (9), 3 states have call successors, (9) [2025-02-05 17:56:56,717 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 17:56:56,717 INFO L93 Difference]: Finished difference Result 27463 states and 35975 transitions. [2025-02-05 17:56:56,717 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-05 17:56:56,717 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 36.0) internal successors, (108), 3 states have internal predecessors, (108), 3 states have call successors, (10), 3 states have call predecessors, (10), 3 states have return successors, (9), 3 states have call predecessors, (9), 3 states have call successors, (9) Word has length 165 [2025-02-05 17:56:56,718 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 17:56:56,772 INFO L225 Difference]: With dead ends: 27463 [2025-02-05 17:56:56,772 INFO L226 Difference]: Without dead ends: 16574 [2025-02-05 17:56:56,786 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 169 GetRequests, 165 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 17:56:56,787 INFO L435 NwaCegarLoop]: 232 mSDtfsCounter, 129 mSDsluCounter, 179 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 129 SdHoareTripleChecker+Valid, 411 SdHoareTripleChecker+Invalid, 10 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 17:56:56,787 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [129 Valid, 411 Invalid, 10 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 17:56:56,796 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 16574 states. [2025-02-05 17:56:57,439 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 16574 to 16459. [2025-02-05 17:56:57,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 16459 states, 14073 states have (on average 1.2814609535990904) internal successors, (18034), 14307 states have internal predecessors, (18034), 1225 states have call successors, (1225), 953 states have call predecessors, (1225), 1160 states have return successors, (2034), 1214 states have call predecessors, (2034), 1223 states have call successors, (2034) [2025-02-05 17:56:57,475 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 16459 states to 16459 states and 21293 transitions. [2025-02-05 17:56:57,492 INFO L78 Accepts]: Start accepts. Automaton has 16459 states and 21293 transitions. Word has length 165 [2025-02-05 17:56:57,492 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 17:56:57,492 INFO L471 AbstractCegarLoop]: Abstraction has 16459 states and 21293 transitions. [2025-02-05 17:56:57,492 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 36.0) internal successors, (108), 3 states have internal predecessors, (108), 3 states have call successors, (10), 3 states have call predecessors, (10), 3 states have return successors, (9), 3 states have call predecessors, (9), 3 states have call successors, (9) [2025-02-05 17:56:57,493 INFO L276 IsEmpty]: Start isEmpty. Operand 16459 states and 21293 transitions. [2025-02-05 17:56:57,506 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 167 [2025-02-05 17:56:57,507 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:56:57,507 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:56:57,513 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (8)] Ended with exit code 0 [2025-02-05 17:56:57,711 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23,8 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 17:56:57,711 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:56:57,711 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:56:57,711 INFO L85 PathProgramCache]: Analyzing trace with hash 244743812, now seen corresponding path program 1 times [2025-02-05 17:56:57,711 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:56:57,711 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1180016099] [2025-02-05 17:56:57,711 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:56:57,712 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:56:57,717 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 166 statements into 1 equivalence classes. [2025-02-05 17:56:57,720 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 166 of 166 statements. [2025-02-05 17:56:57,720 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:56:57,720 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:56:57,753 INFO L134 CoverageAnalysis]: Checked inductivity of 101 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 67 trivial. 0 not checked. [2025-02-05 17:56:57,753 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 17:56:57,753 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1180016099] [2025-02-05 17:56:57,753 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1180016099] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-05 17:56:57,753 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [292768517] [2025-02-05 17:56:57,753 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:56:57,754 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 17:56:57,754 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-05 17:56:57,755 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-05 17:56:57,757 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2025-02-05 17:56:57,799 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 166 statements into 1 equivalence classes. [2025-02-05 17:56:57,836 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 166 of 166 statements. [2025-02-05 17:56:57,836 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:56:57,836 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:56:57,838 INFO L256 TraceCheckSpWp]: Trace formula consists of 544 conjuncts, 2 conjuncts are in the unsatisfiable core [2025-02-05 17:56:57,840 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-05 17:56:57,861 INFO L134 CoverageAnalysis]: Checked inductivity of 101 backedges. 81 proven. 0 refuted. 0 times theorem prover too weak. 20 trivial. 0 not checked. [2025-02-05 17:56:57,862 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-02-05 17:56:57,862 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [292768517] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 17:56:57,862 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-02-05 17:56:57,862 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [5] total 6 [2025-02-05 17:56:57,862 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [302751034] [2025-02-05 17:56:57,862 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 17:56:57,862 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-02-05 17:56:57,862 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 17:56:57,863 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-05 17:56:57,863 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 17:56:57,863 INFO L87 Difference]: Start difference. First operand 16459 states and 21293 transitions. Second operand has 3 states, 3 states have (on average 41.333333333333336) internal successors, (124), 3 states have internal predecessors, (124), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) [2025-02-05 17:56:59,034 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 17:56:59,034 INFO L93 Difference]: Finished difference Result 47009 states and 61517 transitions. [2025-02-05 17:56:59,035 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-05 17:56:59,035 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 41.333333333333336) internal successors, (124), 3 states have internal predecessors, (124), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) Word has length 166 [2025-02-05 17:56:59,036 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 17:56:59,132 INFO L225 Difference]: With dead ends: 47009 [2025-02-05 17:56:59,132 INFO L226 Difference]: Without dead ends: 30569 [2025-02-05 17:56:59,166 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 170 GetRequests, 166 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 17:56:59,167 INFO L435 NwaCegarLoop]: 364 mSDtfsCounter, 153 mSDsluCounter, 191 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 153 SdHoareTripleChecker+Valid, 555 SdHoareTripleChecker+Invalid, 13 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 17:56:59,168 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [153 Valid, 555 Invalid, 13 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 17:56:59,188 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30569 states. [2025-02-05 17:57:00,574 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30569 to 30565. [2025-02-05 17:57:00,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 30565 states, 26037 states have (on average 1.2731113415524062) internal successors, (33148), 26504 states have internal predecessors, (33148), 2327 states have call successors, (2327), 1785 states have call predecessors, (2327), 2200 states have return successors, (4418), 2307 states have call predecessors, (4418), 2325 states have call successors, (4418) [2025-02-05 17:57:00,658 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30565 states to 30565 states and 39893 transitions. [2025-02-05 17:57:00,680 INFO L78 Accepts]: Start accepts. Automaton has 30565 states and 39893 transitions. Word has length 166 [2025-02-05 17:57:00,680 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 17:57:00,680 INFO L471 AbstractCegarLoop]: Abstraction has 30565 states and 39893 transitions. [2025-02-05 17:57:00,680 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 41.333333333333336) internal successors, (124), 3 states have internal predecessors, (124), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) [2025-02-05 17:57:00,681 INFO L276 IsEmpty]: Start isEmpty. Operand 30565 states and 39893 transitions. [2025-02-05 17:57:00,710 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 168 [2025-02-05 17:57:00,710 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:57:00,710 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:57:00,716 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Ended with exit code 0 [2025-02-05 17:57:00,910 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24,9 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 17:57:00,911 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:57:00,911 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:57:00,911 INFO L85 PathProgramCache]: Analyzing trace with hash -1122364439, now seen corresponding path program 1 times [2025-02-05 17:57:00,911 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:57:00,911 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [322596559] [2025-02-05 17:57:00,911 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:57:00,911 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:57:00,916 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 167 statements into 1 equivalence classes. [2025-02-05 17:57:00,918 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 167 of 167 statements. [2025-02-05 17:57:00,918 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:57:00,918 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:57:00,951 INFO L134 CoverageAnalysis]: Checked inductivity of 101 backedges. 0 proven. 33 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2025-02-05 17:57:00,951 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 17:57:00,952 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [322596559] [2025-02-05 17:57:00,952 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [322596559] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-05 17:57:00,952 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1825896628] [2025-02-05 17:57:00,952 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:57:00,952 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 17:57:00,952 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-05 17:57:00,954 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-05 17:57:00,956 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2025-02-05 17:57:01,002 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 167 statements into 1 equivalence classes. [2025-02-05 17:57:01,038 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 167 of 167 statements. [2025-02-05 17:57:01,038 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:57:01,038 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:57:01,040 INFO L256 TraceCheckSpWp]: Trace formula consists of 546 conjuncts, 2 conjuncts are in the unsatisfiable core [2025-02-05 17:57:01,043 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-05 17:57:01,079 INFO L134 CoverageAnalysis]: Checked inductivity of 101 backedges. 78 proven. 0 refuted. 0 times theorem prover too weak. 23 trivial. 0 not checked. [2025-02-05 17:57:01,079 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-02-05 17:57:01,079 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1825896628] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 17:57:01,079 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-02-05 17:57:01,079 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [5] total 6 [2025-02-05 17:57:01,080 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [110825702] [2025-02-05 17:57:01,080 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 17:57:01,080 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-02-05 17:57:01,080 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 17:57:01,080 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-05 17:57:01,080 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 17:57:01,081 INFO L87 Difference]: Start difference. First operand 30565 states and 39893 transitions. Second operand has 3 states, 3 states have (on average 41.0) internal successors, (123), 3 states have internal predecessors, (123), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) [2025-02-05 17:57:02,213 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 17:57:02,213 INFO L93 Difference]: Finished difference Result 52821 states and 69995 transitions. [2025-02-05 17:57:02,213 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-05 17:57:02,213 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 41.0) internal successors, (123), 3 states have internal predecessors, (123), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) Word has length 167 [2025-02-05 17:57:02,213 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 17:57:02,285 INFO L225 Difference]: With dead ends: 52821 [2025-02-05 17:57:02,285 INFO L226 Difference]: Without dead ends: 25203 [2025-02-05 17:57:02,318 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 167 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 17:57:02,319 INFO L435 NwaCegarLoop]: 196 mSDtfsCounter, 151 mSDsluCounter, 32 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 151 SdHoareTripleChecker+Valid, 228 SdHoareTripleChecker+Invalid, 11 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 17:57:02,319 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [151 Valid, 228 Invalid, 11 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 17:57:02,332 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25203 states. [2025-02-05 17:57:03,317 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25203 to 23763. [2025-02-05 17:57:03,335 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 23763 states, 20347 states have (on average 1.2394456185187006) internal successors, (25219), 20590 states have internal predecessors, (25219), 1823 states have call successors, (1823), 1401 states have call predecessors, (1823), 1592 states have return successors, (2897), 1787 states have call predecessors, (2897), 1821 states have call successors, (2897) [2025-02-05 17:57:03,370 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23763 states to 23763 states and 29939 transitions. [2025-02-05 17:57:03,396 INFO L78 Accepts]: Start accepts. Automaton has 23763 states and 29939 transitions. Word has length 167 [2025-02-05 17:57:03,397 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 17:57:03,397 INFO L471 AbstractCegarLoop]: Abstraction has 23763 states and 29939 transitions. [2025-02-05 17:57:03,397 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 41.0) internal successors, (123), 3 states have internal predecessors, (123), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) [2025-02-05 17:57:03,397 INFO L276 IsEmpty]: Start isEmpty. Operand 23763 states and 29939 transitions. [2025-02-05 17:57:03,414 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 168 [2025-02-05 17:57:03,414 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:57:03,414 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:57:03,420 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Ended with exit code 0 [2025-02-05 17:57:03,615 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25,10 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 17:57:03,615 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:57:03,615 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:57:03,615 INFO L85 PathProgramCache]: Analyzing trace with hash 1202934155, now seen corresponding path program 1 times [2025-02-05 17:57:03,615 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:57:03,615 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [804882854] [2025-02-05 17:57:03,616 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:57:03,616 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:57:03,620 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 167 statements into 1 equivalence classes. [2025-02-05 17:57:03,622 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 167 of 167 statements. [2025-02-05 17:57:03,622 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:57:03,622 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:57:03,653 INFO L134 CoverageAnalysis]: Checked inductivity of 103 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 69 trivial. 0 not checked. [2025-02-05 17:57:03,654 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 17:57:03,654 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [804882854] [2025-02-05 17:57:03,654 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [804882854] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-05 17:57:03,654 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1647067016] [2025-02-05 17:57:03,654 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:57:03,654 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 17:57:03,654 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-05 17:57:03,656 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-05 17:57:03,657 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2025-02-05 17:57:03,700 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 167 statements into 1 equivalence classes. [2025-02-05 17:57:03,734 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 167 of 167 statements. [2025-02-05 17:57:03,735 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:57:03,735 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:57:03,736 INFO L256 TraceCheckSpWp]: Trace formula consists of 540 conjuncts, 2 conjuncts are in the unsatisfiable core [2025-02-05 17:57:03,738 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-05 17:57:03,750 INFO L134 CoverageAnalysis]: Checked inductivity of 103 backedges. 77 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2025-02-05 17:57:03,751 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-02-05 17:57:03,751 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1647067016] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 17:57:03,751 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-02-05 17:57:03,751 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [5] total 6 [2025-02-05 17:57:03,751 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1809868179] [2025-02-05 17:57:03,751 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 17:57:03,751 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-02-05 17:57:03,752 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 17:57:03,752 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-05 17:57:03,752 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 17:57:03,752 INFO L87 Difference]: Start difference. First operand 23763 states and 29939 transitions. Second operand has 3 states, 3 states have (on average 40.333333333333336) internal successors, (121), 3 states have internal predecessors, (121), 3 states have call successors, (12), 3 states have call predecessors, (12), 2 states have return successors, (11), 2 states have call predecessors, (11), 3 states have call successors, (11) [2025-02-05 17:57:05,112 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 17:57:05,112 INFO L93 Difference]: Finished difference Result 46875 states and 59666 transitions. [2025-02-05 17:57:05,112 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-05 17:57:05,113 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 40.333333333333336) internal successors, (121), 3 states have internal predecessors, (121), 3 states have call successors, (12), 3 states have call predecessors, (12), 2 states have return successors, (11), 2 states have call predecessors, (11), 3 states have call successors, (11) Word has length 167 [2025-02-05 17:57:05,113 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 17:57:05,210 INFO L225 Difference]: With dead ends: 46875 [2025-02-05 17:57:05,210 INFO L226 Difference]: Without dead ends: 33711 [2025-02-05 17:57:05,237 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 167 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 17:57:05,237 INFO L435 NwaCegarLoop]: 350 mSDtfsCounter, 150 mSDsluCounter, 188 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 150 SdHoareTripleChecker+Valid, 538 SdHoareTripleChecker+Invalid, 12 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 17:57:05,237 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [150 Valid, 538 Invalid, 12 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 17:57:05,257 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33711 states. [2025-02-05 17:57:06,844 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33711 to 33707. [2025-02-05 17:57:06,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33707 states, 28811 states have (on average 1.2345978966367013) internal successors, (35570), 29172 states have internal predecessors, (35570), 2615 states have call successors, (2615), 1993 states have call predecessors, (2615), 2280 states have return successors, (4539), 2557 states have call predecessors, (4539), 2613 states have call successors, (4539) [2025-02-05 17:57:06,923 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33707 states to 33707 states and 42724 transitions. [2025-02-05 17:57:06,950 INFO L78 Accepts]: Start accepts. Automaton has 33707 states and 42724 transitions. Word has length 167 [2025-02-05 17:57:06,951 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 17:57:06,951 INFO L471 AbstractCegarLoop]: Abstraction has 33707 states and 42724 transitions. [2025-02-05 17:57:06,951 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 40.333333333333336) internal successors, (121), 3 states have internal predecessors, (121), 3 states have call successors, (12), 3 states have call predecessors, (12), 2 states have return successors, (11), 2 states have call predecessors, (11), 3 states have call successors, (11) [2025-02-05 17:57:06,951 INFO L276 IsEmpty]: Start isEmpty. Operand 33707 states and 42724 transitions. [2025-02-05 17:57:06,977 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 168 [2025-02-05 17:57:06,977 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:57:06,978 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:57:06,983 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2025-02-05 17:57:07,178 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 11 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable26 [2025-02-05 17:57:07,178 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:57:07,179 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:57:07,179 INFO L85 PathProgramCache]: Analyzing trace with hash 1126147674, now seen corresponding path program 1 times [2025-02-05 17:57:07,179 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:57:07,179 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1953553337] [2025-02-05 17:57:07,179 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:57:07,179 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:57:07,183 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 167 statements into 1 equivalence classes. [2025-02-05 17:57:07,185 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 167 of 167 statements. [2025-02-05 17:57:07,185 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:57:07,185 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:57:07,217 INFO L134 CoverageAnalysis]: Checked inductivity of 104 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 70 trivial. 0 not checked. [2025-02-05 17:57:07,217 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 17:57:07,217 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1953553337] [2025-02-05 17:57:07,217 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1953553337] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-05 17:57:07,218 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [703963301] [2025-02-05 17:57:07,218 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:57:07,218 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 17:57:07,218 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-05 17:57:07,220 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-05 17:57:07,221 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2025-02-05 17:57:07,272 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 167 statements into 1 equivalence classes. [2025-02-05 17:57:07,309 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 167 of 167 statements. [2025-02-05 17:57:07,310 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:57:07,310 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:57:07,312 INFO L256 TraceCheckSpWp]: Trace formula consists of 546 conjuncts, 3 conjuncts are in the unsatisfiable core [2025-02-05 17:57:07,314 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-05 17:57:07,347 INFO L134 CoverageAnalysis]: Checked inductivity of 104 backedges. 63 proven. 0 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2025-02-05 17:57:07,348 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-02-05 17:57:07,348 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [703963301] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 17:57:07,348 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-02-05 17:57:07,348 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [5] total 6 [2025-02-05 17:57:07,348 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [915417394] [2025-02-05 17:57:07,348 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 17:57:07,349 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-02-05 17:57:07,349 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 17:57:07,349 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-05 17:57:07,349 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 17:57:07,349 INFO L87 Difference]: Start difference. First operand 33707 states and 42724 transitions. Second operand has 3 states, 3 states have (on average 37.0) internal successors, (111), 3 states have internal predecessors, (111), 3 states have call successors, (10), 3 states have call predecessors, (10), 3 states have return successors, (9), 3 states have call predecessors, (9), 3 states have call successors, (9) [2025-02-05 17:57:08,932 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 17:57:08,932 INFO L93 Difference]: Finished difference Result 68537 states and 87182 transitions. [2025-02-05 17:57:08,933 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-05 17:57:08,933 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 37.0) internal successors, (111), 3 states have internal predecessors, (111), 3 states have call successors, (10), 3 states have call predecessors, (10), 3 states have return successors, (9), 3 states have call predecessors, (9), 3 states have call successors, (9) Word has length 167 [2025-02-05 17:57:08,933 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 17:57:09,035 INFO L225 Difference]: With dead ends: 68537 [2025-02-05 17:57:09,036 INFO L226 Difference]: Without dead ends: 34857 [2025-02-05 17:57:09,079 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 167 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 17:57:09,080 INFO L435 NwaCegarLoop]: 215 mSDtfsCounter, 150 mSDsluCounter, 166 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 150 SdHoareTripleChecker+Valid, 381 SdHoareTripleChecker+Invalid, 10 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 17:57:09,080 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [150 Valid, 381 Invalid, 10 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 17:57:09,098 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34857 states. [2025-02-05 17:57:10,700 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34857 to 33613. [2025-02-05 17:57:10,720 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33613 states, 28717 states have (on average 1.2239091827140718) internal successors, (35147), 29078 states have internal predecessors, (35147), 2615 states have call successors, (2615), 1993 states have call predecessors, (2615), 2280 states have return successors, (4539), 2557 states have call predecessors, (4539), 2613 states have call successors, (4539) [2025-02-05 17:57:10,771 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33613 states to 33613 states and 42301 transitions. [2025-02-05 17:57:10,800 INFO L78 Accepts]: Start accepts. Automaton has 33613 states and 42301 transitions. Word has length 167 [2025-02-05 17:57:10,800 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 17:57:10,800 INFO L471 AbstractCegarLoop]: Abstraction has 33613 states and 42301 transitions. [2025-02-05 17:57:10,800 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 37.0) internal successors, (111), 3 states have internal predecessors, (111), 3 states have call successors, (10), 3 states have call predecessors, (10), 3 states have return successors, (9), 3 states have call predecessors, (9), 3 states have call successors, (9) [2025-02-05 17:57:10,801 INFO L276 IsEmpty]: Start isEmpty. Operand 33613 states and 42301 transitions. [2025-02-05 17:57:10,821 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2025-02-05 17:57:10,821 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:57:10,821 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:57:10,827 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Forceful destruction successful, exit code 0 [2025-02-05 17:57:11,022 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 12 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable27 [2025-02-05 17:57:11,022 INFO L396 AbstractCegarLoop]: === Iteration 29 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:57:11,022 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:57:11,022 INFO L85 PathProgramCache]: Analyzing trace with hash 1735256851, now seen corresponding path program 1 times [2025-02-05 17:57:11,023 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:57:11,023 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2102063093] [2025-02-05 17:57:11,023 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:57:11,023 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:57:11,027 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 168 statements into 1 equivalence classes. [2025-02-05 17:57:11,029 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 168 of 168 statements. [2025-02-05 17:57:11,029 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:57:11,029 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:57:11,057 INFO L134 CoverageAnalysis]: Checked inductivity of 104 backedges. 0 proven. 33 refuted. 0 times theorem prover too weak. 71 trivial. 0 not checked. [2025-02-05 17:57:11,057 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 17:57:11,057 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2102063093] [2025-02-05 17:57:11,057 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2102063093] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-05 17:57:11,057 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1623848262] [2025-02-05 17:57:11,057 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:57:11,057 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 17:57:11,057 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-05 17:57:11,060 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-05 17:57:11,062 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2025-02-05 17:57:11,105 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 168 statements into 1 equivalence classes. [2025-02-05 17:57:11,140 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 168 of 168 statements. [2025-02-05 17:57:11,141 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:57:11,141 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:57:11,142 INFO L256 TraceCheckSpWp]: Trace formula consists of 548 conjuncts, 3 conjuncts are in the unsatisfiable core [2025-02-05 17:57:11,144 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-05 17:57:11,176 INFO L134 CoverageAnalysis]: Checked inductivity of 104 backedges. 70 proven. 0 refuted. 0 times theorem prover too weak. 34 trivial. 0 not checked. [2025-02-05 17:57:11,176 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-02-05 17:57:11,176 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1623848262] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 17:57:11,176 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-02-05 17:57:11,177 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [5] total 6 [2025-02-05 17:57:11,177 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [304128184] [2025-02-05 17:57:11,177 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 17:57:11,177 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-02-05 17:57:11,177 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 17:57:11,177 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-05 17:57:11,177 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 17:57:11,177 INFO L87 Difference]: Start difference. First operand 33613 states and 42301 transitions. Second operand has 3 states, 3 states have (on average 39.666666666666664) internal successors, (119), 3 states have internal predecessors, (119), 3 states have call successors, (10), 3 states have call predecessors, (10), 3 states have return successors, (9), 3 states have call predecessors, (9), 3 states have call successors, (9) [2025-02-05 17:57:12,892 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 17:57:12,892 INFO L93 Difference]: Finished difference Result 59795 states and 75264 transitions. [2025-02-05 17:57:12,893 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-05 17:57:12,893 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 39.666666666666664) internal successors, (119), 3 states have internal predecessors, (119), 3 states have call successors, (10), 3 states have call predecessors, (10), 3 states have return successors, (9), 3 states have call predecessors, (9), 3 states have call successors, (9) Word has length 168 [2025-02-05 17:57:12,893 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 17:57:12,995 INFO L225 Difference]: With dead ends: 59795 [2025-02-05 17:57:12,995 INFO L226 Difference]: Without dead ends: 34093 [2025-02-05 17:57:13,037 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 172 GetRequests, 168 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 17:57:13,037 INFO L435 NwaCegarLoop]: 220 mSDtfsCounter, 145 mSDsluCounter, 173 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 3 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 145 SdHoareTripleChecker+Valid, 393 SdHoareTripleChecker+Invalid, 11 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 3 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 17:57:13,037 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [145 Valid, 393 Invalid, 11 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [3 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 17:57:13,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34093 states. [2025-02-05 17:57:14,658 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34093 to 33613. [2025-02-05 17:57:14,679 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 33613 states, 28717 states have (on average 1.2182331023435595) internal successors, (34984), 29078 states have internal predecessors, (34984), 2615 states have call successors, (2615), 1993 states have call predecessors, (2615), 2280 states have return successors, (4539), 2557 states have call predecessors, (4539), 2613 states have call successors, (4539) [2025-02-05 17:57:14,731 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33613 states to 33613 states and 42138 transitions. [2025-02-05 17:57:14,763 INFO L78 Accepts]: Start accepts. Automaton has 33613 states and 42138 transitions. Word has length 168 [2025-02-05 17:57:14,763 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 17:57:14,763 INFO L471 AbstractCegarLoop]: Abstraction has 33613 states and 42138 transitions. [2025-02-05 17:57:14,763 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 39.666666666666664) internal successors, (119), 3 states have internal predecessors, (119), 3 states have call successors, (10), 3 states have call predecessors, (10), 3 states have return successors, (9), 3 states have call predecessors, (9), 3 states have call successors, (9) [2025-02-05 17:57:14,763 INFO L276 IsEmpty]: Start isEmpty. Operand 33613 states and 42138 transitions. [2025-02-05 17:57:14,784 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2025-02-05 17:57:14,784 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:57:14,784 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:57:14,790 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Ended with exit code 0 [2025-02-05 17:57:14,984 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 13 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable28 [2025-02-05 17:57:14,984 INFO L396 AbstractCegarLoop]: === Iteration 30 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:57:14,985 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:57:14,985 INFO L85 PathProgramCache]: Analyzing trace with hash -921341229, now seen corresponding path program 1 times [2025-02-05 17:57:14,985 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:57:14,985 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [599286123] [2025-02-05 17:57:14,985 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:57:14,985 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:57:14,990 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 168 statements into 1 equivalence classes. [2025-02-05 17:57:14,991 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 168 of 168 statements. [2025-02-05 17:57:14,991 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:57:14,991 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:57:15,004 INFO L134 CoverageAnalysis]: Checked inductivity of 104 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 104 trivial. 0 not checked. [2025-02-05 17:57:15,005 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 17:57:15,005 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [599286123] [2025-02-05 17:57:15,005 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [599286123] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 17:57:15,005 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 17:57:15,005 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-05 17:57:15,005 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1451092124] [2025-02-05 17:57:15,005 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 17:57:15,005 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-02-05 17:57:15,005 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 17:57:15,005 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-05 17:57:15,005 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 17:57:15,005 INFO L87 Difference]: Start difference. First operand 33613 states and 42138 transitions. Second operand has 3 states, 3 states have (on average 28.0) internal successors, (84), 3 states have internal predecessors, (84), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 3 states have call predecessors, (8), 3 states have call successors, (8) [2025-02-05 17:57:16,228 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 17:57:16,228 INFO L93 Difference]: Finished difference Result 59317 states and 74266 transitions. [2025-02-05 17:57:16,229 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-05 17:57:16,229 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 28.0) internal successors, (84), 3 states have internal predecessors, (84), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 3 states have call predecessors, (8), 3 states have call successors, (8) Word has length 168 [2025-02-05 17:57:16,229 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 17:57:16,309 INFO L225 Difference]: With dead ends: 59317 [2025-02-05 17:57:16,309 INFO L226 Difference]: Without dead ends: 25721 [2025-02-05 17:57:16,345 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 17:57:16,345 INFO L435 NwaCegarLoop]: 191 mSDtfsCounter, 184 mSDsluCounter, 1 mSDsCounter, 0 mSdLazyCounter, 2 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 184 SdHoareTripleChecker+Valid, 192 SdHoareTripleChecker+Invalid, 2 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 17:57:16,345 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [184 Valid, 192 Invalid, 2 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 17:57:16,359 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25721 states. [2025-02-05 17:57:17,526 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25721 to 25721. [2025-02-05 17:57:17,548 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25721 states, 22019 states have (on average 1.222398837367728) internal successors, (26916), 22288 states have internal predecessors, (26916), 1973 states have call successors, (1973), 1513 states have call predecessors, (1973), 1728 states have return successors, (3263), 1927 states have call predecessors, (3263), 1971 states have call successors, (3263) [2025-02-05 17:57:17,593 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25721 states to 25721 states and 32152 transitions. [2025-02-05 17:57:17,635 INFO L78 Accepts]: Start accepts. Automaton has 25721 states and 32152 transitions. Word has length 168 [2025-02-05 17:57:17,636 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 17:57:17,636 INFO L471 AbstractCegarLoop]: Abstraction has 25721 states and 32152 transitions. [2025-02-05 17:57:17,636 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 28.0) internal successors, (84), 3 states have internal predecessors, (84), 3 states have call successors, (9), 2 states have call predecessors, (9), 1 states have return successors, (8), 3 states have call predecessors, (8), 3 states have call successors, (8) [2025-02-05 17:57:17,636 INFO L276 IsEmpty]: Start isEmpty. Operand 25721 states and 32152 transitions. [2025-02-05 17:57:17,654 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 172 [2025-02-05 17:57:17,654 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:57:17,654 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:57:17,654 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2025-02-05 17:57:17,654 INFO L396 AbstractCegarLoop]: === Iteration 31 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:57:17,654 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:57:17,655 INFO L85 PathProgramCache]: Analyzing trace with hash -915631238, now seen corresponding path program 1 times [2025-02-05 17:57:17,655 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:57:17,655 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1593226878] [2025-02-05 17:57:17,655 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:57:17,655 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:57:17,660 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 171 statements into 1 equivalence classes. [2025-02-05 17:57:17,662 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 171 of 171 statements. [2025-02-05 17:57:17,662 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:57:17,662 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:57:17,691 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2025-02-05 17:57:17,691 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 17:57:17,692 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1593226878] [2025-02-05 17:57:17,692 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1593226878] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-05 17:57:17,692 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [936979151] [2025-02-05 17:57:17,692 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:57:17,692 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 17:57:17,692 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-05 17:57:17,694 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-05 17:57:17,695 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2025-02-05 17:57:17,738 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 171 statements into 1 equivalence classes. [2025-02-05 17:57:17,774 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 171 of 171 statements. [2025-02-05 17:57:17,774 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:57:17,774 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:57:17,775 INFO L256 TraceCheckSpWp]: Trace formula consists of 558 conjuncts, 3 conjuncts are in the unsatisfiable core [2025-02-05 17:57:17,777 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-05 17:57:17,810 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 98 proven. 0 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2025-02-05 17:57:17,810 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-02-05 17:57:17,810 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [936979151] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 17:57:17,810 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-02-05 17:57:17,810 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [5] total 6 [2025-02-05 17:57:17,811 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2020894054] [2025-02-05 17:57:17,811 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 17:57:17,811 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-02-05 17:57:17,811 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 17:57:17,812 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-05 17:57:17,812 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 17:57:17,812 INFO L87 Difference]: Start difference. First operand 25721 states and 32152 transitions. Second operand has 3 states, 3 states have (on average 47.333333333333336) internal successors, (142), 3 states have internal predecessors, (142), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) [2025-02-05 17:57:19,023 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 17:57:19,023 INFO L93 Difference]: Finished difference Result 43399 states and 55562 transitions. [2025-02-05 17:57:19,023 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-05 17:57:19,023 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 47.333333333333336) internal successors, (142), 3 states have internal predecessors, (142), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) Word has length 171 [2025-02-05 17:57:19,023 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 17:57:19,101 INFO L225 Difference]: With dead ends: 43399 [2025-02-05 17:57:19,102 INFO L226 Difference]: Without dead ends: 25861 [2025-02-05 17:57:19,130 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 175 GetRequests, 171 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 17:57:19,130 INFO L435 NwaCegarLoop]: 347 mSDtfsCounter, 137 mSDsluCounter, 174 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 137 SdHoareTripleChecker+Valid, 521 SdHoareTripleChecker+Invalid, 10 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 17:57:19,130 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [137 Valid, 521 Invalid, 10 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 17:57:19,141 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25861 states. [2025-02-05 17:57:20,317 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25861 to 25721. [2025-02-05 17:57:20,338 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25721 states, 22019 states have (on average 1.202052772605477) internal successors, (26468), 22288 states have internal predecessors, (26468), 1973 states have call successors, (1973), 1513 states have call predecessors, (1973), 1728 states have return successors, (3263), 1927 states have call predecessors, (3263), 1971 states have call successors, (3263) [2025-02-05 17:57:20,381 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25721 states to 25721 states and 31704 transitions. [2025-02-05 17:57:20,425 INFO L78 Accepts]: Start accepts. Automaton has 25721 states and 31704 transitions. Word has length 171 [2025-02-05 17:57:20,425 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 17:57:20,425 INFO L471 AbstractCegarLoop]: Abstraction has 25721 states and 31704 transitions. [2025-02-05 17:57:20,425 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 47.333333333333336) internal successors, (142), 3 states have internal predecessors, (142), 3 states have call successors, (12), 3 states have call predecessors, (12), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) [2025-02-05 17:57:20,425 INFO L276 IsEmpty]: Start isEmpty. Operand 25721 states and 31704 transitions. [2025-02-05 17:57:20,442 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 173 [2025-02-05 17:57:20,443 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:57:20,443 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:57:20,449 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Ended with exit code 0 [2025-02-05 17:57:20,643 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30,14 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 17:57:20,643 INFO L396 AbstractCegarLoop]: === Iteration 32 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:57:20,644 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:57:20,644 INFO L85 PathProgramCache]: Analyzing trace with hash -1621448339, now seen corresponding path program 1 times [2025-02-05 17:57:20,644 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:57:20,644 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1536337463] [2025-02-05 17:57:20,644 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:57:20,644 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:57:20,650 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 172 statements into 1 equivalence classes. [2025-02-05 17:57:20,652 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 172 of 172 statements. [2025-02-05 17:57:20,652 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:57:20,652 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:57:20,688 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 0 proven. 33 refuted. 0 times theorem prover too weak. 73 trivial. 0 not checked. [2025-02-05 17:57:20,688 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 17:57:20,688 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1536337463] [2025-02-05 17:57:20,688 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1536337463] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-05 17:57:20,688 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [877166113] [2025-02-05 17:57:20,688 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:57:20,689 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 17:57:20,689 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-05 17:57:20,691 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-05 17:57:20,697 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2025-02-05 17:57:20,747 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 172 statements into 1 equivalence classes. [2025-02-05 17:57:20,785 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 172 of 172 statements. [2025-02-05 17:57:20,786 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:57:20,786 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:57:20,788 INFO L256 TraceCheckSpWp]: Trace formula consists of 560 conjuncts, 3 conjuncts are in the unsatisfiable core [2025-02-05 17:57:20,791 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-05 17:57:20,852 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 97 proven. 0 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2025-02-05 17:57:20,852 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-02-05 17:57:20,852 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [877166113] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 17:57:20,852 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-02-05 17:57:20,852 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [5] total 6 [2025-02-05 17:57:20,852 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [783016017] [2025-02-05 17:57:20,853 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 17:57:20,853 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-02-05 17:57:20,854 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 17:57:20,854 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-05 17:57:20,854 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 17:57:20,854 INFO L87 Difference]: Start difference. First operand 25721 states and 31704 transitions. Second operand has 3 states, 3 states have (on average 47.666666666666664) internal successors, (143), 3 states have internal predecessors, (143), 3 states have call successors, (11), 3 states have call predecessors, (11), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) [2025-02-05 17:57:22,089 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 17:57:22,089 INFO L93 Difference]: Finished difference Result 43411 states and 54834 transitions. [2025-02-05 17:57:22,089 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-05 17:57:22,089 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 47.666666666666664) internal successors, (143), 3 states have internal predecessors, (143), 3 states have call successors, (11), 3 states have call predecessors, (11), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) Word has length 172 [2025-02-05 17:57:22,090 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 17:57:22,181 INFO L225 Difference]: With dead ends: 43411 [2025-02-05 17:57:22,181 INFO L226 Difference]: Without dead ends: 25861 [2025-02-05 17:57:22,216 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 176 GetRequests, 172 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2025-02-05 17:57:22,216 INFO L435 NwaCegarLoop]: 297 mSDtfsCounter, 114 mSDsluCounter, 172 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 114 SdHoareTripleChecker+Valid, 469 SdHoareTripleChecker+Invalid, 10 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 17:57:22,216 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [114 Valid, 469 Invalid, 10 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 17:57:22,235 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25861 states. [2025-02-05 17:57:23,611 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25861 to 25721. [2025-02-05 17:57:23,628 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 25721 states, 22019 states have (on average 1.1817067078432264) internal successors, (26020), 22288 states have internal predecessors, (26020), 1973 states have call successors, (1973), 1513 states have call predecessors, (1973), 1728 states have return successors, (3263), 1927 states have call predecessors, (3263), 1971 states have call successors, (3263) [2025-02-05 17:57:23,675 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25721 states to 25721 states and 31256 transitions. [2025-02-05 17:57:23,714 INFO L78 Accepts]: Start accepts. Automaton has 25721 states and 31256 transitions. Word has length 172 [2025-02-05 17:57:23,714 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 17:57:23,715 INFO L471 AbstractCegarLoop]: Abstraction has 25721 states and 31256 transitions. [2025-02-05 17:57:23,715 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 47.666666666666664) internal successors, (143), 3 states have internal predecessors, (143), 3 states have call successors, (11), 3 states have call predecessors, (11), 3 states have return successors, (11), 3 states have call predecessors, (11), 3 states have call successors, (11) [2025-02-05 17:57:23,715 INFO L276 IsEmpty]: Start isEmpty. Operand 25721 states and 31256 transitions. [2025-02-05 17:57:23,731 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2025-02-05 17:57:23,731 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:57:23,731 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:57:23,737 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Ended with exit code 0 [2025-02-05 17:57:23,931 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 15 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable31 [2025-02-05 17:57:23,932 INFO L396 AbstractCegarLoop]: === Iteration 33 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:57:23,932 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:57:23,932 INFO L85 PathProgramCache]: Analyzing trace with hash 1121549314, now seen corresponding path program 1 times [2025-02-05 17:57:23,932 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:57:23,932 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1532458461] [2025-02-05 17:57:23,932 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:57:23,932 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:57:23,937 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 173 statements into 1 equivalence classes. [2025-02-05 17:57:23,939 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 173 of 173 statements. [2025-02-05 17:57:23,939 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:57:23,939 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:57:23,967 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 0 proven. 33 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2025-02-05 17:57:23,968 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 17:57:23,968 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1532458461] [2025-02-05 17:57:23,968 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1532458461] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-05 17:57:23,968 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1374516988] [2025-02-05 17:57:23,968 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:57:23,968 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 17:57:23,969 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-05 17:57:23,970 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-05 17:57:23,972 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2025-02-05 17:57:24,013 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 173 statements into 1 equivalence classes. [2025-02-05 17:57:24,049 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 173 of 173 statements. [2025-02-05 17:57:24,049 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:57:24,049 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:57:24,051 INFO L256 TraceCheckSpWp]: Trace formula consists of 562 conjuncts, 6 conjuncts are in the unsatisfiable core [2025-02-05 17:57:24,053 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-05 17:57:24,131 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 39 proven. 0 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2025-02-05 17:57:24,131 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-02-05 17:57:24,131 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1374516988] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 17:57:24,131 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-02-05 17:57:24,131 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [5] total 8 [2025-02-05 17:57:24,131 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [667473021] [2025-02-05 17:57:24,131 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 17:57:24,132 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-05 17:57:24,132 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 17:57:24,132 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-05 17:57:24,132 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2025-02-05 17:57:24,132 INFO L87 Difference]: Start difference. First operand 25721 states and 31256 transitions. Second operand has 5 states, 5 states have (on average 21.0) internal successors, (105), 4 states have internal predecessors, (105), 2 states have call successors, (9), 3 states have call predecessors, (9), 4 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2025-02-05 17:57:25,086 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 17:57:25,087 INFO L93 Difference]: Finished difference Result 34961 states and 42839 transitions. [2025-02-05 17:57:25,087 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-05 17:57:25,087 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 21.0) internal successors, (105), 4 states have internal predecessors, (105), 2 states have call successors, (9), 3 states have call predecessors, (9), 4 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 173 [2025-02-05 17:57:25,087 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 17:57:25,163 INFO L225 Difference]: With dead ends: 34961 [2025-02-05 17:57:25,163 INFO L226 Difference]: Without dead ends: 17835 [2025-02-05 17:57:25,190 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 178 GetRequests, 171 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2025-02-05 17:57:25,191 INFO L435 NwaCegarLoop]: 126 mSDtfsCounter, 193 mSDsluCounter, 201 mSDsCounter, 0 mSdLazyCounter, 160 mSolverCounterSat, 25 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 202 SdHoareTripleChecker+Valid, 327 SdHoareTripleChecker+Invalid, 185 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 25 IncrementalHoareTripleChecker+Valid, 160 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-02-05 17:57:25,191 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [202 Valid, 327 Invalid, 185 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [25 Valid, 160 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-02-05 17:57:25,201 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 17835 states. [2025-02-05 17:57:26,147 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 17835 to 17787. [2025-02-05 17:57:26,161 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17787 states, 15269 states have (on average 1.1648438011657607) internal successors, (17786), 15380 states have internal predecessors, (17786), 1389 states have call successors, (1389), 1057 states have call predecessors, (1389), 1128 states have return successors, (2102), 1353 states have call predecessors, (2102), 1387 states have call successors, (2102) [2025-02-05 17:57:26,188 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17787 states to 17787 states and 21277 transitions. [2025-02-05 17:57:26,228 INFO L78 Accepts]: Start accepts. Automaton has 17787 states and 21277 transitions. Word has length 173 [2025-02-05 17:57:26,228 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 17:57:26,228 INFO L471 AbstractCegarLoop]: Abstraction has 17787 states and 21277 transitions. [2025-02-05 17:57:26,228 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 21.0) internal successors, (105), 4 states have internal predecessors, (105), 2 states have call successors, (9), 3 states have call predecessors, (9), 4 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2025-02-05 17:57:26,229 INFO L276 IsEmpty]: Start isEmpty. Operand 17787 states and 21277 transitions. [2025-02-05 17:57:26,237 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2025-02-05 17:57:26,237 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:57:26,237 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:57:26,243 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Ended with exit code 0 [2025-02-05 17:57:26,437 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32,16 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 17:57:26,437 INFO L396 AbstractCegarLoop]: === Iteration 34 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:57:26,438 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:57:26,438 INFO L85 PathProgramCache]: Analyzing trace with hash 829163489, now seen corresponding path program 1 times [2025-02-05 17:57:26,438 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:57:26,438 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [870232586] [2025-02-05 17:57:26,438 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:57:26,438 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:57:26,444 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 173 statements into 1 equivalence classes. [2025-02-05 17:57:26,446 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 173 of 173 statements. [2025-02-05 17:57:26,446 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:57:26,446 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:57:26,474 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 0 proven. 33 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2025-02-05 17:57:26,474 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 17:57:26,474 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [870232586] [2025-02-05 17:57:26,475 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [870232586] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-05 17:57:26,475 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [616188550] [2025-02-05 17:57:26,475 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:57:26,475 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 17:57:26,475 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-05 17:57:26,477 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-05 17:57:26,478 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2025-02-05 17:57:26,520 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 173 statements into 1 equivalence classes. [2025-02-05 17:57:26,558 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 173 of 173 statements. [2025-02-05 17:57:26,558 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:57:26,558 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:57:26,562 INFO L256 TraceCheckSpWp]: Trace formula consists of 559 conjuncts, 6 conjuncts are in the unsatisfiable core [2025-02-05 17:57:26,564 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-05 17:57:26,621 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 39 proven. 0 refuted. 0 times theorem prover too weak. 68 trivial. 0 not checked. [2025-02-05 17:57:26,621 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-02-05 17:57:26,621 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [616188550] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 17:57:26,621 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-02-05 17:57:26,621 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [5] total 8 [2025-02-05 17:57:26,621 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [340891680] [2025-02-05 17:57:26,621 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 17:57:26,622 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-05 17:57:26,625 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 17:57:26,626 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-05 17:57:26,626 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2025-02-05 17:57:26,626 INFO L87 Difference]: Start difference. First operand 17787 states and 21277 transitions. Second operand has 5 states, 5 states have (on average 21.0) internal successors, (105), 4 states have internal predecessors, (105), 2 states have call successors, (9), 3 states have call predecessors, (9), 4 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2025-02-05 17:57:27,314 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 17:57:27,315 INFO L93 Difference]: Finished difference Result 26979 states and 32544 transitions. [2025-02-05 17:57:27,316 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-05 17:57:27,316 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 21.0) internal successors, (105), 4 states have internal predecessors, (105), 2 states have call successors, (9), 3 states have call predecessors, (9), 4 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) Word has length 173 [2025-02-05 17:57:27,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 17:57:27,387 INFO L225 Difference]: With dead ends: 26979 [2025-02-05 17:57:27,387 INFO L226 Difference]: Without dead ends: 13391 [2025-02-05 17:57:27,410 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 178 GetRequests, 171 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2025-02-05 17:57:27,410 INFO L435 NwaCegarLoop]: 123 mSDtfsCounter, 189 mSDsluCounter, 197 mSDsCounter, 0 mSdLazyCounter, 160 mSolverCounterSat, 25 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 198 SdHoareTripleChecker+Valid, 320 SdHoareTripleChecker+Invalid, 185 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 25 IncrementalHoareTripleChecker+Valid, 160 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-02-05 17:57:27,410 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [198 Valid, 320 Invalid, 185 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [25 Valid, 160 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-02-05 17:57:27,418 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 13391 states. [2025-02-05 17:57:27,910 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 13391 to 9358. [2025-02-05 17:57:27,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 9358 states, 8052 states have (on average 1.142821659215102) internal successors, (9202), 8109 states have internal predecessors, (9202), 731 states have call successors, (731), 539 states have call predecessors, (731), 574 states have return successors, (1099), 711 states have call predecessors, (1099), 729 states have call successors, (1099) [2025-02-05 17:57:27,929 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 9358 states to 9358 states and 11032 transitions. [2025-02-05 17:57:27,968 INFO L78 Accepts]: Start accepts. Automaton has 9358 states and 11032 transitions. Word has length 173 [2025-02-05 17:57:27,969 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 17:57:27,969 INFO L471 AbstractCegarLoop]: Abstraction has 9358 states and 11032 transitions. [2025-02-05 17:57:27,969 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 21.0) internal successors, (105), 4 states have internal predecessors, (105), 2 states have call successors, (9), 3 states have call predecessors, (9), 4 states have return successors, (8), 2 states have call predecessors, (8), 2 states have call successors, (8) [2025-02-05 17:57:27,969 INFO L276 IsEmpty]: Start isEmpty. Operand 9358 states and 11032 transitions. [2025-02-05 17:57:27,973 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2025-02-05 17:57:27,973 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:57:27,973 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:57:27,980 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Forceful destruction successful, exit code 0 [2025-02-05 17:57:28,174 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33,17 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 17:57:28,174 INFO L396 AbstractCegarLoop]: === Iteration 35 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:57:28,174 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:57:28,174 INFO L85 PathProgramCache]: Analyzing trace with hash 355137506, now seen corresponding path program 1 times [2025-02-05 17:57:28,174 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:57:28,174 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2020749043] [2025-02-05 17:57:28,175 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:57:28,175 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:57:28,180 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 173 statements into 1 equivalence classes. [2025-02-05 17:57:28,181 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 173 of 173 statements. [2025-02-05 17:57:28,181 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:57:28,181 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:57:28,210 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 0 proven. 33 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2025-02-05 17:57:28,210 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 17:57:28,211 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2020749043] [2025-02-05 17:57:28,211 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2020749043] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-05 17:57:28,211 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1458221996] [2025-02-05 17:57:28,211 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:57:28,211 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 17:57:28,211 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-05 17:57:28,213 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-05 17:57:28,217 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2025-02-05 17:57:28,258 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 173 statements into 1 equivalence classes. [2025-02-05 17:57:28,288 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 173 of 173 statements. [2025-02-05 17:57:28,288 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:57:28,289 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:57:28,290 INFO L256 TraceCheckSpWp]: Trace formula consists of 556 conjuncts, 7 conjuncts are in the unsatisfiable core [2025-02-05 17:57:28,291 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-05 17:57:28,312 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 42 proven. 0 refuted. 0 times theorem prover too weak. 65 trivial. 0 not checked. [2025-02-05 17:57:28,313 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-02-05 17:57:28,313 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1458221996] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 17:57:28,313 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-02-05 17:57:28,313 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 8 [2025-02-05 17:57:28,313 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1154551992] [2025-02-05 17:57:28,313 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 17:57:28,313 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-05 17:57:28,313 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 17:57:28,313 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-05 17:57:28,313 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2025-02-05 17:57:28,314 INFO L87 Difference]: Start difference. First operand 9358 states and 11032 transitions. Second operand has 5 states, 5 states have (on average 21.8) internal successors, (109), 5 states have internal predecessors, (109), 2 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2025-02-05 17:57:28,821 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 17:57:28,821 INFO L93 Difference]: Finished difference Result 17659 states and 21174 transitions. [2025-02-05 17:57:28,821 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-05 17:57:28,821 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 21.8) internal successors, (109), 5 states have internal predecessors, (109), 2 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 173 [2025-02-05 17:57:28,822 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 17:57:28,871 INFO L225 Difference]: With dead ends: 17659 [2025-02-05 17:57:28,871 INFO L226 Difference]: Without dead ends: 8318 [2025-02-05 17:57:28,882 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 177 GetRequests, 171 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2025-02-05 17:57:28,882 INFO L435 NwaCegarLoop]: 183 mSDtfsCounter, 0 mSDsluCounter, 543 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 726 SdHoareTripleChecker+Invalid, 17 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 17:57:28,882 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 726 Invalid, 17 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 17 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 17:57:28,886 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8318 states. [2025-02-05 17:57:29,316 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8318 to 8318. [2025-02-05 17:57:29,322 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8318 states, 7164 states have (on average 1.1239530988274706) internal successors, (8052), 7215 states have internal predecessors, (8052), 647 states have call successors, (647), 475 states have call predecessors, (647), 506 states have return successors, (893), 629 states have call predecessors, (893), 645 states have call successors, (893) [2025-02-05 17:57:29,333 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8318 states to 8318 states and 9592 transitions. [2025-02-05 17:57:29,373 INFO L78 Accepts]: Start accepts. Automaton has 8318 states and 9592 transitions. Word has length 173 [2025-02-05 17:57:29,373 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 17:57:29,373 INFO L471 AbstractCegarLoop]: Abstraction has 8318 states and 9592 transitions. [2025-02-05 17:57:29,373 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 21.8) internal successors, (109), 5 states have internal predecessors, (109), 2 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2025-02-05 17:57:29,373 INFO L276 IsEmpty]: Start isEmpty. Operand 8318 states and 9592 transitions. [2025-02-05 17:57:29,376 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2025-02-05 17:57:29,376 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:57:29,376 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:57:29,382 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Ended with exit code 0 [2025-02-05 17:57:29,577 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34,18 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 17:57:29,577 INFO L396 AbstractCegarLoop]: === Iteration 36 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:57:29,577 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:57:29,577 INFO L85 PathProgramCache]: Analyzing trace with hash -2116662973, now seen corresponding path program 1 times [2025-02-05 17:57:29,577 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:57:29,577 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [511689157] [2025-02-05 17:57:29,578 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:57:29,578 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:57:29,583 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 173 statements into 1 equivalence classes. [2025-02-05 17:57:29,585 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 173 of 173 statements. [2025-02-05 17:57:29,585 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:57:29,585 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:57:29,613 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 0 proven. 33 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2025-02-05 17:57:29,614 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 17:57:29,614 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [511689157] [2025-02-05 17:57:29,614 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [511689157] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-05 17:57:29,614 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1474447272] [2025-02-05 17:57:29,614 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:57:29,614 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 17:57:29,614 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-05 17:57:29,616 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-05 17:57:29,617 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2025-02-05 17:57:29,659 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 173 statements into 1 equivalence classes. [2025-02-05 17:57:29,694 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 173 of 173 statements. [2025-02-05 17:57:29,694 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:57:29,694 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:57:29,696 INFO L256 TraceCheckSpWp]: Trace formula consists of 553 conjuncts, 7 conjuncts are in the unsatisfiable core [2025-02-05 17:57:29,698 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-05 17:57:29,721 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 54 proven. 0 refuted. 0 times theorem prover too weak. 53 trivial. 0 not checked. [2025-02-05 17:57:29,721 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-02-05 17:57:29,721 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1474447272] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 17:57:29,721 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-02-05 17:57:29,721 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 8 [2025-02-05 17:57:29,721 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [420967926] [2025-02-05 17:57:29,721 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 17:57:29,721 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-05 17:57:29,721 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 17:57:29,722 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-05 17:57:29,722 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2025-02-05 17:57:29,722 INFO L87 Difference]: Start difference. First operand 8318 states and 9592 transitions. Second operand has 5 states, 5 states have (on average 23.0) internal successors, (115), 5 states have internal predecessors, (115), 2 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2025-02-05 17:57:30,039 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 17:57:30,039 INFO L93 Difference]: Finished difference Result 14433 states and 16830 transitions. [2025-02-05 17:57:30,040 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-05 17:57:30,040 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 23.0) internal successors, (115), 5 states have internal predecessors, (115), 2 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 173 [2025-02-05 17:57:30,040 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 17:57:30,086 INFO L225 Difference]: With dead ends: 14433 [2025-02-05 17:57:30,086 INFO L226 Difference]: Without dead ends: 6132 [2025-02-05 17:57:30,097 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 177 GetRequests, 171 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2025-02-05 17:57:30,097 INFO L435 NwaCegarLoop]: 183 mSDtfsCounter, 0 mSDsluCounter, 543 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 726 SdHoareTripleChecker+Invalid, 17 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 17:57:30,097 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 726 Invalid, 17 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 17 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 17:57:30,100 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6132 states. [2025-02-05 17:57:30,409 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6132 to 6132. [2025-02-05 17:57:30,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6132 states, 5290 states have (on average 1.111531190926276) internal successors, (5880), 5329 states have internal predecessors, (5880), 471 states have call successors, (471), 339 states have call predecessors, (471), 370 states have return successors, (583), 465 states have call predecessors, (583), 469 states have call successors, (583) [2025-02-05 17:57:30,420 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6132 states to 6132 states and 6934 transitions. [2025-02-05 17:57:30,458 INFO L78 Accepts]: Start accepts. Automaton has 6132 states and 6934 transitions. Word has length 173 [2025-02-05 17:57:30,458 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 17:57:30,458 INFO L471 AbstractCegarLoop]: Abstraction has 6132 states and 6934 transitions. [2025-02-05 17:57:30,458 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 23.0) internal successors, (115), 5 states have internal predecessors, (115), 2 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2025-02-05 17:57:30,458 INFO L276 IsEmpty]: Start isEmpty. Operand 6132 states and 6934 transitions. [2025-02-05 17:57:30,460 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2025-02-05 17:57:30,461 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:57:30,461 INFO L218 NwaCegarLoop]: trace histogram [3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:57:30,467 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Ended with exit code 0 [2025-02-05 17:57:30,661 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: 19 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true,SelfDestructingSolverStorable35 [2025-02-05 17:57:30,661 INFO L396 AbstractCegarLoop]: === Iteration 37 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:57:30,662 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:57:30,662 INFO L85 PathProgramCache]: Analyzing trace with hash 1961606755, now seen corresponding path program 1 times [2025-02-05 17:57:30,662 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:57:30,662 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1183701141] [2025-02-05 17:57:30,662 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:57:30,662 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:57:30,667 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 173 statements into 1 equivalence classes. [2025-02-05 17:57:30,669 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 173 of 173 statements. [2025-02-05 17:57:30,669 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:57:30,669 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:57:30,702 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 0 proven. 33 refuted. 0 times theorem prover too weak. 74 trivial. 0 not checked. [2025-02-05 17:57:30,703 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 17:57:30,703 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1183701141] [2025-02-05 17:57:30,703 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1183701141] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-05 17:57:30,703 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1840388286] [2025-02-05 17:57:30,703 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:57:30,703 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 17:57:30,703 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-05 17:57:30,705 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-05 17:57:30,706 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2025-02-05 17:57:30,748 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 173 statements into 1 equivalence classes. [2025-02-05 17:57:30,778 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 173 of 173 statements. [2025-02-05 17:57:30,779 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:57:30,779 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:57:30,780 INFO L256 TraceCheckSpWp]: Trace formula consists of 551 conjuncts, 7 conjuncts are in the unsatisfiable core [2025-02-05 17:57:30,781 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-05 17:57:30,787 INFO L134 CoverageAnalysis]: Checked inductivity of 107 backedges. 66 proven. 0 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2025-02-05 17:57:30,788 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-02-05 17:57:30,788 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1840388286] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 17:57:30,788 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-02-05 17:57:30,788 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 5 [2025-02-05 17:57:30,788 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1375255089] [2025-02-05 17:57:30,788 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 17:57:30,788 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-05 17:57:30,788 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 17:57:30,788 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-05 17:57:30,788 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-02-05 17:57:30,788 INFO L87 Difference]: Start difference. First operand 6132 states and 6934 transitions. Second operand has 5 states, 5 states have (on average 24.4) internal successors, (122), 5 states have internal predecessors, (122), 2 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2025-02-05 17:57:30,998 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 17:57:30,998 INFO L93 Difference]: Finished difference Result 9063 states and 10252 transitions. [2025-02-05 17:57:30,998 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-05 17:57:30,999 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 24.4) internal successors, (122), 5 states have internal predecessors, (122), 2 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) Word has length 173 [2025-02-05 17:57:30,999 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 17:57:31,039 INFO L225 Difference]: With dead ends: 9063 [2025-02-05 17:57:31,039 INFO L226 Difference]: Without dead ends: 1857 [2025-02-05 17:57:31,046 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 177 GetRequests, 174 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-02-05 17:57:31,046 INFO L435 NwaCegarLoop]: 183 mSDtfsCounter, 0 mSDsluCounter, 543 mSDsCounter, 0 mSdLazyCounter, 17 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 726 SdHoareTripleChecker+Invalid, 17 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 17 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 17:57:31,046 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 726 Invalid, 17 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 17 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 17:57:31,047 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1857 states. [2025-02-05 17:57:31,143 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1857 to 1857. [2025-02-05 17:57:31,145 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1857 states, 1590 states have (on average 1.0748427672955976) internal successors, (1709), 1602 states have internal predecessors, (1709), 153 states have call successors, (153), 106 states have call predecessors, (153), 113 states have return successors, (159), 149 states have call predecessors, (159), 151 states have call successors, (159) [2025-02-05 17:57:31,146 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1857 states to 1857 states and 2021 transitions. [2025-02-05 17:57:31,186 INFO L78 Accepts]: Start accepts. Automaton has 1857 states and 2021 transitions. Word has length 173 [2025-02-05 17:57:31,186 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 17:57:31,186 INFO L471 AbstractCegarLoop]: Abstraction has 1857 states and 2021 transitions. [2025-02-05 17:57:31,187 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 24.4) internal successors, (122), 5 states have internal predecessors, (122), 2 states have call successors, (10), 2 states have call predecessors, (10), 2 states have return successors, (10), 2 states have call predecessors, (10), 2 states have call successors, (10) [2025-02-05 17:57:31,187 INFO L276 IsEmpty]: Start isEmpty. Operand 1857 states and 2021 transitions. [2025-02-05 17:57:31,188 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 213 [2025-02-05 17:57:31,188 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:57:31,188 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:57:31,194 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Forceful destruction successful, exit code 0 [2025-02-05 17:57:31,389 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable36,20 /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-05 17:57:31,389 INFO L396 AbstractCegarLoop]: === Iteration 38 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:57:31,389 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:57:31,389 INFO L85 PathProgramCache]: Analyzing trace with hash -683629511, now seen corresponding path program 1 times [2025-02-05 17:57:31,389 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:57:31,389 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1313967112] [2025-02-05 17:57:31,390 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:57:31,390 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:57:31,395 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 212 statements into 1 equivalence classes. [2025-02-05 17:57:31,402 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 212 of 212 statements. [2025-02-05 17:57:31,402 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:57:31,402 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:57:31,503 INFO L134 CoverageAnalysis]: Checked inductivity of 176 backedges. 28 proven. 0 refuted. 0 times theorem prover too weak. 148 trivial. 0 not checked. [2025-02-05 17:57:31,505 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 17:57:31,505 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1313967112] [2025-02-05 17:57:31,505 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1313967112] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 17:57:31,505 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 17:57:31,505 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-05 17:57:31,505 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [671692696] [2025-02-05 17:57:31,505 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 17:57:31,506 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-05 17:57:31,506 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 17:57:31,506 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-05 17:57:31,506 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-02-05 17:57:31,506 INFO L87 Difference]: Start difference. First operand 1857 states and 2021 transitions. Second operand has 5 states, 5 states have (on average 24.2) internal successors, (121), 5 states have internal predecessors, (121), 5 states have call successors, (11), 2 states have call predecessors, (11), 1 states have return successors, (10), 4 states have call predecessors, (10), 4 states have call successors, (10) [2025-02-05 17:57:31,767 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 17:57:31,767 INFO L93 Difference]: Finished difference Result 1859 states and 2022 transitions. [2025-02-05 17:57:31,768 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-05 17:57:31,768 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 24.2) internal successors, (121), 5 states have internal predecessors, (121), 5 states have call successors, (11), 2 states have call predecessors, (11), 1 states have return successors, (10), 4 states have call predecessors, (10), 4 states have call successors, (10) Word has length 212 [2025-02-05 17:57:31,768 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 17:57:31,805 INFO L225 Difference]: With dead ends: 1859 [2025-02-05 17:57:31,805 INFO L226 Difference]: Without dead ends: 1856 [2025-02-05 17:57:31,805 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-02-05 17:57:31,806 INFO L435 NwaCegarLoop]: 382 mSDtfsCounter, 348 mSDsluCounter, 620 mSDsCounter, 0 mSdLazyCounter, 153 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 348 SdHoareTripleChecker+Valid, 1002 SdHoareTripleChecker+Invalid, 154 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 153 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-02-05 17:57:31,806 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [348 Valid, 1002 Invalid, 154 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 153 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-02-05 17:57:31,807 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1856 states. [2025-02-05 17:57:31,911 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1856 to 1856. [2025-02-05 17:57:31,913 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1856 states, 1590 states have (on average 1.0735849056603775) internal successors, (1707), 1601 states have internal predecessors, (1707), 152 states have call successors, (152), 106 states have call predecessors, (152), 113 states have return successors, (159), 149 states have call predecessors, (159), 151 states have call successors, (159) [2025-02-05 17:57:31,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1856 states to 1856 states and 2018 transitions. [2025-02-05 17:57:31,950 INFO L78 Accepts]: Start accepts. Automaton has 1856 states and 2018 transitions. Word has length 212 [2025-02-05 17:57:31,950 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 17:57:31,950 INFO L471 AbstractCegarLoop]: Abstraction has 1856 states and 2018 transitions. [2025-02-05 17:57:31,950 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 24.2) internal successors, (121), 5 states have internal predecessors, (121), 5 states have call successors, (11), 2 states have call predecessors, (11), 1 states have return successors, (10), 4 states have call predecessors, (10), 4 states have call successors, (10) [2025-02-05 17:57:31,950 INFO L276 IsEmpty]: Start isEmpty. Operand 1856 states and 2018 transitions. [2025-02-05 17:57:31,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 217 [2025-02-05 17:57:31,952 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:57:31,952 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:57:31,952 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable37 [2025-02-05 17:57:31,952 INFO L396 AbstractCegarLoop]: === Iteration 39 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:57:31,952 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:57:31,952 INFO L85 PathProgramCache]: Analyzing trace with hash 1488521425, now seen corresponding path program 1 times [2025-02-05 17:57:31,953 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:57:31,953 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1495307353] [2025-02-05 17:57:31,953 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:57:31,953 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:57:31,958 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 216 statements into 1 equivalence classes. [2025-02-05 17:57:31,962 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 216 of 216 statements. [2025-02-05 17:57:31,962 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:57:31,962 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 17:57:31,980 INFO L134 CoverageAnalysis]: Checked inductivity of 176 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 176 trivial. 0 not checked. [2025-02-05 17:57:31,980 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 17:57:31,980 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1495307353] [2025-02-05 17:57:31,980 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1495307353] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 17:57:31,980 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 17:57:31,981 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-05 17:57:31,981 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1655234131] [2025-02-05 17:57:31,981 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 17:57:31,981 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-02-05 17:57:31,981 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 17:57:31,981 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-05 17:57:31,981 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 17:57:31,982 INFO L87 Difference]: Start difference. First operand 1856 states and 2018 transitions. Second operand has 3 states, 3 states have (on average 35.666666666666664) internal successors, (107), 3 states have internal predecessors, (107), 2 states have call successors, (10), 2 states have call predecessors, (10), 1 states have return successors, (9), 1 states have call predecessors, (9), 1 states have call successors, (9) [2025-02-05 17:57:32,097 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 17:57:32,098 INFO L93 Difference]: Finished difference Result 2588 states and 2809 transitions. [2025-02-05 17:57:32,098 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-05 17:57:32,098 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 35.666666666666664) internal successors, (107), 3 states have internal predecessors, (107), 2 states have call successors, (10), 2 states have call predecessors, (10), 1 states have return successors, (9), 1 states have call predecessors, (9), 1 states have call successors, (9) Word has length 216 [2025-02-05 17:57:32,100 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 17:57:32,141 INFO L225 Difference]: With dead ends: 2588 [2025-02-05 17:57:32,144 INFO L226 Difference]: Without dead ends: 1858 [2025-02-05 17:57:32,146 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 17:57:32,146 INFO L435 NwaCegarLoop]: 181 mSDtfsCounter, 0 mSDsluCounter, 170 mSDsCounter, 0 mSdLazyCounter, 12 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 0 SdHoareTripleChecker+Valid, 351 SdHoareTripleChecker+Invalid, 12 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 12 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 17:57:32,146 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [0 Valid, 351 Invalid, 12 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 12 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 17:57:32,147 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1858 states. [2025-02-05 17:57:32,256 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1858 to 1858. [2025-02-05 17:57:32,257 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1858 states, 1592 states have (on average 1.0734924623115578) internal successors, (1709), 1603 states have internal predecessors, (1709), 152 states have call successors, (152), 106 states have call predecessors, (152), 113 states have return successors, (159), 149 states have call predecessors, (159), 151 states have call successors, (159) [2025-02-05 17:57:32,259 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1858 states to 1858 states and 2020 transitions. [2025-02-05 17:57:32,298 INFO L78 Accepts]: Start accepts. Automaton has 1858 states and 2020 transitions. Word has length 216 [2025-02-05 17:57:32,299 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 17:57:32,299 INFO L471 AbstractCegarLoop]: Abstraction has 1858 states and 2020 transitions. [2025-02-05 17:57:32,299 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 35.666666666666664) internal successors, (107), 3 states have internal predecessors, (107), 2 states have call successors, (10), 2 states have call predecessors, (10), 1 states have return successors, (9), 1 states have call predecessors, (9), 1 states have call successors, (9) [2025-02-05 17:57:32,299 INFO L276 IsEmpty]: Start isEmpty. Operand 1858 states and 2020 transitions. [2025-02-05 17:57:32,300 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 218 [2025-02-05 17:57:32,300 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 17:57:32,300 INFO L218 NwaCegarLoop]: trace histogram [4, 4, 4, 4, 4, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:57:32,301 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable38 [2025-02-05 17:57:32,301 INFO L396 AbstractCegarLoop]: === Iteration 40 === Targeting error2Err0ASSERT_VIOLATIONERROR_FUNCTION === [error1Err0ASSERT_VIOLATIONERROR_FUNCTION, error2Err0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 17:57:32,301 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 17:57:32,301 INFO L85 PathProgramCache]: Analyzing trace with hash -1928980851, now seen corresponding path program 1 times [2025-02-05 17:57:32,301 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 17:57:32,301 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [308905619] [2025-02-05 17:57:32,301 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 17:57:32,301 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 17:57:32,306 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 217 statements into 1 equivalence classes. [2025-02-05 17:57:32,311 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 217 of 217 statements. [2025-02-05 17:57:32,312 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:57:32,312 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-05 17:57:32,312 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-05 17:57:32,315 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 217 statements into 1 equivalence classes. [2025-02-05 17:57:32,321 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 217 of 217 statements. [2025-02-05 17:57:32,324 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 17:57:32,324 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-05 17:57:32,394 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-05 17:57:32,394 INFO L340 BasicCegarLoop]: Counterexample is feasible [2025-02-05 17:57:32,395 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location error2Err0ASSERT_VIOLATIONERROR_FUNCTION (1 of 2 remaining) [2025-02-05 17:57:32,396 INFO L782 garLoopResultBuilder]: Registering result UNKNOWN for location error1Err0ASSERT_VIOLATIONERROR_FUNCTION (0 of 2 remaining) [2025-02-05 17:57:32,396 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable39 [2025-02-05 17:57:32,398 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 17:57:32,551 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2025-02-05 17:57:32,555 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 05.02 05:57:32 BoogieIcfgContainer [2025-02-05 17:57:32,555 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2025-02-05 17:57:32,556 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-02-05 17:57:32,556 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-02-05 17:57:32,556 INFO L274 PluginConnector]: Witness Printer initialized [2025-02-05 17:57:32,557 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 05.02 05:56:22" (3/4) ... [2025-02-05 17:57:32,558 INFO L140 WitnessPrinter]: Generating witness for reachability counterexample [2025-02-05 17:57:32,701 INFO L127 tionWitnessGenerator]: Generated YAML witness of length 160. [2025-02-05 17:57:32,786 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/witness.graphml [2025-02-05 17:57:32,786 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/witness.yml [2025-02-05 17:57:32,786 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-02-05 17:57:32,787 INFO L158 Benchmark]: Toolchain (without parser) took 70943.97ms. Allocated memory was 142.6MB in the beginning and 6.7GB in the end (delta: 6.5GB). Free memory was 112.0MB in the beginning and 2.7GB in the end (delta: -2.6GB). Peak memory consumption was 3.9GB. Max. memory is 16.1GB. [2025-02-05 17:57:32,787 INFO L158 Benchmark]: CDTParser took 0.22ms. Allocated memory is still 201.3MB. Free memory is still 123.7MB. There was no memory consumed. Max. memory is 16.1GB. [2025-02-05 17:57:32,787 INFO L158 Benchmark]: CACSL2BoogieTranslator took 331.09ms. Allocated memory is still 142.6MB. Free memory was 111.6MB in the beginning and 93.7MB in the end (delta: 17.9MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-02-05 17:57:32,787 INFO L158 Benchmark]: Boogie Procedure Inliner took 50.15ms. Allocated memory is still 142.6MB. Free memory was 93.7MB in the beginning and 91.5MB in the end (delta: 2.2MB). There was no memory consumed. Max. memory is 16.1GB. [2025-02-05 17:57:32,787 INFO L158 Benchmark]: Boogie Preprocessor took 47.99ms. Allocated memory is still 142.6MB. Free memory was 91.1MB in the beginning and 88.9MB in the end (delta: 2.1MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-02-05 17:57:32,788 INFO L158 Benchmark]: IcfgBuilder took 546.84ms. Allocated memory is still 142.6MB. Free memory was 88.9MB in the beginning and 52.8MB in the end (delta: 36.2MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. [2025-02-05 17:57:32,788 INFO L158 Benchmark]: TraceAbstraction took 69731.44ms. Allocated memory was 142.6MB in the beginning and 6.7GB in the end (delta: 6.5GB). Free memory was 51.9MB in the beginning and 2.8GB in the end (delta: -2.7GB). Peak memory consumption was 3.8GB. Max. memory is 16.1GB. [2025-02-05 17:57:32,788 INFO L158 Benchmark]: Witness Printer took 230.43ms. Allocated memory is still 6.7GB. Free memory was 2.8GB in the beginning and 2.7GB in the end (delta: 46.1MB). Peak memory consumption was 50.3MB. Max. memory is 16.1GB. [2025-02-05 17:57:32,788 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.22ms. Allocated memory is still 201.3MB. Free memory is still 123.7MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 331.09ms. Allocated memory is still 142.6MB. Free memory was 111.6MB in the beginning and 93.7MB in the end (delta: 17.9MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 50.15ms. Allocated memory is still 142.6MB. Free memory was 93.7MB in the beginning and 91.5MB in the end (delta: 2.2MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 47.99ms. Allocated memory is still 142.6MB. Free memory was 91.1MB in the beginning and 88.9MB in the end (delta: 2.1MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * IcfgBuilder took 546.84ms. Allocated memory is still 142.6MB. Free memory was 88.9MB in the beginning and 52.8MB in the end (delta: 36.2MB). Peak memory consumption was 33.6MB. Max. memory is 16.1GB. * TraceAbstraction took 69731.44ms. Allocated memory was 142.6MB in the beginning and 6.7GB in the end (delta: 6.5GB). Free memory was 51.9MB in the beginning and 2.8GB in the end (delta: -2.7GB). Peak memory consumption was 3.8GB. Max. memory is 16.1GB. * Witness Printer took 230.43ms. Allocated memory is still 6.7GB. Free memory was 2.8GB in the beginning and 2.7GB in the end (delta: 46.1MB). Peak memory consumption was 50.3MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 599]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L32] int fast_clk_edge ; [L33] int slow_clk_edge ; [L34] int q_buf_0 ; [L35] int q_free ; [L36] int q_read_ev ; [L37] int q_write_ev ; [L38] int q_req_up ; [L39] int q_ev ; [L60] int p_num_write ; [L61] int p_last_write ; [L62] int p_dw_st ; [L63] int p_dw_pc ; [L64] int p_dw_i ; [L65] int c_num_read ; [L66] int c_last_read ; [L67] int c_dr_st ; [L68] int c_dr_pc ; [L69] int c_dr_i ; [L202] static int a_t ; [L352] static int t = 0; [L603] int m_pc = 0; [L604] int t1_pc = 0; [L605] int t2_pc = 0; [L606] int m_st ; [L607] int t1_st ; [L608] int t2_st ; [L609] int m_i ; [L610] int t1_i ; [L611] int t2_i ; [L612] int M_E = 2; [L613] int T1_E = 2; [L614] int T2_E = 2; [L615] int E_M = 2; [L616] int E_1 = 2; [L617] int E_2 = 2; [L622] int token ; [L624] int local ; VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=0, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=0, t1_pc=0, t1_st=0, t2_i=0, t2_pc=0, t2_st=0, t=0, token=0] [L1202] COND FALSE !(__VERIFIER_nondet_int()) [L1205] CALL main2() [L1189] int __retres1 ; [L1193] CALL init_model2() [L1103] m_i = 1 [L1104] t1_i = 1 [L1105] t2_i = 1 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L1193] RET init_model2() [L1194] CALL start_simulation2() [L1130] int kernel_st ; [L1131] int tmp ; [L1132] int tmp___0 ; [L1136] kernel_st = 0 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L1137] FCALL update_channels2() VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L1138] CALL init_threads2() [L822] COND TRUE m_i == 1 [L823] m_st = 0 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L827] COND TRUE t1_i == 1 [L828] t1_st = 0 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L832] COND TRUE t2_i == 1 [L833] t2_st = 0 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L1138] RET init_threads2() [L1139] CALL fire_delta_events2() VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(E_1)=2, \old(E_2)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, \old(T2_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L935] COND FALSE !(M_E == 0) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(E_1)=2, \old(E_2)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, \old(T2_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L940] COND FALSE !(T1_E == 0) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(E_1)=2, \old(E_2)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, \old(T2_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L945] COND FALSE !(T2_E == 0) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(E_1)=2, \old(E_2)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, \old(T2_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L950] COND FALSE !(E_M == 0) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(E_1)=2, \old(E_2)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, \old(T2_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L955] COND FALSE !(E_1 == 0) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(E_1)=2, \old(E_2)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, \old(T2_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L960] COND FALSE !(E_2 == 0) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(E_1)=2, \old(E_2)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, \old(T2_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L1139] RET fire_delta_events2() VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L1140] CALL activate_threads2() VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L1008] int tmp ; [L1009] int tmp___0 ; [L1010] int tmp___1 ; [L1014] CALL, EXPR is_master_triggered() [L754] int __retres1 ; VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L757] COND FALSE !(m_pc == 1) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L767] __retres1 = 0 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L769] return (__retres1); VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, \result=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L1014] RET, EXPR is_master_triggered() [L1014] tmp = is_master_triggered() [L1016] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L1022] CALL, EXPR is_transmit1_triggered() [L773] int __retres1 ; VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L776] COND FALSE !(t1_pc == 1) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L786] __retres1 = 0 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L788] return (__retres1); VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, \result=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L1022] RET, EXPR is_transmit1_triggered() [L1022] tmp___0 = is_transmit1_triggered() [L1024] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L1030] CALL, EXPR is_transmit2_triggered() [L792] int __retres1 ; VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L795] COND FALSE !(t2_pc == 1) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L805] __retres1 = 0 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L807] return (__retres1); VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, \result=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L1030] RET, EXPR is_transmit2_triggered() [L1030] tmp___1 = is_transmit2_triggered() [L1032] COND FALSE !(\read(tmp___1)) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=0, \old(t1_st)=0, \old(t2_st)=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L1140] RET activate_threads2() VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L1141] CALL reset_delta_events2() VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(E_1)=2, \old(E_2)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, \old(T2_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L973] COND FALSE !(M_E == 1) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(E_1)=2, \old(E_2)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, \old(T2_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L978] COND FALSE !(T1_E == 1) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(E_1)=2, \old(E_2)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, \old(T2_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L983] COND FALSE !(T2_E == 1) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(E_1)=2, \old(E_2)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, \old(T2_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L988] COND FALSE !(E_M == 1) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(E_1)=2, \old(E_2)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, \old(T2_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L993] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(E_1)=2, \old(E_2)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, \old(T2_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L998] COND FALSE !(E_2 == 1) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(E_1)=2, \old(E_2)=2, \old(E_M)=2, \old(M_E)=2, \old(T1_E)=2, \old(T2_E)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L1141] RET reset_delta_events2() VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L1144] COND TRUE 1 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L1147] kernel_st = 1 [L1148] CALL eval2() [L868] int tmp ; VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L872] COND TRUE 1 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L875] CALL, EXPR exists_runnable_thread2() VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L842] int __retres1 ; VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L845] COND TRUE m_st == 0 [L846] __retres1 = 1 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, __retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L863] return (__retres1); VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \result=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L875] RET, EXPR exists_runnable_thread2() VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L875] tmp = exists_runnable_thread2() [L877] COND TRUE \read(tmp) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L882] COND TRUE m_st == 0 [L883] int tmp_ndt_1; [L884] tmp_ndt_1 = __VERIFIER_nondet_int() [L885] COND FALSE !(\read(tmp_ndt_1)) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=0, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L896] COND TRUE t1_st == 0 [L897] int tmp_ndt_2; [L898] tmp_ndt_2 = __VERIFIER_nondet_int() [L899] COND TRUE \read(tmp_ndt_2) [L901] t1_st = 1 [L902] CALL transmit1() [L685] COND TRUE t1_pc == 0 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=1, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L696] COND TRUE 1 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=0, t1_st=1, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L698] t1_pc = 1 [L699] t1_st = 2 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=0, t2_st=0, t=0, token=0] [L902] RET transmit1() [L910] COND TRUE t2_st == 0 [L911] int tmp_ndt_3; [L912] tmp_ndt_3 = __VERIFIER_nondet_int() [L913] COND TRUE \read(tmp_ndt_3) [L915] t2_st = 1 [L916] CALL transmit2() [L721] COND TRUE t2_pc == 0 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=0, t2_st=1, t=0, token=0] [L732] COND TRUE 1 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=0, t2_st=1, t=0, token=0] [L734] t2_pc = 1 [L735] t2_st = 2 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L916] RET transmit2() [L872] COND TRUE 1 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L875] CALL, EXPR exists_runnable_thread2() VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L842] int __retres1 ; VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L845] COND TRUE m_st == 0 [L846] __retres1 = 1 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, __retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L863] return (__retres1); VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \result=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L875] RET, EXPR exists_runnable_thread2() VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L875] tmp = exists_runnable_thread2() [L877] COND TRUE \read(tmp) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L882] COND TRUE m_st == 0 [L883] int tmp_ndt_1; [L884] tmp_ndt_1 = __VERIFIER_nondet_int() [L885] COND TRUE \read(tmp_ndt_1) [L887] m_st = 1 [L888] CALL master() [L627] int tmp_var = __VERIFIER_nondet_int(); [L629] COND TRUE m_pc == 0 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, tmp_var=0, token=0] [L640] COND TRUE 1 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, tmp_var=0, token=0] [L643] token = __VERIFIER_nondet_int() [L644] local = token [L645] E_1 = 1 VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, tmp_var=0, token=0] [L646] CALL immediate_notify() VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L1046] CALL activate_threads2() VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L1008] int tmp ; [L1009] int tmp___0 ; [L1010] int tmp___1 ; [L1014] CALL, EXPR is_master_triggered() [L754] int __retres1 ; VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L757] COND FALSE !(m_pc == 1) VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L767] __retres1 = 0 VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L769] return (__retres1); VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \result=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L1014] RET, EXPR is_master_triggered() [L1014] tmp = is_master_triggered() [L1016] COND FALSE !(\read(tmp)) VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L1022] CALL, EXPR is_transmit1_triggered() [L773] int __retres1 ; VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L776] COND TRUE t1_pc == 1 VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L777] COND TRUE E_1 == 1 [L778] __retres1 = 1 VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, __retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L788] return (__retres1); VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \result=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L1022] RET, EXPR is_transmit1_triggered() [L1022] tmp___0 = is_transmit1_triggered() [L1024] COND TRUE \read(tmp___0) [L1025] t1_st = 0 VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=0, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L1030] CALL, EXPR is_transmit2_triggered() [L792] int __retres1 ; VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=0, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L795] COND TRUE t2_pc == 1 VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=0, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L796] COND FALSE !(E_2 == 1) VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=0, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L805] __retres1 = 0 VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=0, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L807] return (__retres1); VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, \result=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=0, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L1030] RET, EXPR is_transmit2_triggered() [L1030] tmp___1 = is_transmit2_triggered() [L1032] COND FALSE !(\read(tmp___1)) VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=0, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L1046] RET activate_threads2() VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=1, \old(t1_st)=2, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=0, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L646] RET immediate_notify() VAL [E_1=1, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=0, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=0, t2_i=1, t2_pc=1, t2_st=2, t=0, tmp_var=0, token=0] [L647] E_1 = 2 [L648] m_pc = 1 [L649] m_st = 2 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=0, t2_i=1, t2_pc=1, t2_st=2, t=0, tmp_var=0, token=0] [L888] RET master() [L896] COND TRUE t1_st == 0 [L897] int tmp_ndt_2; [L898] tmp_ndt_2 = __VERIFIER_nondet_int() [L899] COND TRUE \read(tmp_ndt_2) [L901] t1_st = 1 [L902] CALL transmit1() [L685] COND FALSE !(t1_pc == 0) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L688] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=0] [L704] token += 1 [L705] E_2 = 1 VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=1] [L706] CALL immediate_notify() VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=1] [L1046] CALL activate_threads2() VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=1] [L1008] int tmp ; [L1009] int tmp___0 ; [L1010] int tmp___1 ; [L1014] CALL, EXPR is_master_triggered() [L754] int __retres1 ; VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=1] [L757] COND TRUE m_pc == 1 VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=1] [L758] COND FALSE !(E_M == 1) VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=1] [L767] __retres1 = 0 VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=1] [L769] return (__retres1); VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \result=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=1] [L1014] RET, EXPR is_master_triggered() [L1014] tmp = is_master_triggered() [L1016] COND FALSE !(\read(tmp)) VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=1] [L1022] CALL, EXPR is_transmit1_triggered() [L773] int __retres1 ; VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=1] [L776] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=1] [L777] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=1] [L786] __retres1 = 0 VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=1] [L788] return (__retres1); VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \result=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=1] [L1022] RET, EXPR is_transmit1_triggered() [L1022] tmp___0 = is_transmit1_triggered() [L1024] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=1] [L1030] CALL, EXPR is_transmit2_triggered() [L792] int __retres1 ; VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=1] [L795] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=1] [L796] COND TRUE E_2 == 1 [L797] __retres1 = 1 VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, __retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=1] [L807] return (__retres1); VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, \result=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=2, t=0, token=1] [L1030] RET, EXPR is_transmit2_triggered() [L1030] tmp___1 = is_transmit2_triggered() [L1032] COND TRUE \read(tmp___1) [L1033] t2_st = 0 VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=0, t=0, token=1] [L1046] RET activate_threads2() VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=1, \old(t2_st)=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=0, t=0, token=1] [L706] RET immediate_notify() VAL [E_1=2, E_2=1, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=0, t=0, token=1] [L707] E_2 = 2 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=0, t=0, token=1] [L696] COND TRUE 1 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=1, t2_i=1, t2_pc=1, t2_st=0, t=0, token=1] [L698] t1_pc = 1 [L699] t1_st = 2 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=0, t=0, token=1] [L902] RET transmit1() [L910] COND TRUE t2_st == 0 [L911] int tmp_ndt_3; [L912] tmp_ndt_3 = __VERIFIER_nondet_int() [L913] COND TRUE \read(tmp_ndt_3) [L915] t2_st = 1 [L916] CALL transmit2() [L721] COND FALSE !(t2_pc == 0) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=1] [L724] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=1] [L740] token += 1 [L741] E_M = 1 VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L742] CALL immediate_notify() VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L1046] CALL activate_threads2() VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L1008] int tmp ; [L1009] int tmp___0 ; [L1010] int tmp___1 ; [L1014] CALL, EXPR is_master_triggered() [L754] int __retres1 ; VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L757] COND TRUE m_pc == 1 VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L758] COND TRUE E_M == 1 [L759] __retres1 = 1 VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, __retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L769] return (__retres1); VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \result=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=2, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L1014] RET, EXPR is_master_triggered() [L1014] tmp = is_master_triggered() [L1016] COND TRUE \read(tmp) [L1017] m_st = 0 VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L1022] CALL, EXPR is_transmit1_triggered() [L773] int __retres1 ; VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L776] COND TRUE t1_pc == 1 VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L777] COND FALSE !(E_1 == 1) VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L786] __retres1 = 0 VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L788] return (__retres1); VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \result=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L1022] RET, EXPR is_transmit1_triggered() [L1022] tmp___0 = is_transmit1_triggered() [L1024] COND FALSE !(\read(tmp___0)) VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L1030] CALL, EXPR is_transmit2_triggered() [L792] int __retres1 ; VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L795] COND TRUE t2_pc == 1 VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L796] COND FALSE !(E_2 == 1) VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L805] __retres1 = 0 VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, __retres1=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L807] return (__retres1); VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, \result=0, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L1030] RET, EXPR is_transmit2_triggered() [L1030] tmp___1 = is_transmit2_triggered() [L1032] COND FALSE !(\read(tmp___1)) VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L1046] RET activate_threads2() VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, \old(m_st)=2, \old(t1_st)=2, \old(t2_st)=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L742] RET immediate_notify() VAL [E_1=2, E_2=2, E_M=1, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L743] E_M = 2 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L732] COND TRUE 1 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=1, t=0, token=2] [L734] t2_pc = 1 [L735] t2_st = 2 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=2] [L916] RET transmit2() [L872] COND TRUE 1 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=2] [L875] CALL, EXPR exists_runnable_thread2() VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=2] [L842] int __retres1 ; VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=2] [L845] COND TRUE m_st == 0 [L846] __retres1 = 1 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, __retres1=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=2] [L863] return (__retres1); VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, \result=1, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=2] [L875] RET, EXPR exists_runnable_thread2() VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=2] [L875] tmp = exists_runnable_thread2() [L877] COND TRUE \read(tmp) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=0, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=2] [L882] COND TRUE m_st == 0 [L883] int tmp_ndt_1; [L884] tmp_ndt_1 = __VERIFIER_nondet_int() [L885] COND TRUE \read(tmp_ndt_1) [L887] m_st = 1 [L888] CALL master() [L627] int tmp_var = __VERIFIER_nondet_int(); [L629] COND FALSE !(m_pc == 0) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, tmp_var=5, token=2] [L632] COND TRUE m_pc == 1 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, tmp_var=5, token=2] [L654] COND FALSE !(token != local + 2) VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, tmp_var=5, token=2] [L659] COND TRUE tmp_var <= 5 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, tmp_var=5, token=2] [L660] COND TRUE tmp_var >= 5 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, tmp_var=5, token=2] [L665] COND TRUE tmp_var <= 5 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, tmp_var=5, token=2] [L666] COND TRUE tmp_var >= 5 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, tmp_var=5, token=2] [L667] COND TRUE tmp_var == 5 VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=2] [L668] CALL error2() VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=2] [L599] reach_error() VAL [E_1=2, E_2=2, E_M=2, M_E=2, T1_E=2, T2_E=2, a_t=0, c_dr_i=0, c_dr_pc=0, c_dr_st=0, c_last_read=0, c_num_read=0, fast_clk_edge=0, local=0, m_i=1, m_pc=1, m_st=1, p_dw_i=0, p_dw_pc=0, p_dw_st=0, p_last_write=0, p_num_write=0, q_buf_0=0, q_ev=0, q_free=0, q_read_ev=0, q_req_up=0, q_write_ev=0, slow_clk_edge=0, t1_i=1, t1_pc=1, t1_st=2, t2_i=1, t2_pc=1, t2_st=2, t=0, token=2] - UnprovableResult [Line: 27]: Unable to prove that a call to reach_error is unreachable Unable to prove that a call to reach_error is unreachable Reason: Not analyzed. - StatisticsResult: Ultimate Automizer benchmark data CFG has 16 procedures, 265 locations, 2 error locations. Started 1 CEGAR loops. OverallTime: 69.5s, OverallIterations: 40, TraceHistogramMax: 4, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.6s, AutomataDifference: 33.5s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 12508 SdHoareTripleChecker+Valid, 6.2s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 12236 mSDsluCounter, 28800 SdHoareTripleChecker+Invalid, 5.1s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 18113 mSDsCounter, 1475 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 9134 IncrementalHoareTripleChecker+Invalid, 10609 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 1475 mSolverCounterUnsat, 10687 mSDtfsCounter, 9134 mSolverCounterSat, 0.1s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 3263 GetRequests, 3062 SyntacticMatches, 0 SemanticMatches, 201 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 134 ImplicationChecksByTransitivity, 0.8s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=44149occurred in iteration=21, InterpolantAutomatonStates: 211, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 25.6s AutomataMinimizationTime, 39 MinimizatonAttempts, 25202 StatesRemovedByMinimization, 26 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.4s SsaConstructionTime, 0.9s SatisfiabilityAnalysisTime, 2.9s InterpolantComputationTime, 8098 NumberOfCodeBlocks, 8098 NumberOfCodeBlocksAsserted, 59 NumberOfCheckSat, 7823 ConstructedInterpolants, 0 QuantifiedInterpolants, 10164 SizeOfPredicates, 0 NumberOfNonLiveVariables, 9929 ConjunctsInSsa, 66 ConjunctsInUnsatCore, 58 InterpolantComputations, 39 PerfectInterpolantSequences, 3490/4042 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2025-02-05 17:57:32,805 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE