./Ultimate.py --spec ../sv-benchmarks/c/properties/unreach-call.prp --file ../sv-benchmarks/c/systemc/toy2.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for ERROR reachability Using default analysis Version c00e63dc Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerReach.xml -i ../sv-benchmarks/c/systemc/toy2.cil.c -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(G ! call(reach_error())) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a77d6f304c19846fdc8cd5bba9216d69953659ded966cffbf7faa285e2d864a4 --- Real Ultimate output --- This is Ultimate 0.3.0-?-c00e63d-m [2025-02-05 16:08:59,330 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-02-05 16:08:59,400 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Reach-32bit-Automizer_Default.epf [2025-02-05 16:08:59,408 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-02-05 16:08:59,409 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-02-05 16:08:59,428 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-02-05 16:08:59,429 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-02-05 16:08:59,429 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-02-05 16:08:59,431 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-02-05 16:08:59,431 INFO L153 SettingsManager]: * Use memory slicer=true [2025-02-05 16:08:59,431 INFO L151 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2025-02-05 16:08:59,431 INFO L153 SettingsManager]: * Ignore calls to procedures called more than once=ONLY_FOR_SEQUENTIAL_PROGRAMS [2025-02-05 16:08:59,431 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-02-05 16:08:59,431 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-02-05 16:08:59,431 INFO L153 SettingsManager]: * Use SBE=true [2025-02-05 16:08:59,432 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-02-05 16:08:59,432 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2025-02-05 16:08:59,432 INFO L153 SettingsManager]: * sizeof long=4 [2025-02-05 16:08:59,432 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-02-05 16:08:59,432 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-02-05 16:08:59,432 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-02-05 16:08:59,432 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2025-02-05 16:08:59,432 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2025-02-05 16:08:59,432 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2025-02-05 16:08:59,432 INFO L153 SettingsManager]: * sizeof long double=12 [2025-02-05 16:08:59,432 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-02-05 16:08:59,432 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-02-05 16:08:59,432 INFO L153 SettingsManager]: * Use constant arrays=true [2025-02-05 16:08:59,433 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-02-05 16:08:59,433 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-02-05 16:08:59,433 INFO L153 SettingsManager]: * Only consider context switches at boundaries of atomic blocks=true [2025-02-05 16:08:59,433 INFO L153 SettingsManager]: * SMT solver=External_DefaultMode [2025-02-05 16:08:59,433 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-02-05 16:08:59,433 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-02-05 16:08:59,433 INFO L153 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2025-02-05 16:08:59,433 INFO L153 SettingsManager]: * Compute procedure contracts=false [2025-02-05 16:08:59,433 INFO L153 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopHeads [2025-02-05 16:08:59,433 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-02-05 16:08:59,433 INFO L153 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2025-02-05 16:08:59,433 INFO L153 SettingsManager]: * Apply one-shot large block encoding in concurrent analysis=false [2025-02-05 16:08:59,434 INFO L153 SettingsManager]: * Automaton type used in concurrency analysis=PETRI_NET [2025-02-05 16:08:59,434 INFO L153 SettingsManager]: * Order on configurations for Petri net unfoldings=DBO [2025-02-05 16:08:59,434 INFO L153 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2025-02-05 16:08:59,434 INFO L153 SettingsManager]: * Looper check in Petri net analysis=SEMANTIC Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(G ! call(reach_error())) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a77d6f304c19846fdc8cd5bba9216d69953659ded966cffbf7faa285e2d864a4 [2025-02-05 16:08:59,721 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-02-05 16:08:59,729 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-02-05 16:08:59,731 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-02-05 16:08:59,732 INFO L270 PluginConnector]: Initializing CDTParser... [2025-02-05 16:08:59,733 INFO L274 PluginConnector]: CDTParser initialized [2025-02-05 16:08:59,734 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/systemc/toy2.cil.c [2025-02-05 16:09:01,085 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/1ef4b99bb/91af92e3b9584d9da5171befb63f8e61/FLAG3361b2e22 [2025-02-05 16:09:01,354 INFO L384 CDTParser]: Found 1 translation units. [2025-02-05 16:09:01,359 INFO L180 CDTParser]: Scanning /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/systemc/toy2.cil.c [2025-02-05 16:09:01,370 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/1ef4b99bb/91af92e3b9584d9da5171befb63f8e61/FLAG3361b2e22 [2025-02-05 16:09:01,384 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/1ef4b99bb/91af92e3b9584d9da5171befb63f8e61 [2025-02-05 16:09:01,389 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-02-05 16:09:01,390 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-02-05 16:09:01,393 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-02-05 16:09:01,393 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-02-05 16:09:01,400 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-02-05 16:09:01,401 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 05.02 04:09:01" (1/1) ... [2025-02-05 16:09:01,404 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@acf3473 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 04:09:01, skipping insertion in model container [2025-02-05 16:09:01,404 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 05.02 04:09:01" (1/1) ... [2025-02-05 16:09:01,433 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-02-05 16:09:01,582 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/systemc/toy2.cil.c[698,711] [2025-02-05 16:09:01,643 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-05 16:09:01,653 INFO L200 MainTranslator]: Completed pre-run [2025-02-05 16:09:01,661 WARN L250 ndardFunctionHandler]: Function reach_error is already implemented but we override the implementation for the call at /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/systemc/toy2.cil.c[698,711] [2025-02-05 16:09:01,697 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-05 16:09:01,714 INFO L204 MainTranslator]: Completed translation [2025-02-05 16:09:01,714 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 04:09:01 WrapperNode [2025-02-05 16:09:01,714 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-02-05 16:09:01,716 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-02-05 16:09:01,716 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-02-05 16:09:01,716 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-02-05 16:09:01,722 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 04:09:01" (1/1) ... [2025-02-05 16:09:01,732 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 04:09:01" (1/1) ... [2025-02-05 16:09:01,753 INFO L138 Inliner]: procedures = 20, calls = 15, calls flagged for inlining = 10, calls inlined = 10, statements flattened = 347 [2025-02-05 16:09:01,754 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-02-05 16:09:01,754 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-02-05 16:09:01,754 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-02-05 16:09:01,754 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-02-05 16:09:01,760 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 04:09:01" (1/1) ... [2025-02-05 16:09:01,761 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 04:09:01" (1/1) ... [2025-02-05 16:09:01,762 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 04:09:01" (1/1) ... [2025-02-05 16:09:01,778 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-02-05 16:09:01,778 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 04:09:01" (1/1) ... [2025-02-05 16:09:01,779 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 04:09:01" (1/1) ... [2025-02-05 16:09:01,782 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 04:09:01" (1/1) ... [2025-02-05 16:09:01,783 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 04:09:01" (1/1) ... [2025-02-05 16:09:01,784 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 04:09:01" (1/1) ... [2025-02-05 16:09:01,785 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 04:09:01" (1/1) ... [2025-02-05 16:09:01,787 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-02-05 16:09:01,787 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-02-05 16:09:01,787 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-02-05 16:09:01,787 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-02-05 16:09:01,788 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 04:09:01" (1/1) ... [2025-02-05 16:09:01,793 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 [2025-02-05 16:09:01,806 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-05 16:09:01,821 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (exit command is (exit), workingDir is null) [2025-02-05 16:09:01,824 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Waiting until timeout for monitored process [2025-02-05 16:09:01,845 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-02-05 16:09:01,845 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-02-05 16:09:01,845 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-02-05 16:09:01,845 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-02-05 16:09:01,914 INFO L257 CfgBuilder]: Building ICFG [2025-02-05 16:09:01,916 INFO L287 CfgBuilder]: Building CFG for each procedure with an implementation [2025-02-05 16:09:02,392 INFO L? ?]: Removed 20 outVars from TransFormulas that were not future-live. [2025-02-05 16:09:02,392 INFO L308 CfgBuilder]: Performing block encoding [2025-02-05 16:09:02,404 INFO L332 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-02-05 16:09:02,405 INFO L337 CfgBuilder]: Removed 0 assume(true) statements. [2025-02-05 16:09:02,405 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 05.02 04:09:02 BoogieIcfgContainer [2025-02-05 16:09:02,405 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-02-05 16:09:02,408 INFO L112 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2025-02-05 16:09:02,408 INFO L270 PluginConnector]: Initializing TraceAbstraction... [2025-02-05 16:09:02,413 INFO L274 PluginConnector]: TraceAbstraction initialized [2025-02-05 16:09:02,413 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 05.02 04:09:01" (1/3) ... [2025-02-05 16:09:02,414 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1eacf54d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 05.02 04:09:02, skipping insertion in model container [2025-02-05 16:09:02,414 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 05.02 04:09:01" (2/3) ... [2025-02-05 16:09:02,414 INFO L204 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1eacf54d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 05.02 04:09:02, skipping insertion in model container [2025-02-05 16:09:02,414 INFO L184 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 05.02 04:09:02" (3/3) ... [2025-02-05 16:09:02,415 INFO L128 eAbstractionObserver]: Analyzing ICFG toy2.cil.c [2025-02-05 16:09:02,429 INFO L216 ceAbstractionStarter]: Automizer settings: Hoare:LoopHeads NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2025-02-05 16:09:02,430 INFO L151 ceAbstractionStarter]: Applying trace abstraction to ICFG toy2.cil.c that has 1 procedures, 135 locations, 1 initial locations, 6 loop locations, and 1 error locations. [2025-02-05 16:09:02,481 INFO L332 AbstractCegarLoop]: ======== Iteration 0 == of CEGAR loop == AllErrorsAtOnce ======== [2025-02-05 16:09:02,495 INFO L333 AbstractCegarLoop]: Settings: SEPARATE_VIOLATION_CHECK=true, mInterprocedural=true, mMaxIterations=1000000, mWatchIteration=1000000, mArtifact=RCFG, mInterpolation=FPandBP, mInterpolantAutomaton=STRAIGHT_LINE, mDumpAutomata=false, mAutomataFormat=ATS_NUMERATE, mDumpPath=., mDeterminiation=PREDICATE_ABSTRACTION, mMinimize=MINIMIZE_SEVPA, mAutomataTypeConcurrency=PETRI_NET, mHoareTripleChecks=INCREMENTAL, mHoareAnnotationPositions=LoopHeads, mDumpOnlyReuseAutomata=false, mLimitTraceHistogram=0, mErrorLocTimeLimit=0, mLimitPathProgramCount=0, mCollectInterpolantStatistics=true, mHeuristicEmptinessCheck=false, mHeuristicEmptinessCheckAStarHeuristic=ZERO, mHeuristicEmptinessCheckAStarHeuristicRandomSeed=1337, mHeuristicEmptinessCheckSmtFeatureScoringMethod=DAGSIZE, mSMTFeatureExtraction=false, mSMTFeatureExtractionDumpPath=., mOverrideInterpolantAutomaton=false, mMcrInterpolantMethod=WP, mPorIndependenceSettings=[Lde.uni_freiburg.informatik.ultimate.lib.tracecheckerutils.partialorder.independence.IndependenceSettings;@775db788, mLbeIndependenceSettings=[IndependenceType=SEMANTIC, AbstractionType=NONE, UseConditional=false, UseSemiCommutativity=true, Solver=Z3, SolverTimeout=1000ms] [2025-02-05 16:09:02,495 INFO L334 AbstractCegarLoop]: Starting to check reachability of 1 error locations. [2025-02-05 16:09:02,499 INFO L276 IsEmpty]: Start isEmpty. Operand has 135 states, 133 states have (on average 1.7669172932330828) internal successors, (235), 134 states have internal predecessors, (235), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:02,506 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2025-02-05 16:09:02,507 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:02,508 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:02,508 INFO L396 AbstractCegarLoop]: === Iteration 1 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:02,512 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:02,513 INFO L85 PathProgramCache]: Analyzing trace with hash 121120735, now seen corresponding path program 1 times [2025-02-05 16:09:02,520 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:02,520 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1597274833] [2025-02-05 16:09:02,523 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:02,524 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:02,599 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 35 statements into 1 equivalence classes. [2025-02-05 16:09:02,625 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 35 of 35 statements. [2025-02-05 16:09:02,626 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:02,626 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:02,823 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 16:09:02,823 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:02,823 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1597274833] [2025-02-05 16:09:02,824 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1597274833] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:02,824 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:02,824 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-05 16:09:02,826 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1706859174] [2025-02-05 16:09:02,826 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:02,829 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-05 16:09:02,829 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:02,843 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-05 16:09:02,844 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-05 16:09:02,846 INFO L87 Difference]: Start difference. First operand has 135 states, 133 states have (on average 1.7669172932330828) internal successors, (235), 134 states have internal predecessors, (235), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:02,941 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:02,942 INFO L93 Difference]: Finished difference Result 365 states and 634 transitions. [2025-02-05 16:09:02,943 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-05 16:09:02,944 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2025-02-05 16:09:02,945 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:02,956 INFO L225 Difference]: With dead ends: 365 [2025-02-05 16:09:02,957 INFO L226 Difference]: Without dead ends: 225 [2025-02-05 16:09:02,960 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-02-05 16:09:02,963 INFO L435 NwaCegarLoop]: 219 mSDtfsCounter, 594 mSDsluCounter, 164 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 594 SdHoareTripleChecker+Valid, 383 SdHoareTripleChecker+Invalid, 12 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:02,965 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [594 Valid, 383 Invalid, 12 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 16:09:02,977 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 225 states. [2025-02-05 16:09:02,998 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 225 to 222. [2025-02-05 16:09:03,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 222 states, 221 states have (on average 1.7013574660633484) internal successors, (376), 221 states have internal predecessors, (376), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:03,006 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 222 states to 222 states and 376 transitions. [2025-02-05 16:09:03,008 INFO L78 Accepts]: Start accepts. Automaton has 222 states and 376 transitions. Word has length 35 [2025-02-05 16:09:03,008 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:03,008 INFO L471 AbstractCegarLoop]: Abstraction has 222 states and 376 transitions. [2025-02-05 16:09:03,009 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:03,009 INFO L276 IsEmpty]: Start isEmpty. Operand 222 states and 376 transitions. [2025-02-05 16:09:03,010 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2025-02-05 16:09:03,010 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:03,010 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:03,010 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable0 [2025-02-05 16:09:03,010 INFO L396 AbstractCegarLoop]: === Iteration 2 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:03,011 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:03,011 INFO L85 PathProgramCache]: Analyzing trace with hash -133615810, now seen corresponding path program 1 times [2025-02-05 16:09:03,011 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:03,011 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1602914465] [2025-02-05 16:09:03,011 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:03,012 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:03,024 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 35 statements into 1 equivalence classes. [2025-02-05 16:09:03,030 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 35 of 35 statements. [2025-02-05 16:09:03,030 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:03,030 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:03,146 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 16:09:03,146 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:03,146 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1602914465] [2025-02-05 16:09:03,146 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1602914465] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:03,146 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:03,147 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-05 16:09:03,147 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1769985999] [2025-02-05 16:09:03,147 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:03,148 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-02-05 16:09:03,148 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:03,148 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-05 16:09:03,148 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:03,148 INFO L87 Difference]: Start difference. First operand 222 states and 376 transitions. Second operand has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:03,202 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:03,202 INFO L93 Difference]: Finished difference Result 435 states and 738 transitions. [2025-02-05 16:09:03,206 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-05 16:09:03,206 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2025-02-05 16:09:03,206 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:03,207 INFO L225 Difference]: With dead ends: 435 [2025-02-05 16:09:03,207 INFO L226 Difference]: Without dead ends: 222 [2025-02-05 16:09:03,208 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:03,209 INFO L435 NwaCegarLoop]: 202 mSDtfsCounter, 192 mSDsluCounter, 4 mSDsCounter, 0 mSdLazyCounter, 14 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 192 SdHoareTripleChecker+Valid, 206 SdHoareTripleChecker+Invalid, 22 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 14 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:03,209 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [192 Valid, 206 Invalid, 22 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 14 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 16:09:03,212 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 222 states. [2025-02-05 16:09:03,228 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 222 to 222. [2025-02-05 16:09:03,229 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 222 states, 221 states have (on average 1.6470588235294117) internal successors, (364), 221 states have internal predecessors, (364), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:03,230 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 222 states to 222 states and 364 transitions. [2025-02-05 16:09:03,231 INFO L78 Accepts]: Start accepts. Automaton has 222 states and 364 transitions. Word has length 35 [2025-02-05 16:09:03,231 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:03,231 INFO L471 AbstractCegarLoop]: Abstraction has 222 states and 364 transitions. [2025-02-05 16:09:03,231 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:03,231 INFO L276 IsEmpty]: Start isEmpty. Operand 222 states and 364 transitions. [2025-02-05 16:09:03,232 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2025-02-05 16:09:03,232 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:03,232 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:03,232 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable1 [2025-02-05 16:09:03,232 INFO L396 AbstractCegarLoop]: === Iteration 3 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:03,233 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:03,233 INFO L85 PathProgramCache]: Analyzing trace with hash -1959417280, now seen corresponding path program 1 times [2025-02-05 16:09:03,233 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:03,233 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1335367617] [2025-02-05 16:09:03,233 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:03,233 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:03,243 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 35 statements into 1 equivalence classes. [2025-02-05 16:09:03,250 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 35 of 35 statements. [2025-02-05 16:09:03,250 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:03,250 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:03,312 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 16:09:03,312 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:03,312 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1335367617] [2025-02-05 16:09:03,313 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1335367617] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:03,313 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:03,313 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-05 16:09:03,313 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1956714971] [2025-02-05 16:09:03,313 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:03,313 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-05 16:09:03,314 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:03,314 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-05 16:09:03,315 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-05 16:09:03,315 INFO L87 Difference]: Start difference. First operand 222 states and 364 transitions. Second operand has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:03,410 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:03,410 INFO L93 Difference]: Finished difference Result 607 states and 993 transitions. [2025-02-05 16:09:03,411 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-05 16:09:03,411 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2025-02-05 16:09:03,412 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:03,414 INFO L225 Difference]: With dead ends: 607 [2025-02-05 16:09:03,414 INFO L226 Difference]: Without dead ends: 395 [2025-02-05 16:09:03,416 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-02-05 16:09:03,418 INFO L435 NwaCegarLoop]: 325 mSDtfsCounter, 375 mSDsluCounter, 140 mSDsCounter, 0 mSdLazyCounter, 56 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 375 SdHoareTripleChecker+Valid, 465 SdHoareTripleChecker+Invalid, 65 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 56 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:03,419 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [375 Valid, 465 Invalid, 65 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 56 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-02-05 16:09:03,420 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 395 states. [2025-02-05 16:09:03,436 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 395 to 222. [2025-02-05 16:09:03,437 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 222 states, 221 states have (on average 1.6334841628959276) internal successors, (361), 221 states have internal predecessors, (361), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:03,438 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 222 states to 222 states and 361 transitions. [2025-02-05 16:09:03,438 INFO L78 Accepts]: Start accepts. Automaton has 222 states and 361 transitions. Word has length 35 [2025-02-05 16:09:03,438 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:03,438 INFO L471 AbstractCegarLoop]: Abstraction has 222 states and 361 transitions. [2025-02-05 16:09:03,438 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:03,439 INFO L276 IsEmpty]: Start isEmpty. Operand 222 states and 361 transitions. [2025-02-05 16:09:03,439 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2025-02-05 16:09:03,439 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:03,439 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:03,440 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable2 [2025-02-05 16:09:03,440 INFO L396 AbstractCegarLoop]: === Iteration 4 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:03,441 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:03,442 INFO L85 PathProgramCache]: Analyzing trace with hash -1928397473, now seen corresponding path program 1 times [2025-02-05 16:09:03,442 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:03,443 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [697159279] [2025-02-05 16:09:03,443 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:03,443 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:03,456 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 35 statements into 1 equivalence classes. [2025-02-05 16:09:03,459 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 35 of 35 statements. [2025-02-05 16:09:03,462 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:03,462 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:03,510 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 16:09:03,510 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:03,510 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [697159279] [2025-02-05 16:09:03,510 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [697159279] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:03,511 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:03,511 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-05 16:09:03,511 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1653990037] [2025-02-05 16:09:03,511 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:03,511 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-05 16:09:03,511 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:03,512 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-05 16:09:03,512 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-05 16:09:03,513 INFO L87 Difference]: Start difference. First operand 222 states and 361 transitions. Second operand has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:03,592 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:03,592 INFO L93 Difference]: Finished difference Result 622 states and 1008 transitions. [2025-02-05 16:09:03,593 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-05 16:09:03,593 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2025-02-05 16:09:03,593 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:03,595 INFO L225 Difference]: With dead ends: 622 [2025-02-05 16:09:03,596 INFO L226 Difference]: Without dead ends: 412 [2025-02-05 16:09:03,597 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-02-05 16:09:03,599 INFO L435 NwaCegarLoop]: 336 mSDtfsCounter, 383 mSDsluCounter, 151 mSDsCounter, 0 mSdLazyCounter, 47 mSolverCounterSat, 7 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 383 SdHoareTripleChecker+Valid, 487 SdHoareTripleChecker+Invalid, 54 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 7 IncrementalHoareTripleChecker+Valid, 47 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:03,600 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [383 Valid, 487 Invalid, 54 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [7 Valid, 47 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-02-05 16:09:03,603 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 412 states. [2025-02-05 16:09:03,617 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 412 to 228. [2025-02-05 16:09:03,620 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 228 states, 227 states have (on average 1.6123348017621146) internal successors, (366), 227 states have internal predecessors, (366), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:03,621 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 228 states to 228 states and 366 transitions. [2025-02-05 16:09:03,622 INFO L78 Accepts]: Start accepts. Automaton has 228 states and 366 transitions. Word has length 35 [2025-02-05 16:09:03,622 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:03,622 INFO L471 AbstractCegarLoop]: Abstraction has 228 states and 366 transitions. [2025-02-05 16:09:03,623 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:03,623 INFO L276 IsEmpty]: Start isEmpty. Operand 228 states and 366 transitions. [2025-02-05 16:09:03,623 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2025-02-05 16:09:03,623 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:03,624 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:03,624 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable3 [2025-02-05 16:09:03,624 INFO L396 AbstractCegarLoop]: === Iteration 5 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:03,624 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:03,624 INFO L85 PathProgramCache]: Analyzing trace with hash -1995404226, now seen corresponding path program 1 times [2025-02-05 16:09:03,624 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:03,625 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1958561250] [2025-02-05 16:09:03,625 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:03,625 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:03,634 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 35 statements into 1 equivalence classes. [2025-02-05 16:09:03,637 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 35 of 35 statements. [2025-02-05 16:09:03,637 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:03,637 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:03,707 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 16:09:03,708 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:03,708 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1958561250] [2025-02-05 16:09:03,708 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1958561250] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:03,708 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:03,708 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-05 16:09:03,708 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [503215737] [2025-02-05 16:09:03,708 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:03,708 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-05 16:09:03,708 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:03,709 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-05 16:09:03,709 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-05 16:09:03,709 INFO L87 Difference]: Start difference. First operand 228 states and 366 transitions. Second operand has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:03,808 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:03,809 INFO L93 Difference]: Finished difference Result 783 states and 1249 transitions. [2025-02-05 16:09:03,809 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-05 16:09:03,809 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2025-02-05 16:09:03,810 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:03,812 INFO L225 Difference]: With dead ends: 783 [2025-02-05 16:09:03,812 INFO L226 Difference]: Without dead ends: 568 [2025-02-05 16:09:03,813 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-02-05 16:09:03,813 INFO L435 NwaCegarLoop]: 328 mSDtfsCounter, 379 mSDsluCounter, 255 mSDsCounter, 0 mSdLazyCounter, 54 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 379 SdHoareTripleChecker+Valid, 583 SdHoareTripleChecker+Invalid, 62 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 54 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:03,814 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [379 Valid, 583 Invalid, 62 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 54 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-02-05 16:09:03,814 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 568 states. [2025-02-05 16:09:03,839 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 568 to 377. [2025-02-05 16:09:03,840 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 377 states, 376 states have (on average 1.5904255319148937) internal successors, (598), 376 states have internal predecessors, (598), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:03,842 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 377 states to 377 states and 598 transitions. [2025-02-05 16:09:03,843 INFO L78 Accepts]: Start accepts. Automaton has 377 states and 598 transitions. Word has length 35 [2025-02-05 16:09:03,843 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:03,843 INFO L471 AbstractCegarLoop]: Abstraction has 377 states and 598 transitions. [2025-02-05 16:09:03,844 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:03,844 INFO L276 IsEmpty]: Start isEmpty. Operand 377 states and 598 transitions. [2025-02-05 16:09:03,845 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2025-02-05 16:09:03,845 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:03,845 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:03,846 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable4 [2025-02-05 16:09:03,846 INFO L396 AbstractCegarLoop]: === Iteration 6 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:03,846 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:03,846 INFO L85 PathProgramCache]: Analyzing trace with hash -750639745, now seen corresponding path program 1 times [2025-02-05 16:09:03,846 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:03,847 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1132979837] [2025-02-05 16:09:03,847 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:03,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:03,869 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 35 statements into 1 equivalence classes. [2025-02-05 16:09:03,879 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 35 of 35 statements. [2025-02-05 16:09:03,879 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:03,880 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:03,921 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 16:09:03,921 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:03,922 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1132979837] [2025-02-05 16:09:03,922 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1132979837] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:03,922 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:03,922 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-05 16:09:03,923 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1450545872] [2025-02-05 16:09:03,923 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:03,923 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-05 16:09:03,926 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:03,927 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-05 16:09:03,927 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-05 16:09:03,927 INFO L87 Difference]: Start difference. First operand 377 states and 598 transitions. Second operand has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:04,052 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:04,053 INFO L93 Difference]: Finished difference Result 1150 states and 1827 transitions. [2025-02-05 16:09:04,053 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-05 16:09:04,053 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2025-02-05 16:09:04,053 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:04,057 INFO L225 Difference]: With dead ends: 1150 [2025-02-05 16:09:04,057 INFO L226 Difference]: Without dead ends: 787 [2025-02-05 16:09:04,058 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-02-05 16:09:04,059 INFO L435 NwaCegarLoop]: 189 mSDtfsCounter, 500 mSDsluCounter, 384 mSDsCounter, 0 mSdLazyCounter, 52 mSolverCounterSat, 19 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 500 SdHoareTripleChecker+Valid, 573 SdHoareTripleChecker+Invalid, 71 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 19 IncrementalHoareTripleChecker+Valid, 52 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:04,059 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [500 Valid, 573 Invalid, 71 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [19 Valid, 52 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-02-05 16:09:04,061 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 787 states. [2025-02-05 16:09:04,092 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 787 to 664. [2025-02-05 16:09:04,094 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 664 states, 663 states have (on average 1.5761689291101055) internal successors, (1045), 663 states have internal predecessors, (1045), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:04,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 664 states to 664 states and 1045 transitions. [2025-02-05 16:09:04,097 INFO L78 Accepts]: Start accepts. Automaton has 664 states and 1045 transitions. Word has length 35 [2025-02-05 16:09:04,097 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:04,097 INFO L471 AbstractCegarLoop]: Abstraction has 664 states and 1045 transitions. [2025-02-05 16:09:04,097 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:04,097 INFO L276 IsEmpty]: Start isEmpty. Operand 664 states and 1045 transitions. [2025-02-05 16:09:04,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2025-02-05 16:09:04,098 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:04,098 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:04,098 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable5 [2025-02-05 16:09:04,098 INFO L396 AbstractCegarLoop]: === Iteration 7 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:04,099 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:04,099 INFO L85 PathProgramCache]: Analyzing trace with hash -1520590556, now seen corresponding path program 1 times [2025-02-05 16:09:04,099 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:04,099 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [426403147] [2025-02-05 16:09:04,099 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:04,099 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:04,114 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 35 statements into 1 equivalence classes. [2025-02-05 16:09:04,117 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 35 of 35 statements. [2025-02-05 16:09:04,119 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:04,119 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:04,163 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 16:09:04,163 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:04,164 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [426403147] [2025-02-05 16:09:04,164 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [426403147] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:04,164 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:04,164 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-05 16:09:04,164 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [702880673] [2025-02-05 16:09:04,164 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:04,164 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-02-05 16:09:04,165 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:04,165 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-05 16:09:04,165 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:04,165 INFO L87 Difference]: Start difference. First operand 664 states and 1045 transitions. Second operand has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:04,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:04,220 INFO L93 Difference]: Finished difference Result 1618 states and 2550 transitions. [2025-02-05 16:09:04,220 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-05 16:09:04,221 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2025-02-05 16:09:04,221 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:04,225 INFO L225 Difference]: With dead ends: 1618 [2025-02-05 16:09:04,225 INFO L226 Difference]: Without dead ends: 977 [2025-02-05 16:09:04,226 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:04,227 INFO L435 NwaCegarLoop]: 196 mSDtfsCounter, 179 mSDsluCounter, 152 mSDsCounter, 0 mSdLazyCounter, 13 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 179 SdHoareTripleChecker+Valid, 348 SdHoareTripleChecker+Invalid, 17 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 13 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:04,227 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [179 Valid, 348 Invalid, 17 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 13 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 16:09:04,228 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 977 states. [2025-02-05 16:09:04,269 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 977 to 975. [2025-02-05 16:09:04,271 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 975 states, 974 states have (on average 1.5698151950718686) internal successors, (1529), 974 states have internal predecessors, (1529), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:04,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 975 states to 975 states and 1529 transitions. [2025-02-05 16:09:04,276 INFO L78 Accepts]: Start accepts. Automaton has 975 states and 1529 transitions. Word has length 35 [2025-02-05 16:09:04,276 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:04,276 INFO L471 AbstractCegarLoop]: Abstraction has 975 states and 1529 transitions. [2025-02-05 16:09:04,276 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:04,276 INFO L276 IsEmpty]: Start isEmpty. Operand 975 states and 1529 transitions. [2025-02-05 16:09:04,277 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2025-02-05 16:09:04,277 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:04,277 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:04,278 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable6 [2025-02-05 16:09:04,278 INFO L396 AbstractCegarLoop]: === Iteration 8 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:04,278 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:04,278 INFO L85 PathProgramCache]: Analyzing trace with hash -460683866, now seen corresponding path program 1 times [2025-02-05 16:09:04,278 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:04,278 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1388466855] [2025-02-05 16:09:04,279 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:04,279 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:04,284 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 35 statements into 1 equivalence classes. [2025-02-05 16:09:04,287 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 35 of 35 statements. [2025-02-05 16:09:04,287 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:04,287 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:04,348 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 16:09:04,349 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:04,349 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1388466855] [2025-02-05 16:09:04,349 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1388466855] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:04,349 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:04,350 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-05 16:09:04,351 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [152992798] [2025-02-05 16:09:04,351 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:04,351 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-05 16:09:04,351 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:04,351 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-05 16:09:04,351 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-05 16:09:04,352 INFO L87 Difference]: Start difference. First operand 975 states and 1529 transitions. Second operand has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:04,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:04,496 INFO L93 Difference]: Finished difference Result 2631 states and 4132 transitions. [2025-02-05 16:09:04,497 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-05 16:09:04,497 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2025-02-05 16:09:04,497 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:04,505 INFO L225 Difference]: With dead ends: 2631 [2025-02-05 16:09:04,505 INFO L226 Difference]: Without dead ends: 1672 [2025-02-05 16:09:04,507 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-02-05 16:09:04,507 INFO L435 NwaCegarLoop]: 228 mSDtfsCounter, 483 mSDsluCounter, 233 mSDsCounter, 0 mSdLazyCounter, 54 mSolverCounterSat, 16 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 483 SdHoareTripleChecker+Valid, 461 SdHoareTripleChecker+Invalid, 70 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 16 IncrementalHoareTripleChecker+Valid, 54 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:04,508 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [483 Valid, 461 Invalid, 70 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [16 Valid, 54 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-02-05 16:09:04,510 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1672 states. [2025-02-05 16:09:04,558 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1672 to 1082. [2025-02-05 16:09:04,561 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1082 states, 1081 states have (on average 1.5624421831637372) internal successors, (1689), 1081 states have internal predecessors, (1689), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:04,565 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1082 states to 1082 states and 1689 transitions. [2025-02-05 16:09:04,566 INFO L78 Accepts]: Start accepts. Automaton has 1082 states and 1689 transitions. Word has length 35 [2025-02-05 16:09:04,566 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:04,566 INFO L471 AbstractCegarLoop]: Abstraction has 1082 states and 1689 transitions. [2025-02-05 16:09:04,566 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:04,566 INFO L276 IsEmpty]: Start isEmpty. Operand 1082 states and 1689 transitions. [2025-02-05 16:09:04,568 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2025-02-05 16:09:04,568 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:04,568 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:04,568 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable7 [2025-02-05 16:09:04,568 INFO L396 AbstractCegarLoop]: === Iteration 9 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:04,570 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:04,571 INFO L85 PathProgramCache]: Analyzing trace with hash -971218043, now seen corresponding path program 1 times [2025-02-05 16:09:04,571 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:04,571 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [307496965] [2025-02-05 16:09:04,571 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:04,571 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:04,578 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 35 statements into 1 equivalence classes. [2025-02-05 16:09:04,582 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 35 of 35 statements. [2025-02-05 16:09:04,582 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:04,582 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:04,632 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 16:09:04,632 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:04,632 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [307496965] [2025-02-05 16:09:04,632 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [307496965] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:04,632 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:04,632 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-05 16:09:04,632 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1787342505] [2025-02-05 16:09:04,632 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:04,633 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-05 16:09:04,633 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:04,633 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-05 16:09:04,633 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-05 16:09:04,633 INFO L87 Difference]: Start difference. First operand 1082 states and 1689 transitions. Second operand has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:04,751 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:04,751 INFO L93 Difference]: Finished difference Result 2779 states and 4322 transitions. [2025-02-05 16:09:04,751 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-05 16:09:04,751 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2025-02-05 16:09:04,752 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:04,758 INFO L225 Difference]: With dead ends: 2779 [2025-02-05 16:09:04,758 INFO L226 Difference]: Without dead ends: 1730 [2025-02-05 16:09:04,760 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-02-05 16:09:04,764 INFO L435 NwaCegarLoop]: 188 mSDtfsCounter, 484 mSDsluCounter, 143 mSDsCounter, 0 mSdLazyCounter, 36 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 484 SdHoareTripleChecker+Valid, 331 SdHoareTripleChecker+Invalid, 48 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 36 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:04,764 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [484 Valid, 331 Invalid, 48 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 36 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-02-05 16:09:04,767 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1730 states. [2025-02-05 16:09:04,834 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1730 to 1082. [2025-02-05 16:09:04,836 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1082 states, 1081 states have (on average 1.5430157261794635) internal successors, (1668), 1081 states have internal predecessors, (1668), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:04,841 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1082 states to 1082 states and 1668 transitions. [2025-02-05 16:09:04,841 INFO L78 Accepts]: Start accepts. Automaton has 1082 states and 1668 transitions. Word has length 35 [2025-02-05 16:09:04,842 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:04,842 INFO L471 AbstractCegarLoop]: Abstraction has 1082 states and 1668 transitions. [2025-02-05 16:09:04,842 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:04,842 INFO L276 IsEmpty]: Start isEmpty. Operand 1082 states and 1668 transitions. [2025-02-05 16:09:04,842 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2025-02-05 16:09:04,843 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:04,843 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:04,843 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable8 [2025-02-05 16:09:04,843 INFO L396 AbstractCegarLoop]: === Iteration 10 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:04,843 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:04,843 INFO L85 PathProgramCache]: Analyzing trace with hash -1476776668, now seen corresponding path program 1 times [2025-02-05 16:09:04,845 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:04,845 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [453088159] [2025-02-05 16:09:04,845 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:04,845 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:04,851 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 35 statements into 1 equivalence classes. [2025-02-05 16:09:04,854 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 35 of 35 statements. [2025-02-05 16:09:04,854 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:04,854 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:04,898 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 16:09:04,898 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:04,898 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [453088159] [2025-02-05 16:09:04,899 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [453088159] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:04,899 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:04,899 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-05 16:09:04,899 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [330790273] [2025-02-05 16:09:04,899 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:04,899 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-05 16:09:04,899 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:04,899 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-05 16:09:04,900 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-05 16:09:04,900 INFO L87 Difference]: Start difference. First operand 1082 states and 1668 transitions. Second operand has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:05,002 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:05,002 INFO L93 Difference]: Finished difference Result 2486 states and 3822 transitions. [2025-02-05 16:09:05,003 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-05 16:09:05,003 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2025-02-05 16:09:05,004 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:05,010 INFO L225 Difference]: With dead ends: 2486 [2025-02-05 16:09:05,010 INFO L226 Difference]: Without dead ends: 1445 [2025-02-05 16:09:05,012 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-02-05 16:09:05,013 INFO L435 NwaCegarLoop]: 186 mSDtfsCounter, 486 mSDsluCounter, 183 mSDsCounter, 0 mSdLazyCounter, 34 mSolverCounterSat, 12 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 486 SdHoareTripleChecker+Valid, 369 SdHoareTripleChecker+Invalid, 46 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 12 IncrementalHoareTripleChecker+Valid, 34 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:05,014 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [486 Valid, 369 Invalid, 46 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [12 Valid, 34 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 16:09:05,016 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1445 states. [2025-02-05 16:09:05,062 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1445 to 1232. [2025-02-05 16:09:05,065 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1232 states, 1231 states have (on average 1.5223395613322501) internal successors, (1874), 1231 states have internal predecessors, (1874), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:05,070 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1232 states to 1232 states and 1874 transitions. [2025-02-05 16:09:05,071 INFO L78 Accepts]: Start accepts. Automaton has 1232 states and 1874 transitions. Word has length 35 [2025-02-05 16:09:05,071 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:05,071 INFO L471 AbstractCegarLoop]: Abstraction has 1232 states and 1874 transitions. [2025-02-05 16:09:05,071 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 8.75) internal successors, (35), 4 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:05,071 INFO L276 IsEmpty]: Start isEmpty. Operand 1232 states and 1874 transitions. [2025-02-05 16:09:05,072 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2025-02-05 16:09:05,072 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:05,072 INFO L218 NwaCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:05,073 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable9 [2025-02-05 16:09:05,073 INFO L396 AbstractCegarLoop]: === Iteration 11 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:05,073 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:05,073 INFO L85 PathProgramCache]: Analyzing trace with hash -1347693949, now seen corresponding path program 1 times [2025-02-05 16:09:05,073 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:05,073 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2016324594] [2025-02-05 16:09:05,074 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:05,074 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:05,079 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 35 statements into 1 equivalence classes. [2025-02-05 16:09:05,084 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 35 of 35 statements. [2025-02-05 16:09:05,085 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:05,085 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:05,117 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 16:09:05,117 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:05,117 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2016324594] [2025-02-05 16:09:05,117 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2016324594] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:05,117 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:05,117 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-05 16:09:05,117 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1380917343] [2025-02-05 16:09:05,117 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:05,118 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-02-05 16:09:05,118 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:05,118 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-05 16:09:05,118 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:05,118 INFO L87 Difference]: Start difference. First operand 1232 states and 1874 transitions. Second operand has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:05,211 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:05,211 INFO L93 Difference]: Finished difference Result 2723 states and 4138 transitions. [2025-02-05 16:09:05,211 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-05 16:09:05,211 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 35 [2025-02-05 16:09:05,212 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:05,218 INFO L225 Difference]: With dead ends: 2723 [2025-02-05 16:09:05,218 INFO L226 Difference]: Without dead ends: 1510 [2025-02-05 16:09:05,223 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:05,224 INFO L435 NwaCegarLoop]: 185 mSDtfsCounter, 126 mSDsluCounter, 140 mSDsCounter, 0 mSdLazyCounter, 22 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 126 SdHoareTripleChecker+Valid, 325 SdHoareTripleChecker+Invalid, 27 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 22 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:05,224 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [126 Valid, 325 Invalid, 27 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 22 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 16:09:05,225 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1510 states. [2025-02-05 16:09:05,276 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1510 to 1507. [2025-02-05 16:09:05,279 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1507 states, 1506 states have (on average 1.5092961487383798) internal successors, (2273), 1506 states have internal predecessors, (2273), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:05,286 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1507 states to 1507 states and 2273 transitions. [2025-02-05 16:09:05,287 INFO L78 Accepts]: Start accepts. Automaton has 1507 states and 2273 transitions. Word has length 35 [2025-02-05 16:09:05,287 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:05,287 INFO L471 AbstractCegarLoop]: Abstraction has 1507 states and 2273 transitions. [2025-02-05 16:09:05,287 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 11.666666666666666) internal successors, (35), 3 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:05,288 INFO L276 IsEmpty]: Start isEmpty. Operand 1507 states and 2273 transitions. [2025-02-05 16:09:05,288 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2025-02-05 16:09:05,288 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:05,288 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:05,289 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable10 [2025-02-05 16:09:05,289 INFO L396 AbstractCegarLoop]: === Iteration 12 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:05,289 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:05,289 INFO L85 PathProgramCache]: Analyzing trace with hash -131311477, now seen corresponding path program 1 times [2025-02-05 16:09:05,289 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:05,289 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1352060167] [2025-02-05 16:09:05,289 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:05,289 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:05,297 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 46 statements into 1 equivalence classes. [2025-02-05 16:09:05,303 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 46 of 46 statements. [2025-02-05 16:09:05,303 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:05,303 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:05,336 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 16:09:05,336 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:05,336 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1352060167] [2025-02-05 16:09:05,336 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1352060167] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:05,336 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:05,336 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-05 16:09:05,336 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2034352957] [2025-02-05 16:09:05,336 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:05,337 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-02-05 16:09:05,337 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:05,337 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-05 16:09:05,337 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:05,337 INFO L87 Difference]: Start difference. First operand 1507 states and 2273 transitions. Second operand has 3 states, 3 states have (on average 15.333333333333334) internal successors, (46), 3 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:05,422 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:05,422 INFO L93 Difference]: Finished difference Result 3639 states and 5522 transitions. [2025-02-05 16:09:05,422 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-05 16:09:05,422 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 15.333333333333334) internal successors, (46), 3 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 46 [2025-02-05 16:09:05,423 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:05,431 INFO L225 Difference]: With dead ends: 3639 [2025-02-05 16:09:05,432 INFO L226 Difference]: Without dead ends: 2171 [2025-02-05 16:09:05,435 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:05,435 INFO L435 NwaCegarLoop]: 256 mSDtfsCounter, 85 mSDsluCounter, 175 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 85 SdHoareTripleChecker+Valid, 431 SdHoareTripleChecker+Invalid, 14 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:05,435 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [85 Valid, 431 Invalid, 14 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 16:09:05,438 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2171 states. [2025-02-05 16:09:05,537 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2171 to 2169. [2025-02-05 16:09:05,542 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2169 states, 2168 states have (on average 1.507841328413284) internal successors, (3269), 2168 states have internal predecessors, (3269), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:05,552 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2169 states to 2169 states and 3269 transitions. [2025-02-05 16:09:05,553 INFO L78 Accepts]: Start accepts. Automaton has 2169 states and 3269 transitions. Word has length 46 [2025-02-05 16:09:05,553 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:05,553 INFO L471 AbstractCegarLoop]: Abstraction has 2169 states and 3269 transitions. [2025-02-05 16:09:05,554 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 15.333333333333334) internal successors, (46), 3 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:05,554 INFO L276 IsEmpty]: Start isEmpty. Operand 2169 states and 3269 transitions. [2025-02-05 16:09:05,555 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2025-02-05 16:09:05,555 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:05,555 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:05,555 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable11 [2025-02-05 16:09:05,556 INFO L396 AbstractCegarLoop]: === Iteration 13 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:05,556 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:05,556 INFO L85 PathProgramCache]: Analyzing trace with hash -7238230, now seen corresponding path program 1 times [2025-02-05 16:09:05,556 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:05,556 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [624328714] [2025-02-05 16:09:05,556 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:05,557 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:05,563 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 46 statements into 1 equivalence classes. [2025-02-05 16:09:05,566 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 46 of 46 statements. [2025-02-05 16:09:05,566 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:05,566 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:05,600 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2025-02-05 16:09:05,600 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:05,600 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [624328714] [2025-02-05 16:09:05,600 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [624328714] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:05,600 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:05,600 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-05 16:09:05,600 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1543098205] [2025-02-05 16:09:05,600 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:05,601 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-02-05 16:09:05,601 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:05,601 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-05 16:09:05,601 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:05,601 INFO L87 Difference]: Start difference. First operand 2169 states and 3269 transitions. Second operand has 3 states, 3 states have (on average 14.0) internal successors, (42), 3 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:05,681 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:05,682 INFO L93 Difference]: Finished difference Result 4265 states and 6443 transitions. [2025-02-05 16:09:05,682 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-05 16:09:05,682 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.0) internal successors, (42), 3 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 46 [2025-02-05 16:09:05,682 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:05,693 INFO L225 Difference]: With dead ends: 4265 [2025-02-05 16:09:05,693 INFO L226 Difference]: Without dead ends: 2135 [2025-02-05 16:09:05,697 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:05,699 INFO L435 NwaCegarLoop]: 190 mSDtfsCounter, 187 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 2 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 187 SdHoareTripleChecker+Valid, 190 SdHoareTripleChecker+Invalid, 2 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:05,699 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [187 Valid, 190 Invalid, 2 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 16:09:05,702 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2135 states. [2025-02-05 16:09:05,813 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2135 to 2135. [2025-02-05 16:09:05,818 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2135 states, 2134 states have (on average 1.5107778819119024) internal successors, (3224), 2134 states have internal predecessors, (3224), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:05,827 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2135 states to 2135 states and 3224 transitions. [2025-02-05 16:09:05,828 INFO L78 Accepts]: Start accepts. Automaton has 2135 states and 3224 transitions. Word has length 46 [2025-02-05 16:09:05,828 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:05,828 INFO L471 AbstractCegarLoop]: Abstraction has 2135 states and 3224 transitions. [2025-02-05 16:09:05,828 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.0) internal successors, (42), 3 states have internal predecessors, (42), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:05,829 INFO L276 IsEmpty]: Start isEmpty. Operand 2135 states and 3224 transitions. [2025-02-05 16:09:05,829 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2025-02-05 16:09:05,829 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:05,830 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:05,830 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable12 [2025-02-05 16:09:05,830 INFO L396 AbstractCegarLoop]: === Iteration 14 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:05,831 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:05,831 INFO L85 PathProgramCache]: Analyzing trace with hash 891533401, now seen corresponding path program 1 times [2025-02-05 16:09:05,831 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:05,831 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1305996862] [2025-02-05 16:09:05,831 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:05,831 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:05,838 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 47 statements into 1 equivalence classes. [2025-02-05 16:09:05,843 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 47 of 47 statements. [2025-02-05 16:09:05,844 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:05,844 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:05,868 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 16:09:05,869 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:05,869 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1305996862] [2025-02-05 16:09:05,869 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1305996862] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:05,869 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:05,869 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-05 16:09:05,869 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [728748985] [2025-02-05 16:09:05,870 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:05,870 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-02-05 16:09:05,870 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:05,870 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-05 16:09:05,870 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:05,871 INFO L87 Difference]: Start difference. First operand 2135 states and 3224 transitions. Second operand has 3 states, 3 states have (on average 15.666666666666666) internal successors, (47), 3 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:06,001 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:06,002 INFO L93 Difference]: Finished difference Result 5356 states and 8134 transitions. [2025-02-05 16:09:06,003 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-05 16:09:06,003 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 15.666666666666666) internal successors, (47), 3 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 47 [2025-02-05 16:09:06,003 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:06,018 INFO L225 Difference]: With dead ends: 5356 [2025-02-05 16:09:06,018 INFO L226 Difference]: Without dead ends: 3260 [2025-02-05 16:09:06,022 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:06,023 INFO L435 NwaCegarLoop]: 239 mSDtfsCounter, 84 mSDsluCounter, 173 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 84 SdHoareTripleChecker+Valid, 412 SdHoareTripleChecker+Invalid, 14 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:06,024 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [84 Valid, 412 Invalid, 14 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 16:09:06,028 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3260 states. [2025-02-05 16:09:06,157 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3260 to 3258. [2025-02-05 16:09:06,163 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3258 states, 3257 states have (on average 1.5087503837887626) internal successors, (4914), 3257 states have internal predecessors, (4914), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:06,180 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3258 states to 3258 states and 4914 transitions. [2025-02-05 16:09:06,181 INFO L78 Accepts]: Start accepts. Automaton has 3258 states and 4914 transitions. Word has length 47 [2025-02-05 16:09:06,182 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:06,182 INFO L471 AbstractCegarLoop]: Abstraction has 3258 states and 4914 transitions. [2025-02-05 16:09:06,182 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 15.666666666666666) internal successors, (47), 3 states have internal predecessors, (47), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:06,182 INFO L276 IsEmpty]: Start isEmpty. Operand 3258 states and 4914 transitions. [2025-02-05 16:09:06,184 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2025-02-05 16:09:06,184 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:06,184 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:06,184 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable13 [2025-02-05 16:09:06,184 INFO L396 AbstractCegarLoop]: === Iteration 15 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:06,186 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:06,187 INFO L85 PathProgramCache]: Analyzing trace with hash 1015606648, now seen corresponding path program 1 times [2025-02-05 16:09:06,187 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:06,187 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [595141909] [2025-02-05 16:09:06,187 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:06,187 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:06,195 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 47 statements into 1 equivalence classes. [2025-02-05 16:09:06,197 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 47 of 47 statements. [2025-02-05 16:09:06,197 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:06,197 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:06,223 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2025-02-05 16:09:06,224 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:06,224 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [595141909] [2025-02-05 16:09:06,224 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [595141909] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:06,224 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:06,224 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-05 16:09:06,224 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1679957354] [2025-02-05 16:09:06,224 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:06,225 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-02-05 16:09:06,225 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:06,225 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-05 16:09:06,225 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:06,226 INFO L87 Difference]: Start difference. First operand 3258 states and 4914 transitions. Second operand has 3 states, 3 states have (on average 14.333333333333334) internal successors, (43), 3 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:06,361 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:06,362 INFO L93 Difference]: Finished difference Result 6442 states and 9734 transitions. [2025-02-05 16:09:06,362 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-05 16:09:06,363 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.333333333333334) internal successors, (43), 3 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 47 [2025-02-05 16:09:06,363 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:06,375 INFO L225 Difference]: With dead ends: 6442 [2025-02-05 16:09:06,376 INFO L226 Difference]: Without dead ends: 3225 [2025-02-05 16:09:06,381 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:06,381 INFO L435 NwaCegarLoop]: 189 mSDtfsCounter, 185 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 2 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 185 SdHoareTripleChecker+Valid, 189 SdHoareTripleChecker+Invalid, 2 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:06,382 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [185 Valid, 189 Invalid, 2 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 16:09:06,384 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3225 states. [2025-02-05 16:09:06,494 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3225 to 3225. [2025-02-05 16:09:06,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3225 states, 3224 states have (on average 1.5108560794044665) internal successors, (4871), 3224 states have internal predecessors, (4871), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:06,530 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3225 states to 3225 states and 4871 transitions. [2025-02-05 16:09:06,531 INFO L78 Accepts]: Start accepts. Automaton has 3225 states and 4871 transitions. Word has length 47 [2025-02-05 16:09:06,531 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:06,531 INFO L471 AbstractCegarLoop]: Abstraction has 3225 states and 4871 transitions. [2025-02-05 16:09:06,531 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.333333333333334) internal successors, (43), 3 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:06,531 INFO L276 IsEmpty]: Start isEmpty. Operand 3225 states and 4871 transitions. [2025-02-05 16:09:06,532 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2025-02-05 16:09:06,532 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:06,532 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:06,533 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable14 [2025-02-05 16:09:06,533 INFO L396 AbstractCegarLoop]: === Iteration 16 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:06,533 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:06,533 INFO L85 PathProgramCache]: Analyzing trace with hash -70435947, now seen corresponding path program 1 times [2025-02-05 16:09:06,533 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:06,533 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1527701837] [2025-02-05 16:09:06,533 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:06,534 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:06,540 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 48 statements into 1 equivalence classes. [2025-02-05 16:09:06,545 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 48 of 48 statements. [2025-02-05 16:09:06,545 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:06,545 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:06,565 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 16:09:06,566 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:06,566 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1527701837] [2025-02-05 16:09:06,566 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1527701837] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:06,566 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:06,566 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-05 16:09:06,566 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1517102691] [2025-02-05 16:09:06,566 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:06,567 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-02-05 16:09:06,567 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:06,567 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-05 16:09:06,567 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:06,567 INFO L87 Difference]: Start difference. First operand 3225 states and 4871 transitions. Second operand has 3 states, 3 states have (on average 16.0) internal successors, (48), 3 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:06,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:06,813 INFO L93 Difference]: Finished difference Result 8488 states and 12953 transitions. [2025-02-05 16:09:06,813 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-05 16:09:06,813 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 16.0) internal successors, (48), 3 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 48 [2025-02-05 16:09:06,814 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:06,837 INFO L225 Difference]: With dead ends: 8488 [2025-02-05 16:09:06,837 INFO L226 Difference]: Without dead ends: 5304 [2025-02-05 16:09:06,844 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:06,845 INFO L435 NwaCegarLoop]: 228 mSDtfsCounter, 89 mSDsluCounter, 170 mSDsCounter, 0 mSdLazyCounter, 8 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 89 SdHoareTripleChecker+Valid, 398 SdHoareTripleChecker+Invalid, 17 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 8 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:06,845 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [89 Valid, 398 Invalid, 17 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 8 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 16:09:06,850 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5304 states. [2025-02-05 16:09:07,060 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5304 to 5302. [2025-02-05 16:09:07,069 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5302 states, 5301 states have (on average 1.5199019053008866) internal successors, (8057), 5301 states have internal predecessors, (8057), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:07,090 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5302 states to 5302 states and 8057 transitions. [2025-02-05 16:09:07,092 INFO L78 Accepts]: Start accepts. Automaton has 5302 states and 8057 transitions. Word has length 48 [2025-02-05 16:09:07,092 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:07,092 INFO L471 AbstractCegarLoop]: Abstraction has 5302 states and 8057 transitions. [2025-02-05 16:09:07,095 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 16.0) internal successors, (48), 3 states have internal predecessors, (48), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:07,096 INFO L276 IsEmpty]: Start isEmpty. Operand 5302 states and 8057 transitions. [2025-02-05 16:09:07,101 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2025-02-05 16:09:07,102 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:07,102 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:07,102 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable15 [2025-02-05 16:09:07,102 INFO L396 AbstractCegarLoop]: === Iteration 17 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:07,103 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:07,103 INFO L85 PathProgramCache]: Analyzing trace with hash 53637300, now seen corresponding path program 1 times [2025-02-05 16:09:07,103 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:07,103 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1130591953] [2025-02-05 16:09:07,103 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:07,103 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:07,108 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 48 statements into 1 equivalence classes. [2025-02-05 16:09:07,112 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 48 of 48 statements. [2025-02-05 16:09:07,112 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:07,112 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:07,129 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 5 trivial. 0 not checked. [2025-02-05 16:09:07,130 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:07,130 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1130591953] [2025-02-05 16:09:07,130 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1130591953] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:07,130 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:07,130 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-05 16:09:07,130 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1634922199] [2025-02-05 16:09:07,130 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:07,131 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-02-05 16:09:07,131 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:07,131 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-05 16:09:07,132 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:07,132 INFO L87 Difference]: Start difference. First operand 5302 states and 8057 transitions. Second operand has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:07,301 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:07,301 INFO L93 Difference]: Finished difference Result 10529 states and 16021 transitions. [2025-02-05 16:09:07,302 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-05 16:09:07,302 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 48 [2025-02-05 16:09:07,302 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:07,330 INFO L225 Difference]: With dead ends: 10529 [2025-02-05 16:09:07,330 INFO L226 Difference]: Without dead ends: 5268 [2025-02-05 16:09:07,337 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:07,338 INFO L435 NwaCegarLoop]: 188 mSDtfsCounter, 183 mSDsluCounter, 0 mSDsCounter, 0 mSdLazyCounter, 2 mSolverCounterSat, 0 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 183 SdHoareTripleChecker+Valid, 188 SdHoareTripleChecker+Invalid, 2 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Valid, 2 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:07,338 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [183 Valid, 188 Invalid, 2 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [0 Valid, 2 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 16:09:07,344 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5268 states. [2025-02-05 16:09:07,517 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5268 to 5268. [2025-02-05 16:09:07,530 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5268 states, 5267 states have (on average 1.5215492690336054) internal successors, (8014), 5267 states have internal predecessors, (8014), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:07,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5268 states to 5268 states and 8014 transitions. [2025-02-05 16:09:07,557 INFO L78 Accepts]: Start accepts. Automaton has 5268 states and 8014 transitions. Word has length 48 [2025-02-05 16:09:07,558 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:07,558 INFO L471 AbstractCegarLoop]: Abstraction has 5268 states and 8014 transitions. [2025-02-05 16:09:07,558 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 14.666666666666666) internal successors, (44), 3 states have internal predecessors, (44), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:07,559 INFO L276 IsEmpty]: Start isEmpty. Operand 5268 states and 8014 transitions. [2025-02-05 16:09:07,560 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2025-02-05 16:09:07,560 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:07,560 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:07,560 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable16 [2025-02-05 16:09:07,560 INFO L396 AbstractCegarLoop]: === Iteration 18 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:07,561 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:07,561 INFO L85 PathProgramCache]: Analyzing trace with hash 504882511, now seen corresponding path program 1 times [2025-02-05 16:09:07,561 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:07,562 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [510900535] [2025-02-05 16:09:07,562 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:07,562 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:07,568 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 49 statements into 1 equivalence classes. [2025-02-05 16:09:07,572 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 49 of 49 statements. [2025-02-05 16:09:07,573 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:07,573 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:07,628 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 16:09:07,628 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:07,629 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [510900535] [2025-02-05 16:09:07,629 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [510900535] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:07,629 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:07,629 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-05 16:09:07,629 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1854995013] [2025-02-05 16:09:07,629 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:07,629 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-05 16:09:07,629 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:07,630 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-05 16:09:07,630 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-05 16:09:07,630 INFO L87 Difference]: Start difference. First operand 5268 states and 8014 transitions. Second operand has 4 states, 4 states have (on average 12.25) internal successors, (49), 4 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:07,921 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:07,921 INFO L93 Difference]: Finished difference Result 12918 states and 19630 transitions. [2025-02-05 16:09:07,922 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-05 16:09:07,922 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 12.25) internal successors, (49), 4 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 49 [2025-02-05 16:09:07,922 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:07,944 INFO L225 Difference]: With dead ends: 12918 [2025-02-05 16:09:07,945 INFO L226 Difference]: Without dead ends: 6813 [2025-02-05 16:09:07,955 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-02-05 16:09:07,956 INFO L435 NwaCegarLoop]: 208 mSDtfsCounter, 417 mSDsluCounter, 113 mSDsCounter, 0 mSdLazyCounter, 36 mSolverCounterSat, 9 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 417 SdHoareTripleChecker+Valid, 321 SdHoareTripleChecker+Invalid, 45 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 9 IncrementalHoareTripleChecker+Valid, 36 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:07,956 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [417 Valid, 321 Invalid, 45 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [9 Valid, 36 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-02-05 16:09:07,963 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 6813 states. [2025-02-05 16:09:08,347 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 6813 to 6813. [2025-02-05 16:09:08,361 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 6813 states, 6812 states have (on average 1.4925132119788609) internal successors, (10167), 6812 states have internal predecessors, (10167), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:08,383 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 6813 states to 6813 states and 10167 transitions. [2025-02-05 16:09:08,386 INFO L78 Accepts]: Start accepts. Automaton has 6813 states and 10167 transitions. Word has length 49 [2025-02-05 16:09:08,386 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:08,386 INFO L471 AbstractCegarLoop]: Abstraction has 6813 states and 10167 transitions. [2025-02-05 16:09:08,386 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 12.25) internal successors, (49), 4 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:08,386 INFO L276 IsEmpty]: Start isEmpty. Operand 6813 states and 10167 transitions. [2025-02-05 16:09:08,388 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2025-02-05 16:09:08,388 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:08,388 INFO L218 NwaCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:08,389 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable17 [2025-02-05 16:09:08,389 INFO L396 AbstractCegarLoop]: === Iteration 19 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:08,389 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:08,389 INFO L85 PathProgramCache]: Analyzing trace with hash 455477141, now seen corresponding path program 1 times [2025-02-05 16:09:08,389 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:08,389 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1413091747] [2025-02-05 16:09:08,390 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:08,390 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:08,399 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 55 statements into 1 equivalence classes. [2025-02-05 16:09:08,403 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 55 of 55 statements. [2025-02-05 16:09:08,407 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:08,407 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:08,489 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 5 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 16:09:08,489 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:08,490 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1413091747] [2025-02-05 16:09:08,490 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1413091747] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:08,491 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:08,491 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2025-02-05 16:09:08,491 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [401897448] [2025-02-05 16:09:08,491 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:08,491 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 5 states [2025-02-05 16:09:08,491 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:08,492 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-05 16:09:08,492 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2025-02-05 16:09:08,492 INFO L87 Difference]: Start difference. First operand 6813 states and 10167 transitions. Second operand has 5 states, 5 states have (on average 11.0) internal successors, (55), 5 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:08,946 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:08,947 INFO L93 Difference]: Finished difference Result 18969 states and 28290 transitions. [2025-02-05 16:09:08,947 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2025-02-05 16:09:08,947 INFO L78 Accepts]: Start accepts. Automaton has has 5 states, 5 states have (on average 11.0) internal successors, (55), 5 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 55 [2025-02-05 16:09:08,948 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:08,982 INFO L225 Difference]: With dead ends: 18969 [2025-02-05 16:09:08,983 INFO L226 Difference]: Without dead ends: 12185 [2025-02-05 16:09:08,995 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2025-02-05 16:09:08,996 INFO L435 NwaCegarLoop]: 179 mSDtfsCounter, 715 mSDsluCounter, 353 mSDsCounter, 0 mSdLazyCounter, 43 mSolverCounterSat, 13 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 715 SdHoareTripleChecker+Valid, 532 SdHoareTripleChecker+Invalid, 56 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 13 IncrementalHoareTripleChecker+Valid, 43 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:08,996 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [715 Valid, 532 Invalid, 56 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [13 Valid, 43 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-02-05 16:09:09,009 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12185 states. [2025-02-05 16:09:09,360 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12185 to 8087. [2025-02-05 16:09:09,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 8087 states, 8086 states have (on average 1.4710610932475885) internal successors, (11895), 8086 states have internal predecessors, (11895), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:09,396 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 8087 states to 8087 states and 11895 transitions. [2025-02-05 16:09:09,400 INFO L78 Accepts]: Start accepts. Automaton has 8087 states and 11895 transitions. Word has length 55 [2025-02-05 16:09:09,400 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:09,400 INFO L471 AbstractCegarLoop]: Abstraction has 8087 states and 11895 transitions. [2025-02-05 16:09:09,400 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 5 states, 5 states have (on average 11.0) internal successors, (55), 5 states have internal predecessors, (55), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:09,401 INFO L276 IsEmpty]: Start isEmpty. Operand 8087 states and 11895 transitions. [2025-02-05 16:09:09,406 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2025-02-05 16:09:09,407 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:09,407 INFO L218 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:09,407 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable18 [2025-02-05 16:09:09,407 INFO L396 AbstractCegarLoop]: === Iteration 20 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:09,408 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:09,408 INFO L85 PathProgramCache]: Analyzing trace with hash -77541371, now seen corresponding path program 1 times [2025-02-05 16:09:09,408 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:09,408 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2037631018] [2025-02-05 16:09:09,408 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:09,408 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:09,416 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 92 statements into 1 equivalence classes. [2025-02-05 16:09:09,421 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 92 of 92 statements. [2025-02-05 16:09:09,421 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:09,422 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:09,471 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2025-02-05 16:09:09,472 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:09,472 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2037631018] [2025-02-05 16:09:09,472 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2037631018] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:09,472 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:09,472 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-05 16:09:09,472 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [419512566] [2025-02-05 16:09:09,472 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:09,473 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-05 16:09:09,473 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:09,474 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-05 16:09:09,474 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-05 16:09:09,474 INFO L87 Difference]: Start difference. First operand 8087 states and 11895 transitions. Second operand has 4 states, 4 states have (on average 22.75) internal successors, (91), 4 states have internal predecessors, (91), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:09,874 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:09,874 INFO L93 Difference]: Finished difference Result 19176 states and 28067 transitions. [2025-02-05 16:09:09,874 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-05 16:09:09,875 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 22.75) internal successors, (91), 4 states have internal predecessors, (91), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 92 [2025-02-05 16:09:09,875 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:09,903 INFO L225 Difference]: With dead ends: 19176 [2025-02-05 16:09:09,904 INFO L226 Difference]: Without dead ends: 11112 [2025-02-05 16:09:09,917 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-02-05 16:09:09,918 INFO L435 NwaCegarLoop]: 168 mSDtfsCounter, 370 mSDsluCounter, 136 mSDsCounter, 0 mSdLazyCounter, 33 mSolverCounterSat, 6 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 370 SdHoareTripleChecker+Valid, 304 SdHoareTripleChecker+Invalid, 39 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 6 IncrementalHoareTripleChecker+Valid, 33 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:09,920 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [370 Valid, 304 Invalid, 39 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [6 Valid, 33 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-02-05 16:09:09,934 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11112 states. [2025-02-05 16:09:10,373 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11112 to 7166. [2025-02-05 16:09:10,385 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7166 states, 7165 states have (on average 1.4591765526866713) internal successors, (10455), 7165 states have internal predecessors, (10455), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:10,405 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7166 states to 7166 states and 10455 transitions. [2025-02-05 16:09:10,409 INFO L78 Accepts]: Start accepts. Automaton has 7166 states and 10455 transitions. Word has length 92 [2025-02-05 16:09:10,409 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:10,409 INFO L471 AbstractCegarLoop]: Abstraction has 7166 states and 10455 transitions. [2025-02-05 16:09:10,409 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 22.75) internal successors, (91), 4 states have internal predecessors, (91), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:10,410 INFO L276 IsEmpty]: Start isEmpty. Operand 7166 states and 10455 transitions. [2025-02-05 16:09:10,413 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2025-02-05 16:09:10,413 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:10,414 INFO L218 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:10,414 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable19 [2025-02-05 16:09:10,414 INFO L396 AbstractCegarLoop]: === Iteration 21 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:10,414 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:10,415 INFO L85 PathProgramCache]: Analyzing trace with hash 1306788133, now seen corresponding path program 1 times [2025-02-05 16:09:10,415 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:10,415 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1580541090] [2025-02-05 16:09:10,415 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:10,415 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:10,424 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 92 statements into 1 equivalence classes. [2025-02-05 16:09:10,428 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 92 of 92 statements. [2025-02-05 16:09:10,429 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:10,429 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:10,462 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 16:09:10,462 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:10,463 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1580541090] [2025-02-05 16:09:10,463 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1580541090] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:10,463 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:10,463 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-05 16:09:10,463 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [307900357] [2025-02-05 16:09:10,463 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:10,465 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-02-05 16:09:10,465 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:10,465 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-05 16:09:10,465 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:10,465 INFO L87 Difference]: Start difference. First operand 7166 states and 10455 transitions. Second operand has 3 states, 3 states have (on average 30.666666666666668) internal successors, (92), 3 states have internal predecessors, (92), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:10,872 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:10,873 INFO L93 Difference]: Finished difference Result 14599 states and 21320 transitions. [2025-02-05 16:09:10,874 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-05 16:09:10,874 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 30.666666666666668) internal successors, (92), 3 states have internal predecessors, (92), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 92 [2025-02-05 16:09:10,874 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:10,895 INFO L225 Difference]: With dead ends: 14599 [2025-02-05 16:09:10,895 INFO L226 Difference]: Without dead ends: 7462 [2025-02-05 16:09:10,907 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:10,908 INFO L435 NwaCegarLoop]: 242 mSDtfsCounter, 127 mSDsluCounter, 76 mSDsCounter, 0 mSdLazyCounter, 10 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 127 SdHoareTripleChecker+Valid, 318 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 10 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:10,908 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [127 Valid, 318 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 10 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 16:09:10,918 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7462 states. [2025-02-05 16:09:11,235 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7462 to 7430. [2025-02-05 16:09:11,248 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7430 states, 7429 states have (on average 1.423206353479607) internal successors, (10573), 7429 states have internal predecessors, (10573), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:11,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7430 states to 7430 states and 10573 transitions. [2025-02-05 16:09:11,267 INFO L78 Accepts]: Start accepts. Automaton has 7430 states and 10573 transitions. Word has length 92 [2025-02-05 16:09:11,267 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:11,267 INFO L471 AbstractCegarLoop]: Abstraction has 7430 states and 10573 transitions. [2025-02-05 16:09:11,268 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 30.666666666666668) internal successors, (92), 3 states have internal predecessors, (92), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:11,268 INFO L276 IsEmpty]: Start isEmpty. Operand 7430 states and 10573 transitions. [2025-02-05 16:09:11,272 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2025-02-05 16:09:11,272 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:11,272 INFO L218 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:11,273 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable20 [2025-02-05 16:09:11,273 INFO L396 AbstractCegarLoop]: === Iteration 22 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:11,273 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:11,273 INFO L85 PathProgramCache]: Analyzing trace with hash -256959016, now seen corresponding path program 1 times [2025-02-05 16:09:11,273 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:11,274 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [58758285] [2025-02-05 16:09:11,274 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:11,274 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:11,283 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 93 statements into 1 equivalence classes. [2025-02-05 16:09:11,287 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 93 of 93 statements. [2025-02-05 16:09:11,288 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:11,288 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:11,318 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 16:09:11,319 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:11,319 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [58758285] [2025-02-05 16:09:11,319 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [58758285] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:11,319 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:11,319 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-05 16:09:11,319 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1483383388] [2025-02-05 16:09:11,319 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:11,320 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-02-05 16:09:11,320 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:11,320 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-05 16:09:11,321 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:11,321 INFO L87 Difference]: Start difference. First operand 7430 states and 10573 transitions. Second operand has 3 states, 3 states have (on average 31.0) internal successors, (93), 3 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:11,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:11,596 INFO L93 Difference]: Finished difference Result 15297 states and 21780 transitions. [2025-02-05 16:09:11,596 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-05 16:09:11,597 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 31.0) internal successors, (93), 3 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 93 [2025-02-05 16:09:11,597 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:11,618 INFO L225 Difference]: With dead ends: 15297 [2025-02-05 16:09:11,618 INFO L226 Difference]: Without dead ends: 7908 [2025-02-05 16:09:11,628 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:11,631 INFO L435 NwaCegarLoop]: 239 mSDtfsCounter, 127 mSDsluCounter, 78 mSDsCounter, 0 mSdLazyCounter, 10 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 127 SdHoareTripleChecker+Valid, 317 SdHoareTripleChecker+Invalid, 15 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 10 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:11,631 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [127 Valid, 317 Invalid, 15 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 10 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 16:09:11,635 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7908 states. [2025-02-05 16:09:11,946 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7908 to 7860. [2025-02-05 16:09:11,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7860 states, 7859 states have (on average 1.3865631759765873) internal successors, (10897), 7859 states have internal predecessors, (10897), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:11,967 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7860 states to 7860 states and 10897 transitions. [2025-02-05 16:09:11,970 INFO L78 Accepts]: Start accepts. Automaton has 7860 states and 10897 transitions. Word has length 93 [2025-02-05 16:09:11,970 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:11,970 INFO L471 AbstractCegarLoop]: Abstraction has 7860 states and 10897 transitions. [2025-02-05 16:09:11,970 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 31.0) internal successors, (93), 3 states have internal predecessors, (93), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:11,970 INFO L276 IsEmpty]: Start isEmpty. Operand 7860 states and 10897 transitions. [2025-02-05 16:09:11,975 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2025-02-05 16:09:11,976 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:11,976 INFO L218 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:11,976 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable21 [2025-02-05 16:09:11,976 INFO L396 AbstractCegarLoop]: === Iteration 23 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:11,976 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:11,977 INFO L85 PathProgramCache]: Analyzing trace with hash 952026339, now seen corresponding path program 1 times [2025-02-05 16:09:11,977 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:11,977 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1266801046] [2025-02-05 16:09:11,977 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:11,977 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:11,983 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 94 statements into 1 equivalence classes. [2025-02-05 16:09:11,988 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 94 of 94 statements. [2025-02-05 16:09:11,988 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:11,988 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:12,016 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 11 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-05 16:09:12,017 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:12,017 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1266801046] [2025-02-05 16:09:12,017 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1266801046] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:12,017 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:12,017 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-05 16:09:12,017 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1095344787] [2025-02-05 16:09:12,017 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:12,018 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-02-05 16:09:12,018 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:12,018 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-05 16:09:12,018 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:12,018 INFO L87 Difference]: Start difference. First operand 7860 states and 10897 transitions. Second operand has 3 states, 3 states have (on average 31.333333333333332) internal successors, (94), 3 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:12,296 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:12,296 INFO L93 Difference]: Finished difference Result 15926 states and 22144 transitions. [2025-02-05 16:09:12,297 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-05 16:09:12,297 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 31.333333333333332) internal successors, (94), 3 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 94 [2025-02-05 16:09:12,297 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:12,314 INFO L225 Difference]: With dead ends: 15926 [2025-02-05 16:09:12,314 INFO L226 Difference]: Without dead ends: 8127 [2025-02-05 16:09:12,324 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:12,325 INFO L435 NwaCegarLoop]: 236 mSDtfsCounter, 124 mSDsluCounter, 78 mSDsCounter, 0 mSdLazyCounter, 13 mSolverCounterSat, 8 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 124 SdHoareTripleChecker+Valid, 314 SdHoareTripleChecker+Invalid, 21 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 8 IncrementalHoareTripleChecker+Valid, 13 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:12,325 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [124 Valid, 314 Invalid, 21 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [8 Valid, 13 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 16:09:12,330 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 8127 states. [2025-02-05 16:09:12,587 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 8127 to 7410. [2025-02-05 16:09:12,593 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7410 states, 7409 states have (on average 1.3314887299230664) internal successors, (9865), 7409 states have internal predecessors, (9865), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:12,603 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7410 states to 7410 states and 9865 transitions. [2025-02-05 16:09:12,606 INFO L78 Accepts]: Start accepts. Automaton has 7410 states and 9865 transitions. Word has length 94 [2025-02-05 16:09:12,606 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:12,606 INFO L471 AbstractCegarLoop]: Abstraction has 7410 states and 9865 transitions. [2025-02-05 16:09:12,606 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 31.333333333333332) internal successors, (94), 3 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:12,606 INFO L276 IsEmpty]: Start isEmpty. Operand 7410 states and 9865 transitions. [2025-02-05 16:09:12,610 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2025-02-05 16:09:12,610 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:12,610 INFO L218 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:12,611 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable22 [2025-02-05 16:09:12,611 INFO L396 AbstractCegarLoop]: === Iteration 24 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:12,611 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:12,611 INFO L85 PathProgramCache]: Analyzing trace with hash -1392333286, now seen corresponding path program 1 times [2025-02-05 16:09:12,611 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:12,611 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [552664714] [2025-02-05 16:09:12,611 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:12,611 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:12,617 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 95 statements into 1 equivalence classes. [2025-02-05 16:09:12,621 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 95 of 95 statements. [2025-02-05 16:09:12,621 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:12,621 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:12,649 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2025-02-05 16:09:12,649 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:12,649 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [552664714] [2025-02-05 16:09:12,649 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [552664714] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:12,649 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:12,649 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-05 16:09:12,650 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [698031079] [2025-02-05 16:09:12,650 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:12,650 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-02-05 16:09:12,650 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:12,651 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-05 16:09:12,651 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:12,651 INFO L87 Difference]: Start difference. First operand 7410 states and 9865 transitions. Second operand has 3 states, 3 states have (on average 31.333333333333332) internal successors, (94), 3 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:12,908 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:12,908 INFO L93 Difference]: Finished difference Result 13392 states and 17868 transitions. [2025-02-05 16:09:12,908 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-05 16:09:12,909 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 31.333333333333332) internal successors, (94), 3 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 95 [2025-02-05 16:09:12,909 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:12,929 INFO L225 Difference]: With dead ends: 13392 [2025-02-05 16:09:12,929 INFO L226 Difference]: Without dead ends: 7410 [2025-02-05 16:09:12,937 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:12,938 INFO L435 NwaCegarLoop]: 176 mSDtfsCounter, 6 mSDsluCounter, 166 mSDsCounter, 0 mSdLazyCounter, 12 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 6 SdHoareTripleChecker+Valid, 342 SdHoareTripleChecker+Invalid, 13 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 12 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:12,939 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [6 Valid, 342 Invalid, 13 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 12 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 16:09:12,944 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 7410 states. [2025-02-05 16:09:13,306 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 7410 to 7410. [2025-02-05 16:09:13,314 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 7410 states, 7409 states have (on average 1.329734107166959) internal successors, (9852), 7409 states have internal predecessors, (9852), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:13,329 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 7410 states to 7410 states and 9852 transitions. [2025-02-05 16:09:13,333 INFO L78 Accepts]: Start accepts. Automaton has 7410 states and 9852 transitions. Word has length 95 [2025-02-05 16:09:13,333 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:13,333 INFO L471 AbstractCegarLoop]: Abstraction has 7410 states and 9852 transitions. [2025-02-05 16:09:13,333 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 31.333333333333332) internal successors, (94), 3 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:13,333 INFO L276 IsEmpty]: Start isEmpty. Operand 7410 states and 9852 transitions. [2025-02-05 16:09:13,338 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2025-02-05 16:09:13,339 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:13,339 INFO L218 NwaCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:13,339 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable23 [2025-02-05 16:09:13,339 INFO L396 AbstractCegarLoop]: === Iteration 25 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:13,340 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:13,340 INFO L85 PathProgramCache]: Analyzing trace with hash -1098930279, now seen corresponding path program 1 times [2025-02-05 16:09:13,340 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:13,340 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1104018577] [2025-02-05 16:09:13,340 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:13,340 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:13,347 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 95 statements into 1 equivalence classes. [2025-02-05 16:09:13,352 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 95 of 95 statements. [2025-02-05 16:09:13,352 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:13,352 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:13,416 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 9 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2025-02-05 16:09:13,416 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:13,417 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1104018577] [2025-02-05 16:09:13,417 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1104018577] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:13,417 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:13,417 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-05 16:09:13,417 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1546349796] [2025-02-05 16:09:13,417 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:13,417 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-05 16:09:13,418 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:13,418 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-05 16:09:13,418 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-05 16:09:13,418 INFO L87 Difference]: Start difference. First operand 7410 states and 9852 transitions. Second operand has 4 states, 4 states have (on average 23.5) internal successors, (94), 4 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:14,015 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:14,015 INFO L93 Difference]: Finished difference Result 13970 states and 18533 transitions. [2025-02-05 16:09:14,016 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-05 16:09:14,016 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 23.5) internal successors, (94), 4 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 95 [2025-02-05 16:09:14,016 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:14,030 INFO L225 Difference]: With dead ends: 13970 [2025-02-05 16:09:14,030 INFO L226 Difference]: Without dead ends: 5789 [2025-02-05 16:09:14,037 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-02-05 16:09:14,038 INFO L435 NwaCegarLoop]: 160 mSDtfsCounter, 442 mSDsluCounter, 231 mSDsCounter, 0 mSdLazyCounter, 47 mSolverCounterSat, 16 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.1s Time, 0 mProtectedPredicate, 0 mProtectedAction, 442 SdHoareTripleChecker+Valid, 391 SdHoareTripleChecker+Invalid, 63 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 16 IncrementalHoareTripleChecker+Valid, 47 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.1s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:14,038 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [442 Valid, 391 Invalid, 63 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [16 Valid, 47 Invalid, 0 Unknown, 0 Unchecked, 0.1s Time] [2025-02-05 16:09:14,041 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5789 states. [2025-02-05 16:09:14,265 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5789 to 5675. [2025-02-05 16:09:14,270 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5675 states, 5674 states have (on average 1.2936200211491011) internal successors, (7340), 5674 states have internal predecessors, (7340), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:14,276 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5675 states to 5675 states and 7340 transitions. [2025-02-05 16:09:14,280 INFO L78 Accepts]: Start accepts. Automaton has 5675 states and 7340 transitions. Word has length 95 [2025-02-05 16:09:14,280 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:14,280 INFO L471 AbstractCegarLoop]: Abstraction has 5675 states and 7340 transitions. [2025-02-05 16:09:14,280 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 23.5) internal successors, (94), 4 states have internal predecessors, (94), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:14,280 INFO L276 IsEmpty]: Start isEmpty. Operand 5675 states and 7340 transitions. [2025-02-05 16:09:14,289 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2025-02-05 16:09:14,289 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:14,289 INFO L218 NwaCegarLoop]: trace histogram [4, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:14,289 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable24 [2025-02-05 16:09:14,289 INFO L396 AbstractCegarLoop]: === Iteration 26 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:14,290 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:14,290 INFO L85 PathProgramCache]: Analyzing trace with hash 366123217, now seen corresponding path program 1 times [2025-02-05 16:09:14,290 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:14,290 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1237438528] [2025-02-05 16:09:14,290 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:14,290 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:14,299 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 124 statements into 1 equivalence classes. [2025-02-05 16:09:14,302 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 124 of 124 statements. [2025-02-05 16:09:14,302 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:14,302 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:14,331 INFO L134 CoverageAnalysis]: Checked inductivity of 29 backedges. 18 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2025-02-05 16:09:14,332 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:14,332 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1237438528] [2025-02-05 16:09:14,332 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1237438528] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:14,332 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:14,332 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-05 16:09:14,332 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1986100717] [2025-02-05 16:09:14,332 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:14,333 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-02-05 16:09:14,333 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:14,333 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-05 16:09:14,333 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:14,334 INFO L87 Difference]: Start difference. First operand 5675 states and 7340 transitions. Second operand has 3 states, 3 states have (on average 39.333333333333336) internal successors, (118), 3 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:14,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:14,595 INFO L93 Difference]: Finished difference Result 10872 states and 14044 transitions. [2025-02-05 16:09:14,595 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-05 16:09:14,595 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 39.333333333333336) internal successors, (118), 3 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 124 [2025-02-05 16:09:14,595 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:14,610 INFO L225 Difference]: With dead ends: 10872 [2025-02-05 16:09:14,610 INFO L226 Difference]: Without dead ends: 5621 [2025-02-05 16:09:14,615 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:14,616 INFO L435 NwaCegarLoop]: 169 mSDtfsCounter, 35 mSDsluCounter, 135 mSDsCounter, 0 mSdLazyCounter, 10 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 35 SdHoareTripleChecker+Valid, 304 SdHoareTripleChecker+Invalid, 14 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 10 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:14,617 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [35 Valid, 304 Invalid, 14 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 10 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 16:09:14,622 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5621 states. [2025-02-05 16:09:14,820 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5621 to 5621. [2025-02-05 16:09:14,825 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5621 states, 5620 states have (on average 1.287188612099644) internal successors, (7234), 5620 states have internal predecessors, (7234), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:14,832 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5621 states to 5621 states and 7234 transitions. [2025-02-05 16:09:14,836 INFO L78 Accepts]: Start accepts. Automaton has 5621 states and 7234 transitions. Word has length 124 [2025-02-05 16:09:14,836 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:14,836 INFO L471 AbstractCegarLoop]: Abstraction has 5621 states and 7234 transitions. [2025-02-05 16:09:14,836 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 39.333333333333336) internal successors, (118), 3 states have internal predecessors, (118), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:14,836 INFO L276 IsEmpty]: Start isEmpty. Operand 5621 states and 7234 transitions. [2025-02-05 16:09:14,846 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 139 [2025-02-05 16:09:14,846 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:14,846 INFO L218 NwaCegarLoop]: trace histogram [5, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:14,846 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable25 [2025-02-05 16:09:14,846 INFO L396 AbstractCegarLoop]: === Iteration 27 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:14,847 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:14,847 INFO L85 PathProgramCache]: Analyzing trace with hash -901210675, now seen corresponding path program 1 times [2025-02-05 16:09:14,847 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:14,847 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [820596783] [2025-02-05 16:09:14,847 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:14,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:14,855 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 138 statements into 1 equivalence classes. [2025-02-05 16:09:14,859 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 138 of 138 statements. [2025-02-05 16:09:14,859 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:14,859 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:14,936 INFO L134 CoverageAnalysis]: Checked inductivity of 56 backedges. 45 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2025-02-05 16:09:14,936 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:14,936 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [820596783] [2025-02-05 16:09:14,936 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [820596783] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:14,936 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:14,936 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-05 16:09:14,937 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1629493541] [2025-02-05 16:09:14,937 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:14,937 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-05 16:09:14,937 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:14,937 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-05 16:09:14,937 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-05 16:09:14,938 INFO L87 Difference]: Start difference. First operand 5621 states and 7234 transitions. Second operand has 4 states, 4 states have (on average 33.0) internal successors, (132), 4 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:15,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:15,174 INFO L93 Difference]: Finished difference Result 10063 states and 12970 transitions. [2025-02-05 16:09:15,174 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-05 16:09:15,174 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 33.0) internal successors, (132), 4 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 138 [2025-02-05 16:09:15,174 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:15,187 INFO L225 Difference]: With dead ends: 10063 [2025-02-05 16:09:15,188 INFO L226 Difference]: Without dead ends: 5529 [2025-02-05 16:09:15,192 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-02-05 16:09:15,192 INFO L435 NwaCegarLoop]: 208 mSDtfsCounter, 309 mSDsluCounter, 109 mSDsCounter, 0 mSdLazyCounter, 27 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 309 SdHoareTripleChecker+Valid, 317 SdHoareTripleChecker+Invalid, 32 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 27 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:15,192 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [309 Valid, 317 Invalid, 32 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 27 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 16:09:15,195 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5529 states. [2025-02-05 16:09:15,397 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5529 to 5527. [2025-02-05 16:09:15,402 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5527 states, 5526 states have (on average 1.265472312703583) internal successors, (6993), 5526 states have internal predecessors, (6993), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:15,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5527 states to 5527 states and 6993 transitions. [2025-02-05 16:09:15,414 INFO L78 Accepts]: Start accepts. Automaton has 5527 states and 6993 transitions. Word has length 138 [2025-02-05 16:09:15,415 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:15,415 INFO L471 AbstractCegarLoop]: Abstraction has 5527 states and 6993 transitions. [2025-02-05 16:09:15,415 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 33.0) internal successors, (132), 4 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:15,415 INFO L276 IsEmpty]: Start isEmpty. Operand 5527 states and 6993 transitions. [2025-02-05 16:09:15,422 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2025-02-05 16:09:15,423 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:15,423 INFO L218 NwaCegarLoop]: trace histogram [5, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:15,423 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable26 [2025-02-05 16:09:15,423 INFO L396 AbstractCegarLoop]: === Iteration 28 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:15,424 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:15,424 INFO L85 PathProgramCache]: Analyzing trace with hash 535034058, now seen corresponding path program 1 times [2025-02-05 16:09:15,424 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:15,424 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [372584974] [2025-02-05 16:09:15,424 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:15,424 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:15,432 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 143 statements into 1 equivalence classes. [2025-02-05 16:09:15,436 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 143 of 143 statements. [2025-02-05 16:09:15,436 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:15,436 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:15,471 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 37 proven. 0 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2025-02-05 16:09:15,472 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:15,472 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [372584974] [2025-02-05 16:09:15,472 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [372584974] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:15,472 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:15,472 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-05 16:09:15,472 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [746952313] [2025-02-05 16:09:15,472 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:15,473 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-02-05 16:09:15,473 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:15,473 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-05 16:09:15,473 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:15,474 INFO L87 Difference]: Start difference. First operand 5527 states and 6993 transitions. Second operand has 3 states, 3 states have (on average 44.666666666666664) internal successors, (134), 3 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:15,724 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:15,725 INFO L93 Difference]: Finished difference Result 10629 states and 13436 transitions. [2025-02-05 16:09:15,725 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-05 16:09:15,726 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 44.666666666666664) internal successors, (134), 3 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 143 [2025-02-05 16:09:15,726 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:15,742 INFO L225 Difference]: With dead ends: 10629 [2025-02-05 16:09:15,742 INFO L226 Difference]: Without dead ends: 5526 [2025-02-05 16:09:15,748 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:15,748 INFO L435 NwaCegarLoop]: 167 mSDtfsCounter, 23 mSDsluCounter, 136 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 23 SdHoareTripleChecker+Valid, 303 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:15,749 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [23 Valid, 303 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 16:09:15,752 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5526 states. [2025-02-05 16:09:15,963 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5526 to 5486. [2025-02-05 16:09:15,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5486 states, 5485 states have (on average 1.259799453053783) internal successors, (6910), 5485 states have internal predecessors, (6910), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:15,975 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5486 states to 5486 states and 6910 transitions. [2025-02-05 16:09:15,979 INFO L78 Accepts]: Start accepts. Automaton has 5486 states and 6910 transitions. Word has length 143 [2025-02-05 16:09:15,980 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:15,980 INFO L471 AbstractCegarLoop]: Abstraction has 5486 states and 6910 transitions. [2025-02-05 16:09:15,980 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 44.666666666666664) internal successors, (134), 3 states have internal predecessors, (134), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:15,980 INFO L276 IsEmpty]: Start isEmpty. Operand 5486 states and 6910 transitions. [2025-02-05 16:09:15,987 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2025-02-05 16:09:15,987 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:15,987 INFO L218 NwaCegarLoop]: trace histogram [5, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:15,987 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable27 [2025-02-05 16:09:15,988 INFO L396 AbstractCegarLoop]: === Iteration 29 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:15,988 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:15,988 INFO L85 PathProgramCache]: Analyzing trace with hash -1166052546, now seen corresponding path program 1 times [2025-02-05 16:09:15,988 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:15,988 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1334870780] [2025-02-05 16:09:15,988 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:15,989 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:15,996 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 143 statements into 1 equivalence classes. [2025-02-05 16:09:15,999 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 143 of 143 statements. [2025-02-05 16:09:15,999 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:15,999 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:16,028 INFO L134 CoverageAnalysis]: Checked inductivity of 57 backedges. 38 proven. 0 refuted. 0 times theorem prover too weak. 19 trivial. 0 not checked. [2025-02-05 16:09:16,028 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:16,028 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1334870780] [2025-02-05 16:09:16,028 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1334870780] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:16,028 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:16,028 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-05 16:09:16,029 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [176433079] [2025-02-05 16:09:16,029 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:16,029 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-02-05 16:09:16,029 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:16,030 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-05 16:09:16,030 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:16,030 INFO L87 Difference]: Start difference. First operand 5486 states and 6910 transitions. Second operand has 3 states, 3 states have (on average 44.333333333333336) internal successors, (133), 3 states have internal predecessors, (133), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:16,234 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:16,234 INFO L93 Difference]: Finished difference Result 10568 states and 13297 transitions. [2025-02-05 16:09:16,234 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-05 16:09:16,234 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 44.333333333333336) internal successors, (133), 3 states have internal predecessors, (133), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 143 [2025-02-05 16:09:16,234 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:16,248 INFO L225 Difference]: With dead ends: 10568 [2025-02-05 16:09:16,248 INFO L226 Difference]: Without dead ends: 5496 [2025-02-05 16:09:16,252 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:16,253 INFO L435 NwaCegarLoop]: 164 mSDtfsCounter, 23 mSDsluCounter, 135 mSDsCounter, 0 mSdLazyCounter, 7 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 23 SdHoareTripleChecker+Valid, 299 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 7 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:16,253 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [23 Valid, 299 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 7 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 16:09:16,256 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5496 states. [2025-02-05 16:09:16,461 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5496 to 5456. [2025-02-05 16:09:16,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5456 states, 5455 states have (on average 1.253712190650779) internal successors, (6839), 5455 states have internal predecessors, (6839), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:16,472 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5456 states to 5456 states and 6839 transitions. [2025-02-05 16:09:16,476 INFO L78 Accepts]: Start accepts. Automaton has 5456 states and 6839 transitions. Word has length 143 [2025-02-05 16:09:16,477 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:16,477 INFO L471 AbstractCegarLoop]: Abstraction has 5456 states and 6839 transitions. [2025-02-05 16:09:16,477 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 44.333333333333336) internal successors, (133), 3 states have internal predecessors, (133), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:16,477 INFO L276 IsEmpty]: Start isEmpty. Operand 5456 states and 6839 transitions. [2025-02-05 16:09:16,482 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 149 [2025-02-05 16:09:16,482 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:16,482 INFO L218 NwaCegarLoop]: trace histogram [5, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:16,482 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable28 [2025-02-05 16:09:16,483 INFO L396 AbstractCegarLoop]: === Iteration 30 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:16,483 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:16,483 INFO L85 PathProgramCache]: Analyzing trace with hash -884744179, now seen corresponding path program 1 times [2025-02-05 16:09:16,483 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:16,483 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [136390376] [2025-02-05 16:09:16,483 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:16,483 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:16,491 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 148 statements into 1 equivalence classes. [2025-02-05 16:09:16,495 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 148 of 148 statements. [2025-02-05 16:09:16,495 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:16,495 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:16,579 INFO L134 CoverageAnalysis]: Checked inductivity of 59 backedges. 43 proven. 0 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2025-02-05 16:09:16,580 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:16,580 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [136390376] [2025-02-05 16:09:16,580 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [136390376] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:16,580 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:16,580 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-05 16:09:16,580 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [843875953] [2025-02-05 16:09:16,581 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:16,581 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-05 16:09:16,581 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:16,581 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-05 16:09:16,582 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-05 16:09:16,582 INFO L87 Difference]: Start difference. First operand 5456 states and 6839 transitions. Second operand has 4 states, 4 states have (on average 35.25) internal successors, (141), 4 states have internal predecessors, (141), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:16,792 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:16,792 INFO L93 Difference]: Finished difference Result 8770 states and 11035 transitions. [2025-02-05 16:09:16,793 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-05 16:09:16,793 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 35.25) internal successors, (141), 4 states have internal predecessors, (141), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 148 [2025-02-05 16:09:16,793 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:16,804 INFO L225 Difference]: With dead ends: 8770 [2025-02-05 16:09:16,804 INFO L226 Difference]: Without dead ends: 3744 [2025-02-05 16:09:16,807 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-02-05 16:09:16,807 INFO L435 NwaCegarLoop]: 202 mSDtfsCounter, 282 mSDsluCounter, 92 mSDsCounter, 0 mSdLazyCounter, 24 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 282 SdHoareTripleChecker+Valid, 294 SdHoareTripleChecker+Invalid, 28 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 24 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:16,808 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [282 Valid, 294 Invalid, 28 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 24 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 16:09:16,809 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 3744 states. [2025-02-05 16:09:16,954 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 3744 to 3742. [2025-02-05 16:09:16,958 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3742 states, 3741 states have (on average 1.2215985030740444) internal successors, (4570), 3741 states have internal predecessors, (4570), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:16,962 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3742 states to 3742 states and 4570 transitions. [2025-02-05 16:09:16,965 INFO L78 Accepts]: Start accepts. Automaton has 3742 states and 4570 transitions. Word has length 148 [2025-02-05 16:09:16,966 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:16,966 INFO L471 AbstractCegarLoop]: Abstraction has 3742 states and 4570 transitions. [2025-02-05 16:09:16,966 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 35.25) internal successors, (141), 4 states have internal predecessors, (141), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:16,966 INFO L276 IsEmpty]: Start isEmpty. Operand 3742 states and 4570 transitions. [2025-02-05 16:09:16,970 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 149 [2025-02-05 16:09:16,971 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:16,971 INFO L218 NwaCegarLoop]: trace histogram [5, 4, 4, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:16,971 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable29 [2025-02-05 16:09:16,971 INFO L396 AbstractCegarLoop]: === Iteration 31 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:16,972 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:16,972 INFO L85 PathProgramCache]: Analyzing trace with hash 1426230907, now seen corresponding path program 1 times [2025-02-05 16:09:16,972 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:16,972 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1103568968] [2025-02-05 16:09:16,972 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:16,972 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:16,982 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 148 statements into 1 equivalence classes. [2025-02-05 16:09:16,989 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 148 of 148 statements. [2025-02-05 16:09:16,993 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:16,993 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:17,066 INFO L134 CoverageAnalysis]: Checked inductivity of 61 backedges. 49 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2025-02-05 16:09:17,066 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:17,066 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1103568968] [2025-02-05 16:09:17,066 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1103568968] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:17,066 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:17,067 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2025-02-05 16:09:17,067 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1580027611] [2025-02-05 16:09:17,067 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:17,068 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 4 states [2025-02-05 16:09:17,068 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:17,068 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-05 16:09:17,069 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-05 16:09:17,069 INFO L87 Difference]: Start difference. First operand 3742 states and 4570 transitions. Second operand has 4 states, 4 states have (on average 35.5) internal successors, (142), 4 states have internal predecessors, (142), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:17,191 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:17,191 INFO L93 Difference]: Finished difference Result 5944 states and 7260 transitions. [2025-02-05 16:09:17,192 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-05 16:09:17,192 INFO L78 Accepts]: Start accepts. Automaton has has 4 states, 4 states have (on average 35.5) internal successors, (142), 4 states have internal predecessors, (142), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 148 [2025-02-05 16:09:17,192 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:17,200 INFO L225 Difference]: With dead ends: 5944 [2025-02-05 16:09:17,200 INFO L226 Difference]: Without dead ends: 2299 [2025-02-05 16:09:17,203 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2025-02-05 16:09:17,204 INFO L435 NwaCegarLoop]: 186 mSDtfsCounter, 290 mSDsluCounter, 92 mSDsCounter, 0 mSdLazyCounter, 22 mSolverCounterSat, 5 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 290 SdHoareTripleChecker+Valid, 278 SdHoareTripleChecker+Invalid, 27 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 5 IncrementalHoareTripleChecker+Valid, 22 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:17,204 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [290 Valid, 278 Invalid, 27 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [5 Valid, 22 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 16:09:17,206 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2299 states. [2025-02-05 16:09:17,297 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2299 to 2297. [2025-02-05 16:09:17,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2297 states, 2296 states have (on average 1.1877177700348431) internal successors, (2727), 2296 states have internal predecessors, (2727), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:17,302 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2297 states to 2297 states and 2727 transitions. [2025-02-05 16:09:17,305 INFO L78 Accepts]: Start accepts. Automaton has 2297 states and 2727 transitions. Word has length 148 [2025-02-05 16:09:17,305 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:17,305 INFO L471 AbstractCegarLoop]: Abstraction has 2297 states and 2727 transitions. [2025-02-05 16:09:17,305 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 4 states, 4 states have (on average 35.5) internal successors, (142), 4 states have internal predecessors, (142), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:17,306 INFO L276 IsEmpty]: Start isEmpty. Operand 2297 states and 2727 transitions. [2025-02-05 16:09:17,307 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 188 [2025-02-05 16:09:17,307 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:17,307 INFO L218 NwaCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:17,308 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable30 [2025-02-05 16:09:17,308 INFO L396 AbstractCegarLoop]: === Iteration 32 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:17,308 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:17,308 INFO L85 PathProgramCache]: Analyzing trace with hash -1259274182, now seen corresponding path program 1 times [2025-02-05 16:09:17,308 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:17,309 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [460452847] [2025-02-05 16:09:17,309 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:17,309 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:17,319 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 187 statements into 1 equivalence classes. [2025-02-05 16:09:17,323 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 187 of 187 statements. [2025-02-05 16:09:17,324 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:17,324 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:17,354 INFO L134 CoverageAnalysis]: Checked inductivity of 106 backedges. 80 proven. 0 refuted. 0 times theorem prover too weak. 26 trivial. 0 not checked. [2025-02-05 16:09:17,354 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:17,354 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [460452847] [2025-02-05 16:09:17,354 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [460452847] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:17,355 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:17,355 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-05 16:09:17,355 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1314019099] [2025-02-05 16:09:17,355 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:17,355 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-02-05 16:09:17,355 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:17,356 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-05 16:09:17,356 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:17,356 INFO L87 Difference]: Start difference. First operand 2297 states and 2727 transitions. Second operand has 3 states, 3 states have (on average 57.666666666666664) internal successors, (173), 3 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:17,463 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:17,463 INFO L93 Difference]: Finished difference Result 4131 states and 4938 transitions. [2025-02-05 16:09:17,464 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-05 16:09:17,464 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 57.666666666666664) internal successors, (173), 3 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 187 [2025-02-05 16:09:17,464 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:17,472 INFO L225 Difference]: With dead ends: 4131 [2025-02-05 16:09:17,473 INFO L226 Difference]: Without dead ends: 2235 [2025-02-05 16:09:17,475 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:17,475 INFO L435 NwaCegarLoop]: 158 mSDtfsCounter, 1 mSDsluCounter, 146 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 1 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 1 SdHoareTripleChecker+Valid, 304 SdHoareTripleChecker+Invalid, 12 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 1 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:17,475 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [1 Valid, 304 Invalid, 12 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [1 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 16:09:17,478 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2235 states. [2025-02-05 16:09:17,567 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2235 to 2167. [2025-02-05 16:09:17,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2167 states, 2166 states have (on average 1.1768236380424746) internal successors, (2549), 2166 states have internal predecessors, (2549), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:17,573 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2167 states to 2167 states and 2549 transitions. [2025-02-05 16:09:17,579 INFO L78 Accepts]: Start accepts. Automaton has 2167 states and 2549 transitions. Word has length 187 [2025-02-05 16:09:17,580 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:17,580 INFO L471 AbstractCegarLoop]: Abstraction has 2167 states and 2549 transitions. [2025-02-05 16:09:17,580 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 57.666666666666664) internal successors, (173), 3 states have internal predecessors, (173), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:17,580 INFO L276 IsEmpty]: Start isEmpty. Operand 2167 states and 2549 transitions. [2025-02-05 16:09:17,582 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 195 [2025-02-05 16:09:17,582 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:17,582 INFO L218 NwaCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:17,582 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable31 [2025-02-05 16:09:17,582 INFO L396 AbstractCegarLoop]: === Iteration 33 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:17,583 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:17,583 INFO L85 PathProgramCache]: Analyzing trace with hash 228354068, now seen corresponding path program 1 times [2025-02-05 16:09:17,583 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:17,583 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1385467523] [2025-02-05 16:09:17,583 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:17,583 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:17,592 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 194 statements into 1 equivalence classes. [2025-02-05 16:09:17,596 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 194 of 194 statements. [2025-02-05 16:09:17,599 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:17,599 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:17,627 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 87 proven. 0 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2025-02-05 16:09:17,627 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:17,627 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1385467523] [2025-02-05 16:09:17,628 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1385467523] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:17,628 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:17,628 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-05 16:09:17,628 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [189681621] [2025-02-05 16:09:17,628 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:17,628 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-02-05 16:09:17,629 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:17,629 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-05 16:09:17,629 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:17,629 INFO L87 Difference]: Start difference. First operand 2167 states and 2549 transitions. Second operand has 3 states, 3 states have (on average 60.333333333333336) internal successors, (181), 3 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:17,763 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:17,763 INFO L93 Difference]: Finished difference Result 4644 states and 5498 transitions. [2025-02-05 16:09:17,764 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-05 16:09:17,764 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 60.333333333333336) internal successors, (181), 3 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 194 [2025-02-05 16:09:17,764 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:17,777 INFO L225 Difference]: With dead ends: 4644 [2025-02-05 16:09:17,778 INFO L226 Difference]: Without dead ends: 2872 [2025-02-05 16:09:17,780 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:17,780 INFO L435 NwaCegarLoop]: 193 mSDtfsCounter, 134 mSDsluCounter, 105 mSDsCounter, 0 mSdLazyCounter, 5 mSolverCounterSat, 4 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 134 SdHoareTripleChecker+Valid, 298 SdHoareTripleChecker+Invalid, 9 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 4 IncrementalHoareTripleChecker+Valid, 5 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:17,781 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [134 Valid, 298 Invalid, 9 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [4 Valid, 5 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 16:09:17,783 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2872 states. [2025-02-05 16:09:17,891 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2872 to 2461. [2025-02-05 16:09:17,893 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2461 states, 2460 states have (on average 1.1630081300813009) internal successors, (2861), 2460 states have internal predecessors, (2861), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:17,897 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2461 states to 2461 states and 2861 transitions. [2025-02-05 16:09:17,904 INFO L78 Accepts]: Start accepts. Automaton has 2461 states and 2861 transitions. Word has length 194 [2025-02-05 16:09:17,905 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:17,905 INFO L471 AbstractCegarLoop]: Abstraction has 2461 states and 2861 transitions. [2025-02-05 16:09:17,905 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 60.333333333333336) internal successors, (181), 3 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:17,905 INFO L276 IsEmpty]: Start isEmpty. Operand 2461 states and 2861 transitions. [2025-02-05 16:09:17,907 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 198 [2025-02-05 16:09:17,907 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:17,907 INFO L218 NwaCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:17,907 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable32 [2025-02-05 16:09:17,907 INFO L396 AbstractCegarLoop]: === Iteration 34 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:17,908 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:17,908 INFO L85 PathProgramCache]: Analyzing trace with hash -1531152694, now seen corresponding path program 1 times [2025-02-05 16:09:17,908 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:17,908 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [32712616] [2025-02-05 16:09:17,908 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:17,908 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:17,917 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 197 statements into 1 equivalence classes. [2025-02-05 16:09:17,922 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 197 of 197 statements. [2025-02-05 16:09:17,922 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:17,922 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-05 16:09:17,951 INFO L134 CoverageAnalysis]: Checked inductivity of 111 backedges. 82 proven. 0 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2025-02-05 16:09:17,951 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-05 16:09:17,951 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [32712616] [2025-02-05 16:09:17,951 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [32712616] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-05 16:09:17,951 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-05 16:09:17,951 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-05 16:09:17,951 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1096189077] [2025-02-05 16:09:17,951 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-05 16:09:17,952 INFO L548 AbstractCegarLoop]: INTERPOLANT automaton has 3 states [2025-02-05 16:09:17,952 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-05 16:09:17,952 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-05 16:09:17,952 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:17,952 INFO L87 Difference]: Start difference. First operand 2461 states and 2861 transitions. Second operand has 3 states, 3 states have (on average 60.333333333333336) internal successors, (181), 3 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:18,084 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-05 16:09:18,085 INFO L93 Difference]: Finished difference Result 4162 states and 4873 transitions. [2025-02-05 16:09:18,085 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-05 16:09:18,085 INFO L78 Accepts]: Start accepts. Automaton has has 3 states, 3 states have (on average 60.333333333333336) internal successors, (181), 3 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Word has length 197 [2025-02-05 16:09:18,086 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2025-02-05 16:09:18,093 INFO L225 Difference]: With dead ends: 4162 [2025-02-05 16:09:18,093 INFO L226 Difference]: Without dead ends: 2094 [2025-02-05 16:09:18,094 INFO L434 NwaCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-05 16:09:18,096 INFO L435 NwaCegarLoop]: 156 mSDtfsCounter, 3 mSDsluCounter, 143 mSDsCounter, 0 mSdLazyCounter, 11 mSolverCounterSat, 2 mSolverCounterUnsat, 0 mSolverCounterUnknown, 0 mSolverCounterNotChecked, 0.0s Time, 0 mProtectedPredicate, 0 mProtectedAction, 3 SdHoareTripleChecker+Valid, 299 SdHoareTripleChecker+Invalid, 13 SdHoareTripleChecker+Unknown, 0 SdHoareTripleChecker+Unchecked, 0.0s SdHoareTripleChecker+Time, 2 IncrementalHoareTripleChecker+Valid, 11 IncrementalHoareTripleChecker+Invalid, 0 IncrementalHoareTripleChecker+Unknown, 0 IncrementalHoareTripleChecker+Unchecked, 0.0s IncrementalHoareTripleChecker+Time [2025-02-05 16:09:18,096 INFO L436 NwaCegarLoop]: SdHoareTripleChecker [3 Valid, 299 Invalid, 13 Unknown, 0 Unchecked, 0.0s Time], IncrementalHoareTripleChecker [2 Valid, 11 Invalid, 0 Unknown, 0 Unchecked, 0.0s Time] [2025-02-05 16:09:18,097 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2094 states. [2025-02-05 16:09:18,235 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2094 to 2013. [2025-02-05 16:09:18,236 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2013 states, 2012 states have (on average 1.14662027833002) internal successors, (2307), 2012 states have internal predecessors, (2307), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:18,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2013 states to 2013 states and 2307 transitions. [2025-02-05 16:09:18,241 INFO L78 Accepts]: Start accepts. Automaton has 2013 states and 2307 transitions. Word has length 197 [2025-02-05 16:09:18,241 INFO L84 Accepts]: Finished accepts. word is rejected. [2025-02-05 16:09:18,241 INFO L471 AbstractCegarLoop]: Abstraction has 2013 states and 2307 transitions. [2025-02-05 16:09:18,241 INFO L472 AbstractCegarLoop]: INTERPOLANT automaton has has 3 states, 3 states have (on average 60.333333333333336) internal successors, (181), 3 states have internal predecessors, (181), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-05 16:09:18,242 INFO L276 IsEmpty]: Start isEmpty. Operand 2013 states and 2307 transitions. [2025-02-05 16:09:18,243 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 198 [2025-02-05 16:09:18,243 INFO L210 NwaCegarLoop]: Found error trace [2025-02-05 16:09:18,243 INFO L218 NwaCegarLoop]: trace histogram [6, 3, 3, 3, 3, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:18,243 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable33 [2025-02-05 16:09:18,244 INFO L396 AbstractCegarLoop]: === Iteration 35 === Targeting ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION === [ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION] === [2025-02-05 16:09:18,244 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-05 16:09:18,244 INFO L85 PathProgramCache]: Analyzing trace with hash -1145785911, now seen corresponding path program 1 times [2025-02-05 16:09:18,244 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-05 16:09:18,244 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [879444516] [2025-02-05 16:09:18,244 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-05 16:09:18,244 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-05 16:09:18,255 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 197 statements into 1 equivalence classes. [2025-02-05 16:09:18,263 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 197 of 197 statements. [2025-02-05 16:09:18,265 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:18,265 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-05 16:09:18,265 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-05 16:09:18,271 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 197 statements into 1 equivalence classes. [2025-02-05 16:09:18,279 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 197 of 197 statements. [2025-02-05 16:09:18,279 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-05 16:09:18,279 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-05 16:09:18,364 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-05 16:09:18,364 INFO L340 BasicCegarLoop]: Counterexample is feasible [2025-02-05 16:09:18,365 INFO L782 garLoopResultBuilder]: Registering result UNSAFE for location ULTIMATE.startErr0ASSERT_VIOLATIONERROR_FUNCTION (0 of 1 remaining) [2025-02-05 16:09:18,367 WARN L453 AbstractCegarLoop]: Destroyed unattended storables created during the last iteration: SelfDestructingSolverStorable34 [2025-02-05 16:09:18,370 INFO L422 BasicCegarLoop]: Path program histogram: [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-05 16:09:18,569 INFO L170 ceAbstractionStarter]: Computing trace abstraction results [2025-02-05 16:09:18,571 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 05.02 04:09:18 BoogieIcfgContainer [2025-02-05 16:09:18,571 INFO L131 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2025-02-05 16:09:18,573 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-02-05 16:09:18,573 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-02-05 16:09:18,574 INFO L274 PluginConnector]: Witness Printer initialized [2025-02-05 16:09:18,574 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 05.02 04:09:02" (3/4) ... [2025-02-05 16:09:18,575 INFO L140 WitnessPrinter]: Generating witness for reachability counterexample [2025-02-05 16:09:18,749 INFO L127 tionWitnessGenerator]: Generated YAML witness of length 186. [2025-02-05 16:09:18,877 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/witness.graphml [2025-02-05 16:09:18,878 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/witness.yml [2025-02-05 16:09:18,878 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-02-05 16:09:18,878 INFO L158 Benchmark]: Toolchain (without parser) took 17488.19ms. Allocated memory was 167.8MB in the beginning and 2.1GB in the end (delta: 1.9GB). Free memory was 129.7MB in the beginning and 1.8GB in the end (delta: -1.7GB). Peak memory consumption was 219.5MB. Max. memory is 16.1GB. [2025-02-05 16:09:18,880 INFO L158 Benchmark]: CDTParser took 0.22ms. Allocated memory is still 201.3MB. Free memory is still 127.2MB. There was no memory consumed. Max. memory is 16.1GB. [2025-02-05 16:09:18,880 INFO L158 Benchmark]: CACSL2BoogieTranslator took 323.16ms. Allocated memory is still 167.8MB. Free memory was 129.3MB in the beginning and 114.7MB in the end (delta: 14.7MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-02-05 16:09:18,880 INFO L158 Benchmark]: Boogie Procedure Inliner took 37.40ms. Allocated memory is still 167.8MB. Free memory was 114.7MB in the beginning and 112.6MB in the end (delta: 2.0MB). There was no memory consumed. Max. memory is 16.1GB. [2025-02-05 16:09:18,880 INFO L158 Benchmark]: Boogie Preprocessor took 32.51ms. Allocated memory is still 167.8MB. Free memory was 112.6MB in the beginning and 110.9MB in the end (delta: 1.7MB). There was no memory consumed. Max. memory is 16.1GB. [2025-02-05 16:09:18,880 INFO L158 Benchmark]: IcfgBuilder took 618.10ms. Allocated memory is still 167.8MB. Free memory was 110.9MB in the beginning and 85.8MB in the end (delta: 25.1MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. [2025-02-05 16:09:18,880 INFO L158 Benchmark]: TraceAbstraction took 16163.38ms. Allocated memory was 167.8MB in the beginning and 2.1GB in the end (delta: 1.9GB). Free memory was 85.0MB in the beginning and 1.8GB in the end (delta: -1.8GB). Peak memory consumption was 135.6MB. Max. memory is 16.1GB. [2025-02-05 16:09:18,881 INFO L158 Benchmark]: Witness Printer took 304.45ms. Allocated memory is still 2.1GB. Free memory was 1.8GB in the beginning and 1.8GB in the end (delta: 37.7MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. [2025-02-05 16:09:18,881 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.22ms. Allocated memory is still 201.3MB. Free memory is still 127.2MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 323.16ms. Allocated memory is still 167.8MB. Free memory was 129.3MB in the beginning and 114.7MB in the end (delta: 14.7MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 37.40ms. Allocated memory is still 167.8MB. Free memory was 114.7MB in the beginning and 112.6MB in the end (delta: 2.0MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 32.51ms. Allocated memory is still 167.8MB. Free memory was 112.6MB in the beginning and 110.9MB in the end (delta: 1.7MB). There was no memory consumed. Max. memory is 16.1GB. * IcfgBuilder took 618.10ms. Allocated memory is still 167.8MB. Free memory was 110.9MB in the beginning and 85.8MB in the end (delta: 25.1MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. * TraceAbstraction took 16163.38ms. Allocated memory was 167.8MB in the beginning and 2.1GB in the end (delta: 1.9GB). Free memory was 85.0MB in the beginning and 1.8GB in the end (delta: -1.8GB). Peak memory consumption was 135.6MB. Max. memory is 16.1GB. * Witness Printer took 304.45ms. Allocated memory is still 2.1GB. Free memory was 1.8GB in the beginning and 1.8GB in the end (delta: 37.7MB). Peak memory consumption was 41.9MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: ErrorAutomatonStatistics NumberErrorTraces: 0, NumberStatementsAllTraces: 0, NumberRelevantStatements: 0, 0.0s ErrorAutomatonConstructionTimeTotal, 0.0s FaulLocalizationTime, NumberStatementsFirstTrace: -1, TraceLengthAvg: 0, 0.0s ErrorAutomatonConstructionTimeAvg, 0.0s ErrorAutomatonDifferenceTimeAvg, 0.0s ErrorAutomatonDifferenceTimeTotal, NumberOfNoEnhancement: 0, NumberOfFiniteEnhancement: 0, NumberOfInfiniteEnhancement: 0 - CounterExampleResult [Line: 23]: a call to reach_error is reachable a call to reach_error is reachable We found a FailurePath: [L28] int c ; [L29] int c_t ; [L30] int c_req_up ; [L31] int p_in ; [L32] int p_out ; [L33] int wl_st ; [L34] int c1_st ; [L35] int c2_st ; [L36] int wb_st ; [L37] int r_st ; [L38] int wl_i ; [L39] int c1_i ; [L40] int c2_i ; [L41] int wb_i ; [L42] int r_i ; [L43] int wl_pc ; [L44] int c1_pc ; [L45] int c2_pc ; [L46] int wb_pc ; [L47] int e_e ; [L48] int e_f ; [L49] int e_g ; [L50] int e_c ; [L51] int e_p_in ; [L52] int e_wl ; [L58] int d ; [L59] int data ; [L60] int processed ; [L61] static int t_b ; VAL [c1_i=0, c1_pc=0, c1_st=0, c2_i=0, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=0, e_e=0, e_f=0, e_g=0, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=0, wb_pc=0, wb_st=0, wl_i=0, wl_pc=0, wl_st=0] [L689] int __retres1 ; [L693] e_wl = 2 [L694] e_c = e_wl [L695] e_g = e_c [L696] e_f = e_g [L697] e_e = e_f [L698] wl_pc = 0 [L699] c1_pc = 0 [L700] c2_pc = 0 [L701] wb_pc = 0 [L702] wb_i = 1 [L703] c2_i = wb_i [L704] c1_i = c2_i [L705] wl_i = c1_i [L706] r_i = 0 [L707] c_req_up = 0 [L708] d = 0 [L709] c = 0 [L710] CALL start_simulation() [L400] int kernel_st ; [L403] kernel_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L404] COND FALSE !((int )c_req_up == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L415] COND TRUE (int )wl_i == 1 [L416] wl_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L420] COND TRUE (int )c1_i == 1 [L421] c1_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L425] COND TRUE (int )c2_i == 1 [L426] c2_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L430] COND TRUE (int )wb_i == 1 [L431] wb_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L435] COND FALSE !((int )r_i == 1) [L438] r_st = 2 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L440] COND FALSE !((int )e_f == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L445] COND FALSE !((int )e_g == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L450] COND FALSE !((int )e_e == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L455] COND FALSE !((int )e_c == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L460] COND FALSE !((int )e_wl == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L465] COND FALSE !((int )wl_pc == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L473] COND FALSE !((int )wl_pc == 2) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L483] COND FALSE !((int )c1_pc == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L492] COND FALSE !((int )c2_pc == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L501] COND FALSE !((int )wb_pc == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L510] COND FALSE !((int )e_c == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L515] COND FALSE !((int )e_e == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L520] COND FALSE !((int )e_f == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L525] COND FALSE !((int )e_g == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L530] COND FALSE !((int )e_c == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L535] COND FALSE !((int )e_wl == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L541] COND TRUE 1 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L544] kernel_st = 1 [L545] CALL eval() [L286] int tmp ; [L287] int tmp___0 ; [L288] int tmp___1 ; [L289] int tmp___2 ; [L290] int tmp___3 ; VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L294] COND TRUE 1 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L296] COND TRUE (int )wl_st == 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L317] COND TRUE (int )wl_st == 0 [L319] tmp = __VERIFIER_nondet_int() [L321] COND TRUE \read(tmp) [L323] wl_st = 1 [L324] CALL write_loop() [L63] int t ; VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=1] [L66] COND TRUE (int )wl_pc == 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=1] [L80] wl_st = 2 [L81] wl_pc = 1 [L82] e_wl = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L324] RET write_loop() [L332] COND TRUE (int )c1_st == 0 [L334] tmp___0 = __VERIFIER_nondet_int() [L336] COND TRUE \read(tmp___0) [L338] c1_st = 1 [L339] CALL compute1() [L137] COND TRUE (int )c1_pc == 0 VAL [c1_i=1, c1_pc=0, c1_st=1, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L148] COND TRUE 1 VAL [c1_i=1, c1_pc=0, c1_st=1, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L150] c1_st = 2 [L151] c1_pc = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L339] RET compute1() [L347] COND TRUE (int )c2_st == 0 [L349] tmp___1 = __VERIFIER_nondet_int() [L351] COND TRUE \read(tmp___1) [L353] c2_st = 1 [L354] CALL compute2() [L182] COND TRUE (int )c2_pc == 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=0, c2_st=1, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L193] COND TRUE 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=0, c2_st=1, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L195] c2_st = 2 [L196] c2_pc = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=1, wl_st=2] [L354] RET compute2() [L362] COND TRUE (int )wb_st == 0 [L364] tmp___2 = __VERIFIER_nondet_int() [L366] COND TRUE \read(tmp___2) [L368] wb_st = 1 [L369] CALL write_back() [L227] COND TRUE (int )wb_pc == 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=1, wl_i=1, wl_pc=1, wl_st=2] [L238] COND TRUE 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=1, wl_i=1, wl_pc=1, wl_st=2] [L240] wb_st = 2 [L241] wb_pc = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L369] RET write_back() [L377] COND FALSE !((int )r_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L294] COND TRUE 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L296] COND FALSE !((int )wl_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L299] COND FALSE !((int )c1_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L302] COND FALSE !((int )c2_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L305] COND FALSE !((int )wb_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L308] COND FALSE !((int )r_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L545] RET eval() [L547] kernel_st = 2 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L548] COND FALSE !((int )c_req_up == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L559] kernel_st = 3 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L560] COND FALSE !((int )e_f == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L565] COND FALSE !((int )e_g == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L570] COND FALSE !((int )e_e == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L575] COND FALSE !((int )e_c == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=0, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L580] COND TRUE (int )e_wl == 0 [L581] e_wl = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L585] COND TRUE (int )wl_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=2] [L586] COND TRUE (int )e_wl == 1 [L587] wl_st = 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L603] COND TRUE (int )c1_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L604] COND FALSE !((int )e_f == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L612] COND TRUE (int )c2_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L613] COND FALSE !((int )e_f == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L621] COND TRUE (int )wb_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L622] COND FALSE !((int )e_g == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L630] COND FALSE !((int )e_c == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L635] COND FALSE !((int )e_e == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L640] COND FALSE !((int )e_f == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L645] COND FALSE !((int )e_g == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L650] COND FALSE !((int )e_c == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=1, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L655] COND TRUE (int )e_wl == 1 [L656] e_wl = 2 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L660] COND TRUE (int )wl_st == 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L541] COND TRUE 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L544] kernel_st = 1 [L545] CALL eval() [L286] int tmp ; [L287] int tmp___0 ; [L288] int tmp___1 ; [L289] int tmp___2 ; [L290] int tmp___3 ; VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L294] COND TRUE 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L296] COND TRUE (int )wl_st == 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=0] [L317] COND TRUE (int )wl_st == 0 [L319] tmp = __VERIFIER_nondet_int() [L321] COND TRUE \read(tmp) [L323] wl_st = 1 [L324] CALL write_loop() [L63] int t ; VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L66] COND FALSE !((int )wl_pc == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L69] COND FALSE !((int )wl_pc == 2) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L72] COND TRUE (int )wl_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L87] COND TRUE 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L89] t = d [L90] data = d [L91] processed = 0 [L92] e_f = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L93] COND TRUE (int )c1_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L94] COND TRUE (int )e_f == 1 [L95] c1_st = 0 VAL [c1_i=1, c1_pc=1, c1_st=0, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L102] COND TRUE (int )c2_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=0, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L103] COND TRUE (int )e_f == 1 [L104] c2_st = 0 VAL [c1_i=1, c1_pc=1, c1_st=0, c2_i=1, c2_pc=1, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=1, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=1, wl_st=1] [L111] e_f = 2 [L112] wl_st = 2 [L113] wl_pc = 2 [L114] t_b = t VAL [c1_i=1, c1_pc=1, c1_st=0, c2_i=1, c2_pc=1, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L324] RET write_loop() [L332] COND TRUE (int )c1_st == 0 [L334] tmp___0 = __VERIFIER_nondet_int() [L336] COND TRUE \read(tmp___0) [L338] c1_st = 1 [L339] CALL compute1() [L137] COND FALSE !((int )c1_pc == 0) VAL [c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L140] COND TRUE (int )c1_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L155] COND TRUE ! processed [L156] data += 1 [L157] e_g = 1 VAL [c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L158] COND TRUE (int )wb_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L159] COND TRUE (int )e_g == 1 [L160] wb_st = 0 VAL [c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L167] e_g = 2 VAL [c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L148] COND TRUE 1 VAL [c1_i=1, c1_pc=1, c1_st=1, c2_i=1, c2_pc=1, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L150] c1_st = 2 [L151] c1_pc = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L339] RET compute1() [L347] COND TRUE (int )c2_st == 0 [L349] tmp___1 = __VERIFIER_nondet_int() [L351] COND TRUE \read(tmp___1) [L353] c2_st = 1 [L354] CALL compute2() [L182] COND FALSE !((int )c2_pc == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L185] COND TRUE (int )c2_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c=0, c_req_up=0, c_t=0, d=0, data=1, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L200] COND TRUE ! processed [L201] data += 1 [L202] e_g = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c=0, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L203] COND TRUE (int )wb_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c=0, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L204] COND TRUE (int )e_g == 1 [L205] wb_st = 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c=0, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=1, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L212] e_g = 2 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c=0, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L193] COND TRUE 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=1, c=0, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L195] c2_st = 2 [L196] c2_pc = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=0, wl_i=1, wl_pc=2, wl_st=2] [L354] RET compute2() [L362] COND TRUE (int )wb_st == 0 [L364] tmp___2 = __VERIFIER_nondet_int() [L366] COND TRUE \read(tmp___2) [L368] wb_st = 1 [L369] CALL write_back() [L227] COND FALSE !((int )wb_pc == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L230] COND TRUE (int )wb_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=0, c_t=0, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L245] c_t = data [L246] c_req_up = 1 [L247] processed = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L238] COND TRUE 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=1, wl_i=1, wl_pc=2, wl_st=2] [L240] wb_st = 2 [L241] wb_pc = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L369] RET write_back() [L377] COND FALSE !((int )r_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L294] COND TRUE 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L296] COND FALSE !((int )wl_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L299] COND FALSE !((int )c1_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L302] COND FALSE !((int )c2_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L305] COND FALSE !((int )wb_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L308] COND FALSE !((int )r_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L545] RET eval() [L547] kernel_st = 2 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L548] COND TRUE (int )c_req_up == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=0, c_req_up=1, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L549] COND TRUE c != c_t [L550] c = c_t [L551] e_c = 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=1, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L555] c_req_up = 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L559] kernel_st = 3 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L560] COND FALSE !((int )e_f == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L565] COND FALSE !((int )e_g == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L570] COND FALSE !((int )e_e == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=0, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L575] COND TRUE (int )e_c == 0 [L576] e_c = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L580] COND FALSE !((int )e_wl == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L585] COND FALSE !((int )wl_pc == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L593] COND TRUE (int )wl_pc == 2 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L594] COND FALSE !((int )e_e == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L603] COND TRUE (int )c1_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L604] COND FALSE !((int )e_f == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L612] COND TRUE (int )c2_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L613] COND FALSE !((int )e_f == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L621] COND TRUE (int )wb_pc == 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L622] COND FALSE !((int )e_g == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L630] COND TRUE (int )e_c == 1 [L631] r_st = 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L635] COND FALSE !((int )e_e == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L640] COND FALSE !((int )e_f == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L645] COND FALSE !((int )e_g == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=1, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L650] COND TRUE (int )e_c == 1 [L651] e_c = 2 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L655] COND FALSE !((int )e_wl == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L660] COND FALSE !((int )wl_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L663] COND FALSE !((int )c1_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L666] COND FALSE !((int )c2_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L669] COND FALSE !((int )wb_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L672] COND TRUE (int )r_st == 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L541] COND TRUE 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L544] kernel_st = 1 [L545] CALL eval() [L286] int tmp ; [L287] int tmp___0 ; [L288] int tmp___1 ; [L289] int tmp___2 ; [L290] int tmp___3 ; VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L294] COND TRUE 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L296] COND FALSE !((int )wl_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L299] COND FALSE !((int )c1_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L302] COND FALSE !((int )c2_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L305] COND FALSE !((int )wb_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L308] COND TRUE (int )r_st == 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L317] COND FALSE !((int )wl_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L332] COND FALSE !((int )c1_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L347] COND FALSE !((int )c2_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L362] COND FALSE !((int )wb_st == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=0, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L377] COND TRUE (int )r_st == 0 [L379] tmp___3 = __VERIFIER_nondet_int() [L381] COND TRUE \read(tmp___3) [L383] r_st = 1 [L384] CALL read() [L259] d = c [L260] e_e = 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=1, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=1, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L261] COND FALSE !((int )wl_pc == 1) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=1, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=1, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L269] COND TRUE (int )wl_pc == 2 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=1, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=1, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=2] [L270] COND TRUE (int )e_e == 1 [L271] wl_st = 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=1, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=1, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=0] [L279] e_e = 2 [L280] r_st = 2 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=0] [L384] RET read() [L294] COND TRUE 1 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=0] [L296] COND TRUE (int )wl_st == 0 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=0] [L317] COND TRUE (int )wl_st == 0 [L319] tmp = __VERIFIER_nondet_int() [L321] COND TRUE \read(tmp) [L323] wl_st = 1 [L324] CALL write_loop() [L63] int t ; VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L66] COND FALSE !((int )wl_pc == 0) VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L69] COND TRUE (int )wl_pc == 2 VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L118] t = t_b VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t=0, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] [L119] COND FALSE !(d == t + 1) [L123] CALL error() [L23] reach_error() VAL [c1_i=1, c1_pc=1, c1_st=2, c2_i=1, c2_pc=1, c2_st=2, c=2, c_req_up=0, c_t=2, d=2, data=2, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=1, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=1, wb_st=2, wl_i=1, wl_pc=2, wl_st=1] - StatisticsResult: Ultimate Automizer benchmark data CFG has 1 procedures, 135 locations, 1 error locations. Started 1 CEGAR loops. OverallTime: 15.9s, OverallIterations: 35, TraceHistogramMax: 6, PathProgramHistogramMax: 1, EmptinessCheckTime: 0.1s, AutomataDifference: 7.3s, DeadEndRemovalTime: 0.0s, HoareAnnotationTime: 0.0s, InitialAbstractionConstructionTime: 0.0s, HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 8422 SdHoareTripleChecker+Valid, 1.1s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 8422 mSDsluCounter, 11874 SdHoareTripleChecker+Invalid, 0.9s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 4791 mSDsCounter, 218 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 747 IncrementalHoareTripleChecker+Invalid, 965 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 218 mSolverCounterUnsat, 7083 mSDtfsCounter, 747 mSolverCounterSat, 0.1s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown, PredicateUnifierStatistics: 0 DeclaredPredicates, 149 GetRequests, 83 SyntacticMatches, 0 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=8087occurred in iteration=19, InterpolantAutomatonStates: 129, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s DumpTime, AutomataMinimizationStatistics: 5.9s AutomataMinimizationTime, 34 MinimizatonAttempts, 11737 StatesRemovedByMinimization, 27 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TRACE_CHECK: 0.1s SsaConstructionTime, 0.2s SatisfiabilityAnalysisTime, 1.7s InterpolantComputationTime, 2951 NumberOfCodeBlocks, 2951 NumberOfCodeBlocksAsserted, 35 NumberOfCheckSat, 2720 ConstructedInterpolants, 0 QuantifiedInterpolants, 4589 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 34 InterpolantComputations, 34 PerfectInterpolantSequences, 751/751 InterpolantCoveringCapability, INVARIANT_SYNTHESIS: No data available, INTERPOLANT_CONSOLIDATION: No data available, ABSTRACT_INTERPRETATION: No data available, PDR: No data available, ACCELERATED_INTERPOLATION: No data available, SIFA: No data available, ReuseStatistics: No data available, ConComCheckerStatistics: No data available RESULT: Ultimate proved your program to be incorrect! [2025-02-05 16:09:18,908 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:4000 (1)] Forceful destruction successful, exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE