./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/termination-15/array16_alloca_fixed.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 48c9605d Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/termination-15/array16_alloca_fixed.i -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 2a580f3a42bca030605af1bbd4c6a77550e46d88a6197c1e34cf45bb050eadef --- Real Ultimate output --- This is Ultimate 0.3.0-?-48c9605-m [2025-02-08 14:26:40,067 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-02-08 14:26:40,149 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf [2025-02-08 14:26:40,158 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-02-08 14:26:40,158 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-02-08 14:26:40,158 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-02-08 14:26:40,184 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-02-08 14:26:40,185 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-02-08 14:26:40,185 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-02-08 14:26:40,185 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-02-08 14:26:40,186 INFO L153 SettingsManager]: * Use memory slicer=true [2025-02-08 14:26:40,188 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-02-08 14:26:40,188 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-02-08 14:26:40,188 INFO L153 SettingsManager]: * Use SBE=true [2025-02-08 14:26:40,189 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-02-08 14:26:40,189 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-02-08 14:26:40,189 INFO L153 SettingsManager]: * Use old map elimination=false [2025-02-08 14:26:40,189 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-02-08 14:26:40,189 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-02-08 14:26:40,189 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-02-08 14:26:40,189 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-02-08 14:26:40,189 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-02-08 14:26:40,189 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-02-08 14:26:40,189 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-02-08 14:26:40,189 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-02-08 14:26:40,189 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-02-08 14:26:40,189 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-02-08 14:26:40,189 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-02-08 14:26:40,189 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-02-08 14:26:40,189 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-02-08 14:26:40,190 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-02-08 14:26:40,190 INFO L153 SettingsManager]: * Use constant arrays=true [2025-02-08 14:26:40,190 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-02-08 14:26:40,190 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-02-08 14:26:40,190 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-02-08 14:26:40,190 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-02-08 14:26:40,190 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-02-08 14:26:40,190 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 2a580f3a42bca030605af1bbd4c6a77550e46d88a6197c1e34cf45bb050eadef [2025-02-08 14:26:40,493 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-02-08 14:26:40,503 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-02-08 14:26:40,507 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-02-08 14:26:40,508 INFO L270 PluginConnector]: Initializing CDTParser... [2025-02-08 14:26:40,508 INFO L274 PluginConnector]: CDTParser initialized [2025-02-08 14:26:40,510 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/termination-15/array16_alloca_fixed.i [2025-02-08 14:26:41,908 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/2db3fc672/47f9fd620c664948a8834c238d7bc7b2/FLAG8c1b06fa7 [2025-02-08 14:26:42,217 INFO L384 CDTParser]: Found 1 translation units. [2025-02-08 14:26:42,218 INFO L180 CDTParser]: Scanning /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/termination-15/array16_alloca_fixed.i [2025-02-08 14:26:42,226 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/2db3fc672/47f9fd620c664948a8834c238d7bc7b2/FLAG8c1b06fa7 [2025-02-08 14:26:42,472 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/2db3fc672/47f9fd620c664948a8834c238d7bc7b2 [2025-02-08 14:26:42,475 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-02-08 14:26:42,476 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-02-08 14:26:42,478 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-02-08 14:26:42,478 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-02-08 14:26:42,483 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-02-08 14:26:42,484 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.02 02:26:42" (1/1) ... [2025-02-08 14:26:42,486 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@692ce710 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:26:42, skipping insertion in model container [2025-02-08 14:26:42,486 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.02 02:26:42" (1/1) ... [2025-02-08 14:26:42,506 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-02-08 14:26:42,708 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-08 14:26:42,717 INFO L200 MainTranslator]: Completed pre-run [2025-02-08 14:26:42,772 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-08 14:26:42,802 INFO L204 MainTranslator]: Completed translation [2025-02-08 14:26:42,803 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:26:42 WrapperNode [2025-02-08 14:26:42,803 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-02-08 14:26:42,804 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-02-08 14:26:42,804 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-02-08 14:26:42,804 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-02-08 14:26:42,808 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:26:42" (1/1) ... [2025-02-08 14:26:42,817 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:26:42" (1/1) ... [2025-02-08 14:26:42,836 INFO L138 Inliner]: procedures = 151, calls = 10, calls flagged for inlining = 2, calls inlined = 2, statements flattened = 49 [2025-02-08 14:26:42,838 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-02-08 14:26:42,839 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-02-08 14:26:42,839 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-02-08 14:26:42,839 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-02-08 14:26:42,844 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:26:42" (1/1) ... [2025-02-08 14:26:42,844 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:26:42" (1/1) ... [2025-02-08 14:26:42,846 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:26:42" (1/1) ... [2025-02-08 14:26:42,854 INFO L175 MemorySlicer]: Split 4 memory accesses to 1 slices as follows [4]. 100 percent of accesses are in the largest equivalence class. The 0 initializations are split as follows [0]. The 2 writes are split as follows [2]. [2025-02-08 14:26:42,854 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:26:42" (1/1) ... [2025-02-08 14:26:42,854 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:26:42" (1/1) ... [2025-02-08 14:26:42,860 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:26:42" (1/1) ... [2025-02-08 14:26:42,861 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:26:42" (1/1) ... [2025-02-08 14:26:42,865 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:26:42" (1/1) ... [2025-02-08 14:26:42,865 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:26:42" (1/1) ... [2025-02-08 14:26:42,867 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-02-08 14:26:42,868 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-02-08 14:26:42,868 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-02-08 14:26:42,868 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-02-08 14:26:42,869 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:26:42" (1/1) ... [2025-02-08 14:26:42,873 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-08 14:26:42,883 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 14:26:42,898 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-08 14:26:42,901 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-02-08 14:26:42,924 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2025-02-08 14:26:42,924 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2025-02-08 14:26:42,924 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2025-02-08 14:26:42,924 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2025-02-08 14:26:42,924 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-02-08 14:26:42,924 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-02-08 14:26:42,979 INFO L257 CfgBuilder]: Building ICFG [2025-02-08 14:26:42,980 INFO L287 CfgBuilder]: Building CFG for each procedure with an implementation [2025-02-08 14:26:43,096 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L368: call ULTIMATE.dealloc(main_#t~malloc206#1.base, main_#t~malloc206#1.offset);havoc main_#t~malloc206#1.base, main_#t~malloc206#1.offset; [2025-02-08 14:26:43,100 INFO L? ?]: Removed 8 outVars from TransFormulas that were not future-live. [2025-02-08 14:26:43,100 INFO L308 CfgBuilder]: Performing block encoding [2025-02-08 14:26:43,107 INFO L332 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-02-08 14:26:43,108 INFO L337 CfgBuilder]: Removed 0 assume(true) statements. [2025-02-08 14:26:43,109 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 08.02 02:26:43 BoogieIcfgContainer [2025-02-08 14:26:43,109 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-02-08 14:26:43,110 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-02-08 14:26:43,110 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-02-08 14:26:43,114 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-02-08 14:26:43,115 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-08 14:26:43,115 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 08.02 02:26:42" (1/3) ... [2025-02-08 14:26:43,116 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@6e8519e1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 08.02 02:26:43, skipping insertion in model container [2025-02-08 14:26:43,116 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-08 14:26:43,117 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:26:42" (2/3) ... [2025-02-08 14:26:43,117 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@6e8519e1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 08.02 02:26:43, skipping insertion in model container [2025-02-08 14:26:43,117 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-08 14:26:43,117 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 08.02 02:26:43" (3/3) ... [2025-02-08 14:26:43,119 INFO L363 chiAutomizerObserver]: Analyzing ICFG array16_alloca_fixed.i [2025-02-08 14:26:43,177 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-02-08 14:26:43,177 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-02-08 14:26:43,177 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-02-08 14:26:43,178 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-02-08 14:26:43,178 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-02-08 14:26:43,178 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-02-08 14:26:43,178 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-02-08 14:26:43,178 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-02-08 14:26:43,182 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 12 states, 11 states have (on average 1.5454545454545454) internal successors, (17), 11 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:26:43,195 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2025-02-08 14:26:43,196 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:26:43,196 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:26:43,199 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2025-02-08 14:26:43,200 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2025-02-08 14:26:43,200 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-02-08 14:26:43,200 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 12 states, 11 states have (on average 1.5454545454545454) internal successors, (17), 11 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:26:43,201 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 5 [2025-02-08 14:26:43,201 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:26:43,201 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:26:43,201 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1] [2025-02-08 14:26:43,201 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1] [2025-02-08 14:26:43,205 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" [2025-02-08 14:26:43,206 INFO L754 eck$LassoCheckResult]: Loop: "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume 0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2);havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" [2025-02-08 14:26:43,210 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:26:43,211 INFO L85 PathProgramCache]: Analyzing trace with hash 1538143, now seen corresponding path program 1 times [2025-02-08 14:26:43,217 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:26:43,218 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [479580663] [2025-02-08 14:26:43,218 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:26:43,218 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:26:43,275 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 4 statements into 1 equivalence classes. [2025-02-08 14:26:43,301 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 4 of 4 statements. [2025-02-08 14:26:43,302 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:43,302 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:43,302 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:26:43,309 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 4 statements into 1 equivalence classes. [2025-02-08 14:26:43,316 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 4 of 4 statements. [2025-02-08 14:26:43,316 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:43,316 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:43,333 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:26:43,335 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:26:43,336 INFO L85 PathProgramCache]: Analyzing trace with hash 40649, now seen corresponding path program 1 times [2025-02-08 14:26:43,336 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:26:43,336 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [541931515] [2025-02-08 14:26:43,336 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:26:43,336 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:26:43,345 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-02-08 14:26:43,360 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-02-08 14:26:43,360 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:43,360 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:43,360 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:26:43,362 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-02-08 14:26:43,374 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-02-08 14:26:43,374 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:43,374 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:43,376 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:26:43,380 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:26:43,380 INFO L85 PathProgramCache]: Analyzing trace with hash -1421811285, now seen corresponding path program 1 times [2025-02-08 14:26:43,380 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:26:43,380 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [64621434] [2025-02-08 14:26:43,380 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:26:43,380 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:26:43,393 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 7 statements into 1 equivalence classes. [2025-02-08 14:26:43,424 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 7 of 7 statements. [2025-02-08 14:26:43,425 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:43,425 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:43,425 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:26:43,433 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 7 statements into 1 equivalence classes. [2025-02-08 14:26:43,452 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 7 of 7 statements. [2025-02-08 14:26:43,452 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:43,452 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:43,455 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:26:43,755 INFO L204 LassoAnalysis]: Preferences: [2025-02-08 14:26:43,756 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-02-08 14:26:43,756 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-02-08 14:26:43,756 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-02-08 14:26:43,756 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2025-02-08 14:26:43,756 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-08 14:26:43,757 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-02-08 14:26:43,757 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-02-08 14:26:43,757 INFO L132 ssoRankerPreferences]: Filename of dumped script: array16_alloca_fixed.i_Iteration1_Lasso [2025-02-08 14:26:43,757 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-02-08 14:26:43,757 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-02-08 14:26:43,773 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-08 14:26:43,781 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-08 14:26:43,938 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-08 14:26:43,940 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-08 14:26:43,943 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-08 14:26:43,946 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-08 14:26:43,948 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-08 14:26:43,950 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-08 14:26:43,953 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-08 14:26:43,955 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-08 14:26:43,957 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-08 14:26:44,189 INFO L259 LassoAnalysis]: Preprocessing complete. [2025-02-08 14:26:44,192 INFO L451 LassoAnalysis]: Using template 'affine'. [2025-02-08 14:26:44,193 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-08 14:26:44,193 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 14:26:44,195 INFO L229 MonitoredProcess]: Starting monitored process 2 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-08 14:26:44,197 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Waiting until timeout for monitored process [2025-02-08 14:26:44,198 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-08 14:26:44,212 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-08 14:26:44,212 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-02-08 14:26:44,212 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-08 14:26:44,212 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-08 14:26:44,212 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-08 14:26:44,216 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-02-08 14:26:44,216 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-02-08 14:26:44,219 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-08 14:26:44,227 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (2)] Ended with exit code 0 [2025-02-08 14:26:44,228 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-08 14:26:44,228 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 14:26:44,230 INFO L229 MonitoredProcess]: Starting monitored process 3 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-08 14:26:44,233 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Waiting until timeout for monitored process [2025-02-08 14:26:44,233 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-08 14:26:44,244 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-08 14:26:44,244 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-08 14:26:44,244 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-08 14:26:44,244 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-08 14:26:44,247 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-02-08 14:26:44,247 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-02-08 14:26:44,252 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-08 14:26:44,258 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (3)] Ended with exit code 0 [2025-02-08 14:26:44,258 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-08 14:26:44,258 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 14:26:44,260 INFO L229 MonitoredProcess]: Starting monitored process 4 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-08 14:26:44,261 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Waiting until timeout for monitored process [2025-02-08 14:26:44,261 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-08 14:26:44,272 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-08 14:26:44,272 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-08 14:26:44,272 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-08 14:26:44,272 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-08 14:26:44,284 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-02-08 14:26:44,284 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-02-08 14:26:44,297 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2025-02-08 14:26:44,331 INFO L443 ModelExtractionUtils]: Simplification made 12 calls to the SMT solver. [2025-02-08 14:26:44,334 INFO L444 ModelExtractionUtils]: 3 out of 19 variables were initially zero. Simplification set additionally 12 variables to zero. [2025-02-08 14:26:44,337 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-08 14:26:44,338 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 14:26:44,342 INFO L229 MonitoredProcess]: Starting monitored process 5 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-08 14:26:44,343 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Waiting until timeout for monitored process [2025-02-08 14:26:44,344 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2025-02-08 14:26:44,360 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2025-02-08 14:26:44,360 INFO L474 LassoAnalysis]: Proved termination. [2025-02-08 14:26:44,360 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~arr~0#1.offset, v_rep(select #length ULTIMATE.start_main_~arr~0#1.base)_1, ULTIMATE.start_main_~i~0#1) = -1*ULTIMATE.start_main_~arr~0#1.offset + 1*v_rep(select #length ULTIMATE.start_main_~arr~0#1.base)_1 - 4*ULTIMATE.start_main_~i~0#1 Supporting invariants [] [2025-02-08 14:26:44,367 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (4)] Ended with exit code 0 [2025-02-08 14:26:44,377 INFO L156 tatePredicateManager]: 3 out of 3 supporting invariants were superfluous and have been removed [2025-02-08 14:26:44,386 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: #length [2025-02-08 14:26:44,387 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#length,GLOBAL] [2025-02-08 14:26:44,387 WARN L970 BoogieBacktranslator]: Unfinished Backtranslation: Unknown variable: ~arr~0!offset [2025-02-08 14:26:44,403 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:26:44,413 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 4 statements into 1 equivalence classes. [2025-02-08 14:26:44,417 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 4 of 4 statements. [2025-02-08 14:26:44,417 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:44,417 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:26:44,418 INFO L256 TraceCheckSpWp]: Trace formula consists of 25 conjuncts, 2 conjuncts are in the unsatisfiable core [2025-02-08 14:26:44,419 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-08 14:26:44,437 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 3 statements into 1 equivalence classes. [2025-02-08 14:26:44,443 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 3 of 3 statements. [2025-02-08 14:26:44,444 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:44,444 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:26:44,444 INFO L256 TraceCheckSpWp]: Trace formula consists of 24 conjuncts, 4 conjuncts are in the unsatisfiable core [2025-02-08 14:26:44,445 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-08 14:26:44,474 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:44,498 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2025-02-08 14:26:44,500 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand has 12 states, 11 states have (on average 1.5454545454545454) internal successors, (17), 11 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:26:44,545 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand has 12 states, 11 states have (on average 1.5454545454545454) internal successors, (17), 11 states have internal predecessors, (17), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0). Second operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 19 states and 27 transitions. Complement of second has 5 states. [2025-02-08 14:26:44,549 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2025-02-08 14:26:44,552 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:26:44,555 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 12 transitions. [2025-02-08 14:26:44,558 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 12 transitions. Stem has 4 letters. Loop has 3 letters. [2025-02-08 14:26:44,560 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-02-08 14:26:44,560 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 12 transitions. Stem has 7 letters. Loop has 3 letters. [2025-02-08 14:26:44,560 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-02-08 14:26:44,560 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 12 transitions. Stem has 4 letters. Loop has 6 letters. [2025-02-08 14:26:44,560 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-02-08 14:26:44,561 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 19 states and 27 transitions. [2025-02-08 14:26:44,562 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-08 14:26:44,564 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 19 states to 11 states and 16 transitions. [2025-02-08 14:26:44,565 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2025-02-08 14:26:44,565 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 8 [2025-02-08 14:26:44,565 INFO L73 IsDeterministic]: Start isDeterministic. Operand 11 states and 16 transitions. [2025-02-08 14:26:44,567 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:26:44,567 INFO L218 hiAutomatonCegarLoop]: Abstraction has 11 states and 16 transitions. [2025-02-08 14:26:44,576 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11 states and 16 transitions. [2025-02-08 14:26:44,585 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11 to 10. [2025-02-08 14:26:44,586 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.5) internal successors, (15), 9 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:26:44,586 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 15 transitions. [2025-02-08 14:26:44,587 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10 states and 15 transitions. [2025-02-08 14:26:44,588 INFO L432 stractBuchiCegarLoop]: Abstraction has 10 states and 15 transitions. [2025-02-08 14:26:44,588 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-02-08 14:26:44,588 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 15 transitions. [2025-02-08 14:26:44,588 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-08 14:26:44,588 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:26:44,588 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:26:44,589 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1] [2025-02-08 14:26:44,590 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-08 14:26:44,591 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" [2025-02-08 14:26:44,591 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" [2025-02-08 14:26:44,591 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:26:44,592 INFO L85 PathProgramCache]: Analyzing trace with hash 47682440, now seen corresponding path program 1 times [2025-02-08 14:26:44,592 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:26:44,592 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1456930716] [2025-02-08 14:26:44,593 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:26:44,593 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:26:44,597 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 5 statements into 1 equivalence classes. [2025-02-08 14:26:44,604 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 5 of 5 statements. [2025-02-08 14:26:44,604 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:44,604 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:26:44,657 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:44,657 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:26:44,658 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1456930716] [2025-02-08 14:26:44,658 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1456930716] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:26:44,658 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:26:44,658 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-08 14:26:44,659 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2026157881] [2025-02-08 14:26:44,659 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:26:44,660 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-08 14:26:44,661 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:26:44,661 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 1 times [2025-02-08 14:26:44,661 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:26:44,661 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1064936314] [2025-02-08 14:26:44,661 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:26:44,661 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:26:44,664 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-08 14:26:44,667 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-08 14:26:44,667 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:44,667 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:44,667 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:26:44,668 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-08 14:26:44,672 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-08 14:26:44,672 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:44,672 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:44,674 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:26:44,737 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:26:44,739 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-08 14:26:44,740 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2025-02-08 14:26:44,741 INFO L87 Difference]: Start difference. First operand 10 states and 15 transitions. cyclomatic complexity: 7 Second operand has 4 states, 3 states have (on average 1.6666666666666667) internal successors, (5), 4 states have internal predecessors, (5), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:26:44,765 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:26:44,765 INFO L93 Difference]: Finished difference Result 12 states and 17 transitions. [2025-02-08 14:26:44,765 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 12 states and 17 transitions. [2025-02-08 14:26:44,766 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-08 14:26:44,766 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 12 states to 12 states and 17 transitions. [2025-02-08 14:26:44,766 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 7 [2025-02-08 14:26:44,766 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 7 [2025-02-08 14:26:44,766 INFO L73 IsDeterministic]: Start isDeterministic. Operand 12 states and 17 transitions. [2025-02-08 14:26:44,767 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:26:44,767 INFO L218 hiAutomatonCegarLoop]: Abstraction has 12 states and 17 transitions. [2025-02-08 14:26:44,767 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 12 states and 17 transitions. [2025-02-08 14:26:44,767 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 12 to 10. [2025-02-08 14:26:44,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 10 states, 10 states have (on average 1.4) internal successors, (14), 9 states have internal predecessors, (14), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:26:44,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 10 states to 10 states and 14 transitions. [2025-02-08 14:26:44,768 INFO L240 hiAutomatonCegarLoop]: Abstraction has 10 states and 14 transitions. [2025-02-08 14:26:44,769 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2025-02-08 14:26:44,771 INFO L432 stractBuchiCegarLoop]: Abstraction has 10 states and 14 transitions. [2025-02-08 14:26:44,771 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-02-08 14:26:44,771 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 10 states and 14 transitions. [2025-02-08 14:26:44,772 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-08 14:26:44,773 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:26:44,773 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:26:44,773 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:26:44,773 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-08 14:26:44,773 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" [2025-02-08 14:26:44,773 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" [2025-02-08 14:26:44,773 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:26:44,773 INFO L85 PathProgramCache]: Analyzing trace with hash -1126475907, now seen corresponding path program 1 times [2025-02-08 14:26:44,774 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:26:44,774 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1549574880] [2025-02-08 14:26:44,774 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:26:44,774 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:26:44,782 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 8 statements into 1 equivalence classes. [2025-02-08 14:26:44,796 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-02-08 14:26:44,796 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:44,796 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:44,796 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:26:44,801 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 8 statements into 1 equivalence classes. [2025-02-08 14:26:44,809 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-02-08 14:26:44,811 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:44,811 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:44,814 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:26:44,816 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:26:44,816 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 2 times [2025-02-08 14:26:44,816 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:26:44,816 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [951593228] [2025-02-08 14:26:44,816 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-08 14:26:44,816 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:26:44,819 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-08 14:26:44,822 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-08 14:26:44,822 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-08 14:26:44,823 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:44,823 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:26:44,824 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-08 14:26:44,829 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-08 14:26:44,830 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:44,830 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:44,831 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:26:44,831 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:26:44,831 INFO L85 PathProgramCache]: Analyzing trace with hash -211587845, now seen corresponding path program 1 times [2025-02-08 14:26:44,831 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:26:44,831 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [371129885] [2025-02-08 14:26:44,831 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:26:44,832 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:26:44,836 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 10 statements into 1 equivalence classes. [2025-02-08 14:26:44,850 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 10 of 10 statements. [2025-02-08 14:26:44,850 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:44,850 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:44,850 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:26:44,858 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 10 statements into 1 equivalence classes. [2025-02-08 14:26:44,872 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 10 of 10 statements. [2025-02-08 14:26:44,872 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:44,872 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:44,875 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:26:45,028 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (5)] Forceful destruction successful, exit code 0 [2025-02-08 14:26:45,151 INFO L204 LassoAnalysis]: Preferences: [2025-02-08 14:26:45,151 INFO L125 ssoRankerPreferences]: Compute integeral hull: false [2025-02-08 14:26:45,151 INFO L126 ssoRankerPreferences]: Enable LassoPartitioneer: true [2025-02-08 14:26:45,151 INFO L127 ssoRankerPreferences]: Term annotations enabled: false [2025-02-08 14:26:45,152 INFO L128 ssoRankerPreferences]: Use exernal solver: false [2025-02-08 14:26:45,152 INFO L129 ssoRankerPreferences]: SMT solver command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-08 14:26:45,152 INFO L130 ssoRankerPreferences]: Dump SMT script to file: false [2025-02-08 14:26:45,152 INFO L131 ssoRankerPreferences]: Path of dumped script: [2025-02-08 14:26:45,152 INFO L132 ssoRankerPreferences]: Filename of dumped script: array16_alloca_fixed.i_Iteration3_Lasso [2025-02-08 14:26:45,152 INFO L133 ssoRankerPreferences]: MapElimAlgo: Frank [2025-02-08 14:26:45,152 INFO L241 LassoAnalysis]: Starting lasso preprocessing... [2025-02-08 14:26:45,153 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-08 14:26:45,157 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-08 14:26:45,273 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-08 14:26:45,275 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-08 14:26:45,277 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-08 14:26:45,279 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-08 14:26:45,281 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-08 14:26:45,283 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-08 14:26:45,285 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-08 14:26:45,286 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-08 14:26:45,289 INFO L118 MapEliminator]: Using MapEliminator with SimplificationTechnique=SIMPLIFY_DDA AddInequalities=false OnlyTrivialImplicationsArrayWrite=true OnlyTrivialImplicationsForModifiedArguments=true OnlyArgumentsInFormula=true [2025-02-08 14:26:45,509 INFO L259 LassoAnalysis]: Preprocessing complete. [2025-02-08 14:26:45,511 INFO L451 LassoAnalysis]: Using template 'affine'. [2025-02-08 14:26:45,512 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-08 14:26:45,512 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 14:26:45,514 INFO L229 MonitoredProcess]: Starting monitored process 6 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-08 14:26:45,516 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Waiting until timeout for monitored process [2025-02-08 14:26:45,517 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-08 14:26:45,530 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-08 14:26:45,530 INFO L351 nArgumentSynthesizer]: There is no stem transition; disabling supporting invariant generation. [2025-02-08 14:26:45,530 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-08 14:26:45,530 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-08 14:26:45,530 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-08 14:26:45,531 INFO L401 nArgumentSynthesizer]: We have 2 Motzkin's Theorem applications. [2025-02-08 14:26:45,531 INFO L402 nArgumentSynthesizer]: A total of 0 supporting invariants were added. [2025-02-08 14:26:45,534 INFO L488 LassoAnalysis]: Proving termination failed for this template and these settings. [2025-02-08 14:26:45,542 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (6)] Ended with exit code 0 [2025-02-08 14:26:45,542 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-08 14:26:45,542 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 14:26:45,544 INFO L229 MonitoredProcess]: Starting monitored process 7 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-08 14:26:45,546 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Waiting until timeout for monitored process [2025-02-08 14:26:45,547 INFO L120 nArgumentSynthesizer]: Termination Analysis Settings: Termination analysis: LINEAR_WITH_GUESSESNumber of strict supporting invariants: 0Number of non-strict supporting invariants: 1Consider only non-deceasing supporting invariants: trueSimplify termination arguments: trueSimplify supporting invariants: trueOverapproximate stem: false [2025-02-08 14:26:45,560 INFO L338 nArgumentSynthesizer]: Template has degree 0. [2025-02-08 14:26:45,560 INFO L203 nArgumentSynthesizer]: 1 stem disjuncts [2025-02-08 14:26:45,560 INFO L204 nArgumentSynthesizer]: 1 loop disjuncts [2025-02-08 14:26:45,560 INFO L205 nArgumentSynthesizer]: 2 template conjuncts. [2025-02-08 14:26:45,567 INFO L401 nArgumentSynthesizer]: We have 6 Motzkin's Theorem applications. [2025-02-08 14:26:45,568 INFO L402 nArgumentSynthesizer]: A total of 2 supporting invariants were added. [2025-02-08 14:26:45,577 INFO L420 nArgumentSynthesizer]: Found a termination argument, trying to simplify. [2025-02-08 14:26:45,606 INFO L443 ModelExtractionUtils]: Simplification made 12 calls to the SMT solver. [2025-02-08 14:26:45,606 INFO L444 ModelExtractionUtils]: 1 out of 19 variables were initially zero. Simplification set additionally 15 variables to zero. [2025-02-08 14:26:45,606 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-08 14:26:45,606 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 14:26:45,608 INFO L229 MonitoredProcess]: Starting monitored process 8 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-08 14:26:45,611 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Waiting until timeout for monitored process [2025-02-08 14:26:45,611 INFO L435 nArgumentSynthesizer]: Simplifying supporting invariants... [2025-02-08 14:26:45,626 INFO L438 nArgumentSynthesizer]: Removed 2 redundant supporting invariants from a total of 2. [2025-02-08 14:26:45,626 INFO L474 LassoAnalysis]: Proved termination. [2025-02-08 14:26:45,626 INFO L476 LassoAnalysis]: Termination argument consisting of: Ranking function f(ULTIMATE.start_main_~length~0#1, ULTIMATE.start_main_~j~0#1) = 1*ULTIMATE.start_main_~length~0#1 - 1*ULTIMATE.start_main_~j~0#1 Supporting invariants [] [2025-02-08 14:26:45,634 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (7)] Ended with exit code 0 [2025-02-08 14:26:45,641 INFO L156 tatePredicateManager]: 3 out of 3 supporting invariants were superfluous and have been removed [2025-02-08 14:26:45,659 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:26:45,668 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 8 statements into 1 equivalence classes. [2025-02-08 14:26:45,677 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-02-08 14:26:45,677 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:45,677 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:26:45,678 INFO L256 TraceCheckSpWp]: Trace formula consists of 43 conjuncts, 2 conjuncts are in the unsatisfiable core [2025-02-08 14:26:45,678 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-08 14:26:45,692 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-08 14:26:45,695 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-08 14:26:45,695 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:45,695 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:26:45,696 INFO L256 TraceCheckSpWp]: Trace formula consists of 14 conjuncts, 4 conjuncts are in the unsatisfiable core [2025-02-08 14:26:45,696 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-08 14:26:45,713 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:45,713 INFO L141 lantAutomatonBouncer]: Defining deterministic Buchi interpolant automaton with honda bouncer for stem and without honda bouncer for loop.1 stem predicates 2 loop predicates [2025-02-08 14:26:45,714 INFO L71 iDifferenceNCSBLazy3]: Start buchiDifferenceNCSBLazy3. First operand 10 states and 14 transitions. cyclomatic complexity: 6 Second operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 3 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:26:45,734 INFO L75 iDifferenceNCSBLazy3]: Finished buchiDifferenceNCSBLazy3. First operand 10 states and 14 transitions. cyclomatic complexity: 6. Second operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 3 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Result 14 states and 20 transitions. Complement of second has 5 states. [2025-02-08 14:26:45,735 INFO L141 InterpolantAutomaton]: Switched to read-only mode: Buchi interpolant automaton has 3 states 1 stem states 1 non-accepting loop states 1 accepting loop states [2025-02-08 14:26:45,736 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 3 states, 3 states have (on average 3.3333333333333335) internal successors, (10), 3 states have internal predecessors, (10), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:26:45,736 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 3 states to 3 states and 12 transitions. [2025-02-08 14:26:45,738 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 12 transitions. Stem has 8 letters. Loop has 2 letters. [2025-02-08 14:26:45,738 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-02-08 14:26:45,738 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 12 transitions. Stem has 10 letters. Loop has 2 letters. [2025-02-08 14:26:45,738 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-02-08 14:26:45,738 INFO L84 BuchiAccepts]: Start buchiAccepts Operand 3 states and 12 transitions. Stem has 8 letters. Loop has 4 letters. [2025-02-08 14:26:45,738 INFO L116 BuchiAccepts]: Finished buchiAccepts. [2025-02-08 14:26:45,738 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 14 states and 20 transitions. [2025-02-08 14:26:45,739 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-08 14:26:45,739 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 14 states to 14 states and 20 transitions. [2025-02-08 14:26:45,739 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 8 [2025-02-08 14:26:45,739 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 9 [2025-02-08 14:26:45,741 INFO L73 IsDeterministic]: Start isDeterministic. Operand 14 states and 20 transitions. [2025-02-08 14:26:45,741 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-08 14:26:45,742 INFO L218 hiAutomatonCegarLoop]: Abstraction has 14 states and 20 transitions. [2025-02-08 14:26:45,742 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 14 states and 20 transitions. [2025-02-08 14:26:45,742 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 14 to 14. [2025-02-08 14:26:45,743 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 14 states, 14 states have (on average 1.4285714285714286) internal successors, (20), 13 states have internal predecessors, (20), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:26:45,743 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 14 states to 14 states and 20 transitions. [2025-02-08 14:26:45,743 INFO L240 hiAutomatonCegarLoop]: Abstraction has 14 states and 20 transitions. [2025-02-08 14:26:45,743 INFO L432 stractBuchiCegarLoop]: Abstraction has 14 states and 20 transitions. [2025-02-08 14:26:45,743 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-02-08 14:26:45,743 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 14 states and 20 transitions. [2025-02-08 14:26:45,743 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-08 14:26:45,743 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:26:45,743 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:26:45,744 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:26:45,744 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-08 14:26:45,744 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1;" [2025-02-08 14:26:45,744 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" [2025-02-08 14:26:45,744 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:26:45,744 INFO L85 PathProgramCache]: Analyzing trace with hash -211587844, now seen corresponding path program 1 times [2025-02-08 14:26:45,744 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:26:45,744 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [411625305] [2025-02-08 14:26:45,744 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:26:45,746 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:26:45,751 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 10 statements into 1 equivalence classes. [2025-02-08 14:26:45,774 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 10 of 10 statements. [2025-02-08 14:26:45,775 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:45,775 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:26:45,906 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (8)] Ended with exit code 0 [2025-02-08 14:26:46,183 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:46,184 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:26:46,184 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [411625305] [2025-02-08 14:26:46,184 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [411625305] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-08 14:26:46,184 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1623351423] [2025-02-08 14:26:46,184 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:26:46,184 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-08 14:26:46,184 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 14:26:46,186 INFO L229 MonitoredProcess]: Starting monitored process 9 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-08 14:26:46,188 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Waiting until timeout for monitored process [2025-02-08 14:26:46,222 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 10 statements into 1 equivalence classes. [2025-02-08 14:26:46,230 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 10 of 10 statements. [2025-02-08 14:26:46,230 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:46,230 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:26:46,231 INFO L256 TraceCheckSpWp]: Trace formula consists of 54 conjuncts, 13 conjuncts are in the unsatisfiable core [2025-02-08 14:26:46,232 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-08 14:26:46,258 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-02-08 14:26:46,318 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2025-02-08 14:26:46,335 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:46,336 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-08 14:26:46,406 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 16 [2025-02-08 14:26:46,410 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 14 [2025-02-08 14:26:46,415 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:46,416 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1623351423] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-08 14:26:46,416 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-08 14:26:46,416 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 6, 6] total 15 [2025-02-08 14:26:46,416 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1786975150] [2025-02-08 14:26:46,416 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-08 14:26:46,416 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-08 14:26:46,417 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:26:46,417 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 3 times [2025-02-08 14:26:46,417 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:26:46,417 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1003560439] [2025-02-08 14:26:46,417 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-08 14:26:46,417 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:26:46,422 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-02-08 14:26:46,424 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-08 14:26:46,424 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-08 14:26:46,424 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:46,424 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:26:46,425 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-08 14:26:46,427 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-08 14:26:46,427 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:46,427 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:46,429 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:26:46,480 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:26:46,481 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2025-02-08 14:26:46,481 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=53, Invalid=187, Unknown=0, NotChecked=0, Total=240 [2025-02-08 14:26:46,481 INFO L87 Difference]: Start difference. First operand 14 states and 20 transitions. cyclomatic complexity: 9 Second operand has 16 states, 15 states have (on average 1.4666666666666666) internal successors, (22), 16 states have internal predecessors, (22), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:26:46,621 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:26:46,622 INFO L93 Difference]: Finished difference Result 27 states and 38 transitions. [2025-02-08 14:26:46,622 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 38 transitions. [2025-02-08 14:26:46,624 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2025-02-08 14:26:46,626 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 26 states and 37 transitions. [2025-02-08 14:26:46,626 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2025-02-08 14:26:46,626 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2025-02-08 14:26:46,626 INFO L73 IsDeterministic]: Start isDeterministic. Operand 26 states and 37 transitions. [2025-02-08 14:26:46,626 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-08 14:26:46,626 INFO L218 hiAutomatonCegarLoop]: Abstraction has 26 states and 37 transitions. [2025-02-08 14:26:46,628 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states and 37 transitions. [2025-02-08 14:26:46,629 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 19. [2025-02-08 14:26:46,629 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 19 states, 19 states have (on average 1.4736842105263157) internal successors, (28), 18 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:26:46,629 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 28 transitions. [2025-02-08 14:26:46,630 INFO L240 hiAutomatonCegarLoop]: Abstraction has 19 states and 28 transitions. [2025-02-08 14:26:46,631 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-02-08 14:26:46,631 INFO L432 stractBuchiCegarLoop]: Abstraction has 19 states and 28 transitions. [2025-02-08 14:26:46,632 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-02-08 14:26:46,632 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 19 states and 28 transitions. [2025-02-08 14:26:46,632 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-08 14:26:46,633 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:26:46,633 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:26:46,633 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:26:46,633 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-08 14:26:46,634 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1;" [2025-02-08 14:26:46,634 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" [2025-02-08 14:26:46,634 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:26:46,634 INFO L85 PathProgramCache]: Analyzing trace with hash -1472455942, now seen corresponding path program 1 times [2025-02-08 14:26:46,635 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:26:46,635 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2022126843] [2025-02-08 14:26:46,635 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:26:46,635 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:26:46,640 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 12 statements into 1 equivalence classes. [2025-02-08 14:26:46,651 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 12 of 12 statements. [2025-02-08 14:26:46,651 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:46,651 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:26:46,740 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:46,741 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:26:46,742 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2022126843] [2025-02-08 14:26:46,742 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2022126843] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-08 14:26:46,742 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1782671260] [2025-02-08 14:26:46,742 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:26:46,742 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-08 14:26:46,742 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 14:26:46,744 INFO L229 MonitoredProcess]: Starting monitored process 10 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-08 14:26:46,746 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Waiting until timeout for monitored process [2025-02-08 14:26:46,782 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 12 statements into 1 equivalence classes. [2025-02-08 14:26:46,792 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 12 of 12 statements. [2025-02-08 14:26:46,792 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:46,792 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:26:46,793 INFO L256 TraceCheckSpWp]: Trace formula consists of 66 conjuncts, 6 conjuncts are in the unsatisfiable core [2025-02-08 14:26:46,794 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-08 14:26:46,842 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:46,842 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-08 14:26:46,879 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 2 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:46,880 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1782671260] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-08 14:26:46,880 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-08 14:26:46,880 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6] total 10 [2025-02-08 14:26:46,880 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1452601994] [2025-02-08 14:26:46,880 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-08 14:26:46,880 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-08 14:26:46,880 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:26:46,880 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 4 times [2025-02-08 14:26:46,880 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:26:46,880 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [26667707] [2025-02-08 14:26:46,880 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-08 14:26:46,881 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:26:46,885 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-02-08 14:26:46,889 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-02-08 14:26:46,889 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-08 14:26:46,889 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:46,889 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:26:46,890 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-08 14:26:46,892 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-08 14:26:46,892 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:46,892 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:46,893 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:26:46,944 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:26:46,944 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2025-02-08 14:26:46,945 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2025-02-08 14:26:46,945 INFO L87 Difference]: Start difference. First operand 19 states and 28 transitions. cyclomatic complexity: 13 Second operand has 10 states, 10 states have (on average 2.3) internal successors, (23), 10 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:26:46,996 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:26:46,997 INFO L93 Difference]: Finished difference Result 27 states and 37 transitions. [2025-02-08 14:26:46,997 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 27 states and 37 transitions. [2025-02-08 14:26:46,998 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-08 14:26:46,998 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 27 states to 24 states and 34 transitions. [2025-02-08 14:26:46,998 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2025-02-08 14:26:46,998 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2025-02-08 14:26:46,998 INFO L73 IsDeterministic]: Start isDeterministic. Operand 24 states and 34 transitions. [2025-02-08 14:26:46,999 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-08 14:26:46,999 INFO L218 hiAutomatonCegarLoop]: Abstraction has 24 states and 34 transitions. [2025-02-08 14:26:46,999 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states and 34 transitions. [2025-02-08 14:26:47,000 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 21. [2025-02-08 14:26:47,000 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21 states, 21 states have (on average 1.4285714285714286) internal successors, (30), 20 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:26:47,000 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 30 transitions. [2025-02-08 14:26:47,000 INFO L240 hiAutomatonCegarLoop]: Abstraction has 21 states and 30 transitions. [2025-02-08 14:26:47,001 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2025-02-08 14:26:47,001 INFO L432 stractBuchiCegarLoop]: Abstraction has 21 states and 30 transitions. [2025-02-08 14:26:47,001 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-02-08 14:26:47,001 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 21 states and 30 transitions. [2025-02-08 14:26:47,002 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-08 14:26:47,002 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:26:47,002 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:26:47,002 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:26:47,002 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-08 14:26:47,002 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume 0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2);havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1;" [2025-02-08 14:26:47,002 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" [2025-02-08 14:26:47,003 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:26:47,003 INFO L85 PathProgramCache]: Analyzing trace with hash 1715913382, now seen corresponding path program 1 times [2025-02-08 14:26:47,003 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:26:47,003 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [222447912] [2025-02-08 14:26:47,003 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:26:47,003 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:26:47,008 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 13 statements into 1 equivalence classes. [2025-02-08 14:26:47,035 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 13 of 13 statements. [2025-02-08 14:26:47,035 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:47,035 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:26:47,471 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:47,472 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:26:47,472 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [222447912] [2025-02-08 14:26:47,472 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [222447912] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-08 14:26:47,472 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [890903992] [2025-02-08 14:26:47,472 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:26:47,472 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-08 14:26:47,473 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 14:26:47,476 INFO L229 MonitoredProcess]: Starting monitored process 11 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-08 14:26:47,478 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Waiting until timeout for monitored process [2025-02-08 14:26:47,512 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 13 statements into 1 equivalence classes. [2025-02-08 14:26:47,525 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 13 of 13 statements. [2025-02-08 14:26:47,525 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:47,525 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:26:47,526 INFO L256 TraceCheckSpWp]: Trace formula consists of 76 conjuncts, 18 conjuncts are in the unsatisfiable core [2025-02-08 14:26:47,528 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-08 14:26:47,547 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-02-08 14:26:47,613 INFO L349 Elim1Store]: treesize reduction 25, result has 21.9 percent of original size [2025-02-08 14:26:47,613 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 13 [2025-02-08 14:26:47,636 INFO L349 Elim1Store]: treesize reduction 25, result has 21.9 percent of original size [2025-02-08 14:26:47,637 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 33 treesize of output 13 [2025-02-08 14:26:47,676 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2025-02-08 14:26:47,689 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:47,690 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-08 14:26:47,894 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 23 [2025-02-08 14:26:47,901 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 46 treesize of output 44 [2025-02-08 14:26:47,932 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:47,932 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [890903992] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-08 14:26:47,932 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-08 14:26:47,932 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 8, 8] total 20 [2025-02-08 14:26:47,932 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1667545030] [2025-02-08 14:26:47,932 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-08 14:26:47,932 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-08 14:26:47,933 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:26:47,933 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 5 times [2025-02-08 14:26:47,933 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:26:47,933 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2073111395] [2025-02-08 14:26:47,933 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-08 14:26:47,933 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:26:47,940 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-08 14:26:47,942 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-08 14:26:47,942 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-08 14:26:47,942 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:47,942 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:26:47,943 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-08 14:26:47,945 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-08 14:26:47,945 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:47,945 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:47,946 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:26:48,016 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:26:48,016 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2025-02-08 14:26:48,017 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=340, Unknown=0, NotChecked=0, Total=420 [2025-02-08 14:26:48,017 INFO L87 Difference]: Start difference. First operand 21 states and 30 transitions. cyclomatic complexity: 13 Second operand has 21 states, 20 states have (on average 1.55) internal successors, (31), 21 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:26:48,180 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:26:48,181 INFO L93 Difference]: Finished difference Result 23 states and 31 transitions. [2025-02-08 14:26:48,181 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 23 states and 31 transitions. [2025-02-08 14:26:48,182 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-08 14:26:48,182 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 23 states to 22 states and 30 transitions. [2025-02-08 14:26:48,183 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2025-02-08 14:26:48,183 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2025-02-08 14:26:48,184 INFO L73 IsDeterministic]: Start isDeterministic. Operand 22 states and 30 transitions. [2025-02-08 14:26:48,184 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-08 14:26:48,184 INFO L218 hiAutomatonCegarLoop]: Abstraction has 22 states and 30 transitions. [2025-02-08 14:26:48,184 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states and 30 transitions. [2025-02-08 14:26:48,185 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 17. [2025-02-08 14:26:48,186 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 17 states, 17 states have (on average 1.3529411764705883) internal successors, (23), 16 states have internal predecessors, (23), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:26:48,186 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 17 states to 17 states and 23 transitions. [2025-02-08 14:26:48,186 INFO L240 hiAutomatonCegarLoop]: Abstraction has 17 states and 23 transitions. [2025-02-08 14:26:48,188 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2025-02-08 14:26:48,188 INFO L432 stractBuchiCegarLoop]: Abstraction has 17 states and 23 transitions. [2025-02-08 14:26:48,188 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-02-08 14:26:48,189 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 17 states and 23 transitions. [2025-02-08 14:26:48,189 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-08 14:26:48,189 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:26:48,189 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:26:48,189 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:26:48,189 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-08 14:26:48,189 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1;" [2025-02-08 14:26:48,189 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" [2025-02-08 14:26:48,190 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:26:48,190 INFO L85 PathProgramCache]: Analyzing trace with hash 612821349, now seen corresponding path program 2 times [2025-02-08 14:26:48,190 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:26:48,190 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [504045438] [2025-02-08 14:26:48,190 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-08 14:26:48,190 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:26:48,195 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 15 statements into 2 equivalence classes. [2025-02-08 14:26:48,209 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 15 of 15 statements. [2025-02-08 14:26:48,210 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-02-08 14:26:48,210 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:26:48,548 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:48,548 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:26:48,548 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [504045438] [2025-02-08 14:26:48,548 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [504045438] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-08 14:26:48,549 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1335292569] [2025-02-08 14:26:48,549 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-08 14:26:48,549 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-08 14:26:48,549 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 14:26:48,552 INFO L229 MonitoredProcess]: Starting monitored process 12 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-08 14:26:48,555 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Waiting until timeout for monitored process [2025-02-08 14:26:48,590 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 15 statements into 2 equivalence classes. [2025-02-08 14:26:48,602 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 15 of 15 statements. [2025-02-08 14:26:48,602 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-02-08 14:26:48,603 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:26:48,603 INFO L256 TraceCheckSpWp]: Trace formula consists of 81 conjuncts, 21 conjuncts are in the unsatisfiable core [2025-02-08 14:26:48,606 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-08 14:26:48,664 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-02-08 14:26:48,788 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2025-02-08 14:26:48,799 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:48,800 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-08 14:26:48,919 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2025-02-08 14:26:48,921 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2025-02-08 14:26:48,944 INFO L134 CoverageAnalysis]: Checked inductivity of 7 backedges. 0 proven. 7 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:48,945 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1335292569] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-08 14:26:48,945 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-08 14:26:48,945 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 8] total 21 [2025-02-08 14:26:48,945 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1318015698] [2025-02-08 14:26:48,945 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-08 14:26:48,946 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-08 14:26:48,946 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:26:48,946 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 6 times [2025-02-08 14:26:48,946 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:26:48,946 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [922051488] [2025-02-08 14:26:48,946 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-08 14:26:48,946 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:26:48,949 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-02-08 14:26:48,951 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-08 14:26:48,951 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-02-08 14:26:48,951 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:48,951 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:26:48,952 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-08 14:26:48,954 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-08 14:26:48,954 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:48,954 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:48,955 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:26:49,003 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:26:49,003 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2025-02-08 14:26:49,004 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=74, Invalid=388, Unknown=0, NotChecked=0, Total=462 [2025-02-08 14:26:49,004 INFO L87 Difference]: Start difference. First operand 17 states and 23 transitions. cyclomatic complexity: 9 Second operand has 22 states, 21 states have (on average 1.6666666666666667) internal successors, (35), 22 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:26:49,367 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:26:49,367 INFO L93 Difference]: Finished difference Result 38 states and 51 transitions. [2025-02-08 14:26:49,367 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 38 states and 51 transitions. [2025-02-08 14:26:49,368 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2025-02-08 14:26:49,369 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 38 states to 37 states and 50 transitions. [2025-02-08 14:26:49,369 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 14 [2025-02-08 14:26:49,369 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 14 [2025-02-08 14:26:49,369 INFO L73 IsDeterministic]: Start isDeterministic. Operand 37 states and 50 transitions. [2025-02-08 14:26:49,369 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-08 14:26:49,369 INFO L218 hiAutomatonCegarLoop]: Abstraction has 37 states and 50 transitions. [2025-02-08 14:26:49,369 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states and 50 transitions. [2025-02-08 14:26:49,370 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 24. [2025-02-08 14:26:49,372 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 24 states, 24 states have (on average 1.375) internal successors, (33), 23 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:26:49,373 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 33 transitions. [2025-02-08 14:26:49,373 INFO L240 hiAutomatonCegarLoop]: Abstraction has 24 states and 33 transitions. [2025-02-08 14:26:49,373 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2025-02-08 14:26:49,374 INFO L432 stractBuchiCegarLoop]: Abstraction has 24 states and 33 transitions. [2025-02-08 14:26:49,374 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-02-08 14:26:49,374 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 24 states and 33 transitions. [2025-02-08 14:26:49,374 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-08 14:26:49,374 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:26:49,374 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:26:49,375 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2025-02-08 14:26:49,375 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-08 14:26:49,375 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1;" [2025-02-08 14:26:49,375 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" [2025-02-08 14:26:49,375 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:26:49,375 INFO L85 PathProgramCache]: Analyzing trace with hash 510796067, now seen corresponding path program 3 times [2025-02-08 14:26:49,375 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:26:49,376 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2029102540] [2025-02-08 14:26:49,376 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-08 14:26:49,376 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:26:49,381 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 17 statements into 3 equivalence classes. [2025-02-08 14:26:49,405 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) and asserted 17 of 17 statements. [2025-02-08 14:26:49,407 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2025-02-08 14:26:49,407 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:26:49,501 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 3 proven. 8 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:49,501 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:26:49,501 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2029102540] [2025-02-08 14:26:49,501 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2029102540] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-08 14:26:49,501 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1161166421] [2025-02-08 14:26:49,501 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-08 14:26:49,501 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-08 14:26:49,502 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 14:26:49,505 INFO L229 MonitoredProcess]: Starting monitored process 13 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-08 14:26:49,507 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Waiting until timeout for monitored process [2025-02-08 14:26:49,541 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 17 statements into 3 equivalence classes. [2025-02-08 14:26:49,555 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) and asserted 17 of 17 statements. [2025-02-08 14:26:49,556 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 3 check-sat command(s) [2025-02-08 14:26:49,556 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:26:49,557 INFO L256 TraceCheckSpWp]: Trace formula consists of 93 conjuncts, 8 conjuncts are in the unsatisfiable core [2025-02-08 14:26:49,558 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-08 14:26:49,643 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:49,646 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-08 14:26:49,695 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 6 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:49,697 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1161166421] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-08 14:26:49,697 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-08 14:26:49,697 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8] total 13 [2025-02-08 14:26:49,697 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1839724557] [2025-02-08 14:26:49,697 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-08 14:26:49,697 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-08 14:26:49,698 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:26:49,698 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 7 times [2025-02-08 14:26:49,698 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:26:49,698 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [118121658] [2025-02-08 14:26:49,698 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-02-08 14:26:49,698 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:26:49,700 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-08 14:26:49,703 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-08 14:26:49,703 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:49,704 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:49,704 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:26:49,705 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-08 14:26:49,706 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-08 14:26:49,706 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:49,706 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:49,707 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:26:49,754 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:26:49,754 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2025-02-08 14:26:49,754 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2025-02-08 14:26:49,756 INFO L87 Difference]: Start difference. First operand 24 states and 33 transitions. cyclomatic complexity: 13 Second operand has 13 states, 13 states have (on average 2.3076923076923075) internal successors, (30), 13 states have internal predecessors, (30), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:26:49,813 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:26:49,813 INFO L93 Difference]: Finished difference Result 34 states and 44 transitions. [2025-02-08 14:26:49,813 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 34 states and 44 transitions. [2025-02-08 14:26:49,814 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-08 14:26:49,818 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 34 states to 29 states and 39 transitions. [2025-02-08 14:26:49,819 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2025-02-08 14:26:49,819 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2025-02-08 14:26:49,819 INFO L73 IsDeterministic]: Start isDeterministic. Operand 29 states and 39 transitions. [2025-02-08 14:26:49,819 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-08 14:26:49,819 INFO L218 hiAutomatonCegarLoop]: Abstraction has 29 states and 39 transitions. [2025-02-08 14:26:49,819 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states and 39 transitions. [2025-02-08 14:26:49,820 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 26. [2025-02-08 14:26:49,821 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 26 states, 26 states have (on average 1.3461538461538463) internal successors, (35), 25 states have internal predecessors, (35), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:26:49,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 35 transitions. [2025-02-08 14:26:49,821 INFO L240 hiAutomatonCegarLoop]: Abstraction has 26 states and 35 transitions. [2025-02-08 14:26:49,822 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2025-02-08 14:26:49,822 INFO L432 stractBuchiCegarLoop]: Abstraction has 26 states and 35 transitions. [2025-02-08 14:26:49,822 INFO L338 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2025-02-08 14:26:49,822 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 26 states and 35 transitions. [2025-02-08 14:26:49,824 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-08 14:26:49,824 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:26:49,824 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:26:49,824 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:26:49,824 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-08 14:26:49,825 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume 0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2);havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1;" [2025-02-08 14:26:49,825 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" [2025-02-08 14:26:49,826 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:26:49,826 INFO L85 PathProgramCache]: Analyzing trace with hash -185875495, now seen corresponding path program 1 times [2025-02-08 14:26:49,826 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:26:49,826 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1501017796] [2025-02-08 14:26:49,826 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:26:49,826 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:26:49,832 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 18 statements into 1 equivalence classes. [2025-02-08 14:26:49,856 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 18 of 18 statements. [2025-02-08 14:26:49,857 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:49,857 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:26:50,252 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:50,252 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:26:50,253 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1501017796] [2025-02-08 14:26:50,253 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1501017796] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-08 14:26:50,253 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [2114727648] [2025-02-08 14:26:50,253 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:26:50,253 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-08 14:26:50,253 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 14:26:50,256 INFO L229 MonitoredProcess]: Starting monitored process 14 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-08 14:26:50,258 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Waiting until timeout for monitored process [2025-02-08 14:26:50,295 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 18 statements into 1 equivalence classes. [2025-02-08 14:26:50,309 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 18 of 18 statements. [2025-02-08 14:26:50,310 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:50,310 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:26:50,311 INFO L256 TraceCheckSpWp]: Trace formula consists of 103 conjuncts, 22 conjuncts are in the unsatisfiable core [2025-02-08 14:26:50,313 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-08 14:26:50,333 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2025-02-08 14:26:50,398 INFO L349 Elim1Store]: treesize reduction 27, result has 25.0 percent of original size [2025-02-08 14:26:50,398 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 15 [2025-02-08 14:26:50,416 INFO L349 Elim1Store]: treesize reduction 27, result has 25.0 percent of original size [2025-02-08 14:26:50,416 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 15 [2025-02-08 14:26:50,460 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 9 [2025-02-08 14:26:50,471 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:50,472 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-08 14:26:50,631 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2025-02-08 14:26:50,637 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2025-02-08 14:26:50,646 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:50,647 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [2114727648] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-08 14:26:50,647 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-08 14:26:50,647 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10] total 16 [2025-02-08 14:26:50,647 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1692077624] [2025-02-08 14:26:50,647 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-08 14:26:50,647 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-08 14:26:50,648 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:26:50,648 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 8 times [2025-02-08 14:26:50,648 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:26:50,648 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2076137325] [2025-02-08 14:26:50,648 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-08 14:26:50,648 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:26:50,653 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-08 14:26:50,655 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-08 14:26:50,655 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-08 14:26:50,655 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:50,655 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:26:50,656 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-08 14:26:50,658 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-08 14:26:50,658 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:50,658 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:50,660 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:26:50,712 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:26:50,712 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2025-02-08 14:26:50,713 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=222, Unknown=0, NotChecked=0, Total=272 [2025-02-08 14:26:50,713 INFO L87 Difference]: Start difference. First operand 26 states and 35 transitions. cyclomatic complexity: 13 Second operand has 17 states, 16 states have (on average 1.9375) internal successors, (31), 17 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:26:50,859 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:26:50,859 INFO L93 Difference]: Finished difference Result 30 states and 39 transitions. [2025-02-08 14:26:50,859 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 30 states and 39 transitions. [2025-02-08 14:26:50,860 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-08 14:26:50,860 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 30 states to 29 states and 38 transitions. [2025-02-08 14:26:50,860 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2025-02-08 14:26:50,860 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2025-02-08 14:26:50,860 INFO L73 IsDeterministic]: Start isDeterministic. Operand 29 states and 38 transitions. [2025-02-08 14:26:50,861 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-08 14:26:50,861 INFO L218 hiAutomatonCegarLoop]: Abstraction has 29 states and 38 transitions. [2025-02-08 14:26:50,861 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states and 38 transitions. [2025-02-08 14:26:50,862 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 22. [2025-02-08 14:26:50,862 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 22 states, 22 states have (on average 1.3181818181818181) internal successors, (29), 21 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:26:50,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 29 transitions. [2025-02-08 14:26:50,862 INFO L240 hiAutomatonCegarLoop]: Abstraction has 22 states and 29 transitions. [2025-02-08 14:26:50,863 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2025-02-08 14:26:50,863 INFO L432 stractBuchiCegarLoop]: Abstraction has 22 states and 29 transitions. [2025-02-08 14:26:50,863 INFO L338 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2025-02-08 14:26:50,863 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 22 states and 29 transitions. [2025-02-08 14:26:50,864 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-08 14:26:50,864 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:26:50,864 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:26:50,864 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [3, 3, 3, 3, 2, 1, 1, 1, 1, 1, 1] [2025-02-08 14:26:50,864 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-08 14:26:50,864 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1;" [2025-02-08 14:26:50,864 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" [2025-02-08 14:26:50,865 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:26:50,865 INFO L85 PathProgramCache]: Analyzing trace with hash -45179496, now seen corresponding path program 4 times [2025-02-08 14:26:50,865 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:26:50,865 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1473400304] [2025-02-08 14:26:50,865 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-08 14:26:50,865 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:26:50,871 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 20 statements into 2 equivalence classes. [2025-02-08 14:26:50,912 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) and asserted 19 of 20 statements. [2025-02-08 14:26:50,912 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) [2025-02-08 14:26:50,912 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:26:51,242 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:51,242 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:26:51,242 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1473400304] [2025-02-08 14:26:51,242 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1473400304] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-08 14:26:51,243 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1659612235] [2025-02-08 14:26:51,243 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-08 14:26:51,243 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-08 14:26:51,243 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 14:26:51,246 INFO L229 MonitoredProcess]: Starting monitored process 15 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-08 14:26:51,248 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Waiting until timeout for monitored process [2025-02-08 14:26:51,283 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 20 statements into 2 equivalence classes. [2025-02-08 14:26:51,296 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) and asserted 19 of 20 statements. [2025-02-08 14:26:51,297 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) [2025-02-08 14:26:51,297 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:26:51,297 INFO L256 TraceCheckSpWp]: Trace formula consists of 92 conjuncts, 21 conjuncts are in the unsatisfiable core [2025-02-08 14:26:51,299 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-08 14:26:51,314 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2025-02-08 14:26:51,390 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 9 [2025-02-08 14:26:51,403 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:51,403 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-08 14:26:51,507 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2025-02-08 14:26:51,509 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2025-02-08 14:26:51,521 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:51,521 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1659612235] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-08 14:26:51,521 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-08 14:26:51,521 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 10] total 16 [2025-02-08 14:26:51,521 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [49426545] [2025-02-08 14:26:51,521 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-08 14:26:51,522 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-08 14:26:51,522 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:26:51,522 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 9 times [2025-02-08 14:26:51,523 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:26:51,523 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1036275088] [2025-02-08 14:26:51,523 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-08 14:26:51,523 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:26:51,525 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-02-08 14:26:51,527 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-08 14:26:51,527 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-08 14:26:51,528 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:51,528 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:26:51,531 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-08 14:26:51,533 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-08 14:26:51,533 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:51,533 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:51,535 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:26:51,590 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:26:51,590 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2025-02-08 14:26:51,591 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=226, Unknown=0, NotChecked=0, Total=272 [2025-02-08 14:26:51,591 INFO L87 Difference]: Start difference. First operand 22 states and 29 transitions. cyclomatic complexity: 10 Second operand has 17 states, 16 states have (on average 2.0) internal successors, (32), 17 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:26:51,781 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:26:51,781 INFO L93 Difference]: Finished difference Result 39 states and 51 transitions. [2025-02-08 14:26:51,781 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 39 states and 51 transitions. [2025-02-08 14:26:51,782 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2025-02-08 14:26:51,782 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 39 states to 38 states and 50 transitions. [2025-02-08 14:26:51,782 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2025-02-08 14:26:51,783 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2025-02-08 14:26:51,783 INFO L73 IsDeterministic]: Start isDeterministic. Operand 38 states and 50 transitions. [2025-02-08 14:26:51,783 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-08 14:26:51,783 INFO L218 hiAutomatonCegarLoop]: Abstraction has 38 states and 50 transitions. [2025-02-08 14:26:51,783 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states and 50 transitions. [2025-02-08 14:26:51,784 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 29. [2025-02-08 14:26:51,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 29 states, 29 states have (on average 1.3448275862068966) internal successors, (39), 28 states have internal predecessors, (39), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:26:51,785 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 39 transitions. [2025-02-08 14:26:51,785 INFO L240 hiAutomatonCegarLoop]: Abstraction has 29 states and 39 transitions. [2025-02-08 14:26:51,786 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2025-02-08 14:26:51,787 INFO L432 stractBuchiCegarLoop]: Abstraction has 29 states and 39 transitions. [2025-02-08 14:26:51,787 INFO L338 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2025-02-08 14:26:51,787 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 29 states and 39 transitions. [2025-02-08 14:26:51,787 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-08 14:26:51,787 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:26:51,787 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:26:51,788 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1] [2025-02-08 14:26:51,788 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-08 14:26:51,788 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1;" [2025-02-08 14:26:51,788 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" [2025-02-08 14:26:51,789 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:26:51,789 INFO L85 PathProgramCache]: Analyzing trace with hash -467823466, now seen corresponding path program 5 times [2025-02-08 14:26:51,789 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:26:51,789 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [136667879] [2025-02-08 14:26:51,789 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-08 14:26:51,789 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:26:51,795 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 22 statements into 4 equivalence classes. [2025-02-08 14:26:51,807 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) and asserted 22 of 22 statements. [2025-02-08 14:26:51,807 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2025-02-08 14:26:51,807 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:26:51,924 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 9 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:51,924 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:26:51,924 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [136667879] [2025-02-08 14:26:51,924 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [136667879] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-08 14:26:51,925 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [297914491] [2025-02-08 14:26:51,925 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-08 14:26:51,925 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-08 14:26:51,925 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 14:26:51,929 INFO L229 MonitoredProcess]: Starting monitored process 16 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-08 14:26:51,930 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Waiting until timeout for monitored process [2025-02-08 14:26:51,969 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 22 statements into 4 equivalence classes. [2025-02-08 14:26:51,995 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) and asserted 22 of 22 statements. [2025-02-08 14:26:51,995 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 4 check-sat command(s) [2025-02-08 14:26:51,995 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:26:51,996 INFO L256 TraceCheckSpWp]: Trace formula consists of 120 conjuncts, 10 conjuncts are in the unsatisfiable core [2025-02-08 14:26:51,997 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-08 14:26:52,079 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 12 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:52,080 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-08 14:26:52,142 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 9 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:52,143 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [297914491] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-08 14:26:52,143 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-08 14:26:52,143 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11] total 15 [2025-02-08 14:26:52,143 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [431502800] [2025-02-08 14:26:52,143 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-08 14:26:52,143 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-08 14:26:52,143 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:26:52,143 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 10 times [2025-02-08 14:26:52,144 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:26:52,144 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [107314324] [2025-02-08 14:26:52,144 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-08 14:26:52,144 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:26:52,146 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-02-08 14:26:52,148 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-02-08 14:26:52,148 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-08 14:26:52,148 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:52,148 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:26:52,150 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-08 14:26:52,152 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-08 14:26:52,152 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:52,152 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:52,154 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:26:52,203 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:26:52,203 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2025-02-08 14:26:52,204 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=59, Invalid=151, Unknown=0, NotChecked=0, Total=210 [2025-02-08 14:26:52,204 INFO L87 Difference]: Start difference. First operand 29 states and 39 transitions. cyclomatic complexity: 14 Second operand has 15 states, 15 states have (on average 1.9333333333333333) internal successors, (29), 15 states have internal predecessors, (29), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:26:52,323 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:26:52,323 INFO L93 Difference]: Finished difference Result 71 states and 92 transitions. [2025-02-08 14:26:52,323 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 71 states and 92 transitions. [2025-02-08 14:26:52,324 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 9 [2025-02-08 14:26:52,326 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 71 states to 63 states and 82 transitions. [2025-02-08 14:26:52,326 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 22 [2025-02-08 14:26:52,326 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 26 [2025-02-08 14:26:52,326 INFO L73 IsDeterministic]: Start isDeterministic. Operand 63 states and 82 transitions. [2025-02-08 14:26:52,326 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-08 14:26:52,326 INFO L218 hiAutomatonCegarLoop]: Abstraction has 63 states and 82 transitions. [2025-02-08 14:26:52,327 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states and 82 transitions. [2025-02-08 14:26:52,329 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 57. [2025-02-08 14:26:52,330 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 57 states, 57 states have (on average 1.3157894736842106) internal successors, (75), 56 states have internal predecessors, (75), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:26:52,331 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 75 transitions. [2025-02-08 14:26:52,331 INFO L240 hiAutomatonCegarLoop]: Abstraction has 57 states and 75 transitions. [2025-02-08 14:26:52,332 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2025-02-08 14:26:52,333 INFO L432 stractBuchiCegarLoop]: Abstraction has 57 states and 75 transitions. [2025-02-08 14:26:52,333 INFO L338 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2025-02-08 14:26:52,333 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 57 states and 75 transitions. [2025-02-08 14:26:52,333 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 8 [2025-02-08 14:26:52,333 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:26:52,333 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:26:52,334 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 3, 2, 2, 1, 1, 1, 1, 1, 1] [2025-02-08 14:26:52,334 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [2, 1, 1] [2025-02-08 14:26:52,334 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume main_~length~0#1 < 1;main_~length~0#1 := 1;" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume 0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2);havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" [2025-02-08 14:26:52,334 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" [2025-02-08 14:26:52,336 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:26:52,336 INFO L85 PathProgramCache]: Analyzing trace with hash 167575460, now seen corresponding path program 1 times [2025-02-08 14:26:52,336 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:26:52,337 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [884534468] [2025-02-08 14:26:52,337 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:26:52,337 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:26:52,342 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 21 statements into 1 equivalence classes. [2025-02-08 14:26:52,349 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 21 of 21 statements. [2025-02-08 14:26:52,350 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:52,350 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:26:52,394 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 1 proven. 1 refuted. 0 times theorem prover too weak. 22 trivial. 0 not checked. [2025-02-08 14:26:52,395 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:26:52,395 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [884534468] [2025-02-08 14:26:52,395 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [884534468] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-08 14:26:52,395 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1064892242] [2025-02-08 14:26:52,395 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:26:52,395 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-08 14:26:52,395 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 14:26:52,399 INFO L229 MonitoredProcess]: Starting monitored process 17 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-08 14:26:52,400 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Waiting until timeout for monitored process [2025-02-08 14:26:52,440 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 21 statements into 1 equivalence classes. [2025-02-08 14:26:52,456 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 21 of 21 statements. [2025-02-08 14:26:52,456 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:52,456 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:26:52,457 INFO L256 TraceCheckSpWp]: Trace formula consists of 121 conjuncts, 4 conjuncts are in the unsatisfiable core [2025-02-08 14:26:52,458 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-08 14:26:52,493 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 13 proven. 0 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2025-02-08 14:26:52,494 INFO L308 TraceCheckSpWp]: Omiting computation of backward sequence because forward sequence was already perfect [2025-02-08 14:26:52,494 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1064892242] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:26:52,494 INFO L185 FreeRefinementEngine]: Found 1 perfect and 1 imperfect interpolant sequences. [2025-02-08 14:26:52,495 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [5] imperfect sequences [5] total 7 [2025-02-08 14:26:52,495 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1603077536] [2025-02-08 14:26:52,495 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:26:52,495 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-08 14:26:52,495 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:26:52,495 INFO L85 PathProgramCache]: Analyzing trace with hash 1107262, now seen corresponding path program 1 times [2025-02-08 14:26:52,495 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:26:52,496 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [666348388] [2025-02-08 14:26:52,496 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:26:52,496 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:26:52,499 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 4 statements into 1 equivalence classes. [2025-02-08 14:26:52,501 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 4 of 4 statements. [2025-02-08 14:26:52,501 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:52,501 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:52,501 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:26:52,502 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 4 statements into 1 equivalence classes. [2025-02-08 14:26:52,504 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 4 of 4 statements. [2025-02-08 14:26:52,504 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:52,504 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:52,506 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:26:52,600 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:26:52,601 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2025-02-08 14:26:52,601 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2025-02-08 14:26:52,601 INFO L87 Difference]: Start difference. First operand 57 states and 75 transitions. cyclomatic complexity: 25 Second operand has 5 states, 5 states have (on average 3.0) internal successors, (15), 5 states have internal predecessors, (15), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:26:52,623 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:26:52,623 INFO L93 Difference]: Finished difference Result 37 states and 47 transitions. [2025-02-08 14:26:52,623 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 37 states and 47 transitions. [2025-02-08 14:26:52,623 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-08 14:26:52,624 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 37 states to 31 states and 40 transitions. [2025-02-08 14:26:52,624 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2025-02-08 14:26:52,624 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2025-02-08 14:26:52,624 INFO L73 IsDeterministic]: Start isDeterministic. Operand 31 states and 40 transitions. [2025-02-08 14:26:52,624 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-08 14:26:52,624 INFO L218 hiAutomatonCegarLoop]: Abstraction has 31 states and 40 transitions. [2025-02-08 14:26:52,624 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states and 40 transitions. [2025-02-08 14:26:52,625 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 31. [2025-02-08 14:26:52,625 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 31 states, 31 states have (on average 1.2903225806451613) internal successors, (40), 30 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:26:52,625 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 40 transitions. [2025-02-08 14:26:52,626 INFO L240 hiAutomatonCegarLoop]: Abstraction has 31 states and 40 transitions. [2025-02-08 14:26:52,628 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2025-02-08 14:26:52,629 INFO L432 stractBuchiCegarLoop]: Abstraction has 31 states and 40 transitions. [2025-02-08 14:26:52,629 INFO L338 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2025-02-08 14:26:52,629 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 31 states and 40 transitions. [2025-02-08 14:26:52,630 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-08 14:26:52,632 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:26:52,632 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:26:52,632 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 3, 3, 2, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:26:52,632 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-08 14:26:52,633 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume 0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2);havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1;" [2025-02-08 14:26:52,633 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" [2025-02-08 14:26:52,633 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:26:52,633 INFO L85 PathProgramCache]: Analyzing trace with hash 88171010, now seen corresponding path program 2 times [2025-02-08 14:26:52,633 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:26:52,633 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [612737534] [2025-02-08 14:26:52,633 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-08 14:26:52,633 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:26:52,646 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 23 statements into 2 equivalence classes. [2025-02-08 14:26:52,666 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 23 of 23 statements. [2025-02-08 14:26:52,666 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-02-08 14:26:52,666 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:26:53,096 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:53,096 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:26:53,096 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [612737534] [2025-02-08 14:26:53,096 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [612737534] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-08 14:26:53,096 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [878330567] [2025-02-08 14:26:53,097 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-08 14:26:53,097 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-08 14:26:53,097 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 14:26:53,100 INFO L229 MonitoredProcess]: Starting monitored process 18 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-08 14:26:53,102 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Waiting until timeout for monitored process [2025-02-08 14:26:53,145 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 23 statements into 2 equivalence classes. [2025-02-08 14:26:53,164 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 23 of 23 statements. [2025-02-08 14:26:53,165 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-02-08 14:26:53,165 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:26:53,166 INFO L256 TraceCheckSpWp]: Trace formula consists of 130 conjuncts, 30 conjuncts are in the unsatisfiable core [2025-02-08 14:26:53,168 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-08 14:26:53,261 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-02-08 14:26:53,351 INFO L190 IndexEqualityManager]: detected not equals via solver [2025-02-08 14:26:53,352 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 13 [2025-02-08 14:26:53,364 INFO L190 IndexEqualityManager]: detected not equals via solver [2025-02-08 14:26:53,365 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 13 [2025-02-08 14:26:53,503 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2025-02-08 14:26:53,516 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:53,516 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-08 14:26:53,675 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 20 [2025-02-08 14:26:53,678 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2025-02-08 14:26:53,692 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:53,692 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [878330567] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-08 14:26:53,692 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-08 14:26:53,693 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 13, 12] total 26 [2025-02-08 14:26:53,693 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1946572643] [2025-02-08 14:26:53,693 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-08 14:26:53,693 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-08 14:26:53,693 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:26:53,693 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 11 times [2025-02-08 14:26:53,693 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:26:53,694 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [313294686] [2025-02-08 14:26:53,694 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-08 14:26:53,694 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:26:53,696 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-08 14:26:53,697 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-08 14:26:53,697 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-08 14:26:53,697 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:53,697 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:26:53,698 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-08 14:26:53,700 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-08 14:26:53,700 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:53,700 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:53,701 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:26:53,753 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:26:53,753 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2025-02-08 14:26:53,753 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=102, Invalid=600, Unknown=0, NotChecked=0, Total=702 [2025-02-08 14:26:53,754 INFO L87 Difference]: Start difference. First operand 31 states and 40 transitions. cyclomatic complexity: 13 Second operand has 27 states, 26 states have (on average 1.8846153846153846) internal successors, (49), 27 states have internal predecessors, (49), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:26:53,963 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:26:53,963 INFO L93 Difference]: Finished difference Result 37 states and 46 transitions. [2025-02-08 14:26:53,963 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 37 states and 46 transitions. [2025-02-08 14:26:53,964 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-08 14:26:53,964 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 37 states to 36 states and 45 transitions. [2025-02-08 14:26:53,964 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2025-02-08 14:26:53,964 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2025-02-08 14:26:53,964 INFO L73 IsDeterministic]: Start isDeterministic. Operand 36 states and 45 transitions. [2025-02-08 14:26:53,964 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-08 14:26:53,965 INFO L218 hiAutomatonCegarLoop]: Abstraction has 36 states and 45 transitions. [2025-02-08 14:26:53,965 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states and 45 transitions. [2025-02-08 14:26:53,965 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 27. [2025-02-08 14:26:53,966 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 27 states, 27 states have (on average 1.2592592592592593) internal successors, (34), 26 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:26:53,966 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 34 transitions. [2025-02-08 14:26:53,966 INFO L240 hiAutomatonCegarLoop]: Abstraction has 27 states and 34 transitions. [2025-02-08 14:26:53,967 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2025-02-08 14:26:53,968 INFO L432 stractBuchiCegarLoop]: Abstraction has 27 states and 34 transitions. [2025-02-08 14:26:53,968 INFO L338 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2025-02-08 14:26:53,968 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 27 states and 34 transitions. [2025-02-08 14:26:53,968 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-08 14:26:53,968 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:26:53,968 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:26:53,968 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [4, 4, 4, 4, 3, 1, 1, 1, 1, 1, 1] [2025-02-08 14:26:53,968 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-08 14:26:53,969 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1;" [2025-02-08 14:26:53,969 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" [2025-02-08 14:26:53,969 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:26:53,969 INFO L85 PathProgramCache]: Analyzing trace with hash 1331009857, now seen corresponding path program 6 times [2025-02-08 14:26:53,969 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:26:53,970 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [571096778] [2025-02-08 14:26:53,970 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-08 14:26:53,970 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:26:53,977 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 25 statements into 5 equivalence classes. [2025-02-08 14:26:54,014 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) and asserted 25 of 25 statements. [2025-02-08 14:26:54,014 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2025-02-08 14:26:54,014 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:26:54,399 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 2 proven. 32 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:54,399 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:26:54,399 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [571096778] [2025-02-08 14:26:54,400 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [571096778] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-08 14:26:54,400 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1211419104] [2025-02-08 14:26:54,400 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-08 14:26:54,400 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-08 14:26:54,400 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 14:26:54,404 INFO L229 MonitoredProcess]: Starting monitored process 19 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-08 14:26:54,405 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Waiting until timeout for monitored process [2025-02-08 14:26:54,447 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 25 statements into 5 equivalence classes. [2025-02-08 14:26:54,469 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) and asserted 25 of 25 statements. [2025-02-08 14:26:54,469 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 5 check-sat command(s) [2025-02-08 14:26:54,469 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:26:54,470 INFO L256 TraceCheckSpWp]: Trace formula consists of 135 conjuncts, 29 conjuncts are in the unsatisfiable core [2025-02-08 14:26:54,472 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-08 14:26:54,576 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 1 [2025-02-08 14:26:54,792 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 9 [2025-02-08 14:26:54,806 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:54,806 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-08 14:26:54,997 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2025-02-08 14:26:55,000 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2025-02-08 14:26:55,065 INFO L134 CoverageAnalysis]: Checked inductivity of 34 backedges. 0 proven. 34 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:55,065 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1211419104] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-08 14:26:55,065 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-08 14:26:55,065 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 12] total 33 [2025-02-08 14:26:55,066 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1333452215] [2025-02-08 14:26:55,066 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-08 14:26:55,066 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-08 14:26:55,066 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:26:55,066 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 12 times [2025-02-08 14:26:55,066 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:26:55,066 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [560948849] [2025-02-08 14:26:55,066 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-08 14:26:55,067 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:26:55,069 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 2 statements into 1 equivalence classes. [2025-02-08 14:26:55,070 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-08 14:26:55,070 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-02-08 14:26:55,070 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:55,070 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:26:55,071 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-08 14:26:55,072 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-08 14:26:55,072 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:55,072 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:55,073 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:26:55,119 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:26:55,120 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2025-02-08 14:26:55,120 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=136, Invalid=986, Unknown=0, NotChecked=0, Total=1122 [2025-02-08 14:26:55,121 INFO L87 Difference]: Start difference. First operand 27 states and 34 transitions. cyclomatic complexity: 10 Second operand has 34 states, 33 states have (on average 1.9696969696969697) internal successors, (65), 34 states have internal predecessors, (65), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:26:55,891 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:26:55,892 INFO L93 Difference]: Finished difference Result 62 states and 76 transitions. [2025-02-08 14:26:55,892 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 62 states and 76 transitions. [2025-02-08 14:26:55,893 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2025-02-08 14:26:55,893 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 62 states to 49 states and 62 transitions. [2025-02-08 14:26:55,893 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2025-02-08 14:26:55,893 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2025-02-08 14:26:55,894 INFO L73 IsDeterministic]: Start isDeterministic. Operand 49 states and 62 transitions. [2025-02-08 14:26:55,894 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-08 14:26:55,894 INFO L218 hiAutomatonCegarLoop]: Abstraction has 49 states and 62 transitions. [2025-02-08 14:26:55,894 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states and 62 transitions. [2025-02-08 14:26:55,895 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 36. [2025-02-08 14:26:55,895 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 36 states, 36 states have (on average 1.2777777777777777) internal successors, (46), 35 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:26:55,896 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 46 transitions. [2025-02-08 14:26:55,896 INFO L240 hiAutomatonCegarLoop]: Abstraction has 36 states and 46 transitions. [2025-02-08 14:26:55,896 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2025-02-08 14:26:55,897 INFO L432 stractBuchiCegarLoop]: Abstraction has 36 states and 46 transitions. [2025-02-08 14:26:55,897 INFO L338 stractBuchiCegarLoop]: ======== Iteration 15 ============ [2025-02-08 14:26:55,897 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 36 states and 46 transitions. [2025-02-08 14:26:55,897 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-08 14:26:55,897 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:26:55,898 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:26:55,898 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 4, 4, 3, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:26:55,898 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-08 14:26:55,898 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume 0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2);havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1;" [2025-02-08 14:26:55,899 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" [2025-02-08 14:26:55,899 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:26:55,899 INFO L85 PathProgramCache]: Analyzing trace with hash -430432779, now seen corresponding path program 3 times [2025-02-08 14:26:55,899 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:26:55,899 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1735334499] [2025-02-08 14:26:55,899 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-08 14:26:55,899 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:26:55,906 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 28 statements into 6 equivalence classes. [2025-02-08 14:26:55,958 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) and asserted 28 of 28 statements. [2025-02-08 14:26:55,958 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2025-02-08 14:26:55,958 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:26:56,438 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 0 proven. 47 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:56,439 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:26:56,439 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1735334499] [2025-02-08 14:26:56,439 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1735334499] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-08 14:26:56,439 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1861143387] [2025-02-08 14:26:56,439 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-08 14:26:56,439 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-08 14:26:56,439 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 14:26:56,443 INFO L229 MonitoredProcess]: Starting monitored process 20 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-08 14:26:56,445 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Waiting until timeout for monitored process [2025-02-08 14:26:56,488 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 28 statements into 6 equivalence classes. [2025-02-08 14:26:56,521 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) and asserted 28 of 28 statements. [2025-02-08 14:26:56,522 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 6 check-sat command(s) [2025-02-08 14:26:56,522 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:26:56,523 INFO L256 TraceCheckSpWp]: Trace formula consists of 157 conjuncts, 30 conjuncts are in the unsatisfiable core [2025-02-08 14:26:56,525 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-08 14:26:56,548 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2025-02-08 14:26:56,593 INFO L349 Elim1Store]: treesize reduction 27, result has 25.0 percent of original size [2025-02-08 14:26:56,594 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 15 [2025-02-08 14:26:56,609 INFO L349 Elim1Store]: treesize reduction 27, result has 25.0 percent of original size [2025-02-08 14:26:56,610 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 15 [2025-02-08 14:26:56,701 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 9 [2025-02-08 14:26:56,703 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 0 proven. 47 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:56,704 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-08 14:26:56,909 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2025-02-08 14:26:56,912 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2025-02-08 14:26:56,930 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 0 proven. 47 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:56,930 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1861143387] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-08 14:26:56,930 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-08 14:26:56,930 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14] total 21 [2025-02-08 14:26:56,930 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1063740185] [2025-02-08 14:26:56,930 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-08 14:26:56,930 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-08 14:26:56,931 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:26:56,931 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 13 times [2025-02-08 14:26:56,931 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:26:56,931 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [667669437] [2025-02-08 14:26:56,931 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-02-08 14:26:56,931 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:26:56,933 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-08 14:26:56,934 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-08 14:26:56,935 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:56,935 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:56,935 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:26:56,935 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-08 14:26:56,937 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-08 14:26:56,937 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:56,937 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:56,938 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:26:56,985 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:26:56,985 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2025-02-08 14:26:56,986 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=400, Unknown=0, NotChecked=0, Total=462 [2025-02-08 14:26:56,986 INFO L87 Difference]: Start difference. First operand 36 states and 46 transitions. cyclomatic complexity: 14 Second operand has 22 states, 21 states have (on average 2.0476190476190474) internal successors, (43), 22 states have internal predecessors, (43), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:26:57,246 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:26:57,247 INFO L93 Difference]: Finished difference Result 44 states and 54 transitions. [2025-02-08 14:26:57,247 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 44 states and 54 transitions. [2025-02-08 14:26:57,247 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-08 14:26:57,248 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 44 states to 43 states and 53 transitions. [2025-02-08 14:26:57,248 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2025-02-08 14:26:57,248 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2025-02-08 14:26:57,248 INFO L73 IsDeterministic]: Start isDeterministic. Operand 43 states and 53 transitions. [2025-02-08 14:26:57,248 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-08 14:26:57,248 INFO L218 hiAutomatonCegarLoop]: Abstraction has 43 states and 53 transitions. [2025-02-08 14:26:57,248 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states and 53 transitions. [2025-02-08 14:26:57,249 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 32. [2025-02-08 14:26:57,250 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 32 states, 32 states have (on average 1.25) internal successors, (40), 31 states have internal predecessors, (40), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:26:57,250 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 40 transitions. [2025-02-08 14:26:57,250 INFO L240 hiAutomatonCegarLoop]: Abstraction has 32 states and 40 transitions. [2025-02-08 14:26:57,251 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2025-02-08 14:26:57,252 INFO L432 stractBuchiCegarLoop]: Abstraction has 32 states and 40 transitions. [2025-02-08 14:26:57,252 INFO L338 stractBuchiCegarLoop]: ======== Iteration 16 ============ [2025-02-08 14:26:57,252 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 32 states and 40 transitions. [2025-02-08 14:26:57,253 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-08 14:26:57,253 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:26:57,253 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:26:57,253 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [5, 5, 5, 5, 4, 1, 1, 1, 1, 1, 1] [2025-02-08 14:26:57,254 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-08 14:26:57,255 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1;" [2025-02-08 14:26:57,255 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" [2025-02-08 14:26:57,256 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:26:57,256 INFO L85 PathProgramCache]: Analyzing trace with hash -1622443980, now seen corresponding path program 7 times [2025-02-08 14:26:57,256 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:26:57,256 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [239662263] [2025-02-08 14:26:57,256 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-02-08 14:26:57,256 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:26:57,262 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-02-08 14:26:57,292 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-02-08 14:26:57,294 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:57,294 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:26:57,717 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:57,717 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:26:57,717 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [239662263] [2025-02-08 14:26:57,717 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [239662263] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-08 14:26:57,717 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [60319833] [2025-02-08 14:26:57,717 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-02-08 14:26:57,717 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-08 14:26:57,717 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 14:26:57,721 INFO L229 MonitoredProcess]: Starting monitored process 21 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-08 14:26:57,722 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Waiting until timeout for monitored process [2025-02-08 14:26:57,776 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 30 statements into 1 equivalence classes. [2025-02-08 14:26:57,799 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 30 of 30 statements. [2025-02-08 14:26:57,800 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:57,800 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:26:57,801 INFO L256 TraceCheckSpWp]: Trace formula consists of 162 conjuncts, 29 conjuncts are in the unsatisfiable core [2025-02-08 14:26:57,802 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-08 14:26:57,854 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2025-02-08 14:26:58,012 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 9 [2025-02-08 14:26:58,028 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:58,028 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-08 14:26:58,160 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 18 [2025-02-08 14:26:58,166 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2025-02-08 14:26:58,184 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:58,184 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [60319833] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-08 14:26:58,185 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-08 14:26:58,185 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 14, 14] total 22 [2025-02-08 14:26:58,185 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1431530478] [2025-02-08 14:26:58,185 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-08 14:26:58,185 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-08 14:26:58,185 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:26:58,185 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 14 times [2025-02-08 14:26:58,185 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:26:58,185 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [357112765] [2025-02-08 14:26:58,186 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-08 14:26:58,186 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:26:58,188 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-08 14:26:58,189 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-08 14:26:58,189 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-08 14:26:58,189 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:58,189 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:26:58,190 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-08 14:26:58,191 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-08 14:26:58,191 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:58,191 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:58,192 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:26:58,234 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:26:58,234 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2025-02-08 14:26:58,235 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=64, Invalid=442, Unknown=0, NotChecked=0, Total=506 [2025-02-08 14:26:58,235 INFO L87 Difference]: Start difference. First operand 32 states and 40 transitions. cyclomatic complexity: 11 Second operand has 23 states, 22 states have (on average 2.090909090909091) internal successors, (46), 23 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:26:58,525 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:26:58,525 INFO L93 Difference]: Finished difference Result 53 states and 66 transitions. [2025-02-08 14:26:58,525 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 53 states and 66 transitions. [2025-02-08 14:26:58,526 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 4 [2025-02-08 14:26:58,526 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 53 states to 52 states and 65 transitions. [2025-02-08 14:26:58,527 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 13 [2025-02-08 14:26:58,527 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 13 [2025-02-08 14:26:58,527 INFO L73 IsDeterministic]: Start isDeterministic. Operand 52 states and 65 transitions. [2025-02-08 14:26:58,527 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-08 14:26:58,527 INFO L218 hiAutomatonCegarLoop]: Abstraction has 52 states and 65 transitions. [2025-02-08 14:26:58,527 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states and 65 transitions. [2025-02-08 14:26:58,528 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 39. [2025-02-08 14:26:58,529 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 39 states, 39 states have (on average 1.2820512820512822) internal successors, (50), 38 states have internal predecessors, (50), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:26:58,529 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 50 transitions. [2025-02-08 14:26:58,529 INFO L240 hiAutomatonCegarLoop]: Abstraction has 39 states and 50 transitions. [2025-02-08 14:26:58,530 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2025-02-08 14:26:58,530 INFO L432 stractBuchiCegarLoop]: Abstraction has 39 states and 50 transitions. [2025-02-08 14:26:58,530 INFO L338 stractBuchiCegarLoop]: ======== Iteration 17 ============ [2025-02-08 14:26:58,530 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 39 states and 50 transitions. [2025-02-08 14:26:58,531 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-08 14:26:58,531 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:26:58,531 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:26:58,531 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1] [2025-02-08 14:26:58,532 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-08 14:26:58,532 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1;" [2025-02-08 14:26:58,532 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" [2025-02-08 14:26:58,532 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:26:58,532 INFO L85 PathProgramCache]: Analyzing trace with hash -95537102, now seen corresponding path program 8 times [2025-02-08 14:26:58,532 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:26:58,533 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1777917149] [2025-02-08 14:26:58,533 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-08 14:26:58,533 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:26:58,539 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 32 statements into 2 equivalence classes. [2025-02-08 14:26:58,546 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 32 of 32 statements. [2025-02-08 14:26:58,547 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-02-08 14:26:58,547 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:26:58,707 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 21 proven. 44 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:58,708 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:26:58,708 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1777917149] [2025-02-08 14:26:58,708 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1777917149] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-08 14:26:58,708 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [761126423] [2025-02-08 14:26:58,708 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-08 14:26:58,708 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-08 14:26:58,708 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 14:26:58,712 INFO L229 MonitoredProcess]: Starting monitored process 22 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-08 14:26:58,714 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Waiting until timeout for monitored process [2025-02-08 14:26:58,766 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 32 statements into 2 equivalence classes. [2025-02-08 14:26:58,787 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) and asserted 32 of 32 statements. [2025-02-08 14:26:58,787 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 2 check-sat command(s) [2025-02-08 14:26:58,787 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:26:58,789 INFO L256 TraceCheckSpWp]: Trace formula consists of 174 conjuncts, 14 conjuncts are in the unsatisfiable core [2025-02-08 14:26:58,790 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-08 14:26:58,933 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 30 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:58,934 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-08 14:26:59,049 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 30 proven. 35 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:59,049 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [761126423] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-08 14:26:59,049 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-08 14:26:59,050 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14] total 22 [2025-02-08 14:26:59,050 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1238142177] [2025-02-08 14:26:59,050 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-08 14:26:59,050 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-08 14:26:59,050 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:26:59,050 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 15 times [2025-02-08 14:26:59,050 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:26:59,051 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [170020521] [2025-02-08 14:26:59,051 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-08 14:26:59,051 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:26:59,053 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 2 statements into 1 equivalence classes. [2025-02-08 14:26:59,054 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-08 14:26:59,054 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-08 14:26:59,054 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:59,054 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:26:59,055 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-08 14:26:59,056 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-08 14:26:59,056 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:26:59,056 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:26:59,057 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:26:59,115 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:26:59,116 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2025-02-08 14:26:59,116 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=115, Invalid=347, Unknown=0, NotChecked=0, Total=462 [2025-02-08 14:26:59,116 INFO L87 Difference]: Start difference. First operand 39 states and 50 transitions. cyclomatic complexity: 15 Second operand has 22 states, 22 states have (on average 2.3181818181818183) internal successors, (51), 22 states have internal predecessors, (51), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:26:59,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:26:59,231 INFO L93 Difference]: Finished difference Result 55 states and 67 transitions. [2025-02-08 14:26:59,231 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 55 states and 67 transitions. [2025-02-08 14:26:59,232 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-08 14:26:59,232 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 55 states to 44 states and 56 transitions. [2025-02-08 14:26:59,232 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2025-02-08 14:26:59,232 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2025-02-08 14:26:59,232 INFO L73 IsDeterministic]: Start isDeterministic. Operand 44 states and 56 transitions. [2025-02-08 14:26:59,233 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-08 14:26:59,233 INFO L218 hiAutomatonCegarLoop]: Abstraction has 44 states and 56 transitions. [2025-02-08 14:26:59,233 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states and 56 transitions. [2025-02-08 14:26:59,234 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 41. [2025-02-08 14:26:59,234 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 41 states, 41 states have (on average 1.2682926829268293) internal successors, (52), 40 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:26:59,234 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 52 transitions. [2025-02-08 14:26:59,234 INFO L240 hiAutomatonCegarLoop]: Abstraction has 41 states and 52 transitions. [2025-02-08 14:26:59,237 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2025-02-08 14:26:59,237 INFO L432 stractBuchiCegarLoop]: Abstraction has 41 states and 52 transitions. [2025-02-08 14:26:59,237 INFO L338 stractBuchiCegarLoop]: ======== Iteration 18 ============ [2025-02-08 14:26:59,237 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 41 states and 52 transitions. [2025-02-08 14:26:59,238 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-08 14:26:59,238 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:26:59,238 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:26:59,238 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 5, 5, 4, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:26:59,238 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-08 14:26:59,239 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume 0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2);havoc main_#t~mem208#1;call write~int#0(0, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1;" [2025-02-08 14:26:59,239 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" [2025-02-08 14:26:59,239 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:26:59,239 INFO L85 PathProgramCache]: Analyzing trace with hash 2138217310, now seen corresponding path program 4 times [2025-02-08 14:26:59,239 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:26:59,239 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [532163064] [2025-02-08 14:26:59,240 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-08 14:26:59,240 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:26:59,247 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 33 statements into 2 equivalence classes. [2025-02-08 14:26:59,273 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) and asserted 32 of 33 statements. [2025-02-08 14:26:59,273 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) [2025-02-08 14:26:59,274 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:26:59,794 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 71 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:26:59,795 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:26:59,795 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [532163064] [2025-02-08 14:26:59,796 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [532163064] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-08 14:26:59,796 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1699652016] [2025-02-08 14:26:59,796 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-08 14:26:59,796 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-08 14:26:59,796 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 14:26:59,799 INFO L229 MonitoredProcess]: Starting monitored process 23 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-08 14:26:59,801 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Waiting until timeout for monitored process [2025-02-08 14:26:59,854 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 33 statements into 2 equivalence classes. [2025-02-08 14:26:59,876 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) and asserted 32 of 33 statements. [2025-02-08 14:26:59,877 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 1 check-sat command(s) [2025-02-08 14:26:59,877 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:26:59,884 INFO L256 TraceCheckSpWp]: Trace formula consists of 168 conjuncts, 34 conjuncts are in the unsatisfiable core [2025-02-08 14:26:59,886 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-08 14:26:59,913 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 1 [2025-02-08 14:26:59,985 INFO L349 Elim1Store]: treesize reduction 27, result has 25.0 percent of original size [2025-02-08 14:26:59,985 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 15 [2025-02-08 14:27:00,003 INFO L349 Elim1Store]: treesize reduction 27, result has 25.0 percent of original size [2025-02-08 14:27:00,003 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 35 treesize of output 15 [2025-02-08 14:27:00,133 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 9 [2025-02-08 14:27:00,149 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 71 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:27:00,150 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-08 14:27:00,391 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 20 [2025-02-08 14:27:00,396 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 14 [2025-02-08 14:27:00,417 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 71 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:27:00,417 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1699652016] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-08 14:27:00,417 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-08 14:27:00,417 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16] total 25 [2025-02-08 14:27:00,418 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2092885105] [2025-02-08 14:27:00,418 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-08 14:27:00,418 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-08 14:27:00,418 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:27:00,418 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 16 times [2025-02-08 14:27:00,418 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:27:00,418 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1827510647] [2025-02-08 14:27:00,418 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-08 14:27:00,418 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:27:00,420 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 2 statements into 2 equivalence classes. [2025-02-08 14:27:00,423 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 2 of 2 statements. [2025-02-08 14:27:00,424 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-08 14:27:00,424 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:27:00,424 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:27:00,425 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-08 14:27:00,426 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-08 14:27:00,426 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:27:00,426 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:27:00,428 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:27:00,473 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:27:00,474 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2025-02-08 14:27:00,474 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=74, Invalid=576, Unknown=0, NotChecked=0, Total=650 [2025-02-08 14:27:00,474 INFO L87 Difference]: Start difference. First operand 41 states and 52 transitions. cyclomatic complexity: 15 Second operand has 26 states, 25 states have (on average 2.08) internal successors, (52), 26 states have internal predecessors, (52), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:27:00,735 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:27:00,736 INFO L93 Difference]: Finished difference Result 51 states and 62 transitions. [2025-02-08 14:27:00,736 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 51 states and 62 transitions. [2025-02-08 14:27:00,736 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-08 14:27:00,737 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 51 states to 50 states and 61 transitions. [2025-02-08 14:27:00,737 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 10 [2025-02-08 14:27:00,737 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 10 [2025-02-08 14:27:00,737 INFO L73 IsDeterministic]: Start isDeterministic. Operand 50 states and 61 transitions. [2025-02-08 14:27:00,737 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is not deterministic. [2025-02-08 14:27:00,737 INFO L218 hiAutomatonCegarLoop]: Abstraction has 50 states and 61 transitions. [2025-02-08 14:27:00,737 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states and 61 transitions. [2025-02-08 14:27:00,738 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 37. [2025-02-08 14:27:00,738 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 37 states, 37 states have (on average 1.2432432432432432) internal successors, (46), 36 states have internal predecessors, (46), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:27:00,739 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 46 transitions. [2025-02-08 14:27:00,739 INFO L240 hiAutomatonCegarLoop]: Abstraction has 37 states and 46 transitions. [2025-02-08 14:27:00,742 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2025-02-08 14:27:00,742 INFO L432 stractBuchiCegarLoop]: Abstraction has 37 states and 46 transitions. [2025-02-08 14:27:00,742 INFO L338 stractBuchiCegarLoop]: ======== Iteration 19 ============ [2025-02-08 14:27:00,742 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 37 states and 46 transitions. [2025-02-08 14:27:00,743 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 2 [2025-02-08 14:27:00,743 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:27:00,743 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:27:00,743 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [6, 6, 6, 6, 5, 1, 1, 1, 1, 1, 1] [2025-02-08 14:27:00,743 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1] [2025-02-08 14:27:00,744 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet205#1, main_#t~malloc206#1.base, main_#t~malloc206#1.offset, main_#t~nondet207#1, main_#t~mem208#1, main_#t~post209#1, main_#t~mem210#1, main_#t~post211#1, main_#t~post212#1, main_~i~0#1, main_~j~0#1, main_~length~0#1, main_~arr~0#1.base, main_~arr~0#1.offset;havoc main_~i~0#1;havoc main_~j~0#1;havoc main_#t~nondet205#1;main_~length~0#1 := main_#t~nondet205#1;havoc main_#t~nondet205#1;" "assume !(main_~length~0#1 < 1);" "call main_#t~malloc206#1.base, main_#t~malloc206#1.offset := #Ultimate.allocOnStack(4 * main_~length~0#1 % 18446744073709551616);main_~arr~0#1.base, main_~arr~0#1.offset := main_#t~malloc206#1.base, main_#t~malloc206#1.offset;" "assume !(main_~arr~0#1.base == 0 && main_~arr~0#1.offset == 0);main_~i~0#1 := 0;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume main_~i~0#1 < main_~length~0#1;havoc main_#t~nondet207#1;call write~int#0(main_#t~nondet207#1, main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);havoc main_#t~nondet207#1;call main_#t~mem208#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~i~0#1, 4);" "assume !(0 != (if main_#t~mem208#1 < 0 && 0 != main_#t~mem208#1 % 2 then main_#t~mem208#1 % 2 - 2 else main_#t~mem208#1 % 2));havoc main_#t~mem208#1;" "main_#t~post209#1 := main_~i~0#1;main_~i~0#1 := 1 + main_#t~post209#1;havoc main_#t~post209#1;" "assume !(main_~i~0#1 < main_~length~0#1);main_~j~0#1 := 0;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume !(0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2));havoc main_#t~mem210#1;main_#t~post212#1 := main_~j~0#1;main_~j~0#1 := main_#t~post212#1 - 1;havoc main_#t~post212#1;" [2025-02-08 14:27:00,744 INFO L754 eck$LassoCheckResult]: Loop: "assume 0 <= main_~j~0#1 && main_~j~0#1 < main_~length~0#1;call main_#t~mem210#1 := read~int#0(main_~arr~0#1.base, main_~arr~0#1.offset + 4 * main_~j~0#1, 4);" "assume 0 == (if main_#t~mem210#1 < 0 && 0 != main_#t~mem210#1 % 2 then main_#t~mem210#1 % 2 - 2 else main_#t~mem210#1 % 2);havoc main_#t~mem210#1;main_#t~post211#1 := main_~j~0#1;main_~j~0#1 := 1 + main_#t~post211#1;havoc main_#t~post211#1;" [2025-02-08 14:27:00,747 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:27:00,747 INFO L85 PathProgramCache]: Analyzing trace with hash -954948835, now seen corresponding path program 9 times [2025-02-08 14:27:00,747 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:27:00,747 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [426397291] [2025-02-08 14:27:00,747 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-08 14:27:00,747 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:27:00,754 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 35 statements into 7 equivalence classes. [2025-02-08 14:27:00,793 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) and asserted 35 of 35 statements. [2025-02-08 14:27:00,793 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2025-02-08 14:27:00,793 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:27:01,369 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 12 proven. 69 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:27:01,369 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:27:01,369 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [426397291] [2025-02-08 14:27:01,369 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [426397291] provided 0 perfect and 1 imperfect interpolant sequences [2025-02-08 14:27:01,369 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleZ3 [1949155041] [2025-02-08 14:27:01,369 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-08 14:27:01,370 INFO L173 SolverBuilder]: Constructing external solver with command: z3 -smt2 -in SMTLIB2_COMPLIANT=true [2025-02-08 14:27:01,370 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 14:27:01,373 INFO L229 MonitoredProcess]: Starting monitored process 24 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (exit command is (exit), workingDir is null) [2025-02-08 14:27:01,375 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Waiting until timeout for monitored process [2025-02-08 14:27:01,430 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 35 statements into 7 equivalence classes. [2025-02-08 14:27:01,470 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) and asserted 35 of 35 statements. [2025-02-08 14:27:01,470 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 7 check-sat command(s) [2025-02-08 14:27:01,470 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:27:01,475 INFO L256 TraceCheckSpWp]: Trace formula consists of 189 conjuncts, 24 conjuncts are in the unsatisfiable core [2025-02-08 14:27:01,476 INFO L279 TraceCheckSpWp]: Computing forward predicates... [2025-02-08 14:27:01,518 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 1 [2025-02-08 14:27:01,862 INFO L349 Elim1Store]: treesize reduction 5, result has 37.5 percent of original size [2025-02-08 14:27:01,862 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 25 treesize of output 12 [2025-02-08 14:27:01,878 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 25 proven. 56 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:27:01,878 INFO L312 TraceCheckSpWp]: Computing backward predicates... [2025-02-08 14:27:02,348 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 20 [2025-02-08 14:27:02,352 INFO L378 Elim1Store]: Elim1 eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 14 [2025-02-08 14:27:02,416 INFO L134 CoverageAnalysis]: Checked inductivity of 81 backedges. 20 proven. 61 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:27:02,416 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleZ3 [1949155041] provided 0 perfect and 2 imperfect interpolant sequences [2025-02-08 14:27:02,416 INFO L185 FreeRefinementEngine]: Found 0 perfect and 3 imperfect interpolant sequences. [2025-02-08 14:27:02,416 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17] total 33 [2025-02-08 14:27:02,416 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1599081931] [2025-02-08 14:27:02,416 INFO L85 oduleStraightlineAll]: Using 3 imperfect interpolants to construct interpolant automaton [2025-02-08 14:27:02,416 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-08 14:27:02,417 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:27:02,417 INFO L85 PathProgramCache]: Analyzing trace with hash 1151, now seen corresponding path program 17 times [2025-02-08 14:27:02,417 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:27:02,417 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1184066166] [2025-02-08 14:27:02,417 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-08 14:27:02,417 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:27:02,420 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 2 statements into 1 equivalence classes. [2025-02-08 14:27:02,421 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-08 14:27:02,421 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-08 14:27:02,421 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:27:02,421 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:27:02,422 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 2 statements into 1 equivalence classes. [2025-02-08 14:27:02,423 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 2 of 2 statements. [2025-02-08 14:27:02,423 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:27:02,423 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:27:02,424 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:27:02,472 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:27:02,473 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2025-02-08 14:27:02,473 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=208, Invalid=914, Unknown=0, NotChecked=0, Total=1122 [2025-02-08 14:27:02,473 INFO L87 Difference]: Start difference. First operand 37 states and 46 transitions. cyclomatic complexity: 12 Second operand has 34 states, 33 states have (on average 2.0) internal successors, (66), 34 states have internal predecessors, (66), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:27:04,376 WARN L539 Checker$ProtectedHtc]: IncrementalHoareTripleChecker took 1.31s for a HTC check with result INVALID. Formula has sorts [Array, Bool, Int], hasArrays=true, hasNonlinArith=false, quantifiers [0, 1] [2025-02-08 14:27:04,643 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:27:04,643 INFO L93 Difference]: Finished difference Result 55 states and 65 transitions. [2025-02-08 14:27:04,643 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 55 states and 65 transitions. [2025-02-08 14:27:04,643 INFO L131 ngComponentsAnalysis]: Automaton has 0 accepting balls. 0 [2025-02-08 14:27:04,644 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 55 states to 0 states and 0 transitions. [2025-02-08 14:27:04,644 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 0 [2025-02-08 14:27:04,644 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 0 [2025-02-08 14:27:04,644 INFO L73 IsDeterministic]: Start isDeterministic. Operand 0 states and 0 transitions. [2025-02-08 14:27:04,644 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:27:04,644 INFO L218 hiAutomatonCegarLoop]: Abstraction has 0 states and 0 transitions. [2025-02-08 14:27:04,644 INFO L240 hiAutomatonCegarLoop]: Abstraction has 0 states and 0 transitions. [2025-02-08 14:27:04,644 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2025-02-08 14:27:04,645 INFO L432 stractBuchiCegarLoop]: Abstraction has 0 states and 0 transitions. [2025-02-08 14:27:04,645 INFO L338 stractBuchiCegarLoop]: ======== Iteration 20 ============ [2025-02-08 14:27:04,645 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 0 states and 0 transitions. [2025-02-08 14:27:04,645 INFO L131 ngComponentsAnalysis]: Automaton has 0 accepting balls. 0 [2025-02-08 14:27:04,645 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is true [2025-02-08 14:27:04,652 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 08.02 02:27:04 BoogieIcfgContainer [2025-02-08 14:27:04,652 INFO L131 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2025-02-08 14:27:04,653 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-02-08 14:27:04,653 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-02-08 14:27:04,653 INFO L274 PluginConnector]: Witness Printer initialized [2025-02-08 14:27:04,654 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 08.02 02:26:43" (3/4) ... [2025-02-08 14:27:04,656 INFO L149 WitnessPrinter]: No result that supports witness generation found [2025-02-08 14:27:04,657 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-02-08 14:27:04,658 INFO L158 Benchmark]: Toolchain (without parser) took 22181.72ms. Allocated memory was 142.6MB in the beginning and 327.2MB in the end (delta: 184.5MB). Free memory was 111.9MB in the beginning and 145.9MB in the end (delta: -34.1MB). Peak memory consumption was 147.9MB. Max. memory is 16.1GB. [2025-02-08 14:27:04,659 INFO L158 Benchmark]: CDTParser took 0.34ms. Allocated memory is still 201.3MB. Free memory was 124.3MB in the beginning and 124.0MB in the end (delta: 293.6kB). There was no memory consumed. Max. memory is 16.1GB. [2025-02-08 14:27:04,659 INFO L158 Benchmark]: CACSL2BoogieTranslator took 325.39ms. Allocated memory is still 142.6MB. Free memory was 111.9MB in the beginning and 93.8MB in the end (delta: 18.1MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-02-08 14:27:04,659 INFO L158 Benchmark]: Boogie Procedure Inliner took 34.40ms. Allocated memory is still 142.6MB. Free memory was 93.3MB in the beginning and 92.0MB in the end (delta: 1.3MB). There was no memory consumed. Max. memory is 16.1GB. [2025-02-08 14:27:04,659 INFO L158 Benchmark]: Boogie Preprocessor took 28.25ms. Allocated memory is still 142.6MB. Free memory was 92.0MB in the beginning and 91.1MB in the end (delta: 949.9kB). There was no memory consumed. Max. memory is 16.1GB. [2025-02-08 14:27:04,660 INFO L158 Benchmark]: IcfgBuilder took 241.23ms. Allocated memory is still 142.6MB. Free memory was 90.6MB in the beginning and 78.8MB in the end (delta: 11.8MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-02-08 14:27:04,660 INFO L158 Benchmark]: BuchiAutomizer took 21542.92ms. Allocated memory was 142.6MB in the beginning and 327.2MB in the end (delta: 184.5MB). Free memory was 78.8MB in the beginning and 146.0MB in the end (delta: -67.2MB). Peak memory consumption was 114.4MB. Max. memory is 16.1GB. [2025-02-08 14:27:04,660 INFO L158 Benchmark]: Witness Printer took 3.98ms. Allocated memory is still 327.2MB. Free memory was 146.0MB in the beginning and 145.9MB in the end (delta: 51.1kB). There was no memory consumed. Max. memory is 16.1GB. [2025-02-08 14:27:04,662 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.34ms. Allocated memory is still 201.3MB. Free memory was 124.3MB in the beginning and 124.0MB in the end (delta: 293.6kB). There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 325.39ms. Allocated memory is still 142.6MB. Free memory was 111.9MB in the beginning and 93.8MB in the end (delta: 18.1MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 34.40ms. Allocated memory is still 142.6MB. Free memory was 93.3MB in the beginning and 92.0MB in the end (delta: 1.3MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 28.25ms. Allocated memory is still 142.6MB. Free memory was 92.0MB in the beginning and 91.1MB in the end (delta: 949.9kB). There was no memory consumed. Max. memory is 16.1GB. * IcfgBuilder took 241.23ms. Allocated memory is still 142.6MB. Free memory was 90.6MB in the beginning and 78.8MB in the end (delta: 11.8MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * BuchiAutomizer took 21542.92ms. Allocated memory was 142.6MB in the beginning and 327.2MB in the end (delta: 184.5MB). Free memory was 78.8MB in the beginning and 146.0MB in the end (delta: -67.2MB). Peak memory consumption was 114.4MB. Max. memory is 16.1GB. * Witness Printer took 3.98ms. Allocated memory is still 327.2MB. Free memory was 146.0MB in the beginning and 145.9MB in the end (delta: 51.1kB). There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Unknown variable: #length - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Cannot backtranslate array access to array IdentifierExpression[#length,GLOBAL] - GenericResult: Unfinished Backtranslation Unfinished Backtranslation: Unknown variable: ~arr~0!offset * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 19 terminating modules (17 trivial, 2 deterministic, 0 nondeterministic). One deterministic module has affine ranking function null and consists of 3 locations. One deterministic module has affine ranking function (((long) -1 * j) + length) and consists of 3 locations. 17 modules have a trivial ranking function, the largest among these consists of 34 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 21.4s and 20 iterations. TraceHistogramMax:6. Analysis of lassos took 15.6s. Construction of modules took 3.4s. Büchi inclusion checks took 2.2s. Highest rank in rank-based complementation 3. Minimization of det autom 3. Minimization of nondet autom 16. Automata minimization 0.0s AutomataMinimizationTime, 18 MinimizatonAttempts, 118 StatesRemovedByMinimization, 16 NontrivialMinimizations. Non-live state removal took 0.0s Buchi closure took 0.0s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [2, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 532 SdHoareTripleChecker+Valid, 3.9s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 530 mSDsluCounter, 770 SdHoareTripleChecker+Invalid, 3.5s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 631 mSDsCounter, 196 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 3749 IncrementalHoareTripleChecker+Invalid, 3945 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 196 mSolverCounterUnsat, 139 mSDtfsCounter, 3749 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont0 unkn0 SFLI0 SFLT0 conc0 concLT0 SILN0 SILU17 SILI0 SILT0 lasso2 LassoPreprocessingBenchmarks: Lassos: inital105 mio100 ax100 hnf100 lsp100 ukn82 mio100 lsp56 div180 bol100 ite100 ukn100 eq150 hnf94 smp64 dnf100 smp100 tf100 neg100 sie100 LassoTerminationAnalysisBenchmarks: ConstraintsSatisfiability: unsat Degree: 0 Time: 24ms VariablesStem: 2 VariablesLoop: 0 DisjunctsStem: 1 DisjunctsLoop: 1 SupportingInvariants: 2 MotzkinApplications: 6 LassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Termination proven Buchi Automizer proved that your program is terminating RESULT: Ultimate proved your program to be correct! [2025-02-08 14:27:04,678 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (24)] Ended with exit code 0 [2025-02-08 14:27:04,878 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (23)] Ended with exit code 0 [2025-02-08 14:27:05,078 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (22)] Ended with exit code 0 [2025-02-08 14:27:05,279 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (21)] Ended with exit code 0 [2025-02-08 14:27:05,479 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (20)] Ended with exit code 0 [2025-02-08 14:27:05,679 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (19)] Ended with exit code 0 [2025-02-08 14:27:05,880 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (18)] Ended with exit code 0 [2025-02-08 14:27:06,080 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (17)] Ended with exit code 0 [2025-02-08 14:27:06,279 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (16)] Ended with exit code 0 [2025-02-08 14:27:06,480 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (15)] Ended with exit code 0 [2025-02-08 14:27:06,680 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (14)] Ended with exit code 0 [2025-02-08 14:27:06,880 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (13)] Forceful destruction successful, exit code 0 [2025-02-08 14:27:07,081 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (12)] Ended with exit code 0 [2025-02-08 14:27:07,281 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (11)] Forceful destruction successful, exit code 0 [2025-02-08 14:27:07,481 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (10)] Forceful destruction successful, exit code 0 [2025-02-08 14:27:07,682 INFO L540 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 -smt2 -in SMTLIB2_COMPLIANT=true (9)] Forceful destruction successful, exit code 0 [2025-02-08 14:27:07,886 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Result: TRUE