./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/ldv-consumption/linux-3.8-rc1-32_7a-drivers--media--common--saa7146--saa7146.ko-ldv_main0.cil.out.i --full-output --architecture 64bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 48c9605d Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/ldv-consumption/linux-3.8-rc1-32_7a-drivers--media--common--saa7146--saa7146.ko-ldv_main0.cil.out.i -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 64bit --witnessprinter.graph.data.programhash 9a4c86b005d25b7b47a4f0d39ab40dcf944046f8128f9f9f64f6ee97f46493f6 --- Real Ultimate output --- This is Ultimate 0.3.0-?-48c9605-m [2025-02-08 15:23:53,337 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-02-08 15:23:53,414 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-64bit-Automizer_Default.epf [2025-02-08 15:23:53,420 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-02-08 15:23:53,421 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-02-08 15:23:53,421 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-02-08 15:23:53,453 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-02-08 15:23:53,454 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-02-08 15:23:53,454 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-02-08 15:23:53,455 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-02-08 15:23:53,456 INFO L153 SettingsManager]: * Use memory slicer=true [2025-02-08 15:23:53,456 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-02-08 15:23:53,456 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-02-08 15:23:53,456 INFO L153 SettingsManager]: * Use SBE=true [2025-02-08 15:23:53,457 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-02-08 15:23:53,457 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-02-08 15:23:53,457 INFO L153 SettingsManager]: * Use old map elimination=false [2025-02-08 15:23:53,457 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-02-08 15:23:53,458 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-02-08 15:23:53,458 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-02-08 15:23:53,458 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-02-08 15:23:53,458 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-02-08 15:23:53,458 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-02-08 15:23:53,458 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-02-08 15:23:53,458 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-02-08 15:23:53,458 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-02-08 15:23:53,459 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-02-08 15:23:53,459 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-02-08 15:23:53,459 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-02-08 15:23:53,459 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-02-08 15:23:53,459 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-02-08 15:23:53,459 INFO L153 SettingsManager]: * Use constant arrays=true [2025-02-08 15:23:53,459 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-02-08 15:23:53,459 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-02-08 15:23:53,459 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-02-08 15:23:53,459 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-02-08 15:23:53,460 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-02-08 15:23:53,460 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 64bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 9a4c86b005d25b7b47a4f0d39ab40dcf944046f8128f9f9f64f6ee97f46493f6 [2025-02-08 15:23:53,784 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-02-08 15:23:53,793 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-02-08 15:23:53,795 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-02-08 15:23:53,797 INFO L270 PluginConnector]: Initializing CDTParser... [2025-02-08 15:23:53,797 INFO L274 PluginConnector]: CDTParser initialized [2025-02-08 15:23:53,798 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/ldv-consumption/linux-3.8-rc1-32_7a-drivers--media--common--saa7146--saa7146.ko-ldv_main0.cil.out.i [2025-02-08 15:23:55,208 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/7094365dc/9cc1f7d51faf4271b053316e618c0079/FLAG8ff7722ae [2025-02-08 15:23:55,856 INFO L384 CDTParser]: Found 1 translation units. [2025-02-08 15:23:55,857 INFO L180 CDTParser]: Scanning /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/ldv-consumption/linux-3.8-rc1-32_7a-drivers--media--common--saa7146--saa7146.ko-ldv_main0.cil.out.i [2025-02-08 15:23:55,892 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/7094365dc/9cc1f7d51faf4271b053316e618c0079/FLAG8ff7722ae [2025-02-08 15:23:55,908 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/7094365dc/9cc1f7d51faf4271b053316e618c0079 [2025-02-08 15:23:55,910 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-02-08 15:23:55,911 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-02-08 15:23:55,913 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-02-08 15:23:55,913 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-02-08 15:23:55,916 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-02-08 15:23:55,917 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.02 03:23:55" (1/1) ... [2025-02-08 15:23:55,918 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@4448f301 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 03:23:55, skipping insertion in model container [2025-02-08 15:23:55,918 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.02 03:23:55" (1/1) ... [2025-02-08 15:23:56,003 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-02-08 15:23:57,435 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-08 15:23:57,447 INFO L200 MainTranslator]: Completed pre-run [2025-02-08 15:23:57,546 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ volatile ("bt %2,%1\n\tsbb %0,%0": "=r" (oldbit): "m" (*((unsigned long *)addr)), "Ir" (nr)); [4603-4604] [2025-02-08 15:23:57,548 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ ("movb %%gs:%P1,%0": "=q" (pfo_ret__): "p" (& current_task)); [4618] [2025-02-08 15:23:57,548 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ ("movw %%gs:%P1,%0": "=r" (pfo_ret__): "p" (& current_task)); [4621] [2025-02-08 15:23:57,548 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ ("movl %%gs:%P1,%0": "=r" (pfo_ret__): "p" (& current_task)); [4624] [2025-02-08 15:23:57,548 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ ("movq %%gs:%P1,%0": "=r" (pfo_ret__): "p" (& current_task)); [4627] [2025-02-08 15:23:57,551 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ volatile ("movl %1,%0": "=r" (ret): "m" (*((unsigned int volatile *)addr)): "memory"); [4694] [2025-02-08 15:23:57,552 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ volatile ("movl %0,%1": : "r" (val), "m" (*((unsigned int volatile *)addr)): "memory"); [4701] [2025-02-08 15:23:57,609 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.long 1b - 2b, %c0 - 2b\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"/work/ldvuser/exper_fp/inst/current/envs/linux-3.10-rc1.tar/linux-3.10-rc1/arch/x86/include/asm/paravirt.h"), "i" (824), "i" (12UL)); [5674-5675] [2025-02-08 15:23:57,610 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ volatile ("771:\n\tcall *%c2;\n772:\n.pushsection .parainstructions,\"a\"\n .balign 8 \n .quad 771b\n .byte %c1\n .byte 772b-771b\n .short %c3\n.popsection\n": "=a" (__eax): [paravirt_typenum] "i" (44UL), [paravirt_opptr] "i" (& pv_irq_ops.save_fl.func), [paravirt_clobber] "i" (1): "memory", "cc"); [5680-5682] [2025-02-08 15:23:57,620 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.long 1b - 2b, %c0 - 2b\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"include/linux/scatterlist.h"), "i" (65), "i" (12UL)); [5811-5812] [2025-02-08 15:23:57,620 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.long 1b - 2b, %c0 - 2b\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"include/linux/scatterlist.h"), "i" (67), "i" (12UL)); [5819-5820] [2025-02-08 15:23:57,620 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.long 1b - 2b, %c0 - 2b\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"include/linux/scatterlist.h"), "i" (68), "i" (12UL)); [5827-5828] [2025-02-08 15:23:57,621 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.long 1b - 2b, %c0 - 2b\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"include/linux/scatterlist.h"), "i" (98), "i" (12UL)); [5854-5855] [2025-02-08 15:23:57,621 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.long 1b - 2b, %c0 - 2b\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"include/linux/scatterlist.h"), "i" (99), "i" (12UL)); [5862-5863] [2025-02-08 15:23:57,629 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.long 1b - 2b, %c0 - 2b\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"include/asm-generic/dma-mapping-common.h"), "i" (52), "i" (12UL)); [5951-5952] [2025-02-08 15:23:57,630 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.long 1b - 2b, %c0 - 2b\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"include/asm-generic/dma-mapping-common.h"), "i" (65), "i" (12UL)); [5976-5977] [2025-02-08 15:23:57,636 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.long 1b - 2b, %c0 - 2b\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"/work/ldvuser/exper_fp/work/current--X--drivers--X--defaultlinux-3.10-rc1.tar--X--32_7a--X--cpachecker/linux-3.10-rc1.tar/csd_deg_dscv/2093/dscv_tempdir/dscv/ri/32_7a/drivers/media/common/saa7146/saa7146_core.c.prepared"), "i" (99), "i" (12UL)); [6174-6175] [2025-02-08 15:23:57,646 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.long 1b - 2b, %c0 - 2b\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"/work/ldvuser/exper_fp/work/current--X--drivers--X--defaultlinux-3.10-rc1.tar--X--32_7a--X--cpachecker/linux-3.10-rc1.tar/csd_deg_dscv/2093/dscv_tempdir/dscv/ri/32_7a/drivers/media/common/saa7146/saa7146_core.c.prepared"), "i" (210), "i" (12UL)); [6359-6360] [2025-02-08 15:23:57,652 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.long 1b - 2b, %c0 - 2b\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"/work/ldvuser/exper_fp/work/current--X--drivers--X--defaultlinux-3.10-rc1.tar--X--32_7a--X--cpachecker/linux-3.10-rc1.tar/csd_deg_dscv/2093/dscv_tempdir/dscv/ri/32_7a/drivers/media/common/saa7146/saa7146_core.c.prepared"), "i" (301), "i" (12UL)); [6490-6491] [2025-02-08 15:23:57,653 WARN L75 lationResultReporter]: Unsoundness Warning: Ignoring inline assembler instruction C: __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.long 1b - 2b, %c0 - 2b\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"/work/ldvuser/exper_fp/work/current--X--drivers--X--defaultlinux-3.10-rc1.tar--X--32_7a--X--cpachecker/linux-3.10-rc1.tar/csd_deg_dscv/2093/dscv_tempdir/dscv/ri/32_7a/drivers/media/common/saa7146/saa7146_core.c.prepared"), "i" (302), "i" (12UL)); [6498-6499] [2025-02-08 15:23:57,762 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-08 15:23:57,813 INFO L204 MainTranslator]: Completed translation [2025-02-08 15:23:57,814 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 03:23:57 WrapperNode [2025-02-08 15:23:57,814 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-02-08 15:23:57,815 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-02-08 15:23:57,816 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-02-08 15:23:57,816 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-02-08 15:23:57,822 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 03:23:57" (1/1) ... [2025-02-08 15:23:57,876 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 03:23:57" (1/1) ... [2025-02-08 15:23:57,972 INFO L138 Inliner]: procedures = 210, calls = 1450, calls flagged for inlining = 378, calls inlined = 237, statements flattened = 3779 [2025-02-08 15:23:57,972 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-02-08 15:23:57,973 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-02-08 15:23:57,973 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-02-08 15:23:57,973 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-02-08 15:23:57,981 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 03:23:57" (1/1) ... [2025-02-08 15:23:57,982 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 03:23:57" (1/1) ... [2025-02-08 15:23:58,004 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 03:23:57" (1/1) ... [2025-02-08 15:23:58,133 INFO L175 MemorySlicer]: Split 572 memory accesses to 22 slices as follows [2, 8, 8, 3, 1, 30, 102, 8, 8, 128, 189, 7, 8, 8, 8, 8, 2, 8, 8, 8, 8, 12]. 33 percent of accesses are in the largest equivalence class. The 229 initializations are split as follows [2, 8, 8, 3, 0, 0, 0, 8, 8, 128, 0, 0, 8, 8, 8, 8, 0, 8, 8, 8, 8, 0]. The 185 writes are split as follows [0, 0, 0, 0, 0, 10, 2, 0, 0, 0, 162, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 10]. [2025-02-08 15:23:58,133 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 03:23:57" (1/1) ... [2025-02-08 15:23:58,133 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 03:23:57" (1/1) ... [2025-02-08 15:23:58,216 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 03:23:57" (1/1) ... [2025-02-08 15:23:58,224 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 03:23:57" (1/1) ... [2025-02-08 15:23:58,245 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 03:23:57" (1/1) ... [2025-02-08 15:23:58,262 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 03:23:57" (1/1) ... [2025-02-08 15:23:58,292 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-02-08 15:23:58,294 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-02-08 15:23:58,294 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-02-08 15:23:58,294 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-02-08 15:23:58,295 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 03:23:57" (1/1) ... [2025-02-08 15:23:58,300 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-08 15:23:58,314 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 15:23:58,331 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-08 15:23:58,336 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-02-08 15:23:58,358 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#0 [2025-02-08 15:23:58,358 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#1 [2025-02-08 15:23:58,359 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#2 [2025-02-08 15:23:58,359 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#3 [2025-02-08 15:23:58,359 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#4 [2025-02-08 15:23:58,359 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#5 [2025-02-08 15:23:58,359 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#6 [2025-02-08 15:23:58,359 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#7 [2025-02-08 15:23:58,359 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#8 [2025-02-08 15:23:58,360 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#9 [2025-02-08 15:23:58,360 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#10 [2025-02-08 15:23:58,360 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#11 [2025-02-08 15:23:58,360 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#12 [2025-02-08 15:23:58,360 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#13 [2025-02-08 15:23:58,360 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#14 [2025-02-08 15:23:58,360 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#15 [2025-02-08 15:23:58,360 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#16 [2025-02-08 15:23:58,360 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#17 [2025-02-08 15:23:58,360 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#18 [2025-02-08 15:23:58,360 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#19 [2025-02-08 15:23:58,360 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#20 [2025-02-08 15:23:58,360 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset#21 [2025-02-08 15:23:58,360 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#0 [2025-02-08 15:23:58,360 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#1 [2025-02-08 15:23:58,360 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#2 [2025-02-08 15:23:58,360 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#3 [2025-02-08 15:23:58,360 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#4 [2025-02-08 15:23:58,361 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#5 [2025-02-08 15:23:58,361 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#6 [2025-02-08 15:23:58,361 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#7 [2025-02-08 15:23:58,361 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#8 [2025-02-08 15:23:58,361 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#9 [2025-02-08 15:23:58,361 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#10 [2025-02-08 15:23:58,361 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#11 [2025-02-08 15:23:58,361 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#12 [2025-02-08 15:23:58,361 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#13 [2025-02-08 15:23:58,361 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#14 [2025-02-08 15:23:58,361 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#15 [2025-02-08 15:23:58,361 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#16 [2025-02-08 15:23:58,361 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#17 [2025-02-08 15:23:58,361 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#18 [2025-02-08 15:23:58,361 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#19 [2025-02-08 15:23:58,361 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#20 [2025-02-08 15:23:58,361 INFO L138 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset#21 [2025-02-08 15:23:58,361 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnStack [2025-02-08 15:23:58,361 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#0 [2025-02-08 15:23:58,361 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#1 [2025-02-08 15:23:58,362 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#2 [2025-02-08 15:23:58,362 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#3 [2025-02-08 15:23:58,362 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#4 [2025-02-08 15:23:58,362 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#5 [2025-02-08 15:23:58,362 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#6 [2025-02-08 15:23:58,362 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#7 [2025-02-08 15:23:58,362 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#8 [2025-02-08 15:23:58,362 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#9 [2025-02-08 15:23:58,362 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#10 [2025-02-08 15:23:58,362 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#11 [2025-02-08 15:23:58,362 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#12 [2025-02-08 15:23:58,362 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#13 [2025-02-08 15:23:58,362 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#14 [2025-02-08 15:23:58,362 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#15 [2025-02-08 15:23:58,362 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#16 [2025-02-08 15:23:58,362 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#17 [2025-02-08 15:23:58,362 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#18 [2025-02-08 15:23:58,362 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#19 [2025-02-08 15:23:58,362 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#20 [2025-02-08 15:23:58,362 INFO L130 BoogieDeclarations]: Found specification of procedure read~$Pointer$#21 [2025-02-08 15:23:58,363 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2025-02-08 15:23:58,363 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$#0 [2025-02-08 15:23:58,363 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$#1 [2025-02-08 15:23:58,363 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$#2 [2025-02-08 15:23:58,363 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$#3 [2025-02-08 15:23:58,363 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$#4 [2025-02-08 15:23:58,363 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$#5 [2025-02-08 15:23:58,363 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$#6 [2025-02-08 15:23:58,363 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$#7 [2025-02-08 15:23:58,363 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$#8 [2025-02-08 15:23:58,363 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$#9 [2025-02-08 15:23:58,363 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$#10 [2025-02-08 15:23:58,363 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$#11 [2025-02-08 15:23:58,363 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$#12 [2025-02-08 15:23:58,363 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$#13 [2025-02-08 15:23:58,363 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$#14 [2025-02-08 15:23:58,364 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$#15 [2025-02-08 15:23:58,365 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$#16 [2025-02-08 15:23:58,365 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$#17 [2025-02-08 15:23:58,366 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$#18 [2025-02-08 15:23:58,366 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$#19 [2025-02-08 15:23:58,366 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$#20 [2025-02-08 15:23:58,366 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~$Pointer$#21 [2025-02-08 15:23:58,366 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#0 [2025-02-08 15:23:58,366 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#1 [2025-02-08 15:23:58,366 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#2 [2025-02-08 15:23:58,366 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#3 [2025-02-08 15:23:58,366 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#4 [2025-02-08 15:23:58,367 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#5 [2025-02-08 15:23:58,367 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#6 [2025-02-08 15:23:58,367 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#7 [2025-02-08 15:23:58,367 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#8 [2025-02-08 15:23:58,367 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#9 [2025-02-08 15:23:58,367 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#10 [2025-02-08 15:23:58,367 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#11 [2025-02-08 15:23:58,367 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#12 [2025-02-08 15:23:58,367 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#13 [2025-02-08 15:23:58,367 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#14 [2025-02-08 15:23:58,367 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#15 [2025-02-08 15:23:58,367 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#16 [2025-02-08 15:23:58,368 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#17 [2025-02-08 15:23:58,368 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#18 [2025-02-08 15:23:58,368 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#19 [2025-02-08 15:23:58,369 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#20 [2025-02-08 15:23:58,369 INFO L130 BoogieDeclarations]: Found specification of procedure read~int#21 [2025-02-08 15:23:58,369 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#0 [2025-02-08 15:23:58,369 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#1 [2025-02-08 15:23:58,369 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#2 [2025-02-08 15:23:58,369 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#3 [2025-02-08 15:23:58,369 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#4 [2025-02-08 15:23:58,369 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#5 [2025-02-08 15:23:58,369 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#6 [2025-02-08 15:23:58,369 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#7 [2025-02-08 15:23:58,369 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#8 [2025-02-08 15:23:58,369 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#9 [2025-02-08 15:23:58,370 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#10 [2025-02-08 15:23:58,370 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#11 [2025-02-08 15:23:58,370 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#12 [2025-02-08 15:23:58,370 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#13 [2025-02-08 15:23:58,370 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#14 [2025-02-08 15:23:58,370 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#15 [2025-02-08 15:23:58,370 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#16 [2025-02-08 15:23:58,370 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#17 [2025-02-08 15:23:58,370 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#18 [2025-02-08 15:23:58,370 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#19 [2025-02-08 15:23:58,370 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#20 [2025-02-08 15:23:58,371 INFO L130 BoogieDeclarations]: Found specification of procedure write~int#21 [2025-02-08 15:23:58,371 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocOnHeap [2025-02-08 15:23:58,371 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-02-08 15:23:58,371 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#0 [2025-02-08 15:23:58,371 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#1 [2025-02-08 15:23:58,371 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#2 [2025-02-08 15:23:58,371 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#3 [2025-02-08 15:23:58,371 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#4 [2025-02-08 15:23:58,373 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#5 [2025-02-08 15:23:58,373 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#6 [2025-02-08 15:23:58,373 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#7 [2025-02-08 15:23:58,373 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#8 [2025-02-08 15:23:58,373 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#9 [2025-02-08 15:23:58,373 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#10 [2025-02-08 15:23:58,373 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#11 [2025-02-08 15:23:58,373 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#12 [2025-02-08 15:23:58,373 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#13 [2025-02-08 15:23:58,373 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#14 [2025-02-08 15:23:58,373 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#15 [2025-02-08 15:23:58,373 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#16 [2025-02-08 15:23:58,373 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#17 [2025-02-08 15:23:58,373 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#18 [2025-02-08 15:23:58,373 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#19 [2025-02-08 15:23:58,373 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#20 [2025-02-08 15:23:58,373 INFO L130 BoogieDeclarations]: Found specification of procedure write~$Pointer$#21 [2025-02-08 15:23:58,373 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-02-08 15:23:58,373 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#1 [2025-02-08 15:23:58,373 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#2 [2025-02-08 15:23:58,373 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#3 [2025-02-08 15:23:58,373 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#4 [2025-02-08 15:23:58,373 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#5 [2025-02-08 15:23:58,373 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#6 [2025-02-08 15:23:58,373 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#7 [2025-02-08 15:23:58,374 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#8 [2025-02-08 15:23:58,374 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#9 [2025-02-08 15:23:58,374 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#10 [2025-02-08 15:23:58,374 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#11 [2025-02-08 15:23:58,374 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#12 [2025-02-08 15:23:58,374 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#13 [2025-02-08 15:23:58,374 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#14 [2025-02-08 15:23:58,374 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#15 [2025-02-08 15:23:58,374 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#16 [2025-02-08 15:23:58,374 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#17 [2025-02-08 15:23:58,374 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#18 [2025-02-08 15:23:58,374 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#19 [2025-02-08 15:23:58,374 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#20 [2025-02-08 15:23:58,374 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#21 [2025-02-08 15:23:58,374 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-02-08 15:23:58,374 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-02-08 15:23:58,849 INFO L257 CfgBuilder]: Building ICFG [2025-02-08 15:23:58,851 INFO L287 CfgBuilder]: Building CFG for each procedure with an implementation [2025-02-08 15:24:01,584 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5188-5: assume 0 != saa7146_i2c_writeout_#t~bitwise174#1 % 4294967296;havoc saa7146_i2c_writeout_#t~bitwise174#1;call write~$Pointer$#10(51, 0, saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset, 8);call write~$Pointer$#10(52, 0, saa7146_i2c_writeout_~#descriptor___3~0#1.base, 8 + saa7146_i2c_writeout_~#descriptor___3~0#1.offset, 8);call write~$Pointer$#10(53, 0, saa7146_i2c_writeout_~#descriptor___3~0#1.base, 16 + saa7146_i2c_writeout_~#descriptor___3~0#1.offset, 8);call write~$Pointer$#10(54, 0, saa7146_i2c_writeout_~#descriptor___3~0#1.base, 24 + saa7146_i2c_writeout_~#descriptor___3~0#1.offset, 8);call write~int#10(319, saa7146_i2c_writeout_~#descriptor___3~0#1.base, 32 + saa7146_i2c_writeout_~#descriptor___3~0#1.offset, 4);call write~int#10(0, saa7146_i2c_writeout_~#descriptor___3~0#1.base, 36 + saa7146_i2c_writeout_~#descriptor___3~0#1.offset, 1);call saa7146_i2c_writeout_#t~mem175#1 := read~int#10(saa7146_i2c_writeout_~#descriptor___3~0#1.base, 36 + saa7146_i2c_writeout_~#descriptor___3~0#1.offset, 1);assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if saa7146_i2c_writeout_#t~mem175#1 % 256 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_writeout_#t~mem175#1 % 256 % 18446744073709551616 else saa7146_i2c_writeout_#t~mem175#1 % 256 % 18446744073709551616 - 18446744073709551616) % 2, 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; [2025-02-08 15:24:01,584 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5188-5: assume !(0 != saa7146_i2c_writeout_#t~bitwise174#1 % 4294967296);havoc saa7146_i2c_writeout_#t~bitwise174#1; [2025-02-08 15:24:01,584 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5188-6: [2025-02-08 15:24:01,584 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5056-2: saa7146_i2c_writeout_#t~ret138#1.base, saa7146_i2c_writeout_#t~ret138#1.offset := get_current_#res#1.base, get_current_#res#1.offset;havoc get_current_#t~switch4#1, get_current_~pfo_ret__~0#1.base, get_current_~pfo_ret__~0#1.offset;assume { :end_inline_get_current } true;saa7146_i2c_writeout_~tmp___2~1#1.base, saa7146_i2c_writeout_~tmp___2~1#1.offset := saa7146_i2c_writeout_#t~ret138#1.base, saa7146_i2c_writeout_#t~ret138#1.offset;havoc saa7146_i2c_writeout_#t~ret138#1.base, saa7146_i2c_writeout_#t~ret138#1.offset;assume { :begin_inline_signal_pending } true;signal_pending_#in~p#1.base, signal_pending_#in~p#1.offset := saa7146_i2c_writeout_~tmp___2~1#1.base, saa7146_i2c_writeout_~tmp___2~1#1.offset;havoc signal_pending_#res#1;havoc signal_pending_#t~ret31#1, signal_pending_#t~ret32#1, signal_pending_~p#1.base, signal_pending_~p#1.offset, signal_pending_~tmp~2#1, signal_pending_~tmp___0~0#1;signal_pending_~p#1.base, signal_pending_~p#1.offset := signal_pending_#in~p#1.base, signal_pending_#in~p#1.offset;havoc signal_pending_~tmp~2#1;havoc signal_pending_~tmp___0~0#1;assume { :begin_inline_test_tsk_thread_flag } true;test_tsk_thread_flag_#in~tsk#1.base, test_tsk_thread_flag_#in~tsk#1.offset, test_tsk_thread_flag_#in~flag#1 := signal_pending_~p#1.base, signal_pending_~p#1.offset, 2;havoc test_tsk_thread_flag_#res#1;havoc test_tsk_thread_flag_#t~mem29#1.base, test_tsk_thread_flag_#t~mem29#1.offset, test_tsk_thread_flag_#t~ret30#1, test_tsk_thread_flag_~tsk#1.base, test_tsk_thread_flag_~tsk#1.offset, test_tsk_thread_flag_~flag#1, test_tsk_thread_flag_~tmp~1#1;test_tsk_thread_flag_~tsk#1.base, test_tsk_thread_flag_~tsk#1.offset := test_tsk_thread_flag_#in~tsk#1.base, test_tsk_thread_flag_#in~tsk#1.offset;test_tsk_thread_flag_~flag#1 := test_tsk_thread_flag_#in~flag#1;havoc test_tsk_thread_flag_~tmp~1#1;call test_tsk_thread_flag_#t~mem29#1.base, test_tsk_thread_flag_#t~mem29#1.offset := read~$Pointer$#21(test_tsk_thread_flag_~tsk#1.base, 8 + test_tsk_thread_flag_~tsk#1.offset, 8);assume { :begin_inline_test_ti_thread_flag } true;test_ti_thread_flag_#in~ti#1.base, test_ti_thread_flag_#in~ti#1.offset, test_ti_thread_flag_#in~flag#1 := test_tsk_thread_flag_#t~mem29#1.base, test_tsk_thread_flag_#t~mem29#1.offset, test_tsk_thread_flag_~flag#1;havoc test_ti_thread_flag_#res#1;havoc test_ti_thread_flag_#t~ret12#1, test_ti_thread_flag_~ti#1.base, test_ti_thread_flag_~ti#1.offset, test_ti_thread_flag_~flag#1, test_ti_thread_flag_~tmp~0#1;test_ti_thread_flag_~ti#1.base, test_ti_thread_flag_~ti#1.offset := test_ti_thread_flag_#in~ti#1.base, test_ti_thread_flag_#in~ti#1.offset;test_ti_thread_flag_~flag#1 := test_ti_thread_flag_#in~flag#1;havoc test_ti_thread_flag_~tmp~0#1;assume { :begin_inline_variable_test_bit } true;variable_test_bit_#in~nr#1, variable_test_bit_#in~addr#1.base, variable_test_bit_#in~addr#1.offset := test_ti_thread_flag_~flag#1, test_ti_thread_flag_~ti#1.base, 16 + test_ti_thread_flag_~ti#1.offset;havoc variable_test_bit_#res#1;havoc variable_test_bit_~nr#1, variable_test_bit_~addr#1.base, variable_test_bit_~addr#1.offset, variable_test_bit_~oldbit~0#1;variable_test_bit_~nr#1 := variable_test_bit_#in~nr#1;variable_test_bit_~addr#1.base, variable_test_bit_~addr#1.offset := variable_test_bit_#in~addr#1.base, variable_test_bit_#in~addr#1.offset;havoc variable_test_bit_~oldbit~0#1;variable_test_bit_#res#1 := variable_test_bit_~oldbit~0#1; [2025-02-08 15:24:01,585 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5188-3: assume 8 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_writeout_#t~bitwise174#1 := ~saa7146_debug~0; [2025-02-08 15:24:01,585 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5188-3: assume !(8 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,585 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5188-4: assume 0 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_writeout_#t~bitwise174#1 := 0; [2025-02-08 15:24:01,585 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5188-4: assume !(0 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,585 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5056: saa7146_i2c_writeout_#t~ret138#1.base, saa7146_i2c_writeout_#t~ret138#1.offset := get_current_#res#1.base, get_current_#res#1.offset;havoc get_current_#t~switch4#1, get_current_~pfo_ret__~0#1.base, get_current_~pfo_ret__~0#1.offset;assume { :end_inline_get_current } true;saa7146_i2c_writeout_~tmp___2~1#1.base, saa7146_i2c_writeout_~tmp___2~1#1.offset := saa7146_i2c_writeout_#t~ret138#1.base, saa7146_i2c_writeout_#t~ret138#1.offset;havoc saa7146_i2c_writeout_#t~ret138#1.base, saa7146_i2c_writeout_#t~ret138#1.offset;assume { :begin_inline_signal_pending } true;signal_pending_#in~p#1.base, signal_pending_#in~p#1.offset := saa7146_i2c_writeout_~tmp___2~1#1.base, saa7146_i2c_writeout_~tmp___2~1#1.offset;havoc signal_pending_#res#1;havoc signal_pending_#t~ret31#1, signal_pending_#t~ret32#1, signal_pending_~p#1.base, signal_pending_~p#1.offset, signal_pending_~tmp~2#1, signal_pending_~tmp___0~0#1;signal_pending_~p#1.base, signal_pending_~p#1.offset := signal_pending_#in~p#1.base, signal_pending_#in~p#1.offset;havoc signal_pending_~tmp~2#1;havoc signal_pending_~tmp___0~0#1;assume { :begin_inline_test_tsk_thread_flag } true;test_tsk_thread_flag_#in~tsk#1.base, test_tsk_thread_flag_#in~tsk#1.offset, test_tsk_thread_flag_#in~flag#1 := signal_pending_~p#1.base, signal_pending_~p#1.offset, 2;havoc test_tsk_thread_flag_#res#1;havoc test_tsk_thread_flag_#t~mem29#1.base, test_tsk_thread_flag_#t~mem29#1.offset, test_tsk_thread_flag_#t~ret30#1, test_tsk_thread_flag_~tsk#1.base, test_tsk_thread_flag_~tsk#1.offset, test_tsk_thread_flag_~flag#1, test_tsk_thread_flag_~tmp~1#1;test_tsk_thread_flag_~tsk#1.base, test_tsk_thread_flag_~tsk#1.offset := test_tsk_thread_flag_#in~tsk#1.base, test_tsk_thread_flag_#in~tsk#1.offset;test_tsk_thread_flag_~flag#1 := test_tsk_thread_flag_#in~flag#1;havoc test_tsk_thread_flag_~tmp~1#1;call test_tsk_thread_flag_#t~mem29#1.base, test_tsk_thread_flag_#t~mem29#1.offset := read~$Pointer$#21(test_tsk_thread_flag_~tsk#1.base, 8 + test_tsk_thread_flag_~tsk#1.offset, 8);assume { :begin_inline_test_ti_thread_flag } true;test_ti_thread_flag_#in~ti#1.base, test_ti_thread_flag_#in~ti#1.offset, test_ti_thread_flag_#in~flag#1 := test_tsk_thread_flag_#t~mem29#1.base, test_tsk_thread_flag_#t~mem29#1.offset, test_tsk_thread_flag_~flag#1;havoc test_ti_thread_flag_#res#1;havoc test_ti_thread_flag_#t~ret12#1, test_ti_thread_flag_~ti#1.base, test_ti_thread_flag_~ti#1.offset, test_ti_thread_flag_~flag#1, test_ti_thread_flag_~tmp~0#1;test_ti_thread_flag_~ti#1.base, test_ti_thread_flag_~ti#1.offset := test_ti_thread_flag_#in~ti#1.base, test_ti_thread_flag_#in~ti#1.offset;test_ti_thread_flag_~flag#1 := test_ti_thread_flag_#in~flag#1;havoc test_ti_thread_flag_~tmp~0#1;assume { :begin_inline_variable_test_bit } true;variable_test_bit_#in~nr#1, variable_test_bit_#in~addr#1.base, variable_test_bit_#in~addr#1.offset := test_ti_thread_flag_~flag#1, test_ti_thread_flag_~ti#1.base, 16 + test_ti_thread_flag_~ti#1.offset;havoc variable_test_bit_#res#1;havoc variable_test_bit_~nr#1, variable_test_bit_~addr#1.base, variable_test_bit_~addr#1.offset, variable_test_bit_~oldbit~0#1;variable_test_bit_~nr#1 := variable_test_bit_#in~nr#1;variable_test_bit_~addr#1.base, variable_test_bit_~addr#1.offset := variable_test_bit_#in~addr#1.base, variable_test_bit_#in~addr#1.offset;havoc variable_test_bit_~oldbit~0#1;variable_test_bit_#res#1 := variable_test_bit_~oldbit~0#1; [2025-02-08 15:24:01,585 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5188-9: assume 0 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_writeout_#t~bitwise174#1 := 0; [2025-02-08 15:24:01,586 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5188-9: assume !(0 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,586 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4858: call write~int#5(saa7146_i2c_msg_prepare_#t~bitwise74#1, saa7146_i2c_msg_prepare_~op#1.base, saa7146_i2c_msg_prepare_~op#1.offset + 4 * (if saa7146_i2c_msg_prepare_~h1~0#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_msg_prepare_~h1~0#1 % 18446744073709551616 % 18446744073709551616 else saa7146_i2c_msg_prepare_~h1~0#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 4);havoc saa7146_i2c_msg_prepare_#t~mem73#1;havoc saa7146_i2c_msg_prepare_#t~bitwise72#1;havoc saa7146_i2c_msg_prepare_#t~bitwise74#1;call saa7146_i2c_msg_prepare_#t~mem76#1 := read~int#5(saa7146_i2c_msg_prepare_~op#1.base, saa7146_i2c_msg_prepare_~op#1.offset + 4 * (if saa7146_i2c_msg_prepare_~h1~0#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_msg_prepare_~h1~0#1 % 18446744073709551616 % 18446744073709551616 else saa7146_i2c_msg_prepare_~h1~0#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 4); [2025-02-08 15:24:01,586 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5188-7: havoc saa7146_i2c_writeout_#t~bitwise174#1;assume saa7146_i2c_writeout_#t~bitwise174#1 % 4294967296 <= ~saa7146_debug~0 % 4294967296 && saa7146_i2c_writeout_#t~bitwise174#1 % 4294967296 <= 8; [2025-02-08 15:24:01,586 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5188-8: assume 8 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_writeout_#t~bitwise174#1 := ~saa7146_debug~0; [2025-02-08 15:24:01,586 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5188-8: assume !(8 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,586 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4858-3: assume saa7146_i2c_msg_prepare_#t~mem73#1 % 4294967296 == (4294967295 - saa7146_i2c_msg_prepare_#t~bitwise72#1) % 4294967296;saa7146_i2c_msg_prepare_#t~bitwise74#1 := saa7146_i2c_msg_prepare_#t~mem73#1; [2025-02-08 15:24:01,586 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4858-3: assume !(saa7146_i2c_msg_prepare_#t~mem73#1 % 4294967296 == (4294967295 - saa7146_i2c_msg_prepare_#t~bitwise72#1) % 4294967296); [2025-02-08 15:24:01,586 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4858-4: assume 0 == saa7146_i2c_msg_prepare_#t~mem73#1 % 4294967296 || 0 == (4294967295 - saa7146_i2c_msg_prepare_#t~bitwise72#1) % 4294967296;saa7146_i2c_msg_prepare_#t~bitwise74#1 := 0; [2025-02-08 15:24:01,586 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4858-4: assume !(0 == saa7146_i2c_msg_prepare_#t~mem73#1 % 4294967296 || 0 == (4294967295 - saa7146_i2c_msg_prepare_#t~bitwise72#1) % 4294967296); [2025-02-08 15:24:01,586 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4858-1: [2025-02-08 15:24:01,587 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4858-2: havoc saa7146_i2c_msg_prepare_#t~bitwise74#1;assume saa7146_i2c_msg_prepare_#t~bitwise74#1 % 4294967296 <= saa7146_i2c_msg_prepare_#t~mem73#1 % 4294967296 && saa7146_i2c_msg_prepare_#t~bitwise74#1 % 4294967296 <= (4294967295 - saa7146_i2c_msg_prepare_#t~bitwise72#1) % 4294967296; [2025-02-08 15:24:01,587 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4858-7: assume 0 == 2 * (3 - saa7146_i2c_msg_prepare_~h2~0#1);saa7146_i2c_msg_prepare_#t~bitwise72#1 := 2; [2025-02-08 15:24:01,587 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4858-7: assume !(0 == 2 * (3 - saa7146_i2c_msg_prepare_~h2~0#1)); [2025-02-08 15:24:01,587 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4858-5: [2025-02-08 15:24:01,587 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4858-6: havoc saa7146_i2c_msg_prepare_#t~bitwise72#1;assume saa7146_i2c_msg_prepare_#t~bitwise72#1 > 2; [2025-02-08 15:24:01,587 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5387: assume 0 == saa7146_i2c_transfer_~err~0#1;saa7146_i2c_transfer_~err~0#1 := saa7146_i2c_transfer_~num#1; [2025-02-08 15:24:01,587 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5387: assume !(0 == saa7146_i2c_transfer_~err~0#1);assume { :begin_inline_msleep } true;msleep_#in~arg0#1 := 10;havoc msleep_~arg0#1;msleep_~arg0#1 := msleep_#in~arg0#1; [2025-02-08 15:24:01,587 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4991: call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset);havoc saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset;saa7146_i2c_transfer_#t~ret230#1 := saa7146_i2c_writeout_#res#1;havoc saa7146_i2c_writeout_#t~bitwise119#1, saa7146_i2c_writeout_#t~mem120#1, saa7146_i2c_writeout_#t~ret121#1, saa7146_i2c_writeout_#t~mem122#1.base, saa7146_i2c_writeout_#t~mem122#1.offset, saa7146_i2c_writeout_#t~ret123#1, saa7146_i2c_writeout_#t~mem124#1, saa7146_i2c_writeout_#t~mem125#1, saa7146_i2c_writeout_#t~ret126#1, saa7146_i2c_writeout_#t~mem127#1.base, saa7146_i2c_writeout_#t~mem127#1.offset, saa7146_i2c_writeout_#t~mem128#1, saa7146_i2c_writeout_#t~mem129#1, saa7146_i2c_writeout_#t~mem130#1.base, saa7146_i2c_writeout_#t~mem130#1.offset, saa7146_i2c_writeout_#t~mem131#1, saa7146_i2c_writeout_#t~mem132#1.base, saa7146_i2c_writeout_#t~mem132#1.offset, saa7146_i2c_writeout_#t~mem133#1.base, saa7146_i2c_writeout_#t~mem133#1.offset, saa7146_i2c_writeout_#t~mem134#1.base, saa7146_i2c_writeout_#t~mem134#1.offset, saa7146_i2c_writeout_#t~mem135#1, saa7146_i2c_writeout_#t~ret136#1.base, saa7146_i2c_writeout_#t~ret136#1.offset, saa7146_i2c_writeout_#t~mem137#1, saa7146_i2c_writeout_#t~ret138#1.base, saa7146_i2c_writeout_#t~ret138#1.offset, saa7146_i2c_writeout_#t~ret139#1, saa7146_i2c_writeout_#t~ret140#1, saa7146_i2c_writeout_#t~mem141#1, saa7146_i2c_writeout_#t~short142#1, saa7146_i2c_writeout_#t~mem143#1.base, saa7146_i2c_writeout_#t~mem143#1.offset, saa7146_i2c_writeout_#t~ret144#1, saa7146_i2c_writeout_#t~mem145#1.base, saa7146_i2c_writeout_#t~mem145#1.offset, saa7146_i2c_writeout_#t~ret146#1, saa7146_i2c_writeout_#t~mem147#1, saa7146_i2c_writeout_#t~mem148#1.base, saa7146_i2c_writeout_#t~mem148#1.offset, saa7146_i2c_writeout_#t~mem149#1, saa7146_i2c_writeout_#t~mem150#1.base, saa7146_i2c_writeout_#t~mem150#1.offset, saa7146_i2c_writeout_#t~mem151#1.base, saa7146_i2c_writeout_#t~mem151#1.offset, saa7146_i2c_writeout_#t~mem152#1.base, saa7146_i2c_writeout_#t~mem152#1.offset, saa7146_i2c_writeout_#t~ret153#1, saa7146_i2c_writeout_#t~ret154#1, saa7146_i2c_writeout_#t~ret155#1, saa7146_i2c_writeout_#t~ret156#1, saa7146_i2c_writeout_#t~ret157#1, saa7146_i2c_writeout_#t~bitwise158#1, saa7146_i2c_writeout_#t~bitwise159#1, saa7146_i2c_writeout_#t~mem160#1, saa7146_i2c_writeout_#t~ret161#1, saa7146_i2c_writeout_#t~ret162#1, saa7146_i2c_writeout_#t~bitwise163#1, saa7146_i2c_writeout_#t~bitwise164#1, saa7146_i2c_writeout_#t~mem165#1, saa7146_i2c_writeout_#t~ret166#1, saa7146_i2c_writeout_#t~ret167#1, saa7146_i2c_writeout_#t~bitwise168#1, saa7146_i2c_writeout_#t~bitwise169#1, saa7146_i2c_writeout_#t~mem170#1, saa7146_i2c_writeout_#t~ret171#1, saa7146_i2c_writeout_#t~ret172#1, saa7146_i2c_writeout_#t~bitwise173#1, saa7146_i2c_writeout_#t~bitwise174#1, saa7146_i2c_writeout_#t~mem175#1, saa7146_i2c_writeout_#t~ret176#1, saa7146_i2c_writeout_#t~ret177#1, saa7146_i2c_writeout_#t~bitwise178#1, saa7146_i2c_writeout_#t~bitwise179#1, saa7146_i2c_writeout_#t~mem180#1, saa7146_i2c_writeout_#t~ret181#1, saa7146_i2c_writeout_#t~ret182#1, saa7146_i2c_writeout_#t~bitwise183#1, saa7146_i2c_writeout_#t~bitwise184#1, saa7146_i2c_writeout_#t~mem185#1, saa7146_i2c_writeout_#t~ret186#1, saa7146_i2c_writeout_#t~ret187#1, saa7146_i2c_writeout_#t~mem188#1.base, saa7146_i2c_writeout_#t~mem188#1.offset, saa7146_i2c_writeout_#t~ret189#1, saa7146_i2c_writeout_#t~bitwise190#1, saa7146_i2c_writeout_#t~mem191#1, saa7146_i2c_writeout_#t~ret192#1, saa7146_i2c_writeout_#t~mem193#1, saa7146_i2c_writeout_#t~ret194#1, saa7146_i2c_writeout_~dev#1.base, saa7146_i2c_writeout_~dev#1.offset, saa7146_i2c_writeout_~dword#1.base, saa7146_i2c_writeout_~dword#1.offset, saa7146_i2c_writeout_~short_delay#1, saa7146_i2c_writeout_~status~1#1, saa7146_i2c_writeout_~mc2~0#1, saa7146_i2c_writeout_~trial~0#1, saa7146_i2c_writeout_~timeout~0#1, saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset, saa7146_i2c_writeout_~tmp~8#1, saa7146_i2c_writeout_~tmp___0~4#1, saa7146_i2c_writeout_~__ret~0#1, saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset, saa7146_i2c_writeout_~tmp___1~1#1.base, saa7146_i2c_writeout_~tmp___1~1#1.offset, saa7146_i2c_writeout_~tmp___2~1#1.base, saa7146_i2c_writeout_~tmp___2~1#1.offset, saa7146_i2c_writeout_~tmp___3~0#1, saa7146_i2c_writeout_~tmp___4~0#1, saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset, saa7146_i2c_writeout_~tmp___5~0#1, saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset, saa7146_i2c_writeout_~tmp___6~0#1, saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset, saa7146_i2c_writeout_~tmp___7~0#1, saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset, saa7146_i2c_writeout_~tmp___8~0#1, saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset, saa7146_i2c_writeout_~tmp___9~0#1, saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset, saa7146_i2c_writeout_~tmp___10~0#1, saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset, saa7146_i2c_writeout_~tmp___11~0#1;havoc saa7146_i2c_writeout_#in~dev#1.base, saa7146_i2c_writeout_#in~dev#1.offset, saa7146_i2c_writeout_#in~dword#1.base, saa7146_i2c_writeout_#in~dword#1.offset, saa7146_i2c_writeout_#in~short_delay#1;assume { :end_inline_saa7146_i2c_writeout } true;saa7146_i2c_transfer_~tmp___7~1#1 := saa7146_i2c_transfer_#t~ret230#1;havoc saa7146_i2c_transfer_#t~ret230#1; [2025-02-08 15:24:01,587 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4991-1: call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset);havoc saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset;saa7146_i2c_transfer_#t~ret211#1 := saa7146_i2c_writeout_#res#1;havoc saa7146_i2c_writeout_#t~bitwise119#1, saa7146_i2c_writeout_#t~mem120#1, saa7146_i2c_writeout_#t~ret121#1, saa7146_i2c_writeout_#t~mem122#1.base, saa7146_i2c_writeout_#t~mem122#1.offset, saa7146_i2c_writeout_#t~ret123#1, saa7146_i2c_writeout_#t~mem124#1, saa7146_i2c_writeout_#t~mem125#1, saa7146_i2c_writeout_#t~ret126#1, saa7146_i2c_writeout_#t~mem127#1.base, saa7146_i2c_writeout_#t~mem127#1.offset, saa7146_i2c_writeout_#t~mem128#1, saa7146_i2c_writeout_#t~mem129#1, saa7146_i2c_writeout_#t~mem130#1.base, saa7146_i2c_writeout_#t~mem130#1.offset, saa7146_i2c_writeout_#t~mem131#1, saa7146_i2c_writeout_#t~mem132#1.base, saa7146_i2c_writeout_#t~mem132#1.offset, saa7146_i2c_writeout_#t~mem133#1.base, saa7146_i2c_writeout_#t~mem133#1.offset, saa7146_i2c_writeout_#t~mem134#1.base, saa7146_i2c_writeout_#t~mem134#1.offset, saa7146_i2c_writeout_#t~mem135#1, saa7146_i2c_writeout_#t~ret136#1.base, saa7146_i2c_writeout_#t~ret136#1.offset, saa7146_i2c_writeout_#t~mem137#1, saa7146_i2c_writeout_#t~ret138#1.base, saa7146_i2c_writeout_#t~ret138#1.offset, saa7146_i2c_writeout_#t~ret139#1, saa7146_i2c_writeout_#t~ret140#1, saa7146_i2c_writeout_#t~mem141#1, saa7146_i2c_writeout_#t~short142#1, saa7146_i2c_writeout_#t~mem143#1.base, saa7146_i2c_writeout_#t~mem143#1.offset, saa7146_i2c_writeout_#t~ret144#1, saa7146_i2c_writeout_#t~mem145#1.base, saa7146_i2c_writeout_#t~mem145#1.offset, saa7146_i2c_writeout_#t~ret146#1, saa7146_i2c_writeout_#t~mem147#1, saa7146_i2c_writeout_#t~mem148#1.base, saa7146_i2c_writeout_#t~mem148#1.offset, saa7146_i2c_writeout_#t~mem149#1, saa7146_i2c_writeout_#t~mem150#1.base, saa7146_i2c_writeout_#t~mem150#1.offset, saa7146_i2c_writeout_#t~mem151#1.base, saa7146_i2c_writeout_#t~mem151#1.offset, saa7146_i2c_writeout_#t~mem152#1.base, saa7146_i2c_writeout_#t~mem152#1.offset, saa7146_i2c_writeout_#t~ret153#1, saa7146_i2c_writeout_#t~ret154#1, saa7146_i2c_writeout_#t~ret155#1, saa7146_i2c_writeout_#t~ret156#1, saa7146_i2c_writeout_#t~ret157#1, saa7146_i2c_writeout_#t~bitwise158#1, saa7146_i2c_writeout_#t~bitwise159#1, saa7146_i2c_writeout_#t~mem160#1, saa7146_i2c_writeout_#t~ret161#1, saa7146_i2c_writeout_#t~ret162#1, saa7146_i2c_writeout_#t~bitwise163#1, saa7146_i2c_writeout_#t~bitwise164#1, saa7146_i2c_writeout_#t~mem165#1, saa7146_i2c_writeout_#t~ret166#1, saa7146_i2c_writeout_#t~ret167#1, saa7146_i2c_writeout_#t~bitwise168#1, saa7146_i2c_writeout_#t~bitwise169#1, saa7146_i2c_writeout_#t~mem170#1, saa7146_i2c_writeout_#t~ret171#1, saa7146_i2c_writeout_#t~ret172#1, saa7146_i2c_writeout_#t~bitwise173#1, saa7146_i2c_writeout_#t~bitwise174#1, saa7146_i2c_writeout_#t~mem175#1, saa7146_i2c_writeout_#t~ret176#1, saa7146_i2c_writeout_#t~ret177#1, saa7146_i2c_writeout_#t~bitwise178#1, saa7146_i2c_writeout_#t~bitwise179#1, saa7146_i2c_writeout_#t~mem180#1, saa7146_i2c_writeout_#t~ret181#1, saa7146_i2c_writeout_#t~ret182#1, saa7146_i2c_writeout_#t~bitwise183#1, saa7146_i2c_writeout_#t~bitwise184#1, saa7146_i2c_writeout_#t~mem185#1, saa7146_i2c_writeout_#t~ret186#1, saa7146_i2c_writeout_#t~ret187#1, saa7146_i2c_writeout_#t~mem188#1.base, saa7146_i2c_writeout_#t~mem188#1.offset, saa7146_i2c_writeout_#t~ret189#1, saa7146_i2c_writeout_#t~bitwise190#1, saa7146_i2c_writeout_#t~mem191#1, saa7146_i2c_writeout_#t~ret192#1, saa7146_i2c_writeout_#t~mem193#1, saa7146_i2c_writeout_#t~ret194#1, saa7146_i2c_writeout_~dev#1.base, saa7146_i2c_writeout_~dev#1.offset, saa7146_i2c_writeout_~dword#1.base, saa7146_i2c_writeout_~dword#1.offset, saa7146_i2c_writeout_~short_delay#1, saa7146_i2c_writeout_~status~1#1, saa7146_i2c_writeout_~mc2~0#1, saa7146_i2c_writeout_~trial~0#1, saa7146_i2c_writeout_~timeout~0#1, saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset, saa7146_i2c_writeout_~tmp~8#1, saa7146_i2c_writeout_~tmp___0~4#1, saa7146_i2c_writeout_~__ret~0#1, saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset, saa7146_i2c_writeout_~tmp___1~1#1.base, saa7146_i2c_writeout_~tmp___1~1#1.offset, saa7146_i2c_writeout_~tmp___2~1#1.base, saa7146_i2c_writeout_~tmp___2~1#1.offset, saa7146_i2c_writeout_~tmp___3~0#1, saa7146_i2c_writeout_~tmp___4~0#1, saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset, saa7146_i2c_writeout_~tmp___5~0#1, saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset, saa7146_i2c_writeout_~tmp___6~0#1, saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset, saa7146_i2c_writeout_~tmp___7~0#1, saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset, saa7146_i2c_writeout_~tmp___8~0#1, saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset, saa7146_i2c_writeout_~tmp___9~0#1, saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset, saa7146_i2c_writeout_~tmp___10~0#1, saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset, saa7146_i2c_writeout_~tmp___11~0#1;havoc saa7146_i2c_writeout_#in~dev#1.base, saa7146_i2c_writeout_#in~dev#1.offset, saa7146_i2c_writeout_#in~dword#1.base, saa7146_i2c_writeout_#in~dword#1.offset, saa7146_i2c_writeout_#in~short_delay#1;assume { :end_inline_saa7146_i2c_writeout } true;saa7146_i2c_transfer_~err~0#1 := saa7146_i2c_transfer_#t~ret211#1; [2025-02-08 15:24:01,588 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5057: saa7146_i2c_writeout_#t~ret139#1 := signal_pending_#res#1;havoc signal_pending_#t~ret31#1, signal_pending_#t~ret32#1, signal_pending_~p#1.base, signal_pending_~p#1.offset, signal_pending_~tmp~2#1, signal_pending_~tmp___0~0#1;havoc signal_pending_#in~p#1.base, signal_pending_#in~p#1.offset;assume { :end_inline_signal_pending } true;saa7146_i2c_writeout_~tmp___3~0#1 := saa7146_i2c_writeout_#t~ret139#1;havoc saa7146_i2c_writeout_#t~ret139#1; [2025-02-08 15:24:01,588 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5057-1: saa7146_i2c_writeout_#t~ret139#1 := signal_pending_#res#1;havoc signal_pending_#t~ret31#1, signal_pending_#t~ret32#1, signal_pending_~p#1.base, signal_pending_~p#1.offset, signal_pending_~tmp~2#1, signal_pending_~tmp___0~0#1;havoc signal_pending_#in~p#1.base, signal_pending_#in~p#1.offset;assume { :end_inline_signal_pending } true;saa7146_i2c_writeout_~tmp___3~0#1 := saa7146_i2c_writeout_#t~ret139#1;havoc saa7146_i2c_writeout_#t~ret139#1; [2025-02-08 15:24:01,588 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4859: call write~int#5(saa7146_i2c_msg_prepare_#t~bitwise77#1, saa7146_i2c_msg_prepare_~op#1.base, saa7146_i2c_msg_prepare_~op#1.offset + 4 * (if saa7146_i2c_msg_prepare_~h1~0#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_msg_prepare_~h1~0#1 % 18446744073709551616 % 18446744073709551616 else saa7146_i2c_msg_prepare_~h1~0#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 4);havoc saa7146_i2c_msg_prepare_#t~mem76#1;havoc saa7146_i2c_msg_prepare_#t~bitwise75#1;havoc saa7146_i2c_msg_prepare_#t~bitwise77#1; [2025-02-08 15:24:01,588 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4859-1: [2025-02-08 15:24:01,588 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4793-2: saa7146_i2c_status_#t~ret50#1 := readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;havoc readl_#in~addr#1.base, readl_#in~addr#1.offset;assume { :end_inline_readl } true;saa7146_i2c_status_~tmp~6#1 := saa7146_i2c_status_#t~ret50#1;havoc saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset;havoc saa7146_i2c_status_#t~ret50#1;saa7146_i2c_status_~iicsta~0#1 := saa7146_i2c_status_~tmp~6#1;saa7146_i2c_status_#res#1 := saa7146_i2c_status_~iicsta~0#1; [2025-02-08 15:24:01,588 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4859-4: assume 0 == saa7146_i2c_msg_prepare_#t~mem76#1 % 4294967296 || saa7146_i2c_msg_prepare_#t~mem76#1 % 4294967296 == saa7146_i2c_msg_prepare_#t~bitwise75#1 % 4294967296;saa7146_i2c_msg_prepare_#t~bitwise77#1 := saa7146_i2c_msg_prepare_#t~bitwise75#1; [2025-02-08 15:24:01,588 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4859-4: assume !(0 == saa7146_i2c_msg_prepare_#t~mem76#1 % 4294967296 || saa7146_i2c_msg_prepare_#t~mem76#1 % 4294967296 == saa7146_i2c_msg_prepare_#t~bitwise75#1 % 4294967296); [2025-02-08 15:24:01,588 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4793-3: saa7146_i2c_status_#t~ret50#1 := readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;havoc readl_#in~addr#1.base, readl_#in~addr#1.offset;assume { :end_inline_readl } true;saa7146_i2c_status_~tmp~6#1 := saa7146_i2c_status_#t~ret50#1;havoc saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset;havoc saa7146_i2c_status_#t~ret50#1;saa7146_i2c_status_~iicsta~0#1 := saa7146_i2c_status_~tmp~6#1;saa7146_i2c_status_#res#1 := saa7146_i2c_status_~iicsta~0#1; [2025-02-08 15:24:01,588 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4859-5: [2025-02-08 15:24:01,589 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4793: saa7146_i2c_status_#t~ret50#1 := readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;havoc readl_#in~addr#1.base, readl_#in~addr#1.offset;assume { :end_inline_readl } true;saa7146_i2c_status_~tmp~6#1 := saa7146_i2c_status_#t~ret50#1;havoc saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset;havoc saa7146_i2c_status_#t~ret50#1;saa7146_i2c_status_~iicsta~0#1 := saa7146_i2c_status_~tmp~6#1;saa7146_i2c_status_#res#1 := saa7146_i2c_status_~iicsta~0#1; [2025-02-08 15:24:01,589 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4859-2: havoc saa7146_i2c_msg_prepare_#t~bitwise77#1;assume (saa7146_i2c_msg_prepare_#t~bitwise77#1 % 4294967296 >= saa7146_i2c_msg_prepare_#t~mem76#1 % 4294967296 && saa7146_i2c_msg_prepare_#t~bitwise77#1 % 4294967296 >= saa7146_i2c_msg_prepare_#t~bitwise75#1 % 4294967296) && saa7146_i2c_msg_prepare_#t~bitwise77#1 % 4294967296 <= saa7146_i2c_msg_prepare_#t~mem76#1 % 4294967296 + saa7146_i2c_msg_prepare_#t~bitwise75#1 % 4294967296; [2025-02-08 15:24:01,589 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4793-1: saa7146_i2c_status_#t~ret50#1 := readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;havoc readl_#in~addr#1.base, readl_#in~addr#1.offset;assume { :end_inline_readl } true;saa7146_i2c_status_~tmp~6#1 := saa7146_i2c_status_#t~ret50#1;havoc saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset;havoc saa7146_i2c_status_#t~ret50#1;saa7146_i2c_status_~iicsta~0#1 := saa7146_i2c_status_~tmp~6#1;saa7146_i2c_status_#res#1 := saa7146_i2c_status_~iicsta~0#1; [2025-02-08 15:24:01,589 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4859-3: assume 0 == saa7146_i2c_msg_prepare_#t~bitwise75#1 % 4294967296;saa7146_i2c_msg_prepare_#t~bitwise77#1 := saa7146_i2c_msg_prepare_#t~mem76#1; [2025-02-08 15:24:01,589 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4859-3: assume !(0 == saa7146_i2c_msg_prepare_#t~bitwise75#1 % 4294967296); [2025-02-08 15:24:01,589 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4793-6: saa7146_i2c_status_#t~ret50#1 := readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;havoc readl_#in~addr#1.base, readl_#in~addr#1.offset;assume { :end_inline_readl } true;saa7146_i2c_status_~tmp~6#1 := saa7146_i2c_status_#t~ret50#1;havoc saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset;havoc saa7146_i2c_status_#t~ret50#1;saa7146_i2c_status_~iicsta~0#1 := saa7146_i2c_status_~tmp~6#1;saa7146_i2c_status_#res#1 := saa7146_i2c_status_~iicsta~0#1; [2025-02-08 15:24:01,589 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4793-7: saa7146_i2c_status_#t~ret50#1 := readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;havoc readl_#in~addr#1.base, readl_#in~addr#1.offset;assume { :end_inline_readl } true;saa7146_i2c_status_~tmp~6#1 := saa7146_i2c_status_#t~ret50#1;havoc saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset;havoc saa7146_i2c_status_#t~ret50#1;saa7146_i2c_status_~iicsta~0#1 := saa7146_i2c_status_~tmp~6#1;saa7146_i2c_status_#res#1 := saa7146_i2c_status_~iicsta~0#1; [2025-02-08 15:24:01,589 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4793-4: saa7146_i2c_status_#t~ret50#1 := readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;havoc readl_#in~addr#1.base, readl_#in~addr#1.offset;assume { :end_inline_readl } true;saa7146_i2c_status_~tmp~6#1 := saa7146_i2c_status_#t~ret50#1;havoc saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset;havoc saa7146_i2c_status_#t~ret50#1;saa7146_i2c_status_~iicsta~0#1 := saa7146_i2c_status_~tmp~6#1;saa7146_i2c_status_#res#1 := saa7146_i2c_status_~iicsta~0#1; [2025-02-08 15:24:01,590 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4859-6: havoc saa7146_i2c_msg_prepare_#t~bitwise75#1;assume saa7146_i2c_msg_prepare_#t~bitwise75#1 > 1; [2025-02-08 15:24:01,590 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4793-5: saa7146_i2c_status_#t~ret50#1 := readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;havoc readl_#in~addr#1.base, readl_#in~addr#1.offset;assume { :end_inline_readl } true;saa7146_i2c_status_~tmp~6#1 := saa7146_i2c_status_#t~ret50#1;havoc saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset;havoc saa7146_i2c_status_#t~ret50#1;saa7146_i2c_status_~iicsta~0#1 := saa7146_i2c_status_~tmp~6#1;saa7146_i2c_status_#res#1 := saa7146_i2c_status_~iicsta~0#1; [2025-02-08 15:24:01,590 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4859-7: assume 0 == 2 * (3 - saa7146_i2c_msg_prepare_~h2~0#1);saa7146_i2c_msg_prepare_#t~bitwise75#1 := 1; [2025-02-08 15:24:01,590 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4859-7: assume !(0 == 2 * (3 - saa7146_i2c_msg_prepare_~h2~0#1)); [2025-02-08 15:24:01,590 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4793-8: saa7146_i2c_status_#t~ret50#1 := readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;havoc readl_#in~addr#1.base, readl_#in~addr#1.offset;assume { :end_inline_readl } true;saa7146_i2c_status_~tmp~6#1 := saa7146_i2c_status_#t~ret50#1;havoc saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset;havoc saa7146_i2c_status_#t~ret50#1;saa7146_i2c_status_~iicsta~0#1 := saa7146_i2c_status_~tmp~6#1;saa7146_i2c_status_#res#1 := saa7146_i2c_status_~iicsta~0#1; [2025-02-08 15:24:01,590 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4793-9: saa7146_i2c_status_#t~ret50#1 := readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;havoc readl_#in~addr#1.base, readl_#in~addr#1.offset;assume { :end_inline_readl } true;saa7146_i2c_status_~tmp~6#1 := saa7146_i2c_status_#t~ret50#1;havoc saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset;havoc saa7146_i2c_status_#t~ret50#1;saa7146_i2c_status_~iicsta~0#1 := saa7146_i2c_status_~tmp~6#1;saa7146_i2c_status_#res#1 := saa7146_i2c_status_~iicsta~0#1; [2025-02-08 15:24:01,590 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5322: saa7146_i2c_transfer_#t~ret201#1 := saa7146_i2c_msg_prepare_#res#1;havoc saa7146_i2c_msg_prepare_#t~mem51#1, saa7146_i2c_msg_prepare_#t~memset~res52#1.base, saa7146_i2c_msg_prepare_#t~memset~res52#1.offset, saa7146_i2c_msg_prepare_#t~mem53#1, saa7146_i2c_msg_prepare_#t~mem54#1, saa7146_i2c_msg_prepare_#t~mem56#1, saa7146_i2c_msg_prepare_#t~bitwise55#1, saa7146_i2c_msg_prepare_#t~bitwise57#1, saa7146_i2c_msg_prepare_#t~mem59#1, saa7146_i2c_msg_prepare_#t~bitwise58#1, saa7146_i2c_msg_prepare_#t~bitwise60#1, saa7146_i2c_msg_prepare_#t~mem64#1, saa7146_i2c_msg_prepare_#t~mem61#1.base, saa7146_i2c_msg_prepare_#t~mem61#1.offset, saa7146_i2c_msg_prepare_#t~mem62#1, saa7146_i2c_msg_prepare_#t~bitwise63#1, saa7146_i2c_msg_prepare_#t~bitwise65#1, saa7146_i2c_msg_prepare_#t~mem67#1, saa7146_i2c_msg_prepare_#t~bitwise66#1, saa7146_i2c_msg_prepare_#t~bitwise68#1, saa7146_i2c_msg_prepare_#t~mem69#1, saa7146_i2c_msg_prepare_#t~mem70#1, saa7146_i2c_msg_prepare_#t~bitwise71#1, saa7146_i2c_msg_prepare_#t~mem73#1, saa7146_i2c_msg_prepare_#t~bitwise72#1, saa7146_i2c_msg_prepare_#t~bitwise74#1, saa7146_i2c_msg_prepare_#t~mem76#1, saa7146_i2c_msg_prepare_#t~bitwise75#1, saa7146_i2c_msg_prepare_#t~bitwise77#1, saa7146_i2c_msg_prepare_~m#1.base, saa7146_i2c_msg_prepare_~m#1.offset, saa7146_i2c_msg_prepare_~num#1, saa7146_i2c_msg_prepare_~op#1.base, saa7146_i2c_msg_prepare_~op#1.offset, saa7146_i2c_msg_prepare_~h1~0#1, saa7146_i2c_msg_prepare_~h2~0#1, saa7146_i2c_msg_prepare_~i~0#1, saa7146_i2c_msg_prepare_~j~0#1, saa7146_i2c_msg_prepare_~addr~0#1, saa7146_i2c_msg_prepare_~mem~0#1, saa7146_i2c_msg_prepare_~op_count~0#1;havoc saa7146_i2c_msg_prepare_#in~m#1.base, saa7146_i2c_msg_prepare_#in~m#1.offset, saa7146_i2c_msg_prepare_#in~num#1, saa7146_i2c_msg_prepare_#in~op#1.base, saa7146_i2c_msg_prepare_#in~op#1.offset;assume { :end_inline_saa7146_i2c_msg_prepare } true;saa7146_i2c_transfer_~count~0#1 := saa7146_i2c_transfer_#t~ret201#1;havoc saa7146_i2c_transfer_#t~ret201#1; [2025-02-08 15:24:01,590 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5124-1: assume saa7146_i2c_writeout_~trial~0#1 <= 49 && 0 != saa7146_i2c_writeout_~short_delay#1;assume { :begin_inline___const_udelay } true;__const_udelay_#in~arg0#1 := 42950;havoc __const_udelay_~arg0#1;__const_udelay_~arg0#1 := __const_udelay_#in~arg0#1; [2025-02-08 15:24:01,590 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5124-1: assume !(saa7146_i2c_writeout_~trial~0#1 <= 49 && 0 != saa7146_i2c_writeout_~short_delay#1);assume { :begin_inline_msleep } true;msleep_#in~arg0#1 := 1;havoc msleep_~arg0#1;msleep_~arg0#1 := msleep_#in~arg0#1; [2025-02-08 15:24:01,590 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5058: assume 0 == saa7146_i2c_writeout_~tmp___3~0#1;assume { :begin_inline_schedule_timeout } true;schedule_timeout_#in~arg0#1 := saa7146_i2c_writeout_~__ret~0#1;havoc schedule_timeout_#res#1;havoc schedule_timeout_#t~nondet703#1, schedule_timeout_~arg0#1;schedule_timeout_~arg0#1 := schedule_timeout_#in~arg0#1;havoc schedule_timeout_#t~nondet703#1;schedule_timeout_#res#1 := schedule_timeout_#t~nondet703#1;havoc schedule_timeout_#t~nondet703#1; [2025-02-08 15:24:01,590 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5058: assume !(0 == saa7146_i2c_writeout_~tmp___3~0#1);saa7146_i2c_writeout_~__ret~0#1 := -512; [2025-02-08 15:24:01,590 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5124: assume saa7146_i2c_writeout_~trial~0#1 <= 49 && 0 != saa7146_i2c_writeout_~short_delay#1;assume { :begin_inline___const_udelay } true;__const_udelay_#in~arg0#1 := 42950;havoc __const_udelay_~arg0#1;__const_udelay_~arg0#1 := __const_udelay_#in~arg0#1; [2025-02-08 15:24:01,590 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5124: assume !(saa7146_i2c_writeout_~trial~0#1 <= 49 && 0 != saa7146_i2c_writeout_~short_delay#1);assume { :begin_inline_msleep } true;msleep_#in~arg0#1 := 1;havoc msleep_~arg0#1;msleep_~arg0#1 := msleep_#in~arg0#1; [2025-02-08 15:24:01,590 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4926: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_reset_#t~mem90#1;havoc saa7146_i2c_reset_#t~bitwise91#1;havoc saa7146_i2c_reset_#t~mem92#1.base, saa7146_i2c_reset_#t~mem92#1.offset;call saa7146_i2c_reset_#t~mem93#1.base, saa7146_i2c_reset_#t~mem93#1.offset := read~$Pointer$#6(saa7146_i2c_reset_~dev#1.base, 802 + saa7146_i2c_reset_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := 65537, saa7146_i2c_reset_#t~mem93#1.base, 256 + saa7146_i2c_reset_#t~mem93#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,591 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5058-1: assume 0 == saa7146_i2c_writeout_~tmp___3~0#1;assume { :begin_inline_schedule_timeout } true;schedule_timeout_#in~arg0#1 := saa7146_i2c_writeout_~__ret~0#1;havoc schedule_timeout_#res#1;havoc schedule_timeout_#t~nondet703#1, schedule_timeout_~arg0#1;schedule_timeout_~arg0#1 := schedule_timeout_#in~arg0#1;havoc schedule_timeout_#t~nondet703#1;schedule_timeout_#res#1 := schedule_timeout_#t~nondet703#1;havoc schedule_timeout_#t~nondet703#1; [2025-02-08 15:24:01,591 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5058-1: assume !(0 == saa7146_i2c_writeout_~tmp___3~0#1);saa7146_i2c_writeout_~__ret~0#1 := -512; [2025-02-08 15:24:01,591 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4926-3: havoc saa7146_i2c_reset_#t~bitwise91#1;assume (saa7146_i2c_reset_#t~bitwise91#1 % 4294967296 >= saa7146_i2c_reset_#t~mem90#1 % 4294967296 && saa7146_i2c_reset_#t~bitwise91#1 % 4294967296 >= 128) && saa7146_i2c_reset_#t~bitwise91#1 % 4294967296 <= 128 + saa7146_i2c_reset_#t~mem90#1 % 4294967296; [2025-02-08 15:24:01,591 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4926-4: assume false;saa7146_i2c_reset_#t~bitwise91#1 := saa7146_i2c_reset_#t~mem90#1; [2025-02-08 15:24:01,591 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4926-4: assume !false; [2025-02-08 15:24:01,591 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4926-1: call saa7146_i2c_reset_#t~mem92#1.base, saa7146_i2c_reset_#t~mem92#1.offset := read~$Pointer$#6(saa7146_i2c_reset_~dev#1.base, 802 + saa7146_i2c_reset_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := saa7146_i2c_reset_#t~bitwise91#1, saa7146_i2c_reset_#t~mem92#1.base, 144 + saa7146_i2c_reset_#t~mem92#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,591 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4926-2: [2025-02-08 15:24:01,591 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4926-7: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_reset_#t~mem90#1;havoc saa7146_i2c_reset_#t~bitwise91#1;havoc saa7146_i2c_reset_#t~mem92#1.base, saa7146_i2c_reset_#t~mem92#1.offset;call saa7146_i2c_reset_#t~mem93#1.base, saa7146_i2c_reset_#t~mem93#1.offset := read~$Pointer$#6(saa7146_i2c_reset_~dev#1.base, 802 + saa7146_i2c_reset_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := 65537, saa7146_i2c_reset_#t~mem93#1.base, 256 + saa7146_i2c_reset_#t~mem93#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,592 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4926-8: call saa7146_i2c_reset_#t~mem92#1.base, saa7146_i2c_reset_#t~mem92#1.offset := read~$Pointer$#6(saa7146_i2c_reset_~dev#1.base, 802 + saa7146_i2c_reset_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := saa7146_i2c_reset_#t~bitwise91#1, saa7146_i2c_reset_#t~mem92#1.base, 144 + saa7146_i2c_reset_#t~mem92#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,592 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4926-5: assume 0 == saa7146_i2c_reset_#t~mem90#1 % 4294967296 || 128 == saa7146_i2c_reset_#t~mem90#1 % 4294967296;saa7146_i2c_reset_#t~bitwise91#1 := 128; [2025-02-08 15:24:01,592 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4926-5: assume !(0 == saa7146_i2c_reset_#t~mem90#1 % 4294967296 || 128 == saa7146_i2c_reset_#t~mem90#1 % 4294967296); [2025-02-08 15:24:01,592 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4926-6: call saa7146_i2c_reset_#t~mem90#1 := read~int#6(saa7146_i2c_reset_~dev#1.base, 1122 + saa7146_i2c_reset_~dev#1.offset, 4); [2025-02-08 15:24:01,592 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4926-11: assume false;saa7146_i2c_reset_#t~bitwise91#1 := saa7146_i2c_reset_#t~mem90#1; [2025-02-08 15:24:01,592 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4926-11: assume !false; [2025-02-08 15:24:01,592 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4926-12: assume 0 == saa7146_i2c_reset_#t~mem90#1 % 4294967296 || 128 == saa7146_i2c_reset_#t~mem90#1 % 4294967296;saa7146_i2c_reset_#t~bitwise91#1 := 128; [2025-02-08 15:24:01,592 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4926-12: assume !(0 == saa7146_i2c_reset_#t~mem90#1 % 4294967296 || 128 == saa7146_i2c_reset_#t~mem90#1 % 4294967296); [2025-02-08 15:24:01,592 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4926-9: [2025-02-08 15:24:01,593 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4926-10: havoc saa7146_i2c_reset_#t~bitwise91#1;assume (saa7146_i2c_reset_#t~bitwise91#1 % 4294967296 >= saa7146_i2c_reset_#t~mem90#1 % 4294967296 && saa7146_i2c_reset_#t~bitwise91#1 % 4294967296 >= 128) && saa7146_i2c_reset_#t~bitwise91#1 % 4294967296 <= 128 + saa7146_i2c_reset_#t~mem90#1 % 4294967296; [2025-02-08 15:24:01,593 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5455: havoc ldv_mutex_unlock_11_~ldv_func_arg1#1.base, ldv_mutex_unlock_11_~ldv_func_arg1#1.offset;havoc ldv_mutex_unlock_11_#in~ldv_func_arg1#1.base, ldv_mutex_unlock_11_#in~ldv_func_arg1#1.offset;assume { :end_inline_ldv_mutex_unlock_11 } true;saa7146_i2c_transfer_#res#1 := saa7146_i2c_transfer_~err~0#1;call ULTIMATE.dealloc(saa7146_i2c_transfer_~#descriptor~2#1.base, saa7146_i2c_transfer_~#descriptor~2#1.offset);havoc saa7146_i2c_transfer_~#descriptor~2#1.base, saa7146_i2c_transfer_~#descriptor~2#1.offset;call ULTIMATE.dealloc(saa7146_i2c_transfer_~#descriptor___0~2#1.base, saa7146_i2c_transfer_~#descriptor___0~2#1.offset);havoc saa7146_i2c_transfer_~#descriptor___0~2#1.base, saa7146_i2c_transfer_~#descriptor___0~2#1.offset;call ULTIMATE.dealloc(saa7146_i2c_transfer_~#descriptor___1~2#1.base, saa7146_i2c_transfer_~#descriptor___1~2#1.offset);havoc saa7146_i2c_transfer_~#descriptor___1~2#1.base, saa7146_i2c_transfer_~#descriptor___1~2#1.offset;call ULTIMATE.dealloc(saa7146_i2c_transfer_~#descriptor___2~1#1.base, saa7146_i2c_transfer_~#descriptor___2~1#1.offset);havoc saa7146_i2c_transfer_~#descriptor___2~1#1.base, saa7146_i2c_transfer_~#descriptor___2~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_transfer_~#descriptor___3~1#1.base, saa7146_i2c_transfer_~#descriptor___3~1#1.offset);havoc saa7146_i2c_transfer_~#descriptor___3~1#1.base, saa7146_i2c_transfer_~#descriptor___3~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_transfer_~#zero~0#1.base, saa7146_i2c_transfer_~#zero~0#1.offset);havoc saa7146_i2c_transfer_~#zero~0#1.base, saa7146_i2c_transfer_~#zero~0#1.offset; [2025-02-08 15:24:01,593 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5455-1: assume { :begin_inline_ldv_mutex_unlock_11 } true;ldv_mutex_unlock_11_#in~ldv_func_arg1#1.base, ldv_mutex_unlock_11_#in~ldv_func_arg1#1.offset := saa7146_i2c_transfer_~dev#1.base, 966 + saa7146_i2c_transfer_~dev#1.offset;havoc ldv_mutex_unlock_11_~ldv_func_arg1#1.base, ldv_mutex_unlock_11_~ldv_func_arg1#1.offset;ldv_mutex_unlock_11_~ldv_func_arg1#1.base, ldv_mutex_unlock_11_~ldv_func_arg1#1.offset := ldv_mutex_unlock_11_#in~ldv_func_arg1#1.base, ldv_mutex_unlock_11_#in~ldv_func_arg1#1.offset;assume { :begin_inline_ldv_mutex_unlock_i2c_lock_of_saa7146_dev } true;ldv_mutex_unlock_i2c_lock_of_saa7146_dev_#in~lock#1.base, ldv_mutex_unlock_i2c_lock_of_saa7146_dev_#in~lock#1.offset := ldv_mutex_unlock_11_~ldv_func_arg1#1.base, ldv_mutex_unlock_11_~ldv_func_arg1#1.offset;havoc ldv_mutex_unlock_i2c_lock_of_saa7146_dev_~lock#1.base, ldv_mutex_unlock_i2c_lock_of_saa7146_dev_~lock#1.offset;ldv_mutex_unlock_i2c_lock_of_saa7146_dev_~lock#1.base, ldv_mutex_unlock_i2c_lock_of_saa7146_dev_~lock#1.offset := ldv_mutex_unlock_i2c_lock_of_saa7146_dev_#in~lock#1.base, ldv_mutex_unlock_i2c_lock_of_saa7146_dev_#in~lock#1.offset; [2025-02-08 15:24:01,593 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4926-13: call saa7146_i2c_reset_#t~mem90#1 := read~int#6(saa7146_i2c_reset_~dev#1.base, 1122 + saa7146_i2c_reset_~dev#1.offset, 4); [2025-02-08 15:24:01,593 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5323: assume saa7146_i2c_transfer_~count~0#1 < 0;saa7146_i2c_transfer_~err~0#1 := -1; [2025-02-08 15:24:01,593 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5323: assume !(saa7146_i2c_transfer_~count~0#1 < 0);saa7146_i2c_transfer_#t~short205#1 := saa7146_i2c_transfer_~count~0#1 > 3; [2025-02-08 15:24:01,593 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5125: havoc __const_udelay_~arg0#1;havoc __const_udelay_#in~arg0#1;assume { :end_inline___const_udelay } true; [2025-02-08 15:24:01,593 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5125-1: havoc __const_udelay_~arg0#1;havoc __const_udelay_#in~arg0#1;assume { :end_inline___const_udelay } true; [2025-02-08 15:24:01,593 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4927: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_reset_#t~mem93#1.base, saa7146_i2c_reset_#t~mem93#1.offset;assume { :begin_inline_msleep } true;msleep_#in~arg0#1 := 5;havoc msleep_~arg0#1;msleep_~arg0#1 := msleep_#in~arg0#1; [2025-02-08 15:24:01,593 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4927-1: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_reset_#t~mem93#1.base, saa7146_i2c_reset_#t~mem93#1.offset;assume { :begin_inline_msleep } true;msleep_#in~arg0#1 := 5;havoc msleep_~arg0#1;msleep_~arg0#1 := msleep_#in~arg0#1; [2025-02-08 15:24:01,593 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5060-1: assume 0 == saa7146_i2c_writeout_~__ret~0#1; [2025-02-08 15:24:01,593 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5060-1: assume !(0 == saa7146_i2c_writeout_~__ret~0#1); [2025-02-08 15:24:01,593 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5060: assume 0 == saa7146_i2c_writeout_~__ret~0#1; [2025-02-08 15:24:01,593 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5060: assume !(0 == saa7146_i2c_writeout_~__ret~0#1); [2025-02-08 15:24:01,593 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4928-1: havoc msleep_~arg0#1;havoc msleep_#in~arg0#1;assume { :end_inline_msleep } true;call saa7146_i2c_reset_#t~mem94#1 := read~int#6(saa7146_i2c_reset_~dev#1.base, 1122 + saa7146_i2c_reset_~dev#1.offset, 4);call saa7146_i2c_reset_#t~mem95#1.base, saa7146_i2c_reset_#t~mem95#1.offset := read~$Pointer$#6(saa7146_i2c_reset_~dev#1.base, 802 + saa7146_i2c_reset_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := saa7146_i2c_reset_#t~mem94#1, saa7146_i2c_reset_#t~mem95#1.base, 144 + saa7146_i2c_reset_#t~mem95#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,593 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4928: havoc msleep_~arg0#1;havoc msleep_#in~arg0#1;assume { :end_inline_msleep } true;call saa7146_i2c_reset_#t~mem94#1 := read~int#6(saa7146_i2c_reset_~dev#1.base, 1122 + saa7146_i2c_reset_~dev#1.offset, 4);call saa7146_i2c_reset_#t~mem95#1.base, saa7146_i2c_reset_#t~mem95#1.offset := read~$Pointer$#6(saa7146_i2c_reset_~dev#1.base, 802 + saa7146_i2c_reset_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := saa7146_i2c_reset_#t~mem94#1, saa7146_i2c_reset_#t~mem95#1.base, 144 + saa7146_i2c_reset_#t~mem95#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,593 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4862-1: saa7146_i2c_msg_prepare_#res#1 := saa7146_i2c_msg_prepare_~mem~0#1; [2025-02-08 15:24:01,593 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5721: assume 0 == assume_abort_if_not_~cond#1;assume false; [2025-02-08 15:24:01,594 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5721: assume !(0 == assume_abort_if_not_~cond#1); [2025-02-08 15:24:01,594 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5127: havoc msleep_~arg0#1;havoc msleep_#in~arg0#1;assume { :end_inline_msleep } true; [2025-02-08 15:24:01,594 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5127-1: havoc msleep_~arg0#1;havoc msleep_#in~arg0#1;assume { :end_inline_msleep } true; [2025-02-08 15:24:01,594 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4929: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_reset_#t~mem94#1;havoc saa7146_i2c_reset_#t~mem95#1.base, saa7146_i2c_reset_#t~mem95#1.offset;call saa7146_i2c_reset_#t~mem96#1.base, saa7146_i2c_reset_#t~mem96#1.offset := read~$Pointer$#6(saa7146_i2c_reset_~dev#1.base, 802 + saa7146_i2c_reset_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := 65537, saa7146_i2c_reset_#t~mem96#1.base, 256 + saa7146_i2c_reset_#t~mem96#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,594 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4929-1: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_reset_#t~mem94#1;havoc saa7146_i2c_reset_#t~mem95#1.base, saa7146_i2c_reset_#t~mem95#1.offset;call saa7146_i2c_reset_#t~mem96#1.base, saa7146_i2c_reset_#t~mem96#1.offset := read~$Pointer$#6(saa7146_i2c_reset_~dev#1.base, 802 + saa7146_i2c_reset_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := 65537, saa7146_i2c_reset_#t~mem96#1.base, 256 + saa7146_i2c_reset_#t~mem96#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,595 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5392: havoc msleep_~arg0#1;havoc msleep_#in~arg0#1;assume { :end_inline_msleep } true; [2025-02-08 15:24:01,595 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4930: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_reset_#t~mem96#1.base, saa7146_i2c_reset_#t~mem96#1.offset;assume { :begin_inline_msleep } true;msleep_#in~arg0#1 := 5;havoc msleep_~arg0#1;msleep_~arg0#1 := msleep_#in~arg0#1; [2025-02-08 15:24:01,595 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4930-1: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_reset_#t~mem96#1.base, saa7146_i2c_reset_#t~mem96#1.offset;assume { :begin_inline_msleep } true;msleep_#in~arg0#1 := 5;havoc msleep_~arg0#1;msleep_~arg0#1 := msleep_#in~arg0#1; [2025-02-08 15:24:01,595 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5393: assume saa7146_i2c_transfer_~err~0#1 != saa7146_i2c_transfer_~num#1;saa7146_i2c_transfer_~tmp___3~1#1 := saa7146_i2c_transfer_~retries#1;saa7146_i2c_transfer_~retries#1 := saa7146_i2c_transfer_~retries#1 - 1; [2025-02-08 15:24:01,595 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5393: assume !(saa7146_i2c_transfer_~err~0#1 != saa7146_i2c_transfer_~num#1); [2025-02-08 15:24:01,595 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5195: saa7146_i2c_writeout_#t~ret176#1 := ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;havoc ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1;assume { :end_inline_ldv__builtin_expect } true;saa7146_i2c_writeout_~tmp___8~0#1 := saa7146_i2c_writeout_#t~ret176#1;havoc saa7146_i2c_writeout_#t~mem175#1;havoc saa7146_i2c_writeout_#t~ret176#1; [2025-02-08 15:24:01,595 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5261-3: saa7146_i2c_writeout_#res#1 := 0;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset);havoc saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset; [2025-02-08 15:24:01,596 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5195-1: saa7146_i2c_writeout_#t~ret176#1 := ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;havoc ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1;assume { :end_inline_ldv__builtin_expect } true;saa7146_i2c_writeout_~tmp___8~0#1 := saa7146_i2c_writeout_#t~ret176#1;havoc saa7146_i2c_writeout_#t~mem175#1;havoc saa7146_i2c_writeout_#t~ret176#1; [2025-02-08 15:24:01,596 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5261-1: saa7146_i2c_writeout_#res#1 := 0;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset);havoc saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset; [2025-02-08 15:24:01,596 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7111: assume 2 == ~ldv_mutex_i2c_lock_of_saa7146_dev~0; [2025-02-08 15:24:01,596 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7111: assume !(2 == ~ldv_mutex_i2c_lock_of_saa7146_dev~0);assume { :begin_inline_ldv_error } true;assume { :begin_inline_reach_error } true;havoc reach_error_#t~nondet0#1.base, reach_error_#t~nondet0#1.offset; [2025-02-08 15:24:01,596 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4931: havoc msleep_~arg0#1;havoc msleep_#in~arg0#1;assume { :end_inline_msleep } true; [2025-02-08 15:24:01,596 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4931-1: havoc msleep_~arg0#1;havoc msleep_#in~arg0#1;assume { :end_inline_msleep } true; [2025-02-08 15:24:01,596 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4667: test_ti_thread_flag_#t~ret12#1 := variable_test_bit_#res#1;havoc variable_test_bit_~nr#1, variable_test_bit_~addr#1.base, variable_test_bit_~addr#1.offset, variable_test_bit_~oldbit~0#1;havoc variable_test_bit_#in~nr#1, variable_test_bit_#in~addr#1.base, variable_test_bit_#in~addr#1.offset;assume { :end_inline_variable_test_bit } true;test_ti_thread_flag_~tmp~0#1 := test_ti_thread_flag_#t~ret12#1;havoc test_ti_thread_flag_#t~ret12#1;test_ti_thread_flag_#res#1 := test_ti_thread_flag_~tmp~0#1; [2025-02-08 15:24:01,596 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4667-1: test_ti_thread_flag_#t~ret12#1 := variable_test_bit_#res#1;havoc variable_test_bit_~nr#1, variable_test_bit_~addr#1.base, variable_test_bit_~addr#1.offset, variable_test_bit_~oldbit~0#1;havoc variable_test_bit_#in~nr#1, variable_test_bit_#in~addr#1.base, variable_test_bit_#in~addr#1.offset;assume { :end_inline_variable_test_bit } true;test_ti_thread_flag_~tmp~0#1 := test_ti_thread_flag_#t~ret12#1;havoc test_ti_thread_flag_#t~ret12#1;test_ti_thread_flag_#res#1 := test_ti_thread_flag_~tmp~0#1; [2025-02-08 15:24:01,596 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5328-1: saa7146_i2c_transfer_#t~short205#1 := 0 != saa7146_i2c_transfer_#t~bitwise204#1; [2025-02-08 15:24:01,596 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5328-2: [2025-02-08 15:24:01,596 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5328: assume saa7146_i2c_transfer_#t~short205#1;havoc saa7146_i2c_transfer_#t~mem202#1.base, saa7146_i2c_transfer_#t~mem202#1.offset;havoc saa7146_i2c_transfer_#t~mem203#1;havoc saa7146_i2c_transfer_#t~bitwise204#1;havoc saa7146_i2c_transfer_#t~short205#1;saa7146_i2c_transfer_~short_delay~0#1 := 1; [2025-02-08 15:24:01,596 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5328: assume !saa7146_i2c_transfer_#t~short205#1;havoc saa7146_i2c_transfer_#t~mem202#1.base, saa7146_i2c_transfer_#t~mem202#1.offset;havoc saa7146_i2c_transfer_#t~mem203#1;havoc saa7146_i2c_transfer_#t~bitwise204#1;havoc saa7146_i2c_transfer_#t~short205#1; [2025-02-08 15:24:01,596 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5196-1: assume 0 != saa7146_i2c_writeout_~tmp___8~0#1;assume { :begin_inline___dynamic_pr_debug } true;__dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset := saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset, 55, 0;havoc __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;__dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset := __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset;__dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset := __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;havoc __dynamic_pr_debug_#t~nondet691#1;__dynamic_pr_debug_#res#1 := __dynamic_pr_debug_#t~nondet691#1;havoc __dynamic_pr_debug_#t~nondet691#1; [2025-02-08 15:24:01,596 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5196-1: assume !(0 != saa7146_i2c_writeout_~tmp___8~0#1); [2025-02-08 15:24:01,596 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5328-5: assume 0 == saa7146_i2c_transfer_#t~mem203#1;saa7146_i2c_transfer_#t~bitwise204#1 := 0; [2025-02-08 15:24:01,596 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5328-5: assume !(0 == saa7146_i2c_transfer_#t~mem203#1); [2025-02-08 15:24:01,596 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5328-6: assume saa7146_i2c_transfer_#t~short205#1; [2025-02-08 15:24:01,596 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5328-6: assume !saa7146_i2c_transfer_#t~short205#1;call saa7146_i2c_transfer_#t~mem202#1.base, saa7146_i2c_transfer_#t~mem202#1.offset := read~$Pointer$#6(saa7146_i2c_transfer_~dev#1.base, 926 + saa7146_i2c_transfer_~dev#1.offset, 8);call saa7146_i2c_transfer_#t~mem203#1 := read~int#5(saa7146_i2c_transfer_#t~mem202#1.base, 32 + saa7146_i2c_transfer_#t~mem202#1.offset, 4); [2025-02-08 15:24:01,596 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5328-3: havoc saa7146_i2c_transfer_#t~bitwise204#1;assume ((((saa7146_i2c_transfer_#t~mem203#1 < 0 || saa7146_i2c_transfer_#t~bitwise204#1 <= saa7146_i2c_transfer_#t~mem203#1) && saa7146_i2c_transfer_#t~bitwise204#1 <= 2) && saa7146_i2c_transfer_#t~bitwise204#1 >= 0) && (saa7146_i2c_transfer_#t~mem203#1 >= 0 || saa7146_i2c_transfer_#t~bitwise204#1 > 2 + saa7146_i2c_transfer_#t~mem203#1)) && saa7146_i2c_transfer_#t~bitwise204#1 >= -2147483648; [2025-02-08 15:24:01,596 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5196: assume 0 != saa7146_i2c_writeout_~tmp___8~0#1;assume { :begin_inline___dynamic_pr_debug } true;__dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset := saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset, 55, 0;havoc __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;__dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset := __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset;__dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset := __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;havoc __dynamic_pr_debug_#t~nondet691#1;__dynamic_pr_debug_#res#1 := __dynamic_pr_debug_#t~nondet691#1;havoc __dynamic_pr_debug_#t~nondet691#1; [2025-02-08 15:24:01,596 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5196: assume !(0 != saa7146_i2c_writeout_~tmp___8~0#1); [2025-02-08 15:24:01,597 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5328-4: assume 2 == saa7146_i2c_transfer_#t~mem203#1;saa7146_i2c_transfer_#t~bitwise204#1 := saa7146_i2c_transfer_#t~mem203#1; [2025-02-08 15:24:01,597 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5328-4: assume !(2 == saa7146_i2c_transfer_#t~mem203#1); [2025-02-08 15:24:01,597 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5396: assume 0 != saa7146_i2c_transfer_~tmp___3~1#1; [2025-02-08 15:24:01,597 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5396: assume !(0 != saa7146_i2c_transfer_~tmp___3~1#1); [2025-02-08 15:24:01,597 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5132-1: assume 0 != saa7146_i2c_writeout_~status~1#1 % 128 % 4294967296; [2025-02-08 15:24:01,597 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5132-1: assume !(0 != saa7146_i2c_writeout_~status~1#1 % 128 % 4294967296);call saa7146_i2c_writeout_#t~mem188#1.base, saa7146_i2c_writeout_#t~mem188#1.offset := read~$Pointer$#6(saa7146_i2c_writeout_~dev#1.base, 802 + saa7146_i2c_writeout_~dev#1.offset, 8);assume { :begin_inline_readl } true;readl_#in~addr#1.base, readl_#in~addr#1.offset := saa7146_i2c_writeout_#t~mem188#1.base, 140 + saa7146_i2c_writeout_#t~mem188#1.offset;havoc readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;readl_~addr#1.base, readl_~addr#1.offset := readl_#in~addr#1.base, readl_#in~addr#1.offset;havoc readl_~ret~0#1;readl_#res#1 := readl_~ret~0#1; [2025-02-08 15:24:01,597 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5132: assume 0 != saa7146_i2c_writeout_~status~1#1 % 128 % 4294967296; [2025-02-08 15:24:01,598 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5132: assume !(0 != saa7146_i2c_writeout_~status~1#1 % 128 % 4294967296);call saa7146_i2c_writeout_#t~mem188#1.base, saa7146_i2c_writeout_#t~mem188#1.offset := read~$Pointer$#6(saa7146_i2c_writeout_~dev#1.base, 802 + saa7146_i2c_writeout_~dev#1.offset, 8);assume { :begin_inline_readl } true;readl_#in~addr#1.base, readl_#in~addr#1.offset := saa7146_i2c_writeout_#t~mem188#1.base, 140 + saa7146_i2c_writeout_#t~mem188#1.offset;havoc readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;readl_~addr#1.base, readl_~addr#1.offset := readl_#in~addr#1.base, readl_#in~addr#1.offset;havoc readl_~ret~0#1;readl_#res#1 := readl_~ret~0#1; [2025-02-08 15:24:01,598 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4934: saa7146_i2c_reset_#t~ret97#1 := saa7146_i2c_status_#res#1;havoc saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset, saa7146_i2c_status_#t~ret50#1, saa7146_i2c_status_~dev#1.base, saa7146_i2c_status_~dev#1.offset, saa7146_i2c_status_~iicsta~0#1, saa7146_i2c_status_~tmp~6#1;havoc saa7146_i2c_status_#in~dev#1.base, saa7146_i2c_status_#in~dev#1.offset;assume { :end_inline_saa7146_i2c_status } true;saa7146_i2c_reset_~status~0#1 := saa7146_i2c_reset_#t~ret97#1;havoc saa7146_i2c_reset_#t~ret97#1;call saa7146_i2c_reset_#t~mem98#1 := read~int#6(saa7146_i2c_reset_~dev#1.base, 1122 + saa7146_i2c_reset_~dev#1.offset, 4); [2025-02-08 15:24:01,598 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4934-3: assume { :begin_inline_saa7146_i2c_status } true;saa7146_i2c_status_#in~dev#1.base, saa7146_i2c_status_#in~dev#1.offset := saa7146_i2c_reset_~dev#1.base, saa7146_i2c_reset_~dev#1.offset;havoc saa7146_i2c_status_#res#1;havoc saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset, saa7146_i2c_status_#t~ret50#1, saa7146_i2c_status_~dev#1.base, saa7146_i2c_status_~dev#1.offset, saa7146_i2c_status_~iicsta~0#1, saa7146_i2c_status_~tmp~6#1;saa7146_i2c_status_~dev#1.base, saa7146_i2c_status_~dev#1.offset := saa7146_i2c_status_#in~dev#1.base, saa7146_i2c_status_#in~dev#1.offset;havoc saa7146_i2c_status_~iicsta~0#1;havoc saa7146_i2c_status_~tmp~6#1;call saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset := read~$Pointer$#6(saa7146_i2c_status_~dev#1.base, 802 + saa7146_i2c_status_~dev#1.offset, 8);assume { :begin_inline_readl } true;readl_#in~addr#1.base, readl_#in~addr#1.offset := saa7146_i2c_status_#t~mem49#1.base, 144 + saa7146_i2c_status_#t~mem49#1.offset;havoc readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;readl_~addr#1.base, readl_~addr#1.offset := readl_#in~addr#1.base, readl_#in~addr#1.offset;havoc readl_~ret~0#1;readl_#res#1 := readl_~ret~0#1; [2025-02-08 15:24:01,598 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4934-1: assume { :begin_inline_saa7146_i2c_status } true;saa7146_i2c_status_#in~dev#1.base, saa7146_i2c_status_#in~dev#1.offset := saa7146_i2c_reset_~dev#1.base, saa7146_i2c_reset_~dev#1.offset;havoc saa7146_i2c_status_#res#1;havoc saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset, saa7146_i2c_status_#t~ret50#1, saa7146_i2c_status_~dev#1.base, saa7146_i2c_status_~dev#1.offset, saa7146_i2c_status_~iicsta~0#1, saa7146_i2c_status_~tmp~6#1;saa7146_i2c_status_~dev#1.base, saa7146_i2c_status_~dev#1.offset := saa7146_i2c_status_#in~dev#1.base, saa7146_i2c_status_#in~dev#1.offset;havoc saa7146_i2c_status_~iicsta~0#1;havoc saa7146_i2c_status_~tmp~6#1;call saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset := read~$Pointer$#6(saa7146_i2c_status_~dev#1.base, 802 + saa7146_i2c_status_~dev#1.offset, 8);assume { :begin_inline_readl } true;readl_#in~addr#1.base, readl_#in~addr#1.offset := saa7146_i2c_status_#t~mem49#1.base, 144 + saa7146_i2c_status_#t~mem49#1.offset;havoc readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;readl_~addr#1.base, readl_~addr#1.offset := readl_#in~addr#1.base, readl_#in~addr#1.offset;havoc readl_~ret~0#1;readl_#res#1 := readl_~ret~0#1; [2025-02-08 15:24:01,598 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4934-2: saa7146_i2c_reset_#t~ret97#1 := saa7146_i2c_status_#res#1;havoc saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset, saa7146_i2c_status_#t~ret50#1, saa7146_i2c_status_~dev#1.base, saa7146_i2c_status_~dev#1.offset, saa7146_i2c_status_~iicsta~0#1, saa7146_i2c_status_~tmp~6#1;havoc saa7146_i2c_status_#in~dev#1.base, saa7146_i2c_status_#in~dev#1.offset;assume { :end_inline_saa7146_i2c_status } true;saa7146_i2c_reset_~status~0#1 := saa7146_i2c_reset_#t~ret97#1;havoc saa7146_i2c_reset_#t~ret97#1;call saa7146_i2c_reset_#t~mem98#1 := read~int#6(saa7146_i2c_reset_~dev#1.base, 1122 + saa7146_i2c_reset_~dev#1.offset, 4); [2025-02-08 15:24:01,598 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5133-2: havoc saa7146_i2c_writeout_#t~bitwise158#1;assume saa7146_i2c_writeout_#t~bitwise158#1 % 4294967296 <= saa7146_i2c_writeout_~status~1#1 % 4294967296 && saa7146_i2c_writeout_#t~bitwise158#1 % 4294967296 <= 2; [2025-02-08 15:24:01,598 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7115: ~ldv_mutex_i2c_lock_of_saa7146_dev~0 := 1; [2025-02-08 15:24:01,598 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5133-3: assume 2 == saa7146_i2c_writeout_~status~1#1 % 4294967296;saa7146_i2c_writeout_#t~bitwise158#1 := saa7146_i2c_writeout_~status~1#1; [2025-02-08 15:24:01,598 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5133-3: assume !(2 == saa7146_i2c_writeout_~status~1#1 % 4294967296); [2025-02-08 15:24:01,598 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5133: assume 0 == saa7146_i2c_writeout_#t~bitwise158#1 % 4294967296 || 0 == saa7146_i2c_writeout_~status~1#1 % 2 % 4294967296;havoc saa7146_i2c_writeout_#t~bitwise158#1; [2025-02-08 15:24:01,598 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5133: assume !(0 == saa7146_i2c_writeout_#t~bitwise158#1 % 4294967296 || 0 == saa7146_i2c_writeout_~status~1#1 % 2 % 4294967296);havoc saa7146_i2c_writeout_#t~bitwise158#1; [2025-02-08 15:24:01,598 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5133-1: [2025-02-08 15:24:01,598 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4935: assume saa7146_i2c_reset_#t~mem98#1 % 4294967296 != saa7146_i2c_reset_~status~0#1 % 4294967296;havoc saa7146_i2c_reset_#t~mem98#1; [2025-02-08 15:24:01,598 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4935: assume !(saa7146_i2c_reset_#t~mem98#1 % 4294967296 != saa7146_i2c_reset_~status~0#1 % 4294967296);havoc saa7146_i2c_reset_#t~mem98#1; [2025-02-08 15:24:01,598 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5133-6: [2025-02-08 15:24:01,598 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5133-7: havoc saa7146_i2c_writeout_#t~bitwise158#1;assume saa7146_i2c_writeout_#t~bitwise158#1 % 4294967296 <= saa7146_i2c_writeout_~status~1#1 % 4294967296 && saa7146_i2c_writeout_#t~bitwise158#1 % 4294967296 <= 2; [2025-02-08 15:24:01,598 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4935-1: assume saa7146_i2c_reset_#t~mem98#1 % 4294967296 != saa7146_i2c_reset_~status~0#1 % 4294967296;havoc saa7146_i2c_reset_#t~mem98#1; [2025-02-08 15:24:01,599 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4935-1: assume !(saa7146_i2c_reset_#t~mem98#1 % 4294967296 != saa7146_i2c_reset_~status~0#1 % 4294967296);havoc saa7146_i2c_reset_#t~mem98#1; [2025-02-08 15:24:01,599 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5133-4: assume 0 == saa7146_i2c_writeout_~status~1#1 % 4294967296;saa7146_i2c_writeout_#t~bitwise158#1 := 0; [2025-02-08 15:24:01,599 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5133-4: assume !(0 == saa7146_i2c_writeout_~status~1#1 % 4294967296); [2025-02-08 15:24:01,599 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5133-5: assume 0 == saa7146_i2c_writeout_#t~bitwise158#1 % 4294967296 || 0 == saa7146_i2c_writeout_~status~1#1 % 2 % 4294967296;havoc saa7146_i2c_writeout_#t~bitwise158#1; [2025-02-08 15:24:01,599 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5133-5: assume !(0 == saa7146_i2c_writeout_#t~bitwise158#1 % 4294967296 || 0 == saa7146_i2c_writeout_~status~1#1 % 2 % 4294967296);havoc saa7146_i2c_writeout_#t~bitwise158#1; [2025-02-08 15:24:01,599 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5133-8: assume 2 == saa7146_i2c_writeout_~status~1#1 % 4294967296;saa7146_i2c_writeout_#t~bitwise158#1 := saa7146_i2c_writeout_~status~1#1; [2025-02-08 15:24:01,599 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5133-8: assume !(2 == saa7146_i2c_writeout_~status~1#1 % 4294967296); [2025-02-08 15:24:01,599 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5133-9: assume 0 == saa7146_i2c_writeout_~status~1#1 % 4294967296;saa7146_i2c_writeout_#t~bitwise158#1 := 0; [2025-02-08 15:24:01,599 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5133-9: assume !(0 == saa7146_i2c_writeout_~status~1#1 % 4294967296); [2025-02-08 15:24:01,599 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5530: havoc main_#t~nondet243#1;main_~tmp~12#1 := main_#t~nondet243#1;main_#t~switch244#1 := 0 == main_~tmp~12#1; [2025-02-08 15:24:01,599 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5134: assume 0 != saa7146_i2c_writeout_#t~bitwise159#1 % 4294967296;havoc saa7146_i2c_writeout_#t~bitwise159#1;call write~$Pointer$#10(33, 0, saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset, 8);call write~$Pointer$#10(34, 0, saa7146_i2c_writeout_~#descriptor___0~1#1.base, 8 + saa7146_i2c_writeout_~#descriptor___0~1#1.offset, 8);call write~$Pointer$#10(35, 0, saa7146_i2c_writeout_~#descriptor___0~1#1.base, 16 + saa7146_i2c_writeout_~#descriptor___0~1#1.offset, 8);call write~$Pointer$#10(36, 0, saa7146_i2c_writeout_~#descriptor___0~1#1.base, 24 + saa7146_i2c_writeout_~#descriptor___0~1#1.offset, 8);call write~int#10(310, saa7146_i2c_writeout_~#descriptor___0~1#1.base, 32 + saa7146_i2c_writeout_~#descriptor___0~1#1.offset, 4);call write~int#10(0, saa7146_i2c_writeout_~#descriptor___0~1#1.base, 36 + saa7146_i2c_writeout_~#descriptor___0~1#1.offset, 1);call saa7146_i2c_writeout_#t~mem160#1 := read~int#10(saa7146_i2c_writeout_~#descriptor___0~1#1.base, 36 + saa7146_i2c_writeout_~#descriptor___0~1#1.offset, 1);assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if saa7146_i2c_writeout_#t~mem160#1 % 256 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_writeout_#t~mem160#1 % 256 % 18446744073709551616 else saa7146_i2c_writeout_#t~mem160#1 % 256 % 18446744073709551616 - 18446744073709551616) % 2, 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; [2025-02-08 15:24:01,599 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5134: assume !(0 != saa7146_i2c_writeout_#t~bitwise159#1 % 4294967296);havoc saa7146_i2c_writeout_#t~bitwise159#1; [2025-02-08 15:24:01,599 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5134-3: assume 8 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_writeout_#t~bitwise159#1 := ~saa7146_debug~0; [2025-02-08 15:24:01,599 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5134-3: assume !(8 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,599 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5134-4: assume 0 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_writeout_#t~bitwise159#1 := 0; [2025-02-08 15:24:01,599 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5134-4: assume !(0 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,599 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5134-1: [2025-02-08 15:24:01,599 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5134-2: havoc saa7146_i2c_writeout_#t~bitwise159#1;assume saa7146_i2c_writeout_#t~bitwise159#1 % 4294967296 <= ~saa7146_debug~0 % 4294967296 && saa7146_i2c_writeout_#t~bitwise159#1 % 4294967296 <= 8; [2025-02-08 15:24:01,599 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4936-1: [2025-02-08 15:24:01,599 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5134-7: havoc saa7146_i2c_writeout_#t~bitwise159#1;assume saa7146_i2c_writeout_#t~bitwise159#1 % 4294967296 <= ~saa7146_debug~0 % 4294967296 && saa7146_i2c_writeout_#t~bitwise159#1 % 4294967296 <= 8; [2025-02-08 15:24:01,599 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4936-2: havoc saa7146_i2c_reset_#t~bitwise99#1;assume saa7146_i2c_reset_#t~bitwise99#1 % 4294967296 <= ~saa7146_debug~0 % 4294967296 && saa7146_i2c_reset_#t~bitwise99#1 % 4294967296 <= 8; [2025-02-08 15:24:01,600 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5134-8: assume 8 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_writeout_#t~bitwise159#1 := ~saa7146_debug~0; [2025-02-08 15:24:01,600 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5134-8: assume !(8 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,600 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5134-5: assume 0 != saa7146_i2c_writeout_#t~bitwise159#1 % 4294967296;havoc saa7146_i2c_writeout_#t~bitwise159#1;call write~$Pointer$#10(33, 0, saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset, 8);call write~$Pointer$#10(34, 0, saa7146_i2c_writeout_~#descriptor___0~1#1.base, 8 + saa7146_i2c_writeout_~#descriptor___0~1#1.offset, 8);call write~$Pointer$#10(35, 0, saa7146_i2c_writeout_~#descriptor___0~1#1.base, 16 + saa7146_i2c_writeout_~#descriptor___0~1#1.offset, 8);call write~$Pointer$#10(36, 0, saa7146_i2c_writeout_~#descriptor___0~1#1.base, 24 + saa7146_i2c_writeout_~#descriptor___0~1#1.offset, 8);call write~int#10(310, saa7146_i2c_writeout_~#descriptor___0~1#1.base, 32 + saa7146_i2c_writeout_~#descriptor___0~1#1.offset, 4);call write~int#10(0, saa7146_i2c_writeout_~#descriptor___0~1#1.base, 36 + saa7146_i2c_writeout_~#descriptor___0~1#1.offset, 1);call saa7146_i2c_writeout_#t~mem160#1 := read~int#10(saa7146_i2c_writeout_~#descriptor___0~1#1.base, 36 + saa7146_i2c_writeout_~#descriptor___0~1#1.offset, 1);assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if saa7146_i2c_writeout_#t~mem160#1 % 256 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_writeout_#t~mem160#1 % 256 % 18446744073709551616 else saa7146_i2c_writeout_#t~mem160#1 % 256 % 18446744073709551616 - 18446744073709551616) % 2, 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; [2025-02-08 15:24:01,600 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5134-5: assume !(0 != saa7146_i2c_writeout_#t~bitwise159#1 % 4294967296);havoc saa7146_i2c_writeout_#t~bitwise159#1; [2025-02-08 15:24:01,600 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4936: assume 0 != saa7146_i2c_reset_#t~bitwise99#1 % 4294967296;havoc saa7146_i2c_reset_#t~bitwise99#1;call write~$Pointer$#10(9, 0, saa7146_i2c_reset_~#descriptor___0~0#1.base, saa7146_i2c_reset_~#descriptor___0~0#1.offset, 8);call write~$Pointer$#10(10, 0, saa7146_i2c_reset_~#descriptor___0~0#1.base, 8 + saa7146_i2c_reset_~#descriptor___0~0#1.offset, 8);call write~$Pointer$#10(11, 0, saa7146_i2c_reset_~#descriptor___0~0#1.base, 16 + saa7146_i2c_reset_~#descriptor___0~0#1.offset, 8);call write~$Pointer$#10(12, 0, saa7146_i2c_reset_~#descriptor___0~0#1.base, 24 + saa7146_i2c_reset_~#descriptor___0~0#1.offset, 8);call write~int#10(193, saa7146_i2c_reset_~#descriptor___0~0#1.base, 32 + saa7146_i2c_reset_~#descriptor___0~0#1.offset, 4);call write~int#10(0, saa7146_i2c_reset_~#descriptor___0~0#1.base, 36 + saa7146_i2c_reset_~#descriptor___0~0#1.offset, 1);call saa7146_i2c_reset_#t~mem100#1 := read~int#10(saa7146_i2c_reset_~#descriptor___0~0#1.base, 36 + saa7146_i2c_reset_~#descriptor___0~0#1.offset, 1);assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if saa7146_i2c_reset_#t~mem100#1 % 256 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_reset_#t~mem100#1 % 256 % 18446744073709551616 else saa7146_i2c_reset_#t~mem100#1 % 256 % 18446744073709551616 - 18446744073709551616) % 2, 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; [2025-02-08 15:24:01,600 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4936: assume !(0 != saa7146_i2c_reset_#t~bitwise99#1 % 4294967296);havoc saa7146_i2c_reset_#t~bitwise99#1; [2025-02-08 15:24:01,601 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5134-6: [2025-02-08 15:24:01,601 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4936-5: assume 0 != saa7146_i2c_reset_#t~bitwise99#1 % 4294967296;havoc saa7146_i2c_reset_#t~bitwise99#1;call write~$Pointer$#10(9, 0, saa7146_i2c_reset_~#descriptor___0~0#1.base, saa7146_i2c_reset_~#descriptor___0~0#1.offset, 8);call write~$Pointer$#10(10, 0, saa7146_i2c_reset_~#descriptor___0~0#1.base, 8 + saa7146_i2c_reset_~#descriptor___0~0#1.offset, 8);call write~$Pointer$#10(11, 0, saa7146_i2c_reset_~#descriptor___0~0#1.base, 16 + saa7146_i2c_reset_~#descriptor___0~0#1.offset, 8);call write~$Pointer$#10(12, 0, saa7146_i2c_reset_~#descriptor___0~0#1.base, 24 + saa7146_i2c_reset_~#descriptor___0~0#1.offset, 8);call write~int#10(193, saa7146_i2c_reset_~#descriptor___0~0#1.base, 32 + saa7146_i2c_reset_~#descriptor___0~0#1.offset, 4);call write~int#10(0, saa7146_i2c_reset_~#descriptor___0~0#1.base, 36 + saa7146_i2c_reset_~#descriptor___0~0#1.offset, 1);call saa7146_i2c_reset_#t~mem100#1 := read~int#10(saa7146_i2c_reset_~#descriptor___0~0#1.base, 36 + saa7146_i2c_reset_~#descriptor___0~0#1.offset, 1);assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if saa7146_i2c_reset_#t~mem100#1 % 256 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_reset_#t~mem100#1 % 256 % 18446744073709551616 else saa7146_i2c_reset_#t~mem100#1 % 256 % 18446744073709551616 - 18446744073709551616) % 2, 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; [2025-02-08 15:24:01,601 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4936-5: assume !(0 != saa7146_i2c_reset_#t~bitwise99#1 % 4294967296);havoc saa7146_i2c_reset_#t~bitwise99#1; [2025-02-08 15:24:01,601 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4936-6: [2025-02-08 15:24:01,601 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4936-3: assume 8 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_reset_#t~bitwise99#1 := ~saa7146_debug~0; [2025-02-08 15:24:01,601 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4936-3: assume !(8 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,601 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5134-9: assume 0 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_writeout_#t~bitwise159#1 := 0; [2025-02-08 15:24:01,601 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5134-9: assume !(0 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,601 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4936-4: assume 0 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_reset_#t~bitwise99#1 := 0; [2025-02-08 15:24:01,601 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4936-4: assume !(0 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,601 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4936-9: assume 0 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_reset_#t~bitwise99#1 := 0; [2025-02-08 15:24:01,601 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4936-9: assume !(0 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,601 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4936-7: havoc saa7146_i2c_reset_#t~bitwise99#1;assume saa7146_i2c_reset_#t~bitwise99#1 % 4294967296 <= ~saa7146_debug~0 % 4294967296 && saa7146_i2c_reset_#t~bitwise99#1 % 4294967296 <= 8; [2025-02-08 15:24:01,601 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4936-8: assume 8 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_reset_#t~bitwise99#1 := ~saa7146_debug~0; [2025-02-08 15:24:01,601 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4936-8: assume !(8 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,602 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5333: assume { :begin_inline_saa7146_i2c_reset } true;saa7146_i2c_reset_#in~dev#1.base, saa7146_i2c_reset_#in~dev#1.offset := saa7146_i2c_transfer_~dev#1.base, saa7146_i2c_transfer_~dev#1.offset;havoc saa7146_i2c_reset_#res#1;havoc saa7146_i2c_reset_#t~ret82#1, saa7146_i2c_reset_#t~mem83#1, saa7146_i2c_reset_#t~mem84#1.base, saa7146_i2c_reset_#t~mem84#1.offset, saa7146_i2c_reset_#t~mem85#1.base, saa7146_i2c_reset_#t~mem85#1.offset, saa7146_i2c_reset_#t~bitwise86#1, saa7146_i2c_reset_#t~mem87#1, saa7146_i2c_reset_#t~ret88#1, saa7146_i2c_reset_#t~ret89#1, saa7146_i2c_reset_#t~mem90#1, saa7146_i2c_reset_#t~bitwise91#1, saa7146_i2c_reset_#t~mem92#1.base, saa7146_i2c_reset_#t~mem92#1.offset, saa7146_i2c_reset_#t~mem93#1.base, saa7146_i2c_reset_#t~mem93#1.offset, saa7146_i2c_reset_#t~mem94#1, saa7146_i2c_reset_#t~mem95#1.base, saa7146_i2c_reset_#t~mem95#1.offset, saa7146_i2c_reset_#t~mem96#1.base, saa7146_i2c_reset_#t~mem96#1.offset, saa7146_i2c_reset_#t~ret97#1, saa7146_i2c_reset_#t~mem98#1, saa7146_i2c_reset_#t~bitwise99#1, saa7146_i2c_reset_#t~mem100#1, saa7146_i2c_reset_#t~ret101#1, saa7146_i2c_reset_#t~ret102#1, saa7146_i2c_reset_#t~mem103#1, saa7146_i2c_reset_#t~bitwise104#1, saa7146_i2c_reset_#t~mem105#1.base, saa7146_i2c_reset_#t~mem105#1.offset, saa7146_i2c_reset_#t~mem106#1.base, saa7146_i2c_reset_#t~mem106#1.offset, saa7146_i2c_reset_#t~mem107#1, saa7146_i2c_reset_#t~mem108#1.base, saa7146_i2c_reset_#t~mem108#1.offset, saa7146_i2c_reset_#t~mem109#1.base, saa7146_i2c_reset_#t~mem109#1.offset, saa7146_i2c_reset_#t~mem110#1, saa7146_i2c_reset_#t~mem111#1.base, saa7146_i2c_reset_#t~mem111#1.offset, saa7146_i2c_reset_#t~mem112#1.base, saa7146_i2c_reset_#t~mem112#1.offset, saa7146_i2c_reset_#t~ret113#1, saa7146_i2c_reset_#t~mem114#1, saa7146_i2c_reset_#t~bitwise115#1, saa7146_i2c_reset_#t~mem116#1, saa7146_i2c_reset_#t~ret117#1, saa7146_i2c_reset_#t~ret118#1, saa7146_i2c_reset_~dev#1.base, saa7146_i2c_reset_~dev#1.offset, saa7146_i2c_reset_~status~0#1, saa7146_i2c_reset_~tmp~7#1, saa7146_i2c_reset_~#descriptor~0#1.base, saa7146_i2c_reset_~#descriptor~0#1.offset, saa7146_i2c_reset_~tmp___0~3#1, saa7146_i2c_reset_~#descriptor___0~0#1.base, saa7146_i2c_reset_~#descriptor___0~0#1.offset, saa7146_i2c_reset_~tmp___1~0#1, saa7146_i2c_reset_~#descriptor___1~0#1.base, saa7146_i2c_reset_~#descriptor___1~0#1.offset, saa7146_i2c_reset_~tmp___2~0#1;saa7146_i2c_reset_~dev#1.base, saa7146_i2c_reset_~dev#1.offset := saa7146_i2c_reset_#in~dev#1.base, saa7146_i2c_reset_#in~dev#1.offset;havoc saa7146_i2c_reset_~status~0#1;havoc saa7146_i2c_reset_~tmp~7#1;call saa7146_i2c_reset_~#descriptor~0#1.base, saa7146_i2c_reset_~#descriptor~0#1.offset := #Ultimate.allocOnStack(37);havoc saa7146_i2c_reset_~tmp___0~3#1;call saa7146_i2c_reset_~#descriptor___0~0#1.base, saa7146_i2c_reset_~#descriptor___0~0#1.offset := #Ultimate.allocOnStack(37);havoc saa7146_i2c_reset_~tmp___1~0#1;call saa7146_i2c_reset_~#descriptor___1~0#1.base, saa7146_i2c_reset_~#descriptor___1~0#1.offset := #Ultimate.allocOnStack(37);havoc saa7146_i2c_reset_~tmp___2~0#1;assume { :begin_inline_saa7146_i2c_status } true;saa7146_i2c_status_#in~dev#1.base, saa7146_i2c_status_#in~dev#1.offset := saa7146_i2c_reset_~dev#1.base, saa7146_i2c_reset_~dev#1.offset;havoc saa7146_i2c_status_#res#1;havoc saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset, saa7146_i2c_status_#t~ret50#1, saa7146_i2c_status_~dev#1.base, saa7146_i2c_status_~dev#1.offset, saa7146_i2c_status_~iicsta~0#1, saa7146_i2c_status_~tmp~6#1;saa7146_i2c_status_~dev#1.base, saa7146_i2c_status_~dev#1.offset := saa7146_i2c_status_#in~dev#1.base, saa7146_i2c_status_#in~dev#1.offset;havoc saa7146_i2c_status_~iicsta~0#1;havoc saa7146_i2c_status_~tmp~6#1;call saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset := read~$Pointer$#6(saa7146_i2c_status_~dev#1.base, 802 + saa7146_i2c_status_~dev#1.offset, 8);assume { :begin_inline_readl } true;readl_#in~addr#1.base, readl_#in~addr#1.offset := saa7146_i2c_status_#t~mem49#1.base, 144 + saa7146_i2c_status_#t~mem49#1.offset;havoc readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;readl_~addr#1.base, readl_~addr#1.offset := readl_#in~addr#1.base, readl_#in~addr#1.offset;havoc readl_~ret~0#1;readl_#res#1 := readl_~ret~0#1; [2025-02-08 15:24:01,602 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5730: havoc ldv_malloc_~res~0#1.base, ldv_malloc_~res~0#1.offset;dev_get_drvdata_#t~ret694#1.base, dev_get_drvdata_#t~ret694#1.offset := ldv_malloc_#res#1.base, ldv_malloc_#res#1.offset;havoc ldv_malloc_#t~nondet280#1, ldv_malloc_#t~malloc281#1.base, ldv_malloc_#t~malloc281#1.offset, ldv_malloc_#t~ret282#1, ldv_malloc_~res~0#1.base, ldv_malloc_~res~0#1.offset, ldv_malloc_~size#1;havoc ldv_malloc_#in~size#1;assume { :end_inline_ldv_malloc } true;dev_get_drvdata_#res#1.base, dev_get_drvdata_#res#1.offset := dev_get_drvdata_#t~ret694#1.base, dev_get_drvdata_#t~ret694#1.offset;havoc dev_get_drvdata_#t~ret694#1.base, dev_get_drvdata_#t~ret694#1.offset; [2025-02-08 15:24:01,602 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5730-1: assume 0 != ldv_malloc_#t~nondet280#1;havoc ldv_malloc_#t~nondet280#1;call ldv_malloc_#t~malloc281#1.base, ldv_malloc_#t~malloc281#1.offset := #Ultimate.allocOnHeap(ldv_malloc_~size#1 % 18446744073709551616);ldv_malloc_~res~0#1.base, ldv_malloc_~res~0#1.offset := ldv_malloc_#t~malloc281#1.base, ldv_malloc_#t~malloc281#1.offset;havoc ldv_malloc_#t~malloc281#1.base, ldv_malloc_#t~malloc281#1.offset;assume { :begin_inline_ldv_is_err } true;ldv_is_err_#in~ptr#1.base, ldv_is_err_#in~ptr#1.offset := ldv_malloc_~res~0#1.base, ldv_malloc_~res~0#1.offset;havoc ldv_is_err_#res#1;havoc ldv_is_err_~ptr#1.base, ldv_is_err_~ptr#1.offset;ldv_is_err_~ptr#1.base, ldv_is_err_~ptr#1.offset := ldv_is_err_#in~ptr#1.base, ldv_is_err_#in~ptr#1.offset;ldv_is_err_#res#1 := (if (ldv_is_err_~ptr#1.base + ldv_is_err_~ptr#1.offset) % 18446744073709551616 > 18446744073709547521 then 1 else 0); [2025-02-08 15:24:01,602 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5730-1: assume !(0 != ldv_malloc_#t~nondet280#1);havoc ldv_malloc_#t~nondet280#1;ldv_malloc_#res#1.base, ldv_malloc_#res#1.offset := 0, 0; [2025-02-08 15:24:01,602 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5532: assume main_#t~switch244#1;assume { :begin_inline_ldv_handler_precall } true; [2025-02-08 15:24:01,602 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5532: assume !main_#t~switch244#1;main_#t~switch244#1 := main_#t~switch244#1 || 1 == main_~tmp~12#1; [2025-02-08 15:24:01,602 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5334: assume saa7146_i2c_transfer_~err~0#1 < 0; [2025-02-08 15:24:01,602 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5334: assume !(saa7146_i2c_transfer_~err~0#1 < 0);saa7146_i2c_transfer_~i~2#1 := 0; [2025-02-08 15:24:01,602 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5467: saa7146_i2c_xfer_#t~ret232#1.base, saa7146_i2c_xfer_#t~ret232#1.offset := i2c_get_adapdata_#res#1.base, i2c_get_adapdata_#res#1.offset;havoc i2c_get_adapdata_#t~ret35#1.base, i2c_get_adapdata_#t~ret35#1.offset, i2c_get_adapdata_~dev#1.base, i2c_get_adapdata_~dev#1.offset, i2c_get_adapdata_~tmp~3#1.base, i2c_get_adapdata_~tmp~3#1.offset;havoc i2c_get_adapdata_#in~dev#1.base, i2c_get_adapdata_#in~dev#1.offset;assume { :end_inline_i2c_get_adapdata } true;saa7146_i2c_xfer_~tmp~10#1.base, saa7146_i2c_xfer_~tmp~10#1.offset := saa7146_i2c_xfer_#t~ret232#1.base, saa7146_i2c_xfer_#t~ret232#1.offset;havoc saa7146_i2c_xfer_#t~ret232#1.base, saa7146_i2c_xfer_#t~ret232#1.offset;saa7146_i2c_xfer_~v4l2_dev~0#1.base, saa7146_i2c_xfer_~v4l2_dev~0#1.offset := saa7146_i2c_xfer_~tmp~10#1.base, saa7146_i2c_xfer_~tmp~10#1.offset;assume { :begin_inline_to_saa7146_dev } true;to_saa7146_dev_#in~v4l2_dev#1.base, to_saa7146_dev_#in~v4l2_dev#1.offset := saa7146_i2c_xfer_~v4l2_dev~0#1.base, saa7146_i2c_xfer_~v4l2_dev~0#1.offset;havoc to_saa7146_dev_#res#1.base, to_saa7146_dev_#res#1.offset;havoc to_saa7146_dev_~v4l2_dev#1.base, to_saa7146_dev_~v4l2_dev#1.offset, to_saa7146_dev_~__mptr~0#1.base, to_saa7146_dev_~__mptr~0#1.offset;to_saa7146_dev_~v4l2_dev#1.base, to_saa7146_dev_~v4l2_dev#1.offset := to_saa7146_dev_#in~v4l2_dev#1.base, to_saa7146_dev_#in~v4l2_dev#1.offset;havoc to_saa7146_dev_~__mptr~0#1.base, to_saa7146_dev_~__mptr~0#1.offset;to_saa7146_dev_~__mptr~0#1.base, to_saa7146_dev_~__mptr~0#1.offset := to_saa7146_dev_~v4l2_dev#1.base, to_saa7146_dev_~v4l2_dev#1.offset;to_saa7146_dev_#res#1.base, to_saa7146_dev_#res#1.offset := to_saa7146_dev_~__mptr~0#1.base, -10096 + to_saa7146_dev_~__mptr~0#1.offset; [2025-02-08 15:24:01,602 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5533: assume { :end_inline_ldv_handler_precall } true;assume { :begin_inline_saa7146_i2c_xfer } true;saa7146_i2c_xfer_#in~adapter#1.base, saa7146_i2c_xfer_#in~adapter#1.offset, saa7146_i2c_xfer_#in~msg#1.base, saa7146_i2c_xfer_#in~msg#1.offset, saa7146_i2c_xfer_#in~num#1 := main_~var_group1~0#1.base, main_~var_group1~0#1.offset, main_~var_group2~0#1.base, main_~var_group2~0#1.offset, main_~var_saa7146_i2c_xfer_7_p2~0#1;havoc saa7146_i2c_xfer_#res#1;havoc saa7146_i2c_xfer_#t~ret232#1.base, saa7146_i2c_xfer_#t~ret232#1.offset, saa7146_i2c_xfer_#t~ret233#1.base, saa7146_i2c_xfer_#t~ret233#1.offset, saa7146_i2c_xfer_#t~mem234#1, saa7146_i2c_xfer_#t~ret235#1, saa7146_i2c_xfer_~adapter#1.base, saa7146_i2c_xfer_~adapter#1.offset, saa7146_i2c_xfer_~msg#1.base, saa7146_i2c_xfer_~msg#1.offset, saa7146_i2c_xfer_~num#1, saa7146_i2c_xfer_~v4l2_dev~0#1.base, saa7146_i2c_xfer_~v4l2_dev~0#1.offset, saa7146_i2c_xfer_~tmp~10#1.base, saa7146_i2c_xfer_~tmp~10#1.offset, saa7146_i2c_xfer_~dev~0#1.base, saa7146_i2c_xfer_~dev~0#1.offset, saa7146_i2c_xfer_~tmp___0~6#1.base, saa7146_i2c_xfer_~tmp___0~6#1.offset, saa7146_i2c_xfer_~tmp___1~3#1;saa7146_i2c_xfer_~adapter#1.base, saa7146_i2c_xfer_~adapter#1.offset := saa7146_i2c_xfer_#in~adapter#1.base, saa7146_i2c_xfer_#in~adapter#1.offset;saa7146_i2c_xfer_~msg#1.base, saa7146_i2c_xfer_~msg#1.offset := saa7146_i2c_xfer_#in~msg#1.base, saa7146_i2c_xfer_#in~msg#1.offset;saa7146_i2c_xfer_~num#1 := saa7146_i2c_xfer_#in~num#1;havoc saa7146_i2c_xfer_~v4l2_dev~0#1.base, saa7146_i2c_xfer_~v4l2_dev~0#1.offset;havoc saa7146_i2c_xfer_~tmp~10#1.base, saa7146_i2c_xfer_~tmp~10#1.offset;havoc saa7146_i2c_xfer_~dev~0#1.base, saa7146_i2c_xfer_~dev~0#1.offset;havoc saa7146_i2c_xfer_~tmp___0~6#1.base, saa7146_i2c_xfer_~tmp___0~6#1.offset;havoc saa7146_i2c_xfer_~tmp___1~3#1;assume { :begin_inline_i2c_get_adapdata } true;i2c_get_adapdata_#in~dev#1.base, i2c_get_adapdata_#in~dev#1.offset := saa7146_i2c_xfer_~adapter#1.base, saa7146_i2c_xfer_~adapter#1.offset;havoc i2c_get_adapdata_#res#1.base, i2c_get_adapdata_#res#1.offset;havoc i2c_get_adapdata_#t~ret35#1.base, i2c_get_adapdata_#t~ret35#1.offset, i2c_get_adapdata_~dev#1.base, i2c_get_adapdata_~dev#1.offset, i2c_get_adapdata_~tmp~3#1.base, i2c_get_adapdata_~tmp~3#1.offset;i2c_get_adapdata_~dev#1.base, i2c_get_adapdata_~dev#1.offset := i2c_get_adapdata_#in~dev#1.base, i2c_get_adapdata_#in~dev#1.offset;havoc i2c_get_adapdata_~tmp~3#1.base, i2c_get_adapdata_~tmp~3#1.offset;assume { :begin_inline_dev_get_drvdata } true;dev_get_drvdata_#in~arg0#1.base, dev_get_drvdata_#in~arg0#1.offset := i2c_get_adapdata_~dev#1.base, 156 + i2c_get_adapdata_~dev#1.offset;havoc dev_get_drvdata_#res#1.base, dev_get_drvdata_#res#1.offset;havoc dev_get_drvdata_#t~ret694#1.base, dev_get_drvdata_#t~ret694#1.offset, dev_get_drvdata_~arg0#1.base, dev_get_drvdata_~arg0#1.offset;dev_get_drvdata_~arg0#1.base, dev_get_drvdata_~arg0#1.offset := dev_get_drvdata_#in~arg0#1.base, dev_get_drvdata_#in~arg0#1.offset;assume { :begin_inline_ldv_malloc } true;ldv_malloc_#in~size#1 := 0;havoc ldv_malloc_#res#1.base, ldv_malloc_#res#1.offset;havoc ldv_malloc_#t~nondet280#1, ldv_malloc_#t~malloc281#1.base, ldv_malloc_#t~malloc281#1.offset, ldv_malloc_#t~ret282#1, ldv_malloc_~res~0#1.base, ldv_malloc_~res~0#1.offset, ldv_malloc_~size#1;ldv_malloc_~size#1 := ldv_malloc_#in~size#1;havoc ldv_malloc_#t~nondet280#1; [2025-02-08 15:24:01,603 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5335: assume 0 != saa7146_i2c_transfer_#t~bitwise207#1 % 4294967296;havoc saa7146_i2c_transfer_#t~bitwise207#1;call write~$Pointer$#10(81, 0, saa7146_i2c_transfer_~#descriptor___0~2#1.base, saa7146_i2c_transfer_~#descriptor___0~2#1.offset, 8);call write~$Pointer$#10(82, 0, saa7146_i2c_transfer_~#descriptor___0~2#1.base, 8 + saa7146_i2c_transfer_~#descriptor___0~2#1.offset, 8);call write~$Pointer$#10(83, 0, saa7146_i2c_transfer_~#descriptor___0~2#1.base, 16 + saa7146_i2c_transfer_~#descriptor___0~2#1.offset, 8);call write~$Pointer$#10(84, 0, saa7146_i2c_transfer_~#descriptor___0~2#1.base, 24 + saa7146_i2c_transfer_~#descriptor___0~2#1.offset, 8);call write~int#10(369, saa7146_i2c_transfer_~#descriptor___0~2#1.base, 32 + saa7146_i2c_transfer_~#descriptor___0~2#1.offset, 4);call write~int#10(0, saa7146_i2c_transfer_~#descriptor___0~2#1.base, 36 + saa7146_i2c_transfer_~#descriptor___0~2#1.offset, 1);call saa7146_i2c_transfer_#t~mem208#1 := read~int#10(saa7146_i2c_transfer_~#descriptor___0~2#1.base, 36 + saa7146_i2c_transfer_~#descriptor___0~2#1.offset, 1);assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if saa7146_i2c_transfer_#t~mem208#1 % 256 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_transfer_#t~mem208#1 % 256 % 18446744073709551616 else saa7146_i2c_transfer_#t~mem208#1 % 256 % 18446744073709551616 - 18446744073709551616) % 2, 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; [2025-02-08 15:24:01,603 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5335: assume !(0 != saa7146_i2c_transfer_#t~bitwise207#1 % 4294967296);havoc saa7146_i2c_transfer_#t~bitwise207#1; [2025-02-08 15:24:01,603 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5335-1: [2025-02-08 15:24:01,603 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5335-4: assume 0 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_transfer_#t~bitwise207#1 := 0; [2025-02-08 15:24:01,603 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5335-4: assume !(0 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,603 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5335-2: havoc saa7146_i2c_transfer_#t~bitwise207#1;assume saa7146_i2c_transfer_#t~bitwise207#1 % 4294967296 <= ~saa7146_debug~0 % 4294967296 && saa7146_i2c_transfer_#t~bitwise207#1 % 4294967296 <= 8; [2025-02-08 15:24:01,603 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5335-3: assume 8 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_transfer_#t~bitwise207#1 := ~saa7146_debug~0; [2025-02-08 15:24:01,603 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5335-3: assume !(8 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,603 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5732-1: ldv_malloc_#t~ret282#1 := ldv_is_err_#res#1;havoc ldv_is_err_~ptr#1.base, ldv_is_err_~ptr#1.offset;havoc ldv_is_err_#in~ptr#1.base, ldv_is_err_#in~ptr#1.offset;assume { :end_inline_ldv_is_err } true;assume { :begin_inline_assume_abort_if_not } true;assume_abort_if_not_#in~cond#1 := (if 0 == ldv_malloc_#t~ret282#1 then 1 else 0);havoc assume_abort_if_not_~cond#1;assume_abort_if_not_~cond#1 := assume_abort_if_not_#in~cond#1; [2025-02-08 15:24:01,603 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5732: havoc assume_abort_if_not_~cond#1;havoc assume_abort_if_not_#in~cond#1;assume { :end_inline_assume_abort_if_not } true;havoc ldv_malloc_#t~ret282#1;ldv_malloc_#res#1.base, ldv_malloc_#res#1.offset := ldv_malloc_~res~0#1.base, ldv_malloc_~res~0#1.offset; [2025-02-08 15:24:01,603 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5534: main_#t~ret245#1 := saa7146_i2c_xfer_#res#1;havoc saa7146_i2c_xfer_#t~ret232#1.base, saa7146_i2c_xfer_#t~ret232#1.offset, saa7146_i2c_xfer_#t~ret233#1.base, saa7146_i2c_xfer_#t~ret233#1.offset, saa7146_i2c_xfer_#t~mem234#1, saa7146_i2c_xfer_#t~ret235#1, saa7146_i2c_xfer_~adapter#1.base, saa7146_i2c_xfer_~adapter#1.offset, saa7146_i2c_xfer_~msg#1.base, saa7146_i2c_xfer_~msg#1.offset, saa7146_i2c_xfer_~num#1, saa7146_i2c_xfer_~v4l2_dev~0#1.base, saa7146_i2c_xfer_~v4l2_dev~0#1.offset, saa7146_i2c_xfer_~tmp~10#1.base, saa7146_i2c_xfer_~tmp~10#1.offset, saa7146_i2c_xfer_~dev~0#1.base, saa7146_i2c_xfer_~dev~0#1.offset, saa7146_i2c_xfer_~tmp___0~6#1.base, saa7146_i2c_xfer_~tmp___0~6#1.offset, saa7146_i2c_xfer_~tmp___1~3#1;havoc saa7146_i2c_xfer_#in~adapter#1.base, saa7146_i2c_xfer_#in~adapter#1.offset, saa7146_i2c_xfer_#in~msg#1.base, saa7146_i2c_xfer_#in~msg#1.offset, saa7146_i2c_xfer_#in~num#1;assume { :end_inline_saa7146_i2c_xfer } true; [2025-02-08 15:24:01,603 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5072-1: assume { :begin_inline_finish_wait } true;finish_wait_#in~arg0#1.base, finish_wait_#in~arg0#1.offset, finish_wait_#in~arg1#1.base, finish_wait_#in~arg1#1.offset := saa7146_i2c_writeout_~dev#1.base, 1142 + saa7146_i2c_writeout_~dev#1.offset, saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset;havoc finish_wait_~arg0#1.base, finish_wait_~arg0#1.offset, finish_wait_~arg1#1.base, finish_wait_~arg1#1.offset;finish_wait_~arg0#1.base, finish_wait_~arg0#1.offset := finish_wait_#in~arg0#1.base, finish_wait_#in~arg0#1.offset;finish_wait_~arg1#1.base, finish_wait_~arg1#1.offset := finish_wait_#in~arg1#1.base, finish_wait_#in~arg1#1.offset; [2025-02-08 15:24:01,603 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5072-2: havoc finish_wait_~arg0#1.base, finish_wait_~arg0#1.offset, finish_wait_~arg1#1.base, finish_wait_~arg1#1.offset;havoc finish_wait_#in~arg0#1.base, finish_wait_#in~arg0#1.offset, finish_wait_#in~arg1#1.base, finish_wait_#in~arg1#1.offset;assume { :end_inline_finish_wait } true; [2025-02-08 15:24:01,603 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5072: havoc finish_wait_~arg0#1.base, finish_wait_~arg0#1.offset, finish_wait_~arg1#1.base, finish_wait_~arg1#1.offset;havoc finish_wait_#in~arg0#1.base, finish_wait_#in~arg0#1.offset, finish_wait_#in~arg1#1.base, finish_wait_#in~arg1#1.offset;assume { :end_inline_finish_wait } true; [2025-02-08 15:24:01,603 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5072-3: assume { :begin_inline_finish_wait } true;finish_wait_#in~arg0#1.base, finish_wait_#in~arg0#1.offset, finish_wait_#in~arg1#1.base, finish_wait_#in~arg1#1.offset := saa7146_i2c_writeout_~dev#1.base, 1142 + saa7146_i2c_writeout_~dev#1.offset, saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset;havoc finish_wait_~arg0#1.base, finish_wait_~arg0#1.offset, finish_wait_~arg1#1.base, finish_wait_~arg1#1.offset;finish_wait_~arg0#1.base, finish_wait_~arg0#1.offset := finish_wait_#in~arg0#1.base, finish_wait_#in~arg0#1.offset;finish_wait_~arg1#1.base, finish_wait_~arg1#1.offset := finish_wait_#in~arg1#1.base, finish_wait_#in~arg1#1.offset; [2025-02-08 15:24:01,604 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5469: saa7146_i2c_xfer_#t~ret233#1.base, saa7146_i2c_xfer_#t~ret233#1.offset := to_saa7146_dev_#res#1.base, to_saa7146_dev_#res#1.offset;havoc to_saa7146_dev_~v4l2_dev#1.base, to_saa7146_dev_~v4l2_dev#1.offset, to_saa7146_dev_~__mptr~0#1.base, to_saa7146_dev_~__mptr~0#1.offset;havoc to_saa7146_dev_#in~v4l2_dev#1.base, to_saa7146_dev_#in~v4l2_dev#1.offset;assume { :end_inline_to_saa7146_dev } true;saa7146_i2c_xfer_~tmp___0~6#1.base, saa7146_i2c_xfer_~tmp___0~6#1.offset := saa7146_i2c_xfer_#t~ret233#1.base, saa7146_i2c_xfer_#t~ret233#1.offset;havoc saa7146_i2c_xfer_#t~ret233#1.base, saa7146_i2c_xfer_#t~ret233#1.offset;saa7146_i2c_xfer_~dev~0#1.base, saa7146_i2c_xfer_~dev~0#1.offset := saa7146_i2c_xfer_~tmp___0~6#1.base, saa7146_i2c_xfer_~tmp___0~6#1.offset;call saa7146_i2c_xfer_#t~mem234#1 := read~int#4(saa7146_i2c_xfer_~adapter#1.base, 152 + saa7146_i2c_xfer_~adapter#1.offset, 4);assume { :begin_inline_saa7146_i2c_transfer } true;saa7146_i2c_transfer_#in~dev#1.base, saa7146_i2c_transfer_#in~dev#1.offset, saa7146_i2c_transfer_#in~msgs#1.base, saa7146_i2c_transfer_#in~msgs#1.offset, saa7146_i2c_transfer_#in~num#1, saa7146_i2c_transfer_#in~retries#1 := saa7146_i2c_xfer_~dev~0#1.base, saa7146_i2c_xfer_~dev~0#1.offset, saa7146_i2c_xfer_~msg#1.base, saa7146_i2c_xfer_~msg#1.offset, saa7146_i2c_xfer_~num#1, saa7146_i2c_xfer_#t~mem234#1;havoc saa7146_i2c_transfer_#res#1;havoc saa7146_i2c_transfer_#t~mem195#1.base, saa7146_i2c_transfer_#t~mem195#1.offset, saa7146_i2c_transfer_#t~ret196#1, saa7146_i2c_transfer_#t~bitwise197#1, saa7146_i2c_transfer_#t~mem198#1, saa7146_i2c_transfer_#t~ret199#1, saa7146_i2c_transfer_#t~ret200#1, saa7146_i2c_transfer_#t~ret201#1, saa7146_i2c_transfer_#t~mem202#1.base, saa7146_i2c_transfer_#t~mem202#1.offset, saa7146_i2c_transfer_#t~mem203#1, saa7146_i2c_transfer_#t~bitwise204#1, saa7146_i2c_transfer_#t~short205#1, saa7146_i2c_transfer_#t~ret206#1, saa7146_i2c_transfer_#t~bitwise207#1, saa7146_i2c_transfer_#t~mem208#1, saa7146_i2c_transfer_#t~ret209#1, saa7146_i2c_transfer_#t~ret210#1, saa7146_i2c_transfer_#t~ret211#1, saa7146_i2c_transfer_#t~mem212#1.base, saa7146_i2c_transfer_#t~mem212#1.offset, saa7146_i2c_transfer_#t~mem213#1, saa7146_i2c_transfer_#t~short214#1, saa7146_i2c_transfer_#t~bitwise215#1, saa7146_i2c_transfer_#t~mem216#1, saa7146_i2c_transfer_#t~ret217#1, saa7146_i2c_transfer_#t~ret218#1, saa7146_i2c_transfer_#t~ret219#1, saa7146_i2c_transfer_#t~bitwise220#1, saa7146_i2c_transfer_#t~mem221#1, saa7146_i2c_transfer_#t~ret222#1, saa7146_i2c_transfer_#t~ret223#1, saa7146_i2c_transfer_#t~bitwise224#1, saa7146_i2c_transfer_#t~mem225#1, saa7146_i2c_transfer_#t~ret226#1, saa7146_i2c_transfer_#t~ret227#1, saa7146_i2c_transfer_#t~mem228#1, saa7146_i2c_transfer_#t~ret229#1, saa7146_i2c_transfer_#t~ret230#1, saa7146_i2c_transfer_#t~ret231#1, saa7146_i2c_transfer_~dev#1.base, saa7146_i2c_transfer_~dev#1.offset, saa7146_i2c_transfer_~msgs#1.base, saa7146_i2c_transfer_~msgs#1.offset, saa7146_i2c_transfer_~num#1, saa7146_i2c_transfer_~retries#1, saa7146_i2c_transfer_~i~2#1, saa7146_i2c_transfer_~count~0#1, saa7146_i2c_transfer_~buffer~0#1.base, saa7146_i2c_transfer_~buffer~0#1.offset, saa7146_i2c_transfer_~err~0#1, saa7146_i2c_transfer_~short_delay~0#1, saa7146_i2c_transfer_~tmp~9#1, saa7146_i2c_transfer_~#descriptor~2#1.base, saa7146_i2c_transfer_~#descriptor~2#1.offset, saa7146_i2c_transfer_~tmp___0~5#1, saa7146_i2c_transfer_~#descriptor___0~2#1.base, saa7146_i2c_transfer_~#descriptor___0~2#1.offset, saa7146_i2c_transfer_~tmp___1~2#1, saa7146_i2c_transfer_~#descriptor___1~2#1.base, saa7146_i2c_transfer_~#descriptor___1~2#1.offset, saa7146_i2c_transfer_~tmp___2~2#1, saa7146_i2c_transfer_~tmp___3~1#1, saa7146_i2c_transfer_~#descriptor___2~1#1.base, saa7146_i2c_transfer_~#descriptor___2~1#1.offset, saa7146_i2c_transfer_~tmp___4~1#1, saa7146_i2c_transfer_~tmp___5~1#1, saa7146_i2c_transfer_~#descriptor___3~1#1.base, saa7146_i2c_transfer_~#descriptor___3~1#1.offset, saa7146_i2c_transfer_~tmp___6~1#1, saa7146_i2c_transfer_~#zero~0#1.base, saa7146_i2c_transfer_~#zero~0#1.offset, saa7146_i2c_transfer_~tmp___7~1#1;saa7146_i2c_transfer_~dev#1.base, saa7146_i2c_transfer_~dev#1.offset := saa7146_i2c_transfer_#in~dev#1.base, saa7146_i2c_transfer_#in~dev#1.offset;saa7146_i2c_transfer_~msgs#1.base, saa7146_i2c_transfer_~msgs#1.offset := saa7146_i2c_transfer_#in~msgs#1.base, saa7146_i2c_transfer_#in~msgs#1.offset;saa7146_i2c_transfer_~num#1 := saa7146_i2c_transfer_#in~num#1;saa7146_i2c_transfer_~retries#1 := saa7146_i2c_transfer_#in~retries#1;havoc saa7146_i2c_transfer_~i~2#1;havoc saa7146_i2c_transfer_~count~0#1;havoc saa7146_i2c_transfer_~buffer~0#1.base, saa7146_i2c_transfer_~buffer~0#1.offset;havoc saa7146_i2c_transfer_~err~0#1;havoc saa7146_i2c_transfer_~short_delay~0#1;havoc saa7146_i2c_transfer_~tmp~9#1;call saa7146_i2c_transfer_~#descriptor~2#1.base, saa7146_i2c_transfer_~#descriptor~2#1.offset := #Ultimate.allocOnStack(37);havoc saa7146_i2c_transfer_~tmp___0~5#1;call saa7146_i2c_transfer_~#descriptor___0~2#1.base, saa7146_i2c_transfer_~#descriptor___0~2#1.offset := #Ultimate.allocOnStack(37);havoc saa7146_i2c_transfer_~tmp___1~2#1;call saa7146_i2c_transfer_~#descriptor___1~2#1.base, saa7146_i2c_transfer_~#descriptor___1~2#1.offset := #Ultimate.allocOnStack(37);havoc saa7146_i2c_transfer_~tmp___2~2#1;havoc saa7146_i2c_transfer_~tmp___3~1#1;call saa7146_i2c_transfer_~#descriptor___2~1#1.base, saa7146_i2c_transfer_~#descriptor___2~1#1.offset := #Ultimate.allocOnStack(37);havoc saa7146_i2c_transfer_~tmp___4~1#1;havoc saa7146_i2c_transfer_~tmp___5~1#1;call saa7146_i2c_transfer_~#descriptor___3~1#1.base, saa7146_i2c_transfer_~#descriptor___3~1#1.offset := #Ultimate.allocOnStack(37);havoc saa7146_i2c_transfer_~tmp___6~1#1;call saa7146_i2c_transfer_~#zero~0#1.base, saa7146_i2c_transfer_~#zero~0#1.offset := #Ultimate.allocOnStack(4);havoc saa7146_i2c_transfer_~tmp___7~1#1;saa7146_i2c_transfer_~i~2#1 := 0;saa7146_i2c_transfer_~count~0#1 := 0;call saa7146_i2c_transfer_#t~mem195#1.base, saa7146_i2c_transfer_#t~mem195#1.offset := read~$Pointer$#6(saa7146_i2c_transfer_~dev#1.base, 1134 + saa7146_i2c_transfer_~dev#1.offset, 8);saa7146_i2c_transfer_~buffer~0#1.base, saa7146_i2c_transfer_~buffer~0#1.offset := saa7146_i2c_transfer_#t~mem195#1.base, saa7146_i2c_transfer_#t~mem195#1.offset;havoc saa7146_i2c_transfer_#t~mem195#1.base, saa7146_i2c_transfer_#t~mem195#1.offset;saa7146_i2c_transfer_~err~0#1 := 0;saa7146_i2c_transfer_~short_delay~0#1 := 0;assume { :begin_inline_ldv_mutex_lock_interruptible_10 } true;ldv_mutex_lock_interruptible_10_#in~ldv_func_arg1#1.base, ldv_mutex_lock_interruptible_10_#in~ldv_func_arg1#1.offset := saa7146_i2c_transfer_~dev#1.base, 966 + saa7146_i2c_transfer_~dev#1.offset;havoc ldv_mutex_lock_interruptible_10_#res#1;havoc ldv_mutex_lock_interruptible_10_#t~ret250#1, ldv_mutex_lock_interruptible_10_#t~ret251#1, ldv_mutex_lock_interruptible_10_~ldv_func_arg1#1.base, ldv_mutex_lock_interruptible_10_~ldv_func_arg1#1.offset, ldv_mutex_lock_interruptible_10_~ldv_func_res~1#1, ldv_mutex_lock_interruptible_10_~tmp~14#1, ldv_mutex_lock_interruptible_10_~tmp___0~9#1;ldv_mutex_lock_interruptible_10_~ldv_func_arg1#1.base, ldv_mutex_lock_interruptible_10_~ldv_func_arg1#1.offset := ldv_mutex_lock_interruptible_10_#in~ldv_func_arg1#1.base, ldv_mutex_lock_interruptible_10_#in~ldv_func_arg1#1.offset;havoc ldv_mutex_lock_interruptible_10_~ldv_func_res~1#1;havoc ldv_mutex_lock_interruptible_10_~tmp~14#1;havoc ldv_mutex_lock_interruptible_10_~tmp___0~9#1;assume { :begin_inline_mutex_lock_interruptible } true;mutex_lock_interruptible_#in~arg0#1.base, mutex_lock_interruptible_#in~arg0#1.offset := ldv_mutex_lock_interruptible_10_~ldv_func_arg1#1.base, ldv_mutex_lock_interruptible_10_~ldv_func_arg1#1.offset;havoc mutex_lock_interruptible_#res#1;havoc mutex_lock_interruptible_#t~nondet697#1, mutex_lock_interruptible_~arg0#1.base, mutex_lock_interruptible_~arg0#1.offset;mutex_lock_interruptible_~arg0#1.base, mutex_lock_interruptible_~arg0#1.offset := mutex_lock_interruptible_#in~arg0#1.base, mutex_lock_interruptible_#in~arg0#1.offset;havoc mutex_lock_interruptible_#t~nondet697#1;mutex_lock_interruptible_#res#1 := mutex_lock_interruptible_#t~nondet697#1;havoc mutex_lock_interruptible_#t~nondet697#1; [2025-02-08 15:24:01,604 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5205-2: havoc saa7146_i2c_writeout_#t~bitwise178#1;assume saa7146_i2c_writeout_#t~bitwise178#1 % 4294967296 <= saa7146_i2c_writeout_~status~1#1 % 4294967296 && saa7146_i2c_writeout_#t~bitwise178#1 % 4294967296 <= 4; [2025-02-08 15:24:01,604 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5205-3: assume 4 == saa7146_i2c_writeout_~status~1#1 % 4294967296;saa7146_i2c_writeout_#t~bitwise178#1 := saa7146_i2c_writeout_~status~1#1; [2025-02-08 15:24:01,604 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5205-3: assume !(4 == saa7146_i2c_writeout_~status~1#1 % 4294967296); [2025-02-08 15:24:01,604 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5205: assume 0 != saa7146_i2c_writeout_#t~bitwise178#1 % 4294967296;havoc saa7146_i2c_writeout_#t~bitwise178#1; [2025-02-08 15:24:01,604 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5205: assume !(0 != saa7146_i2c_writeout_#t~bitwise178#1 % 4294967296);havoc saa7146_i2c_writeout_#t~bitwise178#1; [2025-02-08 15:24:01,605 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5205-1: [2025-02-08 15:24:01,605 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5205-6: [2025-02-08 15:24:01,605 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5205-7: havoc saa7146_i2c_writeout_#t~bitwise178#1;assume saa7146_i2c_writeout_#t~bitwise178#1 % 4294967296 <= saa7146_i2c_writeout_~status~1#1 % 4294967296 && saa7146_i2c_writeout_#t~bitwise178#1 % 4294967296 <= 4; [2025-02-08 15:24:01,605 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5205-4: assume 0 == saa7146_i2c_writeout_~status~1#1 % 4294967296;saa7146_i2c_writeout_#t~bitwise178#1 := 0; [2025-02-08 15:24:01,605 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5205-4: assume !(0 == saa7146_i2c_writeout_~status~1#1 % 4294967296); [2025-02-08 15:24:01,605 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5205-5: assume 0 != saa7146_i2c_writeout_#t~bitwise178#1 % 4294967296;havoc saa7146_i2c_writeout_#t~bitwise178#1; [2025-02-08 15:24:01,605 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5205-5: assume !(0 != saa7146_i2c_writeout_#t~bitwise178#1 % 4294967296);havoc saa7146_i2c_writeout_#t~bitwise178#1; [2025-02-08 15:24:01,605 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4875: saa7146_i2c_msg_cleanup_~op_count~1#1 := 1 + saa7146_i2c_msg_cleanup_~op_count~1#1;saa7146_i2c_msg_cleanup_~j~1#1 := 0; [2025-02-08 15:24:01,605 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5205-8: assume 4 == saa7146_i2c_writeout_~status~1#1 % 4294967296;saa7146_i2c_writeout_#t~bitwise178#1 := saa7146_i2c_writeout_~status~1#1; [2025-02-08 15:24:01,605 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5205-8: assume !(4 == saa7146_i2c_writeout_~status~1#1 % 4294967296); [2025-02-08 15:24:01,605 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5205-9: assume 0 == saa7146_i2c_writeout_~status~1#1 % 4294967296;saa7146_i2c_writeout_#t~bitwise178#1 := 0; [2025-02-08 15:24:01,605 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5205-9: assume !(0 == saa7146_i2c_writeout_~status~1#1 % 4294967296); [2025-02-08 15:24:01,605 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5536: assume main_#t~switch244#1;assume { :begin_inline_ldv_handler_precall } true; [2025-02-08 15:24:01,605 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5536: assume !main_#t~switch244#1;main_#t~switch244#1 := true; [2025-02-08 15:24:01,605 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5404: assume saa7146_i2c_transfer_~err~0#1 != saa7146_i2c_transfer_~num#1; [2025-02-08 15:24:01,605 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5404: assume !(saa7146_i2c_transfer_~err~0#1 != saa7146_i2c_transfer_~num#1);assume { :begin_inline_saa7146_i2c_msg_cleanup } true;saa7146_i2c_msg_cleanup_#in~m#1.base, saa7146_i2c_msg_cleanup_#in~m#1.offset, saa7146_i2c_msg_cleanup_#in~num#1, saa7146_i2c_msg_cleanup_#in~op#1.base, saa7146_i2c_msg_cleanup_#in~op#1.offset := saa7146_i2c_transfer_~msgs#1.base, saa7146_i2c_transfer_~msgs#1.offset, saa7146_i2c_transfer_~num#1, saa7146_i2c_transfer_~buffer~0#1.base, saa7146_i2c_transfer_~buffer~0#1.offset;havoc saa7146_i2c_msg_cleanup_#res#1;havoc saa7146_i2c_msg_cleanup_#t~mem78#1.base, saa7146_i2c_msg_cleanup_#t~mem78#1.offset, saa7146_i2c_msg_cleanup_#t~mem79#1, saa7146_i2c_msg_cleanup_#t~bitwise80#1, saa7146_i2c_msg_cleanup_#t~mem81#1, saa7146_i2c_msg_cleanup_~m#1.base, saa7146_i2c_msg_cleanup_~m#1.offset, saa7146_i2c_msg_cleanup_~num#1, saa7146_i2c_msg_cleanup_~op#1.base, saa7146_i2c_msg_cleanup_~op#1.offset, saa7146_i2c_msg_cleanup_~i~1#1, saa7146_i2c_msg_cleanup_~j~1#1, saa7146_i2c_msg_cleanup_~op_count~1#1;saa7146_i2c_msg_cleanup_~m#1.base, saa7146_i2c_msg_cleanup_~m#1.offset := saa7146_i2c_msg_cleanup_#in~m#1.base, saa7146_i2c_msg_cleanup_#in~m#1.offset;saa7146_i2c_msg_cleanup_~num#1 := saa7146_i2c_msg_cleanup_#in~num#1;saa7146_i2c_msg_cleanup_~op#1.base, saa7146_i2c_msg_cleanup_~op#1.offset := saa7146_i2c_msg_cleanup_#in~op#1.base, saa7146_i2c_msg_cleanup_#in~op#1.offset;havoc saa7146_i2c_msg_cleanup_~i~1#1;havoc saa7146_i2c_msg_cleanup_~j~1#1;havoc saa7146_i2c_msg_cleanup_~op_count~1#1;saa7146_i2c_msg_cleanup_~op_count~1#1 := 0;saa7146_i2c_msg_cleanup_~i~1#1 := 0; [2025-02-08 15:24:01,606 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5206: assume 0 != saa7146_i2c_writeout_#t~bitwise179#1 % 4294967296;havoc saa7146_i2c_writeout_#t~bitwise179#1;call write~$Pointer$#10(57, 0, saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset, 8);call write~$Pointer$#10(58, 0, saa7146_i2c_writeout_~#descriptor___4~0#1.base, 8 + saa7146_i2c_writeout_~#descriptor___4~0#1.offset, 8);call write~$Pointer$#10(59, 0, saa7146_i2c_writeout_~#descriptor___4~0#1.base, 16 + saa7146_i2c_writeout_~#descriptor___4~0#1.offset, 8);call write~$Pointer$#10(60, 0, saa7146_i2c_writeout_~#descriptor___4~0#1.base, 24 + saa7146_i2c_writeout_~#descriptor___4~0#1.offset, 8);call write~int#10(322, saa7146_i2c_writeout_~#descriptor___4~0#1.base, 32 + saa7146_i2c_writeout_~#descriptor___4~0#1.offset, 4);call write~int#10(0, saa7146_i2c_writeout_~#descriptor___4~0#1.base, 36 + saa7146_i2c_writeout_~#descriptor___4~0#1.offset, 1);call saa7146_i2c_writeout_#t~mem180#1 := read~int#10(saa7146_i2c_writeout_~#descriptor___4~0#1.base, 36 + saa7146_i2c_writeout_~#descriptor___4~0#1.offset, 1);assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if saa7146_i2c_writeout_#t~mem180#1 % 256 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_writeout_#t~mem180#1 % 256 % 18446744073709551616 else saa7146_i2c_writeout_#t~mem180#1 % 256 % 18446744073709551616 - 18446744073709551616) % 2, 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; [2025-02-08 15:24:01,606 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5206: assume !(0 != saa7146_i2c_writeout_#t~bitwise179#1 % 4294967296);havoc saa7146_i2c_writeout_#t~bitwise179#1; [2025-02-08 15:24:01,606 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5206-3: assume 8 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_writeout_#t~bitwise179#1 := ~saa7146_debug~0; [2025-02-08 15:24:01,606 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5206-3: assume !(8 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,606 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5206-4: assume 0 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_writeout_#t~bitwise179#1 := 0; [2025-02-08 15:24:01,606 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5206-4: assume !(0 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,606 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5206-1: [2025-02-08 15:24:01,606 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5206-2: havoc saa7146_i2c_writeout_#t~bitwise179#1;assume saa7146_i2c_writeout_#t~bitwise179#1 % 4294967296 <= ~saa7146_debug~0 % 4294967296 && saa7146_i2c_writeout_#t~bitwise179#1 % 4294967296 <= 8; [2025-02-08 15:24:01,606 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5206-7: havoc saa7146_i2c_writeout_#t~bitwise179#1;assume saa7146_i2c_writeout_#t~bitwise179#1 % 4294967296 <= ~saa7146_debug~0 % 4294967296 && saa7146_i2c_writeout_#t~bitwise179#1 % 4294967296 <= 8; [2025-02-08 15:24:01,606 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5206-8: assume 8 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_writeout_#t~bitwise179#1 := ~saa7146_debug~0; [2025-02-08 15:24:01,606 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5206-8: assume !(8 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,606 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5206-5: assume 0 != saa7146_i2c_writeout_#t~bitwise179#1 % 4294967296;havoc saa7146_i2c_writeout_#t~bitwise179#1;call write~$Pointer$#10(57, 0, saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset, 8);call write~$Pointer$#10(58, 0, saa7146_i2c_writeout_~#descriptor___4~0#1.base, 8 + saa7146_i2c_writeout_~#descriptor___4~0#1.offset, 8);call write~$Pointer$#10(59, 0, saa7146_i2c_writeout_~#descriptor___4~0#1.base, 16 + saa7146_i2c_writeout_~#descriptor___4~0#1.offset, 8);call write~$Pointer$#10(60, 0, saa7146_i2c_writeout_~#descriptor___4~0#1.base, 24 + saa7146_i2c_writeout_~#descriptor___4~0#1.offset, 8);call write~int#10(322, saa7146_i2c_writeout_~#descriptor___4~0#1.base, 32 + saa7146_i2c_writeout_~#descriptor___4~0#1.offset, 4);call write~int#10(0, saa7146_i2c_writeout_~#descriptor___4~0#1.base, 36 + saa7146_i2c_writeout_~#descriptor___4~0#1.offset, 1);call saa7146_i2c_writeout_#t~mem180#1 := read~int#10(saa7146_i2c_writeout_~#descriptor___4~0#1.base, 36 + saa7146_i2c_writeout_~#descriptor___4~0#1.offset, 1);assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if saa7146_i2c_writeout_#t~mem180#1 % 256 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_writeout_#t~mem180#1 % 256 % 18446744073709551616 else saa7146_i2c_writeout_#t~mem180#1 % 256 % 18446744073709551616 - 18446744073709551616) % 2, 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; [2025-02-08 15:24:01,606 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5206-5: assume !(0 != saa7146_i2c_writeout_#t~bitwise179#1 % 4294967296);havoc saa7146_i2c_writeout_#t~bitwise179#1; [2025-02-08 15:24:01,607 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5206-6: [2025-02-08 15:24:01,607 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5206-9: assume 0 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_writeout_#t~bitwise179#1 := 0; [2025-02-08 15:24:01,607 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5206-9: assume !(0 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,607 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5537: assume { :end_inline_ldv_handler_precall } true;assume { :begin_inline_saa7146_i2c_func } true;saa7146_i2c_func_#in~adapter#1.base, saa7146_i2c_func_#in~adapter#1.offset := main_~var_group3~0#1.base, main_~var_group3~0#1.offset;havoc saa7146_i2c_func_#res#1;havoc saa7146_i2c_func_~adapter#1.base, saa7146_i2c_func_~adapter#1.offset;saa7146_i2c_func_~adapter#1.base, saa7146_i2c_func_~adapter#1.offset := saa7146_i2c_func_#in~adapter#1.base, saa7146_i2c_func_#in~adapter#1.offset;saa7146_i2c_func_#res#1 := 2031617; [2025-02-08 15:24:01,607 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5273: call ULTIMATE.dealloc(saa7146_i2c_transfer_~#descriptor~2#1.base, saa7146_i2c_transfer_~#descriptor~2#1.offset);havoc saa7146_i2c_transfer_~#descriptor~2#1.base, saa7146_i2c_transfer_~#descriptor~2#1.offset;call ULTIMATE.dealloc(saa7146_i2c_transfer_~#descriptor___0~2#1.base, saa7146_i2c_transfer_~#descriptor___0~2#1.offset);havoc saa7146_i2c_transfer_~#descriptor___0~2#1.base, saa7146_i2c_transfer_~#descriptor___0~2#1.offset;call ULTIMATE.dealloc(saa7146_i2c_transfer_~#descriptor___1~2#1.base, saa7146_i2c_transfer_~#descriptor___1~2#1.offset);havoc saa7146_i2c_transfer_~#descriptor___1~2#1.base, saa7146_i2c_transfer_~#descriptor___1~2#1.offset;call ULTIMATE.dealloc(saa7146_i2c_transfer_~#descriptor___2~1#1.base, saa7146_i2c_transfer_~#descriptor___2~1#1.offset);havoc saa7146_i2c_transfer_~#descriptor___2~1#1.base, saa7146_i2c_transfer_~#descriptor___2~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_transfer_~#descriptor___3~1#1.base, saa7146_i2c_transfer_~#descriptor___3~1#1.offset);havoc saa7146_i2c_transfer_~#descriptor___3~1#1.base, saa7146_i2c_transfer_~#descriptor___3~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_transfer_~#zero~0#1.base, saa7146_i2c_transfer_~#zero~0#1.offset);havoc saa7146_i2c_transfer_~#zero~0#1.base, saa7146_i2c_transfer_~#zero~0#1.offset;saa7146_i2c_xfer_#t~ret235#1 := saa7146_i2c_transfer_#res#1;havoc saa7146_i2c_transfer_#t~mem195#1.base, saa7146_i2c_transfer_#t~mem195#1.offset, saa7146_i2c_transfer_#t~ret196#1, saa7146_i2c_transfer_#t~bitwise197#1, saa7146_i2c_transfer_#t~mem198#1, saa7146_i2c_transfer_#t~ret199#1, saa7146_i2c_transfer_#t~ret200#1, saa7146_i2c_transfer_#t~ret201#1, saa7146_i2c_transfer_#t~mem202#1.base, saa7146_i2c_transfer_#t~mem202#1.offset, saa7146_i2c_transfer_#t~mem203#1, saa7146_i2c_transfer_#t~bitwise204#1, saa7146_i2c_transfer_#t~short205#1, saa7146_i2c_transfer_#t~ret206#1, saa7146_i2c_transfer_#t~bitwise207#1, saa7146_i2c_transfer_#t~mem208#1, saa7146_i2c_transfer_#t~ret209#1, saa7146_i2c_transfer_#t~ret210#1, saa7146_i2c_transfer_#t~ret211#1, saa7146_i2c_transfer_#t~mem212#1.base, saa7146_i2c_transfer_#t~mem212#1.offset, saa7146_i2c_transfer_#t~mem213#1, saa7146_i2c_transfer_#t~short214#1, saa7146_i2c_transfer_#t~bitwise215#1, saa7146_i2c_transfer_#t~mem216#1, saa7146_i2c_transfer_#t~ret217#1, saa7146_i2c_transfer_#t~ret218#1, saa7146_i2c_transfer_#t~ret219#1, saa7146_i2c_transfer_#t~bitwise220#1, saa7146_i2c_transfer_#t~mem221#1, saa7146_i2c_transfer_#t~ret222#1, saa7146_i2c_transfer_#t~ret223#1, saa7146_i2c_transfer_#t~bitwise224#1, saa7146_i2c_transfer_#t~mem225#1, saa7146_i2c_transfer_#t~ret226#1, saa7146_i2c_transfer_#t~ret227#1, saa7146_i2c_transfer_#t~mem228#1, saa7146_i2c_transfer_#t~ret229#1, saa7146_i2c_transfer_#t~ret230#1, saa7146_i2c_transfer_#t~ret231#1, saa7146_i2c_transfer_~dev#1.base, saa7146_i2c_transfer_~dev#1.offset, saa7146_i2c_transfer_~msgs#1.base, saa7146_i2c_transfer_~msgs#1.offset, saa7146_i2c_transfer_~num#1, saa7146_i2c_transfer_~retries#1, saa7146_i2c_transfer_~i~2#1, saa7146_i2c_transfer_~count~0#1, saa7146_i2c_transfer_~buffer~0#1.base, saa7146_i2c_transfer_~buffer~0#1.offset, saa7146_i2c_transfer_~err~0#1, saa7146_i2c_transfer_~short_delay~0#1, saa7146_i2c_transfer_~tmp~9#1, saa7146_i2c_transfer_~#descriptor~2#1.base, saa7146_i2c_transfer_~#descriptor~2#1.offset, saa7146_i2c_transfer_~tmp___0~5#1, saa7146_i2c_transfer_~#descriptor___0~2#1.base, saa7146_i2c_transfer_~#descriptor___0~2#1.offset, saa7146_i2c_transfer_~tmp___1~2#1, saa7146_i2c_transfer_~#descriptor___1~2#1.base, saa7146_i2c_transfer_~#descriptor___1~2#1.offset, saa7146_i2c_transfer_~tmp___2~2#1, saa7146_i2c_transfer_~tmp___3~1#1, saa7146_i2c_transfer_~#descriptor___2~1#1.base, saa7146_i2c_transfer_~#descriptor___2~1#1.offset, saa7146_i2c_transfer_~tmp___4~1#1, saa7146_i2c_transfer_~tmp___5~1#1, saa7146_i2c_transfer_~#descriptor___3~1#1.base, saa7146_i2c_transfer_~#descriptor___3~1#1.offset, saa7146_i2c_transfer_~tmp___6~1#1, saa7146_i2c_transfer_~#zero~0#1.base, saa7146_i2c_transfer_~#zero~0#1.offset, saa7146_i2c_transfer_~tmp___7~1#1;havoc saa7146_i2c_transfer_#in~dev#1.base, saa7146_i2c_transfer_#in~dev#1.offset, saa7146_i2c_transfer_#in~msgs#1.base, saa7146_i2c_transfer_#in~msgs#1.offset, saa7146_i2c_transfer_#in~num#1, saa7146_i2c_transfer_#in~retries#1;assume { :end_inline_saa7146_i2c_transfer } true;saa7146_i2c_xfer_~tmp___1~3#1 := saa7146_i2c_xfer_#t~ret235#1;havoc saa7146_i2c_xfer_#t~mem234#1;havoc saa7146_i2c_xfer_#t~ret235#1;saa7146_i2c_xfer_#res#1 := saa7146_i2c_xfer_~tmp___1~3#1; [2025-02-08 15:24:01,607 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5075: saa7146_i2c_writeout_~timeout~0#1 := saa7146_i2c_writeout_~__ret~0#1;saa7146_i2c_writeout_#t~short142#1 := 18446744073709551104 == saa7146_i2c_writeout_~timeout~0#1 % 18446744073709551616; [2025-02-08 15:24:01,607 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5075-1: saa7146_i2c_writeout_~timeout~0#1 := saa7146_i2c_writeout_~__ret~0#1;saa7146_i2c_writeout_#t~short142#1 := 18446744073709551104 == saa7146_i2c_writeout_~timeout~0#1 % 18446744073709551616; [2025-02-08 15:24:01,607 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5141: saa7146_i2c_writeout_#t~ret161#1 := ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;havoc ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1;assume { :end_inline_ldv__builtin_expect } true;saa7146_i2c_writeout_~tmp___5~0#1 := saa7146_i2c_writeout_#t~ret161#1;havoc saa7146_i2c_writeout_#t~mem160#1;havoc saa7146_i2c_writeout_#t~ret161#1; [2025-02-08 15:24:01,607 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5141-1: saa7146_i2c_writeout_#t~ret161#1 := ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;havoc ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1;assume { :end_inline_ldv__builtin_expect } true;saa7146_i2c_writeout_~tmp___5~0#1 := saa7146_i2c_writeout_#t~ret161#1;havoc saa7146_i2c_writeout_#t~mem160#1;havoc saa7146_i2c_writeout_#t~ret161#1; [2025-02-08 15:24:01,608 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4943: saa7146_i2c_reset_#t~ret101#1 := ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;havoc ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1;assume { :end_inline_ldv__builtin_expect } true;saa7146_i2c_reset_~tmp___1~0#1 := saa7146_i2c_reset_#t~ret101#1;havoc saa7146_i2c_reset_#t~mem100#1;havoc saa7146_i2c_reset_#t~ret101#1; [2025-02-08 15:24:01,608 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4943-1: saa7146_i2c_reset_#t~ret101#1 := ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;havoc ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1;assume { :end_inline_ldv__builtin_expect } true;saa7146_i2c_reset_~tmp___1~0#1 := saa7146_i2c_reset_#t~ret101#1;havoc saa7146_i2c_reset_#t~mem100#1;havoc saa7146_i2c_reset_#t~ret101#1; [2025-02-08 15:24:01,608 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5538: main_#t~ret246#1 := saa7146_i2c_func_#res#1;havoc saa7146_i2c_func_~adapter#1.base, saa7146_i2c_func_~adapter#1.offset;havoc saa7146_i2c_func_#in~adapter#1.base, saa7146_i2c_func_#in~adapter#1.offset;assume { :end_inline_saa7146_i2c_func } true; [2025-02-08 15:24:01,608 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5142: assume 0 != saa7146_i2c_writeout_~tmp___5~0#1;assume { :begin_inline___dynamic_pr_debug } true;__dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset := saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset, 37, 0;havoc __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;__dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset := __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset;__dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset := __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;havoc __dynamic_pr_debug_#t~nondet691#1;__dynamic_pr_debug_#res#1 := __dynamic_pr_debug_#t~nondet691#1;havoc __dynamic_pr_debug_#t~nondet691#1; [2025-02-08 15:24:01,608 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5142: assume !(0 != saa7146_i2c_writeout_~tmp___5~0#1); [2025-02-08 15:24:01,608 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5076-1: assume saa7146_i2c_writeout_#t~short142#1; [2025-02-08 15:24:01,608 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5076-1: assume !saa7146_i2c_writeout_#t~short142#1;call saa7146_i2c_writeout_#t~mem141#1 := read~int#6(saa7146_i2c_writeout_~dev#1.base, 1226 + saa7146_i2c_writeout_~dev#1.offset, 4);saa7146_i2c_writeout_#t~short142#1 := 0 != saa7146_i2c_writeout_#t~mem141#1; [2025-02-08 15:24:01,608 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5076-2: assume saa7146_i2c_writeout_#t~short142#1;havoc saa7146_i2c_writeout_#t~mem141#1;havoc saa7146_i2c_writeout_#t~short142#1;assume { :begin_inline_SAA7146_IER_DISABLE } true;SAA7146_IER_DISABLE_#in~x#1.base, SAA7146_IER_DISABLE_#in~x#1.offset, SAA7146_IER_DISABLE_#in~y#1 := saa7146_i2c_writeout_~dev#1.base, saa7146_i2c_writeout_~dev#1.offset, 196608;havoc SAA7146_IER_DISABLE_#t~ret37#1.base, SAA7146_IER_DISABLE_#t~ret37#1.offset, SAA7146_IER_DISABLE_#t~ret38#1, SAA7146_IER_DISABLE_#t~mem39#1.base, SAA7146_IER_DISABLE_#t~mem39#1.offset, SAA7146_IER_DISABLE_#t~ret40#1, SAA7146_IER_DISABLE_#t~bitwise41#1, SAA7146_IER_DISABLE_#t~mem42#1.base, SAA7146_IER_DISABLE_#t~mem42#1.offset, SAA7146_IER_DISABLE_~x#1.base, SAA7146_IER_DISABLE_~x#1.offset, SAA7146_IER_DISABLE_~y#1, SAA7146_IER_DISABLE_~flags~0#1, SAA7146_IER_DISABLE_~tmp~4#1.base, SAA7146_IER_DISABLE_~tmp~4#1.offset, SAA7146_IER_DISABLE_~tmp___0~1#1;SAA7146_IER_DISABLE_~x#1.base, SAA7146_IER_DISABLE_~x#1.offset := SAA7146_IER_DISABLE_#in~x#1.base, SAA7146_IER_DISABLE_#in~x#1.offset;SAA7146_IER_DISABLE_~y#1 := SAA7146_IER_DISABLE_#in~y#1;havoc SAA7146_IER_DISABLE_~flags~0#1;havoc SAA7146_IER_DISABLE_~tmp~4#1.base, SAA7146_IER_DISABLE_~tmp~4#1.offset;havoc SAA7146_IER_DISABLE_~tmp___0~1#1;assume { :begin_inline_spinlock_check } true;spinlock_check_#in~lock#1.base, spinlock_check_#in~lock#1.offset := SAA7146_IER_DISABLE_~x#1.base, 858 + SAA7146_IER_DISABLE_~x#1.offset;havoc spinlock_check_#res#1.base, spinlock_check_#res#1.offset;havoc spinlock_check_~lock#1.base, spinlock_check_~lock#1.offset;spinlock_check_~lock#1.base, spinlock_check_~lock#1.offset := spinlock_check_#in~lock#1.base, spinlock_check_#in~lock#1.offset;spinlock_check_#res#1.base, spinlock_check_#res#1.offset := spinlock_check_~lock#1.base, spinlock_check_~lock#1.offset; [2025-02-08 15:24:01,608 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5076-2: assume !saa7146_i2c_writeout_#t~short142#1;havoc saa7146_i2c_writeout_#t~mem141#1;havoc saa7146_i2c_writeout_#t~short142#1;call saa7146_i2c_writeout_#t~mem145#1.base, saa7146_i2c_writeout_#t~mem145#1.offset := read~$Pointer$#6(saa7146_i2c_writeout_~dev#1.base, 802 + saa7146_i2c_writeout_~dev#1.offset, 8);assume { :begin_inline_readl } true;readl_#in~addr#1.base, readl_#in~addr#1.offset := saa7146_i2c_writeout_#t~mem145#1.base, 144 + saa7146_i2c_writeout_#t~mem145#1.offset;havoc readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;readl_~addr#1.base, readl_~addr#1.offset := readl_#in~addr#1.base, readl_#in~addr#1.offset;havoc readl_~ret~0#1;readl_#res#1 := readl_~ret~0#1; [2025-02-08 15:24:01,608 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5142-1: assume 0 != saa7146_i2c_writeout_~tmp___5~0#1;assume { :begin_inline___dynamic_pr_debug } true;__dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset := saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset, 37, 0;havoc __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;__dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset := __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset;__dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset := __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;havoc __dynamic_pr_debug_#t~nondet691#1;__dynamic_pr_debug_#res#1 := __dynamic_pr_debug_#t~nondet691#1;havoc __dynamic_pr_debug_#t~nondet691#1; [2025-02-08 15:24:01,608 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5142-1: assume !(0 != saa7146_i2c_writeout_~tmp___5~0#1); [2025-02-08 15:24:01,608 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5076: assume saa7146_i2c_writeout_#t~short142#1;havoc saa7146_i2c_writeout_#t~mem141#1;havoc saa7146_i2c_writeout_#t~short142#1;assume { :begin_inline_SAA7146_IER_DISABLE } true;SAA7146_IER_DISABLE_#in~x#1.base, SAA7146_IER_DISABLE_#in~x#1.offset, SAA7146_IER_DISABLE_#in~y#1 := saa7146_i2c_writeout_~dev#1.base, saa7146_i2c_writeout_~dev#1.offset, 196608;havoc SAA7146_IER_DISABLE_#t~ret37#1.base, SAA7146_IER_DISABLE_#t~ret37#1.offset, SAA7146_IER_DISABLE_#t~ret38#1, SAA7146_IER_DISABLE_#t~mem39#1.base, SAA7146_IER_DISABLE_#t~mem39#1.offset, SAA7146_IER_DISABLE_#t~ret40#1, SAA7146_IER_DISABLE_#t~bitwise41#1, SAA7146_IER_DISABLE_#t~mem42#1.base, SAA7146_IER_DISABLE_#t~mem42#1.offset, SAA7146_IER_DISABLE_~x#1.base, SAA7146_IER_DISABLE_~x#1.offset, SAA7146_IER_DISABLE_~y#1, SAA7146_IER_DISABLE_~flags~0#1, SAA7146_IER_DISABLE_~tmp~4#1.base, SAA7146_IER_DISABLE_~tmp~4#1.offset, SAA7146_IER_DISABLE_~tmp___0~1#1;SAA7146_IER_DISABLE_~x#1.base, SAA7146_IER_DISABLE_~x#1.offset := SAA7146_IER_DISABLE_#in~x#1.base, SAA7146_IER_DISABLE_#in~x#1.offset;SAA7146_IER_DISABLE_~y#1 := SAA7146_IER_DISABLE_#in~y#1;havoc SAA7146_IER_DISABLE_~flags~0#1;havoc SAA7146_IER_DISABLE_~tmp~4#1.base, SAA7146_IER_DISABLE_~tmp~4#1.offset;havoc SAA7146_IER_DISABLE_~tmp___0~1#1;assume { :begin_inline_spinlock_check } true;spinlock_check_#in~lock#1.base, spinlock_check_#in~lock#1.offset := SAA7146_IER_DISABLE_~x#1.base, 858 + SAA7146_IER_DISABLE_~x#1.offset;havoc spinlock_check_#res#1.base, spinlock_check_#res#1.offset;havoc spinlock_check_~lock#1.base, spinlock_check_~lock#1.offset;spinlock_check_~lock#1.base, spinlock_check_~lock#1.offset := spinlock_check_#in~lock#1.base, spinlock_check_#in~lock#1.offset;spinlock_check_#res#1.base, spinlock_check_#res#1.offset := spinlock_check_~lock#1.base, spinlock_check_~lock#1.offset; [2025-02-08 15:24:01,608 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5076: assume !saa7146_i2c_writeout_#t~short142#1;havoc saa7146_i2c_writeout_#t~mem141#1;havoc saa7146_i2c_writeout_#t~short142#1;call saa7146_i2c_writeout_#t~mem145#1.base, saa7146_i2c_writeout_#t~mem145#1.offset := read~$Pointer$#6(saa7146_i2c_writeout_~dev#1.base, 802 + saa7146_i2c_writeout_~dev#1.offset, 8);assume { :begin_inline_readl } true;readl_#in~addr#1.base, readl_#in~addr#1.offset := saa7146_i2c_writeout_#t~mem145#1.base, 144 + saa7146_i2c_writeout_#t~mem145#1.offset;havoc readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;readl_~addr#1.base, readl_~addr#1.offset := readl_#in~addr#1.base, readl_#in~addr#1.offset;havoc readl_~ret~0#1;readl_#res#1 := readl_~ret~0#1; [2025-02-08 15:24:01,609 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4944-1: assume 0 != saa7146_i2c_reset_~tmp___1~0#1;assume { :begin_inline___dynamic_pr_debug } true;__dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset := saa7146_i2c_reset_~#descriptor___0~0#1.base, saa7146_i2c_reset_~#descriptor___0~0#1.offset, 13, 0;havoc __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;__dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset := __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset;__dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset := __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;havoc __dynamic_pr_debug_#t~nondet691#1;__dynamic_pr_debug_#res#1 := __dynamic_pr_debug_#t~nondet691#1;havoc __dynamic_pr_debug_#t~nondet691#1; [2025-02-08 15:24:01,609 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4944-1: assume !(0 != saa7146_i2c_reset_~tmp___1~0#1); [2025-02-08 15:24:01,609 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5076-3: assume saa7146_i2c_writeout_#t~short142#1; [2025-02-08 15:24:01,609 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5076-3: assume !saa7146_i2c_writeout_#t~short142#1;call saa7146_i2c_writeout_#t~mem141#1 := read~int#6(saa7146_i2c_writeout_~dev#1.base, 1226 + saa7146_i2c_writeout_~dev#1.offset, 4);saa7146_i2c_writeout_#t~short142#1 := 0 != saa7146_i2c_writeout_#t~mem141#1; [2025-02-08 15:24:01,609 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4944: assume 0 != saa7146_i2c_reset_~tmp___1~0#1;assume { :begin_inline___dynamic_pr_debug } true;__dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset := saa7146_i2c_reset_~#descriptor___0~0#1.base, saa7146_i2c_reset_~#descriptor___0~0#1.offset, 13, 0;havoc __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;__dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset := __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset;__dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset := __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;havoc __dynamic_pr_debug_#t~nondet691#1;__dynamic_pr_debug_#res#1 := __dynamic_pr_debug_#t~nondet691#1;havoc __dynamic_pr_debug_#t~nondet691#1; [2025-02-08 15:24:01,609 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4944: assume !(0 != saa7146_i2c_reset_~tmp___1~0#1); [2025-02-08 15:24:01,609 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5077: havoc SAA7146_IER_DISABLE_#t~ret37#1.base, SAA7146_IER_DISABLE_#t~ret37#1.offset, SAA7146_IER_DISABLE_#t~ret38#1, SAA7146_IER_DISABLE_#t~mem39#1.base, SAA7146_IER_DISABLE_#t~mem39#1.offset, SAA7146_IER_DISABLE_#t~ret40#1, SAA7146_IER_DISABLE_#t~bitwise41#1, SAA7146_IER_DISABLE_#t~mem42#1.base, SAA7146_IER_DISABLE_#t~mem42#1.offset, SAA7146_IER_DISABLE_~x#1.base, SAA7146_IER_DISABLE_~x#1.offset, SAA7146_IER_DISABLE_~y#1, SAA7146_IER_DISABLE_~flags~0#1, SAA7146_IER_DISABLE_~tmp~4#1.base, SAA7146_IER_DISABLE_~tmp~4#1.offset, SAA7146_IER_DISABLE_~tmp___0~1#1;havoc SAA7146_IER_DISABLE_#in~x#1.base, SAA7146_IER_DISABLE_#in~x#1.offset, SAA7146_IER_DISABLE_#in~y#1;assume { :end_inline_SAA7146_IER_DISABLE } true;call saa7146_i2c_writeout_#t~mem143#1.base, saa7146_i2c_writeout_#t~mem143#1.offset := read~$Pointer$#6(saa7146_i2c_writeout_~dev#1.base, 802 + saa7146_i2c_writeout_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := 196608, saa7146_i2c_writeout_#t~mem143#1.base, 268 + saa7146_i2c_writeout_#t~mem143#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,609 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5077-1: havoc SAA7146_IER_DISABLE_#t~ret37#1.base, SAA7146_IER_DISABLE_#t~ret37#1.offset, SAA7146_IER_DISABLE_#t~ret38#1, SAA7146_IER_DISABLE_#t~mem39#1.base, SAA7146_IER_DISABLE_#t~mem39#1.offset, SAA7146_IER_DISABLE_#t~ret40#1, SAA7146_IER_DISABLE_#t~bitwise41#1, SAA7146_IER_DISABLE_#t~mem42#1.base, SAA7146_IER_DISABLE_#t~mem42#1.offset, SAA7146_IER_DISABLE_~x#1.base, SAA7146_IER_DISABLE_~x#1.offset, SAA7146_IER_DISABLE_~y#1, SAA7146_IER_DISABLE_~flags~0#1, SAA7146_IER_DISABLE_~tmp~4#1.base, SAA7146_IER_DISABLE_~tmp~4#1.offset, SAA7146_IER_DISABLE_~tmp___0~1#1;havoc SAA7146_IER_DISABLE_#in~x#1.base, SAA7146_IER_DISABLE_#in~x#1.offset, SAA7146_IER_DISABLE_#in~y#1;assume { :end_inline_SAA7146_IER_DISABLE } true;call saa7146_i2c_writeout_#t~mem143#1.base, saa7146_i2c_writeout_#t~mem143#1.offset := read~$Pointer$#6(saa7146_i2c_writeout_~dev#1.base, 802 + saa7146_i2c_writeout_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := 196608, saa7146_i2c_writeout_#t~mem143#1.base, 268 + saa7146_i2c_writeout_#t~mem143#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,609 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4879: call write~int#16(saa7146_i2c_msg_cleanup_#t~bitwise80#1, saa7146_i2c_msg_cleanup_#t~mem78#1.base, saa7146_i2c_msg_cleanup_#t~mem78#1.offset + (if saa7146_i2c_msg_cleanup_~j~1#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_msg_cleanup_~j~1#1 % 18446744073709551616 % 18446744073709551616 else saa7146_i2c_msg_cleanup_~j~1#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 1);saa7146_i2c_msg_cleanup_~op_count~1#1 := 1 + saa7146_i2c_msg_cleanup_~op_count~1#1;saa7146_i2c_msg_cleanup_~j~1#1 := 1 + saa7146_i2c_msg_cleanup_~j~1#1;call saa7146_i2c_msg_cleanup_#t~mem81#1 := read~int#11(saa7146_i2c_msg_cleanup_~m#1.base, 4 + (saa7146_i2c_msg_cleanup_~m#1.offset + 14 * (if saa7146_i2c_msg_cleanup_~i~1#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_msg_cleanup_~i~1#1 % 18446744073709551616 % 18446744073709551616 else saa7146_i2c_msg_cleanup_~i~1#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616)), 2); [2025-02-08 15:24:01,609 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4879-1: [2025-02-08 15:24:01,610 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4879-4: call saa7146_i2c_msg_cleanup_#t~mem78#1.base, saa7146_i2c_msg_cleanup_#t~mem78#1.offset := read~$Pointer$#11(saa7146_i2c_msg_cleanup_~m#1.base, 6 + (saa7146_i2c_msg_cleanup_~m#1.offset + 14 * (if saa7146_i2c_msg_cleanup_~i~1#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_msg_cleanup_~i~1#1 % 18446744073709551616 % 18446744073709551616 else saa7146_i2c_msg_cleanup_~i~1#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616)), 8);call saa7146_i2c_msg_cleanup_#t~mem79#1 := read~int#5(saa7146_i2c_msg_cleanup_~op#1.base, saa7146_i2c_msg_cleanup_~op#1.offset + 4 * (if (if saa7146_i2c_msg_cleanup_~op_count~1#1 < 0 && 0 != saa7146_i2c_msg_cleanup_~op_count~1#1 % 3 then 1 + saa7146_i2c_msg_cleanup_~op_count~1#1 / 3 else saa7146_i2c_msg_cleanup_~op_count~1#1 / 3) % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then (if saa7146_i2c_msg_cleanup_~op_count~1#1 < 0 && 0 != saa7146_i2c_msg_cleanup_~op_count~1#1 % 3 then 1 + saa7146_i2c_msg_cleanup_~op_count~1#1 / 3 else saa7146_i2c_msg_cleanup_~op_count~1#1 / 3) % 18446744073709551616 % 18446744073709551616 else (if saa7146_i2c_msg_cleanup_~op_count~1#1 < 0 && 0 != saa7146_i2c_msg_cleanup_~op_count~1#1 % 3 then 1 + saa7146_i2c_msg_cleanup_~op_count~1#1 / 3 else saa7146_i2c_msg_cleanup_~op_count~1#1 / 3) % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 4); [2025-02-08 15:24:01,610 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4879-2: havoc saa7146_i2c_msg_cleanup_#t~bitwise80#1; [2025-02-08 15:24:01,610 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4813: call saa7146_i2c_msg_prepare_#t~mem51#1 := read~int#11(saa7146_i2c_msg_prepare_~m#1.base, 4 + (saa7146_i2c_msg_prepare_~m#1.offset + 14 * (if saa7146_i2c_msg_prepare_~i~0#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_msg_prepare_~i~0#1 % 18446744073709551616 % 18446744073709551616 else saa7146_i2c_msg_prepare_~i~0#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616)), 2);saa7146_i2c_msg_prepare_~mem~0#1 := 1 + (if saa7146_i2c_msg_prepare_#t~mem51#1 % 65536 % 4294967296 <= 2147483647 then saa7146_i2c_msg_prepare_#t~mem51#1 % 65536 % 4294967296 else saa7146_i2c_msg_prepare_#t~mem51#1 % 65536 % 4294967296 - 4294967296) + saa7146_i2c_msg_prepare_~mem~0#1;saa7146_i2c_msg_prepare_~i~0#1 := 1 + saa7146_i2c_msg_prepare_~i~0#1; [2025-02-08 15:24:01,610 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4879-3: assume 0 == saa7146_i2c_msg_cleanup_#t~mem79#1 % 4294967296 || 0 == 8 * (3 - (if saa7146_i2c_msg_cleanup_~op_count~1#1 < 0 && 0 != saa7146_i2c_msg_cleanup_~op_count~1#1 % 3 then saa7146_i2c_msg_cleanup_~op_count~1#1 % 3 - 3 else saa7146_i2c_msg_cleanup_~op_count~1#1 % 3));saa7146_i2c_msg_cleanup_#t~bitwise80#1 := saa7146_i2c_msg_cleanup_#t~mem79#1; [2025-02-08 15:24:01,610 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4879-3: assume !(0 == saa7146_i2c_msg_cleanup_#t~mem79#1 % 4294967296 || 0 == 8 * (3 - (if saa7146_i2c_msg_cleanup_~op_count~1#1 < 0 && 0 != saa7146_i2c_msg_cleanup_~op_count~1#1 % 3 then saa7146_i2c_msg_cleanup_~op_count~1#1 % 3 - 3 else saa7146_i2c_msg_cleanup_~op_count~1#1 % 3))); [2025-02-08 15:24:01,610 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5540: assume main_#t~switch244#1; [2025-02-08 15:24:01,610 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5540: assume !main_#t~switch244#1;havoc main_#t~switch244#1;havoc main_#t~ret245#1;havoc main_#t~ret246#1;havoc main_#t~switch244#1;havoc main_#t~ret245#1;havoc main_#t~ret246#1; [2025-02-08 15:24:01,610 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5342: saa7146_i2c_transfer_#t~ret209#1 := ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;havoc ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1;assume { :end_inline_ldv__builtin_expect } true;saa7146_i2c_transfer_~tmp___1~2#1 := saa7146_i2c_transfer_#t~ret209#1;havoc saa7146_i2c_transfer_#t~mem208#1;havoc saa7146_i2c_transfer_#t~ret209#1; [2025-02-08 15:24:01,610 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5408: saa7146_i2c_transfer_#t~ret219#1 := saa7146_i2c_msg_cleanup_#res#1;havoc saa7146_i2c_msg_cleanup_#t~mem78#1.base, saa7146_i2c_msg_cleanup_#t~mem78#1.offset, saa7146_i2c_msg_cleanup_#t~mem79#1, saa7146_i2c_msg_cleanup_#t~bitwise80#1, saa7146_i2c_msg_cleanup_#t~mem81#1, saa7146_i2c_msg_cleanup_~m#1.base, saa7146_i2c_msg_cleanup_~m#1.offset, saa7146_i2c_msg_cleanup_~num#1, saa7146_i2c_msg_cleanup_~op#1.base, saa7146_i2c_msg_cleanup_~op#1.offset, saa7146_i2c_msg_cleanup_~i~1#1, saa7146_i2c_msg_cleanup_~j~1#1, saa7146_i2c_msg_cleanup_~op_count~1#1;havoc saa7146_i2c_msg_cleanup_#in~m#1.base, saa7146_i2c_msg_cleanup_#in~m#1.offset, saa7146_i2c_msg_cleanup_#in~num#1, saa7146_i2c_msg_cleanup_#in~op#1.base, saa7146_i2c_msg_cleanup_#in~op#1.offset;assume { :end_inline_saa7146_i2c_msg_cleanup } true;saa7146_i2c_transfer_~tmp___5~1#1 := saa7146_i2c_transfer_#t~ret219#1;havoc saa7146_i2c_transfer_#t~ret219#1; [2025-02-08 15:24:01,610 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5078: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_writeout_#t~mem143#1.base, saa7146_i2c_writeout_#t~mem143#1.offset; [2025-02-08 15:24:01,610 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5078-1: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_writeout_#t~mem143#1.base, saa7146_i2c_writeout_#t~mem143#1.offset; [2025-02-08 15:24:01,610 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4682: havoc _raw_spin_unlock_irqrestore_~arg0#1.base, _raw_spin_unlock_irqrestore_~arg0#1.offset, _raw_spin_unlock_irqrestore_~arg1#1;havoc _raw_spin_unlock_irqrestore_#in~arg0#1.base, _raw_spin_unlock_irqrestore_#in~arg0#1.offset, _raw_spin_unlock_irqrestore_#in~arg1#1;assume { :end_inline__raw_spin_unlock_irqrestore } true; [2025-02-08 15:24:01,610 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4616-1: havoc get_current_#t~switch4#1;havoc get_current_#t~switch4#1;get_current_#res#1.base, get_current_#res#1.offset := get_current_~pfo_ret__~0#1.base, get_current_~pfo_ret__~0#1.offset; [2025-02-08 15:24:01,610 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4682-3: havoc _raw_spin_unlock_irqrestore_~arg0#1.base, _raw_spin_unlock_irqrestore_~arg0#1.offset, _raw_spin_unlock_irqrestore_~arg1#1;havoc _raw_spin_unlock_irqrestore_#in~arg0#1.base, _raw_spin_unlock_irqrestore_#in~arg0#1.offset, _raw_spin_unlock_irqrestore_#in~arg1#1;assume { :end_inline__raw_spin_unlock_irqrestore } true; [2025-02-08 15:24:01,610 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4616-2: havoc get_current_#t~switch4#1;havoc get_current_#t~switch4#1;get_current_#res#1.base, get_current_#res#1.offset := get_current_~pfo_ret__~0#1.base, get_current_~pfo_ret__~0#1.offset; [2025-02-08 15:24:01,610 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4682-1: havoc _raw_spin_unlock_irqrestore_~arg0#1.base, _raw_spin_unlock_irqrestore_~arg0#1.offset, _raw_spin_unlock_irqrestore_~arg1#1;havoc _raw_spin_unlock_irqrestore_#in~arg0#1.base, _raw_spin_unlock_irqrestore_#in~arg0#1.offset, _raw_spin_unlock_irqrestore_#in~arg1#1;assume { :end_inline__raw_spin_unlock_irqrestore } true; [2025-02-08 15:24:01,611 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4616: havoc get_current_#t~switch4#1;havoc get_current_#t~switch4#1;get_current_#res#1.base, get_current_#res#1.offset := get_current_~pfo_ret__~0#1.base, get_current_~pfo_ret__~0#1.offset; [2025-02-08 15:24:01,611 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4682-2: havoc _raw_spin_unlock_irqrestore_~arg0#1.base, _raw_spin_unlock_irqrestore_~arg0#1.offset, _raw_spin_unlock_irqrestore_~arg1#1;havoc _raw_spin_unlock_irqrestore_#in~arg0#1.base, _raw_spin_unlock_irqrestore_#in~arg0#1.offset, _raw_spin_unlock_irqrestore_#in~arg1#1;assume { :end_inline__raw_spin_unlock_irqrestore } true; [2025-02-08 15:24:01,611 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7589-2: havoc __dynamic_pr_debug_#t~nondet691#1;saa7146_i2c_writeout_#t~ret187#1 := __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;havoc __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;assume { :end_inline___dynamic_pr_debug } true;havoc saa7146_i2c_writeout_#t~ret187#1; [2025-02-08 15:24:01,611 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4616-3: havoc get_current_#t~switch4#1;havoc get_current_#t~switch4#1;get_current_#res#1.base, get_current_#res#1.offset := get_current_~pfo_ret__~0#1.base, get_current_~pfo_ret__~0#1.offset; [2025-02-08 15:24:01,611 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7589: havoc __dynamic_pr_debug_#t~nondet691#1;saa7146_i2c_writeout_#t~ret194#1 := __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;havoc __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;assume { :end_inline___dynamic_pr_debug } true;havoc saa7146_i2c_writeout_#t~mem193#1;havoc saa7146_i2c_writeout_#t~ret194#1; [2025-02-08 15:24:01,611 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5343: assume 0 != saa7146_i2c_transfer_~tmp___1~2#1;assume { :begin_inline___dynamic_pr_debug } true;__dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset := saa7146_i2c_transfer_~#descriptor___0~2#1.base, saa7146_i2c_transfer_~#descriptor___0~2#1.offset, 85, 0;havoc __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;__dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset := __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset;__dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset := __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;havoc __dynamic_pr_debug_#t~nondet691#1;__dynamic_pr_debug_#res#1 := __dynamic_pr_debug_#t~nondet691#1;havoc __dynamic_pr_debug_#t~nondet691#1; [2025-02-08 15:24:01,611 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5343: assume !(0 != saa7146_i2c_transfer_~tmp___1~2#1); [2025-02-08 15:24:01,611 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7589-6: havoc __dynamic_pr_debug_#t~nondet691#1;saa7146_i2c_writeout_#t~ret177#1 := __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;havoc __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;assume { :end_inline___dynamic_pr_debug } true;havoc saa7146_i2c_writeout_#t~ret177#1; [2025-02-08 15:24:01,611 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5409: assume 0 != saa7146_i2c_transfer_~tmp___5~1#1; [2025-02-08 15:24:01,611 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5409: assume !(0 != saa7146_i2c_transfer_~tmp___5~1#1); [2025-02-08 15:24:01,611 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7589-4: havoc __dynamic_pr_debug_#t~nondet691#1;saa7146_i2c_writeout_#t~ret182#1 := __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;havoc __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;assume { :end_inline___dynamic_pr_debug } true;havoc saa7146_i2c_writeout_#t~ret182#1; [2025-02-08 15:24:01,611 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7589-10: havoc __dynamic_pr_debug_#t~nondet691#1;saa7146_i2c_writeout_#t~ret167#1 := __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;havoc __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;assume { :end_inline___dynamic_pr_debug } true;havoc saa7146_i2c_writeout_#t~ret167#1; [2025-02-08 15:24:01,611 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7589-8: havoc __dynamic_pr_debug_#t~nondet691#1;saa7146_i2c_writeout_#t~ret172#1 := __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;havoc __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;assume { :end_inline___dynamic_pr_debug } true;havoc saa7146_i2c_writeout_#t~ret172#1; [2025-02-08 15:24:01,611 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5079: assume 18446744073709551104 == saa7146_i2c_writeout_~timeout~0#1 % 18446744073709551616;saa7146_i2c_writeout_#res#1 := -512;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset);havoc saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset; [2025-02-08 15:24:01,612 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5079: assume !(18446744073709551104 == saa7146_i2c_writeout_~timeout~0#1 % 18446744073709551616);assume { :begin_inline_printk } true;printk_#in~arg0#1.base, printk_#in~arg0#1.offset := 27, 0;havoc printk_#res#1;havoc printk_#t~nondet701#1, printk_~arg0#1.base, printk_~arg0#1.offset;printk_~arg0#1.base, printk_~arg0#1.offset := printk_#in~arg0#1.base, printk_#in~arg0#1.offset;havoc printk_#t~nondet701#1;printk_#res#1 := printk_#t~nondet701#1;havoc printk_#t~nondet701#1; [2025-02-08 15:24:01,612 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7589-14: havoc __dynamic_pr_debug_#t~nondet691#1;saa7146_i2c_writeout_#t~ret126#1 := __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;havoc __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;assume { :end_inline___dynamic_pr_debug } true;havoc saa7146_i2c_writeout_#t~mem124#1;havoc saa7146_i2c_writeout_#t~mem125#1;havoc saa7146_i2c_writeout_#t~ret126#1; [2025-02-08 15:24:01,612 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5079-1: assume 18446744073709551104 == saa7146_i2c_writeout_~timeout~0#1 % 18446744073709551616;saa7146_i2c_writeout_#res#1 := -512;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset);havoc saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset; [2025-02-08 15:24:01,612 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5079-1: assume !(18446744073709551104 == saa7146_i2c_writeout_~timeout~0#1 % 18446744073709551616);assume { :begin_inline_printk } true;printk_#in~arg0#1.base, printk_#in~arg0#1.offset := 27, 0;havoc printk_#res#1;havoc printk_#t~nondet701#1, printk_~arg0#1.base, printk_~arg0#1.offset;printk_~arg0#1.base, printk_~arg0#1.offset := printk_#in~arg0#1.base, printk_#in~arg0#1.offset;havoc printk_#t~nondet701#1;printk_#res#1 := printk_#t~nondet701#1;havoc printk_#t~nondet701#1; [2025-02-08 15:24:01,612 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7589-12: havoc __dynamic_pr_debug_#t~nondet691#1;saa7146_i2c_writeout_#t~ret162#1 := __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;havoc __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;assume { :end_inline___dynamic_pr_debug } true;havoc saa7146_i2c_writeout_#t~ret162#1; [2025-02-08 15:24:01,612 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7589-18: havoc __dynamic_pr_debug_#t~nondet691#1;saa7146_i2c_reset_#t~ret102#1 := __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;havoc __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;assume { :end_inline___dynamic_pr_debug } true;havoc saa7146_i2c_reset_#t~ret102#1; [2025-02-08 15:24:01,612 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7589-16: havoc __dynamic_pr_debug_#t~nondet691#1;saa7146_i2c_reset_#t~ret118#1 := __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;havoc __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;assume { :end_inline___dynamic_pr_debug } true;havoc saa7146_i2c_reset_#t~ret118#1; [2025-02-08 15:24:01,612 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7589-22: havoc __dynamic_pr_debug_#t~nondet691#1;saa7146_i2c_transfer_#t~ret227#1 := __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;havoc __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;assume { :end_inline___dynamic_pr_debug } true;havoc saa7146_i2c_transfer_#t~ret227#1; [2025-02-08 15:24:01,612 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7589-20: havoc __dynamic_pr_debug_#t~nondet691#1;saa7146_i2c_reset_#t~ret89#1 := __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;havoc __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;assume { :end_inline___dynamic_pr_debug } true;havoc saa7146_i2c_reset_#t~ret89#1; [2025-02-08 15:24:01,612 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7589-26: havoc __dynamic_pr_debug_#t~nondet691#1;saa7146_i2c_transfer_#t~ret218#1 := __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;havoc __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;assume { :end_inline___dynamic_pr_debug } true;havoc saa7146_i2c_transfer_#t~ret218#1; [2025-02-08 15:24:01,612 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7589-24: havoc __dynamic_pr_debug_#t~nondet691#1;saa7146_i2c_transfer_#t~ret223#1 := __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;havoc __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;assume { :end_inline___dynamic_pr_debug } true;havoc saa7146_i2c_transfer_#t~ret223#1; [2025-02-08 15:24:01,612 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4617-2: assume get_current_#t~switch4#1; [2025-02-08 15:24:01,612 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4617-2: assume !get_current_#t~switch4#1;get_current_#t~switch4#1 := get_current_#t~switch4#1; [2025-02-08 15:24:01,612 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7589-30: havoc __dynamic_pr_debug_#t~nondet691#1;saa7146_i2c_writeout_#t~ret187#1 := __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;havoc __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;assume { :end_inline___dynamic_pr_debug } true;havoc saa7146_i2c_writeout_#t~ret187#1; [2025-02-08 15:24:01,612 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4617-3: assume get_current_#t~switch4#1; [2025-02-08 15:24:01,612 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4617-3: assume !get_current_#t~switch4#1;get_current_#t~switch4#1 := get_current_#t~switch4#1; [2025-02-08 15:24:01,613 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4617: assume get_current_#t~switch4#1; [2025-02-08 15:24:01,613 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4617: assume !get_current_#t~switch4#1;get_current_#t~switch4#1 := get_current_#t~switch4#1; [2025-02-08 15:24:01,616 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7656: havoc mutex_lock_interruptible_#t~nondet697#1;ldv_mutex_lock_interruptible_10_#t~ret250#1 := mutex_lock_interruptible_#res#1;havoc mutex_lock_interruptible_#t~nondet697#1, mutex_lock_interruptible_~arg0#1.base, mutex_lock_interruptible_~arg0#1.offset;havoc mutex_lock_interruptible_#in~arg0#1.base, mutex_lock_interruptible_#in~arg0#1.offset;assume { :end_inline_mutex_lock_interruptible } true;ldv_mutex_lock_interruptible_10_~tmp~14#1 := ldv_mutex_lock_interruptible_10_#t~ret250#1;havoc ldv_mutex_lock_interruptible_10_#t~ret250#1;ldv_mutex_lock_interruptible_10_~ldv_func_res~1#1 := ldv_mutex_lock_interruptible_10_~tmp~14#1;assume { :begin_inline_ldv_mutex_lock_interruptible_i2c_lock_of_saa7146_dev } true;ldv_mutex_lock_interruptible_i2c_lock_of_saa7146_dev_#in~lock#1.base, ldv_mutex_lock_interruptible_i2c_lock_of_saa7146_dev_#in~lock#1.offset := ldv_mutex_lock_interruptible_10_~ldv_func_arg1#1.base, ldv_mutex_lock_interruptible_10_~ldv_func_arg1#1.offset;havoc ldv_mutex_lock_interruptible_i2c_lock_of_saa7146_dev_#res#1;havoc ldv_mutex_lock_interruptible_i2c_lock_of_saa7146_dev_#t~nondet666#1, ldv_mutex_lock_interruptible_i2c_lock_of_saa7146_dev_~lock#1.base, ldv_mutex_lock_interruptible_i2c_lock_of_saa7146_dev_~lock#1.offset, ldv_mutex_lock_interruptible_i2c_lock_of_saa7146_dev_~nondetermined~0#1;ldv_mutex_lock_interruptible_i2c_lock_of_saa7146_dev_~lock#1.base, ldv_mutex_lock_interruptible_i2c_lock_of_saa7146_dev_~lock#1.offset := ldv_mutex_lock_interruptible_i2c_lock_of_saa7146_dev_#in~lock#1.base, ldv_mutex_lock_interruptible_i2c_lock_of_saa7146_dev_#in~lock#1.offset;havoc ldv_mutex_lock_interruptible_i2c_lock_of_saa7146_dev_~nondetermined~0#1; [2025-02-08 15:24:01,616 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4617-1: assume get_current_#t~switch4#1; [2025-02-08 15:24:01,616 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4617-1: assume !get_current_#t~switch4#1;get_current_#t~switch4#1 := get_current_#t~switch4#1; [2025-02-08 15:24:01,617 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7589-28: havoc __dynamic_pr_debug_#t~nondet691#1;saa7146_i2c_writeout_#t~ret194#1 := __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;havoc __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;assume { :end_inline___dynamic_pr_debug } true;havoc saa7146_i2c_writeout_#t~mem193#1;havoc saa7146_i2c_writeout_#t~ret194#1; [2025-02-08 15:24:01,617 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5410: assume 0 != saa7146_i2c_transfer_#t~bitwise220#1 % 4294967296;havoc saa7146_i2c_transfer_#t~bitwise220#1;call write~$Pointer$#10(93, 0, saa7146_i2c_transfer_~#descriptor___2~1#1.base, saa7146_i2c_transfer_~#descriptor___2~1#1.offset, 8);call write~$Pointer$#10(94, 0, saa7146_i2c_transfer_~#descriptor___2~1#1.base, 8 + saa7146_i2c_transfer_~#descriptor___2~1#1.offset, 8);call write~$Pointer$#10(95, 0, saa7146_i2c_transfer_~#descriptor___2~1#1.base, 16 + saa7146_i2c_transfer_~#descriptor___2~1#1.offset, 8);call write~$Pointer$#10(96, 0, saa7146_i2c_transfer_~#descriptor___2~1#1.base, 24 + saa7146_i2c_transfer_~#descriptor___2~1#1.offset, 8);call write~int#10(409, saa7146_i2c_transfer_~#descriptor___2~1#1.base, 32 + saa7146_i2c_transfer_~#descriptor___2~1#1.offset, 4);call write~int#10(0, saa7146_i2c_transfer_~#descriptor___2~1#1.base, 36 + saa7146_i2c_transfer_~#descriptor___2~1#1.offset, 1);call saa7146_i2c_transfer_#t~mem221#1 := read~int#10(saa7146_i2c_transfer_~#descriptor___2~1#1.base, 36 + saa7146_i2c_transfer_~#descriptor___2~1#1.offset, 1);assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if saa7146_i2c_transfer_#t~mem221#1 % 256 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_transfer_#t~mem221#1 % 256 % 18446744073709551616 else saa7146_i2c_transfer_#t~mem221#1 % 256 % 18446744073709551616 - 18446744073709551616) % 2, 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; [2025-02-08 15:24:01,617 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5410: assume !(0 != saa7146_i2c_transfer_#t~bitwise220#1 % 4294967296);havoc saa7146_i2c_transfer_#t~bitwise220#1; [2025-02-08 15:24:01,617 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7589-34: havoc __dynamic_pr_debug_#t~nondet691#1;saa7146_i2c_writeout_#t~ret177#1 := __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;havoc __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;assume { :end_inline___dynamic_pr_debug } true;havoc saa7146_i2c_writeout_#t~ret177#1; [2025-02-08 15:24:01,617 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7589-32: havoc __dynamic_pr_debug_#t~nondet691#1;saa7146_i2c_writeout_#t~ret182#1 := __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;havoc __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;assume { :end_inline___dynamic_pr_debug } true;havoc saa7146_i2c_writeout_#t~ret182#1; [2025-02-08 15:24:01,617 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5410-3: assume 8 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_transfer_#t~bitwise220#1 := ~saa7146_debug~0; [2025-02-08 15:24:01,617 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5410-3: assume !(8 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,617 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5410-4: assume 0 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_transfer_#t~bitwise220#1 := 0; [2025-02-08 15:24:01,617 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5410-4: assume !(0 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,617 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7589-38: havoc __dynamic_pr_debug_#t~nondet691#1;saa7146_i2c_writeout_#t~ret167#1 := __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;havoc __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;assume { :end_inline___dynamic_pr_debug } true;havoc saa7146_i2c_writeout_#t~ret167#1; [2025-02-08 15:24:01,617 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5410-1: [2025-02-08 15:24:01,618 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5410-2: havoc saa7146_i2c_transfer_#t~bitwise220#1;assume saa7146_i2c_transfer_#t~bitwise220#1 % 4294967296 <= ~saa7146_debug~0 % 4294967296 && saa7146_i2c_transfer_#t~bitwise220#1 % 4294967296 <= 8; [2025-02-08 15:24:01,618 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7589-36: havoc __dynamic_pr_debug_#t~nondet691#1;saa7146_i2c_writeout_#t~ret172#1 := __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;havoc __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;assume { :end_inline___dynamic_pr_debug } true;havoc saa7146_i2c_writeout_#t~ret172#1; [2025-02-08 15:24:01,618 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7589-42: havoc __dynamic_pr_debug_#t~nondet691#1;saa7146_i2c_writeout_#t~ret126#1 := __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;havoc __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;assume { :end_inline___dynamic_pr_debug } true;havoc saa7146_i2c_writeout_#t~mem124#1;havoc saa7146_i2c_writeout_#t~mem125#1;havoc saa7146_i2c_writeout_#t~ret126#1; [2025-02-08 15:24:01,618 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7589-40: havoc __dynamic_pr_debug_#t~nondet691#1;saa7146_i2c_writeout_#t~ret162#1 := __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;havoc __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;assume { :end_inline___dynamic_pr_debug } true;havoc saa7146_i2c_writeout_#t~ret162#1; [2025-02-08 15:24:01,618 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7589-46: havoc __dynamic_pr_debug_#t~nondet691#1;saa7146_i2c_reset_#t~ret118#1 := __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;havoc __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;assume { :end_inline___dynamic_pr_debug } true;havoc saa7146_i2c_reset_#t~ret118#1; [2025-02-08 15:24:01,618 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7589-44: havoc __dynamic_pr_debug_#t~nondet691#1;saa7146_i2c_transfer_#t~ret210#1 := __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;havoc __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;assume { :end_inline___dynamic_pr_debug } true;havoc saa7146_i2c_transfer_#t~ret210#1; [2025-02-08 15:24:01,618 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7589-50: havoc __dynamic_pr_debug_#t~nondet691#1;saa7146_i2c_reset_#t~ret89#1 := __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;havoc __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;assume { :end_inline___dynamic_pr_debug } true;havoc saa7146_i2c_reset_#t~ret89#1; [2025-02-08 15:24:01,618 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7589-48: havoc __dynamic_pr_debug_#t~nondet691#1;saa7146_i2c_reset_#t~ret102#1 := __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;havoc __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;assume { :end_inline___dynamic_pr_debug } true;havoc saa7146_i2c_reset_#t~ret102#1; [2025-02-08 15:24:01,618 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4816: assume saa7146_i2c_msg_prepare_~i~0#1 < saa7146_i2c_msg_prepare_~num#1; [2025-02-08 15:24:01,618 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4816: assume !(saa7146_i2c_msg_prepare_~i~0#1 < saa7146_i2c_msg_prepare_~num#1);saa7146_i2c_msg_prepare_~mem~0#1 := 1 + (if -1 + saa7146_i2c_msg_prepare_~mem~0#1 < 0 && 0 != (-1 + saa7146_i2c_msg_prepare_~mem~0#1) % 3 then 1 + (-1 + saa7146_i2c_msg_prepare_~mem~0#1) / 3 else (-1 + saa7146_i2c_msg_prepare_~mem~0#1) / 3); [2025-02-08 15:24:01,618 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7589-52: havoc __dynamic_pr_debug_#t~nondet691#1;saa7146_i2c_transfer_#t~ret200#1 := __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;havoc __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;assume { :end_inline___dynamic_pr_debug } true;havoc saa7146_i2c_transfer_#t~ret200#1; [2025-02-08 15:24:01,618 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5213: saa7146_i2c_writeout_#t~ret181#1 := ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;havoc ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1;assume { :end_inline_ldv__builtin_expect } true;saa7146_i2c_writeout_~tmp___9~0#1 := saa7146_i2c_writeout_#t~ret181#1;havoc saa7146_i2c_writeout_#t~mem180#1;havoc saa7146_i2c_writeout_#t~ret181#1; [2025-02-08 15:24:01,618 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5213-1: saa7146_i2c_writeout_#t~ret181#1 := ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;havoc ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1;assume { :end_inline_ldv__builtin_expect } true;saa7146_i2c_writeout_~tmp___9~0#1 := saa7146_i2c_writeout_#t~ret181#1;havoc saa7146_i2c_writeout_#t~mem180#1;havoc saa7146_i2c_writeout_#t~ret181#1; [2025-02-08 15:24:01,618 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4883: assume (if saa7146_i2c_msg_cleanup_#t~mem81#1 % 65536 % 4294967296 <= 2147483647 then saa7146_i2c_msg_cleanup_#t~mem81#1 % 65536 % 4294967296 else saa7146_i2c_msg_cleanup_#t~mem81#1 % 65536 % 4294967296 - 4294967296) > saa7146_i2c_msg_cleanup_~j~1#1;havoc saa7146_i2c_msg_cleanup_#t~mem81#1; [2025-02-08 15:24:01,618 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4883: assume !((if saa7146_i2c_msg_cleanup_#t~mem81#1 % 65536 % 4294967296 <= 2147483647 then saa7146_i2c_msg_cleanup_#t~mem81#1 % 65536 % 4294967296 else saa7146_i2c_msg_cleanup_#t~mem81#1 % 65536 % 4294967296 - 4294967296) > saa7146_i2c_msg_cleanup_~j~1#1);havoc saa7146_i2c_msg_cleanup_#t~mem81#1;saa7146_i2c_msg_cleanup_~i~1#1 := 1 + saa7146_i2c_msg_cleanup_~i~1#1; [2025-02-08 15:24:01,618 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5214: assume 0 != saa7146_i2c_writeout_~tmp___9~0#1;assume { :begin_inline___dynamic_pr_debug } true;__dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset := saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset, 61, 0;havoc __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;__dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset := __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset;__dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset := __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;havoc __dynamic_pr_debug_#t~nondet691#1;__dynamic_pr_debug_#res#1 := __dynamic_pr_debug_#t~nondet691#1;havoc __dynamic_pr_debug_#t~nondet691#1; [2025-02-08 15:24:01,619 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5214: assume !(0 != saa7146_i2c_writeout_~tmp___9~0#1); [2025-02-08 15:24:01,619 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5214-1: assume 0 != saa7146_i2c_writeout_~tmp___9~0#1;assume { :begin_inline___dynamic_pr_debug } true;__dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset := saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset, 61, 0;havoc __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;__dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset := __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset;__dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset := __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;havoc __dynamic_pr_debug_#t~nondet691#1;__dynamic_pr_debug_#res#1 := __dynamic_pr_debug_#t~nondet691#1;havoc __dynamic_pr_debug_#t~nondet691#1; [2025-02-08 15:24:01,619 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5214-1: assume !(0 != saa7146_i2c_writeout_~tmp___9~0#1); [2025-02-08 15:24:01,619 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4620-2: assume get_current_#t~switch4#1; [2025-02-08 15:24:01,619 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4620-2: assume !get_current_#t~switch4#1;get_current_#t~switch4#1 := get_current_#t~switch4#1; [2025-02-08 15:24:01,619 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4620: assume get_current_#t~switch4#1; [2025-02-08 15:24:01,619 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4620: assume !get_current_#t~switch4#1;get_current_#t~switch4#1 := get_current_#t~switch4#1; [2025-02-08 15:24:01,619 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4620-6: assume get_current_#t~switch4#1; [2025-02-08 15:24:01,619 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4620-6: assume !get_current_#t~switch4#1;get_current_#t~switch4#1 := get_current_#t~switch4#1; [2025-02-08 15:24:01,619 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4620-4: assume get_current_#t~switch4#1; [2025-02-08 15:24:01,619 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4620-4: assume !get_current_#t~switch4#1;get_current_#t~switch4#1 := get_current_#t~switch4#1; [2025-02-08 15:24:01,619 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4951: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_reset_#t~mem103#1;havoc saa7146_i2c_reset_#t~bitwise104#1;havoc saa7146_i2c_reset_#t~mem105#1.base, saa7146_i2c_reset_#t~mem105#1.offset;call saa7146_i2c_reset_#t~mem106#1.base, saa7146_i2c_reset_#t~mem106#1.offset := read~$Pointer$#6(saa7146_i2c_reset_~dev#1.base, 802 + saa7146_i2c_reset_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := 65537, saa7146_i2c_reset_#t~mem106#1.base, 256 + saa7146_i2c_reset_#t~mem106#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,619 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4951-1: call saa7146_i2c_reset_#t~mem105#1.base, saa7146_i2c_reset_#t~mem105#1.offset := read~$Pointer$#6(saa7146_i2c_reset_~dev#1.base, 802 + saa7146_i2c_reset_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := saa7146_i2c_reset_#t~bitwise104#1, saa7146_i2c_reset_#t~mem105#1.base, 144 + saa7146_i2c_reset_#t~mem105#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,619 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4951-4: assume false;saa7146_i2c_reset_#t~bitwise104#1 := saa7146_i2c_reset_#t~mem103#1; [2025-02-08 15:24:01,619 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4951-4: assume !false; [2025-02-08 15:24:01,619 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4951-5: assume 0 == saa7146_i2c_reset_#t~mem103#1 % 4294967296 || 128 == saa7146_i2c_reset_#t~mem103#1 % 4294967296;saa7146_i2c_reset_#t~bitwise104#1 := 128; [2025-02-08 15:24:01,619 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4951-5: assume !(0 == saa7146_i2c_reset_#t~mem103#1 % 4294967296 || 128 == saa7146_i2c_reset_#t~mem103#1 % 4294967296); [2025-02-08 15:24:01,619 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4951-2: [2025-02-08 15:24:01,619 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4951-3: havoc saa7146_i2c_reset_#t~bitwise104#1;assume (saa7146_i2c_reset_#t~bitwise104#1 % 4294967296 >= saa7146_i2c_reset_#t~mem103#1 % 4294967296 && saa7146_i2c_reset_#t~bitwise104#1 % 4294967296 >= 128) && saa7146_i2c_reset_#t~bitwise104#1 % 4294967296 <= 128 + saa7146_i2c_reset_#t~mem103#1 % 4294967296; [2025-02-08 15:24:01,619 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4951-8: call saa7146_i2c_reset_#t~mem105#1.base, saa7146_i2c_reset_#t~mem105#1.offset := read~$Pointer$#6(saa7146_i2c_reset_~dev#1.base, 802 + saa7146_i2c_reset_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := saa7146_i2c_reset_#t~bitwise104#1, saa7146_i2c_reset_#t~mem105#1.base, 144 + saa7146_i2c_reset_#t~mem105#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,619 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4951-9: [2025-02-08 15:24:01,623 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4951-6: call saa7146_i2c_reset_#t~mem103#1 := read~int#6(saa7146_i2c_reset_~dev#1.base, 1122 + saa7146_i2c_reset_~dev#1.offset, 4); [2025-02-08 15:24:01,624 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4951-7: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_reset_#t~mem103#1;havoc saa7146_i2c_reset_#t~bitwise104#1;havoc saa7146_i2c_reset_#t~mem105#1.base, saa7146_i2c_reset_#t~mem105#1.offset;call saa7146_i2c_reset_#t~mem106#1.base, saa7146_i2c_reset_#t~mem106#1.offset := read~$Pointer$#6(saa7146_i2c_reset_~dev#1.base, 802 + saa7146_i2c_reset_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := 65537, saa7146_i2c_reset_#t~mem106#1.base, 256 + saa7146_i2c_reset_#t~mem106#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,624 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4951-12: assume 0 == saa7146_i2c_reset_#t~mem103#1 % 4294967296 || 128 == saa7146_i2c_reset_#t~mem103#1 % 4294967296;saa7146_i2c_reset_#t~bitwise104#1 := 128; [2025-02-08 15:24:01,624 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4951-12: assume !(0 == saa7146_i2c_reset_#t~mem103#1 % 4294967296 || 128 == saa7146_i2c_reset_#t~mem103#1 % 4294967296); [2025-02-08 15:24:01,624 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4951-13: call saa7146_i2c_reset_#t~mem103#1 := read~int#6(saa7146_i2c_reset_~dev#1.base, 1122 + saa7146_i2c_reset_~dev#1.offset, 4); [2025-02-08 15:24:01,624 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4951-10: havoc saa7146_i2c_reset_#t~bitwise104#1;assume (saa7146_i2c_reset_#t~bitwise104#1 % 4294967296 >= saa7146_i2c_reset_#t~mem103#1 % 4294967296 && saa7146_i2c_reset_#t~bitwise104#1 % 4294967296 >= 128) && saa7146_i2c_reset_#t~bitwise104#1 % 4294967296 <= 128 + saa7146_i2c_reset_#t~mem103#1 % 4294967296; [2025-02-08 15:24:01,624 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4951-11: assume false;saa7146_i2c_reset_#t~bitwise104#1 := saa7146_i2c_reset_#t~mem103#1; [2025-02-08 15:24:01,624 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4951-11: assume !false; [2025-02-08 15:24:01,624 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5018: assume 0 != saa7146_i2c_writeout_#t~bitwise119#1 % 4294967296;havoc saa7146_i2c_writeout_#t~bitwise119#1;call write~$Pointer$#10(21, 0, saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset, 8);call write~$Pointer$#10(22, 0, saa7146_i2c_writeout_~#descriptor~1#1.base, 8 + saa7146_i2c_writeout_~#descriptor~1#1.offset, 8);call write~$Pointer$#10(23, 0, saa7146_i2c_writeout_~#descriptor~1#1.base, 16 + saa7146_i2c_writeout_~#descriptor~1#1.offset, 8);call write~$Pointer$#10(24, 0, saa7146_i2c_writeout_~#descriptor~1#1.base, 24 + saa7146_i2c_writeout_~#descriptor~1#1.offset, 8);call write~int#10(234, saa7146_i2c_writeout_~#descriptor~1#1.base, 32 + saa7146_i2c_writeout_~#descriptor~1#1.offset, 4);call write~int#10(0, saa7146_i2c_writeout_~#descriptor~1#1.base, 36 + saa7146_i2c_writeout_~#descriptor~1#1.offset, 1);call saa7146_i2c_writeout_#t~mem120#1 := read~int#10(saa7146_i2c_writeout_~#descriptor~1#1.base, 36 + saa7146_i2c_writeout_~#descriptor~1#1.offset, 1);assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if saa7146_i2c_writeout_#t~mem120#1 % 256 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_writeout_#t~mem120#1 % 256 % 18446744073709551616 else saa7146_i2c_writeout_#t~mem120#1 % 256 % 18446744073709551616 - 18446744073709551616) % 2, 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; [2025-02-08 15:24:01,624 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5018: assume !(0 != saa7146_i2c_writeout_#t~bitwise119#1 % 4294967296);havoc saa7146_i2c_writeout_#t~bitwise119#1; [2025-02-08 15:24:01,624 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5018-3: assume 8 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_writeout_#t~bitwise119#1 := ~saa7146_debug~0; [2025-02-08 15:24:01,624 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5018-3: assume !(8 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,624 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4952-1: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_reset_#t~mem106#1.base, saa7146_i2c_reset_#t~mem106#1.offset;assume { :begin_inline_msleep } true;msleep_#in~arg0#1 := 5;havoc msleep_~arg0#1;msleep_~arg0#1 := msleep_#in~arg0#1; [2025-02-08 15:24:01,624 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5018-4: assume 0 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_writeout_#t~bitwise119#1 := 0; [2025-02-08 15:24:01,624 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5018-4: assume !(0 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,624 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5018-1: [2025-02-08 15:24:01,624 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5018-2: havoc saa7146_i2c_writeout_#t~bitwise119#1;assume saa7146_i2c_writeout_#t~bitwise119#1 % 4294967296 <= ~saa7146_debug~0 % 4294967296 && saa7146_i2c_writeout_#t~bitwise119#1 % 4294967296 <= 8; [2025-02-08 15:24:01,624 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4952: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_reset_#t~mem106#1.base, saa7146_i2c_reset_#t~mem106#1.offset;assume { :begin_inline_msleep } true;msleep_#in~arg0#1 := 5;havoc msleep_~arg0#1;msleep_~arg0#1 := msleep_#in~arg0#1; [2025-02-08 15:24:01,624 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5018-7: havoc saa7146_i2c_writeout_#t~bitwise119#1;assume saa7146_i2c_writeout_#t~bitwise119#1 % 4294967296 <= ~saa7146_debug~0 % 4294967296 && saa7146_i2c_writeout_#t~bitwise119#1 % 4294967296 <= 8; [2025-02-08 15:24:01,625 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5018-8: assume 8 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_writeout_#t~bitwise119#1 := ~saa7146_debug~0; [2025-02-08 15:24:01,625 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5018-8: assume !(8 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,625 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5018-5: assume 0 != saa7146_i2c_writeout_#t~bitwise119#1 % 4294967296;havoc saa7146_i2c_writeout_#t~bitwise119#1;call write~$Pointer$#10(21, 0, saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset, 8);call write~$Pointer$#10(22, 0, saa7146_i2c_writeout_~#descriptor~1#1.base, 8 + saa7146_i2c_writeout_~#descriptor~1#1.offset, 8);call write~$Pointer$#10(23, 0, saa7146_i2c_writeout_~#descriptor~1#1.base, 16 + saa7146_i2c_writeout_~#descriptor~1#1.offset, 8);call write~$Pointer$#10(24, 0, saa7146_i2c_writeout_~#descriptor~1#1.base, 24 + saa7146_i2c_writeout_~#descriptor~1#1.offset, 8);call write~int#10(234, saa7146_i2c_writeout_~#descriptor~1#1.base, 32 + saa7146_i2c_writeout_~#descriptor~1#1.offset, 4);call write~int#10(0, saa7146_i2c_writeout_~#descriptor~1#1.base, 36 + saa7146_i2c_writeout_~#descriptor~1#1.offset, 1);call saa7146_i2c_writeout_#t~mem120#1 := read~int#10(saa7146_i2c_writeout_~#descriptor~1#1.base, 36 + saa7146_i2c_writeout_~#descriptor~1#1.offset, 1);assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if saa7146_i2c_writeout_#t~mem120#1 % 256 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_writeout_#t~mem120#1 % 256 % 18446744073709551616 else saa7146_i2c_writeout_#t~mem120#1 % 256 % 18446744073709551616 - 18446744073709551616) % 2, 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; [2025-02-08 15:24:01,625 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5018-5: assume !(0 != saa7146_i2c_writeout_#t~bitwise119#1 % 4294967296);havoc saa7146_i2c_writeout_#t~bitwise119#1; [2025-02-08 15:24:01,625 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5018-6: [2025-02-08 15:24:01,625 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5018-9: assume 0 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_writeout_#t~bitwise119#1 := 0; [2025-02-08 15:24:01,625 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5018-9: assume !(0 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,625 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5151: assume 0 != saa7146_i2c_writeout_#t~bitwise163#1 % 4294967296;havoc saa7146_i2c_writeout_#t~bitwise163#1; [2025-02-08 15:24:01,625 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5151: assume !(0 != saa7146_i2c_writeout_#t~bitwise163#1 % 4294967296);havoc saa7146_i2c_writeout_#t~bitwise163#1; [2025-02-08 15:24:01,625 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5151-1: [2025-02-08 15:24:01,625 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5151-4: assume 0 == saa7146_i2c_writeout_~status~1#1 % 4294967296;saa7146_i2c_writeout_#t~bitwise163#1 := 0; [2025-02-08 15:24:01,625 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5151-4: assume !(0 == saa7146_i2c_writeout_~status~1#1 % 4294967296); [2025-02-08 15:24:01,625 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5151-5: assume 0 != saa7146_i2c_writeout_#t~bitwise163#1 % 4294967296;havoc saa7146_i2c_writeout_#t~bitwise163#1; [2025-02-08 15:24:01,625 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5151-5: assume !(0 != saa7146_i2c_writeout_#t~bitwise163#1 % 4294967296);havoc saa7146_i2c_writeout_#t~bitwise163#1; [2025-02-08 15:24:01,625 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5151-2: havoc saa7146_i2c_writeout_#t~bitwise163#1;assume saa7146_i2c_writeout_#t~bitwise163#1 % 4294967296 <= saa7146_i2c_writeout_~status~1#1 % 4294967296 && saa7146_i2c_writeout_#t~bitwise163#1 % 4294967296 <= 64; [2025-02-08 15:24:01,625 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5151-3: assume 64 == saa7146_i2c_writeout_~status~1#1 % 4294967296;saa7146_i2c_writeout_#t~bitwise163#1 := saa7146_i2c_writeout_~status~1#1; [2025-02-08 15:24:01,625 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5151-3: assume !(64 == saa7146_i2c_writeout_~status~1#1 % 4294967296); [2025-02-08 15:24:01,625 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5151-8: assume 64 == saa7146_i2c_writeout_~status~1#1 % 4294967296;saa7146_i2c_writeout_#t~bitwise163#1 := saa7146_i2c_writeout_~status~1#1; [2025-02-08 15:24:01,625 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5151-8: assume !(64 == saa7146_i2c_writeout_~status~1#1 % 4294967296); [2025-02-08 15:24:01,625 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5151-9: assume 0 == saa7146_i2c_writeout_~status~1#1 % 4294967296;saa7146_i2c_writeout_#t~bitwise163#1 := 0; [2025-02-08 15:24:01,625 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5151-9: assume !(0 == saa7146_i2c_writeout_~status~1#1 % 4294967296); [2025-02-08 15:24:01,625 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4953: havoc msleep_~arg0#1;havoc msleep_#in~arg0#1;assume { :end_inline_msleep } true;call saa7146_i2c_reset_#t~mem107#1 := read~int#6(saa7146_i2c_reset_~dev#1.base, 1122 + saa7146_i2c_reset_~dev#1.offset, 4);call saa7146_i2c_reset_#t~mem108#1.base, saa7146_i2c_reset_#t~mem108#1.offset := read~$Pointer$#6(saa7146_i2c_reset_~dev#1.base, 802 + saa7146_i2c_reset_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := saa7146_i2c_reset_#t~mem107#1, saa7146_i2c_reset_#t~mem108#1.base, 144 + saa7146_i2c_reset_#t~mem108#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,625 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5151-6: [2025-02-08 15:24:01,625 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5151-7: havoc saa7146_i2c_writeout_#t~bitwise163#1;assume saa7146_i2c_writeout_#t~bitwise163#1 % 4294967296 <= saa7146_i2c_writeout_~status~1#1 % 4294967296 && saa7146_i2c_writeout_#t~bitwise163#1 % 4294967296 <= 64; [2025-02-08 15:24:01,625 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4953-1: havoc msleep_~arg0#1;havoc msleep_#in~arg0#1;assume { :end_inline_msleep } true;call saa7146_i2c_reset_#t~mem107#1 := read~int#6(saa7146_i2c_reset_~dev#1.base, 1122 + saa7146_i2c_reset_~dev#1.offset, 4);call saa7146_i2c_reset_#t~mem108#1.base, saa7146_i2c_reset_#t~mem108#1.offset := read~$Pointer$#6(saa7146_i2c_reset_~dev#1.base, 802 + saa7146_i2c_reset_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := saa7146_i2c_reset_#t~mem107#1, saa7146_i2c_reset_#t~mem108#1.base, 144 + saa7146_i2c_reset_#t~mem108#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,625 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4821: assume 4 * saa7146_i2c_msg_prepare_~mem~0#1 % 4294967296 > 4096;saa7146_i2c_msg_prepare_#res#1 := -12; [2025-02-08 15:24:01,626 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4821: assume !(4 * saa7146_i2c_msg_prepare_~mem~0#1 % 4294967296 > 4096); [2025-02-08 15:24:01,626 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4623: assume get_current_#t~switch4#1; [2025-02-08 15:24:01,626 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4623: assume !get_current_#t~switch4#1;get_current_#t~switch4#1 := true; [2025-02-08 15:24:01,626 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4623-4: assume get_current_#t~switch4#1; [2025-02-08 15:24:01,626 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4623-4: assume !get_current_#t~switch4#1;get_current_#t~switch4#1 := true; [2025-02-08 15:24:01,626 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4623-2: assume get_current_#t~switch4#1; [2025-02-08 15:24:01,626 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4623-2: assume !get_current_#t~switch4#1;get_current_#t~switch4#1 := true; [2025-02-08 15:24:01,626 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4623-6: assume get_current_#t~switch4#1; [2025-02-08 15:24:01,626 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4623-6: assume !get_current_#t~switch4#1;get_current_#t~switch4#1 := true; [2025-02-08 15:24:01,626 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5152-1: [2025-02-08 15:24:01,626 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5152-2: havoc saa7146_i2c_writeout_#t~bitwise164#1;assume saa7146_i2c_writeout_#t~bitwise164#1 % 4294967296 <= ~saa7146_debug~0 % 4294967296 && saa7146_i2c_writeout_#t~bitwise164#1 % 4294967296 <= 8; [2025-02-08 15:24:01,626 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5152: assume 0 != saa7146_i2c_writeout_#t~bitwise164#1 % 4294967296;havoc saa7146_i2c_writeout_#t~bitwise164#1;call write~$Pointer$#10(39, 0, saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset, 8);call write~$Pointer$#10(40, 0, saa7146_i2c_writeout_~#descriptor___1~1#1.base, 8 + saa7146_i2c_writeout_~#descriptor___1~1#1.offset, 8);call write~$Pointer$#10(41, 0, saa7146_i2c_writeout_~#descriptor___1~1#1.base, 16 + saa7146_i2c_writeout_~#descriptor___1~1#1.offset, 8);call write~$Pointer$#10(42, 0, saa7146_i2c_writeout_~#descriptor___1~1#1.base, 24 + saa7146_i2c_writeout_~#descriptor___1~1#1.offset, 8);call write~int#10(313, saa7146_i2c_writeout_~#descriptor___1~1#1.base, 32 + saa7146_i2c_writeout_~#descriptor___1~1#1.offset, 4);call write~int#10(0, saa7146_i2c_writeout_~#descriptor___1~1#1.base, 36 + saa7146_i2c_writeout_~#descriptor___1~1#1.offset, 1);call saa7146_i2c_writeout_#t~mem165#1 := read~int#10(saa7146_i2c_writeout_~#descriptor___1~1#1.base, 36 + saa7146_i2c_writeout_~#descriptor___1~1#1.offset, 1);assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if saa7146_i2c_writeout_#t~mem165#1 % 256 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_writeout_#t~mem165#1 % 256 % 18446744073709551616 else saa7146_i2c_writeout_#t~mem165#1 % 256 % 18446744073709551616 - 18446744073709551616) % 2, 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; [2025-02-08 15:24:01,626 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5152: assume !(0 != saa7146_i2c_writeout_#t~bitwise164#1 % 4294967296);havoc saa7146_i2c_writeout_#t~bitwise164#1; [2025-02-08 15:24:01,626 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5152-5: assume 0 != saa7146_i2c_writeout_#t~bitwise164#1 % 4294967296;havoc saa7146_i2c_writeout_#t~bitwise164#1;call write~$Pointer$#10(39, 0, saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset, 8);call write~$Pointer$#10(40, 0, saa7146_i2c_writeout_~#descriptor___1~1#1.base, 8 + saa7146_i2c_writeout_~#descriptor___1~1#1.offset, 8);call write~$Pointer$#10(41, 0, saa7146_i2c_writeout_~#descriptor___1~1#1.base, 16 + saa7146_i2c_writeout_~#descriptor___1~1#1.offset, 8);call write~$Pointer$#10(42, 0, saa7146_i2c_writeout_~#descriptor___1~1#1.base, 24 + saa7146_i2c_writeout_~#descriptor___1~1#1.offset, 8);call write~int#10(313, saa7146_i2c_writeout_~#descriptor___1~1#1.base, 32 + saa7146_i2c_writeout_~#descriptor___1~1#1.offset, 4);call write~int#10(0, saa7146_i2c_writeout_~#descriptor___1~1#1.base, 36 + saa7146_i2c_writeout_~#descriptor___1~1#1.offset, 1);call saa7146_i2c_writeout_#t~mem165#1 := read~int#10(saa7146_i2c_writeout_~#descriptor___1~1#1.base, 36 + saa7146_i2c_writeout_~#descriptor___1~1#1.offset, 1);assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if saa7146_i2c_writeout_#t~mem165#1 % 256 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_writeout_#t~mem165#1 % 256 % 18446744073709551616 else saa7146_i2c_writeout_#t~mem165#1 % 256 % 18446744073709551616 - 18446744073709551616) % 2, 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; [2025-02-08 15:24:01,626 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5152-5: assume !(0 != saa7146_i2c_writeout_#t~bitwise164#1 % 4294967296);havoc saa7146_i2c_writeout_#t~bitwise164#1; [2025-02-08 15:24:01,627 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4954: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_reset_#t~mem107#1;havoc saa7146_i2c_reset_#t~mem108#1.base, saa7146_i2c_reset_#t~mem108#1.offset;call saa7146_i2c_reset_#t~mem109#1.base, saa7146_i2c_reset_#t~mem109#1.offset := read~$Pointer$#6(saa7146_i2c_reset_~dev#1.base, 802 + saa7146_i2c_reset_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := 65537, saa7146_i2c_reset_#t~mem109#1.base, 256 + saa7146_i2c_reset_#t~mem109#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,627 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5152-6: [2025-02-08 15:24:01,627 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5152-3: assume 8 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_writeout_#t~bitwise164#1 := ~saa7146_debug~0; [2025-02-08 15:24:01,627 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5152-3: assume !(8 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,627 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5152-4: assume 0 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_writeout_#t~bitwise164#1 := 0; [2025-02-08 15:24:01,627 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5152-4: assume !(0 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,627 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5152-9: assume 0 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_writeout_#t~bitwise164#1 := 0; [2025-02-08 15:24:01,627 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5152-9: assume !(0 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,627 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5152-7: havoc saa7146_i2c_writeout_#t~bitwise164#1;assume saa7146_i2c_writeout_#t~bitwise164#1 % 4294967296 <= ~saa7146_debug~0 % 4294967296 && saa7146_i2c_writeout_#t~bitwise164#1 % 4294967296 <= 8; [2025-02-08 15:24:01,627 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4954-1: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_reset_#t~mem107#1;havoc saa7146_i2c_reset_#t~mem108#1.base, saa7146_i2c_reset_#t~mem108#1.offset;call saa7146_i2c_reset_#t~mem109#1.base, saa7146_i2c_reset_#t~mem109#1.offset := read~$Pointer$#6(saa7146_i2c_reset_~dev#1.base, 802 + saa7146_i2c_reset_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := 65537, saa7146_i2c_reset_#t~mem109#1.base, 256 + saa7146_i2c_reset_#t~mem109#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,627 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5152-8: assume 8 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_writeout_#t~bitwise164#1 := ~saa7146_debug~0; [2025-02-08 15:24:01,627 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5152-8: assume !(8 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,627 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7002-6: havoc reach_error_#t~nondet0#1.base, reach_error_#t~nondet0#1.offset;assume { :end_inline_reach_error } true;assume false;assume { :end_inline_ldv_error } true; [2025-02-08 15:24:01,627 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7002-5: havoc reach_error_#t~nondet0#1.base, reach_error_#t~nondet0#1.offset;assume { :end_inline_reach_error } true;assume false;assume { :end_inline_ldv_error } true; [2025-02-08 15:24:01,628 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5417: saa7146_i2c_transfer_#t~ret222#1 := ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;havoc ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1;assume { :end_inline_ldv__builtin_expect } true;saa7146_i2c_transfer_~tmp___4~1#1 := saa7146_i2c_transfer_#t~ret222#1;havoc saa7146_i2c_transfer_#t~mem221#1;havoc saa7146_i2c_transfer_#t~ret222#1; [2025-02-08 15:24:01,628 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4955: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_reset_#t~mem109#1.base, saa7146_i2c_reset_#t~mem109#1.offset;assume { :begin_inline_msleep } true;msleep_#in~arg0#1 := 5;havoc msleep_~arg0#1;msleep_~arg0#1 := msleep_#in~arg0#1; [2025-02-08 15:24:01,628 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4955-1: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_reset_#t~mem109#1.base, saa7146_i2c_reset_#t~mem109#1.offset;assume { :begin_inline_msleep } true;msleep_#in~arg0#1 := 5;havoc msleep_~arg0#1;msleep_~arg0#1 := msleep_#in~arg0#1; [2025-02-08 15:24:01,628 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4889: assume saa7146_i2c_msg_cleanup_~i~1#1 < saa7146_i2c_msg_cleanup_~num#1; [2025-02-08 15:24:01,628 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4889: assume !(saa7146_i2c_msg_cleanup_~i~1#1 < saa7146_i2c_msg_cleanup_~num#1);saa7146_i2c_msg_cleanup_#res#1 := 0; [2025-02-08 15:24:01,628 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5418: assume 0 != saa7146_i2c_transfer_~tmp___4~1#1;assume { :begin_inline___dynamic_pr_debug } true;__dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset := saa7146_i2c_transfer_~#descriptor___2~1#1.base, saa7146_i2c_transfer_~#descriptor___2~1#1.offset, 97, 0;havoc __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;__dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset := __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset;__dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset := __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;havoc __dynamic_pr_debug_#t~nondet691#1;__dynamic_pr_debug_#res#1 := __dynamic_pr_debug_#t~nondet691#1;havoc __dynamic_pr_debug_#t~nondet691#1; [2025-02-08 15:24:01,628 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5418: assume !(0 != saa7146_i2c_transfer_~tmp___4~1#1); [2025-02-08 15:24:01,628 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5088-2: saa7146_i2c_writeout_#t~ret146#1 := readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;havoc readl_#in~addr#1.base, readl_#in~addr#1.offset;assume { :end_inline_readl } true;saa7146_i2c_writeout_~status~1#1 := saa7146_i2c_writeout_#t~ret146#1;havoc saa7146_i2c_writeout_#t~mem145#1.base, saa7146_i2c_writeout_#t~mem145#1.offset;havoc saa7146_i2c_writeout_#t~ret146#1; [2025-02-08 15:24:01,628 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5088: saa7146_i2c_writeout_#t~ret146#1 := readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;havoc readl_#in~addr#1.base, readl_#in~addr#1.offset;assume { :end_inline_readl } true;saa7146_i2c_writeout_~status~1#1 := saa7146_i2c_writeout_#t~ret146#1;havoc saa7146_i2c_writeout_#t~mem145#1.base, saa7146_i2c_writeout_#t~mem145#1.offset;havoc saa7146_i2c_writeout_#t~ret146#1; [2025-02-08 15:24:01,628 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4956-1: havoc msleep_~arg0#1;havoc msleep_#in~arg0#1;assume { :end_inline_msleep } true;call saa7146_i2c_reset_#t~mem110#1 := read~int#6(saa7146_i2c_reset_~dev#1.base, 1122 + saa7146_i2c_reset_~dev#1.offset, 4);call saa7146_i2c_reset_#t~mem111#1.base, saa7146_i2c_reset_#t~mem111#1.offset := read~$Pointer$#6(saa7146_i2c_reset_~dev#1.base, 802 + saa7146_i2c_reset_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := saa7146_i2c_reset_#t~mem110#1, saa7146_i2c_reset_#t~mem111#1.base, 144 + saa7146_i2c_reset_#t~mem111#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,628 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4956: havoc msleep_~arg0#1;havoc msleep_#in~arg0#1;assume { :end_inline_msleep } true;call saa7146_i2c_reset_#t~mem110#1 := read~int#6(saa7146_i2c_reset_~dev#1.base, 1122 + saa7146_i2c_reset_~dev#1.offset, 4);call saa7146_i2c_reset_#t~mem111#1.base, saa7146_i2c_reset_#t~mem111#1.offset := read~$Pointer$#6(saa7146_i2c_reset_~dev#1.base, 802 + saa7146_i2c_reset_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := saa7146_i2c_reset_#t~mem110#1, saa7146_i2c_reset_#t~mem111#1.base, 144 + saa7146_i2c_reset_#t~mem111#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,628 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4626: assume get_current_#t~switch4#1; [2025-02-08 15:24:01,628 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4626: assume !get_current_#t~switch4#1;get_current_#t~switch4#1 := true; [2025-02-08 15:24:01,628 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4626-4: assume get_current_#t~switch4#1; [2025-02-08 15:24:01,628 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4626-4: assume !get_current_#t~switch4#1;get_current_#t~switch4#1 := true; [2025-02-08 15:24:01,628 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4626-2: assume get_current_#t~switch4#1; [2025-02-08 15:24:01,628 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4626-2: assume !get_current_#t~switch4#1;get_current_#t~switch4#1 := true; [2025-02-08 15:24:01,628 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4626-6: assume get_current_#t~switch4#1; [2025-02-08 15:24:01,628 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4626-6: assume !get_current_#t~switch4#1;get_current_#t~switch4#1 := true; [2025-02-08 15:24:01,628 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4957: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_reset_#t~mem110#1;havoc saa7146_i2c_reset_#t~mem111#1.base, saa7146_i2c_reset_#t~mem111#1.offset;call saa7146_i2c_reset_#t~mem112#1.base, saa7146_i2c_reset_#t~mem112#1.offset := read~$Pointer$#6(saa7146_i2c_reset_~dev#1.base, 802 + saa7146_i2c_reset_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := 65537, saa7146_i2c_reset_#t~mem112#1.base, 256 + saa7146_i2c_reset_#t~mem112#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,628 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4957-1: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_reset_#t~mem110#1;havoc saa7146_i2c_reset_#t~mem111#1.base, saa7146_i2c_reset_#t~mem111#1.offset;call saa7146_i2c_reset_#t~mem112#1.base, saa7146_i2c_reset_#t~mem112#1.offset := read~$Pointer$#6(saa7146_i2c_reset_~dev#1.base, 802 + saa7146_i2c_reset_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := 65537, saa7146_i2c_reset_#t~mem112#1.base, 256 + saa7146_i2c_reset_#t~mem112#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,632 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4825: havoc saa7146_i2c_msg_prepare_#t~memset~res52#1.base, saa7146_i2c_msg_prepare_#t~memset~res52#1.offset;saa7146_i2c_msg_prepare_~i~0#1 := 0; [2025-02-08 15:24:01,633 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4825-1: SUMMARY for call saa7146_i2c_msg_prepare_#t~memset~res52#1.base, saa7146_i2c_msg_prepare_#t~memset~res52#1.offset := #Ultimate.C_memset#5(saa7146_i2c_msg_prepare_~op#1.base, saa7146_i2c_msg_prepare_~op#1.offset, 0, 4 * saa7146_i2c_msg_prepare_~mem~0#1); srcloc: null [2025-02-08 15:24:01,633 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5090: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_writeout_#t~mem147#1;havoc saa7146_i2c_writeout_#t~mem148#1.base, saa7146_i2c_writeout_#t~mem148#1.offset;call saa7146_i2c_writeout_#t~mem149#1 := read~int#5(saa7146_i2c_writeout_~dword#1.base, saa7146_i2c_writeout_~dword#1.offset, 4);call saa7146_i2c_writeout_#t~mem150#1.base, saa7146_i2c_writeout_#t~mem150#1.offset := read~$Pointer$#6(saa7146_i2c_writeout_~dev#1.base, 802 + saa7146_i2c_writeout_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := saa7146_i2c_writeout_#t~mem149#1, saa7146_i2c_writeout_#t~mem150#1.base, 140 + saa7146_i2c_writeout_#t~mem150#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,633 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4958: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_reset_#t~mem112#1.base, saa7146_i2c_reset_#t~mem112#1.offset;assume { :begin_inline_msleep } true;msleep_#in~arg0#1 := 5;havoc msleep_~arg0#1;msleep_~arg0#1 := msleep_#in~arg0#1; [2025-02-08 15:24:01,633 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5090-1: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_writeout_#t~mem147#1;havoc saa7146_i2c_writeout_#t~mem148#1.base, saa7146_i2c_writeout_#t~mem148#1.offset;call saa7146_i2c_writeout_#t~mem149#1 := read~int#5(saa7146_i2c_writeout_~dword#1.base, saa7146_i2c_writeout_~dword#1.offset, 4);call saa7146_i2c_writeout_#t~mem150#1.base, saa7146_i2c_writeout_#t~mem150#1.offset := read~$Pointer$#6(saa7146_i2c_writeout_~dev#1.base, 802 + saa7146_i2c_writeout_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := saa7146_i2c_writeout_#t~mem149#1, saa7146_i2c_writeout_#t~mem150#1.base, 140 + saa7146_i2c_writeout_#t~mem150#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,633 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4958-1: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_reset_#t~mem112#1.base, saa7146_i2c_reset_#t~mem112#1.offset;assume { :begin_inline_msleep } true;msleep_#in~arg0#1 := 5;havoc msleep_~arg0#1;msleep_~arg0#1 := msleep_#in~arg0#1; [2025-02-08 15:24:01,633 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4760-1: SAA7146_IER_DISABLE_#t~ret37#1.base, SAA7146_IER_DISABLE_#t~ret37#1.offset := spinlock_check_#res#1.base, spinlock_check_#res#1.offset;havoc spinlock_check_~lock#1.base, spinlock_check_~lock#1.offset;havoc spinlock_check_#in~lock#1.base, spinlock_check_#in~lock#1.offset;assume { :end_inline_spinlock_check } true;SAA7146_IER_DISABLE_~tmp~4#1.base, SAA7146_IER_DISABLE_~tmp~4#1.offset := SAA7146_IER_DISABLE_#t~ret37#1.base, SAA7146_IER_DISABLE_#t~ret37#1.offset;havoc SAA7146_IER_DISABLE_#t~ret37#1.base, SAA7146_IER_DISABLE_#t~ret37#1.offset;assume { :begin_inline__raw_spin_lock_irqsave } true;_raw_spin_lock_irqsave_#in~arg0#1.base, _raw_spin_lock_irqsave_#in~arg0#1.offset := SAA7146_IER_DISABLE_~tmp~4#1.base, SAA7146_IER_DISABLE_~tmp~4#1.offset;havoc _raw_spin_lock_irqsave_#res#1;havoc _raw_spin_lock_irqsave_#t~nondet693#1, _raw_spin_lock_irqsave_~arg0#1.base, _raw_spin_lock_irqsave_~arg0#1.offset;_raw_spin_lock_irqsave_~arg0#1.base, _raw_spin_lock_irqsave_~arg0#1.offset := _raw_spin_lock_irqsave_#in~arg0#1.base, _raw_spin_lock_irqsave_#in~arg0#1.offset;havoc _raw_spin_lock_irqsave_#t~nondet693#1;_raw_spin_lock_irqsave_#res#1 := _raw_spin_lock_irqsave_#t~nondet693#1;havoc _raw_spin_lock_irqsave_#t~nondet693#1; [2025-02-08 15:24:01,633 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4760: SAA7146_IER_DISABLE_#t~ret37#1.base, SAA7146_IER_DISABLE_#t~ret37#1.offset := spinlock_check_#res#1.base, spinlock_check_#res#1.offset;havoc spinlock_check_~lock#1.base, spinlock_check_~lock#1.offset;havoc spinlock_check_#in~lock#1.base, spinlock_check_#in~lock#1.offset;assume { :end_inline_spinlock_check } true;SAA7146_IER_DISABLE_~tmp~4#1.base, SAA7146_IER_DISABLE_~tmp~4#1.offset := SAA7146_IER_DISABLE_#t~ret37#1.base, SAA7146_IER_DISABLE_#t~ret37#1.offset;havoc SAA7146_IER_DISABLE_#t~ret37#1.base, SAA7146_IER_DISABLE_#t~ret37#1.offset;assume { :begin_inline__raw_spin_lock_irqsave } true;_raw_spin_lock_irqsave_#in~arg0#1.base, _raw_spin_lock_irqsave_#in~arg0#1.offset := SAA7146_IER_DISABLE_~tmp~4#1.base, SAA7146_IER_DISABLE_~tmp~4#1.offset;havoc _raw_spin_lock_irqsave_#res#1;havoc _raw_spin_lock_irqsave_#t~nondet693#1, _raw_spin_lock_irqsave_~arg0#1.base, _raw_spin_lock_irqsave_~arg0#1.offset;_raw_spin_lock_irqsave_~arg0#1.base, _raw_spin_lock_irqsave_~arg0#1.offset := _raw_spin_lock_irqsave_#in~arg0#1.base, _raw_spin_lock_irqsave_#in~arg0#1.offset;havoc _raw_spin_lock_irqsave_#t~nondet693#1;_raw_spin_lock_irqsave_#res#1 := _raw_spin_lock_irqsave_#t~nondet693#1;havoc _raw_spin_lock_irqsave_#t~nondet693#1; [2025-02-08 15:24:01,634 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5223: assume 0 != saa7146_i2c_writeout_#t~bitwise183#1 % 4294967296;havoc saa7146_i2c_writeout_#t~bitwise183#1; [2025-02-08 15:24:01,634 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5223: assume !(0 != saa7146_i2c_writeout_#t~bitwise183#1 % 4294967296);havoc saa7146_i2c_writeout_#t~bitwise183#1;saa7146_i2c_writeout_#res#1 := -5;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset);havoc saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset; [2025-02-08 15:24:01,634 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5223-1: [2025-02-08 15:24:01,634 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5223-4: assume 0 == saa7146_i2c_writeout_~status~1#1 % 4294967296;saa7146_i2c_writeout_#t~bitwise183#1 := 0; [2025-02-08 15:24:01,634 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5223-4: assume !(0 == saa7146_i2c_writeout_~status~1#1 % 4294967296); [2025-02-08 15:24:01,634 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5091: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_writeout_#t~mem149#1;havoc saa7146_i2c_writeout_#t~mem150#1.base, saa7146_i2c_writeout_#t~mem150#1.offset;call saa7146_i2c_writeout_#t~mem151#1.base, saa7146_i2c_writeout_#t~mem151#1.offset := read~$Pointer$#6(saa7146_i2c_writeout_~dev#1.base, 802 + saa7146_i2c_writeout_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := 65537, saa7146_i2c_writeout_#t~mem151#1.base, 256 + saa7146_i2c_writeout_#t~mem151#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,634 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5223-5: assume 0 != saa7146_i2c_writeout_#t~bitwise183#1 % 4294967296;havoc saa7146_i2c_writeout_#t~bitwise183#1; [2025-02-08 15:24:01,634 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5223-5: assume !(0 != saa7146_i2c_writeout_#t~bitwise183#1 % 4294967296);havoc saa7146_i2c_writeout_#t~bitwise183#1;saa7146_i2c_writeout_#res#1 := -5;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset);havoc saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset; [2025-02-08 15:24:01,634 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5091-1: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_writeout_#t~mem149#1;havoc saa7146_i2c_writeout_#t~mem150#1.base, saa7146_i2c_writeout_#t~mem150#1.offset;call saa7146_i2c_writeout_#t~mem151#1.base, saa7146_i2c_writeout_#t~mem151#1.offset := read~$Pointer$#6(saa7146_i2c_writeout_~dev#1.base, 802 + saa7146_i2c_writeout_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := 65537, saa7146_i2c_writeout_#t~mem151#1.base, 256 + saa7146_i2c_writeout_#t~mem151#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,634 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5223-2: havoc saa7146_i2c_writeout_#t~bitwise183#1;assume saa7146_i2c_writeout_#t~bitwise183#1 % 4294967296 <= saa7146_i2c_writeout_~status~1#1 % 4294967296 && saa7146_i2c_writeout_#t~bitwise183#1 % 4294967296 <= 32; [2025-02-08 15:24:01,634 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5223-3: assume 32 == saa7146_i2c_writeout_~status~1#1 % 4294967296;saa7146_i2c_writeout_#t~bitwise183#1 := saa7146_i2c_writeout_~status~1#1; [2025-02-08 15:24:01,634 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5223-3: assume !(32 == saa7146_i2c_writeout_~status~1#1 % 4294967296); [2025-02-08 15:24:01,634 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4959: havoc msleep_~arg0#1;havoc msleep_#in~arg0#1;assume { :end_inline_msleep } true; [2025-02-08 15:24:01,634 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5223-8: assume 32 == saa7146_i2c_writeout_~status~1#1 % 4294967296;saa7146_i2c_writeout_#t~bitwise183#1 := saa7146_i2c_writeout_~status~1#1; [2025-02-08 15:24:01,634 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5223-8: assume !(32 == saa7146_i2c_writeout_~status~1#1 % 4294967296); [2025-02-08 15:24:01,634 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5223-9: assume 0 == saa7146_i2c_writeout_~status~1#1 % 4294967296;saa7146_i2c_writeout_#t~bitwise183#1 := 0; [2025-02-08 15:24:01,634 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5223-9: assume !(0 == saa7146_i2c_writeout_~status~1#1 % 4294967296); [2025-02-08 15:24:01,634 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4959-1: havoc msleep_~arg0#1;havoc msleep_#in~arg0#1;assume { :end_inline_msleep } true; [2025-02-08 15:24:01,634 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5025: saa7146_i2c_writeout_#t~ret121#1 := ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;havoc ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1;assume { :end_inline_ldv__builtin_expect } true;saa7146_i2c_writeout_~tmp___0~4#1 := saa7146_i2c_writeout_#t~ret121#1;havoc saa7146_i2c_writeout_#t~mem120#1;havoc saa7146_i2c_writeout_#t~ret121#1; [2025-02-08 15:24:01,634 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5223-6: [2025-02-08 15:24:01,634 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5223-7: havoc saa7146_i2c_writeout_#t~bitwise183#1;assume saa7146_i2c_writeout_#t~bitwise183#1 % 4294967296 <= saa7146_i2c_writeout_~status~1#1 % 4294967296 && saa7146_i2c_writeout_#t~bitwise183#1 % 4294967296 <= 32; [2025-02-08 15:24:01,634 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5025-1: saa7146_i2c_writeout_#t~ret121#1 := ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;havoc ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1;assume { :end_inline_ldv__builtin_expect } true;saa7146_i2c_writeout_~tmp___0~4#1 := saa7146_i2c_writeout_#t~ret121#1;havoc saa7146_i2c_writeout_#t~mem120#1;havoc saa7146_i2c_writeout_#t~ret121#1; [2025-02-08 15:24:01,634 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4629-2: assume get_current_#t~switch4#1;assume { :begin_inline___bad_percpu_size } true;assume { :end_inline___bad_percpu_size } true; [2025-02-08 15:24:01,634 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4629-2: assume !get_current_#t~switch4#1; [2025-02-08 15:24:01,635 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4629: assume get_current_#t~switch4#1;assume { :begin_inline___bad_percpu_size } true;assume { :end_inline___bad_percpu_size } true; [2025-02-08 15:24:01,635 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4629: assume !get_current_#t~switch4#1; [2025-02-08 15:24:01,635 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4629-6: assume get_current_#t~switch4#1;assume { :begin_inline___bad_percpu_size } true;assume { :end_inline___bad_percpu_size } true; [2025-02-08 15:24:01,635 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4629-6: assume !get_current_#t~switch4#1; [2025-02-08 15:24:01,635 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4629-4: assume get_current_#t~switch4#1;assume { :begin_inline___bad_percpu_size } true;assume { :end_inline___bad_percpu_size } true; [2025-02-08 15:24:01,635 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4629-4: assume !get_current_#t~switch4#1; [2025-02-08 15:24:01,635 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5356: assume { :begin_inline_saa7146_i2c_writeout } true;saa7146_i2c_writeout_#in~dev#1.base, saa7146_i2c_writeout_#in~dev#1.offset, saa7146_i2c_writeout_#in~dword#1.base, saa7146_i2c_writeout_#in~dword#1.offset, saa7146_i2c_writeout_#in~short_delay#1 := saa7146_i2c_transfer_~dev#1.base, saa7146_i2c_transfer_~dev#1.offset, saa7146_i2c_transfer_~buffer~0#1.base, saa7146_i2c_transfer_~buffer~0#1.offset + 4 * (if saa7146_i2c_transfer_~i~2#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_transfer_~i~2#1 % 18446744073709551616 % 18446744073709551616 else saa7146_i2c_transfer_~i~2#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), saa7146_i2c_transfer_~short_delay~0#1;havoc saa7146_i2c_writeout_#res#1;havoc saa7146_i2c_writeout_#t~bitwise119#1, saa7146_i2c_writeout_#t~mem120#1, saa7146_i2c_writeout_#t~ret121#1, saa7146_i2c_writeout_#t~mem122#1.base, saa7146_i2c_writeout_#t~mem122#1.offset, saa7146_i2c_writeout_#t~ret123#1, saa7146_i2c_writeout_#t~mem124#1, saa7146_i2c_writeout_#t~mem125#1, saa7146_i2c_writeout_#t~ret126#1, saa7146_i2c_writeout_#t~mem127#1.base, saa7146_i2c_writeout_#t~mem127#1.offset, saa7146_i2c_writeout_#t~mem128#1, saa7146_i2c_writeout_#t~mem129#1, saa7146_i2c_writeout_#t~mem130#1.base, saa7146_i2c_writeout_#t~mem130#1.offset, saa7146_i2c_writeout_#t~mem131#1, saa7146_i2c_writeout_#t~mem132#1.base, saa7146_i2c_writeout_#t~mem132#1.offset, saa7146_i2c_writeout_#t~mem133#1.base, saa7146_i2c_writeout_#t~mem133#1.offset, saa7146_i2c_writeout_#t~mem134#1.base, saa7146_i2c_writeout_#t~mem134#1.offset, saa7146_i2c_writeout_#t~mem135#1, saa7146_i2c_writeout_#t~ret136#1.base, saa7146_i2c_writeout_#t~ret136#1.offset, saa7146_i2c_writeout_#t~mem137#1, saa7146_i2c_writeout_#t~ret138#1.base, saa7146_i2c_writeout_#t~ret138#1.offset, saa7146_i2c_writeout_#t~ret139#1, saa7146_i2c_writeout_#t~ret140#1, saa7146_i2c_writeout_#t~mem141#1, saa7146_i2c_writeout_#t~short142#1, saa7146_i2c_writeout_#t~mem143#1.base, saa7146_i2c_writeout_#t~mem143#1.offset, saa7146_i2c_writeout_#t~ret144#1, saa7146_i2c_writeout_#t~mem145#1.base, saa7146_i2c_writeout_#t~mem145#1.offset, saa7146_i2c_writeout_#t~ret146#1, saa7146_i2c_writeout_#t~mem147#1, saa7146_i2c_writeout_#t~mem148#1.base, saa7146_i2c_writeout_#t~mem148#1.offset, saa7146_i2c_writeout_#t~mem149#1, saa7146_i2c_writeout_#t~mem150#1.base, saa7146_i2c_writeout_#t~mem150#1.offset, saa7146_i2c_writeout_#t~mem151#1.base, saa7146_i2c_writeout_#t~mem151#1.offset, saa7146_i2c_writeout_#t~mem152#1.base, saa7146_i2c_writeout_#t~mem152#1.offset, saa7146_i2c_writeout_#t~ret153#1, saa7146_i2c_writeout_#t~ret154#1, saa7146_i2c_writeout_#t~ret155#1, saa7146_i2c_writeout_#t~ret156#1, saa7146_i2c_writeout_#t~ret157#1, saa7146_i2c_writeout_#t~bitwise158#1, saa7146_i2c_writeout_#t~bitwise159#1, saa7146_i2c_writeout_#t~mem160#1, saa7146_i2c_writeout_#t~ret161#1, saa7146_i2c_writeout_#t~ret162#1, saa7146_i2c_writeout_#t~bitwise163#1, saa7146_i2c_writeout_#t~bitwise164#1, saa7146_i2c_writeout_#t~mem165#1, saa7146_i2c_writeout_#t~ret166#1, saa7146_i2c_writeout_#t~ret167#1, saa7146_i2c_writeout_#t~bitwise168#1, saa7146_i2c_writeout_#t~bitwise169#1, saa7146_i2c_writeout_#t~mem170#1, saa7146_i2c_writeout_#t~ret171#1, saa7146_i2c_writeout_#t~ret172#1, saa7146_i2c_writeout_#t~bitwise173#1, saa7146_i2c_writeout_#t~bitwise174#1, saa7146_i2c_writeout_#t~mem175#1, saa7146_i2c_writeout_#t~ret176#1, saa7146_i2c_writeout_#t~ret177#1, saa7146_i2c_writeout_#t~bitwise178#1, saa7146_i2c_writeout_#t~bitwise179#1, saa7146_i2c_writeout_#t~mem180#1, saa7146_i2c_writeout_#t~ret181#1, saa7146_i2c_writeout_#t~ret182#1, saa7146_i2c_writeout_#t~bitwise183#1, saa7146_i2c_writeout_#t~bitwise184#1, saa7146_i2c_writeout_#t~mem185#1, saa7146_i2c_writeout_#t~ret186#1, saa7146_i2c_writeout_#t~ret187#1, saa7146_i2c_writeout_#t~mem188#1.base, saa7146_i2c_writeout_#t~mem188#1.offset, saa7146_i2c_writeout_#t~ret189#1, saa7146_i2c_writeout_#t~bitwise190#1, saa7146_i2c_writeout_#t~mem191#1, saa7146_i2c_writeout_#t~ret192#1, saa7146_i2c_writeout_#t~mem193#1, saa7146_i2c_writeout_#t~ret194#1, saa7146_i2c_writeout_~dev#1.base, saa7146_i2c_writeout_~dev#1.offset, saa7146_i2c_writeout_~dword#1.base, saa7146_i2c_writeout_~dword#1.offset, saa7146_i2c_writeout_~short_delay#1, saa7146_i2c_writeout_~status~1#1, saa7146_i2c_writeout_~mc2~0#1, saa7146_i2c_writeout_~trial~0#1, saa7146_i2c_writeout_~timeout~0#1, saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset, saa7146_i2c_writeout_~tmp~8#1, saa7146_i2c_writeout_~tmp___0~4#1, saa7146_i2c_writeout_~__ret~0#1, saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset, saa7146_i2c_writeout_~tmp___1~1#1.base, saa7146_i2c_writeout_~tmp___1~1#1.offset, saa7146_i2c_writeout_~tmp___2~1#1.base, saa7146_i2c_writeout_~tmp___2~1#1.offset, saa7146_i2c_writeout_~tmp___3~0#1, saa7146_i2c_writeout_~tmp___4~0#1, saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset, saa7146_i2c_writeout_~tmp___5~0#1, saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset, saa7146_i2c_writeout_~tmp___6~0#1, saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset, saa7146_i2c_writeout_~tmp___7~0#1, saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset, saa7146_i2c_writeout_~tmp___8~0#1, saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset, saa7146_i2c_writeout_~tmp___9~0#1, saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset, saa7146_i2c_writeout_~tmp___10~0#1, saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset, saa7146_i2c_writeout_~tmp___11~0#1;saa7146_i2c_writeout_~dev#1.base, saa7146_i2c_writeout_~dev#1.offset := saa7146_i2c_writeout_#in~dev#1.base, saa7146_i2c_writeout_#in~dev#1.offset;saa7146_i2c_writeout_~dword#1.base, saa7146_i2c_writeout_~dword#1.offset := saa7146_i2c_writeout_#in~dword#1.base, saa7146_i2c_writeout_#in~dword#1.offset;saa7146_i2c_writeout_~short_delay#1 := saa7146_i2c_writeout_#in~short_delay#1;havoc saa7146_i2c_writeout_~status~1#1;havoc saa7146_i2c_writeout_~mc2~0#1;havoc saa7146_i2c_writeout_~trial~0#1;havoc saa7146_i2c_writeout_~timeout~0#1;call saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset := #Ultimate.allocOnStack(37);havoc saa7146_i2c_writeout_~tmp~8#1;havoc saa7146_i2c_writeout_~tmp___0~4#1;havoc saa7146_i2c_writeout_~__ret~0#1;call saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset := #Ultimate.allocOnStack(36);havoc saa7146_i2c_writeout_~tmp___1~1#1.base, saa7146_i2c_writeout_~tmp___1~1#1.offset;havoc saa7146_i2c_writeout_~tmp___2~1#1.base, saa7146_i2c_writeout_~tmp___2~1#1.offset;havoc saa7146_i2c_writeout_~tmp___3~0#1;havoc saa7146_i2c_writeout_~tmp___4~0#1;call saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset := #Ultimate.allocOnStack(37);havoc saa7146_i2c_writeout_~tmp___5~0#1;call saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset := #Ultimate.allocOnStack(37);havoc saa7146_i2c_writeout_~tmp___6~0#1;call saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset := #Ultimate.allocOnStack(37);havoc saa7146_i2c_writeout_~tmp___7~0#1;call saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset := #Ultimate.allocOnStack(37);havoc saa7146_i2c_writeout_~tmp___8~0#1;call saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset := #Ultimate.allocOnStack(37);havoc saa7146_i2c_writeout_~tmp___9~0#1;call saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset := #Ultimate.allocOnStack(37);havoc saa7146_i2c_writeout_~tmp___10~0#1;call saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset := #Ultimate.allocOnStack(37);havoc saa7146_i2c_writeout_~tmp___11~0#1;saa7146_i2c_writeout_~status~1#1 := 0;saa7146_i2c_writeout_~mc2~0#1 := 0;saa7146_i2c_writeout_~trial~0#1 := 0; [2025-02-08 15:24:01,635 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5224-1: [2025-02-08 15:24:01,635 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5224-2: havoc saa7146_i2c_writeout_#t~bitwise184#1;assume saa7146_i2c_writeout_#t~bitwise184#1 % 4294967296 <= ~saa7146_debug~0 % 4294967296 && saa7146_i2c_writeout_#t~bitwise184#1 % 4294967296 <= 8; [2025-02-08 15:24:01,635 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5224: assume 0 != saa7146_i2c_writeout_#t~bitwise184#1 % 4294967296;havoc saa7146_i2c_writeout_#t~bitwise184#1;call write~$Pointer$#10(63, 0, saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset, 8);call write~$Pointer$#10(64, 0, saa7146_i2c_writeout_~#descriptor___5~0#1.base, 8 + saa7146_i2c_writeout_~#descriptor___5~0#1.offset, 8);call write~$Pointer$#10(65, 0, saa7146_i2c_writeout_~#descriptor___5~0#1.base, 16 + saa7146_i2c_writeout_~#descriptor___5~0#1.offset, 8);call write~$Pointer$#10(66, 0, saa7146_i2c_writeout_~#descriptor___5~0#1.base, 24 + saa7146_i2c_writeout_~#descriptor___5~0#1.offset, 8);call write~int#10(327, saa7146_i2c_writeout_~#descriptor___5~0#1.base, 32 + saa7146_i2c_writeout_~#descriptor___5~0#1.offset, 4);call write~int#10(0, saa7146_i2c_writeout_~#descriptor___5~0#1.base, 36 + saa7146_i2c_writeout_~#descriptor___5~0#1.offset, 1);call saa7146_i2c_writeout_#t~mem185#1 := read~int#10(saa7146_i2c_writeout_~#descriptor___5~0#1.base, 36 + saa7146_i2c_writeout_~#descriptor___5~0#1.offset, 1);assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if saa7146_i2c_writeout_#t~mem185#1 % 256 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_writeout_#t~mem185#1 % 256 % 18446744073709551616 else saa7146_i2c_writeout_#t~mem185#1 % 256 % 18446744073709551616 - 18446744073709551616) % 2, 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; [2025-02-08 15:24:01,636 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5224: assume !(0 != saa7146_i2c_writeout_#t~bitwise184#1 % 4294967296);havoc saa7146_i2c_writeout_#t~bitwise184#1; [2025-02-08 15:24:01,636 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5224-5: assume 0 != saa7146_i2c_writeout_#t~bitwise184#1 % 4294967296;havoc saa7146_i2c_writeout_#t~bitwise184#1;call write~$Pointer$#10(63, 0, saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset, 8);call write~$Pointer$#10(64, 0, saa7146_i2c_writeout_~#descriptor___5~0#1.base, 8 + saa7146_i2c_writeout_~#descriptor___5~0#1.offset, 8);call write~$Pointer$#10(65, 0, saa7146_i2c_writeout_~#descriptor___5~0#1.base, 16 + saa7146_i2c_writeout_~#descriptor___5~0#1.offset, 8);call write~$Pointer$#10(66, 0, saa7146_i2c_writeout_~#descriptor___5~0#1.base, 24 + saa7146_i2c_writeout_~#descriptor___5~0#1.offset, 8);call write~int#10(327, saa7146_i2c_writeout_~#descriptor___5~0#1.base, 32 + saa7146_i2c_writeout_~#descriptor___5~0#1.offset, 4);call write~int#10(0, saa7146_i2c_writeout_~#descriptor___5~0#1.base, 36 + saa7146_i2c_writeout_~#descriptor___5~0#1.offset, 1);call saa7146_i2c_writeout_#t~mem185#1 := read~int#10(saa7146_i2c_writeout_~#descriptor___5~0#1.base, 36 + saa7146_i2c_writeout_~#descriptor___5~0#1.offset, 1);assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if saa7146_i2c_writeout_#t~mem185#1 % 256 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_writeout_#t~mem185#1 % 256 % 18446744073709551616 else saa7146_i2c_writeout_#t~mem185#1 % 256 % 18446744073709551616 - 18446744073709551616) % 2, 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; [2025-02-08 15:24:01,636 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5224-5: assume !(0 != saa7146_i2c_writeout_#t~bitwise184#1 % 4294967296);havoc saa7146_i2c_writeout_#t~bitwise184#1; [2025-02-08 15:24:01,636 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5092-1: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_writeout_#t~mem151#1.base, saa7146_i2c_writeout_#t~mem151#1.offset;saa7146_i2c_writeout_~timeout~0#1 := 3 + ~jiffies~0;call saa7146_i2c_writeout_#t~mem152#1.base, saa7146_i2c_writeout_#t~mem152#1.offset := read~$Pointer$#6(saa7146_i2c_writeout_~dev#1.base, 802 + saa7146_i2c_writeout_~dev#1.offset, 8);assume { :begin_inline_readl } true;readl_#in~addr#1.base, readl_#in~addr#1.offset := saa7146_i2c_writeout_#t~mem152#1.base, 256 + saa7146_i2c_writeout_#t~mem152#1.offset;havoc readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;readl_~addr#1.base, readl_~addr#1.offset := readl_#in~addr#1.base, readl_#in~addr#1.offset;havoc readl_~ret~0#1;readl_#res#1 := readl_~ret~0#1; [2025-02-08 15:24:01,636 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5026: assume 0 != saa7146_i2c_writeout_~tmp___0~4#1;call saa7146_i2c_writeout_#t~mem122#1.base, saa7146_i2c_writeout_#t~mem122#1.offset := read~$Pointer$#6(saa7146_i2c_writeout_~dev#1.base, 802 + saa7146_i2c_writeout_~dev#1.offset, 8);assume { :begin_inline_readl } true;readl_#in~addr#1.base, readl_#in~addr#1.offset := saa7146_i2c_writeout_#t~mem122#1.base, 144 + saa7146_i2c_writeout_#t~mem122#1.offset;havoc readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;readl_~addr#1.base, readl_~addr#1.offset := readl_#in~addr#1.base, readl_#in~addr#1.offset;havoc readl_~ret~0#1;readl_#res#1 := readl_~ret~0#1; [2025-02-08 15:24:01,636 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5026: assume !(0 != saa7146_i2c_writeout_~tmp___0~4#1); [2025-02-08 15:24:01,636 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5224-6: [2025-02-08 15:24:01,636 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5224-3: assume 8 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_writeout_#t~bitwise184#1 := ~saa7146_debug~0; [2025-02-08 15:24:01,636 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5224-3: assume !(8 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,636 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5224-4: assume 0 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_writeout_#t~bitwise184#1 := 0; [2025-02-08 15:24:01,636 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5224-4: assume !(0 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,636 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5092: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_writeout_#t~mem151#1.base, saa7146_i2c_writeout_#t~mem151#1.offset;saa7146_i2c_writeout_~timeout~0#1 := 3 + ~jiffies~0;call saa7146_i2c_writeout_#t~mem152#1.base, saa7146_i2c_writeout_#t~mem152#1.offset := read~$Pointer$#6(saa7146_i2c_writeout_~dev#1.base, 802 + saa7146_i2c_writeout_~dev#1.offset, 8);assume { :begin_inline_readl } true;readl_#in~addr#1.base, readl_#in~addr#1.offset := saa7146_i2c_writeout_#t~mem152#1.base, 256 + saa7146_i2c_writeout_#t~mem152#1.offset;havoc readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;readl_~addr#1.base, readl_~addr#1.offset := readl_#in~addr#1.base, readl_#in~addr#1.offset;havoc readl_~ret~0#1;readl_#res#1 := readl_~ret~0#1; [2025-02-08 15:24:01,636 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5224-9: assume 0 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_writeout_#t~bitwise184#1 := 0; [2025-02-08 15:24:01,636 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5224-9: assume !(0 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,636 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5224-7: havoc saa7146_i2c_writeout_#t~bitwise184#1;assume saa7146_i2c_writeout_#t~bitwise184#1 % 4294967296 <= ~saa7146_debug~0 % 4294967296 && saa7146_i2c_writeout_#t~bitwise184#1 % 4294967296 <= 8; [2025-02-08 15:24:01,636 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5026-1: assume 0 != saa7146_i2c_writeout_~tmp___0~4#1;call saa7146_i2c_writeout_#t~mem122#1.base, saa7146_i2c_writeout_#t~mem122#1.offset := read~$Pointer$#6(saa7146_i2c_writeout_~dev#1.base, 802 + saa7146_i2c_writeout_~dev#1.offset, 8);assume { :begin_inline_readl } true;readl_#in~addr#1.base, readl_#in~addr#1.offset := saa7146_i2c_writeout_#t~mem122#1.base, 144 + saa7146_i2c_writeout_#t~mem122#1.offset;havoc readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;readl_~addr#1.base, readl_~addr#1.offset := readl_#in~addr#1.base, readl_#in~addr#1.offset;havoc readl_~ret~0#1;readl_#res#1 := readl_~ret~0#1; [2025-02-08 15:24:01,636 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5026-1: assume !(0 != saa7146_i2c_writeout_~tmp___0~4#1); [2025-02-08 15:24:01,636 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5224-8: assume 8 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_writeout_#t~bitwise184#1 := ~saa7146_debug~0; [2025-02-08 15:24:01,636 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5224-8: assume !(8 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,636 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4762: SAA7146_IER_DISABLE_#t~ret40#1 := readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;havoc readl_#in~addr#1.base, readl_#in~addr#1.offset;assume { :end_inline_readl } true;SAA7146_IER_DISABLE_~tmp___0~1#1 := SAA7146_IER_DISABLE_#t~ret40#1;havoc SAA7146_IER_DISABLE_#t~mem39#1.base, SAA7146_IER_DISABLE_#t~mem39#1.offset;havoc SAA7146_IER_DISABLE_#t~ret40#1; [2025-02-08 15:24:01,636 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4762-1: SAA7146_IER_DISABLE_#t~ret40#1 := readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;havoc readl_#in~addr#1.base, readl_#in~addr#1.offset;assume { :end_inline_readl } true;SAA7146_IER_DISABLE_~tmp___0~1#1 := SAA7146_IER_DISABLE_#t~ret40#1;havoc SAA7146_IER_DISABLE_#t~mem39#1.base, SAA7146_IER_DISABLE_#t~mem39#1.offset;havoc SAA7146_IER_DISABLE_#t~ret40#1; [2025-02-08 15:24:01,636 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5357: assume 0 != saa7146_i2c_transfer_~err~0#1;saa7146_i2c_transfer_#t~short214#1 := -121 == saa7146_i2c_transfer_~err~0#1; [2025-02-08 15:24:01,636 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5357: assume !(0 != saa7146_i2c_transfer_~err~0#1);saa7146_i2c_transfer_~i~2#1 := 1 + saa7146_i2c_transfer_~i~2#1; [2025-02-08 15:24:01,636 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5159: saa7146_i2c_writeout_#t~ret166#1 := ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;havoc ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1;assume { :end_inline_ldv__builtin_expect } true;saa7146_i2c_writeout_~tmp___6~0#1 := saa7146_i2c_writeout_#t~ret166#1;havoc saa7146_i2c_writeout_#t~mem165#1;havoc saa7146_i2c_writeout_#t~ret166#1; [2025-02-08 15:24:01,636 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5159-1: saa7146_i2c_writeout_#t~ret166#1 := ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;havoc ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1;assume { :end_inline_ldv__builtin_expect } true;saa7146_i2c_writeout_~tmp___6~0#1 := saa7146_i2c_writeout_#t~ret166#1;havoc saa7146_i2c_writeout_#t~mem165#1;havoc saa7146_i2c_writeout_#t~ret166#1; [2025-02-08 15:24:01,636 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5027: saa7146_i2c_writeout_#t~ret123#1 := readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;havoc readl_#in~addr#1.base, readl_#in~addr#1.offset;assume { :end_inline_readl } true;saa7146_i2c_writeout_~tmp~8#1 := saa7146_i2c_writeout_#t~ret123#1;havoc saa7146_i2c_writeout_#t~mem122#1.base, saa7146_i2c_writeout_#t~mem122#1.offset;havoc saa7146_i2c_writeout_#t~ret123#1;call saa7146_i2c_writeout_#t~mem124#1 := read~int#5(saa7146_i2c_writeout_~dword#1.base, saa7146_i2c_writeout_~dword#1.offset, 4);call saa7146_i2c_writeout_#t~mem125#1 := read~int#6(saa7146_i2c_writeout_~dev#1.base, 1226 + saa7146_i2c_writeout_~dev#1.offset, 4);assume { :begin_inline___dynamic_pr_debug } true;__dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset := saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset, 25, 0;havoc __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;__dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset := __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset;__dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset := __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;havoc __dynamic_pr_debug_#t~nondet691#1;__dynamic_pr_debug_#res#1 := __dynamic_pr_debug_#t~nondet691#1;havoc __dynamic_pr_debug_#t~nondet691#1; [2025-02-08 15:24:01,637 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5027-1: saa7146_i2c_writeout_#t~ret123#1 := readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;havoc readl_#in~addr#1.base, readl_#in~addr#1.offset;assume { :end_inline_readl } true;saa7146_i2c_writeout_~tmp~8#1 := saa7146_i2c_writeout_#t~ret123#1;havoc saa7146_i2c_writeout_#t~mem122#1.base, saa7146_i2c_writeout_#t~mem122#1.offset;havoc saa7146_i2c_writeout_#t~ret123#1;call saa7146_i2c_writeout_#t~mem124#1 := read~int#5(saa7146_i2c_writeout_~dword#1.base, saa7146_i2c_writeout_~dword#1.offset, 4);call saa7146_i2c_writeout_#t~mem125#1 := read~int#6(saa7146_i2c_writeout_~dev#1.base, 1226 + saa7146_i2c_writeout_~dev#1.offset, 4);assume { :begin_inline___dynamic_pr_debug } true;__dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset := saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset, 25, 0;havoc __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;__dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset := __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset;__dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset := __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;havoc __dynamic_pr_debug_#t~nondet691#1;__dynamic_pr_debug_#res#1 := __dynamic_pr_debug_#t~nondet691#1;havoc __dynamic_pr_debug_#t~nondet691#1; [2025-02-08 15:24:01,638 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4763: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc SAA7146_IER_DISABLE_#t~bitwise41#1;havoc SAA7146_IER_DISABLE_#t~mem42#1.base, SAA7146_IER_DISABLE_#t~mem42#1.offset;assume { :begin_inline_spin_unlock_irqrestore } true;spin_unlock_irqrestore_#in~lock#1.base, spin_unlock_irqrestore_#in~lock#1.offset, spin_unlock_irqrestore_#in~flags#1 := SAA7146_IER_DISABLE_~x#1.base, 858 + SAA7146_IER_DISABLE_~x#1.offset, SAA7146_IER_DISABLE_~flags~0#1;havoc spin_unlock_irqrestore_~lock#1.base, spin_unlock_irqrestore_~lock#1.offset, spin_unlock_irqrestore_~flags#1;spin_unlock_irqrestore_~lock#1.base, spin_unlock_irqrestore_~lock#1.offset := spin_unlock_irqrestore_#in~lock#1.base, spin_unlock_irqrestore_#in~lock#1.offset;spin_unlock_irqrestore_~flags#1 := spin_unlock_irqrestore_#in~flags#1;assume { :begin_inline__raw_spin_unlock_irqrestore } true;_raw_spin_unlock_irqrestore_#in~arg0#1.base, _raw_spin_unlock_irqrestore_#in~arg0#1.offset, _raw_spin_unlock_irqrestore_#in~arg1#1 := spin_unlock_irqrestore_~lock#1.base, spin_unlock_irqrestore_~lock#1.offset, spin_unlock_irqrestore_~flags#1;havoc _raw_spin_unlock_irqrestore_~arg0#1.base, _raw_spin_unlock_irqrestore_~arg0#1.offset, _raw_spin_unlock_irqrestore_~arg1#1;_raw_spin_unlock_irqrestore_~arg0#1.base, _raw_spin_unlock_irqrestore_~arg0#1.offset := _raw_spin_unlock_irqrestore_#in~arg0#1.base, _raw_spin_unlock_irqrestore_#in~arg0#1.offset;_raw_spin_unlock_irqrestore_~arg1#1 := _raw_spin_unlock_irqrestore_#in~arg1#1; [2025-02-08 15:24:01,638 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4763-1: call SAA7146_IER_DISABLE_#t~mem42#1.base, SAA7146_IER_DISABLE_#t~mem42#1.offset := read~$Pointer$#6(SAA7146_IER_DISABLE_~x#1.base, 802 + SAA7146_IER_DISABLE_~x#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := SAA7146_IER_DISABLE_#t~bitwise41#1, SAA7146_IER_DISABLE_#t~mem42#1.base, 220 + SAA7146_IER_DISABLE_#t~mem42#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,639 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4829: call saa7146_i2c_msg_prepare_#t~mem53#1 := read~int#11(saa7146_i2c_msg_prepare_~m#1.base, saa7146_i2c_msg_prepare_~m#1.offset + 14 * (if saa7146_i2c_msg_prepare_~i~0#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_msg_prepare_~i~0#1 % 18446744073709551616 % 18446744073709551616 else saa7146_i2c_msg_prepare_~i~0#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 2);call saa7146_i2c_msg_prepare_#t~mem54#1 := read~int#11(saa7146_i2c_msg_prepare_~m#1.base, 2 + (saa7146_i2c_msg_prepare_~m#1.offset + 14 * (if saa7146_i2c_msg_prepare_~i~0#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_msg_prepare_~i~0#1 % 18446744073709551616 % 18446744073709551616 else saa7146_i2c_msg_prepare_~i~0#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616)), 2);saa7146_i2c_msg_prepare_~addr~0#1 := 2 * (if saa7146_i2c_msg_prepare_#t~mem53#1 % 65536 % 4294967296 <= 2147483647 then saa7146_i2c_msg_prepare_#t~mem53#1 % 65536 % 4294967296 else saa7146_i2c_msg_prepare_#t~mem53#1 % 65536 % 4294967296 - 4294967296) + (if saa7146_i2c_msg_prepare_#t~mem54#1 % 65536 % 4294967296 <= 2147483647 then saa7146_i2c_msg_prepare_#t~mem54#1 % 65536 % 4294967296 else saa7146_i2c_msg_prepare_#t~mem54#1 % 65536 % 4294967296 - 4294967296) % 2;saa7146_i2c_msg_prepare_~h1~0#1 := (if saa7146_i2c_msg_prepare_~op_count~0#1 < 0 && 0 != saa7146_i2c_msg_prepare_~op_count~0#1 % 3 then 1 + saa7146_i2c_msg_prepare_~op_count~0#1 / 3 else saa7146_i2c_msg_prepare_~op_count~0#1 / 3);saa7146_i2c_msg_prepare_~h2~0#1 := (if saa7146_i2c_msg_prepare_~op_count~0#1 < 0 && 0 != saa7146_i2c_msg_prepare_~op_count~0#1 % 3 then saa7146_i2c_msg_prepare_~op_count~0#1 % 3 - 3 else saa7146_i2c_msg_prepare_~op_count~0#1 % 3);call saa7146_i2c_msg_prepare_#t~mem56#1 := read~int#5(saa7146_i2c_msg_prepare_~op#1.base, saa7146_i2c_msg_prepare_~op#1.offset + 4 * (if saa7146_i2c_msg_prepare_~h1~0#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_msg_prepare_~h1~0#1 % 18446744073709551616 % 18446744073709551616 else saa7146_i2c_msg_prepare_~h1~0#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 4); [2025-02-08 15:24:01,639 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4763-4: assume SAA7146_IER_DISABLE_~tmp___0~1#1 % 4294967296 == (4294967295 - SAA7146_IER_DISABLE_~y#1) % 4294967296;SAA7146_IER_DISABLE_#t~bitwise41#1 := SAA7146_IER_DISABLE_~tmp___0~1#1; [2025-02-08 15:24:01,639 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4763-4: assume !(SAA7146_IER_DISABLE_~tmp___0~1#1 % 4294967296 == (4294967295 - SAA7146_IER_DISABLE_~y#1) % 4294967296); [2025-02-08 15:24:01,639 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4763-5: assume 0 == SAA7146_IER_DISABLE_~tmp___0~1#1 % 4294967296 || 0 == (4294967295 - SAA7146_IER_DISABLE_~y#1) % 4294967296;SAA7146_IER_DISABLE_#t~bitwise41#1 := 0; [2025-02-08 15:24:01,639 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4763-5: assume !(0 == SAA7146_IER_DISABLE_~tmp___0~1#1 % 4294967296 || 0 == (4294967295 - SAA7146_IER_DISABLE_~y#1) % 4294967296); [2025-02-08 15:24:01,639 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4763-2: [2025-02-08 15:24:01,639 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4763-3: havoc SAA7146_IER_DISABLE_#t~bitwise41#1;assume SAA7146_IER_DISABLE_#t~bitwise41#1 % 4294967296 <= SAA7146_IER_DISABLE_~tmp___0~1#1 % 4294967296 && SAA7146_IER_DISABLE_#t~bitwise41#1 % 4294967296 <= (4294967295 - SAA7146_IER_DISABLE_~y#1) % 4294967296; [2025-02-08 15:24:01,639 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4763-8: [2025-02-08 15:24:01,639 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4763-9: havoc SAA7146_IER_DISABLE_#t~bitwise41#1;assume SAA7146_IER_DISABLE_#t~bitwise41#1 % 4294967296 <= SAA7146_IER_DISABLE_~tmp___0~1#1 % 4294967296 && SAA7146_IER_DISABLE_#t~bitwise41#1 % 4294967296 <= (4294967295 - SAA7146_IER_DISABLE_~y#1) % 4294967296; [2025-02-08 15:24:01,639 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4763-6: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc SAA7146_IER_DISABLE_#t~bitwise41#1;havoc SAA7146_IER_DISABLE_#t~mem42#1.base, SAA7146_IER_DISABLE_#t~mem42#1.offset;assume { :begin_inline_spin_unlock_irqrestore } true;spin_unlock_irqrestore_#in~lock#1.base, spin_unlock_irqrestore_#in~lock#1.offset, spin_unlock_irqrestore_#in~flags#1 := SAA7146_IER_DISABLE_~x#1.base, 858 + SAA7146_IER_DISABLE_~x#1.offset, SAA7146_IER_DISABLE_~flags~0#1;havoc spin_unlock_irqrestore_~lock#1.base, spin_unlock_irqrestore_~lock#1.offset, spin_unlock_irqrestore_~flags#1;spin_unlock_irqrestore_~lock#1.base, spin_unlock_irqrestore_~lock#1.offset := spin_unlock_irqrestore_#in~lock#1.base, spin_unlock_irqrestore_#in~lock#1.offset;spin_unlock_irqrestore_~flags#1 := spin_unlock_irqrestore_#in~flags#1;assume { :begin_inline__raw_spin_unlock_irqrestore } true;_raw_spin_unlock_irqrestore_#in~arg0#1.base, _raw_spin_unlock_irqrestore_#in~arg0#1.offset, _raw_spin_unlock_irqrestore_#in~arg1#1 := spin_unlock_irqrestore_~lock#1.base, spin_unlock_irqrestore_~lock#1.offset, spin_unlock_irqrestore_~flags#1;havoc _raw_spin_unlock_irqrestore_~arg0#1.base, _raw_spin_unlock_irqrestore_~arg0#1.offset, _raw_spin_unlock_irqrestore_~arg1#1;_raw_spin_unlock_irqrestore_~arg0#1.base, _raw_spin_unlock_irqrestore_~arg0#1.offset := _raw_spin_unlock_irqrestore_#in~arg0#1.base, _raw_spin_unlock_irqrestore_#in~arg0#1.offset;_raw_spin_unlock_irqrestore_~arg1#1 := _raw_spin_unlock_irqrestore_#in~arg1#1; [2025-02-08 15:24:01,639 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4763-7: call SAA7146_IER_DISABLE_#t~mem42#1.base, SAA7146_IER_DISABLE_#t~mem42#1.offset := read~$Pointer$#6(SAA7146_IER_DISABLE_~x#1.base, 802 + SAA7146_IER_DISABLE_~x#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := SAA7146_IER_DISABLE_#t~bitwise41#1, SAA7146_IER_DISABLE_#t~mem42#1.base, 220 + SAA7146_IER_DISABLE_#t~mem42#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,639 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5358: assume saa7146_i2c_transfer_#t~short214#1;havoc saa7146_i2c_transfer_#t~mem212#1.base, saa7146_i2c_transfer_#t~mem212#1.offset;havoc saa7146_i2c_transfer_#t~mem213#1;havoc saa7146_i2c_transfer_#t~short214#1; [2025-02-08 15:24:01,639 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5358: assume !saa7146_i2c_transfer_#t~short214#1;havoc saa7146_i2c_transfer_#t~mem212#1.base, saa7146_i2c_transfer_#t~mem212#1.offset;havoc saa7146_i2c_transfer_#t~mem213#1;havoc saa7146_i2c_transfer_#t~short214#1; [2025-02-08 15:24:01,639 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4763-10: assume SAA7146_IER_DISABLE_~tmp___0~1#1 % 4294967296 == (4294967295 - SAA7146_IER_DISABLE_~y#1) % 4294967296;SAA7146_IER_DISABLE_#t~bitwise41#1 := SAA7146_IER_DISABLE_~tmp___0~1#1; [2025-02-08 15:24:01,639 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4763-10: assume !(SAA7146_IER_DISABLE_~tmp___0~1#1 % 4294967296 == (4294967295 - SAA7146_IER_DISABLE_~y#1) % 4294967296); [2025-02-08 15:24:01,639 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4763-11: assume 0 == SAA7146_IER_DISABLE_~tmp___0~1#1 % 4294967296 || 0 == (4294967295 - SAA7146_IER_DISABLE_~y#1) % 4294967296;SAA7146_IER_DISABLE_#t~bitwise41#1 := 0; [2025-02-08 15:24:01,639 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4763-11: assume !(0 == SAA7146_IER_DISABLE_~tmp___0~1#1 % 4294967296 || 0 == (4294967295 - SAA7146_IER_DISABLE_~y#1) % 4294967296); [2025-02-08 15:24:01,639 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5358-1: assume saa7146_i2c_transfer_#t~short214#1;call saa7146_i2c_transfer_#t~mem212#1.base, saa7146_i2c_transfer_#t~mem212#1.offset := read~$Pointer$#6(saa7146_i2c_transfer_~dev#1.base, 926 + saa7146_i2c_transfer_~dev#1.offset, 8);call saa7146_i2c_transfer_#t~mem213#1 := read~int#5(saa7146_i2c_transfer_#t~mem212#1.base, 32 + saa7146_i2c_transfer_#t~mem212#1.offset, 4);saa7146_i2c_transfer_#t~short214#1 := 0 != saa7146_i2c_transfer_#t~mem213#1 % 2; [2025-02-08 15:24:01,639 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5358-1: assume !saa7146_i2c_transfer_#t~short214#1; [2025-02-08 15:24:01,639 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5160-1: assume 0 != saa7146_i2c_writeout_~tmp___6~0#1;assume { :begin_inline___dynamic_pr_debug } true;__dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset := saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset, 43, 0;havoc __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;__dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset := __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset;__dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset := __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;havoc __dynamic_pr_debug_#t~nondet691#1;__dynamic_pr_debug_#res#1 := __dynamic_pr_debug_#t~nondet691#1;havoc __dynamic_pr_debug_#t~nondet691#1; [2025-02-08 15:24:01,639 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5160-1: assume !(0 != saa7146_i2c_writeout_~tmp___6~0#1); [2025-02-08 15:24:01,639 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5160: assume 0 != saa7146_i2c_writeout_~tmp___6~0#1;assume { :begin_inline___dynamic_pr_debug } true;__dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset := saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset, 43, 0;havoc __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;__dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset := __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset;__dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset := __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;havoc __dynamic_pr_debug_#t~nondet691#1;__dynamic_pr_debug_#res#1 := __dynamic_pr_debug_#t~nondet691#1;havoc __dynamic_pr_debug_#t~nondet691#1; [2025-02-08 15:24:01,639 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5160: assume !(0 != saa7146_i2c_writeout_~tmp___6~0#1); [2025-02-08 15:24:01,640 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4962: saa7146_i2c_reset_#t~ret113#1 := saa7146_i2c_status_#res#1;havoc saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset, saa7146_i2c_status_#t~ret50#1, saa7146_i2c_status_~dev#1.base, saa7146_i2c_status_~dev#1.offset, saa7146_i2c_status_~iicsta~0#1, saa7146_i2c_status_~tmp~6#1;havoc saa7146_i2c_status_#in~dev#1.base, saa7146_i2c_status_#in~dev#1.offset;assume { :end_inline_saa7146_i2c_status } true;saa7146_i2c_reset_~status~0#1 := saa7146_i2c_reset_#t~ret113#1;havoc saa7146_i2c_reset_#t~ret113#1;call saa7146_i2c_reset_#t~mem114#1 := read~int#6(saa7146_i2c_reset_~dev#1.base, 1122 + saa7146_i2c_reset_~dev#1.offset, 4); [2025-02-08 15:24:01,640 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4962-3: assume { :begin_inline_saa7146_i2c_status } true;saa7146_i2c_status_#in~dev#1.base, saa7146_i2c_status_#in~dev#1.offset := saa7146_i2c_reset_~dev#1.base, saa7146_i2c_reset_~dev#1.offset;havoc saa7146_i2c_status_#res#1;havoc saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset, saa7146_i2c_status_#t~ret50#1, saa7146_i2c_status_~dev#1.base, saa7146_i2c_status_~dev#1.offset, saa7146_i2c_status_~iicsta~0#1, saa7146_i2c_status_~tmp~6#1;saa7146_i2c_status_~dev#1.base, saa7146_i2c_status_~dev#1.offset := saa7146_i2c_status_#in~dev#1.base, saa7146_i2c_status_#in~dev#1.offset;havoc saa7146_i2c_status_~iicsta~0#1;havoc saa7146_i2c_status_~tmp~6#1;call saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset := read~$Pointer$#6(saa7146_i2c_status_~dev#1.base, 802 + saa7146_i2c_status_~dev#1.offset, 8);assume { :begin_inline_readl } true;readl_#in~addr#1.base, readl_#in~addr#1.offset := saa7146_i2c_status_#t~mem49#1.base, 144 + saa7146_i2c_status_#t~mem49#1.offset;havoc readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;readl_~addr#1.base, readl_~addr#1.offset := readl_#in~addr#1.base, readl_#in~addr#1.offset;havoc readl_~ret~0#1;readl_#res#1 := readl_~ret~0#1; [2025-02-08 15:24:01,640 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4962-1: assume { :begin_inline_saa7146_i2c_status } true;saa7146_i2c_status_#in~dev#1.base, saa7146_i2c_status_#in~dev#1.offset := saa7146_i2c_reset_~dev#1.base, saa7146_i2c_reset_~dev#1.offset;havoc saa7146_i2c_status_#res#1;havoc saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset, saa7146_i2c_status_#t~ret50#1, saa7146_i2c_status_~dev#1.base, saa7146_i2c_status_~dev#1.offset, saa7146_i2c_status_~iicsta~0#1, saa7146_i2c_status_~tmp~6#1;saa7146_i2c_status_~dev#1.base, saa7146_i2c_status_~dev#1.offset := saa7146_i2c_status_#in~dev#1.base, saa7146_i2c_status_#in~dev#1.offset;havoc saa7146_i2c_status_~iicsta~0#1;havoc saa7146_i2c_status_~tmp~6#1;call saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset := read~$Pointer$#6(saa7146_i2c_status_~dev#1.base, 802 + saa7146_i2c_status_~dev#1.offset, 8);assume { :begin_inline_readl } true;readl_#in~addr#1.base, readl_#in~addr#1.offset := saa7146_i2c_status_#t~mem49#1.base, 144 + saa7146_i2c_status_#t~mem49#1.offset;havoc readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;readl_~addr#1.base, readl_~addr#1.offset := readl_#in~addr#1.base, readl_#in~addr#1.offset;havoc readl_~ret~0#1;readl_#res#1 := readl_~ret~0#1; [2025-02-08 15:24:01,640 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4962-2: saa7146_i2c_reset_#t~ret113#1 := saa7146_i2c_status_#res#1;havoc saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset, saa7146_i2c_status_#t~ret50#1, saa7146_i2c_status_~dev#1.base, saa7146_i2c_status_~dev#1.offset, saa7146_i2c_status_~iicsta~0#1, saa7146_i2c_status_~tmp~6#1;havoc saa7146_i2c_status_#in~dev#1.base, saa7146_i2c_status_#in~dev#1.offset;assume { :end_inline_saa7146_i2c_status } true;saa7146_i2c_reset_~status~0#1 := saa7146_i2c_reset_#t~ret113#1;havoc saa7146_i2c_reset_#t~ret113#1;call saa7146_i2c_reset_#t~mem114#1 := read~int#6(saa7146_i2c_reset_~dev#1.base, 1122 + saa7146_i2c_reset_~dev#1.offset, 4); [2025-02-08 15:24:01,640 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4764-1: havoc spin_unlock_irqrestore_~lock#1.base, spin_unlock_irqrestore_~lock#1.offset, spin_unlock_irqrestore_~flags#1;havoc spin_unlock_irqrestore_#in~lock#1.base, spin_unlock_irqrestore_#in~lock#1.offset, spin_unlock_irqrestore_#in~flags#1;assume { :end_inline_spin_unlock_irqrestore } true; [2025-02-08 15:24:01,640 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4764: havoc spin_unlock_irqrestore_~lock#1.base, spin_unlock_irqrestore_~lock#1.offset, spin_unlock_irqrestore_~flags#1;havoc spin_unlock_irqrestore_#in~lock#1.base, spin_unlock_irqrestore_#in~lock#1.offset, spin_unlock_irqrestore_#in~flags#1;assume { :end_inline_spin_unlock_irqrestore } true; [2025-02-08 15:24:01,640 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5425: saa7146_i2c_transfer_~err~0#1 := -1; [2025-02-08 15:24:01,640 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5293: saa7146_i2c_transfer_#t~ret196#1 := ldv_mutex_lock_interruptible_10_#res#1;havoc ldv_mutex_lock_interruptible_10_#t~ret250#1, ldv_mutex_lock_interruptible_10_#t~ret251#1, ldv_mutex_lock_interruptible_10_~ldv_func_arg1#1.base, ldv_mutex_lock_interruptible_10_~ldv_func_arg1#1.offset, ldv_mutex_lock_interruptible_10_~ldv_func_res~1#1, ldv_mutex_lock_interruptible_10_~tmp~14#1, ldv_mutex_lock_interruptible_10_~tmp___0~9#1;havoc ldv_mutex_lock_interruptible_10_#in~ldv_func_arg1#1.base, ldv_mutex_lock_interruptible_10_#in~ldv_func_arg1#1.offset;assume { :end_inline_ldv_mutex_lock_interruptible_10 } true;saa7146_i2c_transfer_~tmp~9#1 := saa7146_i2c_transfer_#t~ret196#1;havoc saa7146_i2c_transfer_#t~ret196#1; [2025-02-08 15:24:01,640 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5095: saa7146_i2c_writeout_#t~ret153#1 := readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;havoc readl_#in~addr#1.base, readl_#in~addr#1.offset;assume { :end_inline_readl } true;saa7146_i2c_writeout_~tmp___4~0#1 := saa7146_i2c_writeout_#t~ret153#1;saa7146_i2c_writeout_~mc2~0#1 := saa7146_i2c_writeout_~tmp___4~0#1 % 2; [2025-02-08 15:24:01,640 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5095-1: saa7146_i2c_writeout_#t~ret153#1 := readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;havoc readl_#in~addr#1.base, readl_#in~addr#1.offset;assume { :end_inline_readl } true;saa7146_i2c_writeout_~tmp___4~0#1 := saa7146_i2c_writeout_#t~ret153#1;saa7146_i2c_writeout_~mc2~0#1 := saa7146_i2c_writeout_~tmp___4~0#1 % 2; [2025-02-08 15:24:01,640 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4963: assume saa7146_i2c_reset_#t~mem114#1 % 4294967296 != saa7146_i2c_reset_~status~0#1 % 4294967296;havoc saa7146_i2c_reset_#t~mem114#1; [2025-02-08 15:24:01,640 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4963: assume !(saa7146_i2c_reset_#t~mem114#1 % 4294967296 != saa7146_i2c_reset_~status~0#1 % 4294967296);havoc saa7146_i2c_reset_#t~mem114#1;saa7146_i2c_reset_#res#1 := 0;call ULTIMATE.dealloc(saa7146_i2c_reset_~#descriptor~0#1.base, saa7146_i2c_reset_~#descriptor~0#1.offset);havoc saa7146_i2c_reset_~#descriptor~0#1.base, saa7146_i2c_reset_~#descriptor~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_reset_~#descriptor___0~0#1.base, saa7146_i2c_reset_~#descriptor___0~0#1.offset);havoc saa7146_i2c_reset_~#descriptor___0~0#1.base, saa7146_i2c_reset_~#descriptor___0~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_reset_~#descriptor___1~0#1.base, saa7146_i2c_reset_~#descriptor___1~0#1.offset);havoc saa7146_i2c_reset_~#descriptor___1~0#1.base, saa7146_i2c_reset_~#descriptor___1~0#1.offset; [2025-02-08 15:24:01,640 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4963-1: assume saa7146_i2c_reset_#t~mem114#1 % 4294967296 != saa7146_i2c_reset_~status~0#1 % 4294967296;havoc saa7146_i2c_reset_#t~mem114#1; [2025-02-08 15:24:01,641 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4963-1: assume !(saa7146_i2c_reset_#t~mem114#1 % 4294967296 != saa7146_i2c_reset_~status~0#1 % 4294967296);havoc saa7146_i2c_reset_#t~mem114#1;saa7146_i2c_reset_#res#1 := 0;call ULTIMATE.dealloc(saa7146_i2c_reset_~#descriptor~0#1.base, saa7146_i2c_reset_~#descriptor~0#1.offset);havoc saa7146_i2c_reset_~#descriptor~0#1.base, saa7146_i2c_reset_~#descriptor~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_reset_~#descriptor___0~0#1.base, saa7146_i2c_reset_~#descriptor___0~0#1.offset);havoc saa7146_i2c_reset_~#descriptor___0~0#1.base, saa7146_i2c_reset_~#descriptor___0~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_reset_~#descriptor___1~0#1.base, saa7146_i2c_reset_~#descriptor___1~0#1.offset);havoc saa7146_i2c_reset_~#descriptor___1~0#1.base, saa7146_i2c_reset_~#descriptor___1~0#1.offset; [2025-02-08 15:24:01,641 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5294: assume 0 != saa7146_i2c_transfer_~tmp~9#1;saa7146_i2c_transfer_#res#1 := -512;call ULTIMATE.dealloc(saa7146_i2c_transfer_~#descriptor~2#1.base, saa7146_i2c_transfer_~#descriptor~2#1.offset);havoc saa7146_i2c_transfer_~#descriptor~2#1.base, saa7146_i2c_transfer_~#descriptor~2#1.offset;call ULTIMATE.dealloc(saa7146_i2c_transfer_~#descriptor___0~2#1.base, saa7146_i2c_transfer_~#descriptor___0~2#1.offset);havoc saa7146_i2c_transfer_~#descriptor___0~2#1.base, saa7146_i2c_transfer_~#descriptor___0~2#1.offset;call ULTIMATE.dealloc(saa7146_i2c_transfer_~#descriptor___1~2#1.base, saa7146_i2c_transfer_~#descriptor___1~2#1.offset);havoc saa7146_i2c_transfer_~#descriptor___1~2#1.base, saa7146_i2c_transfer_~#descriptor___1~2#1.offset;call ULTIMATE.dealloc(saa7146_i2c_transfer_~#descriptor___2~1#1.base, saa7146_i2c_transfer_~#descriptor___2~1#1.offset);havoc saa7146_i2c_transfer_~#descriptor___2~1#1.base, saa7146_i2c_transfer_~#descriptor___2~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_transfer_~#descriptor___3~1#1.base, saa7146_i2c_transfer_~#descriptor___3~1#1.offset);havoc saa7146_i2c_transfer_~#descriptor___3~1#1.base, saa7146_i2c_transfer_~#descriptor___3~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_transfer_~#zero~0#1.base, saa7146_i2c_transfer_~#zero~0#1.offset);havoc saa7146_i2c_transfer_~#zero~0#1.base, saa7146_i2c_transfer_~#zero~0#1.offset; [2025-02-08 15:24:01,641 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5294: assume !(0 != saa7146_i2c_transfer_~tmp~9#1);saa7146_i2c_transfer_~i~2#1 := 0; [2025-02-08 15:24:01,641 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4964-1: [2025-02-08 15:24:01,641 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4964-2: havoc saa7146_i2c_reset_#t~bitwise115#1;assume saa7146_i2c_reset_#t~bitwise115#1 % 4294967296 <= ~saa7146_debug~0 % 4294967296 && saa7146_i2c_reset_#t~bitwise115#1 % 4294967296 <= 8; [2025-02-08 15:24:01,642 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4964: assume 0 != saa7146_i2c_reset_#t~bitwise115#1 % 4294967296;havoc saa7146_i2c_reset_#t~bitwise115#1;call write~$Pointer$#10(15, 0, saa7146_i2c_reset_~#descriptor___1~0#1.base, saa7146_i2c_reset_~#descriptor___1~0#1.offset, 8);call write~$Pointer$#10(16, 0, saa7146_i2c_reset_~#descriptor___1~0#1.base, 8 + saa7146_i2c_reset_~#descriptor___1~0#1.offset, 8);call write~$Pointer$#10(17, 0, saa7146_i2c_reset_~#descriptor___1~0#1.base, 16 + saa7146_i2c_reset_~#descriptor___1~0#1.offset, 8);call write~$Pointer$#10(18, 0, saa7146_i2c_reset_~#descriptor___1~0#1.base, 24 + saa7146_i2c_reset_~#descriptor___1~0#1.offset, 8);call write~int#10(216, saa7146_i2c_reset_~#descriptor___1~0#1.base, 32 + saa7146_i2c_reset_~#descriptor___1~0#1.offset, 4);call write~int#10(0, saa7146_i2c_reset_~#descriptor___1~0#1.base, 36 + saa7146_i2c_reset_~#descriptor___1~0#1.offset, 1);call saa7146_i2c_reset_#t~mem116#1 := read~int#10(saa7146_i2c_reset_~#descriptor___1~0#1.base, 36 + saa7146_i2c_reset_~#descriptor___1~0#1.offset, 1);assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if saa7146_i2c_reset_#t~mem116#1 % 256 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_reset_#t~mem116#1 % 256 % 18446744073709551616 else saa7146_i2c_reset_#t~mem116#1 % 256 % 18446744073709551616 - 18446744073709551616) % 2, 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; [2025-02-08 15:24:01,642 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4964: assume !(0 != saa7146_i2c_reset_#t~bitwise115#1 % 4294967296);havoc saa7146_i2c_reset_#t~bitwise115#1; [2025-02-08 15:24:01,642 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4964-5: assume 0 != saa7146_i2c_reset_#t~bitwise115#1 % 4294967296;havoc saa7146_i2c_reset_#t~bitwise115#1;call write~$Pointer$#10(15, 0, saa7146_i2c_reset_~#descriptor___1~0#1.base, saa7146_i2c_reset_~#descriptor___1~0#1.offset, 8);call write~$Pointer$#10(16, 0, saa7146_i2c_reset_~#descriptor___1~0#1.base, 8 + saa7146_i2c_reset_~#descriptor___1~0#1.offset, 8);call write~$Pointer$#10(17, 0, saa7146_i2c_reset_~#descriptor___1~0#1.base, 16 + saa7146_i2c_reset_~#descriptor___1~0#1.offset, 8);call write~$Pointer$#10(18, 0, saa7146_i2c_reset_~#descriptor___1~0#1.base, 24 + saa7146_i2c_reset_~#descriptor___1~0#1.offset, 8);call write~int#10(216, saa7146_i2c_reset_~#descriptor___1~0#1.base, 32 + saa7146_i2c_reset_~#descriptor___1~0#1.offset, 4);call write~int#10(0, saa7146_i2c_reset_~#descriptor___1~0#1.base, 36 + saa7146_i2c_reset_~#descriptor___1~0#1.offset, 1);call saa7146_i2c_reset_#t~mem116#1 := read~int#10(saa7146_i2c_reset_~#descriptor___1~0#1.base, 36 + saa7146_i2c_reset_~#descriptor___1~0#1.offset, 1);assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if saa7146_i2c_reset_#t~mem116#1 % 256 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_reset_#t~mem116#1 % 256 % 18446744073709551616 else saa7146_i2c_reset_#t~mem116#1 % 256 % 18446744073709551616 - 18446744073709551616) % 2, 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; [2025-02-08 15:24:01,642 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4964-5: assume !(0 != saa7146_i2c_reset_#t~bitwise115#1 % 4294967296);havoc saa7146_i2c_reset_#t~bitwise115#1; [2025-02-08 15:24:01,642 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4832-1: [2025-02-08 15:24:01,642 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4964-6: [2025-02-08 15:24:01,642 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4832-2: havoc saa7146_i2c_msg_prepare_#t~bitwise57#1;assume (saa7146_i2c_msg_prepare_#t~bitwise57#1 % 4294967296 >= saa7146_i2c_msg_prepare_#t~mem56#1 % 4294967296 && saa7146_i2c_msg_prepare_#t~bitwise57#1 % 4294967296 >= saa7146_i2c_msg_prepare_#t~bitwise55#1 % 4294967296) && saa7146_i2c_msg_prepare_#t~bitwise57#1 % 4294967296 <= saa7146_i2c_msg_prepare_#t~mem56#1 % 4294967296 + saa7146_i2c_msg_prepare_#t~bitwise55#1 % 4294967296; [2025-02-08 15:24:01,642 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4964-3: assume 8 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_reset_#t~bitwise115#1 := ~saa7146_debug~0; [2025-02-08 15:24:01,642 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4964-3: assume !(8 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,642 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4964-4: assume 0 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_reset_#t~bitwise115#1 := 0; [2025-02-08 15:24:01,642 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4964-4: assume !(0 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,642 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4832: call write~int#5(saa7146_i2c_msg_prepare_#t~bitwise57#1, saa7146_i2c_msg_prepare_~op#1.base, saa7146_i2c_msg_prepare_~op#1.offset + 4 * (if saa7146_i2c_msg_prepare_~h1~0#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_msg_prepare_~h1~0#1 % 18446744073709551616 % 18446744073709551616 else saa7146_i2c_msg_prepare_~h1~0#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 4);havoc saa7146_i2c_msg_prepare_#t~mem56#1;havoc saa7146_i2c_msg_prepare_#t~bitwise55#1;havoc saa7146_i2c_msg_prepare_#t~bitwise57#1;call saa7146_i2c_msg_prepare_#t~mem59#1 := read~int#5(saa7146_i2c_msg_prepare_~op#1.base, saa7146_i2c_msg_prepare_~op#1.offset + 4 * (if saa7146_i2c_msg_prepare_~h1~0#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_msg_prepare_~h1~0#1 % 18446744073709551616 % 18446744073709551616 else saa7146_i2c_msg_prepare_~h1~0#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 4); [2025-02-08 15:24:01,642 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4964-9: assume 0 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_reset_#t~bitwise115#1 := 0; [2025-02-08 15:24:01,642 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4964-9: assume !(0 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,642 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4832-5: [2025-02-08 15:24:01,642 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4832-6: havoc saa7146_i2c_msg_prepare_#t~bitwise55#1;assume saa7146_i2c_msg_prepare_#t~bitwise55#1 > (if saa7146_i2c_msg_prepare_~addr~0#1 % 256 % 4294967296 <= 2147483647 then saa7146_i2c_msg_prepare_~addr~0#1 % 256 % 4294967296 else saa7146_i2c_msg_prepare_~addr~0#1 % 256 % 4294967296 - 4294967296); [2025-02-08 15:24:01,642 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4964-7: havoc saa7146_i2c_reset_#t~bitwise115#1;assume saa7146_i2c_reset_#t~bitwise115#1 % 4294967296 <= ~saa7146_debug~0 % 4294967296 && saa7146_i2c_reset_#t~bitwise115#1 % 4294967296 <= 8; [2025-02-08 15:24:01,642 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4832-3: assume 0 == saa7146_i2c_msg_prepare_#t~bitwise55#1 % 4294967296;saa7146_i2c_msg_prepare_#t~bitwise57#1 := saa7146_i2c_msg_prepare_#t~mem56#1; [2025-02-08 15:24:01,642 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4832-3: assume !(0 == saa7146_i2c_msg_prepare_#t~bitwise55#1 % 4294967296); [2025-02-08 15:24:01,642 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4964-8: assume 8 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_reset_#t~bitwise115#1 := ~saa7146_debug~0; [2025-02-08 15:24:01,642 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4964-8: assume !(8 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,642 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4832-4: assume 0 == saa7146_i2c_msg_prepare_#t~mem56#1 % 4294967296 || saa7146_i2c_msg_prepare_#t~mem56#1 % 4294967296 == saa7146_i2c_msg_prepare_#t~bitwise55#1 % 4294967296;saa7146_i2c_msg_prepare_#t~bitwise57#1 := saa7146_i2c_msg_prepare_#t~bitwise55#1; [2025-02-08 15:24:01,642 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4832-4: assume !(0 == saa7146_i2c_msg_prepare_#t~mem56#1 % 4294967296 || saa7146_i2c_msg_prepare_#t~mem56#1 % 4294967296 == saa7146_i2c_msg_prepare_#t~bitwise55#1 % 4294967296); [2025-02-08 15:24:01,643 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4832-7: assume 0 == (if saa7146_i2c_msg_prepare_~addr~0#1 % 256 % 4294967296 <= 2147483647 then saa7146_i2c_msg_prepare_~addr~0#1 % 256 % 4294967296 else saa7146_i2c_msg_prepare_~addr~0#1 % 256 % 4294967296 - 4294967296) || 0 == 8 * (3 - saa7146_i2c_msg_prepare_~h2~0#1);saa7146_i2c_msg_prepare_#t~bitwise55#1 := (if saa7146_i2c_msg_prepare_~addr~0#1 % 256 % 4294967296 <= 2147483647 then saa7146_i2c_msg_prepare_~addr~0#1 % 256 % 4294967296 else saa7146_i2c_msg_prepare_~addr~0#1 % 256 % 4294967296 - 4294967296); [2025-02-08 15:24:01,643 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4832-7: assume !(0 == (if saa7146_i2c_msg_prepare_~addr~0#1 % 256 % 4294967296 <= 2147483647 then saa7146_i2c_msg_prepare_~addr~0#1 % 256 % 4294967296 else saa7146_i2c_msg_prepare_~addr~0#1 % 256 % 4294967296 - 4294967296) || 0 == 8 * (3 - saa7146_i2c_msg_prepare_~h2~0#1)); [2025-02-08 15:24:01,643 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5097: assume 0 != saa7146_i2c_writeout_~mc2~0#1 % 4294967296; [2025-02-08 15:24:01,643 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5097: assume !(0 != saa7146_i2c_writeout_~mc2~0#1 % 4294967296); [2025-02-08 15:24:01,643 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5097-1: assume 0 != saa7146_i2c_writeout_~mc2~0#1 % 4294967296; [2025-02-08 15:24:01,643 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5097-1: assume !(0 != saa7146_i2c_writeout_~mc2~0#1 % 4294967296); [2025-02-08 15:24:01,643 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4833-2: havoc saa7146_i2c_msg_prepare_#t~bitwise60#1;assume (saa7146_i2c_msg_prepare_#t~bitwise60#1 % 4294967296 >= saa7146_i2c_msg_prepare_#t~mem59#1 % 4294967296 && saa7146_i2c_msg_prepare_#t~bitwise60#1 % 4294967296 >= saa7146_i2c_msg_prepare_#t~bitwise58#1 % 4294967296) && saa7146_i2c_msg_prepare_#t~bitwise60#1 % 4294967296 <= saa7146_i2c_msg_prepare_#t~mem59#1 % 4294967296 + saa7146_i2c_msg_prepare_#t~bitwise58#1 % 4294967296; [2025-02-08 15:24:01,643 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4833-3: assume 0 == saa7146_i2c_msg_prepare_#t~bitwise58#1 % 4294967296;saa7146_i2c_msg_prepare_#t~bitwise60#1 := saa7146_i2c_msg_prepare_#t~mem59#1; [2025-02-08 15:24:01,643 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4833-3: assume !(0 == saa7146_i2c_msg_prepare_#t~bitwise58#1 % 4294967296); [2025-02-08 15:24:01,643 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4833: call write~int#5(saa7146_i2c_msg_prepare_#t~bitwise60#1, saa7146_i2c_msg_prepare_~op#1.base, saa7146_i2c_msg_prepare_~op#1.offset + 4 * (if saa7146_i2c_msg_prepare_~h1~0#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_msg_prepare_~h1~0#1 % 18446744073709551616 % 18446744073709551616 else saa7146_i2c_msg_prepare_~h1~0#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 4);havoc saa7146_i2c_msg_prepare_#t~mem59#1;havoc saa7146_i2c_msg_prepare_#t~bitwise58#1;havoc saa7146_i2c_msg_prepare_#t~bitwise60#1;saa7146_i2c_msg_prepare_~op_count~0#1 := 1 + saa7146_i2c_msg_prepare_~op_count~0#1;saa7146_i2c_msg_prepare_~j~0#1 := 0; [2025-02-08 15:24:01,643 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4833-1: [2025-02-08 15:24:01,643 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4833-6: havoc saa7146_i2c_msg_prepare_#t~bitwise58#1;assume saa7146_i2c_msg_prepare_#t~bitwise58#1 > 3; [2025-02-08 15:24:01,643 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4833-7: assume 0 == 2 * (3 - saa7146_i2c_msg_prepare_~h2~0#1);saa7146_i2c_msg_prepare_#t~bitwise58#1 := 3; [2025-02-08 15:24:01,643 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4833-7: assume !(0 == 2 * (3 - saa7146_i2c_msg_prepare_~h2~0#1)); [2025-02-08 15:24:01,643 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4833-4: assume 0 == saa7146_i2c_msg_prepare_#t~mem59#1 % 4294967296 || saa7146_i2c_msg_prepare_#t~mem59#1 % 4294967296 == saa7146_i2c_msg_prepare_#t~bitwise58#1 % 4294967296;saa7146_i2c_msg_prepare_#t~bitwise60#1 := saa7146_i2c_msg_prepare_#t~bitwise58#1; [2025-02-08 15:24:01,646 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4833-4: assume !(0 == saa7146_i2c_msg_prepare_#t~mem59#1 % 4294967296 || saa7146_i2c_msg_prepare_#t~mem59#1 % 4294967296 == saa7146_i2c_msg_prepare_#t~bitwise58#1 % 4294967296); [2025-02-08 15:24:01,647 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4833-5: [2025-02-08 15:24:01,647 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5362: assume 0 != saa7146_i2c_transfer_#t~bitwise215#1 % 4294967296;havoc saa7146_i2c_transfer_#t~bitwise215#1;call write~$Pointer$#10(87, 0, saa7146_i2c_transfer_~#descriptor___1~2#1.base, saa7146_i2c_transfer_~#descriptor___1~2#1.offset, 8);call write~$Pointer$#10(88, 0, saa7146_i2c_transfer_~#descriptor___1~2#1.base, 8 + saa7146_i2c_transfer_~#descriptor___1~2#1.offset, 8);call write~$Pointer$#10(89, 0, saa7146_i2c_transfer_~#descriptor___1~2#1.base, 16 + saa7146_i2c_transfer_~#descriptor___1~2#1.offset, 8);call write~$Pointer$#10(90, 0, saa7146_i2c_transfer_~#descriptor___1~2#1.base, 24 + saa7146_i2c_transfer_~#descriptor___1~2#1.offset, 8);call write~int#10(389, saa7146_i2c_transfer_~#descriptor___1~2#1.base, 32 + saa7146_i2c_transfer_~#descriptor___1~2#1.offset, 4);call write~int#10(0, saa7146_i2c_transfer_~#descriptor___1~2#1.base, 36 + saa7146_i2c_transfer_~#descriptor___1~2#1.offset, 1);call saa7146_i2c_transfer_#t~mem216#1 := read~int#10(saa7146_i2c_transfer_~#descriptor___1~2#1.base, 36 + saa7146_i2c_transfer_~#descriptor___1~2#1.offset, 1);assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if saa7146_i2c_transfer_#t~mem216#1 % 256 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_transfer_#t~mem216#1 % 256 % 18446744073709551616 else saa7146_i2c_transfer_#t~mem216#1 % 256 % 18446744073709551616 - 18446744073709551616) % 2, 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; [2025-02-08 15:24:01,647 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5362: assume !(0 != saa7146_i2c_transfer_#t~bitwise215#1 % 4294967296);havoc saa7146_i2c_transfer_#t~bitwise215#1; [2025-02-08 15:24:01,647 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5362-3: assume 8 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_transfer_#t~bitwise215#1 := ~saa7146_debug~0; [2025-02-08 15:24:01,647 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5362-3: assume !(8 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,647 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5362-4: assume 0 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_transfer_#t~bitwise215#1 := 0; [2025-02-08 15:24:01,647 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5362-4: assume !(0 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,647 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5362-1: [2025-02-08 15:24:01,647 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5362-2: havoc saa7146_i2c_transfer_#t~bitwise215#1;assume saa7146_i2c_transfer_#t~bitwise215#1 % 4294967296 <= ~saa7146_debug~0 % 4294967296 && saa7146_i2c_transfer_#t~bitwise215#1 % 4294967296 <= 8; [2025-02-08 15:24:01,647 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4900-1: call ULTIMATE.dealloc(saa7146_i2c_reset_~#descriptor~0#1.base, saa7146_i2c_reset_~#descriptor~0#1.offset);havoc saa7146_i2c_reset_~#descriptor~0#1.base, saa7146_i2c_reset_~#descriptor~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_reset_~#descriptor___0~0#1.base, saa7146_i2c_reset_~#descriptor___0~0#1.offset);havoc saa7146_i2c_reset_~#descriptor___0~0#1.base, saa7146_i2c_reset_~#descriptor___0~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_reset_~#descriptor___1~0#1.base, saa7146_i2c_reset_~#descriptor___1~0#1.offset);havoc saa7146_i2c_reset_~#descriptor___1~0#1.base, saa7146_i2c_reset_~#descriptor___1~0#1.offset;saa7146_i2c_transfer_#t~ret206#1 := saa7146_i2c_reset_#res#1;havoc saa7146_i2c_reset_#t~ret82#1, saa7146_i2c_reset_#t~mem83#1, saa7146_i2c_reset_#t~mem84#1.base, saa7146_i2c_reset_#t~mem84#1.offset, saa7146_i2c_reset_#t~mem85#1.base, saa7146_i2c_reset_#t~mem85#1.offset, saa7146_i2c_reset_#t~bitwise86#1, saa7146_i2c_reset_#t~mem87#1, saa7146_i2c_reset_#t~ret88#1, saa7146_i2c_reset_#t~ret89#1, saa7146_i2c_reset_#t~mem90#1, saa7146_i2c_reset_#t~bitwise91#1, saa7146_i2c_reset_#t~mem92#1.base, saa7146_i2c_reset_#t~mem92#1.offset, saa7146_i2c_reset_#t~mem93#1.base, saa7146_i2c_reset_#t~mem93#1.offset, saa7146_i2c_reset_#t~mem94#1, saa7146_i2c_reset_#t~mem95#1.base, saa7146_i2c_reset_#t~mem95#1.offset, saa7146_i2c_reset_#t~mem96#1.base, saa7146_i2c_reset_#t~mem96#1.offset, saa7146_i2c_reset_#t~ret97#1, saa7146_i2c_reset_#t~mem98#1, saa7146_i2c_reset_#t~bitwise99#1, saa7146_i2c_reset_#t~mem100#1, saa7146_i2c_reset_#t~ret101#1, saa7146_i2c_reset_#t~ret102#1, saa7146_i2c_reset_#t~mem103#1, saa7146_i2c_reset_#t~bitwise104#1, saa7146_i2c_reset_#t~mem105#1.base, saa7146_i2c_reset_#t~mem105#1.offset, saa7146_i2c_reset_#t~mem106#1.base, saa7146_i2c_reset_#t~mem106#1.offset, saa7146_i2c_reset_#t~mem107#1, saa7146_i2c_reset_#t~mem108#1.base, saa7146_i2c_reset_#t~mem108#1.offset, saa7146_i2c_reset_#t~mem109#1.base, saa7146_i2c_reset_#t~mem109#1.offset, saa7146_i2c_reset_#t~mem110#1, saa7146_i2c_reset_#t~mem111#1.base, saa7146_i2c_reset_#t~mem111#1.offset, saa7146_i2c_reset_#t~mem112#1.base, saa7146_i2c_reset_#t~mem112#1.offset, saa7146_i2c_reset_#t~ret113#1, saa7146_i2c_reset_#t~mem114#1, saa7146_i2c_reset_#t~bitwise115#1, saa7146_i2c_reset_#t~mem116#1, saa7146_i2c_reset_#t~ret117#1, saa7146_i2c_reset_#t~ret118#1, saa7146_i2c_reset_~dev#1.base, saa7146_i2c_reset_~dev#1.offset, saa7146_i2c_reset_~status~0#1, saa7146_i2c_reset_~tmp~7#1, saa7146_i2c_reset_~#descriptor~0#1.base, saa7146_i2c_reset_~#descriptor~0#1.offset, saa7146_i2c_reset_~tmp___0~3#1, saa7146_i2c_reset_~#descriptor___0~0#1.base, saa7146_i2c_reset_~#descriptor___0~0#1.offset, saa7146_i2c_reset_~tmp___1~0#1, saa7146_i2c_reset_~#descriptor___1~0#1.base, saa7146_i2c_reset_~#descriptor___1~0#1.offset, saa7146_i2c_reset_~tmp___2~0#1;havoc saa7146_i2c_reset_#in~dev#1.base, saa7146_i2c_reset_#in~dev#1.offset;assume { :end_inline_saa7146_i2c_reset } true;saa7146_i2c_transfer_~err~0#1 := saa7146_i2c_transfer_#t~ret206#1; [2025-02-08 15:24:01,647 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4900: call ULTIMATE.dealloc(saa7146_i2c_reset_~#descriptor~0#1.base, saa7146_i2c_reset_~#descriptor~0#1.offset);havoc saa7146_i2c_reset_~#descriptor~0#1.base, saa7146_i2c_reset_~#descriptor~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_reset_~#descriptor___0~0#1.base, saa7146_i2c_reset_~#descriptor___0~0#1.offset);havoc saa7146_i2c_reset_~#descriptor___0~0#1.base, saa7146_i2c_reset_~#descriptor___0~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_reset_~#descriptor___1~0#1.base, saa7146_i2c_reset_~#descriptor___1~0#1.offset);havoc saa7146_i2c_reset_~#descriptor___1~0#1.base, saa7146_i2c_reset_~#descriptor___1~0#1.offset;saa7146_i2c_transfer_#t~ret229#1 := saa7146_i2c_reset_#res#1;havoc saa7146_i2c_reset_#t~ret82#1, saa7146_i2c_reset_#t~mem83#1, saa7146_i2c_reset_#t~mem84#1.base, saa7146_i2c_reset_#t~mem84#1.offset, saa7146_i2c_reset_#t~mem85#1.base, saa7146_i2c_reset_#t~mem85#1.offset, saa7146_i2c_reset_#t~bitwise86#1, saa7146_i2c_reset_#t~mem87#1, saa7146_i2c_reset_#t~ret88#1, saa7146_i2c_reset_#t~ret89#1, saa7146_i2c_reset_#t~mem90#1, saa7146_i2c_reset_#t~bitwise91#1, saa7146_i2c_reset_#t~mem92#1.base, saa7146_i2c_reset_#t~mem92#1.offset, saa7146_i2c_reset_#t~mem93#1.base, saa7146_i2c_reset_#t~mem93#1.offset, saa7146_i2c_reset_#t~mem94#1, saa7146_i2c_reset_#t~mem95#1.base, saa7146_i2c_reset_#t~mem95#1.offset, saa7146_i2c_reset_#t~mem96#1.base, saa7146_i2c_reset_#t~mem96#1.offset, saa7146_i2c_reset_#t~ret97#1, saa7146_i2c_reset_#t~mem98#1, saa7146_i2c_reset_#t~bitwise99#1, saa7146_i2c_reset_#t~mem100#1, saa7146_i2c_reset_#t~ret101#1, saa7146_i2c_reset_#t~ret102#1, saa7146_i2c_reset_#t~mem103#1, saa7146_i2c_reset_#t~bitwise104#1, saa7146_i2c_reset_#t~mem105#1.base, saa7146_i2c_reset_#t~mem105#1.offset, saa7146_i2c_reset_#t~mem106#1.base, saa7146_i2c_reset_#t~mem106#1.offset, saa7146_i2c_reset_#t~mem107#1, saa7146_i2c_reset_#t~mem108#1.base, saa7146_i2c_reset_#t~mem108#1.offset, saa7146_i2c_reset_#t~mem109#1.base, saa7146_i2c_reset_#t~mem109#1.offset, saa7146_i2c_reset_#t~mem110#1, saa7146_i2c_reset_#t~mem111#1.base, saa7146_i2c_reset_#t~mem111#1.offset, saa7146_i2c_reset_#t~mem112#1.base, saa7146_i2c_reset_#t~mem112#1.offset, saa7146_i2c_reset_#t~ret113#1, saa7146_i2c_reset_#t~mem114#1, saa7146_i2c_reset_#t~bitwise115#1, saa7146_i2c_reset_#t~mem116#1, saa7146_i2c_reset_#t~ret117#1, saa7146_i2c_reset_#t~ret118#1, saa7146_i2c_reset_~dev#1.base, saa7146_i2c_reset_~dev#1.offset, saa7146_i2c_reset_~status~0#1, saa7146_i2c_reset_~tmp~7#1, saa7146_i2c_reset_~#descriptor~0#1.base, saa7146_i2c_reset_~#descriptor~0#1.offset, saa7146_i2c_reset_~tmp___0~3#1, saa7146_i2c_reset_~#descriptor___0~0#1.base, saa7146_i2c_reset_~#descriptor___0~0#1.offset, saa7146_i2c_reset_~tmp___1~0#1, saa7146_i2c_reset_~#descriptor___1~0#1.base, saa7146_i2c_reset_~#descriptor___1~0#1.offset, saa7146_i2c_reset_~tmp___2~0#1;havoc saa7146_i2c_reset_#in~dev#1.base, saa7146_i2c_reset_#in~dev#1.offset;assume { :end_inline_saa7146_i2c_reset } true;havoc saa7146_i2c_transfer_#t~ret229#1;assume { :begin_inline_saa7146_i2c_writeout } true;saa7146_i2c_writeout_#in~dev#1.base, saa7146_i2c_writeout_#in~dev#1.offset, saa7146_i2c_writeout_#in~dword#1.base, saa7146_i2c_writeout_#in~dword#1.offset, saa7146_i2c_writeout_#in~short_delay#1 := saa7146_i2c_transfer_~dev#1.base, saa7146_i2c_transfer_~dev#1.offset, saa7146_i2c_transfer_~#zero~0#1.base, saa7146_i2c_transfer_~#zero~0#1.offset, saa7146_i2c_transfer_~short_delay~0#1;havoc saa7146_i2c_writeout_#res#1;havoc saa7146_i2c_writeout_#t~bitwise119#1, saa7146_i2c_writeout_#t~mem120#1, saa7146_i2c_writeout_#t~ret121#1, saa7146_i2c_writeout_#t~mem122#1.base, saa7146_i2c_writeout_#t~mem122#1.offset, saa7146_i2c_writeout_#t~ret123#1, saa7146_i2c_writeout_#t~mem124#1, saa7146_i2c_writeout_#t~mem125#1, saa7146_i2c_writeout_#t~ret126#1, saa7146_i2c_writeout_#t~mem127#1.base, saa7146_i2c_writeout_#t~mem127#1.offset, saa7146_i2c_writeout_#t~mem128#1, saa7146_i2c_writeout_#t~mem129#1, saa7146_i2c_writeout_#t~mem130#1.base, saa7146_i2c_writeout_#t~mem130#1.offset, saa7146_i2c_writeout_#t~mem131#1, saa7146_i2c_writeout_#t~mem132#1.base, saa7146_i2c_writeout_#t~mem132#1.offset, saa7146_i2c_writeout_#t~mem133#1.base, saa7146_i2c_writeout_#t~mem133#1.offset, saa7146_i2c_writeout_#t~mem134#1.base, saa7146_i2c_writeout_#t~mem134#1.offset, saa7146_i2c_writeout_#t~mem135#1, saa7146_i2c_writeout_#t~ret136#1.base, saa7146_i2c_writeout_#t~ret136#1.offset, saa7146_i2c_writeout_#t~mem137#1, saa7146_i2c_writeout_#t~ret138#1.base, saa7146_i2c_writeout_#t~ret138#1.offset, saa7146_i2c_writeout_#t~ret139#1, saa7146_i2c_writeout_#t~ret140#1, saa7146_i2c_writeout_#t~mem141#1, saa7146_i2c_writeout_#t~short142#1, saa7146_i2c_writeout_#t~mem143#1.base, saa7146_i2c_writeout_#t~mem143#1.offset, saa7146_i2c_writeout_#t~ret144#1, saa7146_i2c_writeout_#t~mem145#1.base, saa7146_i2c_writeout_#t~mem145#1.offset, saa7146_i2c_writeout_#t~ret146#1, saa7146_i2c_writeout_#t~mem147#1, saa7146_i2c_writeout_#t~mem148#1.base, saa7146_i2c_writeout_#t~mem148#1.offset, saa7146_i2c_writeout_#t~mem149#1, saa7146_i2c_writeout_#t~mem150#1.base, saa7146_i2c_writeout_#t~mem150#1.offset, saa7146_i2c_writeout_#t~mem151#1.base, saa7146_i2c_writeout_#t~mem151#1.offset, saa7146_i2c_writeout_#t~mem152#1.base, saa7146_i2c_writeout_#t~mem152#1.offset, saa7146_i2c_writeout_#t~ret153#1, saa7146_i2c_writeout_#t~ret154#1, saa7146_i2c_writeout_#t~ret155#1, saa7146_i2c_writeout_#t~ret156#1, saa7146_i2c_writeout_#t~ret157#1, saa7146_i2c_writeout_#t~bitwise158#1, saa7146_i2c_writeout_#t~bitwise159#1, saa7146_i2c_writeout_#t~mem160#1, saa7146_i2c_writeout_#t~ret161#1, saa7146_i2c_writeout_#t~ret162#1, saa7146_i2c_writeout_#t~bitwise163#1, saa7146_i2c_writeout_#t~bitwise164#1, saa7146_i2c_writeout_#t~mem165#1, saa7146_i2c_writeout_#t~ret166#1, saa7146_i2c_writeout_#t~ret167#1, saa7146_i2c_writeout_#t~bitwise168#1, saa7146_i2c_writeout_#t~bitwise169#1, saa7146_i2c_writeout_#t~mem170#1, saa7146_i2c_writeout_#t~ret171#1, saa7146_i2c_writeout_#t~ret172#1, saa7146_i2c_writeout_#t~bitwise173#1, saa7146_i2c_writeout_#t~bitwise174#1, saa7146_i2c_writeout_#t~mem175#1, saa7146_i2c_writeout_#t~ret176#1, saa7146_i2c_writeout_#t~ret177#1, saa7146_i2c_writeout_#t~bitwise178#1, saa7146_i2c_writeout_#t~bitwise179#1, saa7146_i2c_writeout_#t~mem180#1, saa7146_i2c_writeout_#t~ret181#1, saa7146_i2c_writeout_#t~ret182#1, saa7146_i2c_writeout_#t~bitwise183#1, saa7146_i2c_writeout_#t~bitwise184#1, saa7146_i2c_writeout_#t~mem185#1, saa7146_i2c_writeout_#t~ret186#1, saa7146_i2c_writeout_#t~ret187#1, saa7146_i2c_writeout_#t~mem188#1.base, saa7146_i2c_writeout_#t~mem188#1.offset, saa7146_i2c_writeout_#t~ret189#1, saa7146_i2c_writeout_#t~bitwise190#1, saa7146_i2c_writeout_#t~mem191#1, saa7146_i2c_writeout_#t~ret192#1, saa7146_i2c_writeout_#t~mem193#1, saa7146_i2c_writeout_#t~ret194#1, saa7146_i2c_writeout_~dev#1.base, saa7146_i2c_writeout_~dev#1.offset, saa7146_i2c_writeout_~dword#1.base, saa7146_i2c_writeout_~dword#1.offset, saa7146_i2c_writeout_~short_delay#1, saa7146_i2c_writeout_~status~1#1, saa7146_i2c_writeout_~mc2~0#1, saa7146_i2c_writeout_~trial~0#1, saa7146_i2c_writeout_~timeout~0#1, saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset, saa7146_i2c_writeout_~tmp~8#1, saa7146_i2c_writeout_~tmp___0~4#1, saa7146_i2c_writeout_~__ret~0#1, saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset, saa7146_i2c_writeout_~tmp___1~1#1.base, saa7146_i2c_writeout_~tmp___1~1#1.offset, saa7146_i2c_writeout_~tmp___2~1#1.base, saa7146_i2c_writeout_~tmp___2~1#1.offset, saa7146_i2c_writeout_~tmp___3~0#1, saa7146_i2c_writeout_~tmp___4~0#1, saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset, saa7146_i2c_writeout_~tmp___5~0#1, saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset, saa7146_i2c_writeout_~tmp___6~0#1, saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset, saa7146_i2c_writeout_~tmp___7~0#1, saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset, saa7146_i2c_writeout_~tmp___8~0#1, saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset, saa7146_i2c_writeout_~tmp___9~0#1, saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset, saa7146_i2c_writeout_~tmp___10~0#1, saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset, saa7146_i2c_writeout_~tmp___11~0#1;saa7146_i2c_writeout_~dev#1.base, saa7146_i2c_writeout_~dev#1.offset := saa7146_i2c_writeout_#in~dev#1.base, saa7146_i2c_writeout_#in~dev#1.offset;saa7146_i2c_writeout_~dword#1.base, saa7146_i2c_writeout_~dword#1.offset := saa7146_i2c_writeout_#in~dword#1.base, saa7146_i2c_writeout_#in~dword#1.offset;saa7146_i2c_writeout_~short_delay#1 := saa7146_i2c_writeout_#in~short_delay#1;havoc saa7146_i2c_writeout_~status~1#1;havoc saa7146_i2c_writeout_~mc2~0#1;havoc saa7146_i2c_writeout_~trial~0#1;havoc saa7146_i2c_writeout_~timeout~0#1;call saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset := #Ultimate.allocOnStack(37);havoc saa7146_i2c_writeout_~tmp~8#1;havoc saa7146_i2c_writeout_~tmp___0~4#1;havoc saa7146_i2c_writeout_~__ret~0#1;call saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset := #Ultimate.allocOnStack(36);havoc saa7146_i2c_writeout_~tmp___1~1#1.base, saa7146_i2c_writeout_~tmp___1~1#1.offset;havoc saa7146_i2c_writeout_~tmp___2~1#1.base, saa7146_i2c_writeout_~tmp___2~1#1.offset;havoc saa7146_i2c_writeout_~tmp___3~0#1;havoc saa7146_i2c_writeout_~tmp___4~0#1;call saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset := #Ultimate.allocOnStack(37);havoc saa7146_i2c_writeout_~tmp___5~0#1;call saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset := #Ultimate.allocOnStack(37);havoc saa7146_i2c_writeout_~tmp___6~0#1;call saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset := #Ultimate.allocOnStack(37);havoc saa7146_i2c_writeout_~tmp___7~0#1;call saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset := #Ultimate.allocOnStack(37);havoc saa7146_i2c_writeout_~tmp___8~0#1;call saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset := #Ultimate.allocOnStack(37);havoc saa7146_i2c_writeout_~tmp___9~0#1;call saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset := #Ultimate.allocOnStack(37);havoc saa7146_i2c_writeout_~tmp___10~0#1;call saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset := #Ultimate.allocOnStack(37);havoc saa7146_i2c_writeout_~tmp___11~0#1;saa7146_i2c_writeout_~status~1#1 := 0;saa7146_i2c_writeout_~mc2~0#1 := 0;saa7146_i2c_writeout_~trial~0#1 := 0; [2025-02-08 15:24:01,648 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7609-2: havoc _raw_spin_lock_irqsave_#t~nondet693#1;SAA7146_IER_ENABLE_#t~ret44#1 := _raw_spin_lock_irqsave_#res#1;havoc _raw_spin_lock_irqsave_#t~nondet693#1, _raw_spin_lock_irqsave_~arg0#1.base, _raw_spin_lock_irqsave_~arg0#1.offset;havoc _raw_spin_lock_irqsave_#in~arg0#1.base, _raw_spin_lock_irqsave_#in~arg0#1.offset;assume { :end_inline__raw_spin_lock_irqsave } true;SAA7146_IER_ENABLE_~flags~1#1 := SAA7146_IER_ENABLE_#t~ret44#1;havoc SAA7146_IER_ENABLE_#t~ret44#1;call SAA7146_IER_ENABLE_#t~mem45#1.base, SAA7146_IER_ENABLE_#t~mem45#1.offset := read~$Pointer$#6(SAA7146_IER_ENABLE_~x#1.base, 802 + SAA7146_IER_ENABLE_~x#1.offset, 8);assume { :begin_inline_readl } true;readl_#in~addr#1.base, readl_#in~addr#1.offset := SAA7146_IER_ENABLE_#t~mem45#1.base, 220 + SAA7146_IER_ENABLE_#t~mem45#1.offset;havoc readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;readl_~addr#1.base, readl_~addr#1.offset := readl_#in~addr#1.base, readl_#in~addr#1.offset;havoc readl_~ret~0#1;readl_#res#1 := readl_~ret~0#1; [2025-02-08 15:24:01,648 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7609: havoc _raw_spin_lock_irqsave_#t~nondet693#1;SAA7146_IER_DISABLE_#t~ret38#1 := _raw_spin_lock_irqsave_#res#1;havoc _raw_spin_lock_irqsave_#t~nondet693#1, _raw_spin_lock_irqsave_~arg0#1.base, _raw_spin_lock_irqsave_~arg0#1.offset;havoc _raw_spin_lock_irqsave_#in~arg0#1.base, _raw_spin_lock_irqsave_#in~arg0#1.offset;assume { :end_inline__raw_spin_lock_irqsave } true;SAA7146_IER_DISABLE_~flags~0#1 := SAA7146_IER_DISABLE_#t~ret38#1;havoc SAA7146_IER_DISABLE_#t~ret38#1;call SAA7146_IER_DISABLE_#t~mem39#1.base, SAA7146_IER_DISABLE_#t~mem39#1.offset := read~$Pointer$#6(SAA7146_IER_DISABLE_~x#1.base, 802 + SAA7146_IER_DISABLE_~x#1.offset, 8);assume { :begin_inline_readl } true;readl_#in~addr#1.base, readl_#in~addr#1.offset := SAA7146_IER_DISABLE_#t~mem39#1.base, 220 + SAA7146_IER_DISABLE_#t~mem39#1.offset;havoc readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;readl_~addr#1.base, readl_~addr#1.offset := readl_#in~addr#1.base, readl_#in~addr#1.offset;havoc readl_~ret~0#1;readl_#res#1 := readl_~ret~0#1; [2025-02-08 15:24:01,648 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5429-2: havoc saa7146_i2c_transfer_#t~bitwise224#1;assume saa7146_i2c_transfer_#t~bitwise224#1 % 4294967296 <= ~saa7146_debug~0 % 4294967296 && saa7146_i2c_transfer_#t~bitwise224#1 % 4294967296 <= 8; [2025-02-08 15:24:01,648 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5429-3: assume 8 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_transfer_#t~bitwise224#1 := ~saa7146_debug~0; [2025-02-08 15:24:01,648 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5429-3: assume !(8 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,648 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7609-6: havoc _raw_spin_lock_irqsave_#t~nondet693#1;SAA7146_IER_ENABLE_#t~ret44#1 := _raw_spin_lock_irqsave_#res#1;havoc _raw_spin_lock_irqsave_#t~nondet693#1, _raw_spin_lock_irqsave_~arg0#1.base, _raw_spin_lock_irqsave_~arg0#1.offset;havoc _raw_spin_lock_irqsave_#in~arg0#1.base, _raw_spin_lock_irqsave_#in~arg0#1.offset;assume { :end_inline__raw_spin_lock_irqsave } true;SAA7146_IER_ENABLE_~flags~1#1 := SAA7146_IER_ENABLE_#t~ret44#1;havoc SAA7146_IER_ENABLE_#t~ret44#1;call SAA7146_IER_ENABLE_#t~mem45#1.base, SAA7146_IER_ENABLE_#t~mem45#1.offset := read~$Pointer$#6(SAA7146_IER_ENABLE_~x#1.base, 802 + SAA7146_IER_ENABLE_~x#1.offset, 8);assume { :begin_inline_readl } true;readl_#in~addr#1.base, readl_#in~addr#1.offset := SAA7146_IER_ENABLE_#t~mem45#1.base, 220 + SAA7146_IER_ENABLE_#t~mem45#1.offset;havoc readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;readl_~addr#1.base, readl_~addr#1.offset := readl_#in~addr#1.base, readl_#in~addr#1.offset;havoc readl_~ret~0#1;readl_#res#1 := readl_~ret~0#1; [2025-02-08 15:24:01,648 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5429: assume 0 != saa7146_i2c_transfer_#t~bitwise224#1 % 4294967296;havoc saa7146_i2c_transfer_#t~bitwise224#1;call write~$Pointer$#10(99, 0, saa7146_i2c_transfer_~#descriptor___3~1#1.base, saa7146_i2c_transfer_~#descriptor___3~1#1.offset, 8);call write~$Pointer$#10(100, 0, saa7146_i2c_transfer_~#descriptor___3~1#1.base, 8 + saa7146_i2c_transfer_~#descriptor___3~1#1.offset, 8);call write~$Pointer$#10(101, 0, saa7146_i2c_transfer_~#descriptor___3~1#1.base, 16 + saa7146_i2c_transfer_~#descriptor___3~1#1.offset, 8);call write~$Pointer$#10(102, 0, saa7146_i2c_transfer_~#descriptor___3~1#1.base, 24 + saa7146_i2c_transfer_~#descriptor___3~1#1.offset, 8);call write~int#10(415, saa7146_i2c_transfer_~#descriptor___3~1#1.base, 32 + saa7146_i2c_transfer_~#descriptor___3~1#1.offset, 4);call write~int#10(0, saa7146_i2c_transfer_~#descriptor___3~1#1.base, 36 + saa7146_i2c_transfer_~#descriptor___3~1#1.offset, 1);call saa7146_i2c_transfer_#t~mem225#1 := read~int#10(saa7146_i2c_transfer_~#descriptor___3~1#1.base, 36 + saa7146_i2c_transfer_~#descriptor___3~1#1.offset, 1);assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if saa7146_i2c_transfer_#t~mem225#1 % 256 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_transfer_#t~mem225#1 % 256 % 18446744073709551616 else saa7146_i2c_transfer_#t~mem225#1 % 256 % 18446744073709551616 - 18446744073709551616) % 2, 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; [2025-02-08 15:24:01,648 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5429: assume !(0 != saa7146_i2c_transfer_#t~bitwise224#1 % 4294967296);havoc saa7146_i2c_transfer_#t~bitwise224#1; [2025-02-08 15:24:01,648 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5429-1: [2025-02-08 15:24:01,648 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7609-4: havoc _raw_spin_lock_irqsave_#t~nondet693#1;SAA7146_IER_DISABLE_#t~ret38#1 := _raw_spin_lock_irqsave_#res#1;havoc _raw_spin_lock_irqsave_#t~nondet693#1, _raw_spin_lock_irqsave_~arg0#1.base, _raw_spin_lock_irqsave_~arg0#1.offset;havoc _raw_spin_lock_irqsave_#in~arg0#1.base, _raw_spin_lock_irqsave_#in~arg0#1.offset;assume { :end_inline__raw_spin_lock_irqsave } true;SAA7146_IER_DISABLE_~flags~0#1 := SAA7146_IER_DISABLE_#t~ret38#1;havoc SAA7146_IER_DISABLE_#t~ret38#1;call SAA7146_IER_DISABLE_#t~mem39#1.base, SAA7146_IER_DISABLE_#t~mem39#1.offset := read~$Pointer$#6(SAA7146_IER_DISABLE_~x#1.base, 802 + SAA7146_IER_DISABLE_~x#1.offset, 8);assume { :begin_inline_readl } true;readl_#in~addr#1.base, readl_#in~addr#1.offset := SAA7146_IER_DISABLE_#t~mem39#1.base, 220 + SAA7146_IER_DISABLE_#t~mem39#1.offset;havoc readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;readl_~addr#1.base, readl_~addr#1.offset := readl_#in~addr#1.base, readl_#in~addr#1.offset;havoc readl_~ret~0#1;readl_#res#1 := readl_~ret~0#1; [2025-02-08 15:24:01,648 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5231: saa7146_i2c_writeout_#t~ret186#1 := ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;havoc ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1;assume { :end_inline_ldv__builtin_expect } true;saa7146_i2c_writeout_~tmp___10~0#1 := saa7146_i2c_writeout_#t~ret186#1;havoc saa7146_i2c_writeout_#t~mem185#1;havoc saa7146_i2c_writeout_#t~ret186#1; [2025-02-08 15:24:01,648 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5231-1: saa7146_i2c_writeout_#t~ret186#1 := ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;havoc ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1;assume { :end_inline_ldv__builtin_expect } true;saa7146_i2c_writeout_~tmp___10~0#1 := saa7146_i2c_writeout_#t~ret186#1;havoc saa7146_i2c_writeout_#t~mem185#1;havoc saa7146_i2c_writeout_#t~ret186#1; [2025-02-08 15:24:01,648 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5429-4: assume 0 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_transfer_#t~bitwise224#1 := 0; [2025-02-08 15:24:01,648 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5429-4: assume !(0 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,648 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L12-5: assume false; [2025-02-08 15:24:01,648 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L12-5: assume !false;assume false; [2025-02-08 15:24:01,648 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L12-6: assume false; [2025-02-08 15:24:01,648 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L12-6: assume !false;assume false; [2025-02-08 15:24:01,648 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5232-1: assume 0 != saa7146_i2c_writeout_~tmp___10~0#1;assume { :begin_inline___dynamic_pr_debug } true;__dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset := saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset, 67, 0;havoc __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;__dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset := __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset;__dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset := __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;havoc __dynamic_pr_debug_#t~nondet691#1;__dynamic_pr_debug_#res#1 := __dynamic_pr_debug_#t~nondet691#1;havoc __dynamic_pr_debug_#t~nondet691#1; [2025-02-08 15:24:01,648 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5232-1: assume !(0 != saa7146_i2c_writeout_~tmp___10~0#1); [2025-02-08 15:24:01,649 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5232: assume 0 != saa7146_i2c_writeout_~tmp___10~0#1;assume { :begin_inline___dynamic_pr_debug } true;__dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset := saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset, 67, 0;havoc __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;__dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset := __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset;__dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset := __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;havoc __dynamic_pr_debug_#t~nondet691#1;__dynamic_pr_debug_#res#1 := __dynamic_pr_debug_#t~nondet691#1;havoc __dynamic_pr_debug_#t~nondet691#1; [2025-02-08 15:24:01,649 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5232: assume !(0 != saa7146_i2c_writeout_~tmp___10~0#1); [2025-02-08 15:24:01,649 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5034: assume 0 != saa7146_i2c_writeout_#t~mem128#1 % 2;havoc saa7146_i2c_writeout_#t~mem127#1.base, saa7146_i2c_writeout_#t~mem127#1.offset;havoc saa7146_i2c_writeout_#t~mem128#1;call saa7146_i2c_writeout_#t~mem129#1 := read~int#6(saa7146_i2c_writeout_~dev#1.base, 1122 + saa7146_i2c_writeout_~dev#1.offset, 4);call saa7146_i2c_writeout_#t~mem130#1.base, saa7146_i2c_writeout_#t~mem130#1.offset := read~$Pointer$#6(saa7146_i2c_writeout_~dev#1.base, 802 + saa7146_i2c_writeout_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := saa7146_i2c_writeout_#t~mem129#1, saa7146_i2c_writeout_#t~mem130#1.base, 144 + saa7146_i2c_writeout_#t~mem130#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,649 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5034: assume !(0 != saa7146_i2c_writeout_#t~mem128#1 % 2);havoc saa7146_i2c_writeout_#t~mem127#1.base, saa7146_i2c_writeout_#t~mem127#1.offset;havoc saa7146_i2c_writeout_#t~mem128#1;call saa7146_i2c_writeout_#t~mem147#1 := read~int#6(saa7146_i2c_writeout_~dev#1.base, 1122 + saa7146_i2c_writeout_~dev#1.offset, 4);call saa7146_i2c_writeout_#t~mem148#1.base, saa7146_i2c_writeout_#t~mem148#1.offset := read~$Pointer$#6(saa7146_i2c_writeout_~dev#1.base, 802 + saa7146_i2c_writeout_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := saa7146_i2c_writeout_#t~mem147#1, saa7146_i2c_writeout_#t~mem148#1.base, 144 + saa7146_i2c_writeout_#t~mem148#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,649 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5034-3: call saa7146_i2c_writeout_#t~mem127#1.base, saa7146_i2c_writeout_#t~mem127#1.offset := read~$Pointer$#6(saa7146_i2c_writeout_~dev#1.base, 926 + saa7146_i2c_writeout_~dev#1.offset, 8);call saa7146_i2c_writeout_#t~mem128#1 := read~int#5(saa7146_i2c_writeout_#t~mem127#1.base, 32 + saa7146_i2c_writeout_#t~mem127#1.offset, 4); [2025-02-08 15:24:01,649 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5034-1: call saa7146_i2c_writeout_#t~mem127#1.base, saa7146_i2c_writeout_#t~mem127#1.offset := read~$Pointer$#6(saa7146_i2c_writeout_~dev#1.base, 926 + saa7146_i2c_writeout_~dev#1.offset, 8);call saa7146_i2c_writeout_#t~mem128#1 := read~int#5(saa7146_i2c_writeout_#t~mem127#1.base, 32 + saa7146_i2c_writeout_#t~mem127#1.offset, 4); [2025-02-08 15:24:01,649 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5034-2: assume 0 != saa7146_i2c_writeout_#t~mem128#1 % 2;havoc saa7146_i2c_writeout_#t~mem127#1.base, saa7146_i2c_writeout_#t~mem127#1.offset;havoc saa7146_i2c_writeout_#t~mem128#1;call saa7146_i2c_writeout_#t~mem129#1 := read~int#6(saa7146_i2c_writeout_~dev#1.base, 1122 + saa7146_i2c_writeout_~dev#1.offset, 4);call saa7146_i2c_writeout_#t~mem130#1.base, saa7146_i2c_writeout_#t~mem130#1.offset := read~$Pointer$#6(saa7146_i2c_writeout_~dev#1.base, 802 + saa7146_i2c_writeout_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := saa7146_i2c_writeout_#t~mem129#1, saa7146_i2c_writeout_#t~mem130#1.base, 144 + saa7146_i2c_writeout_#t~mem130#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,649 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5034-2: assume !(0 != saa7146_i2c_writeout_#t~mem128#1 % 2);havoc saa7146_i2c_writeout_#t~mem127#1.base, saa7146_i2c_writeout_#t~mem127#1.offset;havoc saa7146_i2c_writeout_#t~mem128#1;call saa7146_i2c_writeout_#t~mem147#1 := read~int#6(saa7146_i2c_writeout_~dev#1.base, 1122 + saa7146_i2c_writeout_~dev#1.offset, 4);call saa7146_i2c_writeout_#t~mem148#1.base, saa7146_i2c_writeout_#t~mem148#1.offset := read~$Pointer$#6(saa7146_i2c_writeout_~dev#1.base, 802 + saa7146_i2c_writeout_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := saa7146_i2c_writeout_#t~mem147#1, saa7146_i2c_writeout_#t~mem148#1.base, 144 + saa7146_i2c_writeout_#t~mem148#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,649 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5035: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_writeout_#t~mem129#1;havoc saa7146_i2c_writeout_#t~mem130#1.base, saa7146_i2c_writeout_#t~mem130#1.offset;call saa7146_i2c_writeout_#t~mem131#1 := read~int#5(saa7146_i2c_writeout_~dword#1.base, saa7146_i2c_writeout_~dword#1.offset, 4);call saa7146_i2c_writeout_#t~mem132#1.base, saa7146_i2c_writeout_#t~mem132#1.offset := read~$Pointer$#6(saa7146_i2c_writeout_~dev#1.base, 802 + saa7146_i2c_writeout_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := saa7146_i2c_writeout_#t~mem131#1, saa7146_i2c_writeout_#t~mem132#1.base, 140 + saa7146_i2c_writeout_#t~mem132#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,649 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5035-1: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_writeout_#t~mem129#1;havoc saa7146_i2c_writeout_#t~mem130#1.base, saa7146_i2c_writeout_#t~mem130#1.offset;call saa7146_i2c_writeout_#t~mem131#1 := read~int#5(saa7146_i2c_writeout_~dword#1.base, saa7146_i2c_writeout_~dword#1.offset, 4);call saa7146_i2c_writeout_#t~mem132#1.base, saa7146_i2c_writeout_#t~mem132#1.offset := read~$Pointer$#6(saa7146_i2c_writeout_~dev#1.base, 802 + saa7146_i2c_writeout_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := saa7146_i2c_writeout_#t~mem131#1, saa7146_i2c_writeout_#t~mem132#1.base, 140 + saa7146_i2c_writeout_#t~mem132#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,649 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5101: assume (if saa7146_i2c_writeout_~timeout~0#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_writeout_~timeout~0#1 % 18446744073709551616 % 18446744073709551616 else saa7146_i2c_writeout_~timeout~0#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616) - (if ~jiffies~0 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~jiffies~0 % 18446744073709551616 % 18446744073709551616 else ~jiffies~0 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616) < 0;assume { :begin_inline_printk } true;printk_#in~arg0#1.base, printk_#in~arg0#1.offset := 29, 0;havoc printk_#res#1;havoc printk_#t~nondet701#1, printk_~arg0#1.base, printk_~arg0#1.offset;printk_~arg0#1.base, printk_~arg0#1.offset := printk_#in~arg0#1.base, printk_#in~arg0#1.offset;havoc printk_#t~nondet701#1;printk_#res#1 := printk_#t~nondet701#1;havoc printk_#t~nondet701#1; [2025-02-08 15:24:01,650 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5101: assume !((if saa7146_i2c_writeout_~timeout~0#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_writeout_~timeout~0#1 % 18446744073709551616 % 18446744073709551616 else saa7146_i2c_writeout_~timeout~0#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616) - (if ~jiffies~0 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~jiffies~0 % 18446744073709551616 % 18446744073709551616 else ~jiffies~0 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616) < 0); [2025-02-08 15:24:01,650 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5101-1: assume (if saa7146_i2c_writeout_~timeout~0#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_writeout_~timeout~0#1 % 18446744073709551616 % 18446744073709551616 else saa7146_i2c_writeout_~timeout~0#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616) - (if ~jiffies~0 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~jiffies~0 % 18446744073709551616 % 18446744073709551616 else ~jiffies~0 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616) < 0;assume { :begin_inline_printk } true;printk_#in~arg0#1.base, printk_#in~arg0#1.offset := 29, 0;havoc printk_#res#1;havoc printk_#t~nondet701#1, printk_~arg0#1.base, printk_~arg0#1.offset;printk_~arg0#1.base, printk_~arg0#1.offset := printk_#in~arg0#1.base, printk_#in~arg0#1.offset;havoc printk_#t~nondet701#1;printk_#res#1 := printk_#t~nondet701#1;havoc printk_#t~nondet701#1; [2025-02-08 15:24:01,650 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5101-1: assume !((if saa7146_i2c_writeout_~timeout~0#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_writeout_~timeout~0#1 % 18446744073709551616 % 18446744073709551616 else saa7146_i2c_writeout_~timeout~0#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616) - (if ~jiffies~0 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~jiffies~0 % 18446744073709551616 % 18446744073709551616 else ~jiffies~0 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616) < 0); [2025-02-08 15:24:01,650 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7017: assume 1 == ~ldv_mutex_i2c_lock_of_saa7146_dev~0; [2025-02-08 15:24:01,650 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7017: assume !(1 == ~ldv_mutex_i2c_lock_of_saa7146_dev~0);assume { :begin_inline_ldv_error } true;assume { :begin_inline_reach_error } true;havoc reach_error_#t~nondet0#1.base, reach_error_#t~nondet0#1.offset; [2025-02-08 15:24:01,650 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5036-1: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_writeout_#t~mem131#1;havoc saa7146_i2c_writeout_#t~mem132#1.base, saa7146_i2c_writeout_#t~mem132#1.offset;call write~int#6(1, saa7146_i2c_writeout_~dev#1.base, 1226 + saa7146_i2c_writeout_~dev#1.offset, 4);call saa7146_i2c_writeout_#t~mem133#1.base, saa7146_i2c_writeout_#t~mem133#1.offset := read~$Pointer$#6(saa7146_i2c_writeout_~dev#1.base, 802 + saa7146_i2c_writeout_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := 196608, saa7146_i2c_writeout_#t~mem133#1.base, 268 + saa7146_i2c_writeout_#t~mem133#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,650 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5036: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_writeout_#t~mem131#1;havoc saa7146_i2c_writeout_#t~mem132#1.base, saa7146_i2c_writeout_#t~mem132#1.offset;call write~int#6(1, saa7146_i2c_writeout_~dev#1.base, 1226 + saa7146_i2c_writeout_~dev#1.offset, 4);call saa7146_i2c_writeout_#t~mem133#1.base, saa7146_i2c_writeout_#t~mem133#1.offset := read~$Pointer$#6(saa7146_i2c_writeout_~dev#1.base, 802 + saa7146_i2c_writeout_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := 196608, saa7146_i2c_writeout_#t~mem133#1.base, 268 + saa7146_i2c_writeout_#t~mem133#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,650 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4838: saa7146_i2c_msg_prepare_~h1~0#1 := (if saa7146_i2c_msg_prepare_~op_count~0#1 < 0 && 0 != saa7146_i2c_msg_prepare_~op_count~0#1 % 3 then 1 + saa7146_i2c_msg_prepare_~op_count~0#1 / 3 else saa7146_i2c_msg_prepare_~op_count~0#1 / 3);saa7146_i2c_msg_prepare_~h2~0#1 := (if saa7146_i2c_msg_prepare_~op_count~0#1 < 0 && 0 != saa7146_i2c_msg_prepare_~op_count~0#1 % 3 then saa7146_i2c_msg_prepare_~op_count~0#1 % 3 - 3 else saa7146_i2c_msg_prepare_~op_count~0#1 % 3);call saa7146_i2c_msg_prepare_#t~mem64#1 := read~int#5(saa7146_i2c_msg_prepare_~op#1.base, saa7146_i2c_msg_prepare_~op#1.offset + 4 * (if saa7146_i2c_msg_prepare_~h1~0#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_msg_prepare_~h1~0#1 % 18446744073709551616 % 18446744073709551616 else saa7146_i2c_msg_prepare_~h1~0#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 4);call saa7146_i2c_msg_prepare_#t~mem61#1.base, saa7146_i2c_msg_prepare_#t~mem61#1.offset := read~$Pointer$#11(saa7146_i2c_msg_prepare_~m#1.base, 6 + (saa7146_i2c_msg_prepare_~m#1.offset + 14 * (if saa7146_i2c_msg_prepare_~i~0#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_msg_prepare_~i~0#1 % 18446744073709551616 % 18446744073709551616 else saa7146_i2c_msg_prepare_~i~0#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616)), 8);call saa7146_i2c_msg_prepare_#t~mem62#1 := read~int#16(saa7146_i2c_msg_prepare_#t~mem61#1.base, saa7146_i2c_msg_prepare_#t~mem61#1.offset + (if saa7146_i2c_msg_prepare_~j~0#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_msg_prepare_~j~0#1 % 18446744073709551616 % 18446744073709551616 else saa7146_i2c_msg_prepare_~j~0#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 1); [2025-02-08 15:24:01,650 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5301-2: havoc saa7146_i2c_transfer_#t~bitwise197#1;assume saa7146_i2c_transfer_#t~bitwise197#1 % 4294967296 <= ~saa7146_debug~0 % 4294967296 && saa7146_i2c_transfer_#t~bitwise197#1 % 4294967296 <= 8; [2025-02-08 15:24:01,650 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5301-3: assume 8 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_transfer_#t~bitwise197#1 := ~saa7146_debug~0; [2025-02-08 15:24:01,650 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5301-3: assume !(8 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,650 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5301: assume 0 != saa7146_i2c_transfer_#t~bitwise197#1 % 4294967296;havoc saa7146_i2c_transfer_#t~bitwise197#1;call write~$Pointer$#10(75, 0, saa7146_i2c_transfer_~#descriptor~2#1.base, saa7146_i2c_transfer_~#descriptor~2#1.offset, 8);call write~$Pointer$#10(76, 0, saa7146_i2c_transfer_~#descriptor~2#1.base, 8 + saa7146_i2c_transfer_~#descriptor~2#1.offset, 8);call write~$Pointer$#10(77, 0, saa7146_i2c_transfer_~#descriptor~2#1.base, 16 + saa7146_i2c_transfer_~#descriptor~2#1.offset, 8);call write~$Pointer$#10(78, 0, saa7146_i2c_transfer_~#descriptor~2#1.base, 24 + saa7146_i2c_transfer_~#descriptor~2#1.offset, 8);call write~int#10(352, saa7146_i2c_transfer_~#descriptor~2#1.base, 32 + saa7146_i2c_transfer_~#descriptor~2#1.offset, 4);call write~int#10(0, saa7146_i2c_transfer_~#descriptor~2#1.base, 36 + saa7146_i2c_transfer_~#descriptor~2#1.offset, 1);call saa7146_i2c_transfer_#t~mem198#1 := read~int#10(saa7146_i2c_transfer_~#descriptor~2#1.base, 36 + saa7146_i2c_transfer_~#descriptor~2#1.offset, 1);assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if saa7146_i2c_transfer_#t~mem198#1 % 256 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_transfer_#t~mem198#1 % 256 % 18446744073709551616 else saa7146_i2c_transfer_#t~mem198#1 % 256 % 18446744073709551616 - 18446744073709551616) % 2, 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; [2025-02-08 15:24:01,650 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5301: assume !(0 != saa7146_i2c_transfer_#t~bitwise197#1 % 4294967296);havoc saa7146_i2c_transfer_#t~bitwise197#1; [2025-02-08 15:24:01,650 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5301-1: [2025-02-08 15:24:01,650 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5169-2: havoc saa7146_i2c_writeout_#t~bitwise168#1;assume saa7146_i2c_writeout_#t~bitwise168#1 % 4294967296 <= saa7146_i2c_writeout_~status~1#1 % 4294967296 && saa7146_i2c_writeout_#t~bitwise168#1 % 4294967296 <= 16; [2025-02-08 15:24:01,650 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5169-3: assume 16 == saa7146_i2c_writeout_~status~1#1 % 4294967296;saa7146_i2c_writeout_#t~bitwise168#1 := saa7146_i2c_writeout_~status~1#1; [2025-02-08 15:24:01,650 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5169-3: assume !(16 == saa7146_i2c_writeout_~status~1#1 % 4294967296); [2025-02-08 15:24:01,650 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5169: assume 0 != saa7146_i2c_writeout_#t~bitwise168#1 % 4294967296;havoc saa7146_i2c_writeout_#t~bitwise168#1; [2025-02-08 15:24:01,650 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5169: assume !(0 != saa7146_i2c_writeout_#t~bitwise168#1 % 4294967296);havoc saa7146_i2c_writeout_#t~bitwise168#1; [2025-02-08 15:24:01,650 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5301-4: assume 0 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_transfer_#t~bitwise197#1 := 0; [2025-02-08 15:24:01,650 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5301-4: assume !(0 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,650 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5169-1: [2025-02-08 15:24:01,653 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4971: saa7146_i2c_reset_#t~ret117#1 := ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;havoc ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1;assume { :end_inline_ldv__builtin_expect } true;saa7146_i2c_reset_~tmp___2~0#1 := saa7146_i2c_reset_#t~ret117#1;havoc saa7146_i2c_reset_#t~mem116#1;havoc saa7146_i2c_reset_#t~ret117#1; [2025-02-08 15:24:01,653 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5169-6: [2025-02-08 15:24:01,653 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5169-7: havoc saa7146_i2c_writeout_#t~bitwise168#1;assume saa7146_i2c_writeout_#t~bitwise168#1 % 4294967296 <= saa7146_i2c_writeout_~status~1#1 % 4294967296 && saa7146_i2c_writeout_#t~bitwise168#1 % 4294967296 <= 16; [2025-02-08 15:24:01,653 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4971-1: saa7146_i2c_reset_#t~ret117#1 := ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;havoc ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1;assume { :end_inline_ldv__builtin_expect } true;saa7146_i2c_reset_~tmp___2~0#1 := saa7146_i2c_reset_#t~ret117#1;havoc saa7146_i2c_reset_#t~mem116#1;havoc saa7146_i2c_reset_#t~ret117#1; [2025-02-08 15:24:01,653 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5169-4: assume 0 == saa7146_i2c_writeout_~status~1#1 % 4294967296;saa7146_i2c_writeout_#t~bitwise168#1 := 0; [2025-02-08 15:24:01,653 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5169-4: assume !(0 == saa7146_i2c_writeout_~status~1#1 % 4294967296); [2025-02-08 15:24:01,653 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5169-5: assume 0 != saa7146_i2c_writeout_#t~bitwise168#1 % 4294967296;havoc saa7146_i2c_writeout_#t~bitwise168#1; [2025-02-08 15:24:01,653 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5169-5: assume !(0 != saa7146_i2c_writeout_#t~bitwise168#1 % 4294967296);havoc saa7146_i2c_writeout_#t~bitwise168#1; [2025-02-08 15:24:01,653 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5169-8: assume 16 == saa7146_i2c_writeout_~status~1#1 % 4294967296;saa7146_i2c_writeout_#t~bitwise168#1 := saa7146_i2c_writeout_~status~1#1; [2025-02-08 15:24:01,653 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5169-8: assume !(16 == saa7146_i2c_writeout_~status~1#1 % 4294967296); [2025-02-08 15:24:01,653 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5169-9: assume 0 == saa7146_i2c_writeout_~status~1#1 % 4294967296;saa7146_i2c_writeout_#t~bitwise168#1 := 0; [2025-02-08 15:24:01,653 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5169-9: assume !(0 == saa7146_i2c_writeout_~status~1#1 % 4294967296); [2025-02-08 15:24:01,653 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5170: assume 0 != saa7146_i2c_writeout_#t~bitwise169#1 % 4294967296;havoc saa7146_i2c_writeout_#t~bitwise169#1;call write~$Pointer$#10(45, 0, saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset, 8);call write~$Pointer$#10(46, 0, saa7146_i2c_writeout_~#descriptor___2~0#1.base, 8 + saa7146_i2c_writeout_~#descriptor___2~0#1.offset, 8);call write~$Pointer$#10(47, 0, saa7146_i2c_writeout_~#descriptor___2~0#1.base, 16 + saa7146_i2c_writeout_~#descriptor___2~0#1.offset, 8);call write~$Pointer$#10(48, 0, saa7146_i2c_writeout_~#descriptor___2~0#1.base, 24 + saa7146_i2c_writeout_~#descriptor___2~0#1.offset, 8);call write~int#10(316, saa7146_i2c_writeout_~#descriptor___2~0#1.base, 32 + saa7146_i2c_writeout_~#descriptor___2~0#1.offset, 4);call write~int#10(0, saa7146_i2c_writeout_~#descriptor___2~0#1.base, 36 + saa7146_i2c_writeout_~#descriptor___2~0#1.offset, 1);call saa7146_i2c_writeout_#t~mem170#1 := read~int#10(saa7146_i2c_writeout_~#descriptor___2~0#1.base, 36 + saa7146_i2c_writeout_~#descriptor___2~0#1.offset, 1);assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if saa7146_i2c_writeout_#t~mem170#1 % 256 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_writeout_#t~mem170#1 % 256 % 18446744073709551616 else saa7146_i2c_writeout_#t~mem170#1 % 256 % 18446744073709551616 - 18446744073709551616) % 2, 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; [2025-02-08 15:24:01,653 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5170: assume !(0 != saa7146_i2c_writeout_#t~bitwise169#1 % 4294967296);havoc saa7146_i2c_writeout_#t~bitwise169#1; [2025-02-08 15:24:01,653 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5170-3: assume 8 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_writeout_#t~bitwise169#1 := ~saa7146_debug~0; [2025-02-08 15:24:01,653 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5170-3: assume !(8 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,653 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5170-4: assume 0 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_writeout_#t~bitwise169#1 := 0; [2025-02-08 15:24:01,653 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5170-4: assume !(0 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,654 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5038: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_writeout_#t~mem133#1.base, saa7146_i2c_writeout_#t~mem133#1.offset;assume { :begin_inline_SAA7146_IER_ENABLE } true;SAA7146_IER_ENABLE_#in~x#1.base, SAA7146_IER_ENABLE_#in~x#1.offset, SAA7146_IER_ENABLE_#in~y#1 := saa7146_i2c_writeout_~dev#1.base, saa7146_i2c_writeout_~dev#1.offset, 196608;havoc SAA7146_IER_ENABLE_#t~ret43#1.base, SAA7146_IER_ENABLE_#t~ret43#1.offset, SAA7146_IER_ENABLE_#t~ret44#1, SAA7146_IER_ENABLE_#t~mem45#1.base, SAA7146_IER_ENABLE_#t~mem45#1.offset, SAA7146_IER_ENABLE_#t~ret46#1, SAA7146_IER_ENABLE_#t~bitwise47#1, SAA7146_IER_ENABLE_#t~mem48#1.base, SAA7146_IER_ENABLE_#t~mem48#1.offset, SAA7146_IER_ENABLE_~x#1.base, SAA7146_IER_ENABLE_~x#1.offset, SAA7146_IER_ENABLE_~y#1, SAA7146_IER_ENABLE_~flags~1#1, SAA7146_IER_ENABLE_~tmp~5#1.base, SAA7146_IER_ENABLE_~tmp~5#1.offset, SAA7146_IER_ENABLE_~tmp___0~2#1;SAA7146_IER_ENABLE_~x#1.base, SAA7146_IER_ENABLE_~x#1.offset := SAA7146_IER_ENABLE_#in~x#1.base, SAA7146_IER_ENABLE_#in~x#1.offset;SAA7146_IER_ENABLE_~y#1 := SAA7146_IER_ENABLE_#in~y#1;havoc SAA7146_IER_ENABLE_~flags~1#1;havoc SAA7146_IER_ENABLE_~tmp~5#1.base, SAA7146_IER_ENABLE_~tmp~5#1.offset;havoc SAA7146_IER_ENABLE_~tmp___0~2#1;assume { :begin_inline_spinlock_check } true;spinlock_check_#in~lock#1.base, spinlock_check_#in~lock#1.offset := SAA7146_IER_ENABLE_~x#1.base, 858 + SAA7146_IER_ENABLE_~x#1.offset;havoc spinlock_check_#res#1.base, spinlock_check_#res#1.offset;havoc spinlock_check_~lock#1.base, spinlock_check_~lock#1.offset;spinlock_check_~lock#1.base, spinlock_check_~lock#1.offset := spinlock_check_#in~lock#1.base, spinlock_check_#in~lock#1.offset;spinlock_check_#res#1.base, spinlock_check_#res#1.offset := spinlock_check_~lock#1.base, spinlock_check_~lock#1.offset; [2025-02-08 15:24:01,654 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5170-1: [2025-02-08 15:24:01,654 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5170-2: havoc saa7146_i2c_writeout_#t~bitwise169#1;assume saa7146_i2c_writeout_#t~bitwise169#1 % 4294967296 <= ~saa7146_debug~0 % 4294967296 && saa7146_i2c_writeout_#t~bitwise169#1 % 4294967296 <= 8; [2025-02-08 15:24:01,654 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5170-7: havoc saa7146_i2c_writeout_#t~bitwise169#1;assume saa7146_i2c_writeout_#t~bitwise169#1 % 4294967296 <= ~saa7146_debug~0 % 4294967296 && saa7146_i2c_writeout_#t~bitwise169#1 % 4294967296 <= 8; [2025-02-08 15:24:01,654 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4972-1: assume 0 != saa7146_i2c_reset_~tmp___2~0#1;assume { :begin_inline___dynamic_pr_debug } true;__dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset := saa7146_i2c_reset_~#descriptor___1~0#1.base, saa7146_i2c_reset_~#descriptor___1~0#1.offset, 19, 0;havoc __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;__dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset := __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset;__dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset := __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;havoc __dynamic_pr_debug_#t~nondet691#1;__dynamic_pr_debug_#res#1 := __dynamic_pr_debug_#t~nondet691#1;havoc __dynamic_pr_debug_#t~nondet691#1; [2025-02-08 15:24:01,654 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4972-1: assume !(0 != saa7146_i2c_reset_~tmp___2~0#1); [2025-02-08 15:24:01,654 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5170-8: assume 8 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_writeout_#t~bitwise169#1 := ~saa7146_debug~0; [2025-02-08 15:24:01,654 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5170-8: assume !(8 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,654 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5170-5: assume 0 != saa7146_i2c_writeout_#t~bitwise169#1 % 4294967296;havoc saa7146_i2c_writeout_#t~bitwise169#1;call write~$Pointer$#10(45, 0, saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset, 8);call write~$Pointer$#10(46, 0, saa7146_i2c_writeout_~#descriptor___2~0#1.base, 8 + saa7146_i2c_writeout_~#descriptor___2~0#1.offset, 8);call write~$Pointer$#10(47, 0, saa7146_i2c_writeout_~#descriptor___2~0#1.base, 16 + saa7146_i2c_writeout_~#descriptor___2~0#1.offset, 8);call write~$Pointer$#10(48, 0, saa7146_i2c_writeout_~#descriptor___2~0#1.base, 24 + saa7146_i2c_writeout_~#descriptor___2~0#1.offset, 8);call write~int#10(316, saa7146_i2c_writeout_~#descriptor___2~0#1.base, 32 + saa7146_i2c_writeout_~#descriptor___2~0#1.offset, 4);call write~int#10(0, saa7146_i2c_writeout_~#descriptor___2~0#1.base, 36 + saa7146_i2c_writeout_~#descriptor___2~0#1.offset, 1);call saa7146_i2c_writeout_#t~mem170#1 := read~int#10(saa7146_i2c_writeout_~#descriptor___2~0#1.base, 36 + saa7146_i2c_writeout_~#descriptor___2~0#1.offset, 1);assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if saa7146_i2c_writeout_#t~mem170#1 % 256 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_writeout_#t~mem170#1 % 256 % 18446744073709551616 else saa7146_i2c_writeout_#t~mem170#1 % 256 % 18446744073709551616 - 18446744073709551616) % 2, 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; [2025-02-08 15:24:01,654 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5170-5: assume !(0 != saa7146_i2c_writeout_#t~bitwise169#1 % 4294967296);havoc saa7146_i2c_writeout_#t~bitwise169#1; [2025-02-08 15:24:01,654 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5038-1: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_writeout_#t~mem133#1.base, saa7146_i2c_writeout_#t~mem133#1.offset;assume { :begin_inline_SAA7146_IER_ENABLE } true;SAA7146_IER_ENABLE_#in~x#1.base, SAA7146_IER_ENABLE_#in~x#1.offset, SAA7146_IER_ENABLE_#in~y#1 := saa7146_i2c_writeout_~dev#1.base, saa7146_i2c_writeout_~dev#1.offset, 196608;havoc SAA7146_IER_ENABLE_#t~ret43#1.base, SAA7146_IER_ENABLE_#t~ret43#1.offset, SAA7146_IER_ENABLE_#t~ret44#1, SAA7146_IER_ENABLE_#t~mem45#1.base, SAA7146_IER_ENABLE_#t~mem45#1.offset, SAA7146_IER_ENABLE_#t~ret46#1, SAA7146_IER_ENABLE_#t~bitwise47#1, SAA7146_IER_ENABLE_#t~mem48#1.base, SAA7146_IER_ENABLE_#t~mem48#1.offset, SAA7146_IER_ENABLE_~x#1.base, SAA7146_IER_ENABLE_~x#1.offset, SAA7146_IER_ENABLE_~y#1, SAA7146_IER_ENABLE_~flags~1#1, SAA7146_IER_ENABLE_~tmp~5#1.base, SAA7146_IER_ENABLE_~tmp~5#1.offset, SAA7146_IER_ENABLE_~tmp___0~2#1;SAA7146_IER_ENABLE_~x#1.base, SAA7146_IER_ENABLE_~x#1.offset := SAA7146_IER_ENABLE_#in~x#1.base, SAA7146_IER_ENABLE_#in~x#1.offset;SAA7146_IER_ENABLE_~y#1 := SAA7146_IER_ENABLE_#in~y#1;havoc SAA7146_IER_ENABLE_~flags~1#1;havoc SAA7146_IER_ENABLE_~tmp~5#1.base, SAA7146_IER_ENABLE_~tmp~5#1.offset;havoc SAA7146_IER_ENABLE_~tmp___0~2#1;assume { :begin_inline_spinlock_check } true;spinlock_check_#in~lock#1.base, spinlock_check_#in~lock#1.offset := SAA7146_IER_ENABLE_~x#1.base, 858 + SAA7146_IER_ENABLE_~x#1.offset;havoc spinlock_check_#res#1.base, spinlock_check_#res#1.offset;havoc spinlock_check_~lock#1.base, spinlock_check_~lock#1.offset;spinlock_check_~lock#1.base, spinlock_check_~lock#1.offset := spinlock_check_#in~lock#1.base, spinlock_check_#in~lock#1.offset;spinlock_check_#res#1.base, spinlock_check_#res#1.offset := spinlock_check_~lock#1.base, spinlock_check_~lock#1.offset; [2025-02-08 15:24:01,655 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4972: assume 0 != saa7146_i2c_reset_~tmp___2~0#1;assume { :begin_inline___dynamic_pr_debug } true;__dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset := saa7146_i2c_reset_~#descriptor___1~0#1.base, saa7146_i2c_reset_~#descriptor___1~0#1.offset, 19, 0;havoc __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;__dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset := __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset;__dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset := __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;havoc __dynamic_pr_debug_#t~nondet691#1;__dynamic_pr_debug_#res#1 := __dynamic_pr_debug_#t~nondet691#1;havoc __dynamic_pr_debug_#t~nondet691#1; [2025-02-08 15:24:01,655 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4972: assume !(0 != saa7146_i2c_reset_~tmp___2~0#1); [2025-02-08 15:24:01,655 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5170-6: [2025-02-08 15:24:01,655 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4840-1: [2025-02-08 15:24:01,655 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4774: SAA7146_IER_ENABLE_#t~ret43#1.base, SAA7146_IER_ENABLE_#t~ret43#1.offset := spinlock_check_#res#1.base, spinlock_check_#res#1.offset;havoc spinlock_check_~lock#1.base, spinlock_check_~lock#1.offset;havoc spinlock_check_#in~lock#1.base, spinlock_check_#in~lock#1.offset;assume { :end_inline_spinlock_check } true;SAA7146_IER_ENABLE_~tmp~5#1.base, SAA7146_IER_ENABLE_~tmp~5#1.offset := SAA7146_IER_ENABLE_#t~ret43#1.base, SAA7146_IER_ENABLE_#t~ret43#1.offset;havoc SAA7146_IER_ENABLE_#t~ret43#1.base, SAA7146_IER_ENABLE_#t~ret43#1.offset;assume { :begin_inline__raw_spin_lock_irqsave } true;_raw_spin_lock_irqsave_#in~arg0#1.base, _raw_spin_lock_irqsave_#in~arg0#1.offset := SAA7146_IER_ENABLE_~tmp~5#1.base, SAA7146_IER_ENABLE_~tmp~5#1.offset;havoc _raw_spin_lock_irqsave_#res#1;havoc _raw_spin_lock_irqsave_#t~nondet693#1, _raw_spin_lock_irqsave_~arg0#1.base, _raw_spin_lock_irqsave_~arg0#1.offset;_raw_spin_lock_irqsave_~arg0#1.base, _raw_spin_lock_irqsave_~arg0#1.offset := _raw_spin_lock_irqsave_#in~arg0#1.base, _raw_spin_lock_irqsave_#in~arg0#1.offset;havoc _raw_spin_lock_irqsave_#t~nondet693#1;_raw_spin_lock_irqsave_#res#1 := _raw_spin_lock_irqsave_#t~nondet693#1;havoc _raw_spin_lock_irqsave_#t~nondet693#1; [2025-02-08 15:24:01,655 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4840-2: havoc saa7146_i2c_msg_prepare_#t~bitwise65#1;assume (saa7146_i2c_msg_prepare_#t~bitwise65#1 % 4294967296 >= saa7146_i2c_msg_prepare_#t~mem64#1 % 4294967296 && saa7146_i2c_msg_prepare_#t~bitwise65#1 % 4294967296 >= saa7146_i2c_msg_prepare_#t~bitwise63#1 % 4294967296) && saa7146_i2c_msg_prepare_#t~bitwise65#1 % 4294967296 <= saa7146_i2c_msg_prepare_#t~mem64#1 % 4294967296 + saa7146_i2c_msg_prepare_#t~bitwise63#1 % 4294967296; [2025-02-08 15:24:01,655 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5170-9: assume 0 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_writeout_#t~bitwise169#1 := 0; [2025-02-08 15:24:01,655 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5170-9: assume !(0 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,655 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4840: call write~int#5(saa7146_i2c_msg_prepare_#t~bitwise65#1, saa7146_i2c_msg_prepare_~op#1.base, saa7146_i2c_msg_prepare_~op#1.offset + 4 * (if saa7146_i2c_msg_prepare_~h1~0#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_msg_prepare_~h1~0#1 % 18446744073709551616 % 18446744073709551616 else saa7146_i2c_msg_prepare_~h1~0#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 4);havoc saa7146_i2c_msg_prepare_#t~mem64#1;havoc saa7146_i2c_msg_prepare_#t~mem61#1.base, saa7146_i2c_msg_prepare_#t~mem61#1.offset;havoc saa7146_i2c_msg_prepare_#t~mem62#1;havoc saa7146_i2c_msg_prepare_#t~bitwise63#1;havoc saa7146_i2c_msg_prepare_#t~bitwise65#1;call saa7146_i2c_msg_prepare_#t~mem67#1 := read~int#5(saa7146_i2c_msg_prepare_~op#1.base, saa7146_i2c_msg_prepare_~op#1.offset + 4 * (if saa7146_i2c_msg_prepare_~h1~0#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_msg_prepare_~h1~0#1 % 18446744073709551616 % 18446744073709551616 else saa7146_i2c_msg_prepare_~h1~0#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 4); [2025-02-08 15:24:01,655 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4840-5: [2025-02-08 15:24:01,655 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4840-6: havoc saa7146_i2c_msg_prepare_#t~bitwise63#1; [2025-02-08 15:24:01,655 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4774-1: SAA7146_IER_ENABLE_#t~ret43#1.base, SAA7146_IER_ENABLE_#t~ret43#1.offset := spinlock_check_#res#1.base, spinlock_check_#res#1.offset;havoc spinlock_check_~lock#1.base, spinlock_check_~lock#1.offset;havoc spinlock_check_#in~lock#1.base, spinlock_check_#in~lock#1.offset;assume { :end_inline_spinlock_check } true;SAA7146_IER_ENABLE_~tmp~5#1.base, SAA7146_IER_ENABLE_~tmp~5#1.offset := SAA7146_IER_ENABLE_#t~ret43#1.base, SAA7146_IER_ENABLE_#t~ret43#1.offset;havoc SAA7146_IER_ENABLE_#t~ret43#1.base, SAA7146_IER_ENABLE_#t~ret43#1.offset;assume { :begin_inline__raw_spin_lock_irqsave } true;_raw_spin_lock_irqsave_#in~arg0#1.base, _raw_spin_lock_irqsave_#in~arg0#1.offset := SAA7146_IER_ENABLE_~tmp~5#1.base, SAA7146_IER_ENABLE_~tmp~5#1.offset;havoc _raw_spin_lock_irqsave_#res#1;havoc _raw_spin_lock_irqsave_#t~nondet693#1, _raw_spin_lock_irqsave_~arg0#1.base, _raw_spin_lock_irqsave_~arg0#1.offset;_raw_spin_lock_irqsave_~arg0#1.base, _raw_spin_lock_irqsave_~arg0#1.offset := _raw_spin_lock_irqsave_#in~arg0#1.base, _raw_spin_lock_irqsave_#in~arg0#1.offset;havoc _raw_spin_lock_irqsave_#t~nondet693#1;_raw_spin_lock_irqsave_#res#1 := _raw_spin_lock_irqsave_#t~nondet693#1;havoc _raw_spin_lock_irqsave_#t~nondet693#1; [2025-02-08 15:24:01,655 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4840-3: assume 0 == saa7146_i2c_msg_prepare_#t~bitwise63#1 % 4294967296;saa7146_i2c_msg_prepare_#t~bitwise65#1 := saa7146_i2c_msg_prepare_#t~mem64#1; [2025-02-08 15:24:01,655 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4840-3: assume !(0 == saa7146_i2c_msg_prepare_#t~bitwise63#1 % 4294967296); [2025-02-08 15:24:01,656 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4840-4: assume 0 == saa7146_i2c_msg_prepare_#t~mem64#1 % 4294967296 || saa7146_i2c_msg_prepare_#t~mem64#1 % 4294967296 == saa7146_i2c_msg_prepare_#t~bitwise63#1 % 4294967296;saa7146_i2c_msg_prepare_#t~bitwise65#1 := saa7146_i2c_msg_prepare_#t~bitwise63#1; [2025-02-08 15:24:01,656 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4840-4: assume !(0 == saa7146_i2c_msg_prepare_#t~mem64#1 % 4294967296 || saa7146_i2c_msg_prepare_#t~mem64#1 % 4294967296 == saa7146_i2c_msg_prepare_#t~bitwise63#1 % 4294967296); [2025-02-08 15:24:01,656 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4840-7: assume 0 == saa7146_i2c_msg_prepare_#t~mem62#1 % 256 % 4294967296 || 0 == 8 * (3 - saa7146_i2c_msg_prepare_~h2~0#1);saa7146_i2c_msg_prepare_#t~bitwise63#1 := saa7146_i2c_msg_prepare_#t~mem62#1 % 256; [2025-02-08 15:24:01,656 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4840-7: assume !(0 == saa7146_i2c_msg_prepare_#t~mem62#1 % 256 % 4294967296 || 0 == 8 * (3 - saa7146_i2c_msg_prepare_~h2~0#1)); [2025-02-08 15:24:01,656 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5369: saa7146_i2c_transfer_#t~ret217#1 := ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;havoc ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1;assume { :end_inline_ldv__builtin_expect } true;saa7146_i2c_transfer_~tmp___2~2#1 := saa7146_i2c_transfer_#t~ret217#1;havoc saa7146_i2c_transfer_#t~mem216#1;havoc saa7146_i2c_transfer_#t~ret217#1; [2025-02-08 15:24:01,656 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5039: havoc SAA7146_IER_ENABLE_#t~ret43#1.base, SAA7146_IER_ENABLE_#t~ret43#1.offset, SAA7146_IER_ENABLE_#t~ret44#1, SAA7146_IER_ENABLE_#t~mem45#1.base, SAA7146_IER_ENABLE_#t~mem45#1.offset, SAA7146_IER_ENABLE_#t~ret46#1, SAA7146_IER_ENABLE_#t~bitwise47#1, SAA7146_IER_ENABLE_#t~mem48#1.base, SAA7146_IER_ENABLE_#t~mem48#1.offset, SAA7146_IER_ENABLE_~x#1.base, SAA7146_IER_ENABLE_~x#1.offset, SAA7146_IER_ENABLE_~y#1, SAA7146_IER_ENABLE_~flags~1#1, SAA7146_IER_ENABLE_~tmp~5#1.base, SAA7146_IER_ENABLE_~tmp~5#1.offset, SAA7146_IER_ENABLE_~tmp___0~2#1;havoc SAA7146_IER_ENABLE_#in~x#1.base, SAA7146_IER_ENABLE_#in~x#1.offset, SAA7146_IER_ENABLE_#in~y#1;assume { :end_inline_SAA7146_IER_ENABLE } true;call saa7146_i2c_writeout_#t~mem134#1.base, saa7146_i2c_writeout_#t~mem134#1.offset := read~$Pointer$#6(saa7146_i2c_writeout_~dev#1.base, 802 + saa7146_i2c_writeout_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := 65537, saa7146_i2c_writeout_#t~mem134#1.base, 256 + saa7146_i2c_writeout_#t~mem134#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,657 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5039-1: havoc SAA7146_IER_ENABLE_#t~ret43#1.base, SAA7146_IER_ENABLE_#t~ret43#1.offset, SAA7146_IER_ENABLE_#t~ret44#1, SAA7146_IER_ENABLE_#t~mem45#1.base, SAA7146_IER_ENABLE_#t~mem45#1.offset, SAA7146_IER_ENABLE_#t~ret46#1, SAA7146_IER_ENABLE_#t~bitwise47#1, SAA7146_IER_ENABLE_#t~mem48#1.base, SAA7146_IER_ENABLE_#t~mem48#1.offset, SAA7146_IER_ENABLE_~x#1.base, SAA7146_IER_ENABLE_~x#1.offset, SAA7146_IER_ENABLE_~y#1, SAA7146_IER_ENABLE_~flags~1#1, SAA7146_IER_ENABLE_~tmp~5#1.base, SAA7146_IER_ENABLE_~tmp~5#1.offset, SAA7146_IER_ENABLE_~tmp___0~2#1;havoc SAA7146_IER_ENABLE_#in~x#1.base, SAA7146_IER_ENABLE_#in~x#1.offset, SAA7146_IER_ENABLE_#in~y#1;assume { :end_inline_SAA7146_IER_ENABLE } true;call saa7146_i2c_writeout_#t~mem134#1.base, saa7146_i2c_writeout_#t~mem134#1.offset := read~$Pointer$#6(saa7146_i2c_writeout_~dev#1.base, 802 + saa7146_i2c_writeout_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := 65537, saa7146_i2c_writeout_#t~mem134#1.base, 256 + saa7146_i2c_writeout_#t~mem134#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,657 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4907: saa7146_i2c_reset_#t~ret82#1 := saa7146_i2c_status_#res#1;havoc saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset, saa7146_i2c_status_#t~ret50#1, saa7146_i2c_status_~dev#1.base, saa7146_i2c_status_~dev#1.offset, saa7146_i2c_status_~iicsta~0#1, saa7146_i2c_status_~tmp~6#1;havoc saa7146_i2c_status_#in~dev#1.base, saa7146_i2c_status_#in~dev#1.offset;assume { :end_inline_saa7146_i2c_status } true;saa7146_i2c_reset_~tmp~7#1 := saa7146_i2c_reset_#t~ret82#1;havoc saa7146_i2c_reset_#t~ret82#1;saa7146_i2c_reset_~status~0#1 := saa7146_i2c_reset_~tmp~7#1;call saa7146_i2c_reset_#t~mem83#1 := read~int#6(saa7146_i2c_reset_~dev#1.base, 1122 + saa7146_i2c_reset_~dev#1.offset, 4);call saa7146_i2c_reset_#t~mem84#1.base, saa7146_i2c_reset_#t~mem84#1.offset := read~$Pointer$#6(saa7146_i2c_reset_~dev#1.base, 802 + saa7146_i2c_reset_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := saa7146_i2c_reset_#t~mem83#1, saa7146_i2c_reset_#t~mem84#1.base, 144 + saa7146_i2c_reset_#t~mem84#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,657 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4907-1: saa7146_i2c_reset_#t~ret82#1 := saa7146_i2c_status_#res#1;havoc saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset, saa7146_i2c_status_#t~ret50#1, saa7146_i2c_status_~dev#1.base, saa7146_i2c_status_~dev#1.offset, saa7146_i2c_status_~iicsta~0#1, saa7146_i2c_status_~tmp~6#1;havoc saa7146_i2c_status_#in~dev#1.base, saa7146_i2c_status_#in~dev#1.offset;assume { :end_inline_saa7146_i2c_status } true;saa7146_i2c_reset_~tmp~7#1 := saa7146_i2c_reset_#t~ret82#1;havoc saa7146_i2c_reset_#t~ret82#1;saa7146_i2c_reset_~status~0#1 := saa7146_i2c_reset_~tmp~7#1;call saa7146_i2c_reset_#t~mem83#1 := read~int#6(saa7146_i2c_reset_~dev#1.base, 1122 + saa7146_i2c_reset_~dev#1.offset, 4);call saa7146_i2c_reset_#t~mem84#1.base, saa7146_i2c_reset_#t~mem84#1.offset := read~$Pointer$#6(saa7146_i2c_reset_~dev#1.base, 802 + saa7146_i2c_reset_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := saa7146_i2c_reset_#t~mem83#1, saa7146_i2c_reset_#t~mem84#1.base, 144 + saa7146_i2c_reset_#t~mem84#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,657 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7021: havoc ldv_mutex_lock_interruptible_i2c_lock_of_saa7146_dev_#t~nondet666#1;ldv_mutex_lock_interruptible_i2c_lock_of_saa7146_dev_~nondetermined~0#1 := ldv_mutex_lock_interruptible_i2c_lock_of_saa7146_dev_#t~nondet666#1;havoc ldv_mutex_lock_interruptible_i2c_lock_of_saa7146_dev_#t~nondet666#1; [2025-02-08 15:24:01,657 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4841-2: havoc saa7146_i2c_msg_prepare_#t~bitwise68#1;assume (saa7146_i2c_msg_prepare_#t~bitwise68#1 % 4294967296 >= saa7146_i2c_msg_prepare_#t~mem67#1 % 4294967296 && saa7146_i2c_msg_prepare_#t~bitwise68#1 % 4294967296 >= saa7146_i2c_msg_prepare_#t~bitwise66#1 % 4294967296) && saa7146_i2c_msg_prepare_#t~bitwise68#1 % 4294967296 <= saa7146_i2c_msg_prepare_#t~mem67#1 % 4294967296 + saa7146_i2c_msg_prepare_#t~bitwise66#1 % 4294967296; [2025-02-08 15:24:01,657 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4841-3: assume 0 == saa7146_i2c_msg_prepare_#t~bitwise66#1 % 4294967296;saa7146_i2c_msg_prepare_#t~bitwise68#1 := saa7146_i2c_msg_prepare_#t~mem67#1; [2025-02-08 15:24:01,657 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4841-3: assume !(0 == saa7146_i2c_msg_prepare_#t~bitwise66#1 % 4294967296); [2025-02-08 15:24:01,657 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4841: call write~int#5(saa7146_i2c_msg_prepare_#t~bitwise68#1, saa7146_i2c_msg_prepare_~op#1.base, saa7146_i2c_msg_prepare_~op#1.offset + 4 * (if saa7146_i2c_msg_prepare_~h1~0#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_msg_prepare_~h1~0#1 % 18446744073709551616 % 18446744073709551616 else saa7146_i2c_msg_prepare_~h1~0#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 4);havoc saa7146_i2c_msg_prepare_#t~mem67#1;havoc saa7146_i2c_msg_prepare_#t~bitwise66#1;havoc saa7146_i2c_msg_prepare_#t~bitwise68#1;saa7146_i2c_msg_prepare_~op_count~0#1 := 1 + saa7146_i2c_msg_prepare_~op_count~0#1;saa7146_i2c_msg_prepare_~j~0#1 := 1 + saa7146_i2c_msg_prepare_~j~0#1;call saa7146_i2c_msg_prepare_#t~mem69#1 := read~int#11(saa7146_i2c_msg_prepare_~m#1.base, 4 + (saa7146_i2c_msg_prepare_~m#1.offset + 14 * (if saa7146_i2c_msg_prepare_~i~0#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_msg_prepare_~i~0#1 % 18446744073709551616 % 18446744073709551616 else saa7146_i2c_msg_prepare_~i~0#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616)), 2); [2025-02-08 15:24:01,657 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4841-1: [2025-02-08 15:24:01,657 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4841-6: havoc saa7146_i2c_msg_prepare_#t~bitwise66#1;assume saa7146_i2c_msg_prepare_#t~bitwise66#1 > 2; [2025-02-08 15:24:01,657 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4841-7: assume 0 == 2 * (3 - saa7146_i2c_msg_prepare_~h2~0#1);saa7146_i2c_msg_prepare_#t~bitwise66#1 := 2; [2025-02-08 15:24:01,657 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4841-7: assume !(0 == 2 * (3 - saa7146_i2c_msg_prepare_~h2~0#1)); [2025-02-08 15:24:01,657 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4841-4: assume 0 == saa7146_i2c_msg_prepare_#t~mem67#1 % 4294967296 || saa7146_i2c_msg_prepare_#t~mem67#1 % 4294967296 == saa7146_i2c_msg_prepare_#t~bitwise66#1 % 4294967296;saa7146_i2c_msg_prepare_#t~bitwise68#1 := saa7146_i2c_msg_prepare_#t~bitwise66#1; [2025-02-08 15:24:01,657 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4841-4: assume !(0 == saa7146_i2c_msg_prepare_#t~mem67#1 % 4294967296 || saa7146_i2c_msg_prepare_#t~mem67#1 % 4294967296 == saa7146_i2c_msg_prepare_#t~bitwise66#1 % 4294967296); [2025-02-08 15:24:01,657 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4841-5: [2025-02-08 15:24:01,657 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5370: assume 0 != saa7146_i2c_transfer_~tmp___2~2#1;assume { :begin_inline___dynamic_pr_debug } true;__dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset := saa7146_i2c_transfer_~#descriptor___1~2#1.base, saa7146_i2c_transfer_~#descriptor___1~2#1.offset, 91, 0;havoc __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;__dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset := __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset;__dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset := __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;havoc __dynamic_pr_debug_#t~nondet691#1;__dynamic_pr_debug_#res#1 := __dynamic_pr_debug_#t~nondet691#1;havoc __dynamic_pr_debug_#t~nondet691#1; [2025-02-08 15:24:01,657 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5370: assume !(0 != saa7146_i2c_transfer_~tmp___2~2#1); [2025-02-08 15:24:01,657 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5436: saa7146_i2c_transfer_#t~ret226#1 := ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;havoc ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1;assume { :end_inline_ldv__builtin_expect } true;saa7146_i2c_transfer_~tmp___6~1#1 := saa7146_i2c_transfer_#t~ret226#1;havoc saa7146_i2c_transfer_#t~mem225#1;havoc saa7146_i2c_transfer_#t~ret226#1; [2025-02-08 15:24:01,658 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5040-1: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_writeout_#t~mem134#1.base, saa7146_i2c_writeout_#t~mem134#1.offset;saa7146_i2c_writeout_~timeout~0#1 := 3;saa7146_i2c_writeout_~__ret~0#1 := (if saa7146_i2c_writeout_~timeout~0#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_writeout_~timeout~0#1 % 18446744073709551616 % 18446744073709551616 else saa7146_i2c_writeout_~timeout~0#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);call saa7146_i2c_writeout_#t~mem135#1 := read~int#6(saa7146_i2c_writeout_~dev#1.base, 1226 + saa7146_i2c_writeout_~dev#1.offset, 4); [2025-02-08 15:24:01,658 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7022: assume 0 != ldv_mutex_lock_interruptible_i2c_lock_of_saa7146_dev_~nondetermined~0#1;~ldv_mutex_i2c_lock_of_saa7146_dev~0 := 2;ldv_mutex_lock_interruptible_i2c_lock_of_saa7146_dev_#res#1 := 0; [2025-02-08 15:24:01,658 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7022: assume !(0 != ldv_mutex_lock_interruptible_i2c_lock_of_saa7146_dev_~nondetermined~0#1);ldv_mutex_lock_interruptible_i2c_lock_of_saa7146_dev_#res#1 := -4; [2025-02-08 15:24:01,658 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5040: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_writeout_#t~mem134#1.base, saa7146_i2c_writeout_#t~mem134#1.offset;saa7146_i2c_writeout_~timeout~0#1 := 3;saa7146_i2c_writeout_~__ret~0#1 := (if saa7146_i2c_writeout_~timeout~0#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_writeout_~timeout~0#1 % 18446744073709551616 % 18446744073709551616 else saa7146_i2c_writeout_~timeout~0#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616);call saa7146_i2c_writeout_#t~mem135#1 := read~int#6(saa7146_i2c_writeout_~dev#1.base, 1226 + saa7146_i2c_writeout_~dev#1.offset, 4); [2025-02-08 15:24:01,658 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4776-1: SAA7146_IER_ENABLE_#t~ret46#1 := readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;havoc readl_#in~addr#1.base, readl_#in~addr#1.offset;assume { :end_inline_readl } true;SAA7146_IER_ENABLE_~tmp___0~2#1 := SAA7146_IER_ENABLE_#t~ret46#1;havoc SAA7146_IER_ENABLE_#t~mem45#1.base, SAA7146_IER_ENABLE_#t~mem45#1.offset;havoc SAA7146_IER_ENABLE_#t~ret46#1; [2025-02-08 15:24:01,658 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4776: SAA7146_IER_ENABLE_#t~ret46#1 := readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;havoc readl_#in~addr#1.base, readl_#in~addr#1.offset;assume { :end_inline_readl } true;SAA7146_IER_ENABLE_~tmp___0~2#1 := SAA7146_IER_ENABLE_#t~ret46#1;havoc SAA7146_IER_ENABLE_#t~mem45#1.base, SAA7146_IER_ENABLE_#t~mem45#1.offset;havoc SAA7146_IER_ENABLE_#t~ret46#1; [2025-02-08 15:24:01,658 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5437: assume 0 != saa7146_i2c_transfer_~tmp___6~1#1;assume { :begin_inline___dynamic_pr_debug } true;__dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset := saa7146_i2c_transfer_~#descriptor___3~1#1.base, saa7146_i2c_transfer_~#descriptor___3~1#1.offset, 103, 0;havoc __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;__dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset := __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset;__dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset := __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;havoc __dynamic_pr_debug_#t~nondet691#1;__dynamic_pr_debug_#res#1 := __dynamic_pr_debug_#t~nondet691#1;havoc __dynamic_pr_debug_#t~nondet691#1; [2025-02-08 15:24:01,659 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5437: assume !(0 != saa7146_i2c_transfer_~tmp___6~1#1); [2025-02-08 15:24:01,659 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5239-1: saa7146_i2c_writeout_#res#1 := -121;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset);havoc saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset; [2025-02-08 15:24:01,659 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5239-3: saa7146_i2c_writeout_#res#1 := -121;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset);havoc saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset; [2025-02-08 15:24:01,659 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4909: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_reset_#t~mem83#1;havoc saa7146_i2c_reset_#t~mem84#1.base, saa7146_i2c_reset_#t~mem84#1.offset;call saa7146_i2c_reset_#t~mem85#1.base, saa7146_i2c_reset_#t~mem85#1.offset := read~$Pointer$#6(saa7146_i2c_reset_~dev#1.base, 802 + saa7146_i2c_reset_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := 0, saa7146_i2c_reset_#t~mem85#1.base, 140 + saa7146_i2c_reset_#t~mem85#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,659 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4909-1: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_reset_#t~mem83#1;havoc saa7146_i2c_reset_#t~mem84#1.base, saa7146_i2c_reset_#t~mem84#1.offset;call saa7146_i2c_reset_#t~mem85#1.base, saa7146_i2c_reset_#t~mem85#1.offset := read~$Pointer$#6(saa7146_i2c_reset_~dev#1.base, 802 + saa7146_i2c_reset_~dev#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := 0, saa7146_i2c_reset_#t~mem85#1.base, 140 + saa7146_i2c_reset_#t~mem85#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,659 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4777-2: [2025-02-08 15:24:01,659 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4777-3: havoc SAA7146_IER_ENABLE_#t~bitwise47#1;assume (SAA7146_IER_ENABLE_#t~bitwise47#1 % 4294967296 >= SAA7146_IER_ENABLE_~tmp___0~2#1 % 4294967296 && SAA7146_IER_ENABLE_#t~bitwise47#1 % 4294967296 >= SAA7146_IER_ENABLE_~y#1 % 4294967296) && SAA7146_IER_ENABLE_#t~bitwise47#1 % 4294967296 <= SAA7146_IER_ENABLE_~tmp___0~2#1 % 4294967296 + SAA7146_IER_ENABLE_~y#1 % 4294967296; [2025-02-08 15:24:01,659 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4777: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc SAA7146_IER_ENABLE_#t~bitwise47#1;havoc SAA7146_IER_ENABLE_#t~mem48#1.base, SAA7146_IER_ENABLE_#t~mem48#1.offset;assume { :begin_inline_spin_unlock_irqrestore } true;spin_unlock_irqrestore_#in~lock#1.base, spin_unlock_irqrestore_#in~lock#1.offset, spin_unlock_irqrestore_#in~flags#1 := SAA7146_IER_ENABLE_~x#1.base, 858 + SAA7146_IER_ENABLE_~x#1.offset, SAA7146_IER_ENABLE_~flags~1#1;havoc spin_unlock_irqrestore_~lock#1.base, spin_unlock_irqrestore_~lock#1.offset, spin_unlock_irqrestore_~flags#1;spin_unlock_irqrestore_~lock#1.base, spin_unlock_irqrestore_~lock#1.offset := spin_unlock_irqrestore_#in~lock#1.base, spin_unlock_irqrestore_#in~lock#1.offset;spin_unlock_irqrestore_~flags#1 := spin_unlock_irqrestore_#in~flags#1;assume { :begin_inline__raw_spin_unlock_irqrestore } true;_raw_spin_unlock_irqrestore_#in~arg0#1.base, _raw_spin_unlock_irqrestore_#in~arg0#1.offset, _raw_spin_unlock_irqrestore_#in~arg1#1 := spin_unlock_irqrestore_~lock#1.base, spin_unlock_irqrestore_~lock#1.offset, spin_unlock_irqrestore_~flags#1;havoc _raw_spin_unlock_irqrestore_~arg0#1.base, _raw_spin_unlock_irqrestore_~arg0#1.offset, _raw_spin_unlock_irqrestore_~arg1#1;_raw_spin_unlock_irqrestore_~arg0#1.base, _raw_spin_unlock_irqrestore_~arg0#1.offset := _raw_spin_unlock_irqrestore_#in~arg0#1.base, _raw_spin_unlock_irqrestore_#in~arg0#1.offset;_raw_spin_unlock_irqrestore_~arg1#1 := _raw_spin_unlock_irqrestore_#in~arg1#1; [2025-02-08 15:24:01,659 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4777-1: call SAA7146_IER_ENABLE_#t~mem48#1.base, SAA7146_IER_ENABLE_#t~mem48#1.offset := read~$Pointer$#6(SAA7146_IER_ENABLE_~x#1.base, 802 + SAA7146_IER_ENABLE_~x#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := SAA7146_IER_ENABLE_#t~bitwise47#1, SAA7146_IER_ENABLE_#t~mem48#1.base, 220 + SAA7146_IER_ENABLE_#t~mem48#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,659 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4777-6: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc SAA7146_IER_ENABLE_#t~bitwise47#1;havoc SAA7146_IER_ENABLE_#t~mem48#1.base, SAA7146_IER_ENABLE_#t~mem48#1.offset;assume { :begin_inline_spin_unlock_irqrestore } true;spin_unlock_irqrestore_#in~lock#1.base, spin_unlock_irqrestore_#in~lock#1.offset, spin_unlock_irqrestore_#in~flags#1 := SAA7146_IER_ENABLE_~x#1.base, 858 + SAA7146_IER_ENABLE_~x#1.offset, SAA7146_IER_ENABLE_~flags~1#1;havoc spin_unlock_irqrestore_~lock#1.base, spin_unlock_irqrestore_~lock#1.offset, spin_unlock_irqrestore_~flags#1;spin_unlock_irqrestore_~lock#1.base, spin_unlock_irqrestore_~lock#1.offset := spin_unlock_irqrestore_#in~lock#1.base, spin_unlock_irqrestore_#in~lock#1.offset;spin_unlock_irqrestore_~flags#1 := spin_unlock_irqrestore_#in~flags#1;assume { :begin_inline__raw_spin_unlock_irqrestore } true;_raw_spin_unlock_irqrestore_#in~arg0#1.base, _raw_spin_unlock_irqrestore_#in~arg0#1.offset, _raw_spin_unlock_irqrestore_#in~arg1#1 := spin_unlock_irqrestore_~lock#1.base, spin_unlock_irqrestore_~lock#1.offset, spin_unlock_irqrestore_~flags#1;havoc _raw_spin_unlock_irqrestore_~arg0#1.base, _raw_spin_unlock_irqrestore_~arg0#1.offset, _raw_spin_unlock_irqrestore_~arg1#1;_raw_spin_unlock_irqrestore_~arg0#1.base, _raw_spin_unlock_irqrestore_~arg0#1.offset := _raw_spin_unlock_irqrestore_#in~arg0#1.base, _raw_spin_unlock_irqrestore_#in~arg0#1.offset;_raw_spin_unlock_irqrestore_~arg1#1 := _raw_spin_unlock_irqrestore_#in~arg1#1; [2025-02-08 15:24:01,659 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4777-7: call SAA7146_IER_ENABLE_#t~mem48#1.base, SAA7146_IER_ENABLE_#t~mem48#1.offset := read~$Pointer$#6(SAA7146_IER_ENABLE_~x#1.base, 802 + SAA7146_IER_ENABLE_~x#1.offset, 8);assume { :begin_inline_writel } true;writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset := SAA7146_IER_ENABLE_#t~bitwise47#1, SAA7146_IER_ENABLE_#t~mem48#1.base, 220 + SAA7146_IER_ENABLE_#t~mem48#1.offset;havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;writel_~val#1 := writel_#in~val#1;writel_~addr#1.base, writel_~addr#1.offset := writel_#in~addr#1.base, writel_#in~addr#1.offset; [2025-02-08 15:24:01,659 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4777-4: assume 0 == SAA7146_IER_ENABLE_~y#1 % 4294967296;SAA7146_IER_ENABLE_#t~bitwise47#1 := SAA7146_IER_ENABLE_~tmp___0~2#1; [2025-02-08 15:24:01,659 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4777-4: assume !(0 == SAA7146_IER_ENABLE_~y#1 % 4294967296); [2025-02-08 15:24:01,660 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4777-5: assume 0 == SAA7146_IER_ENABLE_~tmp___0~2#1 % 4294967296 || SAA7146_IER_ENABLE_~tmp___0~2#1 % 4294967296 == SAA7146_IER_ENABLE_~y#1 % 4294967296;SAA7146_IER_ENABLE_#t~bitwise47#1 := SAA7146_IER_ENABLE_~y#1; [2025-02-08 15:24:01,660 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4777-5: assume !(0 == SAA7146_IER_ENABLE_~tmp___0~2#1 % 4294967296 || SAA7146_IER_ENABLE_~tmp___0~2#1 % 4294967296 == SAA7146_IER_ENABLE_~y#1 % 4294967296); [2025-02-08 15:24:01,660 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4777-10: assume 0 == SAA7146_IER_ENABLE_~y#1 % 4294967296;SAA7146_IER_ENABLE_#t~bitwise47#1 := SAA7146_IER_ENABLE_~tmp___0~2#1; [2025-02-08 15:24:01,660 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4777-10: assume !(0 == SAA7146_IER_ENABLE_~y#1 % 4294967296); [2025-02-08 15:24:01,660 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4777-11: assume 0 == SAA7146_IER_ENABLE_~tmp___0~2#1 % 4294967296 || SAA7146_IER_ENABLE_~tmp___0~2#1 % 4294967296 == SAA7146_IER_ENABLE_~y#1 % 4294967296;SAA7146_IER_ENABLE_#t~bitwise47#1 := SAA7146_IER_ENABLE_~y#1; [2025-02-08 15:24:01,660 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4777-11: assume !(0 == SAA7146_IER_ENABLE_~tmp___0~2#1 % 4294967296 || SAA7146_IER_ENABLE_~tmp___0~2#1 % 4294967296 == SAA7146_IER_ENABLE_~y#1 % 4294967296); [2025-02-08 15:24:01,660 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4777-8: [2025-02-08 15:24:01,660 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4777-9: havoc SAA7146_IER_ENABLE_#t~bitwise47#1;assume (SAA7146_IER_ENABLE_#t~bitwise47#1 % 4294967296 >= SAA7146_IER_ENABLE_~tmp___0~2#1 % 4294967296 && SAA7146_IER_ENABLE_#t~bitwise47#1 % 4294967296 >= SAA7146_IER_ENABLE_~y#1 % 4294967296) && SAA7146_IER_ENABLE_#t~bitwise47#1 % 4294967296 <= SAA7146_IER_ENABLE_~tmp___0~2#1 % 4294967296 + SAA7146_IER_ENABLE_~y#1 % 4294967296; [2025-02-08 15:24:01,660 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4910: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_reset_#t~mem85#1.base, saa7146_i2c_reset_#t~mem85#1.offset; [2025-02-08 15:24:01,660 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4778: havoc spin_unlock_irqrestore_~lock#1.base, spin_unlock_irqrestore_~lock#1.offset, spin_unlock_irqrestore_~flags#1;havoc spin_unlock_irqrestore_#in~lock#1.base, spin_unlock_irqrestore_#in~lock#1.offset, spin_unlock_irqrestore_#in~flags#1;assume { :end_inline_spin_unlock_irqrestore } true; [2025-02-08 15:24:01,660 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4910-1: havoc writel_~val#1, writel_~addr#1.base, writel_~addr#1.offset;havoc writel_#in~val#1, writel_#in~addr#1.base, writel_#in~addr#1.offset;assume { :end_inline_writel } true;havoc saa7146_i2c_reset_#t~mem85#1.base, saa7146_i2c_reset_#t~mem85#1.offset; [2025-02-08 15:24:01,660 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4712-1: test_tsk_thread_flag_#t~ret30#1 := test_ti_thread_flag_#res#1;havoc test_ti_thread_flag_#t~ret12#1, test_ti_thread_flag_~ti#1.base, test_ti_thread_flag_~ti#1.offset, test_ti_thread_flag_~flag#1, test_ti_thread_flag_~tmp~0#1;havoc test_ti_thread_flag_#in~ti#1.base, test_ti_thread_flag_#in~ti#1.offset, test_ti_thread_flag_#in~flag#1;assume { :end_inline_test_ti_thread_flag } true;test_tsk_thread_flag_~tmp~1#1 := test_tsk_thread_flag_#t~ret30#1;havoc test_tsk_thread_flag_#t~mem29#1.base, test_tsk_thread_flag_#t~mem29#1.offset;havoc test_tsk_thread_flag_#t~ret30#1;test_tsk_thread_flag_#res#1 := test_tsk_thread_flag_~tmp~1#1; [2025-02-08 15:24:01,660 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4778-1: havoc spin_unlock_irqrestore_~lock#1.base, spin_unlock_irqrestore_~lock#1.offset, spin_unlock_irqrestore_~flags#1;havoc spin_unlock_irqrestore_#in~lock#1.base, spin_unlock_irqrestore_#in~lock#1.offset, spin_unlock_irqrestore_#in~flags#1;assume { :end_inline_spin_unlock_irqrestore } true; [2025-02-08 15:24:01,660 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4712: test_tsk_thread_flag_#t~ret30#1 := test_ti_thread_flag_#res#1;havoc test_ti_thread_flag_#t~ret12#1, test_ti_thread_flag_~ti#1.base, test_ti_thread_flag_~ti#1.offset, test_ti_thread_flag_~flag#1, test_ti_thread_flag_~tmp~0#1;havoc test_ti_thread_flag_#in~ti#1.base, test_ti_thread_flag_#in~ti#1.offset, test_ti_thread_flag_#in~flag#1;assume { :end_inline_test_ti_thread_flag } true;test_tsk_thread_flag_~tmp~1#1 := test_tsk_thread_flag_#t~ret30#1;havoc test_tsk_thread_flag_#t~mem29#1.base, test_tsk_thread_flag_#t~mem29#1.offset;havoc test_tsk_thread_flag_#t~ret30#1;test_tsk_thread_flag_#res#1 := test_tsk_thread_flag_~tmp~1#1; [2025-02-08 15:24:01,661 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5043: assume 0 != saa7146_i2c_writeout_#t~mem135#1;havoc saa7146_i2c_writeout_#t~mem135#1;assume { :begin_inline_get_current } true;havoc get_current_#res#1.base, get_current_#res#1.offset;havoc get_current_#t~switch4#1, get_current_~pfo_ret__~0#1.base, get_current_~pfo_ret__~0#1.offset;havoc get_current_~pfo_ret__~0#1.base, get_current_~pfo_ret__~0#1.offset;get_current_#t~switch4#1 := false; [2025-02-08 15:24:01,661 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5043: assume !(0 != saa7146_i2c_writeout_#t~mem135#1);havoc saa7146_i2c_writeout_#t~mem135#1; [2025-02-08 15:24:01,661 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5043-1: assume 0 != saa7146_i2c_writeout_#t~mem135#1;havoc saa7146_i2c_writeout_#t~mem135#1;assume { :begin_inline_get_current } true;havoc get_current_#res#1.base, get_current_#res#1.offset;havoc get_current_#t~switch4#1, get_current_~pfo_ret__~0#1.base, get_current_~pfo_ret__~0#1.offset;havoc get_current_~pfo_ret__~0#1.base, get_current_~pfo_ret__~0#1.offset;get_current_#t~switch4#1 := false; [2025-02-08 15:24:01,661 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5043-1: assume !(0 != saa7146_i2c_writeout_#t~mem135#1);havoc saa7146_i2c_writeout_#t~mem135#1; [2025-02-08 15:24:01,661 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5109: saa7146_i2c_writeout_~timeout~0#1 := 3 + ~jiffies~0;assume { :begin_inline_saa7146_i2c_status } true;saa7146_i2c_status_#in~dev#1.base, saa7146_i2c_status_#in~dev#1.offset := saa7146_i2c_writeout_~dev#1.base, saa7146_i2c_writeout_~dev#1.offset;havoc saa7146_i2c_status_#res#1;havoc saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset, saa7146_i2c_status_#t~ret50#1, saa7146_i2c_status_~dev#1.base, saa7146_i2c_status_~dev#1.offset, saa7146_i2c_status_~iicsta~0#1, saa7146_i2c_status_~tmp~6#1;saa7146_i2c_status_~dev#1.base, saa7146_i2c_status_~dev#1.offset := saa7146_i2c_status_#in~dev#1.base, saa7146_i2c_status_#in~dev#1.offset;havoc saa7146_i2c_status_~iicsta~0#1;havoc saa7146_i2c_status_~tmp~6#1;call saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset := read~$Pointer$#6(saa7146_i2c_status_~dev#1.base, 802 + saa7146_i2c_status_~dev#1.offset, 8);assume { :begin_inline_readl } true;readl_#in~addr#1.base, readl_#in~addr#1.offset := saa7146_i2c_status_#t~mem49#1.base, 144 + saa7146_i2c_status_#t~mem49#1.offset;havoc readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;readl_~addr#1.base, readl_~addr#1.offset := readl_#in~addr#1.base, readl_#in~addr#1.offset;havoc readl_~ret~0#1;readl_#res#1 := readl_~ret~0#1; [2025-02-08 15:24:01,661 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5109-1: saa7146_i2c_writeout_~timeout~0#1 := 3 + ~jiffies~0;assume { :begin_inline_saa7146_i2c_status } true;saa7146_i2c_status_#in~dev#1.base, saa7146_i2c_status_#in~dev#1.offset := saa7146_i2c_writeout_~dev#1.base, saa7146_i2c_writeout_~dev#1.offset;havoc saa7146_i2c_status_#res#1;havoc saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset, saa7146_i2c_status_#t~ret50#1, saa7146_i2c_status_~dev#1.base, saa7146_i2c_status_~dev#1.offset, saa7146_i2c_status_~iicsta~0#1, saa7146_i2c_status_~tmp~6#1;saa7146_i2c_status_~dev#1.base, saa7146_i2c_status_~dev#1.offset := saa7146_i2c_status_#in~dev#1.base, saa7146_i2c_status_#in~dev#1.offset;havoc saa7146_i2c_status_~iicsta~0#1;havoc saa7146_i2c_status_~tmp~6#1;call saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset := read~$Pointer$#6(saa7146_i2c_status_~dev#1.base, 802 + saa7146_i2c_status_~dev#1.offset, 8);assume { :begin_inline_readl } true;readl_#in~addr#1.base, readl_#in~addr#1.offset := saa7146_i2c_status_#t~mem49#1.base, 144 + saa7146_i2c_status_#t~mem49#1.offset;havoc readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;readl_~addr#1.base, readl_~addr#1.offset := readl_#in~addr#1.base, readl_#in~addr#1.offset;havoc readl_~ret~0#1;readl_#res#1 := readl_~ret~0#1; [2025-02-08 15:24:01,661 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4911: assume 0 != (if saa7146_i2c_reset_~status~0#1 % 4294967296 % 4294967296 <= 2147483647 then saa7146_i2c_reset_~status~0#1 % 4294967296 % 4294967296 else saa7146_i2c_reset_~status~0#1 % 4294967296 % 4294967296 - 4294967296) % 2; [2025-02-08 15:24:01,661 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4911: assume !(0 != (if saa7146_i2c_reset_~status~0#1 % 4294967296 % 4294967296 <= 2147483647 then saa7146_i2c_reset_~status~0#1 % 4294967296 % 4294967296 else saa7146_i2c_reset_~status~0#1 % 4294967296 % 4294967296 - 4294967296) % 2); [2025-02-08 15:24:01,661 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4911-1: assume 0 != (if saa7146_i2c_reset_~status~0#1 % 4294967296 % 4294967296 <= 2147483647 then saa7146_i2c_reset_~status~0#1 % 4294967296 % 4294967296 else saa7146_i2c_reset_~status~0#1 % 4294967296 % 4294967296 - 4294967296) % 2; [2025-02-08 15:24:01,661 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4911-1: assume !(0 != (if saa7146_i2c_reset_~status~0#1 % 4294967296 % 4294967296 <= 2147483647 then saa7146_i2c_reset_~status~0#1 % 4294967296 % 4294967296 else saa7146_i2c_reset_~status~0#1 % 4294967296 % 4294967296 - 4294967296) % 2); [2025-02-08 15:24:01,661 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4845: assume (if saa7146_i2c_msg_prepare_#t~mem69#1 % 65536 % 4294967296 <= 2147483647 then saa7146_i2c_msg_prepare_#t~mem69#1 % 65536 % 4294967296 else saa7146_i2c_msg_prepare_#t~mem69#1 % 65536 % 4294967296 - 4294967296) > saa7146_i2c_msg_prepare_~j~0#1;havoc saa7146_i2c_msg_prepare_#t~mem69#1; [2025-02-08 15:24:01,661 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4845: assume !((if saa7146_i2c_msg_prepare_#t~mem69#1 % 65536 % 4294967296 <= 2147483647 then saa7146_i2c_msg_prepare_#t~mem69#1 % 65536 % 4294967296 else saa7146_i2c_msg_prepare_#t~mem69#1 % 65536 % 4294967296 - 4294967296) > saa7146_i2c_msg_prepare_~j~0#1);havoc saa7146_i2c_msg_prepare_#t~mem69#1;saa7146_i2c_msg_prepare_~i~0#1 := 1 + saa7146_i2c_msg_prepare_~i~0#1; [2025-02-08 15:24:01,661 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5308: saa7146_i2c_transfer_#t~ret199#1 := ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;havoc ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1;assume { :end_inline_ldv__builtin_expect } true;saa7146_i2c_transfer_~tmp___0~5#1 := saa7146_i2c_transfer_#t~ret199#1;havoc saa7146_i2c_transfer_#t~mem198#1;havoc saa7146_i2c_transfer_#t~ret199#1; [2025-02-08 15:24:01,661 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5110: saa7146_i2c_writeout_#t~ret155#1 := saa7146_i2c_status_#res#1;havoc saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset, saa7146_i2c_status_#t~ret50#1, saa7146_i2c_status_~dev#1.base, saa7146_i2c_status_~dev#1.offset, saa7146_i2c_status_~iicsta~0#1, saa7146_i2c_status_~tmp~6#1;havoc saa7146_i2c_status_#in~dev#1.base, saa7146_i2c_status_#in~dev#1.offset;assume { :end_inline_saa7146_i2c_status } true;havoc saa7146_i2c_writeout_#t~ret155#1;assume { :begin_inline_saa7146_i2c_status } true;saa7146_i2c_status_#in~dev#1.base, saa7146_i2c_status_#in~dev#1.offset := saa7146_i2c_writeout_~dev#1.base, saa7146_i2c_writeout_~dev#1.offset;havoc saa7146_i2c_status_#res#1;havoc saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset, saa7146_i2c_status_#t~ret50#1, saa7146_i2c_status_~dev#1.base, saa7146_i2c_status_~dev#1.offset, saa7146_i2c_status_~iicsta~0#1, saa7146_i2c_status_~tmp~6#1;saa7146_i2c_status_~dev#1.base, saa7146_i2c_status_~dev#1.offset := saa7146_i2c_status_#in~dev#1.base, saa7146_i2c_status_#in~dev#1.offset;havoc saa7146_i2c_status_~iicsta~0#1;havoc saa7146_i2c_status_~tmp~6#1;call saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset := read~$Pointer$#6(saa7146_i2c_status_~dev#1.base, 802 + saa7146_i2c_status_~dev#1.offset, 8);assume { :begin_inline_readl } true;readl_#in~addr#1.base, readl_#in~addr#1.offset := saa7146_i2c_status_#t~mem49#1.base, 144 + saa7146_i2c_status_#t~mem49#1.offset;havoc readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;readl_~addr#1.base, readl_~addr#1.offset := readl_#in~addr#1.base, readl_#in~addr#1.offset;havoc readl_~ret~0#1;readl_#res#1 := readl_~ret~0#1; [2025-02-08 15:24:01,661 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5044-1: saa7146_i2c_writeout_#t~ret136#1.base, saa7146_i2c_writeout_#t~ret136#1.offset := get_current_#res#1.base, get_current_#res#1.offset;havoc get_current_#t~switch4#1, get_current_~pfo_ret__~0#1.base, get_current_~pfo_ret__~0#1.offset;assume { :end_inline_get_current } true;saa7146_i2c_writeout_~tmp___1~1#1.base, saa7146_i2c_writeout_~tmp___1~1#1.offset := saa7146_i2c_writeout_#t~ret136#1.base, saa7146_i2c_writeout_#t~ret136#1.offset;havoc saa7146_i2c_writeout_#t~ret136#1.base, saa7146_i2c_writeout_#t~ret136#1.offset;call write~int#21(0, saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset, 4);call write~$Pointer$#21(saa7146_i2c_writeout_~tmp___1~1#1.base, saa7146_i2c_writeout_~tmp___1~1#1.offset, saa7146_i2c_writeout_~#__wait~0#1.base, 4 + saa7146_i2c_writeout_~#__wait~0#1.offset, 8);call write~$Pointer$#21(#funAddr~autoremove_wake_function.base, #funAddr~autoremove_wake_function.offset, saa7146_i2c_writeout_~#__wait~0#1.base, 12 + saa7146_i2c_writeout_~#__wait~0#1.offset, 8);call write~$Pointer$#21(saa7146_i2c_writeout_~#__wait~0#1.base, 20 + saa7146_i2c_writeout_~#__wait~0#1.offset, saa7146_i2c_writeout_~#__wait~0#1.base, 20 + saa7146_i2c_writeout_~#__wait~0#1.offset, 8);call write~$Pointer$#21(saa7146_i2c_writeout_~#__wait~0#1.base, 20 + saa7146_i2c_writeout_~#__wait~0#1.offset, saa7146_i2c_writeout_~#__wait~0#1.base, 28 + saa7146_i2c_writeout_~#__wait~0#1.offset, 8);assume { :begin_inline_prepare_to_wait } true;prepare_to_wait_#in~arg0#1.base, prepare_to_wait_#in~arg0#1.offset, prepare_to_wait_#in~arg1#1.base, prepare_to_wait_#in~arg1#1.offset, prepare_to_wait_#in~arg2#1 := saa7146_i2c_writeout_~dev#1.base, 1142 + saa7146_i2c_writeout_~dev#1.offset, saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset, 1;havoc prepare_to_wait_~arg0#1.base, prepare_to_wait_~arg0#1.offset, prepare_to_wait_~arg1#1.base, prepare_to_wait_~arg1#1.offset, prepare_to_wait_~arg2#1;prepare_to_wait_~arg0#1.base, prepare_to_wait_~arg0#1.offset := prepare_to_wait_#in~arg0#1.base, prepare_to_wait_#in~arg0#1.offset;prepare_to_wait_~arg1#1.base, prepare_to_wait_~arg1#1.offset := prepare_to_wait_#in~arg1#1.base, prepare_to_wait_#in~arg1#1.offset;prepare_to_wait_~arg2#1 := prepare_to_wait_#in~arg2#1; [2025-02-08 15:24:01,662 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5110-1: saa7146_i2c_writeout_#t~ret155#1 := saa7146_i2c_status_#res#1;havoc saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset, saa7146_i2c_status_#t~ret50#1, saa7146_i2c_status_~dev#1.base, saa7146_i2c_status_~dev#1.offset, saa7146_i2c_status_~iicsta~0#1, saa7146_i2c_status_~tmp~6#1;havoc saa7146_i2c_status_#in~dev#1.base, saa7146_i2c_status_#in~dev#1.offset;assume { :end_inline_saa7146_i2c_status } true;havoc saa7146_i2c_writeout_#t~ret155#1;assume { :begin_inline_saa7146_i2c_status } true;saa7146_i2c_status_#in~dev#1.base, saa7146_i2c_status_#in~dev#1.offset := saa7146_i2c_writeout_~dev#1.base, saa7146_i2c_writeout_~dev#1.offset;havoc saa7146_i2c_status_#res#1;havoc saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset, saa7146_i2c_status_#t~ret50#1, saa7146_i2c_status_~dev#1.base, saa7146_i2c_status_~dev#1.offset, saa7146_i2c_status_~iicsta~0#1, saa7146_i2c_status_~tmp~6#1;saa7146_i2c_status_~dev#1.base, saa7146_i2c_status_~dev#1.offset := saa7146_i2c_status_#in~dev#1.base, saa7146_i2c_status_#in~dev#1.offset;havoc saa7146_i2c_status_~iicsta~0#1;havoc saa7146_i2c_status_~tmp~6#1;call saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset := read~$Pointer$#6(saa7146_i2c_status_~dev#1.base, 802 + saa7146_i2c_status_~dev#1.offset, 8);assume { :begin_inline_readl } true;readl_#in~addr#1.base, readl_#in~addr#1.offset := saa7146_i2c_status_#t~mem49#1.base, 144 + saa7146_i2c_status_#t~mem49#1.offset;havoc readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;readl_~addr#1.base, readl_~addr#1.offset := readl_#in~addr#1.base, readl_#in~addr#1.offset;havoc readl_~ret~0#1;readl_#res#1 := readl_~ret~0#1; [2025-02-08 15:24:01,662 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5044: saa7146_i2c_writeout_#t~ret136#1.base, saa7146_i2c_writeout_#t~ret136#1.offset := get_current_#res#1.base, get_current_#res#1.offset;havoc get_current_#t~switch4#1, get_current_~pfo_ret__~0#1.base, get_current_~pfo_ret__~0#1.offset;assume { :end_inline_get_current } true;saa7146_i2c_writeout_~tmp___1~1#1.base, saa7146_i2c_writeout_~tmp___1~1#1.offset := saa7146_i2c_writeout_#t~ret136#1.base, saa7146_i2c_writeout_#t~ret136#1.offset;havoc saa7146_i2c_writeout_#t~ret136#1.base, saa7146_i2c_writeout_#t~ret136#1.offset;call write~int#21(0, saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset, 4);call write~$Pointer$#21(saa7146_i2c_writeout_~tmp___1~1#1.base, saa7146_i2c_writeout_~tmp___1~1#1.offset, saa7146_i2c_writeout_~#__wait~0#1.base, 4 + saa7146_i2c_writeout_~#__wait~0#1.offset, 8);call write~$Pointer$#21(#funAddr~autoremove_wake_function.base, #funAddr~autoremove_wake_function.offset, saa7146_i2c_writeout_~#__wait~0#1.base, 12 + saa7146_i2c_writeout_~#__wait~0#1.offset, 8);call write~$Pointer$#21(saa7146_i2c_writeout_~#__wait~0#1.base, 20 + saa7146_i2c_writeout_~#__wait~0#1.offset, saa7146_i2c_writeout_~#__wait~0#1.base, 20 + saa7146_i2c_writeout_~#__wait~0#1.offset, 8);call write~$Pointer$#21(saa7146_i2c_writeout_~#__wait~0#1.base, 20 + saa7146_i2c_writeout_~#__wait~0#1.offset, saa7146_i2c_writeout_~#__wait~0#1.base, 28 + saa7146_i2c_writeout_~#__wait~0#1.offset, 8);assume { :begin_inline_prepare_to_wait } true;prepare_to_wait_#in~arg0#1.base, prepare_to_wait_#in~arg0#1.offset, prepare_to_wait_#in~arg1#1.base, prepare_to_wait_#in~arg1#1.offset, prepare_to_wait_#in~arg2#1 := saa7146_i2c_writeout_~dev#1.base, 1142 + saa7146_i2c_writeout_~dev#1.offset, saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset, 1;havoc prepare_to_wait_~arg0#1.base, prepare_to_wait_~arg0#1.offset, prepare_to_wait_~arg1#1.base, prepare_to_wait_~arg1#1.offset, prepare_to_wait_~arg2#1;prepare_to_wait_~arg0#1.base, prepare_to_wait_~arg0#1.offset := prepare_to_wait_#in~arg0#1.base, prepare_to_wait_#in~arg0#1.offset;prepare_to_wait_~arg1#1.base, prepare_to_wait_~arg1#1.offset := prepare_to_wait_#in~arg1#1.base, prepare_to_wait_#in~arg1#1.offset;prepare_to_wait_~arg2#1 := prepare_to_wait_#in~arg2#1; [2025-02-08 15:24:01,662 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4912-1: [2025-02-08 15:24:01,662 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4912-2: havoc saa7146_i2c_reset_#t~bitwise86#1;assume saa7146_i2c_reset_#t~bitwise86#1 % 4294967296 <= ~saa7146_debug~0 % 4294967296 && saa7146_i2c_reset_#t~bitwise86#1 % 4294967296 <= 8; [2025-02-08 15:24:01,662 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4912: assume 0 != saa7146_i2c_reset_#t~bitwise86#1 % 4294967296;havoc saa7146_i2c_reset_#t~bitwise86#1;call write~$Pointer$#10(3, 0, saa7146_i2c_reset_~#descriptor~0#1.base, saa7146_i2c_reset_~#descriptor~0#1.offset, 8);call write~$Pointer$#10(4, 0, saa7146_i2c_reset_~#descriptor~0#1.base, 8 + saa7146_i2c_reset_~#descriptor~0#1.offset, 8);call write~$Pointer$#10(5, 0, saa7146_i2c_reset_~#descriptor~0#1.base, 16 + saa7146_i2c_reset_~#descriptor~0#1.offset, 8);call write~$Pointer$#10(6, 0, saa7146_i2c_reset_~#descriptor~0#1.base, 24 + saa7146_i2c_reset_~#descriptor~0#1.offset, 8);call write~int#10(175, saa7146_i2c_reset_~#descriptor~0#1.base, 32 + saa7146_i2c_reset_~#descriptor~0#1.offset, 4);call write~int#10(0, saa7146_i2c_reset_~#descriptor~0#1.base, 36 + saa7146_i2c_reset_~#descriptor~0#1.offset, 1);call saa7146_i2c_reset_#t~mem87#1 := read~int#10(saa7146_i2c_reset_~#descriptor~0#1.base, 36 + saa7146_i2c_reset_~#descriptor~0#1.offset, 1);assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if saa7146_i2c_reset_#t~mem87#1 % 256 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_reset_#t~mem87#1 % 256 % 18446744073709551616 else saa7146_i2c_reset_#t~mem87#1 % 256 % 18446744073709551616 - 18446744073709551616) % 2, 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; [2025-02-08 15:24:01,663 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4912: assume !(0 != saa7146_i2c_reset_#t~bitwise86#1 % 4294967296);havoc saa7146_i2c_reset_#t~bitwise86#1; [2025-02-08 15:24:01,663 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4912-5: assume 0 != saa7146_i2c_reset_#t~bitwise86#1 % 4294967296;havoc saa7146_i2c_reset_#t~bitwise86#1;call write~$Pointer$#10(3, 0, saa7146_i2c_reset_~#descriptor~0#1.base, saa7146_i2c_reset_~#descriptor~0#1.offset, 8);call write~$Pointer$#10(4, 0, saa7146_i2c_reset_~#descriptor~0#1.base, 8 + saa7146_i2c_reset_~#descriptor~0#1.offset, 8);call write~$Pointer$#10(5, 0, saa7146_i2c_reset_~#descriptor~0#1.base, 16 + saa7146_i2c_reset_~#descriptor~0#1.offset, 8);call write~$Pointer$#10(6, 0, saa7146_i2c_reset_~#descriptor~0#1.base, 24 + saa7146_i2c_reset_~#descriptor~0#1.offset, 8);call write~int#10(175, saa7146_i2c_reset_~#descriptor~0#1.base, 32 + saa7146_i2c_reset_~#descriptor~0#1.offset, 4);call write~int#10(0, saa7146_i2c_reset_~#descriptor~0#1.base, 36 + saa7146_i2c_reset_~#descriptor~0#1.offset, 1);call saa7146_i2c_reset_#t~mem87#1 := read~int#10(saa7146_i2c_reset_~#descriptor~0#1.base, 36 + saa7146_i2c_reset_~#descriptor~0#1.offset, 1);assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if saa7146_i2c_reset_#t~mem87#1 % 256 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_reset_#t~mem87#1 % 256 % 18446744073709551616 else saa7146_i2c_reset_#t~mem87#1 % 256 % 18446744073709551616 - 18446744073709551616) % 2, 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; [2025-02-08 15:24:01,663 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4912-5: assume !(0 != saa7146_i2c_reset_#t~bitwise86#1 % 4294967296);havoc saa7146_i2c_reset_#t~bitwise86#1; [2025-02-08 15:24:01,663 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4912-6: [2025-02-08 15:24:01,663 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4912-3: assume 8 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_reset_#t~bitwise86#1 := ~saa7146_debug~0; [2025-02-08 15:24:01,663 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4912-3: assume !(8 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,663 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4912-4: assume 0 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_reset_#t~bitwise86#1 := 0; [2025-02-08 15:24:01,663 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4912-4: assume !(0 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,663 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4912-9: assume 0 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_reset_#t~bitwise86#1 := 0; [2025-02-08 15:24:01,663 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4912-9: assume !(0 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,663 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5639: ldv_mutex_lock_interruptible_10_#t~ret251#1 := ldv_mutex_lock_interruptible_i2c_lock_of_saa7146_dev_#res#1;havoc ldv_mutex_lock_interruptible_i2c_lock_of_saa7146_dev_#t~nondet666#1, ldv_mutex_lock_interruptible_i2c_lock_of_saa7146_dev_~lock#1.base, ldv_mutex_lock_interruptible_i2c_lock_of_saa7146_dev_~lock#1.offset, ldv_mutex_lock_interruptible_i2c_lock_of_saa7146_dev_~nondetermined~0#1;havoc ldv_mutex_lock_interruptible_i2c_lock_of_saa7146_dev_#in~lock#1.base, ldv_mutex_lock_interruptible_i2c_lock_of_saa7146_dev_#in~lock#1.offset;assume { :end_inline_ldv_mutex_lock_interruptible_i2c_lock_of_saa7146_dev } true;ldv_mutex_lock_interruptible_10_~tmp___0~9#1 := ldv_mutex_lock_interruptible_10_#t~ret251#1;havoc ldv_mutex_lock_interruptible_10_#t~ret251#1;ldv_mutex_lock_interruptible_10_#res#1 := ldv_mutex_lock_interruptible_10_~tmp___0~9#1; [2025-02-08 15:24:01,663 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4912-7: havoc saa7146_i2c_reset_#t~bitwise86#1;assume saa7146_i2c_reset_#t~bitwise86#1 % 4294967296 <= ~saa7146_debug~0 % 4294967296 && saa7146_i2c_reset_#t~bitwise86#1 % 4294967296 <= 8; [2025-02-08 15:24:01,663 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4912-8: assume 8 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_reset_#t~bitwise86#1 := ~saa7146_debug~0; [2025-02-08 15:24:01,663 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4912-8: assume !(8 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,663 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5309: assume 0 != saa7146_i2c_transfer_~tmp___0~5#1;assume { :begin_inline___dynamic_pr_debug } true;__dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset := saa7146_i2c_transfer_~#descriptor~2#1.base, saa7146_i2c_transfer_~#descriptor~2#1.offset, 79, 0;havoc __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;__dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset := __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset;__dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset := __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;havoc __dynamic_pr_debug_#t~nondet691#1;__dynamic_pr_debug_#res#1 := __dynamic_pr_debug_#t~nondet691#1;havoc __dynamic_pr_debug_#t~nondet691#1; [2025-02-08 15:24:01,663 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5309: assume !(0 != saa7146_i2c_transfer_~tmp___0~5#1); [2025-02-08 15:24:01,663 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5177: saa7146_i2c_writeout_#t~ret171#1 := ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;havoc ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1;assume { :end_inline_ldv__builtin_expect } true;saa7146_i2c_writeout_~tmp___7~0#1 := saa7146_i2c_writeout_#t~ret171#1;havoc saa7146_i2c_writeout_#t~mem170#1;havoc saa7146_i2c_writeout_#t~ret171#1; [2025-02-08 15:24:01,663 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5177-1: saa7146_i2c_writeout_#t~ret171#1 := ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;havoc ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1;assume { :end_inline_ldv__builtin_expect } true;saa7146_i2c_writeout_~tmp___7~0#1 := saa7146_i2c_writeout_#t~ret171#1;havoc saa7146_i2c_writeout_#t~mem170#1;havoc saa7146_i2c_writeout_#t~ret171#1; [2025-02-08 15:24:01,663 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4979-1: saa7146_i2c_reset_#res#1 := -1;call ULTIMATE.dealloc(saa7146_i2c_reset_~#descriptor~0#1.base, saa7146_i2c_reset_~#descriptor~0#1.offset);havoc saa7146_i2c_reset_~#descriptor~0#1.base, saa7146_i2c_reset_~#descriptor~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_reset_~#descriptor___0~0#1.base, saa7146_i2c_reset_~#descriptor___0~0#1.offset);havoc saa7146_i2c_reset_~#descriptor___0~0#1.base, saa7146_i2c_reset_~#descriptor___0~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_reset_~#descriptor___1~0#1.base, saa7146_i2c_reset_~#descriptor___1~0#1.offset);havoc saa7146_i2c_reset_~#descriptor___1~0#1.base, saa7146_i2c_reset_~#descriptor___1~0#1.offset; [2025-02-08 15:24:01,663 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4979-3: saa7146_i2c_reset_#res#1 := -1;call ULTIMATE.dealloc(saa7146_i2c_reset_~#descriptor~0#1.base, saa7146_i2c_reset_~#descriptor~0#1.offset);havoc saa7146_i2c_reset_~#descriptor~0#1.base, saa7146_i2c_reset_~#descriptor~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_reset_~#descriptor___0~0#1.base, saa7146_i2c_reset_~#descriptor___0~0#1.offset);havoc saa7146_i2c_reset_~#descriptor___0~0#1.base, saa7146_i2c_reset_~#descriptor___0~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_reset_~#descriptor___1~0#1.base, saa7146_i2c_reset_~#descriptor___1~0#1.offset);havoc saa7146_i2c_reset_~#descriptor___1~0#1.base, saa7146_i2c_reset_~#descriptor___1~0#1.offset; [2025-02-08 15:24:01,664 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5178: assume 0 != saa7146_i2c_writeout_~tmp___7~0#1;assume { :begin_inline___dynamic_pr_debug } true;__dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset := saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset, 49, 0;havoc __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;__dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset := __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset;__dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset := __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;havoc __dynamic_pr_debug_#t~nondet691#1;__dynamic_pr_debug_#res#1 := __dynamic_pr_debug_#t~nondet691#1;havoc __dynamic_pr_debug_#t~nondet691#1; [2025-02-08 15:24:01,664 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5178: assume !(0 != saa7146_i2c_writeout_~tmp___7~0#1); [2025-02-08 15:24:01,664 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5112-1: saa7146_i2c_writeout_#t~ret156#1 := saa7146_i2c_status_#res#1;havoc saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset, saa7146_i2c_status_#t~ret50#1, saa7146_i2c_status_~dev#1.base, saa7146_i2c_status_~dev#1.offset, saa7146_i2c_status_~iicsta~0#1, saa7146_i2c_status_~tmp~6#1;havoc saa7146_i2c_status_#in~dev#1.base, saa7146_i2c_status_#in~dev#1.offset;assume { :end_inline_saa7146_i2c_status } true;saa7146_i2c_writeout_~status~1#1 := saa7146_i2c_writeout_#t~ret156#1; [2025-02-08 15:24:01,664 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5178-1: assume 0 != saa7146_i2c_writeout_~tmp___7~0#1;assume { :begin_inline___dynamic_pr_debug } true;__dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset := saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset, 49, 0;havoc __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;__dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset := __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset;__dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset := __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;havoc __dynamic_pr_debug_#t~nondet691#1;__dynamic_pr_debug_#res#1 := __dynamic_pr_debug_#t~nondet691#1;havoc __dynamic_pr_debug_#t~nondet691#1; [2025-02-08 15:24:01,664 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5178-1: assume !(0 != saa7146_i2c_writeout_~tmp___7~0#1); [2025-02-08 15:24:01,664 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5112: saa7146_i2c_writeout_#t~ret156#1 := saa7146_i2c_status_#res#1;havoc saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset, saa7146_i2c_status_#t~ret50#1, saa7146_i2c_status_~dev#1.base, saa7146_i2c_status_~dev#1.offset, saa7146_i2c_status_~iicsta~0#1, saa7146_i2c_status_~tmp~6#1;havoc saa7146_i2c_status_#in~dev#1.base, saa7146_i2c_status_#in~dev#1.offset;assume { :end_inline_saa7146_i2c_status } true;saa7146_i2c_writeout_~status~1#1 := saa7146_i2c_writeout_#t~ret156#1; [2025-02-08 15:24:01,664 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5641-1: ldv_mutex_lock_interruptible_10_#res#1 := ldv_mutex_lock_interruptible_10_~ldv_func_res~1#1; [2025-02-08 15:24:01,664 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5245-2: saa7146_i2c_writeout_#t~ret189#1 := readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;havoc readl_#in~addr#1.base, readl_#in~addr#1.offset;assume { :end_inline_readl } true;call write~int#5(saa7146_i2c_writeout_#t~ret189#1, saa7146_i2c_writeout_~dword#1.base, saa7146_i2c_writeout_~dword#1.offset, 4);havoc saa7146_i2c_writeout_#t~mem188#1.base, saa7146_i2c_writeout_#t~mem188#1.offset;havoc saa7146_i2c_writeout_#t~ret189#1; [2025-02-08 15:24:01,664 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5245: saa7146_i2c_writeout_#t~ret189#1 := readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;havoc readl_#in~addr#1.base, readl_#in~addr#1.offset;assume { :end_inline_readl } true;call write~int#5(saa7146_i2c_writeout_#t~ret189#1, saa7146_i2c_writeout_~dword#1.base, saa7146_i2c_writeout_~dword#1.offset, 4);havoc saa7146_i2c_writeout_#t~mem188#1.base, saa7146_i2c_writeout_#t~mem188#1.offset;havoc saa7146_i2c_writeout_#t~ret189#1; [2025-02-08 15:24:01,664 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5113: assume 1 != saa7146_i2c_writeout_~status~1#1 % 4 % 4294967296; [2025-02-08 15:24:01,664 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5113: assume !(1 != saa7146_i2c_writeout_~status~1#1 % 4 % 4294967296); [2025-02-08 15:24:01,664 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5113-1: assume 1 != saa7146_i2c_writeout_~status~1#1 % 4 % 4294967296; [2025-02-08 15:24:01,664 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5113-1: assume !(1 != saa7146_i2c_writeout_~status~1#1 % 4 % 4294967296); [2025-02-08 15:24:01,664 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7690: havoc printk_#t~nondet701#1;saa7146_i2c_transfer_#t~ret231#1 := printk_#res#1;havoc printk_#t~nondet701#1, printk_~arg0#1.base, printk_~arg0#1.offset;havoc printk_#in~arg0#1.base, printk_#in~arg0#1.offset;assume { :end_inline_printk } true;havoc saa7146_i2c_transfer_#t~ret231#1; [2025-02-08 15:24:01,664 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7690-4: havoc printk_#t~nondet701#1;saa7146_i2c_writeout_#t~ret157#1 := printk_#res#1;havoc printk_#t~nondet701#1, printk_~arg0#1.base, printk_~arg0#1.offset;havoc printk_#in~arg0#1.base, printk_#in~arg0#1.offset;assume { :end_inline_printk } true;havoc saa7146_i2c_writeout_#t~ret157#1;saa7146_i2c_writeout_#res#1 := -5;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset);havoc saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset; [2025-02-08 15:24:01,664 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7690-2: havoc printk_#t~nondet701#1;saa7146_i2c_writeout_#t~ret144#1 := printk_#res#1;havoc printk_#t~nondet701#1, printk_~arg0#1.base, printk_~arg0#1.offset;havoc printk_#in~arg0#1.base, printk_#in~arg0#1.offset;assume { :end_inline_printk } true;havoc saa7146_i2c_writeout_#t~ret144#1;saa7146_i2c_writeout_#res#1 := -5;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset);havoc saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset; [2025-02-08 15:24:01,665 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7690-8: havoc printk_#t~nondet701#1;saa7146_i2c_writeout_#t~ret144#1 := printk_#res#1;havoc printk_#t~nondet701#1, printk_~arg0#1.base, printk_~arg0#1.offset;havoc printk_#in~arg0#1.base, printk_#in~arg0#1.offset;assume { :end_inline_printk } true;havoc saa7146_i2c_writeout_#t~ret144#1;saa7146_i2c_writeout_#res#1 := -5;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset);havoc saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset; [2025-02-08 15:24:01,665 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7690-6: havoc printk_#t~nondet701#1;saa7146_i2c_writeout_#t~ret154#1 := printk_#res#1;havoc printk_#t~nondet701#1, printk_~arg0#1.base, printk_~arg0#1.offset;havoc printk_#in~arg0#1.base, printk_#in~arg0#1.offset;assume { :end_inline_printk } true;havoc saa7146_i2c_writeout_#t~ret154#1;saa7146_i2c_writeout_#res#1 := -5;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset);havoc saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset; [2025-02-08 15:24:01,665 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7690-12: havoc printk_#t~nondet701#1;saa7146_i2c_writeout_#t~ret154#1 := printk_#res#1;havoc printk_#t~nondet701#1, printk_~arg0#1.base, printk_~arg0#1.offset;havoc printk_#in~arg0#1.base, printk_#in~arg0#1.offset;assume { :end_inline_printk } true;havoc saa7146_i2c_writeout_#t~ret154#1;saa7146_i2c_writeout_#res#1 := -5;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset);havoc saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset; [2025-02-08 15:24:01,665 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5246: assume 0 != saa7146_i2c_writeout_#t~bitwise190#1 % 4294967296;havoc saa7146_i2c_writeout_#t~bitwise190#1;call write~$Pointer$#10(69, 0, saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset, 8);call write~$Pointer$#10(70, 0, saa7146_i2c_writeout_~#descriptor___6~0#1.base, 8 + saa7146_i2c_writeout_~#descriptor___6~0#1.offset, 8);call write~$Pointer$#10(71, 0, saa7146_i2c_writeout_~#descriptor___6~0#1.base, 16 + saa7146_i2c_writeout_~#descriptor___6~0#1.offset, 8);call write~$Pointer$#10(72, 0, saa7146_i2c_writeout_~#descriptor___6~0#1.base, 24 + saa7146_i2c_writeout_~#descriptor___6~0#1.offset, 8);call write~int#10(337, saa7146_i2c_writeout_~#descriptor___6~0#1.base, 32 + saa7146_i2c_writeout_~#descriptor___6~0#1.offset, 4);call write~int#10(0, saa7146_i2c_writeout_~#descriptor___6~0#1.base, 36 + saa7146_i2c_writeout_~#descriptor___6~0#1.offset, 1);call saa7146_i2c_writeout_#t~mem191#1 := read~int#10(saa7146_i2c_writeout_~#descriptor___6~0#1.base, 36 + saa7146_i2c_writeout_~#descriptor___6~0#1.offset, 1);assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if saa7146_i2c_writeout_#t~mem191#1 % 256 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_writeout_#t~mem191#1 % 256 % 18446744073709551616 else saa7146_i2c_writeout_#t~mem191#1 % 256 % 18446744073709551616 - 18446744073709551616) % 2, 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; [2025-02-08 15:24:01,665 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5246: assume !(0 != saa7146_i2c_writeout_#t~bitwise190#1 % 4294967296);havoc saa7146_i2c_writeout_#t~bitwise190#1; [2025-02-08 15:24:01,665 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7690-10: havoc printk_#t~nondet701#1;saa7146_i2c_writeout_#t~ret157#1 := printk_#res#1;havoc printk_#t~nondet701#1, printk_~arg0#1.base, printk_~arg0#1.offset;havoc printk_#in~arg0#1.base, printk_#in~arg0#1.offset;assume { :end_inline_printk } true;havoc saa7146_i2c_writeout_#t~ret157#1;saa7146_i2c_writeout_#res#1 := -5;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor~1#1.base, saa7146_i2c_writeout_~#descriptor~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset);havoc saa7146_i2c_writeout_~#__wait~0#1.base, saa7146_i2c_writeout_~#__wait~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor___0~1#1.base, saa7146_i2c_writeout_~#descriptor___0~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset);havoc saa7146_i2c_writeout_~#descriptor___1~1#1.base, saa7146_i2c_writeout_~#descriptor___1~1#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___2~0#1.base, saa7146_i2c_writeout_~#descriptor___2~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___4~0#1.base, saa7146_i2c_writeout_~#descriptor___4~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___5~0#1.base, saa7146_i2c_writeout_~#descriptor___5~0#1.offset;call ULTIMATE.dealloc(saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset);havoc saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset; [2025-02-08 15:24:01,665 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5246-3: assume 8 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_writeout_#t~bitwise190#1 := ~saa7146_debug~0; [2025-02-08 15:24:01,665 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5246-3: assume !(8 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,665 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5246-4: assume 0 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_writeout_#t~bitwise190#1 := 0; [2025-02-08 15:24:01,665 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5246-4: assume !(0 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,665 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5246-1: [2025-02-08 15:24:01,665 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5246-2: havoc saa7146_i2c_writeout_#t~bitwise190#1;assume saa7146_i2c_writeout_#t~bitwise190#1 % 4294967296 <= ~saa7146_debug~0 % 4294967296 && saa7146_i2c_writeout_#t~bitwise190#1 % 4294967296 <= 8; [2025-02-08 15:24:01,665 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5246-7: havoc saa7146_i2c_writeout_#t~bitwise190#1;assume saa7146_i2c_writeout_#t~bitwise190#1 % 4294967296 <= ~saa7146_debug~0 % 4294967296 && saa7146_i2c_writeout_#t~bitwise190#1 % 4294967296 <= 8; [2025-02-08 15:24:01,665 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5246-8: assume 8 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_writeout_#t~bitwise190#1 := ~saa7146_debug~0; [2025-02-08 15:24:01,665 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5246-8: assume !(8 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,665 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5246-5: assume 0 != saa7146_i2c_writeout_#t~bitwise190#1 % 4294967296;havoc saa7146_i2c_writeout_#t~bitwise190#1;call write~$Pointer$#10(69, 0, saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset, 8);call write~$Pointer$#10(70, 0, saa7146_i2c_writeout_~#descriptor___6~0#1.base, 8 + saa7146_i2c_writeout_~#descriptor___6~0#1.offset, 8);call write~$Pointer$#10(71, 0, saa7146_i2c_writeout_~#descriptor___6~0#1.base, 16 + saa7146_i2c_writeout_~#descriptor___6~0#1.offset, 8);call write~$Pointer$#10(72, 0, saa7146_i2c_writeout_~#descriptor___6~0#1.base, 24 + saa7146_i2c_writeout_~#descriptor___6~0#1.offset, 8);call write~int#10(337, saa7146_i2c_writeout_~#descriptor___6~0#1.base, 32 + saa7146_i2c_writeout_~#descriptor___6~0#1.offset, 4);call write~int#10(0, saa7146_i2c_writeout_~#descriptor___6~0#1.base, 36 + saa7146_i2c_writeout_~#descriptor___6~0#1.offset, 1);call saa7146_i2c_writeout_#t~mem191#1 := read~int#10(saa7146_i2c_writeout_~#descriptor___6~0#1.base, 36 + saa7146_i2c_writeout_~#descriptor___6~0#1.offset, 1);assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if saa7146_i2c_writeout_#t~mem191#1 % 256 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_writeout_#t~mem191#1 % 256 % 18446744073709551616 else saa7146_i2c_writeout_#t~mem191#1 % 256 % 18446744073709551616 - 18446744073709551616) % 2, 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; [2025-02-08 15:24:01,665 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5246-5: assume !(0 != saa7146_i2c_writeout_#t~bitwise190#1 % 4294967296);havoc saa7146_i2c_writeout_#t~bitwise190#1; [2025-02-08 15:24:01,665 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5246-6: [2025-02-08 15:24:01,665 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5246-9: assume 0 == ~saa7146_debug~0 % 4294967296;saa7146_i2c_writeout_#t~bitwise190#1 := 0; [2025-02-08 15:24:01,665 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5246-9: assume !(0 == ~saa7146_debug~0 % 4294967296); [2025-02-08 15:24:01,666 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5445: assume 0 == saa7146_i2c_transfer_#t~mem228#1 % 4294967296;havoc saa7146_i2c_transfer_#t~mem228#1;call write~int#5(0, saa7146_i2c_transfer_~#zero~0#1.base, saa7146_i2c_transfer_~#zero~0#1.offset, 4);assume { :begin_inline_saa7146_i2c_reset } true;saa7146_i2c_reset_#in~dev#1.base, saa7146_i2c_reset_#in~dev#1.offset := saa7146_i2c_transfer_~dev#1.base, saa7146_i2c_transfer_~dev#1.offset;havoc saa7146_i2c_reset_#res#1;havoc saa7146_i2c_reset_#t~ret82#1, saa7146_i2c_reset_#t~mem83#1, saa7146_i2c_reset_#t~mem84#1.base, saa7146_i2c_reset_#t~mem84#1.offset, saa7146_i2c_reset_#t~mem85#1.base, saa7146_i2c_reset_#t~mem85#1.offset, saa7146_i2c_reset_#t~bitwise86#1, saa7146_i2c_reset_#t~mem87#1, saa7146_i2c_reset_#t~ret88#1, saa7146_i2c_reset_#t~ret89#1, saa7146_i2c_reset_#t~mem90#1, saa7146_i2c_reset_#t~bitwise91#1, saa7146_i2c_reset_#t~mem92#1.base, saa7146_i2c_reset_#t~mem92#1.offset, saa7146_i2c_reset_#t~mem93#1.base, saa7146_i2c_reset_#t~mem93#1.offset, saa7146_i2c_reset_#t~mem94#1, saa7146_i2c_reset_#t~mem95#1.base, saa7146_i2c_reset_#t~mem95#1.offset, saa7146_i2c_reset_#t~mem96#1.base, saa7146_i2c_reset_#t~mem96#1.offset, saa7146_i2c_reset_#t~ret97#1, saa7146_i2c_reset_#t~mem98#1, saa7146_i2c_reset_#t~bitwise99#1, saa7146_i2c_reset_#t~mem100#1, saa7146_i2c_reset_#t~ret101#1, saa7146_i2c_reset_#t~ret102#1, saa7146_i2c_reset_#t~mem103#1, saa7146_i2c_reset_#t~bitwise104#1, saa7146_i2c_reset_#t~mem105#1.base, saa7146_i2c_reset_#t~mem105#1.offset, saa7146_i2c_reset_#t~mem106#1.base, saa7146_i2c_reset_#t~mem106#1.offset, saa7146_i2c_reset_#t~mem107#1, saa7146_i2c_reset_#t~mem108#1.base, saa7146_i2c_reset_#t~mem108#1.offset, saa7146_i2c_reset_#t~mem109#1.base, saa7146_i2c_reset_#t~mem109#1.offset, saa7146_i2c_reset_#t~mem110#1, saa7146_i2c_reset_#t~mem111#1.base, saa7146_i2c_reset_#t~mem111#1.offset, saa7146_i2c_reset_#t~mem112#1.base, saa7146_i2c_reset_#t~mem112#1.offset, saa7146_i2c_reset_#t~ret113#1, saa7146_i2c_reset_#t~mem114#1, saa7146_i2c_reset_#t~bitwise115#1, saa7146_i2c_reset_#t~mem116#1, saa7146_i2c_reset_#t~ret117#1, saa7146_i2c_reset_#t~ret118#1, saa7146_i2c_reset_~dev#1.base, saa7146_i2c_reset_~dev#1.offset, saa7146_i2c_reset_~status~0#1, saa7146_i2c_reset_~tmp~7#1, saa7146_i2c_reset_~#descriptor~0#1.base, saa7146_i2c_reset_~#descriptor~0#1.offset, saa7146_i2c_reset_~tmp___0~3#1, saa7146_i2c_reset_~#descriptor___0~0#1.base, saa7146_i2c_reset_~#descriptor___0~0#1.offset, saa7146_i2c_reset_~tmp___1~0#1, saa7146_i2c_reset_~#descriptor___1~0#1.base, saa7146_i2c_reset_~#descriptor___1~0#1.offset, saa7146_i2c_reset_~tmp___2~0#1;saa7146_i2c_reset_~dev#1.base, saa7146_i2c_reset_~dev#1.offset := saa7146_i2c_reset_#in~dev#1.base, saa7146_i2c_reset_#in~dev#1.offset;havoc saa7146_i2c_reset_~status~0#1;havoc saa7146_i2c_reset_~tmp~7#1;call saa7146_i2c_reset_~#descriptor~0#1.base, saa7146_i2c_reset_~#descriptor~0#1.offset := #Ultimate.allocOnStack(37);havoc saa7146_i2c_reset_~tmp___0~3#1;call saa7146_i2c_reset_~#descriptor___0~0#1.base, saa7146_i2c_reset_~#descriptor___0~0#1.offset := #Ultimate.allocOnStack(37);havoc saa7146_i2c_reset_~tmp___1~0#1;call saa7146_i2c_reset_~#descriptor___1~0#1.base, saa7146_i2c_reset_~#descriptor___1~0#1.offset := #Ultimate.allocOnStack(37);havoc saa7146_i2c_reset_~tmp___2~0#1;assume { :begin_inline_saa7146_i2c_status } true;saa7146_i2c_status_#in~dev#1.base, saa7146_i2c_status_#in~dev#1.offset := saa7146_i2c_reset_~dev#1.base, saa7146_i2c_reset_~dev#1.offset;havoc saa7146_i2c_status_#res#1;havoc saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset, saa7146_i2c_status_#t~ret50#1, saa7146_i2c_status_~dev#1.base, saa7146_i2c_status_~dev#1.offset, saa7146_i2c_status_~iicsta~0#1, saa7146_i2c_status_~tmp~6#1;saa7146_i2c_status_~dev#1.base, saa7146_i2c_status_~dev#1.offset := saa7146_i2c_status_#in~dev#1.base, saa7146_i2c_status_#in~dev#1.offset;havoc saa7146_i2c_status_~iicsta~0#1;havoc saa7146_i2c_status_~tmp~6#1;call saa7146_i2c_status_#t~mem49#1.base, saa7146_i2c_status_#t~mem49#1.offset := read~$Pointer$#6(saa7146_i2c_status_~dev#1.base, 802 + saa7146_i2c_status_~dev#1.offset, 8);assume { :begin_inline_readl } true;readl_#in~addr#1.base, readl_#in~addr#1.offset := saa7146_i2c_status_#t~mem49#1.base, 144 + saa7146_i2c_status_#t~mem49#1.offset;havoc readl_#res#1;havoc readl_~addr#1.base, readl_~addr#1.offset, readl_~ret~0#1;readl_~addr#1.base, readl_~addr#1.offset := readl_#in~addr#1.base, readl_#in~addr#1.offset;havoc readl_~ret~0#1;readl_#res#1 := readl_~ret~0#1; [2025-02-08 15:24:01,666 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5445: assume !(0 == saa7146_i2c_transfer_#t~mem228#1 % 4294967296);havoc saa7146_i2c_transfer_#t~mem228#1; [2025-02-08 15:24:01,666 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5445-1: call saa7146_i2c_transfer_#t~mem228#1 := read~int#6(saa7146_i2c_transfer_~dev#1.base, 810 + saa7146_i2c_transfer_~dev#1.offset, 4); [2025-02-08 15:24:01,666 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4851: assume saa7146_i2c_msg_prepare_~i~0#1 < saa7146_i2c_msg_prepare_~num#1; [2025-02-08 15:24:01,666 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4851: assume !(saa7146_i2c_msg_prepare_~i~0#1 < saa7146_i2c_msg_prepare_~num#1);saa7146_i2c_msg_prepare_~h1~0#1 := (if -1 + saa7146_i2c_msg_prepare_~op_count~0#1 < 0 && 0 != (-1 + saa7146_i2c_msg_prepare_~op_count~0#1) % 3 then 1 + (-1 + saa7146_i2c_msg_prepare_~op_count~0#1) / 3 else (-1 + saa7146_i2c_msg_prepare_~op_count~0#1) / 3);saa7146_i2c_msg_prepare_~h2~0#1 := (if -1 + saa7146_i2c_msg_prepare_~op_count~0#1 < 0 && 0 != (-1 + saa7146_i2c_msg_prepare_~op_count~0#1) % 3 then (-1 + saa7146_i2c_msg_prepare_~op_count~0#1) % 3 - 3 else (-1 + saa7146_i2c_msg_prepare_~op_count~0#1) % 3);call saa7146_i2c_msg_prepare_#t~mem70#1 := read~int#5(saa7146_i2c_msg_prepare_~op#1.base, saa7146_i2c_msg_prepare_~op#1.offset + 4 * (if saa7146_i2c_msg_prepare_~h1~0#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_msg_prepare_~h1~0#1 % 18446744073709551616 % 18446744073709551616 else saa7146_i2c_msg_prepare_~h1~0#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 4); [2025-02-08 15:24:01,666 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7627: havoc dev_get_drvdata_#t~ret694#1.base, dev_get_drvdata_#t~ret694#1.offset;i2c_get_adapdata_#t~ret35#1.base, i2c_get_adapdata_#t~ret35#1.offset := dev_get_drvdata_#res#1.base, dev_get_drvdata_#res#1.offset;havoc dev_get_drvdata_#t~ret694#1.base, dev_get_drvdata_#t~ret694#1.offset, dev_get_drvdata_~arg0#1.base, dev_get_drvdata_~arg0#1.offset;havoc dev_get_drvdata_#in~arg0#1.base, dev_get_drvdata_#in~arg0#1.offset;assume { :end_inline_dev_get_drvdata } true;i2c_get_adapdata_~tmp~3#1.base, i2c_get_adapdata_~tmp~3#1.offset := i2c_get_adapdata_#t~ret35#1.base, i2c_get_adapdata_#t~ret35#1.offset;havoc i2c_get_adapdata_#t~ret35#1.base, i2c_get_adapdata_#t~ret35#1.offset;i2c_get_adapdata_#res#1.base, i2c_get_adapdata_#res#1.offset := i2c_get_adapdata_~tmp~3#1.base, i2c_get_adapdata_~tmp~3#1.offset; [2025-02-08 15:24:01,666 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5051: havoc prepare_to_wait_~arg0#1.base, prepare_to_wait_~arg0#1.offset, prepare_to_wait_~arg1#1.base, prepare_to_wait_~arg1#1.offset, prepare_to_wait_~arg2#1;havoc prepare_to_wait_#in~arg0#1.base, prepare_to_wait_#in~arg0#1.offset, prepare_to_wait_#in~arg1#1.base, prepare_to_wait_#in~arg1#1.offset, prepare_to_wait_#in~arg2#1;assume { :end_inline_prepare_to_wait } true;call saa7146_i2c_writeout_#t~mem137#1 := read~int#6(saa7146_i2c_writeout_~dev#1.base, 1226 + saa7146_i2c_writeout_~dev#1.offset, 4); [2025-02-08 15:24:01,666 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5051-1: havoc prepare_to_wait_~arg0#1.base, prepare_to_wait_~arg0#1.offset, prepare_to_wait_~arg1#1.base, prepare_to_wait_~arg1#1.offset, prepare_to_wait_~arg2#1;havoc prepare_to_wait_#in~arg0#1.base, prepare_to_wait_#in~arg0#1.offset, prepare_to_wait_#in~arg1#1.base, prepare_to_wait_#in~arg1#1.offset, prepare_to_wait_#in~arg2#1;assume { :end_inline_prepare_to_wait } true;call saa7146_i2c_writeout_#t~mem137#1 := read~int#6(saa7146_i2c_writeout_~dev#1.base, 1226 + saa7146_i2c_writeout_~dev#1.offset, 4); [2025-02-08 15:24:01,666 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5117: assume (if saa7146_i2c_writeout_~timeout~0#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_writeout_~timeout~0#1 % 18446744073709551616 % 18446744073709551616 else saa7146_i2c_writeout_~timeout~0#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616) - (if ~jiffies~0 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~jiffies~0 % 18446744073709551616 % 18446744073709551616 else ~jiffies~0 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616) < 0;assume { :begin_inline_printk } true;printk_#in~arg0#1.base, printk_#in~arg0#1.offset := 31, 0;havoc printk_#res#1;havoc printk_#t~nondet701#1, printk_~arg0#1.base, printk_~arg0#1.offset;printk_~arg0#1.base, printk_~arg0#1.offset := printk_#in~arg0#1.base, printk_#in~arg0#1.offset;havoc printk_#t~nondet701#1;printk_#res#1 := printk_#t~nondet701#1;havoc printk_#t~nondet701#1; [2025-02-08 15:24:01,666 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5117: assume !((if saa7146_i2c_writeout_~timeout~0#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_writeout_~timeout~0#1 % 18446744073709551616 % 18446744073709551616 else saa7146_i2c_writeout_~timeout~0#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616) - (if ~jiffies~0 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~jiffies~0 % 18446744073709551616 % 18446744073709551616 else ~jiffies~0 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616) < 0);saa7146_i2c_writeout_~trial~0#1 := 1 + saa7146_i2c_writeout_~trial~0#1; [2025-02-08 15:24:01,666 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5117-1: assume (if saa7146_i2c_writeout_~timeout~0#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_writeout_~timeout~0#1 % 18446744073709551616 % 18446744073709551616 else saa7146_i2c_writeout_~timeout~0#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616) - (if ~jiffies~0 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~jiffies~0 % 18446744073709551616 % 18446744073709551616 else ~jiffies~0 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616) < 0;assume { :begin_inline_printk } true;printk_#in~arg0#1.base, printk_#in~arg0#1.offset := 31, 0;havoc printk_#res#1;havoc printk_#t~nondet701#1, printk_~arg0#1.base, printk_~arg0#1.offset;printk_~arg0#1.base, printk_~arg0#1.offset := printk_#in~arg0#1.base, printk_#in~arg0#1.offset;havoc printk_#t~nondet701#1;printk_#res#1 := printk_#t~nondet701#1;havoc printk_#t~nondet701#1; [2025-02-08 15:24:01,666 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5117-1: assume !((if saa7146_i2c_writeout_~timeout~0#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_writeout_~timeout~0#1 % 18446744073709551616 % 18446744073709551616 else saa7146_i2c_writeout_~timeout~0#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616) - (if ~jiffies~0 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then ~jiffies~0 % 18446744073709551616 % 18446744073709551616 else ~jiffies~0 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616) < 0);saa7146_i2c_writeout_~trial~0#1 := 1 + saa7146_i2c_writeout_~trial~0#1; [2025-02-08 15:24:01,666 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4919: saa7146_i2c_reset_#t~ret88#1 := ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;havoc ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1;assume { :end_inline_ldv__builtin_expect } true;saa7146_i2c_reset_~tmp___0~3#1 := saa7146_i2c_reset_#t~ret88#1;havoc saa7146_i2c_reset_#t~mem87#1;havoc saa7146_i2c_reset_#t~ret88#1; [2025-02-08 15:24:01,666 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4919-1: saa7146_i2c_reset_#t~ret88#1 := ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;havoc ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1;assume { :end_inline_ldv__builtin_expect } true;saa7146_i2c_reset_~tmp___0~3#1 := saa7146_i2c_reset_#t~ret88#1;havoc saa7146_i2c_reset_#t~mem87#1;havoc saa7146_i2c_reset_#t~ret88#1; [2025-02-08 15:24:01,666 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4721: signal_pending_#t~ret31#1 := test_tsk_thread_flag_#res#1;havoc test_tsk_thread_flag_#t~mem29#1.base, test_tsk_thread_flag_#t~mem29#1.offset, test_tsk_thread_flag_#t~ret30#1, test_tsk_thread_flag_~tsk#1.base, test_tsk_thread_flag_~tsk#1.offset, test_tsk_thread_flag_~flag#1, test_tsk_thread_flag_~tmp~1#1;havoc test_tsk_thread_flag_#in~tsk#1.base, test_tsk_thread_flag_#in~tsk#1.offset, test_tsk_thread_flag_#in~flag#1;assume { :end_inline_test_tsk_thread_flag } true;signal_pending_~tmp~2#1 := signal_pending_#t~ret31#1;havoc signal_pending_#t~ret31#1;assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if 0 != signal_pending_~tmp~2#1 then 1 else 0), 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; [2025-02-08 15:24:01,667 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4721-1: signal_pending_#t~ret31#1 := test_tsk_thread_flag_#res#1;havoc test_tsk_thread_flag_#t~mem29#1.base, test_tsk_thread_flag_#t~mem29#1.offset, test_tsk_thread_flag_#t~ret30#1, test_tsk_thread_flag_~tsk#1.base, test_tsk_thread_flag_~tsk#1.offset, test_tsk_thread_flag_~flag#1, test_tsk_thread_flag_~tmp~1#1;havoc test_tsk_thread_flag_#in~tsk#1.base, test_tsk_thread_flag_#in~tsk#1.offset, test_tsk_thread_flag_#in~flag#1;assume { :end_inline_test_tsk_thread_flag } true;signal_pending_~tmp~2#1 := signal_pending_#t~ret31#1;havoc signal_pending_#t~ret31#1;assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if 0 != signal_pending_~tmp~2#1 then 1 else 0), 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; [2025-02-08 15:24:01,667 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5382: assume saa7146_i2c_transfer_~i~2#1 < saa7146_i2c_transfer_~count~0#1; [2025-02-08 15:24:01,667 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5382: assume !(saa7146_i2c_transfer_~i~2#1 < saa7146_i2c_transfer_~count~0#1); [2025-02-08 15:24:01,667 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5316: saa7146_i2c_transfer_~i~2#1 := 1 + saa7146_i2c_transfer_~i~2#1; [2025-02-08 15:24:01,667 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5052-1: assume 0 == saa7146_i2c_writeout_#t~mem137#1;havoc saa7146_i2c_writeout_#t~mem137#1; [2025-02-08 15:24:01,667 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5052-1: assume !(0 == saa7146_i2c_writeout_#t~mem137#1);havoc saa7146_i2c_writeout_#t~mem137#1;assume { :begin_inline_get_current } true;havoc get_current_#res#1.base, get_current_#res#1.offset;havoc get_current_#t~switch4#1, get_current_~pfo_ret__~0#1.base, get_current_~pfo_ret__~0#1.offset;havoc get_current_~pfo_ret__~0#1.base, get_current_~pfo_ret__~0#1.offset;get_current_#t~switch4#1 := false; [2025-02-08 15:24:01,667 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5052: assume 0 == saa7146_i2c_writeout_#t~mem137#1;havoc saa7146_i2c_writeout_#t~mem137#1; [2025-02-08 15:24:01,667 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5052: assume !(0 == saa7146_i2c_writeout_#t~mem137#1);havoc saa7146_i2c_writeout_#t~mem137#1;assume { :begin_inline_get_current } true;havoc get_current_#res#1.base, get_current_#res#1.offset;havoc get_current_#t~switch4#1, get_current_~pfo_ret__~0#1.base, get_current_~pfo_ret__~0#1.offset;havoc get_current_~pfo_ret__~0#1.base, get_current_~pfo_ret__~0#1.offset;get_current_#t~switch4#1 := false; [2025-02-08 15:24:01,667 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4920-1: assume 0 != saa7146_i2c_reset_~tmp___0~3#1;assume { :begin_inline___dynamic_pr_debug } true;__dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset := saa7146_i2c_reset_~#descriptor~0#1.base, saa7146_i2c_reset_~#descriptor~0#1.offset, 7, 0;havoc __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;__dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset := __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset;__dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset := __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;havoc __dynamic_pr_debug_#t~nondet691#1;__dynamic_pr_debug_#res#1 := __dynamic_pr_debug_#t~nondet691#1;havoc __dynamic_pr_debug_#t~nondet691#1; [2025-02-08 15:24:01,667 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4920-1: assume !(0 != saa7146_i2c_reset_~tmp___0~3#1); [2025-02-08 15:24:01,667 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4920: assume 0 != saa7146_i2c_reset_~tmp___0~3#1;assume { :begin_inline___dynamic_pr_debug } true;__dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset := saa7146_i2c_reset_~#descriptor~0#1.base, saa7146_i2c_reset_~#descriptor~0#1.offset, 7, 0;havoc __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;__dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset := __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset;__dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset := __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;havoc __dynamic_pr_debug_#t~nondet691#1;__dynamic_pr_debug_#res#1 := __dynamic_pr_debug_#t~nondet691#1;havoc __dynamic_pr_debug_#t~nondet691#1; [2025-02-08 15:24:01,667 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4920: assume !(0 != saa7146_i2c_reset_~tmp___0~3#1); [2025-02-08 15:24:01,667 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4722: signal_pending_#t~ret32#1 := ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;havoc ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1;assume { :end_inline_ldv__builtin_expect } true;signal_pending_~tmp___0~0#1 := signal_pending_#t~ret32#1;havoc signal_pending_#t~ret32#1;signal_pending_#res#1 := (if signal_pending_~tmp___0~0#1 % 4294967296 <= 2147483647 then signal_pending_~tmp___0~0#1 % 4294967296 else signal_pending_~tmp___0~0#1 % 4294967296 - 4294967296); [2025-02-08 15:24:01,667 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5647: havoc ldv_mutex_unlock_i2c_lock_of_saa7146_dev_~lock#1.base, ldv_mutex_unlock_i2c_lock_of_saa7146_dev_~lock#1.offset;havoc ldv_mutex_unlock_i2c_lock_of_saa7146_dev_#in~lock#1.base, ldv_mutex_unlock_i2c_lock_of_saa7146_dev_#in~lock#1.offset;assume { :end_inline_ldv_mutex_unlock_i2c_lock_of_saa7146_dev } true;assume { :begin_inline_mutex_unlock } true;mutex_unlock_#in~arg0#1.base, mutex_unlock_#in~arg0#1.offset := ldv_mutex_unlock_11_~ldv_func_arg1#1.base, ldv_mutex_unlock_11_~ldv_func_arg1#1.offset;havoc mutex_unlock_~arg0#1.base, mutex_unlock_~arg0#1.offset;mutex_unlock_~arg0#1.base, mutex_unlock_~arg0#1.offset := mutex_unlock_#in~arg0#1.base, mutex_unlock_#in~arg0#1.offset; [2025-02-08 15:24:01,667 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4722-1: signal_pending_#t~ret32#1 := ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;havoc ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1;assume { :end_inline_ldv__builtin_expect } true;signal_pending_~tmp___0~0#1 := signal_pending_#t~ret32#1;havoc signal_pending_#t~ret32#1;signal_pending_#res#1 := (if signal_pending_~tmp___0~0#1 % 4294967296 <= 2147483647 then signal_pending_~tmp___0~0#1 % 4294967296 else signal_pending_~tmp___0~0#1 % 4294967296 - 4294967296); [2025-02-08 15:24:01,667 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5449: assume 0 != saa7146_i2c_transfer_~tmp___7~1#1;assume { :begin_inline_printk } true;printk_#in~arg0#1.base, printk_#in~arg0#1.offset := 105, 0;havoc printk_#res#1;havoc printk_#t~nondet701#1, printk_~arg0#1.base, printk_~arg0#1.offset;printk_~arg0#1.base, printk_~arg0#1.offset := printk_#in~arg0#1.base, printk_#in~arg0#1.offset;havoc printk_#t~nondet701#1;printk_#res#1 := printk_#t~nondet701#1;havoc printk_#t~nondet701#1; [2025-02-08 15:24:01,667 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5449: assume !(0 != saa7146_i2c_transfer_~tmp___7~1#1); [2025-02-08 15:24:01,667 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5648: havoc mutex_unlock_~arg0#1.base, mutex_unlock_~arg0#1.offset;havoc mutex_unlock_#in~arg0#1.base, mutex_unlock_#in~arg0#1.offset;assume { :end_inline_mutex_unlock } true; [2025-02-08 15:24:01,668 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5318: assume saa7146_i2c_transfer_~i~2#1 < saa7146_i2c_transfer_~num#1; [2025-02-08 15:24:01,668 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5318: assume !(saa7146_i2c_transfer_~i~2#1 < saa7146_i2c_transfer_~num#1);assume { :begin_inline_saa7146_i2c_msg_prepare } true;saa7146_i2c_msg_prepare_#in~m#1.base, saa7146_i2c_msg_prepare_#in~m#1.offset, saa7146_i2c_msg_prepare_#in~num#1, saa7146_i2c_msg_prepare_#in~op#1.base, saa7146_i2c_msg_prepare_#in~op#1.offset := saa7146_i2c_transfer_~msgs#1.base, saa7146_i2c_transfer_~msgs#1.offset, saa7146_i2c_transfer_~num#1, saa7146_i2c_transfer_~buffer~0#1.base, saa7146_i2c_transfer_~buffer~0#1.offset;havoc saa7146_i2c_msg_prepare_#res#1;havoc saa7146_i2c_msg_prepare_#t~mem51#1, saa7146_i2c_msg_prepare_#t~memset~res52#1.base, saa7146_i2c_msg_prepare_#t~memset~res52#1.offset, saa7146_i2c_msg_prepare_#t~mem53#1, saa7146_i2c_msg_prepare_#t~mem54#1, saa7146_i2c_msg_prepare_#t~mem56#1, saa7146_i2c_msg_prepare_#t~bitwise55#1, saa7146_i2c_msg_prepare_#t~bitwise57#1, saa7146_i2c_msg_prepare_#t~mem59#1, saa7146_i2c_msg_prepare_#t~bitwise58#1, saa7146_i2c_msg_prepare_#t~bitwise60#1, saa7146_i2c_msg_prepare_#t~mem64#1, saa7146_i2c_msg_prepare_#t~mem61#1.base, saa7146_i2c_msg_prepare_#t~mem61#1.offset, saa7146_i2c_msg_prepare_#t~mem62#1, saa7146_i2c_msg_prepare_#t~bitwise63#1, saa7146_i2c_msg_prepare_#t~bitwise65#1, saa7146_i2c_msg_prepare_#t~mem67#1, saa7146_i2c_msg_prepare_#t~bitwise66#1, saa7146_i2c_msg_prepare_#t~bitwise68#1, saa7146_i2c_msg_prepare_#t~mem69#1, saa7146_i2c_msg_prepare_#t~mem70#1, saa7146_i2c_msg_prepare_#t~bitwise71#1, saa7146_i2c_msg_prepare_#t~mem73#1, saa7146_i2c_msg_prepare_#t~bitwise72#1, saa7146_i2c_msg_prepare_#t~bitwise74#1, saa7146_i2c_msg_prepare_#t~mem76#1, saa7146_i2c_msg_prepare_#t~bitwise75#1, saa7146_i2c_msg_prepare_#t~bitwise77#1, saa7146_i2c_msg_prepare_~m#1.base, saa7146_i2c_msg_prepare_~m#1.offset, saa7146_i2c_msg_prepare_~num#1, saa7146_i2c_msg_prepare_~op#1.base, saa7146_i2c_msg_prepare_~op#1.offset, saa7146_i2c_msg_prepare_~h1~0#1, saa7146_i2c_msg_prepare_~h2~0#1, saa7146_i2c_msg_prepare_~i~0#1, saa7146_i2c_msg_prepare_~j~0#1, saa7146_i2c_msg_prepare_~addr~0#1, saa7146_i2c_msg_prepare_~mem~0#1, saa7146_i2c_msg_prepare_~op_count~0#1;saa7146_i2c_msg_prepare_~m#1.base, saa7146_i2c_msg_prepare_~m#1.offset := saa7146_i2c_msg_prepare_#in~m#1.base, saa7146_i2c_msg_prepare_#in~m#1.offset;saa7146_i2c_msg_prepare_~num#1 := saa7146_i2c_msg_prepare_#in~num#1;saa7146_i2c_msg_prepare_~op#1.base, saa7146_i2c_msg_prepare_~op#1.offset := saa7146_i2c_msg_prepare_#in~op#1.base, saa7146_i2c_msg_prepare_#in~op#1.offset;havoc saa7146_i2c_msg_prepare_~h1~0#1;havoc saa7146_i2c_msg_prepare_~h2~0#1;havoc saa7146_i2c_msg_prepare_~i~0#1;havoc saa7146_i2c_msg_prepare_~j~0#1;havoc saa7146_i2c_msg_prepare_~addr~0#1;havoc saa7146_i2c_msg_prepare_~mem~0#1;havoc saa7146_i2c_msg_prepare_~op_count~0#1;saa7146_i2c_msg_prepare_~mem~0#1 := 0;saa7146_i2c_msg_prepare_~op_count~0#1 := 0;saa7146_i2c_msg_prepare_~i~0#1 := 0; [2025-02-08 15:24:01,668 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5187: assume 0 != saa7146_i2c_writeout_#t~bitwise173#1 % 4294967296;havoc saa7146_i2c_writeout_#t~bitwise173#1; [2025-02-08 15:24:01,668 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5187: assume !(0 != saa7146_i2c_writeout_#t~bitwise173#1 % 4294967296);havoc saa7146_i2c_writeout_#t~bitwise173#1; [2025-02-08 15:24:01,668 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5187-1: [2025-02-08 15:24:01,668 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5253: saa7146_i2c_writeout_#t~ret192#1 := ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;havoc ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1;assume { :end_inline_ldv__builtin_expect } true;saa7146_i2c_writeout_~tmp___11~0#1 := saa7146_i2c_writeout_#t~ret192#1;havoc saa7146_i2c_writeout_#t~mem191#1;havoc saa7146_i2c_writeout_#t~ret192#1; [2025-02-08 15:24:01,668 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5253-1: saa7146_i2c_writeout_#t~ret192#1 := ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;havoc ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1;assume { :end_inline_ldv__builtin_expect } true;saa7146_i2c_writeout_~tmp___11~0#1 := saa7146_i2c_writeout_#t~ret192#1;havoc saa7146_i2c_writeout_#t~mem191#1;havoc saa7146_i2c_writeout_#t~ret192#1; [2025-02-08 15:24:01,668 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5187-4: assume 0 == saa7146_i2c_writeout_~status~1#1 % 4294967296;saa7146_i2c_writeout_#t~bitwise173#1 := 0; [2025-02-08 15:24:01,668 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5187-4: assume !(0 == saa7146_i2c_writeout_~status~1#1 % 4294967296); [2025-02-08 15:24:01,668 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5187-5: assume 0 != saa7146_i2c_writeout_#t~bitwise173#1 % 4294967296;havoc saa7146_i2c_writeout_#t~bitwise173#1; [2025-02-08 15:24:01,668 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5187-5: assume !(0 != saa7146_i2c_writeout_#t~bitwise173#1 % 4294967296);havoc saa7146_i2c_writeout_#t~bitwise173#1; [2025-02-08 15:24:01,668 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5187-2: havoc saa7146_i2c_writeout_#t~bitwise173#1;assume saa7146_i2c_writeout_#t~bitwise173#1 % 4294967296 <= saa7146_i2c_writeout_~status~1#1 % 4294967296 && saa7146_i2c_writeout_#t~bitwise173#1 % 4294967296 <= 8; [2025-02-08 15:24:01,668 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5187-3: assume 8 == saa7146_i2c_writeout_~status~1#1 % 4294967296;saa7146_i2c_writeout_#t~bitwise173#1 := saa7146_i2c_writeout_~status~1#1; [2025-02-08 15:24:01,668 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5187-3: assume !(8 == saa7146_i2c_writeout_~status~1#1 % 4294967296); [2025-02-08 15:24:01,668 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5187-8: assume 8 == saa7146_i2c_writeout_~status~1#1 % 4294967296;saa7146_i2c_writeout_#t~bitwise173#1 := saa7146_i2c_writeout_~status~1#1; [2025-02-08 15:24:01,668 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5187-8: assume !(8 == saa7146_i2c_writeout_~status~1#1 % 4294967296); [2025-02-08 15:24:01,668 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5187-9: assume 0 == saa7146_i2c_writeout_~status~1#1 % 4294967296;saa7146_i2c_writeout_#t~bitwise173#1 := 0; [2025-02-08 15:24:01,668 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5187-9: assume !(0 == saa7146_i2c_writeout_~status~1#1 % 4294967296); [2025-02-08 15:24:01,668 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5187-6: [2025-02-08 15:24:01,668 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5187-7: havoc saa7146_i2c_writeout_#t~bitwise173#1;assume saa7146_i2c_writeout_#t~bitwise173#1 % 4294967296 <= saa7146_i2c_writeout_~status~1#1 % 4294967296 && saa7146_i2c_writeout_#t~bitwise173#1 % 4294967296 <= 8; [2025-02-08 15:24:01,668 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4857-2: havoc saa7146_i2c_msg_prepare_#t~bitwise71#1; [2025-02-08 15:24:01,668 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4857-3: assume 0 == saa7146_i2c_msg_prepare_#t~mem70#1 % 4294967296 || 0 == 2 * (3 - saa7146_i2c_msg_prepare_~h2~0#1);saa7146_i2c_msg_prepare_#t~bitwise71#1 := saa7146_i2c_msg_prepare_#t~mem70#1; [2025-02-08 15:24:01,668 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4857-3: assume !(0 == saa7146_i2c_msg_prepare_#t~mem70#1 % 4294967296 || 0 == 2 * (3 - saa7146_i2c_msg_prepare_~h2~0#1)); [2025-02-08 15:24:01,668 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4857: assume 2 == saa7146_i2c_msg_prepare_#t~bitwise71#1 % 4 % 4294967296;havoc saa7146_i2c_msg_prepare_#t~mem70#1;havoc saa7146_i2c_msg_prepare_#t~bitwise71#1;call saa7146_i2c_msg_prepare_#t~mem73#1 := read~int#5(saa7146_i2c_msg_prepare_~op#1.base, saa7146_i2c_msg_prepare_~op#1.offset + 4 * (if saa7146_i2c_msg_prepare_~h1~0#1 % 18446744073709551616 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_msg_prepare_~h1~0#1 % 18446744073709551616 % 18446744073709551616 else saa7146_i2c_msg_prepare_~h1~0#1 % 18446744073709551616 % 18446744073709551616 - 18446744073709551616), 4); [2025-02-08 15:24:01,668 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4857: assume !(2 == saa7146_i2c_msg_prepare_#t~bitwise71#1 % 4 % 4294967296);havoc saa7146_i2c_msg_prepare_#t~mem70#1;havoc saa7146_i2c_msg_prepare_#t~bitwise71#1; [2025-02-08 15:24:01,668 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L4857-1: [2025-02-08 15:24:01,668 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7698: havoc schedule_timeout_#t~nondet703#1;saa7146_i2c_writeout_#t~ret140#1 := schedule_timeout_#res#1;havoc schedule_timeout_#t~nondet703#1, schedule_timeout_~arg0#1;havoc schedule_timeout_#in~arg0#1;assume { :end_inline_schedule_timeout } true;saa7146_i2c_writeout_~__ret~0#1 := saa7146_i2c_writeout_#t~ret140#1;havoc saa7146_i2c_writeout_#t~ret140#1; [2025-02-08 15:24:01,668 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L7698-2: havoc schedule_timeout_#t~nondet703#1;saa7146_i2c_writeout_#t~ret140#1 := schedule_timeout_#res#1;havoc schedule_timeout_#t~nondet703#1, schedule_timeout_~arg0#1;havoc schedule_timeout_#in~arg0#1;assume { :end_inline_schedule_timeout } true;saa7146_i2c_writeout_~__ret~0#1 := saa7146_i2c_writeout_#t~ret140#1;havoc saa7146_i2c_writeout_#t~ret140#1; [2025-02-08 15:24:01,668 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5254: assume 0 != saa7146_i2c_writeout_~tmp___11~0#1;call saa7146_i2c_writeout_#t~mem193#1 := read~int#5(saa7146_i2c_writeout_~dword#1.base, saa7146_i2c_writeout_~dword#1.offset, 4);assume { :begin_inline___dynamic_pr_debug } true;__dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset := saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset, 73, 0;havoc __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;__dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset := __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset;__dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset := __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;havoc __dynamic_pr_debug_#t~nondet691#1;__dynamic_pr_debug_#res#1 := __dynamic_pr_debug_#t~nondet691#1;havoc __dynamic_pr_debug_#t~nondet691#1; [2025-02-08 15:24:01,668 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5254: assume !(0 != saa7146_i2c_writeout_~tmp___11~0#1); [2025-02-08 15:24:01,668 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5188-1: [2025-02-08 15:24:01,668 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5188-2: havoc saa7146_i2c_writeout_#t~bitwise174#1;assume saa7146_i2c_writeout_#t~bitwise174#1 % 4294967296 <= ~saa7146_debug~0 % 4294967296 && saa7146_i2c_writeout_#t~bitwise174#1 % 4294967296 <= 8; [2025-02-08 15:24:01,668 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5254-1: assume 0 != saa7146_i2c_writeout_~tmp___11~0#1;call saa7146_i2c_writeout_#t~mem193#1 := read~int#5(saa7146_i2c_writeout_~dword#1.base, saa7146_i2c_writeout_~dword#1.offset, 4);assume { :begin_inline___dynamic_pr_debug } true;__dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset, __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset := saa7146_i2c_writeout_~#descriptor___6~0#1.base, saa7146_i2c_writeout_~#descriptor___6~0#1.offset, 73, 0;havoc __dynamic_pr_debug_#res#1;havoc __dynamic_pr_debug_#t~nondet691#1, __dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset, __dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset;__dynamic_pr_debug_~arg0#1.base, __dynamic_pr_debug_~arg0#1.offset := __dynamic_pr_debug_#in~arg0#1.base, __dynamic_pr_debug_#in~arg0#1.offset;__dynamic_pr_debug_~arg1#1.base, __dynamic_pr_debug_~arg1#1.offset := __dynamic_pr_debug_#in~arg1#1.base, __dynamic_pr_debug_#in~arg1#1.offset;havoc __dynamic_pr_debug_#t~nondet691#1;__dynamic_pr_debug_#res#1 := __dynamic_pr_debug_#t~nondet691#1;havoc __dynamic_pr_debug_#t~nondet691#1; [2025-02-08 15:24:01,669 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5254-1: assume !(0 != saa7146_i2c_writeout_~tmp___11~0#1); [2025-02-08 15:24:01,669 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5188: assume 0 != saa7146_i2c_writeout_#t~bitwise174#1 % 4294967296;havoc saa7146_i2c_writeout_#t~bitwise174#1;call write~$Pointer$#10(51, 0, saa7146_i2c_writeout_~#descriptor___3~0#1.base, saa7146_i2c_writeout_~#descriptor___3~0#1.offset, 8);call write~$Pointer$#10(52, 0, saa7146_i2c_writeout_~#descriptor___3~0#1.base, 8 + saa7146_i2c_writeout_~#descriptor___3~0#1.offset, 8);call write~$Pointer$#10(53, 0, saa7146_i2c_writeout_~#descriptor___3~0#1.base, 16 + saa7146_i2c_writeout_~#descriptor___3~0#1.offset, 8);call write~$Pointer$#10(54, 0, saa7146_i2c_writeout_~#descriptor___3~0#1.base, 24 + saa7146_i2c_writeout_~#descriptor___3~0#1.offset, 8);call write~int#10(319, saa7146_i2c_writeout_~#descriptor___3~0#1.base, 32 + saa7146_i2c_writeout_~#descriptor___3~0#1.offset, 4);call write~int#10(0, saa7146_i2c_writeout_~#descriptor___3~0#1.base, 36 + saa7146_i2c_writeout_~#descriptor___3~0#1.offset, 1);call saa7146_i2c_writeout_#t~mem175#1 := read~int#10(saa7146_i2c_writeout_~#descriptor___3~0#1.base, 36 + saa7146_i2c_writeout_~#descriptor___3~0#1.offset, 1);assume { :begin_inline_ldv__builtin_expect } true;ldv__builtin_expect_#in~exp#1, ldv__builtin_expect_#in~c#1 := (if saa7146_i2c_writeout_#t~mem175#1 % 256 % 18446744073709551616 <= 9223372036854775807 then saa7146_i2c_writeout_#t~mem175#1 % 256 % 18446744073709551616 else saa7146_i2c_writeout_#t~mem175#1 % 256 % 18446744073709551616 - 18446744073709551616) % 2, 0;havoc ldv__builtin_expect_#res#1;havoc ldv__builtin_expect_~exp#1, ldv__builtin_expect_~c#1;ldv__builtin_expect_~exp#1 := ldv__builtin_expect_#in~exp#1;ldv__builtin_expect_~c#1 := ldv__builtin_expect_#in~c#1;ldv__builtin_expect_#res#1 := ldv__builtin_expect_~exp#1; [2025-02-08 15:24:01,670 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L5188: assume !(0 != saa7146_i2c_writeout_#t~bitwise174#1 % 4294967296);havoc saa7146_i2c_writeout_#t~bitwise174#1; [2025-02-08 15:24:01,678 INFO L? ?]: Removed 71 outVars from TransFormulas that were not future-live. [2025-02-08 15:24:01,678 INFO L308 CfgBuilder]: Performing block encoding [2025-02-08 15:24:01,690 INFO L332 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-02-08 15:24:01,691 INFO L337 CfgBuilder]: Removed 3 assume(true) statements. [2025-02-08 15:24:01,692 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 08.02 03:24:01 BoogieIcfgContainer [2025-02-08 15:24:01,692 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-02-08 15:24:01,693 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-02-08 15:24:01,693 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-02-08 15:24:01,698 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-02-08 15:24:01,699 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-08 15:24:01,699 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 08.02 03:23:55" (1/3) ... [2025-02-08 15:24:01,700 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@1fbc82e1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 08.02 03:24:01, skipping insertion in model container [2025-02-08 15:24:01,700 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-08 15:24:01,700 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 03:23:57" (2/3) ... [2025-02-08 15:24:01,700 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@1fbc82e1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 08.02 03:24:01, skipping insertion in model container [2025-02-08 15:24:01,701 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-08 15:24:01,702 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 08.02 03:24:01" (3/3) ... [2025-02-08 15:24:01,703 INFO L363 chiAutomizerObserver]: Analyzing ICFG linux-3.8-rc1-32_7a-drivers--media--common--saa7146--saa7146.ko-ldv_main0.cil.out.i [2025-02-08 15:24:01,748 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-02-08 15:24:01,748 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-02-08 15:24:01,748 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-02-08 15:24:01,748 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-02-08 15:24:01,748 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-02-08 15:24:01,749 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-02-08 15:24:01,749 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-02-08 15:24:01,749 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-02-08 15:24:01,754 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 22 states, 20 states have (on average 1.55) internal successors, (31), 21 states have internal predecessors, (31), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 15:24:01,770 INFO L131 ngComponentsAnalysis]: Automaton has 0 accepting balls. 0 [2025-02-08 15:24:01,771 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is true [2025-02-08 15:24:01,777 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 08.02 03:24:01 BoogieIcfgContainer [2025-02-08 15:24:01,777 INFO L131 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2025-02-08 15:24:01,777 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-02-08 15:24:01,777 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-02-08 15:24:01,778 INFO L274 PluginConnector]: Witness Printer initialized [2025-02-08 15:24:01,779 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 08.02 03:24:01" (3/4) ... [2025-02-08 15:24:01,780 INFO L149 WitnessPrinter]: No result that supports witness generation found [2025-02-08 15:24:01,781 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-02-08 15:24:01,784 INFO L158 Benchmark]: Toolchain (without parser) took 5870.37ms. Allocated memory was 142.6MB in the beginning and 218.1MB in the end (delta: 75.5MB). Free memory was 103.4MB in the beginning and 110.1MB in the end (delta: -6.7MB). Peak memory consumption was 65.5MB. Max. memory is 16.1GB. [2025-02-08 15:24:01,784 INFO L158 Benchmark]: CDTParser took 0.34ms. Allocated memory is still 201.3MB. Free memory is still 122.5MB. There was no memory consumed. Max. memory is 16.1GB. [2025-02-08 15:24:01,784 INFO L158 Benchmark]: CACSL2BoogieTranslator took 1901.89ms. Allocated memory was 142.6MB in the beginning and 151.0MB in the end (delta: 8.4MB). Free memory was 103.4MB in the beginning and 75.2MB in the end (delta: 28.2MB). Peak memory consumption was 95.9MB. Max. memory is 16.1GB. [2025-02-08 15:24:01,785 INFO L158 Benchmark]: Boogie Procedure Inliner took 157.01ms. Allocated memory is still 151.0MB. Free memory was 75.2MB in the beginning and 56.1MB in the end (delta: 19.1MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-02-08 15:24:01,785 INFO L158 Benchmark]: Boogie Preprocessor took 319.39ms. Allocated memory is still 151.0MB. Free memory was 56.1MB in the beginning and 69.2MB in the end (delta: -13.1MB). Peak memory consumption was 29.9MB. Max. memory is 16.1GB. [2025-02-08 15:24:01,788 INFO L158 Benchmark]: IcfgBuilder took 3398.15ms. Allocated memory was 151.0MB in the beginning and 218.1MB in the end (delta: 67.1MB). Free memory was 69.2MB in the beginning and 116.1MB in the end (delta: -46.9MB). Peak memory consumption was 89.7MB. Max. memory is 16.1GB. [2025-02-08 15:24:01,788 INFO L158 Benchmark]: BuchiAutomizer took 83.88ms. Allocated memory is still 218.1MB. Free memory was 116.1MB in the beginning and 110.1MB in the end (delta: 6.0MB). There was no memory consumed. Max. memory is 16.1GB. [2025-02-08 15:24:01,788 INFO L158 Benchmark]: Witness Printer took 3.32ms. Allocated memory is still 218.1MB. Free memory is still 110.1MB. There was no memory consumed. Max. memory is 16.1GB. [2025-02-08 15:24:01,791 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.34ms. Allocated memory is still 201.3MB. Free memory is still 122.5MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 1901.89ms. Allocated memory was 142.6MB in the beginning and 151.0MB in the end (delta: 8.4MB). Free memory was 103.4MB in the beginning and 75.2MB in the end (delta: 28.2MB). Peak memory consumption was 95.9MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 157.01ms. Allocated memory is still 151.0MB. Free memory was 75.2MB in the beginning and 56.1MB in the end (delta: 19.1MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * Boogie Preprocessor took 319.39ms. Allocated memory is still 151.0MB. Free memory was 56.1MB in the beginning and 69.2MB in the end (delta: -13.1MB). Peak memory consumption was 29.9MB. Max. memory is 16.1GB. * IcfgBuilder took 3398.15ms. Allocated memory was 151.0MB in the beginning and 218.1MB in the end (delta: 67.1MB). Free memory was 69.2MB in the beginning and 116.1MB in the end (delta: -46.9MB). Peak memory consumption was 89.7MB. Max. memory is 16.1GB. * BuchiAutomizer took 83.88ms. Allocated memory is still 218.1MB. Free memory was 116.1MB in the beginning and 110.1MB in the end (delta: 6.0MB). There was no memory consumed. Max. memory is 16.1GB. * Witness Printer took 3.32ms. Allocated memory is still 218.1MB. Free memory is still 110.1MB. There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: - GenericResultAtLocation [Line: 4603]: Unsoundness Warning Ignoring inline assembler instruction C: __asm__ volatile ("bt %2,%1\n\tsbb %0,%0": "=r" (oldbit): "m" (*((unsigned long *)addr)), "Ir" (nr)); [4603-4604] - GenericResultAtLocation [Line: 4618]: Unsoundness Warning Ignoring inline assembler instruction C: __asm__ ("movb %%gs:%P1,%0": "=q" (pfo_ret__): "p" (& current_task)); [4618] - GenericResultAtLocation [Line: 4621]: Unsoundness Warning Ignoring inline assembler instruction C: __asm__ ("movw %%gs:%P1,%0": "=r" (pfo_ret__): "p" (& current_task)); [4621] - GenericResultAtLocation [Line: 4624]: Unsoundness Warning Ignoring inline assembler instruction C: __asm__ ("movl %%gs:%P1,%0": "=r" (pfo_ret__): "p" (& current_task)); [4624] - GenericResultAtLocation [Line: 4627]: Unsoundness Warning Ignoring inline assembler instruction C: __asm__ ("movq %%gs:%P1,%0": "=r" (pfo_ret__): "p" (& current_task)); [4627] - GenericResultAtLocation [Line: 4694]: Unsoundness Warning Ignoring inline assembler instruction C: __asm__ volatile ("movl %1,%0": "=r" (ret): "m" (*((unsigned int volatile *)addr)): "memory"); [4694] - GenericResultAtLocation [Line: 4701]: Unsoundness Warning Ignoring inline assembler instruction C: __asm__ volatile ("movl %0,%1": : "r" (val), "m" (*((unsigned int volatile *)addr)): "memory"); [4701] - GenericResultAtLocation [Line: 5674]: Unsoundness Warning Ignoring inline assembler instruction C: __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.long 1b - 2b, %c0 - 2b\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"/work/ldvuser/exper_fp/inst/current/envs/linux-3.10-rc1.tar/linux-3.10-rc1/arch/x86/include/asm/paravirt.h"), "i" (824), "i" (12UL)); [5674-5675] - GenericResultAtLocation [Line: 5680]: Unsoundness Warning Ignoring inline assembler instruction C: __asm__ volatile ("771:\n\tcall *%c2;\n772:\n.pushsection .parainstructions,\"a\"\n .balign 8 \n .quad 771b\n .byte %c1\n .byte 772b-771b\n .short %c3\n.popsection\n": "=a" (__eax): [paravirt_typenum] "i" (44UL), [paravirt_opptr] "i" (& pv_irq_ops.save_fl.func), [paravirt_clobber] "i" (1): "memory", "cc"); [5680-5682] - GenericResultAtLocation [Line: 5811]: Unsoundness Warning Ignoring inline assembler instruction C: __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.long 1b - 2b, %c0 - 2b\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"include/linux/scatterlist.h"), "i" (65), "i" (12UL)); [5811-5812] - GenericResultAtLocation [Line: 5819]: Unsoundness Warning Ignoring inline assembler instruction C: __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.long 1b - 2b, %c0 - 2b\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"include/linux/scatterlist.h"), "i" (67), "i" (12UL)); [5819-5820] - GenericResultAtLocation [Line: 5827]: Unsoundness Warning Ignoring inline assembler instruction C: __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.long 1b - 2b, %c0 - 2b\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"include/linux/scatterlist.h"), "i" (68), "i" (12UL)); [5827-5828] - GenericResultAtLocation [Line: 5854]: Unsoundness Warning Ignoring inline assembler instruction C: __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.long 1b - 2b, %c0 - 2b\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"include/linux/scatterlist.h"), "i" (98), "i" (12UL)); [5854-5855] - GenericResultAtLocation [Line: 5862]: Unsoundness Warning Ignoring inline assembler instruction C: __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.long 1b - 2b, %c0 - 2b\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"include/linux/scatterlist.h"), "i" (99), "i" (12UL)); [5862-5863] - GenericResultAtLocation [Line: 5951]: Unsoundness Warning Ignoring inline assembler instruction C: __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.long 1b - 2b, %c0 - 2b\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"include/asm-generic/dma-mapping-common.h"), "i" (52), "i" (12UL)); [5951-5952] - GenericResultAtLocation [Line: 5976]: Unsoundness Warning Ignoring inline assembler instruction C: __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.long 1b - 2b, %c0 - 2b\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"include/asm-generic/dma-mapping-common.h"), "i" (65), "i" (12UL)); [5976-5977] - GenericResultAtLocation [Line: 6174]: Unsoundness Warning Ignoring inline assembler instruction C: __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.long 1b - 2b, %c0 - 2b\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"/work/ldvuser/exper_fp/work/current--X--drivers--X--defaultlinux-3.10-rc1.tar--X--32_7a--X--cpachecker/linux-3.10-rc1.tar/csd_deg_dscv/2093/dscv_tempdir/dscv/ri/32_7a/drivers/media/common/saa7146/saa7146_core.c.prepared"), "i" (99), "i" (12UL)); [6174-6175] - GenericResultAtLocation [Line: 6359]: Unsoundness Warning Ignoring inline assembler instruction C: __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.long 1b - 2b, %c0 - 2b\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"/work/ldvuser/exper_fp/work/current--X--drivers--X--defaultlinux-3.10-rc1.tar--X--32_7a--X--cpachecker/linux-3.10-rc1.tar/csd_deg_dscv/2093/dscv_tempdir/dscv/ri/32_7a/drivers/media/common/saa7146/saa7146_core.c.prepared"), "i" (210), "i" (12UL)); [6359-6360] - GenericResultAtLocation [Line: 6490]: Unsoundness Warning Ignoring inline assembler instruction C: __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.long 1b - 2b, %c0 - 2b\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"/work/ldvuser/exper_fp/work/current--X--drivers--X--defaultlinux-3.10-rc1.tar--X--32_7a--X--cpachecker/linux-3.10-rc1.tar/csd_deg_dscv/2093/dscv_tempdir/dscv/ri/32_7a/drivers/media/common/saa7146/saa7146_core.c.prepared"), "i" (301), "i" (12UL)); [6490-6491] - GenericResultAtLocation [Line: 6498]: Unsoundness Warning Ignoring inline assembler instruction C: __asm__ volatile ("1:\tud2\n.pushsection __bug_table,\"a\"\n2:\t.long 1b - 2b, %c0 - 2b\n\t.word %c1, 0\n\t.org 2b+%c2\n.popsection": : "i" ((char *)"/work/ldvuser/exper_fp/work/current--X--drivers--X--defaultlinux-3.10-rc1.tar--X--32_7a--X--cpachecker/linux-3.10-rc1.tar/csd_deg_dscv/2093/dscv_tempdir/dscv/ri/32_7a/drivers/media/common/saa7146/saa7146_core.c.prepared"), "i" (302), "i" (12UL)); [6498-6499] * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Trivial decomposition. There is no loop in your program. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 0.0s and 0 iterations. TraceHistogramMax:0. Analysis of lassos took 0.0s. Construction of modules took 0.0s. Büchi inclusion checks took 0.0s. Highest rank in rank-based complementation 0. Minimization of det autom 0. Minimization of nondet autom 0. Automata minimization No data available. Non-live state removal took 0.0s Buchi closure took 0.0s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: LassoAnalysisResults: nont0 unkn0 SFLI0 SFLT0 conc0 concLT0 SILN0 SILU0 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Termination proven Buchi Automizer proved that your program is terminating RESULT: Ultimate proved your program to be correct! [2025-02-08 15:24:01,810 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Result: TRUE