./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/locks/test_locks_13.c --full-output --architecture 32bit


--------------------------------------------------------------------------------


Checking for termination
Using default analysis
Version 48c9605d
Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/locks/test_locks_13.c -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) )

 --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 8fd6142dd23f608c3bc9ae24389b4aee583128e9e6b549483298584de0c08ecd
--- Real Ultimate output ---
This is Ultimate 0.3.0-?-48c9605-m
[2025-02-08 14:31:40,009 INFO  L188        SettingsManager]: Resetting all preferences to default values...
[2025-02-08 14:31:40,046 INFO  L114        SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf
[2025-02-08 14:31:40,050 WARN  L101        SettingsManager]: Preference file contains the following unknown settings:
[2025-02-08 14:31:40,050 WARN  L103        SettingsManager]:   * de.uni_freiburg.informatik.ultimate.core.Log level for class
[2025-02-08 14:31:40,050 WARN  L103        SettingsManager]:   * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG
[2025-02-08 14:31:40,075 INFO  L130        SettingsManager]: Preferences different from defaults after loading the file:
[2025-02-08 14:31:40,077 INFO  L151        SettingsManager]: Preferences of UltimateCore differ from their defaults:
[2025-02-08 14:31:40,077 INFO  L153        SettingsManager]:  * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR;
[2025-02-08 14:31:40,077 INFO  L151        SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults:
[2025-02-08 14:31:40,078 INFO  L153        SettingsManager]:  * Use memory slicer=true
[2025-02-08 14:31:40,078 INFO  L151        SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults:
[2025-02-08 14:31:40,078 INFO  L153        SettingsManager]:  * Create parallel compositions if possible=false
[2025-02-08 14:31:40,078 INFO  L153        SettingsManager]:  * Use SBE=true
[2025-02-08 14:31:40,078 INFO  L151        SettingsManager]: Preferences of BuchiAutomizer differ from their defaults:
[2025-02-08 14:31:40,078 INFO  L153        SettingsManager]:  * NCSB implementation=INTSET_LAZY3
[2025-02-08 14:31:40,078 INFO  L153        SettingsManager]:  * Use old map elimination=false
[2025-02-08 14:31:40,078 INFO  L153        SettingsManager]:  * Use external solver (rank synthesis)=false
[2025-02-08 14:31:40,078 INFO  L153        SettingsManager]:  * Use only trivial implications for array writes=true
[2025-02-08 14:31:40,078 INFO  L153        SettingsManager]:  * Rank analysis=LINEAR_WITH_GUESSES
[2025-02-08 14:31:40,078 INFO  L151        SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults:
[2025-02-08 14:31:40,078 INFO  L153        SettingsManager]:  * Pointer base address is valid at dereference=ASSUME
[2025-02-08 14:31:40,078 INFO  L153        SettingsManager]:  * sizeof long=4
[2025-02-08 14:31:40,078 INFO  L153        SettingsManager]:  * Overapproximate operations on floating types=true
[2025-02-08 14:31:40,079 INFO  L153        SettingsManager]:  * sizeof POINTER=4
[2025-02-08 14:31:40,079 INFO  L153        SettingsManager]:  * Check division by zero=IGNORE
[2025-02-08 14:31:40,079 INFO  L153        SettingsManager]:  * Pointer to allocated memory at dereference=ASSUME
[2025-02-08 14:31:40,079 INFO  L153        SettingsManager]:  * If two pointers are subtracted or compared they have the same base address=ASSUME
[2025-02-08 14:31:40,079 INFO  L153        SettingsManager]:  * Check array bounds for arrays that are off heap=ASSUME
[2025-02-08 14:31:40,079 INFO  L153        SettingsManager]:  * Check unreachability of reach_error function=false
[2025-02-08 14:31:40,079 INFO  L153        SettingsManager]:  * sizeof long double=12
[2025-02-08 14:31:40,079 INFO  L153        SettingsManager]:  * Check if freed pointer was valid=false
[2025-02-08 14:31:40,079 INFO  L153        SettingsManager]:  * Assume nondeterminstic values are in range=false
[2025-02-08 14:31:40,079 INFO  L153        SettingsManager]:  * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR
[2025-02-08 14:31:40,079 INFO  L153        SettingsManager]:  * Use constant arrays=true
[2025-02-08 14:31:40,079 INFO  L151        SettingsManager]: Preferences of IcfgBuilder differ from their defaults:
[2025-02-08 14:31:40,079 INFO  L153        SettingsManager]:  * Size of a code block=SequenceOfStatements
[2025-02-08 14:31:40,079 INFO  L151        SettingsManager]: Preferences of TraceAbstraction differ from their defaults:
[2025-02-08 14:31:40,079 INFO  L153        SettingsManager]:  * Trace refinement strategy=CAMEL
[2025-02-08 14:31:40,079 INFO  L151        SettingsManager]: Preferences of IcfgTransformer differ from their defaults:
[2025-02-08 14:31:40,079 INFO  L153        SettingsManager]:  * TransformationType=MODULO_NEIGHBOR
Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) )


Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit
Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 8fd6142dd23f608c3bc9ae24389b4aee583128e9e6b549483298584de0c08ecd
[2025-02-08 14:31:40,305 INFO  L75    nceAwareModelManager]: Repository-Root is: /tmp
[2025-02-08 14:31:40,311 INFO  L261   ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized
[2025-02-08 14:31:40,312 INFO  L217   ainManager$Toolchain]: [Toolchain 1]: Toolchain selected.
[2025-02-08 14:31:40,313 INFO  L270        PluginConnector]: Initializing CDTParser...
[2025-02-08 14:31:40,313 INFO  L274        PluginConnector]: CDTParser initialized
[2025-02-08 14:31:40,314 INFO  L431   ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/locks/test_locks_13.c
[2025-02-08 14:31:41,501 INFO  L533              CDTParser]: Created temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/f74359d63/c15a2354cf9340eca75f6d7a62461943/FLAGef48d6877
[2025-02-08 14:31:41,720 INFO  L384              CDTParser]: Found 1 translation units.
[2025-02-08 14:31:41,723 INFO  L180              CDTParser]: Scanning /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/locks/test_locks_13.c
[2025-02-08 14:31:41,749 INFO  L427              CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/f74359d63/c15a2354cf9340eca75f6d7a62461943/FLAGef48d6877
[2025-02-08 14:31:41,768 INFO  L435              CDTParser]: Successfully deleted /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/f74359d63/c15a2354cf9340eca75f6d7a62461943
[2025-02-08 14:31:41,770 INFO  L299   ainManager$Toolchain]: ####################### [Toolchain 1] #######################
[2025-02-08 14:31:41,771 INFO  L133        ToolchainWalker]: Walking toolchain with 6 elements.
[2025-02-08 14:31:41,772 INFO  L112        PluginConnector]: ------------------------CACSL2BoogieTranslator----------------------------
[2025-02-08 14:31:41,772 INFO  L270        PluginConnector]: Initializing CACSL2BoogieTranslator...
[2025-02-08 14:31:41,775 INFO  L274        PluginConnector]: CACSL2BoogieTranslator initialized
[2025-02-08 14:31:41,775 INFO  L184        PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.02 02:31:41" (1/1) ...
[2025-02-08 14:31:41,776 INFO  L204        PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@19211522 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:31:41, skipping insertion in model container
[2025-02-08 14:31:41,776 INFO  L184        PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.02 02:31:41" (1/1) ...
[2025-02-08 14:31:41,791 INFO  L175         MainTranslator]: Built tables and reachable declarations
[2025-02-08 14:31:41,889 INFO  L210          PostProcessor]: Analyzing one entry point: main
[2025-02-08 14:31:41,896 INFO  L200         MainTranslator]: Completed pre-run
[2025-02-08 14:31:41,910 INFO  L210          PostProcessor]: Analyzing one entry point: main
[2025-02-08 14:31:41,918 INFO  L204         MainTranslator]: Completed translation
[2025-02-08 14:31:41,919 INFO  L201        PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:31:41 WrapperNode
[2025-02-08 14:31:41,919 INFO  L131        PluginConnector]: ------------------------ END CACSL2BoogieTranslator----------------------------
[2025-02-08 14:31:41,920 INFO  L112        PluginConnector]: ------------------------Boogie Procedure Inliner----------------------------
[2025-02-08 14:31:41,920 INFO  L270        PluginConnector]: Initializing Boogie Procedure Inliner...
[2025-02-08 14:31:41,920 INFO  L274        PluginConnector]: Boogie Procedure Inliner initialized
[2025-02-08 14:31:41,923 INFO  L184        PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:31:41" (1/1) ...
[2025-02-08 14:31:41,927 INFO  L184        PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:31:41" (1/1) ...
[2025-02-08 14:31:41,938 INFO  L138                Inliner]: procedures = 12, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 168
[2025-02-08 14:31:41,938 INFO  L131        PluginConnector]: ------------------------ END Boogie Procedure Inliner----------------------------
[2025-02-08 14:31:41,938 INFO  L112        PluginConnector]: ------------------------Boogie Preprocessor----------------------------
[2025-02-08 14:31:41,938 INFO  L270        PluginConnector]: Initializing Boogie Preprocessor...
[2025-02-08 14:31:41,939 INFO  L274        PluginConnector]: Boogie Preprocessor initialized
[2025-02-08 14:31:41,943 INFO  L184        PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:31:41" (1/1) ...
[2025-02-08 14:31:41,943 INFO  L184        PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:31:41" (1/1) ...
[2025-02-08 14:31:41,944 INFO  L184        PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:31:41" (1/1) ...
[2025-02-08 14:31:41,950 INFO  L175           MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0].
[2025-02-08 14:31:41,950 INFO  L184        PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:31:41" (1/1) ...
[2025-02-08 14:31:41,950 INFO  L184        PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:31:41" (1/1) ...
[2025-02-08 14:31:41,952 INFO  L184        PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:31:41" (1/1) ...
[2025-02-08 14:31:41,953 INFO  L184        PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:31:41" (1/1) ...
[2025-02-08 14:31:41,953 INFO  L184        PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:31:41" (1/1) ...
[2025-02-08 14:31:41,954 INFO  L184        PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:31:41" (1/1) ...
[2025-02-08 14:31:41,954 INFO  L131        PluginConnector]: ------------------------ END Boogie Preprocessor----------------------------
[2025-02-08 14:31:41,955 INFO  L112        PluginConnector]: ------------------------IcfgBuilder----------------------------
[2025-02-08 14:31:41,955 INFO  L270        PluginConnector]: Initializing IcfgBuilder...
[2025-02-08 14:31:41,955 INFO  L274        PluginConnector]: IcfgBuilder initialized
[2025-02-08 14:31:41,956 INFO  L184        PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:31:41" (1/1) ...
[2025-02-08 14:31:41,959 INFO  L173          SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000
[2025-02-08 14:31:41,972 INFO  L189       MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3
[2025-02-08 14:31:41,981 INFO  L229       MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null)
[2025-02-08 14:31:41,992 INFO  L327       MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process
[2025-02-08 14:31:42,006 INFO  L130     BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit
[2025-02-08 14:31:42,006 INFO  L130     BoogieDeclarations]: Found specification of procedure ULTIMATE.start
[2025-02-08 14:31:42,006 INFO  L138     BoogieDeclarations]: Found implementation of procedure ULTIMATE.start
[2025-02-08 14:31:42,006 INFO  L130     BoogieDeclarations]: Found specification of procedure write~init~int#0
[2025-02-08 14:31:42,050 INFO  L257             CfgBuilder]: Building ICFG
[2025-02-08 14:31:42,051 INFO  L287             CfgBuilder]: Building CFG for each procedure with an implementation
[2025-02-08 14:31:42,233 INFO  L1324  $ProcedureCfgBuilder]: dead code at ProgramPoint L205: assume { :begin_inline_reach_error } true;assume false;assume { :end_inline_reach_error } true;assume false;main_#res#1 := 0;
[2025-02-08 14:31:42,250 INFO  L?                        ?]: Removed 30 outVars from TransFormulas that were not future-live.
[2025-02-08 14:31:42,250 INFO  L308             CfgBuilder]: Performing block encoding
[2025-02-08 14:31:42,259 INFO  L332             CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start)
[2025-02-08 14:31:42,259 INFO  L337             CfgBuilder]: Removed 0 assume(true) statements.
[2025-02-08 14:31:42,259 INFO  L201        PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 08.02 02:31:42 BoogieIcfgContainer
[2025-02-08 14:31:42,259 INFO  L131        PluginConnector]: ------------------------ END IcfgBuilder----------------------------
[2025-02-08 14:31:42,260 INFO  L112        PluginConnector]: ------------------------BuchiAutomizer----------------------------
[2025-02-08 14:31:42,260 INFO  L270        PluginConnector]: Initializing BuchiAutomizer...
[2025-02-08 14:31:42,265 INFO  L274        PluginConnector]: BuchiAutomizer initialized
[2025-02-08 14:31:42,266 INFO  L99          BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis
[2025-02-08 14:31:42,266 INFO  L184        PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 08.02 02:31:41" (1/3) ...
[2025-02-08 14:31:42,267 INFO  L204        PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@3917d2df and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 08.02 02:31:42, skipping insertion in model container
[2025-02-08 14:31:42,268 INFO  L99          BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis
[2025-02-08 14:31:42,268 INFO  L184        PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:31:41" (2/3) ...
[2025-02-08 14:31:42,268 INFO  L204        PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@3917d2df and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 08.02 02:31:42, skipping insertion in model container
[2025-02-08 14:31:42,268 INFO  L99          BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis
[2025-02-08 14:31:42,268 INFO  L184        PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 08.02 02:31:42" (3/3) ...
[2025-02-08 14:31:42,269 INFO  L363   chiAutomizerObserver]: Analyzing ICFG test_locks_13.c
[2025-02-08 14:31:42,304 INFO  L306   stractBuchiCegarLoop]: Interprodecural is true
[2025-02-08 14:31:42,304 INFO  L307   stractBuchiCegarLoop]: Hoare is None
[2025-02-08 14:31:42,304 INFO  L308   stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates
[2025-02-08 14:31:42,304 INFO  L309   stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE
[2025-02-08 14:31:42,305 INFO  L310   stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION
[2025-02-08 14:31:42,305 INFO  L311   stractBuchiCegarLoop]: Difference is false
[2025-02-08 14:31:42,305 INFO  L312   stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA
[2025-02-08 14:31:42,305 INFO  L316   stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ========
[2025-02-08 14:31:42,309 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand  has 47 states, 44 states have (on average 1.9318181818181819) internal successors, (85), 46 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-08 14:31:42,320 INFO  L131   ngComponentsAnalysis]: Automaton has 1 accepting balls. 41
[2025-02-08 14:31:42,321 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2025-02-08 14:31:42,321 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2025-02-08 14:31:42,325 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1]
[2025-02-08 14:31:42,325 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2025-02-08 14:31:42,325 INFO  L338   stractBuchiCegarLoop]: ======== Iteration 1 ============
[2025-02-08 14:31:42,326 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand  has 47 states, 44 states have (on average 1.9318181818181819) internal successors, (85), 46 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-08 14:31:42,327 INFO  L131   ngComponentsAnalysis]: Automaton has 1 accepting balls. 41
[2025-02-08 14:31:42,328 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2025-02-08 14:31:42,328 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2025-02-08 14:31:42,329 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1]
[2025-02-08 14:31:42,329 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2025-02-08 14:31:42,333 INFO  L752   eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" 
[2025-02-08 14:31:42,333 INFO  L754   eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume 0 != main_~p1~0#1;main_~lk1~0#1 := 1;" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" 
[2025-02-08 14:31:42,336 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-08 14:31:42,337 INFO  L85        PathProgramCache]: Analyzing trace with hash 159, now seen corresponding path program 1 times
[2025-02-08 14:31:42,341 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-08 14:31:42,342 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [725554988]
[2025-02-08 14:31:42,342 INFO  L97    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2025-02-08 14:31:42,342 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-08 14:31:42,381 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes.
[2025-02-08 14:31:42,388 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements.
[2025-02-08 14:31:42,388 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-08 14:31:42,388 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-08 14:31:42,388 INFO  L348             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2025-02-08 14:31:42,391 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes.
[2025-02-08 14:31:42,392 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements.
[2025-02-08 14:31:42,392 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-08 14:31:42,392 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-08 14:31:42,402 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2025-02-08 14:31:42,404 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-08 14:31:42,404 INFO  L85        PathProgramCache]: Analyzing trace with hash -2075109911, now seen corresponding path program 1 times
[2025-02-08 14:31:42,404 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-08 14:31:42,404 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1552698764]
[2025-02-08 14:31:42,404 INFO  L97    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2025-02-08 14:31:42,404 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-08 14:31:42,409 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes.
[2025-02-08 14:31:42,417 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements.
[2025-02-08 14:31:42,417 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-08 14:31:42,417 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2025-02-08 14:31:42,482 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2025-02-08 14:31:42,483 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2025-02-08 14:31:42,483 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1552698764]
[2025-02-08 14:31:42,483 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1552698764] provided 1 perfect and 0 imperfect interpolant sequences
[2025-02-08 14:31:42,483 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2025-02-08 14:31:42,484 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2025-02-08 14:31:42,484 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1307163132]
[2025-02-08 14:31:42,484 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2025-02-08 14:31:42,486 INFO  L769   eck$LassoCheckResult]: loop already infeasible
[2025-02-08 14:31:42,487 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2025-02-08 14:31:42,502 INFO  L144   InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2025-02-08 14:31:42,503 INFO  L146   InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2025-02-08 14:31:42,504 INFO  L87              Difference]: Start difference. First operand  has 47 states, 44 states have (on average 1.9318181818181819) internal successors, (85), 46 states have internal predecessors, (85), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand  has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-08 14:31:42,525 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2025-02-08 14:31:42,525 INFO  L93              Difference]: Finished difference Result 86 states and 159 transitions.
[2025-02-08 14:31:42,526 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 86 states and 159 transitions.
[2025-02-08 14:31:42,528 INFO  L131   ngComponentsAnalysis]: Automaton has 2 accepting balls. 81
[2025-02-08 14:31:42,532 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 86 states to 82 states and 132 transitions.
[2025-02-08 14:31:42,533 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 82
[2025-02-08 14:31:42,533 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 82
[2025-02-08 14:31:42,533 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 82 states and 132 transitions.
[2025-02-08 14:31:42,534 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2025-02-08 14:31:42,534 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 82 states and 132 transitions.
[2025-02-08 14:31:42,542 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 82 states and 132 transitions.
[2025-02-08 14:31:42,550 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 82.
[2025-02-08 14:31:42,551 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 82 states, 82 states have (on average 1.6097560975609757) internal successors, (132), 81 states have internal predecessors, (132), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-08 14:31:42,552 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 132 transitions.
[2025-02-08 14:31:42,552 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 82 states and 132 transitions.
[2025-02-08 14:31:42,553 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2025-02-08 14:31:42,555 INFO  L432   stractBuchiCegarLoop]: Abstraction has 82 states and 132 transitions.
[2025-02-08 14:31:42,555 INFO  L338   stractBuchiCegarLoop]: ======== Iteration 2 ============
[2025-02-08 14:31:42,555 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 82 states and 132 transitions.
[2025-02-08 14:31:42,556 INFO  L131   ngComponentsAnalysis]: Automaton has 2 accepting balls. 81
[2025-02-08 14:31:42,556 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2025-02-08 14:31:42,557 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2025-02-08 14:31:42,557 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1]
[2025-02-08 14:31:42,557 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2025-02-08 14:31:42,557 INFO  L752   eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" 
[2025-02-08 14:31:42,557 INFO  L754   eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" 
[2025-02-08 14:31:42,558 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-08 14:31:42,558 INFO  L85        PathProgramCache]: Analyzing trace with hash 159, now seen corresponding path program 2 times
[2025-02-08 14:31:42,558 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-08 14:31:42,558 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1317594666]
[2025-02-08 14:31:42,558 INFO  L95    rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1
[2025-02-08 14:31:42,558 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-08 14:31:42,561 INFO  L108    AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes.
[2025-02-08 14:31:42,563 INFO  L111    AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements.
[2025-02-08 14:31:42,563 INFO  L114    AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s)
[2025-02-08 14:31:42,563 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-08 14:31:42,563 INFO  L348             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2025-02-08 14:31:42,564 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes.
[2025-02-08 14:31:42,566 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements.
[2025-02-08 14:31:42,566 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-08 14:31:42,566 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-08 14:31:42,567 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2025-02-08 14:31:42,567 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-08 14:31:42,568 INFO  L85        PathProgramCache]: Analyzing trace with hash -2044090104, now seen corresponding path program 1 times
[2025-02-08 14:31:42,568 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-08 14:31:42,568 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1721595202]
[2025-02-08 14:31:42,568 INFO  L97    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2025-02-08 14:31:42,568 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-08 14:31:42,572 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes.
[2025-02-08 14:31:42,577 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements.
[2025-02-08 14:31:42,577 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-08 14:31:42,577 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2025-02-08 14:31:42,603 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2025-02-08 14:31:42,604 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2025-02-08 14:31:42,604 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1721595202]
[2025-02-08 14:31:42,604 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1721595202] provided 1 perfect and 0 imperfect interpolant sequences
[2025-02-08 14:31:42,604 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2025-02-08 14:31:42,604 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2025-02-08 14:31:42,604 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [2139695622]
[2025-02-08 14:31:42,604 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2025-02-08 14:31:42,604 INFO  L769   eck$LassoCheckResult]: loop already infeasible
[2025-02-08 14:31:42,604 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2025-02-08 14:31:42,605 INFO  L144   InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2025-02-08 14:31:42,605 INFO  L146   InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2025-02-08 14:31:42,605 INFO  L87              Difference]: Start difference. First operand 82 states and 132 transitions. cyclomatic complexity: 52 Second operand  has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-08 14:31:42,619 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2025-02-08 14:31:42,619 INFO  L93              Difference]: Finished difference Result 161 states and 257 transitions.
[2025-02-08 14:31:42,619 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 161 states and 257 transitions.
[2025-02-08 14:31:42,621 INFO  L131   ngComponentsAnalysis]: Automaton has 4 accepting balls. 160
[2025-02-08 14:31:42,622 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 161 states to 161 states and 257 transitions.
[2025-02-08 14:31:42,622 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 161
[2025-02-08 14:31:42,623 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 161
[2025-02-08 14:31:42,623 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 161 states and 257 transitions.
[2025-02-08 14:31:42,623 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2025-02-08 14:31:42,623 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 161 states and 257 transitions.
[2025-02-08 14:31:42,623 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 161 states and 257 transitions.
[2025-02-08 14:31:42,628 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 161.
[2025-02-08 14:31:42,629 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 161 states, 161 states have (on average 1.5962732919254659) internal successors, (257), 160 states have internal predecessors, (257), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-08 14:31:42,630 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 257 transitions.
[2025-02-08 14:31:42,630 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 161 states and 257 transitions.
[2025-02-08 14:31:42,630 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2025-02-08 14:31:42,631 INFO  L432   stractBuchiCegarLoop]: Abstraction has 161 states and 257 transitions.
[2025-02-08 14:31:42,631 INFO  L338   stractBuchiCegarLoop]: ======== Iteration 3 ============
[2025-02-08 14:31:42,631 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 161 states and 257 transitions.
[2025-02-08 14:31:42,633 INFO  L131   ngComponentsAnalysis]: Automaton has 4 accepting balls. 160
[2025-02-08 14:31:42,633 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2025-02-08 14:31:42,633 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2025-02-08 14:31:42,633 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1]
[2025-02-08 14:31:42,633 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2025-02-08 14:31:42,633 INFO  L752   eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" 
[2025-02-08 14:31:42,634 INFO  L754   eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" 
[2025-02-08 14:31:42,634 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-08 14:31:42,634 INFO  L85        PathProgramCache]: Analyzing trace with hash 159, now seen corresponding path program 3 times
[2025-02-08 14:31:42,634 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-08 14:31:42,634 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2016796164]
[2025-02-08 14:31:42,634 INFO  L95    rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2
[2025-02-08 14:31:42,634 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-08 14:31:42,638 INFO  L108    AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 1 statements into 1 equivalence classes.
[2025-02-08 14:31:42,639 INFO  L111    AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 1 of 1 statements.
[2025-02-08 14:31:42,639 INFO  L114    AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s)
[2025-02-08 14:31:42,639 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-08 14:31:42,639 INFO  L348             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2025-02-08 14:31:42,640 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes.
[2025-02-08 14:31:42,641 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements.
[2025-02-08 14:31:42,641 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-08 14:31:42,641 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-08 14:31:42,642 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2025-02-08 14:31:42,643 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-08 14:31:42,643 INFO  L85        PathProgramCache]: Analyzing trace with hash 173667849, now seen corresponding path program 1 times
[2025-02-08 14:31:42,643 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-08 14:31:42,643 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1401893131]
[2025-02-08 14:31:42,643 INFO  L97    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2025-02-08 14:31:42,643 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-08 14:31:42,648 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes.
[2025-02-08 14:31:42,652 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements.
[2025-02-08 14:31:42,652 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-08 14:31:42,652 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2025-02-08 14:31:42,682 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2025-02-08 14:31:42,682 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2025-02-08 14:31:42,682 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1401893131]
[2025-02-08 14:31:42,682 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1401893131] provided 1 perfect and 0 imperfect interpolant sequences
[2025-02-08 14:31:42,682 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2025-02-08 14:31:42,683 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2025-02-08 14:31:42,683 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [948985199]
[2025-02-08 14:31:42,683 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2025-02-08 14:31:42,683 INFO  L769   eck$LassoCheckResult]: loop already infeasible
[2025-02-08 14:31:42,683 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2025-02-08 14:31:42,683 INFO  L144   InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2025-02-08 14:31:42,684 INFO  L146   InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2025-02-08 14:31:42,684 INFO  L87              Difference]: Start difference. First operand 161 states and 257 transitions. cyclomatic complexity: 100 Second operand  has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-08 14:31:42,705 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2025-02-08 14:31:42,705 INFO  L93              Difference]: Finished difference Result 317 states and 501 transitions.
[2025-02-08 14:31:42,706 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 317 states and 501 transitions.
[2025-02-08 14:31:42,709 INFO  L131   ngComponentsAnalysis]: Automaton has 8 accepting balls. 316
[2025-02-08 14:31:42,715 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 317 states to 317 states and 501 transitions.
[2025-02-08 14:31:42,719 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 317
[2025-02-08 14:31:42,720 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 317
[2025-02-08 14:31:42,720 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 317 states and 501 transitions.
[2025-02-08 14:31:42,721 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2025-02-08 14:31:42,721 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 317 states and 501 transitions.
[2025-02-08 14:31:42,722 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 317 states and 501 transitions.
[2025-02-08 14:31:42,739 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 317 to 317.
[2025-02-08 14:31:42,743 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 317 states, 317 states have (on average 1.5804416403785488) internal successors, (501), 316 states have internal predecessors, (501), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-08 14:31:42,745 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 317 states to 317 states and 501 transitions.
[2025-02-08 14:31:42,745 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 317 states and 501 transitions.
[2025-02-08 14:31:42,750 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2025-02-08 14:31:42,751 INFO  L432   stractBuchiCegarLoop]: Abstraction has 317 states and 501 transitions.
[2025-02-08 14:31:42,751 INFO  L338   stractBuchiCegarLoop]: ======== Iteration 4 ============
[2025-02-08 14:31:42,751 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 317 states and 501 transitions.
[2025-02-08 14:31:42,753 INFO  L131   ngComponentsAnalysis]: Automaton has 8 accepting balls. 316
[2025-02-08 14:31:42,754 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2025-02-08 14:31:42,754 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2025-02-08 14:31:42,758 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1]
[2025-02-08 14:31:42,758 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2025-02-08 14:31:42,758 INFO  L752   eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" 
[2025-02-08 14:31:42,758 INFO  L754   eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" 
[2025-02-08 14:31:42,759 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-08 14:31:42,759 INFO  L85        PathProgramCache]: Analyzing trace with hash 159, now seen corresponding path program 4 times
[2025-02-08 14:31:42,759 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-08 14:31:42,759 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1322322124]
[2025-02-08 14:31:42,759 INFO  L95    rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST
[2025-02-08 14:31:42,759 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-08 14:31:42,763 INFO  L108    AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 1 statements into 2 equivalence classes.
[2025-02-08 14:31:42,769 INFO  L111    AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 1 of 1 statements.
[2025-02-08 14:31:42,772 INFO  L114    AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s)
[2025-02-08 14:31:42,773 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-08 14:31:42,773 INFO  L348             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2025-02-08 14:31:42,775 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes.
[2025-02-08 14:31:42,795 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements.
[2025-02-08 14:31:42,796 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-08 14:31:42,797 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-08 14:31:42,802 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2025-02-08 14:31:42,803 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-08 14:31:42,803 INFO  L85        PathProgramCache]: Analyzing trace with hash 106661096, now seen corresponding path program 1 times
[2025-02-08 14:31:42,803 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-08 14:31:42,803 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [676444636]
[2025-02-08 14:31:42,803 INFO  L97    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2025-02-08 14:31:42,803 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-08 14:31:42,811 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes.
[2025-02-08 14:31:42,820 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements.
[2025-02-08 14:31:42,821 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-08 14:31:42,821 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2025-02-08 14:31:42,838 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2025-02-08 14:31:42,838 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2025-02-08 14:31:42,838 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [676444636]
[2025-02-08 14:31:42,838 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [676444636] provided 1 perfect and 0 imperfect interpolant sequences
[2025-02-08 14:31:42,839 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2025-02-08 14:31:42,839 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2025-02-08 14:31:42,839 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [307954888]
[2025-02-08 14:31:42,839 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2025-02-08 14:31:42,839 INFO  L769   eck$LassoCheckResult]: loop already infeasible
[2025-02-08 14:31:42,839 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2025-02-08 14:31:42,839 INFO  L144   InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2025-02-08 14:31:42,840 INFO  L146   InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2025-02-08 14:31:42,840 INFO  L87              Difference]: Start difference. First operand 317 states and 501 transitions. cyclomatic complexity: 192 Second operand  has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-08 14:31:42,867 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2025-02-08 14:31:42,867 INFO  L93              Difference]: Finished difference Result 625 states and 977 transitions.
[2025-02-08 14:31:42,867 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 625 states and 977 transitions.
[2025-02-08 14:31:42,872 INFO  L131   ngComponentsAnalysis]: Automaton has 16 accepting balls. 624
[2025-02-08 14:31:42,875 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 625 states to 625 states and 977 transitions.
[2025-02-08 14:31:42,875 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 625
[2025-02-08 14:31:42,875 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 625
[2025-02-08 14:31:42,876 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 625 states and 977 transitions.
[2025-02-08 14:31:42,877 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2025-02-08 14:31:42,877 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 625 states and 977 transitions.
[2025-02-08 14:31:42,878 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 625 states and 977 transitions.
[2025-02-08 14:31:42,892 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 625 to 625.
[2025-02-08 14:31:42,896 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 625 states, 625 states have (on average 1.5632) internal successors, (977), 624 states have internal predecessors, (977), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-08 14:31:42,899 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 625 states to 625 states and 977 transitions.
[2025-02-08 14:31:42,902 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 625 states and 977 transitions.
[2025-02-08 14:31:42,903 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2025-02-08 14:31:42,903 INFO  L432   stractBuchiCegarLoop]: Abstraction has 625 states and 977 transitions.
[2025-02-08 14:31:42,904 INFO  L338   stractBuchiCegarLoop]: ======== Iteration 5 ============
[2025-02-08 14:31:42,904 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 625 states and 977 transitions.
[2025-02-08 14:31:42,910 INFO  L131   ngComponentsAnalysis]: Automaton has 16 accepting balls. 624
[2025-02-08 14:31:42,910 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2025-02-08 14:31:42,910 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2025-02-08 14:31:42,911 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1]
[2025-02-08 14:31:42,914 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2025-02-08 14:31:42,914 INFO  L752   eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" 
[2025-02-08 14:31:42,914 INFO  L754   eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" 
[2025-02-08 14:31:42,915 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-08 14:31:42,915 INFO  L85        PathProgramCache]: Analyzing trace with hash 159, now seen corresponding path program 5 times
[2025-02-08 14:31:42,915 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-08 14:31:42,915 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2104266083]
[2025-02-08 14:31:42,915 INFO  L95    rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1
[2025-02-08 14:31:42,915 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-08 14:31:42,919 INFO  L108    AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes.
[2025-02-08 14:31:42,924 INFO  L111    AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements.
[2025-02-08 14:31:42,924 INFO  L114    AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s)
[2025-02-08 14:31:42,924 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-08 14:31:42,924 INFO  L348             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2025-02-08 14:31:42,929 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes.
[2025-02-08 14:31:42,930 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements.
[2025-02-08 14:31:42,930 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-08 14:31:42,930 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-08 14:31:42,932 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2025-02-08 14:31:42,936 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-08 14:31:42,936 INFO  L85        PathProgramCache]: Analyzing trace with hash 1351425577, now seen corresponding path program 1 times
[2025-02-08 14:31:42,936 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-08 14:31:42,936 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1416463308]
[2025-02-08 14:31:42,936 INFO  L97    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2025-02-08 14:31:42,936 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-08 14:31:42,945 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes.
[2025-02-08 14:31:42,948 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements.
[2025-02-08 14:31:42,948 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-08 14:31:42,948 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2025-02-08 14:31:42,980 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2025-02-08 14:31:42,980 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2025-02-08 14:31:42,980 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1416463308]
[2025-02-08 14:31:42,980 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1416463308] provided 1 perfect and 0 imperfect interpolant sequences
[2025-02-08 14:31:42,980 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2025-02-08 14:31:42,980 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2025-02-08 14:31:42,980 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1202724843]
[2025-02-08 14:31:42,981 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2025-02-08 14:31:42,981 INFO  L769   eck$LassoCheckResult]: loop already infeasible
[2025-02-08 14:31:42,981 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2025-02-08 14:31:42,981 INFO  L144   InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2025-02-08 14:31:42,981 INFO  L146   InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2025-02-08 14:31:42,981 INFO  L87              Difference]: Start difference. First operand 625 states and 977 transitions. cyclomatic complexity: 368 Second operand  has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-08 14:31:42,997 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2025-02-08 14:31:42,997 INFO  L93              Difference]: Finished difference Result 1233 states and 1905 transitions.
[2025-02-08 14:31:42,997 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 1233 states and 1905 transitions.
[2025-02-08 14:31:43,006 INFO  L131   ngComponentsAnalysis]: Automaton has 32 accepting balls. 1232
[2025-02-08 14:31:43,011 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 1233 states to 1233 states and 1905 transitions.
[2025-02-08 14:31:43,011 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 1233
[2025-02-08 14:31:43,012 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 1233
[2025-02-08 14:31:43,012 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 1233 states and 1905 transitions.
[2025-02-08 14:31:43,014 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2025-02-08 14:31:43,014 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 1233 states and 1905 transitions.
[2025-02-08 14:31:43,015 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 1233 states and 1905 transitions.
[2025-02-08 14:31:43,030 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 1233 to 1233.
[2025-02-08 14:31:43,032 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 1233 states, 1233 states have (on average 1.5450121654501217) internal successors, (1905), 1232 states have internal predecessors, (1905), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-08 14:31:43,035 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 1233 states to 1233 states and 1905 transitions.
[2025-02-08 14:31:43,035 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 1233 states and 1905 transitions.
[2025-02-08 14:31:43,035 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2025-02-08 14:31:43,036 INFO  L432   stractBuchiCegarLoop]: Abstraction has 1233 states and 1905 transitions.
[2025-02-08 14:31:43,036 INFO  L338   stractBuchiCegarLoop]: ======== Iteration 6 ============
[2025-02-08 14:31:43,036 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 1233 states and 1905 transitions.
[2025-02-08 14:31:43,040 INFO  L131   ngComponentsAnalysis]: Automaton has 32 accepting balls. 1232
[2025-02-08 14:31:43,040 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2025-02-08 14:31:43,040 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2025-02-08 14:31:43,041 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1]
[2025-02-08 14:31:43,041 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2025-02-08 14:31:43,041 INFO  L752   eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" 
[2025-02-08 14:31:43,041 INFO  L754   eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" 
[2025-02-08 14:31:43,041 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-08 14:31:43,041 INFO  L85        PathProgramCache]: Analyzing trace with hash 159, now seen corresponding path program 6 times
[2025-02-08 14:31:43,042 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-08 14:31:43,042 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [283296733]
[2025-02-08 14:31:43,042 INFO  L95    rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE
[2025-02-08 14:31:43,042 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-08 14:31:43,046 INFO  L108    AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 1 statements into 1 equivalence classes.
[2025-02-08 14:31:43,048 INFO  L111    AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 1 of 1 statements.
[2025-02-08 14:31:43,048 INFO  L114    AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s)
[2025-02-08 14:31:43,048 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-08 14:31:43,048 INFO  L348             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2025-02-08 14:31:43,049 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes.
[2025-02-08 14:31:43,052 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements.
[2025-02-08 14:31:43,053 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-08 14:31:43,053 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-08 14:31:43,054 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2025-02-08 14:31:43,057 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-08 14:31:43,057 INFO  L85        PathProgramCache]: Analyzing trace with hash -686630712, now seen corresponding path program 1 times
[2025-02-08 14:31:43,057 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-08 14:31:43,057 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1745754146]
[2025-02-08 14:31:43,057 INFO  L97    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2025-02-08 14:31:43,057 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-08 14:31:43,060 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes.
[2025-02-08 14:31:43,064 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements.
[2025-02-08 14:31:43,067 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-08 14:31:43,067 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2025-02-08 14:31:43,090 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2025-02-08 14:31:43,092 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2025-02-08 14:31:43,092 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1745754146]
[2025-02-08 14:31:43,092 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1745754146] provided 1 perfect and 0 imperfect interpolant sequences
[2025-02-08 14:31:43,092 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2025-02-08 14:31:43,092 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2025-02-08 14:31:43,092 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1410988497]
[2025-02-08 14:31:43,092 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2025-02-08 14:31:43,092 INFO  L769   eck$LassoCheckResult]: loop already infeasible
[2025-02-08 14:31:43,092 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2025-02-08 14:31:43,093 INFO  L144   InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2025-02-08 14:31:43,095 INFO  L146   InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2025-02-08 14:31:43,095 INFO  L87              Difference]: Start difference. First operand 1233 states and 1905 transitions. cyclomatic complexity: 704 Second operand  has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-08 14:31:43,117 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2025-02-08 14:31:43,117 INFO  L93              Difference]: Finished difference Result 2433 states and 3713 transitions.
[2025-02-08 14:31:43,118 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 2433 states and 3713 transitions.
[2025-02-08 14:31:43,133 INFO  L131   ngComponentsAnalysis]: Automaton has 64 accepting balls. 2432
[2025-02-08 14:31:43,142 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 2433 states to 2433 states and 3713 transitions.
[2025-02-08 14:31:43,142 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 2433
[2025-02-08 14:31:43,148 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 2433
[2025-02-08 14:31:43,148 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 2433 states and 3713 transitions.
[2025-02-08 14:31:43,154 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2025-02-08 14:31:43,154 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 2433 states and 3713 transitions.
[2025-02-08 14:31:43,155 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 2433 states and 3713 transitions.
[2025-02-08 14:31:43,205 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 2433 to 2433.
[2025-02-08 14:31:43,211 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 2433 states, 2433 states have (on average 1.5260994656802302) internal successors, (3713), 2432 states have internal predecessors, (3713), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-08 14:31:43,221 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 2433 states to 2433 states and 3713 transitions.
[2025-02-08 14:31:43,221 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 2433 states and 3713 transitions.
[2025-02-08 14:31:43,225 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2025-02-08 14:31:43,226 INFO  L432   stractBuchiCegarLoop]: Abstraction has 2433 states and 3713 transitions.
[2025-02-08 14:31:43,226 INFO  L338   stractBuchiCegarLoop]: ======== Iteration 7 ============
[2025-02-08 14:31:43,226 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 2433 states and 3713 transitions.
[2025-02-08 14:31:43,259 INFO  L131   ngComponentsAnalysis]: Automaton has 64 accepting balls. 2432
[2025-02-08 14:31:43,259 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2025-02-08 14:31:43,259 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2025-02-08 14:31:43,259 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1]
[2025-02-08 14:31:43,259 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2025-02-08 14:31:43,259 INFO  L752   eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" 
[2025-02-08 14:31:43,260 INFO  L754   eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" 
[2025-02-08 14:31:43,260 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-08 14:31:43,260 INFO  L85        PathProgramCache]: Analyzing trace with hash 159, now seen corresponding path program 7 times
[2025-02-08 14:31:43,260 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-08 14:31:43,260 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [690221560]
[2025-02-08 14:31:43,260 INFO  L95    rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY
[2025-02-08 14:31:43,260 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-08 14:31:43,266 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes.
[2025-02-08 14:31:43,267 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements.
[2025-02-08 14:31:43,267 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-08 14:31:43,267 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-08 14:31:43,267 INFO  L348             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2025-02-08 14:31:43,268 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes.
[2025-02-08 14:31:43,268 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements.
[2025-02-08 14:31:43,268 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-08 14:31:43,268 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-08 14:31:43,269 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2025-02-08 14:31:43,272 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-08 14:31:43,273 INFO  L85        PathProgramCache]: Analyzing trace with hash -475279799, now seen corresponding path program 1 times
[2025-02-08 14:31:43,273 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-08 14:31:43,273 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [260737870]
[2025-02-08 14:31:43,273 INFO  L97    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2025-02-08 14:31:43,273 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-08 14:31:43,275 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes.
[2025-02-08 14:31:43,276 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements.
[2025-02-08 14:31:43,276 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-08 14:31:43,276 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2025-02-08 14:31:43,295 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2025-02-08 14:31:43,296 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2025-02-08 14:31:43,296 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [260737870]
[2025-02-08 14:31:43,296 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [260737870] provided 1 perfect and 0 imperfect interpolant sequences
[2025-02-08 14:31:43,296 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2025-02-08 14:31:43,296 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2025-02-08 14:31:43,296 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1853369891]
[2025-02-08 14:31:43,296 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2025-02-08 14:31:43,296 INFO  L769   eck$LassoCheckResult]: loop already infeasible
[2025-02-08 14:31:43,296 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2025-02-08 14:31:43,296 INFO  L144   InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2025-02-08 14:31:43,296 INFO  L146   InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2025-02-08 14:31:43,296 INFO  L87              Difference]: Start difference. First operand 2433 states and 3713 transitions. cyclomatic complexity: 1344 Second operand  has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-08 14:31:43,317 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2025-02-08 14:31:43,317 INFO  L93              Difference]: Finished difference Result 4801 states and 7233 transitions.
[2025-02-08 14:31:43,318 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 4801 states and 7233 transitions.
[2025-02-08 14:31:43,337 INFO  L131   ngComponentsAnalysis]: Automaton has 128 accepting balls. 4800
[2025-02-08 14:31:43,351 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 4801 states to 4801 states and 7233 transitions.
[2025-02-08 14:31:43,352 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 4801
[2025-02-08 14:31:43,354 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 4801
[2025-02-08 14:31:43,354 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 4801 states and 7233 transitions.
[2025-02-08 14:31:43,358 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2025-02-08 14:31:43,358 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 4801 states and 7233 transitions.
[2025-02-08 14:31:43,360 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 4801 states and 7233 transitions.
[2025-02-08 14:31:43,398 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 4801 to 4801.
[2025-02-08 14:31:43,403 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 4801 states, 4801 states have (on average 1.5065611330972715) internal successors, (7233), 4800 states have internal predecessors, (7233), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-08 14:31:43,415 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 4801 states to 4801 states and 7233 transitions.
[2025-02-08 14:31:43,415 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 4801 states and 7233 transitions.
[2025-02-08 14:31:43,415 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2025-02-08 14:31:43,416 INFO  L432   stractBuchiCegarLoop]: Abstraction has 4801 states and 7233 transitions.
[2025-02-08 14:31:43,416 INFO  L338   stractBuchiCegarLoop]: ======== Iteration 8 ============
[2025-02-08 14:31:43,416 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 4801 states and 7233 transitions.
[2025-02-08 14:31:43,450 INFO  L131   ngComponentsAnalysis]: Automaton has 128 accepting balls. 4800
[2025-02-08 14:31:43,450 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2025-02-08 14:31:43,450 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2025-02-08 14:31:43,451 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1]
[2025-02-08 14:31:43,451 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2025-02-08 14:31:43,451 INFO  L752   eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" 
[2025-02-08 14:31:43,451 INFO  L754   eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" 
[2025-02-08 14:31:43,451 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-08 14:31:43,451 INFO  L85        PathProgramCache]: Analyzing trace with hash 159, now seen corresponding path program 8 times
[2025-02-08 14:31:43,451 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-08 14:31:43,451 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [704227057]
[2025-02-08 14:31:43,451 INFO  L95    rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1
[2025-02-08 14:31:43,451 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-08 14:31:43,453 INFO  L108    AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes.
[2025-02-08 14:31:43,454 INFO  L111    AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements.
[2025-02-08 14:31:43,454 INFO  L114    AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s)
[2025-02-08 14:31:43,454 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-08 14:31:43,454 INFO  L348             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2025-02-08 14:31:43,454 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes.
[2025-02-08 14:31:43,455 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements.
[2025-02-08 14:31:43,455 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-08 14:31:43,455 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-08 14:31:43,456 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2025-02-08 14:31:43,456 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-08 14:31:43,456 INFO  L85        PathProgramCache]: Analyzing trace with hash -884104024, now seen corresponding path program 1 times
[2025-02-08 14:31:43,456 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-08 14:31:43,456 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [725418971]
[2025-02-08 14:31:43,456 INFO  L97    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2025-02-08 14:31:43,456 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-08 14:31:43,458 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes.
[2025-02-08 14:31:43,459 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements.
[2025-02-08 14:31:43,459 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-08 14:31:43,459 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2025-02-08 14:31:43,470 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2025-02-08 14:31:43,470 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2025-02-08 14:31:43,470 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [725418971]
[2025-02-08 14:31:43,470 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [725418971] provided 1 perfect and 0 imperfect interpolant sequences
[2025-02-08 14:31:43,470 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2025-02-08 14:31:43,470 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2025-02-08 14:31:43,470 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [957468919]
[2025-02-08 14:31:43,471 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2025-02-08 14:31:43,471 INFO  L769   eck$LassoCheckResult]: loop already infeasible
[2025-02-08 14:31:43,471 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2025-02-08 14:31:43,471 INFO  L144   InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2025-02-08 14:31:43,471 INFO  L146   InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2025-02-08 14:31:43,471 INFO  L87              Difference]: Start difference. First operand 4801 states and 7233 transitions. cyclomatic complexity: 2560 Second operand  has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-08 14:31:43,506 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2025-02-08 14:31:43,506 INFO  L93              Difference]: Finished difference Result 9473 states and 14081 transitions.
[2025-02-08 14:31:43,506 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 9473 states and 14081 transitions.
[2025-02-08 14:31:43,545 INFO  L131   ngComponentsAnalysis]: Automaton has 256 accepting balls. 9472
[2025-02-08 14:31:43,580 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 9473 states to 9473 states and 14081 transitions.
[2025-02-08 14:31:43,580 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 9473
[2025-02-08 14:31:43,585 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 9473
[2025-02-08 14:31:43,585 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 9473 states and 14081 transitions.
[2025-02-08 14:31:43,596 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2025-02-08 14:31:43,596 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 9473 states and 14081 transitions.
[2025-02-08 14:31:43,601 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 9473 states and 14081 transitions.
[2025-02-08 14:31:43,732 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 9473 to 9473.
[2025-02-08 14:31:43,745 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 9473 states, 9473 states have (on average 1.4864351314261586) internal successors, (14081), 9472 states have internal predecessors, (14081), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-08 14:31:43,770 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 9473 states to 9473 states and 14081 transitions.
[2025-02-08 14:31:43,770 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 9473 states and 14081 transitions.
[2025-02-08 14:31:43,770 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2025-02-08 14:31:43,771 INFO  L432   stractBuchiCegarLoop]: Abstraction has 9473 states and 14081 transitions.
[2025-02-08 14:31:43,771 INFO  L338   stractBuchiCegarLoop]: ======== Iteration 9 ============
[2025-02-08 14:31:43,771 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 9473 states and 14081 transitions.
[2025-02-08 14:31:43,799 INFO  L131   ngComponentsAnalysis]: Automaton has 256 accepting balls. 9472
[2025-02-08 14:31:43,800 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2025-02-08 14:31:43,800 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2025-02-08 14:31:43,800 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1]
[2025-02-08 14:31:43,800 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2025-02-08 14:31:43,800 INFO  L752   eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" 
[2025-02-08 14:31:43,800 INFO  L754   eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" 
[2025-02-08 14:31:43,800 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-08 14:31:43,800 INFO  L85        PathProgramCache]: Analyzing trace with hash 159, now seen corresponding path program 9 times
[2025-02-08 14:31:43,801 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-08 14:31:43,801 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1459738833]
[2025-02-08 14:31:43,801 INFO  L95    rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2
[2025-02-08 14:31:43,801 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-08 14:31:43,803 INFO  L108    AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 1 statements into 1 equivalence classes.
[2025-02-08 14:31:43,804 INFO  L111    AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 1 of 1 statements.
[2025-02-08 14:31:43,804 INFO  L114    AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s)
[2025-02-08 14:31:43,804 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-08 14:31:43,804 INFO  L348             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2025-02-08 14:31:43,805 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes.
[2025-02-08 14:31:43,805 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements.
[2025-02-08 14:31:43,805 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-08 14:31:43,805 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-08 14:31:43,806 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2025-02-08 14:31:43,807 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-08 14:31:43,807 INFO  L85        PathProgramCache]: Analyzing trace with hash -1728575895, now seen corresponding path program 1 times
[2025-02-08 14:31:43,807 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-08 14:31:43,807 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [331531740]
[2025-02-08 14:31:43,807 INFO  L97    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2025-02-08 14:31:43,807 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-08 14:31:43,810 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes.
[2025-02-08 14:31:43,811 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements.
[2025-02-08 14:31:43,811 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-08 14:31:43,811 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2025-02-08 14:31:43,824 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2025-02-08 14:31:43,824 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2025-02-08 14:31:43,825 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [331531740]
[2025-02-08 14:31:43,825 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [331531740] provided 1 perfect and 0 imperfect interpolant sequences
[2025-02-08 14:31:43,825 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2025-02-08 14:31:43,825 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2025-02-08 14:31:43,825 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1430952847]
[2025-02-08 14:31:43,825 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2025-02-08 14:31:43,825 INFO  L769   eck$LassoCheckResult]: loop already infeasible
[2025-02-08 14:31:43,825 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2025-02-08 14:31:43,825 INFO  L144   InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2025-02-08 14:31:43,825 INFO  L146   InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2025-02-08 14:31:43,825 INFO  L87              Difference]: Start difference. First operand 9473 states and 14081 transitions. cyclomatic complexity: 4864 Second operand  has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-08 14:31:43,877 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2025-02-08 14:31:43,877 INFO  L93              Difference]: Finished difference Result 18689 states and 27393 transitions.
[2025-02-08 14:31:43,877 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 18689 states and 27393 transitions.
[2025-02-08 14:31:43,954 INFO  L131   ngComponentsAnalysis]: Automaton has 512 accepting balls. 18688
[2025-02-08 14:31:44,012 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 18689 states to 18689 states and 27393 transitions.
[2025-02-08 14:31:44,013 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 18689
[2025-02-08 14:31:44,027 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 18689
[2025-02-08 14:31:44,027 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 18689 states and 27393 transitions.
[2025-02-08 14:31:44,051 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2025-02-08 14:31:44,051 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 18689 states and 27393 transitions.
[2025-02-08 14:31:44,065 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 18689 states and 27393 transitions.
[2025-02-08 14:31:44,281 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 18689 to 18689.
[2025-02-08 14:31:44,306 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 18689 states, 18689 states have (on average 1.4657285033977205) internal successors, (27393), 18688 states have internal predecessors, (27393), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-08 14:31:44,346 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 18689 states to 18689 states and 27393 transitions.
[2025-02-08 14:31:44,346 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 18689 states and 27393 transitions.
[2025-02-08 14:31:44,346 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2025-02-08 14:31:44,347 INFO  L432   stractBuchiCegarLoop]: Abstraction has 18689 states and 27393 transitions.
[2025-02-08 14:31:44,347 INFO  L338   stractBuchiCegarLoop]: ======== Iteration 10 ============
[2025-02-08 14:31:44,347 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 18689 states and 27393 transitions.
[2025-02-08 14:31:44,444 INFO  L131   ngComponentsAnalysis]: Automaton has 512 accepting balls. 18688
[2025-02-08 14:31:44,444 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2025-02-08 14:31:44,444 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2025-02-08 14:31:44,444 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1]
[2025-02-08 14:31:44,444 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2025-02-08 14:31:44,444 INFO  L752   eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" 
[2025-02-08 14:31:44,444 INFO  L754   eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" 
[2025-02-08 14:31:44,445 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-08 14:31:44,445 INFO  L85        PathProgramCache]: Analyzing trace with hash 159, now seen corresponding path program 10 times
[2025-02-08 14:31:44,445 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-08 14:31:44,445 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1173763850]
[2025-02-08 14:31:44,445 INFO  L95    rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST
[2025-02-08 14:31:44,445 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-08 14:31:44,447 INFO  L108    AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 1 statements into 2 equivalence classes.
[2025-02-08 14:31:44,448 INFO  L111    AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 1 of 1 statements.
[2025-02-08 14:31:44,448 INFO  L114    AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s)
[2025-02-08 14:31:44,448 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-08 14:31:44,448 INFO  L348             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2025-02-08 14:31:44,448 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes.
[2025-02-08 14:31:44,449 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements.
[2025-02-08 14:31:44,449 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-08 14:31:44,449 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-08 14:31:44,450 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2025-02-08 14:31:44,450 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-08 14:31:44,450 INFO  L85        PathProgramCache]: Analyzing trace with hash 1569319048, now seen corresponding path program 1 times
[2025-02-08 14:31:44,450 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-08 14:31:44,450 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [251025871]
[2025-02-08 14:31:44,450 INFO  L97    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2025-02-08 14:31:44,450 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-08 14:31:44,452 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes.
[2025-02-08 14:31:44,453 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements.
[2025-02-08 14:31:44,453 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-08 14:31:44,453 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2025-02-08 14:31:44,463 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2025-02-08 14:31:44,464 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2025-02-08 14:31:44,464 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [251025871]
[2025-02-08 14:31:44,464 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [251025871] provided 1 perfect and 0 imperfect interpolant sequences
[2025-02-08 14:31:44,464 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2025-02-08 14:31:44,464 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2025-02-08 14:31:44,464 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1460895495]
[2025-02-08 14:31:44,464 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2025-02-08 14:31:44,464 INFO  L769   eck$LassoCheckResult]: loop already infeasible
[2025-02-08 14:31:44,464 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2025-02-08 14:31:44,464 INFO  L144   InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2025-02-08 14:31:44,464 INFO  L146   InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2025-02-08 14:31:44,464 INFO  L87              Difference]: Start difference. First operand 18689 states and 27393 transitions. cyclomatic complexity: 9216 Second operand  has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-08 14:31:44,529 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2025-02-08 14:31:44,529 INFO  L93              Difference]: Finished difference Result 36865 states and 53249 transitions.
[2025-02-08 14:31:44,529 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 36865 states and 53249 transitions.
[2025-02-08 14:31:44,754 INFO  L131   ngComponentsAnalysis]: Automaton has 1024 accepting balls. 36864
[2025-02-08 14:31:44,854 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 36865 states to 36865 states and 53249 transitions.
[2025-02-08 14:31:44,854 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 36865
[2025-02-08 14:31:44,941 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 36865
[2025-02-08 14:31:44,941 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 36865 states and 53249 transitions.
[2025-02-08 14:31:44,957 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2025-02-08 14:31:44,958 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 36865 states and 53249 transitions.
[2025-02-08 14:31:44,977 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 36865 states and 53249 transitions.
[2025-02-08 14:31:45,605 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 36865 to 36865.
[2025-02-08 14:31:45,701 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 36865 states, 36865 states have (on average 1.444432388444324) internal successors, (53249), 36864 states have internal predecessors, (53249), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-08 14:31:45,834 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 36865 states to 36865 states and 53249 transitions.
[2025-02-08 14:31:45,834 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 36865 states and 53249 transitions.
[2025-02-08 14:31:45,835 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2025-02-08 14:31:45,836 INFO  L432   stractBuchiCegarLoop]: Abstraction has 36865 states and 53249 transitions.
[2025-02-08 14:31:45,836 INFO  L338   stractBuchiCegarLoop]: ======== Iteration 11 ============
[2025-02-08 14:31:45,836 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 36865 states and 53249 transitions.
[2025-02-08 14:31:45,960 INFO  L131   ngComponentsAnalysis]: Automaton has 1024 accepting balls. 36864
[2025-02-08 14:31:45,961 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2025-02-08 14:31:45,961 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2025-02-08 14:31:45,962 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1]
[2025-02-08 14:31:45,962 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2025-02-08 14:31:45,962 INFO  L752   eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" 
[2025-02-08 14:31:45,962 INFO  L754   eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" 
[2025-02-08 14:31:45,962 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-08 14:31:45,963 INFO  L85        PathProgramCache]: Analyzing trace with hash 159, now seen corresponding path program 11 times
[2025-02-08 14:31:45,963 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-08 14:31:45,963 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1950643324]
[2025-02-08 14:31:45,963 INFO  L95    rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1
[2025-02-08 14:31:45,963 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-08 14:31:45,970 INFO  L108    AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes.
[2025-02-08 14:31:45,974 INFO  L111    AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements.
[2025-02-08 14:31:45,977 INFO  L114    AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s)
[2025-02-08 14:31:45,979 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-08 14:31:45,980 INFO  L348             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2025-02-08 14:31:45,987 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes.
[2025-02-08 14:31:45,990 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements.
[2025-02-08 14:31:45,990 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-08 14:31:45,990 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-08 14:31:45,991 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2025-02-08 14:31:45,993 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-08 14:31:45,993 INFO  L85        PathProgramCache]: Analyzing trace with hash -1372338551, now seen corresponding path program 1 times
[2025-02-08 14:31:45,993 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-08 14:31:45,993 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1761523782]
[2025-02-08 14:31:45,993 INFO  L97    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2025-02-08 14:31:45,993 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-08 14:31:45,998 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes.
[2025-02-08 14:31:46,000 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements.
[2025-02-08 14:31:46,001 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-08 14:31:46,001 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2025-02-08 14:31:46,028 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2025-02-08 14:31:46,029 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2025-02-08 14:31:46,029 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1761523782]
[2025-02-08 14:31:46,030 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1761523782] provided 1 perfect and 0 imperfect interpolant sequences
[2025-02-08 14:31:46,030 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2025-02-08 14:31:46,030 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2025-02-08 14:31:46,030 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [730413967]
[2025-02-08 14:31:46,030 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2025-02-08 14:31:46,030 INFO  L769   eck$LassoCheckResult]: loop already infeasible
[2025-02-08 14:31:46,030 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2025-02-08 14:31:46,030 INFO  L144   InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2025-02-08 14:31:46,031 INFO  L146   InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2025-02-08 14:31:46,031 INFO  L87              Difference]: Start difference. First operand 36865 states and 53249 transitions. cyclomatic complexity: 17408 Second operand  has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-08 14:31:46,288 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2025-02-08 14:31:46,288 INFO  L93              Difference]: Finished difference Result 72705 states and 103425 transitions.
[2025-02-08 14:31:46,289 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 72705 states and 103425 transitions.
[2025-02-08 14:31:46,687 INFO  L131   ngComponentsAnalysis]: Automaton has 2048 accepting balls. 72704
[2025-02-08 14:31:46,869 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 72705 states to 72705 states and 103425 transitions.
[2025-02-08 14:31:46,870 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 72705
[2025-02-08 14:31:46,904 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 72705
[2025-02-08 14:31:46,905 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 72705 states and 103425 transitions.
[2025-02-08 14:31:46,944 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2025-02-08 14:31:46,944 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 72705 states and 103425 transitions.
[2025-02-08 14:31:47,051 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 72705 states and 103425 transitions.
[2025-02-08 14:31:47,894 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 72705 to 72705.
[2025-02-08 14:31:47,966 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 72705 states, 72705 states have (on average 1.4225293996286363) internal successors, (103425), 72704 states have internal predecessors, (103425), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-08 14:31:48,172 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 72705 states to 72705 states and 103425 transitions.
[2025-02-08 14:31:48,172 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 72705 states and 103425 transitions.
[2025-02-08 14:31:48,172 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2025-02-08 14:31:48,173 INFO  L432   stractBuchiCegarLoop]: Abstraction has 72705 states and 103425 transitions.
[2025-02-08 14:31:48,173 INFO  L338   stractBuchiCegarLoop]: ======== Iteration 12 ============
[2025-02-08 14:31:48,173 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 72705 states and 103425 transitions.
[2025-02-08 14:31:48,402 INFO  L131   ngComponentsAnalysis]: Automaton has 2048 accepting balls. 72704
[2025-02-08 14:31:48,402 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2025-02-08 14:31:48,402 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2025-02-08 14:31:48,404 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1]
[2025-02-08 14:31:48,404 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2025-02-08 14:31:48,404 INFO  L752   eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" 
[2025-02-08 14:31:48,404 INFO  L754   eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" 
[2025-02-08 14:31:48,405 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-08 14:31:48,405 INFO  L85        PathProgramCache]: Analyzing trace with hash 159, now seen corresponding path program 12 times
[2025-02-08 14:31:48,405 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-08 14:31:48,405 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [321624762]
[2025-02-08 14:31:48,405 INFO  L95    rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE
[2025-02-08 14:31:48,405 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-08 14:31:48,409 INFO  L108    AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 1 statements into 1 equivalence classes.
[2025-02-08 14:31:48,410 INFO  L111    AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 1 of 1 statements.
[2025-02-08 14:31:48,410 INFO  L114    AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s)
[2025-02-08 14:31:48,410 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-08 14:31:48,410 INFO  L348             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2025-02-08 14:31:48,411 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes.
[2025-02-08 14:31:48,412 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements.
[2025-02-08 14:31:48,412 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-08 14:31:48,412 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-08 14:31:48,413 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2025-02-08 14:31:48,414 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-08 14:31:48,414 INFO  L85        PathProgramCache]: Analyzing trace with hash -1882872728, now seen corresponding path program 1 times
[2025-02-08 14:31:48,414 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-08 14:31:48,414 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [65423017]
[2025-02-08 14:31:48,414 INFO  L97    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2025-02-08 14:31:48,414 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-08 14:31:48,421 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes.
[2025-02-08 14:31:48,423 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements.
[2025-02-08 14:31:48,423 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-08 14:31:48,423 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2025-02-08 14:31:48,450 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2025-02-08 14:31:48,450 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2025-02-08 14:31:48,450 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [65423017]
[2025-02-08 14:31:48,450 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [65423017] provided 1 perfect and 0 imperfect interpolant sequences
[2025-02-08 14:31:48,450 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2025-02-08 14:31:48,450 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3
[2025-02-08 14:31:48,450 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1328442107]
[2025-02-08 14:31:48,450 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2025-02-08 14:31:48,450 INFO  L769   eck$LassoCheckResult]: loop already infeasible
[2025-02-08 14:31:48,450 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2025-02-08 14:31:48,451 INFO  L144   InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2025-02-08 14:31:48,451 INFO  L146   InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2025-02-08 14:31:48,451 INFO  L87              Difference]: Start difference. First operand 72705 states and 103425 transitions. cyclomatic complexity: 32768 Second operand  has 3 states, 3 states have (on average 9.333333333333334) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-08 14:31:49,114 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2025-02-08 14:31:49,118 INFO  L93              Difference]: Finished difference Result 143361 states and 200705 transitions.
[2025-02-08 14:31:49,118 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 143361 states and 200705 transitions.
[2025-02-08 14:31:49,839 INFO  L131   ngComponentsAnalysis]: Automaton has 4096 accepting balls. 143360
[2025-02-08 14:31:50,293 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 143361 states to 143361 states and 200705 transitions.
[2025-02-08 14:31:50,294 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 143361
[2025-02-08 14:31:50,350 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 143361
[2025-02-08 14:31:50,351 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 143361 states and 200705 transitions.
[2025-02-08 14:31:50,427 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2025-02-08 14:31:50,428 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 143361 states and 200705 transitions.
[2025-02-08 14:31:50,500 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 143361 states and 200705 transitions.
[2025-02-08 14:31:52,107 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 143361 to 143361.
[2025-02-08 14:31:52,237 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 143361 states, 143361 states have (on average 1.3999972098408913) internal successors, (200705), 143360 states have internal predecessors, (200705), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-08 14:31:52,852 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 143361 states to 143361 states and 200705 transitions.
[2025-02-08 14:31:52,852 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 143361 states and 200705 transitions.
[2025-02-08 14:31:52,853 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2025-02-08 14:31:52,855 INFO  L432   stractBuchiCegarLoop]: Abstraction has 143361 states and 200705 transitions.
[2025-02-08 14:31:52,855 INFO  L338   stractBuchiCegarLoop]: ======== Iteration 13 ============
[2025-02-08 14:31:52,856 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 143361 states and 200705 transitions.
[2025-02-08 14:31:53,254 INFO  L131   ngComponentsAnalysis]: Automaton has 4096 accepting balls. 143360
[2025-02-08 14:31:53,255 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2025-02-08 14:31:53,255 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2025-02-08 14:31:53,257 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1]
[2025-02-08 14:31:53,257 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2025-02-08 14:31:53,257 INFO  L752   eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" 
[2025-02-08 14:31:53,258 INFO  L754   eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" 
[2025-02-08 14:31:53,259 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-08 14:31:53,259 INFO  L85        PathProgramCache]: Analyzing trace with hash 159, now seen corresponding path program 13 times
[2025-02-08 14:31:53,259 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-08 14:31:53,259 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1713452349]
[2025-02-08 14:31:53,259 INFO  L95    rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY
[2025-02-08 14:31:53,259 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-08 14:31:53,269 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes.
[2025-02-08 14:31:53,278 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements.
[2025-02-08 14:31:53,278 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-08 14:31:53,278 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-08 14:31:53,278 INFO  L348             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2025-02-08 14:31:53,280 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes.
[2025-02-08 14:31:53,285 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements.
[2025-02-08 14:31:53,286 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-08 14:31:53,286 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-08 14:31:53,287 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2025-02-08 14:31:53,287 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-08 14:31:53,287 INFO  L85        PathProgramCache]: Analyzing trace with hash -375320919, now seen corresponding path program 1 times
[2025-02-08 14:31:53,287 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-08 14:31:53,287 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1100754145]
[2025-02-08 14:31:53,287 INFO  L97    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2025-02-08 14:31:53,290 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-08 14:31:53,293 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes.
[2025-02-08 14:31:53,299 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements.
[2025-02-08 14:31:53,299 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-08 14:31:53,299 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is unsat
[2025-02-08 14:31:53,325 INFO  L134       CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked.
[2025-02-08 14:31:53,325 INFO  L136   FreeRefinementEngine]: Strategy CAMEL found an infeasible trace
[2025-02-08 14:31:53,325 INFO  L334   FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1100754145]
[2025-02-08 14:31:53,325 INFO  L158   FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1100754145] provided 1 perfect and 0 imperfect interpolant sequences
[2025-02-08 14:31:53,325 INFO  L185   FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences.
[2025-02-08 14:31:53,325 INFO  L198   FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2
[2025-02-08 14:31:53,325 INFO  L121   tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1936995253]
[2025-02-08 14:31:53,325 INFO  L85    oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton
[2025-02-08 14:31:53,325 INFO  L769   eck$LassoCheckResult]: loop already infeasible
[2025-02-08 14:31:53,325 INFO  L100   FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL
[2025-02-08 14:31:53,325 INFO  L144   InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants.
[2025-02-08 14:31:53,325 INFO  L146   InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6
[2025-02-08 14:31:53,325 INFO  L87              Difference]: Start difference. First operand 143361 states and 200705 transitions. cyclomatic complexity: 61440 Second operand  has 3 states, 2 states have (on average 14.0) internal successors, (28), 3 states have internal predecessors, (28), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-08 14:31:54,340 INFO  L144             Difference]: Subtrahend was deterministic. Have not used determinization.
[2025-02-08 14:31:54,340 INFO  L93              Difference]: Finished difference Result 282625 states and 389121 transitions.
[2025-02-08 14:31:54,340 INFO  L82        GeneralOperation]: Start removeNonLiveStates. Operand 282625 states and 389121 transitions.
[2025-02-08 14:31:55,791 INFO  L131   ngComponentsAnalysis]: Automaton has 8192 accepting balls. 282624
[2025-02-08 14:31:56,705 INFO  L88        GeneralOperation]: Finished removeNonLiveStates. Reduced from 282625 states to 282625 states and 389121 transitions.
[2025-02-08 14:31:56,706 INFO  L87         BuchiClosureNwa]: Accepting states before buchiClosure: 282625
[2025-02-08 14:31:56,771 INFO  L106        BuchiClosureNwa]: Accepting states after buchiClosure: 282625
[2025-02-08 14:31:56,771 INFO  L73         IsDeterministic]: Start isDeterministic. Operand 282625 states and 389121 transitions.
[2025-02-08 14:31:56,829 INFO  L80         IsDeterministic]: Finished isDeterministic. Operand is deterministic.
[2025-02-08 14:31:56,829 INFO  L218   hiAutomatonCegarLoop]: Abstraction has 282625 states and 389121 transitions.
[2025-02-08 14:31:56,878 INFO  L82        GeneralOperation]: Start minimizeSevpa. Operand 282625 states and 389121 transitions.
[2025-02-08 14:31:59,321 INFO  L88        GeneralOperation]: Finished minimizeSevpa. Reduced states from 282625 to 282625.
[2025-02-08 14:31:59,556 INFO  L82        GeneralOperation]: Start removeUnreachable. Operand  has 282625 states, 282625 states have (on average 1.3768102609464838) internal successors, (389121), 282624 states have internal predecessors, (389121), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0)
[2025-02-08 14:32:00,304 INFO  L88        GeneralOperation]: Finished removeUnreachable. Reduced from 282625 states to 282625 states and 389121 transitions.
[2025-02-08 14:32:00,305 INFO  L240   hiAutomatonCegarLoop]: Abstraction has 282625 states and 389121 transitions.
[2025-02-08 14:32:00,305 INFO  L141   InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. 
[2025-02-08 14:32:00,306 INFO  L432   stractBuchiCegarLoop]: Abstraction has 282625 states and 389121 transitions.
[2025-02-08 14:32:00,306 INFO  L338   stractBuchiCegarLoop]: ======== Iteration 14 ============
[2025-02-08 14:32:00,306 INFO  L72            BuchiIsEmpty]: Start buchiIsEmpty. Operand 282625 states and 389121 transitions.
[2025-02-08 14:32:01,442 INFO  L131   ngComponentsAnalysis]: Automaton has 8192 accepting balls. 282624
[2025-02-08 14:32:01,442 INFO  L87            BuchiIsEmpty]: Finished buchiIsEmpty Result is false
[2025-02-08 14:32:01,443 INFO  L119           BuchiIsEmpty]: Starting construction of run
[2025-02-08 14:32:01,446 INFO  L148   hiAutomatonCegarLoop]: Counterexample stem histogram [1]
[2025-02-08 14:32:01,446 INFO  L149   hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1]
[2025-02-08 14:32:01,447 INFO  L752   eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(16, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_~cond~0#1;" 
[2025-02-08 14:32:01,447 INFO  L754   eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet17#1;main_~cond~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume !(0 != main_~p1~0#1);" "assume !(0 != main_~p2~0#1);" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" 
[2025-02-08 14:32:01,448 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-08 14:32:01,448 INFO  L85        PathProgramCache]: Analyzing trace with hash 159, now seen corresponding path program 14 times
[2025-02-08 14:32:01,448 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-08 14:32:01,448 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [335775790]
[2025-02-08 14:32:01,448 INFO  L95    rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1
[2025-02-08 14:32:01,452 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-08 14:32:01,459 INFO  L108    AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes.
[2025-02-08 14:32:01,465 INFO  L111    AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements.
[2025-02-08 14:32:01,466 INFO  L114    AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s)
[2025-02-08 14:32:01,466 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-08 14:32:01,466 INFO  L348             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2025-02-08 14:32:01,467 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes.
[2025-02-08 14:32:01,467 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements.
[2025-02-08 14:32:01,467 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-08 14:32:01,467 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-08 14:32:01,468 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2025-02-08 14:32:01,469 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-08 14:32:01,469 INFO  L85        PathProgramCache]: Analyzing trace with hash -880879544, now seen corresponding path program 1 times
[2025-02-08 14:32:01,469 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-08 14:32:01,469 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1782127574]
[2025-02-08 14:32:01,469 INFO  L97    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2025-02-08 14:32:01,469 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-08 14:32:01,476 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes.
[2025-02-08 14:32:01,480 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements.
[2025-02-08 14:32:01,481 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-08 14:32:01,481 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-08 14:32:01,484 INFO  L348             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2025-02-08 14:32:01,485 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 28 statements into 1 equivalence classes.
[2025-02-08 14:32:01,486 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 28 of 28 statements.
[2025-02-08 14:32:01,486 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-08 14:32:01,486 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-08 14:32:01,495 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2025-02-08 14:32:01,495 INFO  L157       PredicateUnifier]: Initialized classic predicate unifier
[2025-02-08 14:32:01,497 INFO  L85        PathProgramCache]: Analyzing trace with hash 1255006182, now seen corresponding path program 1 times
[2025-02-08 14:32:01,497 INFO  L118   FreeRefinementEngine]: Executing refinement strategy CAMEL
[2025-02-08 14:32:01,497 INFO  L334   FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [818465129]
[2025-02-08 14:32:01,498 INFO  L97    rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY
[2025-02-08 14:32:01,499 INFO  L127          SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms
[2025-02-08 14:32:01,505 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 29 statements into 1 equivalence classes.
[2025-02-08 14:32:01,507 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 29 of 29 statements.
[2025-02-08 14:32:01,509 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-08 14:32:01,509 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-08 14:32:01,510 INFO  L348             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2025-02-08 14:32:01,511 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 29 statements into 1 equivalence classes.
[2025-02-08 14:32:01,518 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 29 of 29 statements.
[2025-02-08 14:32:01,518 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-08 14:32:01,518 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-08 14:32:01,521 INFO  L130   FreeRefinementEngine]: Strategy CAMEL found a feasible trace
[2025-02-08 14:32:02,037 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes.
[2025-02-08 14:32:02,038 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements.
[2025-02-08 14:32:02,038 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-08 14:32:02,039 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-08 14:32:02,039 INFO  L348             TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders.
[2025-02-08 14:32:02,047 INFO  L108    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes.
[2025-02-08 14:32:02,048 INFO  L111    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements.
[2025-02-08 14:32:02,048 INFO  L114    AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s)
[2025-02-08 14:32:02,049 INFO  L115    AnnotateAndAsserter]: Conjunction of SSA is sat
[2025-02-08 14:32:02,096 INFO  L201        PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 08.02 02:32:02 BoogieIcfgContainer
[2025-02-08 14:32:02,097 INFO  L131        PluginConnector]: ------------------------ END BuchiAutomizer----------------------------
[2025-02-08 14:32:02,097 INFO  L112        PluginConnector]: ------------------------Witness Printer----------------------------
[2025-02-08 14:32:02,099 INFO  L270        PluginConnector]: Initializing Witness Printer...
[2025-02-08 14:32:02,100 INFO  L274        PluginConnector]: Witness Printer initialized
[2025-02-08 14:32:02,100 INFO  L184        PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 08.02 02:31:42" (3/4) ...
[2025-02-08 14:32:02,102 INFO  L143         WitnessPrinter]: Generating witness for non-termination counterexample
[2025-02-08 14:32:02,157 INFO  L149         WitnessManager]: Wrote witness to /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/witness.graphml
[2025-02-08 14:32:02,158 INFO  L131        PluginConnector]: ------------------------ END Witness Printer----------------------------
[2025-02-08 14:32:02,158 INFO  L158              Benchmark]: Toolchain (without parser) took 20387.08ms. Allocated memory was 142.6MB in the beginning and 10.2GB in the end (delta: 10.0GB). Free memory was 105.0MB in the beginning and 8.0GB in the end (delta: -7.9GB). Peak memory consumption was 2.1GB. Max. memory is 16.1GB.
[2025-02-08 14:32:02,158 INFO  L158              Benchmark]: CDTParser took 0.15ms. Allocated memory is still 201.3MB. Free memory is still 127.6MB. There was no memory consumed. Max. memory is 16.1GB.
[2025-02-08 14:32:02,159 INFO  L158              Benchmark]: CACSL2BoogieTranslator took 147.21ms. Allocated memory is still 142.6MB. Free memory was 105.0MB in the beginning and 93.7MB in the end (delta: 11.3MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB.
[2025-02-08 14:32:02,159 INFO  L158              Benchmark]: Boogie Procedure Inliner took 18.34ms. Allocated memory is still 142.6MB. Free memory was 93.7MB in the beginning and 92.0MB in the end (delta: 1.7MB). There was no memory consumed. Max. memory is 16.1GB.
[2025-02-08 14:32:02,159 INFO  L158              Benchmark]: Boogie Preprocessor took 16.15ms. Allocated memory is still 142.6MB. Free memory was 92.0MB in the beginning and 91.0MB in the end (delta: 1.0MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB.
[2025-02-08 14:32:02,159 INFO  L158              Benchmark]: IcfgBuilder took 304.45ms. Allocated memory is still 142.6MB. Free memory was 91.0MB in the beginning and 75.2MB in the end (delta: 15.8MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB.
[2025-02-08 14:32:02,159 INFO  L158              Benchmark]: BuchiAutomizer took 19836.81ms. Allocated memory was 142.6MB in the beginning and 10.2GB in the end (delta: 10.0GB). Free memory was 75.2MB in the beginning and 8.0GB in the end (delta: -8.0GB). Peak memory consumption was 2.1GB. Max. memory is 16.1GB.
[2025-02-08 14:32:02,159 INFO  L158              Benchmark]: Witness Printer took 60.31ms. Allocated memory is still 10.2GB. Free memory was 8.0GB in the beginning and 8.0GB in the end (delta: 4.7MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB.
[2025-02-08 14:32:02,160 INFO  L338   ainManager$Toolchain]: #######################  End [Toolchain 1] #######################
 --- Results ---
 * Results from de.uni_freiburg.informatik.ultimate.core:
  - StatisticsResult: Toolchain Benchmarks
    Benchmark results are:
 * CDTParser took 0.15ms. Allocated memory is still 201.3MB. Free memory is still 127.6MB. There was no memory consumed. Max. memory is 16.1GB.
 * CACSL2BoogieTranslator took 147.21ms. Allocated memory is still 142.6MB. Free memory was 105.0MB in the beginning and 93.7MB in the end (delta: 11.3MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB.
 * Boogie Procedure Inliner took 18.34ms. Allocated memory is still 142.6MB. Free memory was 93.7MB in the beginning and 92.0MB in the end (delta: 1.7MB). There was no memory consumed. Max. memory is 16.1GB.
 * Boogie Preprocessor took 16.15ms. Allocated memory is still 142.6MB. Free memory was 92.0MB in the beginning and 91.0MB in the end (delta: 1.0MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB.
 * IcfgBuilder took 304.45ms. Allocated memory is still 142.6MB. Free memory was 91.0MB in the beginning and 75.2MB in the end (delta: 15.8MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB.
 * BuchiAutomizer took 19836.81ms. Allocated memory was 142.6MB in the beginning and 10.2GB in the end (delta: 10.0GB). Free memory was 75.2MB in the beginning and 8.0GB in the end (delta: -8.0GB). Peak memory consumption was 2.1GB. Max. memory is 16.1GB.
 * Witness Printer took 60.31ms. Allocated memory is still 10.2GB. Free memory was 8.0GB in the beginning and 8.0GB in the end (delta: 4.7MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB.
 * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction:
  - StatisticsResult: Constructed decomposition of program
    Your program was decomposed into 13 terminating modules (13 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.13 modules have a trivial ranking function, the largest among these consists of 3 locations. The remainder module has 282625 locations.
  - StatisticsResult: Timing statistics
    BüchiAutomizer plugin needed 19.7s and 14 iterations.  TraceHistogramMax:1. Analysis of lassos took 1.3s. Construction of modules took 0.1s. Büchi inclusion checks took 16.1s. Highest rank in rank-based complementation 0. Minimization of det autom 13. Minimization of nondet autom 0. Automata minimization 8.7s AutomataMinimizationTime, 13 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations. Non-live state removal took 4.7s Buchi closure took 0.2s. Biggest automaton had -1 states and ocurred in iteration -1.	Nontrivial modules had stage [0, 0, 0, 0, 0].	InterpolantCoveringCapabilityFinite: 0/0	InterpolantCoveringCapabilityBuchi: 0/0	HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 690 SdHoareTripleChecker+Valid, 0.2s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 690 mSDsluCounter, 2133 SdHoareTripleChecker+Invalid, 0.1s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 819 mSDsCounter, 26 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 65 IncrementalHoareTripleChecker+Invalid, 91 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 26 mSolverCounterUnsat, 1314 mSDtfsCounter, 65 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown	LassoAnalysisResults: nont1 unkn0 SFLI13 SFLT0 conc0 concLT0 SILN0 SILU0 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0	LassoNonterminationAnalysisSatUnbounded: 0	LassoNonterminationAnalysisUnsat: 0	LassoNonterminationAnalysisUnknown: 0	LassoNonterminationAnalysisTime: 0.0s	InitialAbstractionConstructionTime: 0.0s
  - TerminationAnalysisResult: Nontermination possible
    Buchi Automizer proved that your program is nonterminating for some inputs
  - LassoShapedNonTerminationArgument [Line: 50]: Nontermination argument in form of an infinite program execution.
    Nontermination argument in form of an infinite program execution.
Stem:
[L8]         int p1 = __VERIFIER_nondet_int();
[L9]         int lk1;
[L11]        int p2 = __VERIFIER_nondet_int();
[L12]        int lk2;
[L14]        int p3 = __VERIFIER_nondet_int();
[L15]        int lk3;
[L17]        int p4 = __VERIFIER_nondet_int();
[L18]        int lk4;
[L20]        int p5 = __VERIFIER_nondet_int();
[L21]        int lk5;
[L23]        int p6 = __VERIFIER_nondet_int();
[L24]        int lk6;
[L26]        int p7 = __VERIFIER_nondet_int();
[L27]        int lk7;
[L29]        int p8 = __VERIFIER_nondet_int();
[L30]        int lk8;
[L32]        int p9 = __VERIFIER_nondet_int();
[L33]        int lk9;
[L35]        int p10 = __VERIFIER_nondet_int();
[L36]        int lk10;
[L38]        int p11 = __VERIFIER_nondet_int();
[L39]        int lk11;
[L41]        int p12 = __VERIFIER_nondet_int();
[L42]        int lk12;
[L44]        int p13 = __VERIFIER_nondet_int();
[L45]        int lk13;
[L48]        int cond;
Loop:
[L50]   COND TRUE   1
[L51]               cond = __VERIFIER_nondet_int()
[L52]   COND FALSE  !(cond == 0)
[L55]               lk1 = 0
[L57]               lk2 = 0
[L59]               lk3 = 0
[L61]               lk4 = 0
[L63]               lk5 = 0
[L65]               lk6 = 0
[L67]               lk7 = 0
[L69]               lk8 = 0
[L71]               lk9 = 0
[L73]               lk10 = 0
[L75]               lk11 = 0
[L77]               lk12 = 0
[L79]               lk13 = 0
[L83]   COND FALSE  !(p1 != 0)
[L87]   COND FALSE  !(p2 != 0)
[L91]   COND FALSE  !(p3 != 0)
[L95]   COND FALSE  !(p4 != 0)
[L99]   COND FALSE  !(p5 != 0)
[L103]  COND FALSE  !(p6 != 0)
[L107]  COND FALSE  !(p7 != 0)
[L111]  COND FALSE  !(p8 != 0)
[L115]  COND FALSE  !(p9 != 0)
[L119]  COND FALSE  !(p10 != 0)
[L123]  COND FALSE  !(p11 != 0)
[L127]  COND FALSE  !(p12 != 0)
[L131]  COND FALSE  !(p13 != 0)
[L137]  COND FALSE  !(p1 != 0)
[L142]  COND FALSE  !(p2 != 0)
[L147]  COND FALSE  !(p3 != 0)
[L152]  COND FALSE  !(p4 != 0)
[L157]  COND FALSE  !(p5 != 0)
[L162]  COND FALSE  !(p6 != 0)
[L167]  COND FALSE  !(p7 != 0)
[L172]  COND FALSE  !(p8 != 0)
[L177]  COND FALSE  !(p9 != 0)
[L182]  COND FALSE  !(p10 != 0)
[L187]  COND FALSE  !(p11 != 0)
[L192]  COND FALSE  !(p12 != 0)
[L197]  COND FALSE  !(p13 != 0)
End of lasso representation.
  - StatisticsResult: NonterminationArgumentStatistics
    Fixpoint
  - NonterminatingLassoResult [Line: 50]: Nonterminating execution
    Found a nonterminating execution for the following lasso shaped sequence of statements.
Stem:
[L8]         int p1 = __VERIFIER_nondet_int();
[L9]         int lk1;
[L11]        int p2 = __VERIFIER_nondet_int();
[L12]        int lk2;
[L14]        int p3 = __VERIFIER_nondet_int();
[L15]        int lk3;
[L17]        int p4 = __VERIFIER_nondet_int();
[L18]        int lk4;
[L20]        int p5 = __VERIFIER_nondet_int();
[L21]        int lk5;
[L23]        int p6 = __VERIFIER_nondet_int();
[L24]        int lk6;
[L26]        int p7 = __VERIFIER_nondet_int();
[L27]        int lk7;
[L29]        int p8 = __VERIFIER_nondet_int();
[L30]        int lk8;
[L32]        int p9 = __VERIFIER_nondet_int();
[L33]        int lk9;
[L35]        int p10 = __VERIFIER_nondet_int();
[L36]        int lk10;
[L38]        int p11 = __VERIFIER_nondet_int();
[L39]        int lk11;
[L41]        int p12 = __VERIFIER_nondet_int();
[L42]        int lk12;
[L44]        int p13 = __VERIFIER_nondet_int();
[L45]        int lk13;
[L48]        int cond;
Loop:
[L50]   COND TRUE   1
[L51]               cond = __VERIFIER_nondet_int()
[L52]   COND FALSE  !(cond == 0)
[L55]               lk1 = 0
[L57]               lk2 = 0
[L59]               lk3 = 0
[L61]               lk4 = 0
[L63]               lk5 = 0
[L65]               lk6 = 0
[L67]               lk7 = 0
[L69]               lk8 = 0
[L71]               lk9 = 0
[L73]               lk10 = 0
[L75]               lk11 = 0
[L77]               lk12 = 0
[L79]               lk13 = 0
[L83]   COND FALSE  !(p1 != 0)
[L87]   COND FALSE  !(p2 != 0)
[L91]   COND FALSE  !(p3 != 0)
[L95]   COND FALSE  !(p4 != 0)
[L99]   COND FALSE  !(p5 != 0)
[L103]  COND FALSE  !(p6 != 0)
[L107]  COND FALSE  !(p7 != 0)
[L111]  COND FALSE  !(p8 != 0)
[L115]  COND FALSE  !(p9 != 0)
[L119]  COND FALSE  !(p10 != 0)
[L123]  COND FALSE  !(p11 != 0)
[L127]  COND FALSE  !(p12 != 0)
[L131]  COND FALSE  !(p13 != 0)
[L137]  COND FALSE  !(p1 != 0)
[L142]  COND FALSE  !(p2 != 0)
[L147]  COND FALSE  !(p3 != 0)
[L152]  COND FALSE  !(p4 != 0)
[L157]  COND FALSE  !(p5 != 0)
[L162]  COND FALSE  !(p6 != 0)
[L167]  COND FALSE  !(p7 != 0)
[L172]  COND FALSE  !(p8 != 0)
[L177]  COND FALSE  !(p9 != 0)
[L182]  COND FALSE  !(p10 != 0)
[L187]  COND FALSE  !(p11 != 0)
[L192]  COND FALSE  !(p12 != 0)
[L197]  COND FALSE  !(p13 != 0)
End of lasso representation.
RESULT: Ultimate proved your program to be incorrect!
[2025-02-08 14:32:02,190 INFO  L540       MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Forceful destruction successful, exit code 0
Received shutdown request...
--- End real Ultimate output ---

Execution finished normally
Writing output log to file Ultimate.log
Writing human readable error path to file UltimateCounterExample.errorpath
Result:
FALSE(TERM)