./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/locks/test_locks_15-1.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 48c9605d Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/locks/test_locks_15-1.c -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash 11a9c91fdf6b42598924d9a4ae5a3db9994a05118a3b564c2bd29b9bad4177b0 --- Real Ultimate output --- This is Ultimate 0.3.0-?-48c9605-m [2025-02-08 14:31:41,158 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-02-08 14:31:41,244 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2025-02-08 14:31:41,255 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-02-08 14:31:41,259 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-02-08 14:31:41,260 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-02-08 14:31:41,291 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-02-08 14:31:41,292 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-02-08 14:31:41,293 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-02-08 14:31:41,293 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-02-08 14:31:41,296 INFO L153 SettingsManager]: * Use memory slicer=true [2025-02-08 14:31:41,297 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-02-08 14:31:41,297 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-02-08 14:31:41,297 INFO L153 SettingsManager]: * Use SBE=true [2025-02-08 14:31:41,297 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-02-08 14:31:41,297 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-02-08 14:31:41,297 INFO L153 SettingsManager]: * Use old map elimination=false [2025-02-08 14:31:41,297 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-02-08 14:31:41,297 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-02-08 14:31:41,297 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-02-08 14:31:41,297 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-02-08 14:31:41,297 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-02-08 14:31:41,297 INFO L153 SettingsManager]: * sizeof long=4 [2025-02-08 14:31:41,297 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-02-08 14:31:41,297 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-02-08 14:31:41,298 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-02-08 14:31:41,298 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-02-08 14:31:41,298 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-02-08 14:31:41,299 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-02-08 14:31:41,299 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-02-08 14:31:41,299 INFO L153 SettingsManager]: * sizeof long double=12 [2025-02-08 14:31:41,299 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-02-08 14:31:41,299 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-02-08 14:31:41,299 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-02-08 14:31:41,299 INFO L153 SettingsManager]: * Use constant arrays=true [2025-02-08 14:31:41,299 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-02-08 14:31:41,299 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-02-08 14:31:41,299 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-02-08 14:31:41,299 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-02-08 14:31:41,299 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-02-08 14:31:41,299 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> 11a9c91fdf6b42598924d9a4ae5a3db9994a05118a3b564c2bd29b9bad4177b0 [2025-02-08 14:31:41,652 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-02-08 14:31:41,659 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-02-08 14:31:41,661 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-02-08 14:31:41,661 INFO L270 PluginConnector]: Initializing CDTParser... [2025-02-08 14:31:41,662 INFO L274 PluginConnector]: CDTParser initialized [2025-02-08 14:31:41,663 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/locks/test_locks_15-1.c [2025-02-08 14:31:42,872 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/ab5d97842/99c06acaa04a4877bce7271e486138c5/FLAGa56be8186 [2025-02-08 14:31:43,153 INFO L384 CDTParser]: Found 1 translation units. [2025-02-08 14:31:43,153 INFO L180 CDTParser]: Scanning /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/locks/test_locks_15-1.c [2025-02-08 14:31:43,159 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/ab5d97842/99c06acaa04a4877bce7271e486138c5/FLAGa56be8186 [2025-02-08 14:31:43,489 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/ab5d97842/99c06acaa04a4877bce7271e486138c5 [2025-02-08 14:31:43,491 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-02-08 14:31:43,493 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-02-08 14:31:43,494 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-02-08 14:31:43,495 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-02-08 14:31:43,497 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-02-08 14:31:43,498 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.02 02:31:43" (1/1) ... [2025-02-08 14:31:43,498 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7b1dc2ca and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:31:43, skipping insertion in model container [2025-02-08 14:31:43,499 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.02 02:31:43" (1/1) ... [2025-02-08 14:31:43,515 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-02-08 14:31:43,628 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-08 14:31:43,644 INFO L200 MainTranslator]: Completed pre-run [2025-02-08 14:31:43,670 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-08 14:31:43,679 INFO L204 MainTranslator]: Completed translation [2025-02-08 14:31:43,680 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:31:43 WrapperNode [2025-02-08 14:31:43,680 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-02-08 14:31:43,681 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-02-08 14:31:43,681 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-02-08 14:31:43,681 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-02-08 14:31:43,685 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:31:43" (1/1) ... [2025-02-08 14:31:43,689 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:31:43" (1/1) ... [2025-02-08 14:31:43,700 INFO L138 Inliner]: procedures = 12, calls = 8, calls flagged for inlining = 3, calls inlined = 3, statements flattened = 192 [2025-02-08 14:31:43,700 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-02-08 14:31:43,701 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-02-08 14:31:43,701 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-02-08 14:31:43,701 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-02-08 14:31:43,706 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:31:43" (1/1) ... [2025-02-08 14:31:43,707 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:31:43" (1/1) ... [2025-02-08 14:31:43,708 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:31:43" (1/1) ... [2025-02-08 14:31:43,714 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-02-08 14:31:43,714 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:31:43" (1/1) ... [2025-02-08 14:31:43,714 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:31:43" (1/1) ... [2025-02-08 14:31:43,721 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:31:43" (1/1) ... [2025-02-08 14:31:43,725 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:31:43" (1/1) ... [2025-02-08 14:31:43,726 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:31:43" (1/1) ... [2025-02-08 14:31:43,726 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:31:43" (1/1) ... [2025-02-08 14:31:43,727 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-02-08 14:31:43,731 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-02-08 14:31:43,731 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-02-08 14:31:43,731 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-02-08 14:31:43,732 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:31:43" (1/1) ... [2025-02-08 14:31:43,739 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-08 14:31:43,748 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 14:31:43,760 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-08 14:31:43,761 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-02-08 14:31:43,779 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-02-08 14:31:43,779 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-02-08 14:31:43,779 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-02-08 14:31:43,779 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-02-08 14:31:43,828 INFO L257 CfgBuilder]: Building ICFG [2025-02-08 14:31:43,830 INFO L287 CfgBuilder]: Building CFG for each procedure with an implementation [2025-02-08 14:31:44,043 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L233: assume { :begin_inline_reach_error } true;assume false;assume { :end_inline_reach_error } true;assume false;main_#res#1 := 0; [2025-02-08 14:31:44,064 INFO L? ?]: Removed 36 outVars from TransFormulas that were not future-live. [2025-02-08 14:31:44,065 INFO L308 CfgBuilder]: Performing block encoding [2025-02-08 14:31:44,071 INFO L332 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-02-08 14:31:44,071 INFO L337 CfgBuilder]: Removed 0 assume(true) statements. [2025-02-08 14:31:44,071 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 08.02 02:31:44 BoogieIcfgContainer [2025-02-08 14:31:44,071 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-02-08 14:31:44,073 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-02-08 14:31:44,073 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-02-08 14:31:44,077 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-02-08 14:31:44,077 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-08 14:31:44,078 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 08.02 02:31:43" (1/3) ... [2025-02-08 14:31:44,078 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@34a95d38 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 08.02 02:31:44, skipping insertion in model container [2025-02-08 14:31:44,078 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-08 14:31:44,078 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:31:43" (2/3) ... [2025-02-08 14:31:44,078 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@34a95d38 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 08.02 02:31:44, skipping insertion in model container [2025-02-08 14:31:44,079 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-08 14:31:44,079 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 08.02 02:31:44" (3/3) ... [2025-02-08 14:31:44,079 INFO L363 chiAutomizerObserver]: Analyzing ICFG test_locks_15-1.c [2025-02-08 14:31:44,126 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-02-08 14:31:44,126 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-02-08 14:31:44,126 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-02-08 14:31:44,126 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-02-08 14:31:44,126 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-02-08 14:31:44,126 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-02-08 14:31:44,127 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-02-08 14:31:44,127 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-02-08 14:31:44,130 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 53 states, 50 states have (on average 1.94) internal successors, (97), 52 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:31:44,139 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 47 [2025-02-08 14:31:44,140 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:31:44,140 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:31:44,144 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 14:31:44,144 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:31:44,144 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-02-08 14:31:44,144 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 53 states, 50 states have (on average 1.94) internal successors, (97), 52 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:31:44,146 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 47 [2025-02-08 14:31:44,146 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:31:44,146 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:31:44,147 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 14:31:44,147 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:31:44,150 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-02-08 14:31:44,150 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume 0 != main_~p1~0#1;main_~lk1~0#1 := 1;" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-02-08 14:31:44,154 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:31:44,154 INFO L85 PathProgramCache]: Analyzing trace with hash 179, now seen corresponding path program 1 times [2025-02-08 14:31:44,158 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:31:44,159 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1533997404] [2025-02-08 14:31:44,159 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:31:44,159 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:31:44,203 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:31:44,210 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:31:44,210 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:31:44,210 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:31:44,210 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:31:44,212 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:31:44,214 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:31:44,214 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:31:44,214 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:31:44,227 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:31:44,229 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:31:44,230 INFO L85 PathProgramCache]: Analyzing trace with hash 432403711, now seen corresponding path program 1 times [2025-02-08 14:31:44,230 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:31:44,230 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [71351320] [2025-02-08 14:31:44,230 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:31:44,230 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:31:44,237 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-02-08 14:31:44,245 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-02-08 14:31:44,245 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:31:44,245 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:31:44,317 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:31:44,317 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:31:44,317 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [71351320] [2025-02-08 14:31:44,318 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [71351320] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:31:44,318 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:31:44,318 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-08 14:31:44,318 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1176116928] [2025-02-08 14:31:44,319 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:31:44,321 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-08 14:31:44,321 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:31:44,337 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-08 14:31:44,337 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-08 14:31:44,338 INFO L87 Difference]: Start difference. First operand has 53 states, 50 states have (on average 1.94) internal successors, (97), 52 states have internal predecessors, (97), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 11.333333333333334) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:31:44,369 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:31:44,370 INFO L93 Difference]: Finished difference Result 98 states and 183 transitions. [2025-02-08 14:31:44,371 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 98 states and 183 transitions. [2025-02-08 14:31:44,373 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 93 [2025-02-08 14:31:44,381 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 98 states to 94 states and 148 transitions. [2025-02-08 14:31:44,382 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 94 [2025-02-08 14:31:44,383 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 94 [2025-02-08 14:31:44,383 INFO L73 IsDeterministic]: Start isDeterministic. Operand 94 states and 148 transitions. [2025-02-08 14:31:44,384 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:31:44,384 INFO L218 hiAutomatonCegarLoop]: Abstraction has 94 states and 148 transitions. [2025-02-08 14:31:44,392 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states and 148 transitions. [2025-02-08 14:31:44,405 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 94. [2025-02-08 14:31:44,406 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 94 states, 94 states have (on average 1.574468085106383) internal successors, (148), 93 states have internal predecessors, (148), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:31:44,407 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 148 transitions. [2025-02-08 14:31:44,410 INFO L240 hiAutomatonCegarLoop]: Abstraction has 94 states and 148 transitions. [2025-02-08 14:31:44,411 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-08 14:31:44,413 INFO L432 stractBuchiCegarLoop]: Abstraction has 94 states and 148 transitions. [2025-02-08 14:31:44,416 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-02-08 14:31:44,416 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 94 states and 148 transitions. [2025-02-08 14:31:44,417 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 93 [2025-02-08 14:31:44,417 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:31:44,417 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:31:44,418 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 14:31:44,419 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:31:44,419 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-02-08 14:31:44,419 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume 0 != main_~p3~0#1;main_~lk3~0#1 := 1;" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-02-08 14:31:44,420 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:31:44,420 INFO L85 PathProgramCache]: Analyzing trace with hash 179, now seen corresponding path program 2 times [2025-02-08 14:31:44,420 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:31:44,420 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1958668156] [2025-02-08 14:31:44,420 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-08 14:31:44,420 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:31:44,424 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:31:44,425 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:31:44,426 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-08 14:31:44,426 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:31:44,426 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:31:44,427 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:31:44,428 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:31:44,428 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:31:44,428 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:31:44,430 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:31:44,430 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:31:44,430 INFO L85 PathProgramCache]: Analyzing trace with hash -1577700130, now seen corresponding path program 1 times [2025-02-08 14:31:44,430 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:31:44,431 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1421425732] [2025-02-08 14:31:44,431 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:31:44,431 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:31:44,437 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-02-08 14:31:44,443 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-02-08 14:31:44,443 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:31:44,443 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:31:44,480 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:31:44,480 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:31:44,480 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1421425732] [2025-02-08 14:31:44,480 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1421425732] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:31:44,481 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:31:44,481 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-08 14:31:44,481 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1154270874] [2025-02-08 14:31:44,481 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:31:44,481 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-08 14:31:44,481 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:31:44,481 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-08 14:31:44,481 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-08 14:31:44,482 INFO L87 Difference]: Start difference. First operand 94 states and 148 transitions. cyclomatic complexity: 56 Second operand has 3 states, 3 states have (on average 11.333333333333334) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:31:44,502 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:31:44,502 INFO L93 Difference]: Finished difference Result 185 states and 289 transitions. [2025-02-08 14:31:44,503 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 185 states and 289 transitions. [2025-02-08 14:31:44,505 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 184 [2025-02-08 14:31:44,506 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 185 states to 185 states and 289 transitions. [2025-02-08 14:31:44,506 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 185 [2025-02-08 14:31:44,506 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 185 [2025-02-08 14:31:44,506 INFO L73 IsDeterministic]: Start isDeterministic. Operand 185 states and 289 transitions. [2025-02-08 14:31:44,507 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:31:44,507 INFO L218 hiAutomatonCegarLoop]: Abstraction has 185 states and 289 transitions. [2025-02-08 14:31:44,507 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 185 states and 289 transitions. [2025-02-08 14:31:44,513 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 185 to 185. [2025-02-08 14:31:44,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 185 states, 185 states have (on average 1.5621621621621622) internal successors, (289), 184 states have internal predecessors, (289), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:31:44,514 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 185 states to 185 states and 289 transitions. [2025-02-08 14:31:44,514 INFO L240 hiAutomatonCegarLoop]: Abstraction has 185 states and 289 transitions. [2025-02-08 14:31:44,515 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-08 14:31:44,515 INFO L432 stractBuchiCegarLoop]: Abstraction has 185 states and 289 transitions. [2025-02-08 14:31:44,516 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-02-08 14:31:44,516 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 185 states and 289 transitions. [2025-02-08 14:31:44,517 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 184 [2025-02-08 14:31:44,517 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:31:44,517 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:31:44,518 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 14:31:44,518 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:31:44,518 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-02-08 14:31:44,518 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume !(0 != main_~p3~0#1);" "assume 0 != main_~p4~0#1;main_~lk4~0#1 := 1;" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-02-08 14:31:44,518 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:31:44,519 INFO L85 PathProgramCache]: Analyzing trace with hash 179, now seen corresponding path program 3 times [2025-02-08 14:31:44,519 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:31:44,519 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1715581055] [2025-02-08 14:31:44,519 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-08 14:31:44,519 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:31:44,526 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:31:44,528 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:31:44,528 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-08 14:31:44,528 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:31:44,528 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:31:44,532 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:31:44,534 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:31:44,534 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:31:44,534 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:31:44,540 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:31:44,540 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:31:44,540 INFO L85 PathProgramCache]: Analyzing trace with hash -1566384003, now seen corresponding path program 1 times [2025-02-08 14:31:44,540 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:31:44,540 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1526348577] [2025-02-08 14:31:44,541 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:31:44,541 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:31:44,554 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-02-08 14:31:44,565 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-02-08 14:31:44,566 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:31:44,566 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:31:44,626 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:31:44,626 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:31:44,627 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1526348577] [2025-02-08 14:31:44,627 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1526348577] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:31:44,627 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:31:44,627 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-08 14:31:44,627 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [282240381] [2025-02-08 14:31:44,627 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:31:44,627 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-08 14:31:44,627 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:31:44,628 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-08 14:31:44,628 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-08 14:31:44,628 INFO L87 Difference]: Start difference. First operand 185 states and 289 transitions. cyclomatic complexity: 108 Second operand has 3 states, 3 states have (on average 11.333333333333334) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:31:44,642 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:31:44,642 INFO L93 Difference]: Finished difference Result 365 states and 565 transitions. [2025-02-08 14:31:44,642 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 365 states and 565 transitions. [2025-02-08 14:31:44,645 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 364 [2025-02-08 14:31:44,647 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 365 states to 365 states and 565 transitions. [2025-02-08 14:31:44,647 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 365 [2025-02-08 14:31:44,648 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 365 [2025-02-08 14:31:44,648 INFO L73 IsDeterministic]: Start isDeterministic. Operand 365 states and 565 transitions. [2025-02-08 14:31:44,649 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:31:44,649 INFO L218 hiAutomatonCegarLoop]: Abstraction has 365 states and 565 transitions. [2025-02-08 14:31:44,650 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 365 states and 565 transitions. [2025-02-08 14:31:44,660 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 365 to 365. [2025-02-08 14:31:44,661 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 365 states, 365 states have (on average 1.547945205479452) internal successors, (565), 364 states have internal predecessors, (565), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:31:44,662 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 365 states to 365 states and 565 transitions. [2025-02-08 14:31:44,663 INFO L240 hiAutomatonCegarLoop]: Abstraction has 365 states and 565 transitions. [2025-02-08 14:31:44,663 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-08 14:31:44,664 INFO L432 stractBuchiCegarLoop]: Abstraction has 365 states and 565 transitions. [2025-02-08 14:31:44,664 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-02-08 14:31:44,664 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 365 states and 565 transitions. [2025-02-08 14:31:44,666 INFO L131 ngComponentsAnalysis]: Automaton has 8 accepting balls. 364 [2025-02-08 14:31:44,666 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:31:44,666 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:31:44,666 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 14:31:44,667 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:31:44,667 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-02-08 14:31:44,667 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume 0 != main_~p5~0#1;main_~lk5~0#1 := 1;" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-02-08 14:31:44,667 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:31:44,667 INFO L85 PathProgramCache]: Analyzing trace with hash 179, now seen corresponding path program 4 times [2025-02-08 14:31:44,667 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:31:44,668 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [459225334] [2025-02-08 14:31:44,668 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-08 14:31:44,668 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:31:44,671 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 1 statements into 2 equivalence classes. [2025-02-08 14:31:44,672 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:31:44,672 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-08 14:31:44,672 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:31:44,673 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:31:44,674 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:31:44,674 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:31:44,674 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:31:44,674 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:31:44,676 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:31:44,676 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:31:44,676 INFO L85 PathProgramCache]: Analyzing trace with hash -873282306, now seen corresponding path program 1 times [2025-02-08 14:31:44,676 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:31:44,677 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1763675989] [2025-02-08 14:31:44,677 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:31:44,677 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:31:44,684 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-02-08 14:31:44,687 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-02-08 14:31:44,687 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:31:44,687 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:31:44,706 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:31:44,707 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:31:44,707 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1763675989] [2025-02-08 14:31:44,707 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1763675989] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:31:44,707 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:31:44,707 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-08 14:31:44,707 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1130404295] [2025-02-08 14:31:44,707 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:31:44,707 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-08 14:31:44,707 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:31:44,708 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-08 14:31:44,708 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-08 14:31:44,708 INFO L87 Difference]: Start difference. First operand 365 states and 565 transitions. cyclomatic complexity: 208 Second operand has 3 states, 3 states have (on average 11.333333333333334) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:31:44,724 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:31:44,724 INFO L93 Difference]: Finished difference Result 721 states and 1105 transitions. [2025-02-08 14:31:44,724 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 721 states and 1105 transitions. [2025-02-08 14:31:44,728 INFO L131 ngComponentsAnalysis]: Automaton has 16 accepting balls. 720 [2025-02-08 14:31:44,732 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 721 states to 721 states and 1105 transitions. [2025-02-08 14:31:44,732 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 721 [2025-02-08 14:31:44,733 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 721 [2025-02-08 14:31:44,733 INFO L73 IsDeterministic]: Start isDeterministic. Operand 721 states and 1105 transitions. [2025-02-08 14:31:44,735 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:31:44,735 INFO L218 hiAutomatonCegarLoop]: Abstraction has 721 states and 1105 transitions. [2025-02-08 14:31:44,736 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 721 states and 1105 transitions. [2025-02-08 14:31:44,750 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 721 to 721. [2025-02-08 14:31:44,752 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 721 states, 721 states have (on average 1.5325936199722607) internal successors, (1105), 720 states have internal predecessors, (1105), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:31:44,755 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 721 states to 721 states and 1105 transitions. [2025-02-08 14:31:44,755 INFO L240 hiAutomatonCegarLoop]: Abstraction has 721 states and 1105 transitions. [2025-02-08 14:31:44,755 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-08 14:31:44,756 INFO L432 stractBuchiCegarLoop]: Abstraction has 721 states and 1105 transitions. [2025-02-08 14:31:44,756 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-02-08 14:31:44,756 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 721 states and 1105 transitions. [2025-02-08 14:31:44,759 INFO L131 ngComponentsAnalysis]: Automaton has 16 accepting balls. 720 [2025-02-08 14:31:44,759 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:31:44,759 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:31:44,759 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 14:31:44,759 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:31:44,759 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-02-08 14:31:44,760 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume 0 != main_~p6~0#1;main_~lk6~0#1 := 1;" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-02-08 14:31:44,760 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:31:44,760 INFO L85 PathProgramCache]: Analyzing trace with hash 179, now seen corresponding path program 5 times [2025-02-08 14:31:44,760 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:31:44,760 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [355879260] [2025-02-08 14:31:44,760 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-08 14:31:44,760 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:31:44,763 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:31:44,765 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:31:44,765 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-08 14:31:44,765 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:31:44,765 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:31:44,766 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:31:44,767 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:31:44,767 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:31:44,767 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:31:44,768 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:31:44,769 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:31:44,769 INFO L85 PathProgramCache]: Analyzing trace with hash -1128018851, now seen corresponding path program 1 times [2025-02-08 14:31:44,769 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:31:44,769 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1642094716] [2025-02-08 14:31:44,769 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:31:44,769 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:31:44,773 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-02-08 14:31:44,775 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-02-08 14:31:44,775 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:31:44,776 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:31:44,800 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:31:44,800 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:31:44,800 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1642094716] [2025-02-08 14:31:44,800 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1642094716] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:31:44,800 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:31:44,800 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-08 14:31:44,800 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [179616732] [2025-02-08 14:31:44,801 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:31:44,801 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-08 14:31:44,801 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:31:44,801 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-08 14:31:44,801 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-08 14:31:44,802 INFO L87 Difference]: Start difference. First operand 721 states and 1105 transitions. cyclomatic complexity: 400 Second operand has 3 states, 3 states have (on average 11.333333333333334) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:31:44,816 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:31:44,816 INFO L93 Difference]: Finished difference Result 1425 states and 2161 transitions. [2025-02-08 14:31:44,816 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 1425 states and 2161 transitions. [2025-02-08 14:31:44,826 INFO L131 ngComponentsAnalysis]: Automaton has 32 accepting balls. 1424 [2025-02-08 14:31:44,832 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 1425 states to 1425 states and 2161 transitions. [2025-02-08 14:31:44,832 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 1425 [2025-02-08 14:31:44,833 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 1425 [2025-02-08 14:31:44,833 INFO L73 IsDeterministic]: Start isDeterministic. Operand 1425 states and 2161 transitions. [2025-02-08 14:31:44,835 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:31:44,835 INFO L218 hiAutomatonCegarLoop]: Abstraction has 1425 states and 2161 transitions. [2025-02-08 14:31:44,836 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 1425 states and 2161 transitions. [2025-02-08 14:31:44,854 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 1425 to 1425. [2025-02-08 14:31:44,857 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 1425 states, 1425 states have (on average 1.5164912280701754) internal successors, (2161), 1424 states have internal predecessors, (2161), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:31:44,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 1425 states to 1425 states and 2161 transitions. [2025-02-08 14:31:44,862 INFO L240 hiAutomatonCegarLoop]: Abstraction has 1425 states and 2161 transitions. [2025-02-08 14:31:44,863 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-08 14:31:44,863 INFO L432 stractBuchiCegarLoop]: Abstraction has 1425 states and 2161 transitions. [2025-02-08 14:31:44,863 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-02-08 14:31:44,863 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 1425 states and 2161 transitions. [2025-02-08 14:31:44,869 INFO L131 ngComponentsAnalysis]: Automaton has 32 accepting balls. 1424 [2025-02-08 14:31:44,869 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:31:44,869 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:31:44,869 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 14:31:44,869 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:31:44,870 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-02-08 14:31:44,870 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume 0 != main_~p7~0#1;main_~lk7~0#1 := 1;" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-02-08 14:31:44,870 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:31:44,870 INFO L85 PathProgramCache]: Analyzing trace with hash 179, now seen corresponding path program 6 times [2025-02-08 14:31:44,870 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:31:44,871 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1444949582] [2025-02-08 14:31:44,871 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-08 14:31:44,871 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:31:44,874 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:31:44,875 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:31:44,875 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-02-08 14:31:44,875 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:31:44,875 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:31:44,876 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:31:44,877 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:31:44,877 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:31:44,877 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:31:44,878 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:31:44,878 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:31:44,878 INFO L85 PathProgramCache]: Analyzing trace with hash -166404834, now seen corresponding path program 1 times [2025-02-08 14:31:44,878 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:31:44,878 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1149846768] [2025-02-08 14:31:44,879 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:31:44,879 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:31:44,883 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-02-08 14:31:44,885 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-02-08 14:31:44,885 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:31:44,885 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:31:44,912 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:31:44,912 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:31:44,912 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1149846768] [2025-02-08 14:31:44,912 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1149846768] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:31:44,912 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:31:44,912 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-08 14:31:44,912 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [874027424] [2025-02-08 14:31:44,912 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:31:44,913 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-08 14:31:44,913 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:31:44,913 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-08 14:31:44,913 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-08 14:31:44,914 INFO L87 Difference]: Start difference. First operand 1425 states and 2161 transitions. cyclomatic complexity: 768 Second operand has 3 states, 3 states have (on average 11.333333333333334) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:31:44,943 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:31:44,944 INFO L93 Difference]: Finished difference Result 2817 states and 4225 transitions. [2025-02-08 14:31:44,944 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 2817 states and 4225 transitions. [2025-02-08 14:31:44,974 INFO L131 ngComponentsAnalysis]: Automaton has 64 accepting balls. 2816 [2025-02-08 14:31:44,984 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 2817 states to 2817 states and 4225 transitions. [2025-02-08 14:31:44,985 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 2817 [2025-02-08 14:31:44,986 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 2817 [2025-02-08 14:31:44,987 INFO L73 IsDeterministic]: Start isDeterministic. Operand 2817 states and 4225 transitions. [2025-02-08 14:31:44,989 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:31:44,989 INFO L218 hiAutomatonCegarLoop]: Abstraction has 2817 states and 4225 transitions. [2025-02-08 14:31:44,991 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 2817 states and 4225 transitions. [2025-02-08 14:31:45,057 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 2817 to 2817. [2025-02-08 14:31:45,061 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 2817 states, 2817 states have (on average 1.4998225062122825) internal successors, (4225), 2816 states have internal predecessors, (4225), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:31:45,068 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 2817 states to 2817 states and 4225 transitions. [2025-02-08 14:31:45,068 INFO L240 hiAutomatonCegarLoop]: Abstraction has 2817 states and 4225 transitions. [2025-02-08 14:31:45,069 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-08 14:31:45,069 INFO L432 stractBuchiCegarLoop]: Abstraction has 2817 states and 4225 transitions. [2025-02-08 14:31:45,069 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-02-08 14:31:45,069 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 2817 states and 4225 transitions. [2025-02-08 14:31:45,078 INFO L131 ngComponentsAnalysis]: Automaton has 64 accepting balls. 2816 [2025-02-08 14:31:45,079 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:31:45,079 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:31:45,079 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 14:31:45,079 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:31:45,079 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-02-08 14:31:45,080 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume 0 != main_~p8~0#1;main_~lk8~0#1 := 1;" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-02-08 14:31:45,080 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:31:45,080 INFO L85 PathProgramCache]: Analyzing trace with hash 179, now seen corresponding path program 7 times [2025-02-08 14:31:45,080 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:31:45,080 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [273269845] [2025-02-08 14:31:45,080 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-02-08 14:31:45,081 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:31:45,084 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:31:45,085 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:31:45,085 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:31:45,085 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:31:45,085 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:31:45,086 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:31:45,087 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:31:45,087 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:31:45,087 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:31:45,088 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:31:45,088 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:31:45,089 INFO L85 PathProgramCache]: Analyzing trace with hash -135385027, now seen corresponding path program 1 times [2025-02-08 14:31:45,089 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:31:45,089 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [488576403] [2025-02-08 14:31:45,089 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:31:45,089 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:31:45,096 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-02-08 14:31:45,098 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-02-08 14:31:45,103 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:31:45,103 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:31:45,127 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:31:45,127 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:31:45,127 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [488576403] [2025-02-08 14:31:45,128 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [488576403] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:31:45,128 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:31:45,128 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-08 14:31:45,128 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1635878307] [2025-02-08 14:31:45,129 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:31:45,129 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-08 14:31:45,129 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:31:45,129 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-08 14:31:45,129 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-08 14:31:45,129 INFO L87 Difference]: Start difference. First operand 2817 states and 4225 transitions. cyclomatic complexity: 1472 Second operand has 3 states, 3 states have (on average 11.333333333333334) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:31:45,164 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:31:45,164 INFO L93 Difference]: Finished difference Result 5569 states and 8257 transitions. [2025-02-08 14:31:45,164 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 5569 states and 8257 transitions. [2025-02-08 14:31:45,195 INFO L131 ngComponentsAnalysis]: Automaton has 128 accepting balls. 5568 [2025-02-08 14:31:45,216 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 5569 states to 5569 states and 8257 transitions. [2025-02-08 14:31:45,216 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 5569 [2025-02-08 14:31:45,219 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 5569 [2025-02-08 14:31:45,219 INFO L73 IsDeterministic]: Start isDeterministic. Operand 5569 states and 8257 transitions. [2025-02-08 14:31:45,224 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:31:45,224 INFO L218 hiAutomatonCegarLoop]: Abstraction has 5569 states and 8257 transitions. [2025-02-08 14:31:45,226 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 5569 states and 8257 transitions. [2025-02-08 14:31:45,316 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 5569 to 5569. [2025-02-08 14:31:45,322 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 5569 states, 5569 states have (on average 1.4826719339199137) internal successors, (8257), 5568 states have internal predecessors, (8257), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:31:45,335 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 5569 states to 5569 states and 8257 transitions. [2025-02-08 14:31:45,336 INFO L240 hiAutomatonCegarLoop]: Abstraction has 5569 states and 8257 transitions. [2025-02-08 14:31:45,336 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-08 14:31:45,337 INFO L432 stractBuchiCegarLoop]: Abstraction has 5569 states and 8257 transitions. [2025-02-08 14:31:45,337 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-02-08 14:31:45,337 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 5569 states and 8257 transitions. [2025-02-08 14:31:45,351 INFO L131 ngComponentsAnalysis]: Automaton has 128 accepting balls. 5568 [2025-02-08 14:31:45,351 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:31:45,351 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:31:45,351 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 14:31:45,351 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:31:45,351 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-02-08 14:31:45,351 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume 0 != main_~p9~0#1;main_~lk9~0#1 := 1;" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-02-08 14:31:45,352 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:31:45,352 INFO L85 PathProgramCache]: Analyzing trace with hash 179, now seen corresponding path program 8 times [2025-02-08 14:31:45,352 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:31:45,352 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [675539580] [2025-02-08 14:31:45,352 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-08 14:31:45,352 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:31:45,355 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:31:45,355 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:31:45,356 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-08 14:31:45,356 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:31:45,356 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:31:45,356 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:31:45,357 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:31:45,357 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:31:45,357 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:31:45,358 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:31:45,359 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:31:45,359 INFO L85 PathProgramCache]: Analyzing trace with hash 2082372926, now seen corresponding path program 1 times [2025-02-08 14:31:45,359 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:31:45,359 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2089466737] [2025-02-08 14:31:45,359 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:31:45,359 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:31:45,362 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-02-08 14:31:45,363 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-02-08 14:31:45,364 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:31:45,364 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:31:45,378 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:31:45,379 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:31:45,379 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2089466737] [2025-02-08 14:31:45,379 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2089466737] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:31:45,379 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:31:45,379 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-08 14:31:45,379 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1182449247] [2025-02-08 14:31:45,379 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:31:45,379 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-08 14:31:45,379 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:31:45,379 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-08 14:31:45,380 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-08 14:31:45,380 INFO L87 Difference]: Start difference. First operand 5569 states and 8257 transitions. cyclomatic complexity: 2816 Second operand has 3 states, 3 states have (on average 11.333333333333334) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:31:45,455 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:31:45,455 INFO L93 Difference]: Finished difference Result 11009 states and 16129 transitions. [2025-02-08 14:31:45,455 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 11009 states and 16129 transitions. [2025-02-08 14:31:45,490 INFO L131 ngComponentsAnalysis]: Automaton has 256 accepting balls. 11008 [2025-02-08 14:31:45,522 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 11009 states to 11009 states and 16129 transitions. [2025-02-08 14:31:45,522 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 11009 [2025-02-08 14:31:45,527 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 11009 [2025-02-08 14:31:45,527 INFO L73 IsDeterministic]: Start isDeterministic. Operand 11009 states and 16129 transitions. [2025-02-08 14:31:45,537 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:31:45,537 INFO L218 hiAutomatonCegarLoop]: Abstraction has 11009 states and 16129 transitions. [2025-02-08 14:31:45,542 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 11009 states and 16129 transitions. [2025-02-08 14:31:45,695 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 11009 to 11009. [2025-02-08 14:31:45,711 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 11009 states, 11009 states have (on average 1.4650740303388137) internal successors, (16129), 11008 states have internal predecessors, (16129), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:31:45,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 11009 states to 11009 states and 16129 transitions. [2025-02-08 14:31:45,739 INFO L240 hiAutomatonCegarLoop]: Abstraction has 11009 states and 16129 transitions. [2025-02-08 14:31:45,739 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-08 14:31:45,740 INFO L432 stractBuchiCegarLoop]: Abstraction has 11009 states and 16129 transitions. [2025-02-08 14:31:45,740 INFO L338 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2025-02-08 14:31:45,740 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 11009 states and 16129 transitions. [2025-02-08 14:31:45,779 INFO L131 ngComponentsAnalysis]: Automaton has 256 accepting balls. 11008 [2025-02-08 14:31:45,779 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:31:45,779 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:31:45,780 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 14:31:45,780 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:31:45,780 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-02-08 14:31:45,780 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume 0 != main_~p10~0#1;main_~lk10~0#1 := 1;" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-02-08 14:31:45,780 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:31:45,780 INFO L85 PathProgramCache]: Analyzing trace with hash 179, now seen corresponding path program 9 times [2025-02-08 14:31:45,780 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:31:45,780 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [79180676] [2025-02-08 14:31:45,780 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-08 14:31:45,780 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:31:45,783 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:31:45,784 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:31:45,784 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-08 14:31:45,784 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:31:45,784 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:31:45,785 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:31:45,785 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:31:45,785 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:31:45,785 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:31:45,787 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:31:45,789 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:31:45,789 INFO L85 PathProgramCache]: Analyzing trace with hash 2015366173, now seen corresponding path program 1 times [2025-02-08 14:31:45,789 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:31:45,789 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1855630175] [2025-02-08 14:31:45,789 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:31:45,790 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:31:45,798 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-02-08 14:31:45,800 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-02-08 14:31:45,804 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:31:45,804 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:31:45,844 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:31:45,848 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:31:45,849 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1855630175] [2025-02-08 14:31:45,849 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1855630175] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:31:45,849 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:31:45,849 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-08 14:31:45,850 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1459901455] [2025-02-08 14:31:45,850 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:31:45,850 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-08 14:31:45,850 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:31:45,850 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-08 14:31:45,851 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-08 14:31:45,851 INFO L87 Difference]: Start difference. First operand 11009 states and 16129 transitions. cyclomatic complexity: 5376 Second operand has 3 states, 3 states have (on average 11.333333333333334) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:31:46,003 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:31:46,005 INFO L93 Difference]: Finished difference Result 21761 states and 31489 transitions. [2025-02-08 14:31:46,005 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 21761 states and 31489 transitions. [2025-02-08 14:31:46,219 INFO L131 ngComponentsAnalysis]: Automaton has 512 accepting balls. 21760 [2025-02-08 14:31:46,264 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 21761 states to 21761 states and 31489 transitions. [2025-02-08 14:31:46,264 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 21761 [2025-02-08 14:31:46,274 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 21761 [2025-02-08 14:31:46,274 INFO L73 IsDeterministic]: Start isDeterministic. Operand 21761 states and 31489 transitions. [2025-02-08 14:31:46,289 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:31:46,290 INFO L218 hiAutomatonCegarLoop]: Abstraction has 21761 states and 31489 transitions. [2025-02-08 14:31:46,299 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21761 states and 31489 transitions. [2025-02-08 14:31:46,572 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21761 to 21761. [2025-02-08 14:31:46,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 21761 states, 21761 states have (on average 1.4470382794908323) internal successors, (31489), 21760 states have internal predecessors, (31489), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:31:46,644 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21761 states to 21761 states and 31489 transitions. [2025-02-08 14:31:46,645 INFO L240 hiAutomatonCegarLoop]: Abstraction has 21761 states and 31489 transitions. [2025-02-08 14:31:46,645 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-08 14:31:46,645 INFO L432 stractBuchiCegarLoop]: Abstraction has 21761 states and 31489 transitions. [2025-02-08 14:31:46,646 INFO L338 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2025-02-08 14:31:46,646 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 21761 states and 31489 transitions. [2025-02-08 14:31:46,692 INFO L131 ngComponentsAnalysis]: Automaton has 512 accepting balls. 21760 [2025-02-08 14:31:46,692 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:31:46,692 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:31:46,693 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 14:31:46,693 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:31:46,693 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-02-08 14:31:46,693 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume 0 != main_~p11~0#1;main_~lk11~0#1 := 1;" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-02-08 14:31:46,693 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:31:46,694 INFO L85 PathProgramCache]: Analyzing trace with hash 179, now seen corresponding path program 10 times [2025-02-08 14:31:46,694 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:31:46,694 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1834711821] [2025-02-08 14:31:46,694 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-08 14:31:46,694 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:31:46,696 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 1 statements into 2 equivalence classes. [2025-02-08 14:31:46,697 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:31:46,697 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-08 14:31:46,697 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:31:46,697 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:31:46,697 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:31:46,698 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:31:46,698 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:31:46,698 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:31:46,699 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:31:46,700 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:31:46,700 INFO L85 PathProgramCache]: Analyzing trace with hash -1034836642, now seen corresponding path program 1 times [2025-02-08 14:31:46,700 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:31:46,700 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [172340707] [2025-02-08 14:31:46,700 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:31:46,700 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:31:46,703 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-02-08 14:31:46,704 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-02-08 14:31:46,704 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:31:46,704 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:31:46,717 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:31:46,717 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:31:46,717 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [172340707] [2025-02-08 14:31:46,717 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [172340707] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:31:46,717 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:31:46,717 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-08 14:31:46,717 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [829803919] [2025-02-08 14:31:46,717 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:31:46,718 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-08 14:31:46,718 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:31:46,718 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-08 14:31:46,718 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-08 14:31:46,718 INFO L87 Difference]: Start difference. First operand 21761 states and 31489 transitions. cyclomatic complexity: 10240 Second operand has 3 states, 3 states have (on average 11.333333333333334) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:31:47,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:31:47,004 INFO L93 Difference]: Finished difference Result 43009 states and 61441 transitions. [2025-02-08 14:31:47,004 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 43009 states and 61441 transitions. [2025-02-08 14:31:47,439 INFO L131 ngComponentsAnalysis]: Automaton has 1024 accepting balls. 43008 [2025-02-08 14:31:47,527 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 43009 states to 43009 states and 61441 transitions. [2025-02-08 14:31:47,528 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 43009 [2025-02-08 14:31:47,556 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 43009 [2025-02-08 14:31:47,557 INFO L73 IsDeterministic]: Start isDeterministic. Operand 43009 states and 61441 transitions. [2025-02-08 14:31:47,592 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:31:47,592 INFO L218 hiAutomatonCegarLoop]: Abstraction has 43009 states and 61441 transitions. [2025-02-08 14:31:47,617 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43009 states and 61441 transitions. [2025-02-08 14:31:48,018 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43009 to 43009. [2025-02-08 14:31:48,073 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43009 states, 43009 states have (on average 1.428561463879653) internal successors, (61441), 43008 states have internal predecessors, (61441), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:31:48,240 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43009 states to 43009 states and 61441 transitions. [2025-02-08 14:31:48,240 INFO L240 hiAutomatonCegarLoop]: Abstraction has 43009 states and 61441 transitions. [2025-02-08 14:31:48,248 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-08 14:31:48,248 INFO L432 stractBuchiCegarLoop]: Abstraction has 43009 states and 61441 transitions. [2025-02-08 14:31:48,248 INFO L338 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2025-02-08 14:31:48,248 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 43009 states and 61441 transitions. [2025-02-08 14:31:48,621 INFO L131 ngComponentsAnalysis]: Automaton has 1024 accepting balls. 43008 [2025-02-08 14:31:48,622 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:31:48,622 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:31:48,623 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 14:31:48,623 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:31:48,623 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-02-08 14:31:48,623 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume 0 != main_~p12~0#1;main_~lk12~0#1 := 1;" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-02-08 14:31:48,624 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:31:48,624 INFO L85 PathProgramCache]: Analyzing trace with hash 179, now seen corresponding path program 11 times [2025-02-08 14:31:48,624 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:31:48,624 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1972105798] [2025-02-08 14:31:48,624 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-08 14:31:48,624 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:31:48,630 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:31:48,631 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:31:48,634 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-08 14:31:48,634 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:31:48,634 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:31:48,635 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:31:48,636 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:31:48,636 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:31:48,636 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:31:48,639 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:31:48,639 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:31:48,639 INFO L85 PathProgramCache]: Analyzing trace with hash 1222074365, now seen corresponding path program 1 times [2025-02-08 14:31:48,639 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:31:48,639 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [955907259] [2025-02-08 14:31:48,639 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:31:48,640 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:31:48,646 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-02-08 14:31:48,647 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-02-08 14:31:48,650 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:31:48,650 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:31:48,668 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:31:48,668 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:31:48,668 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [955907259] [2025-02-08 14:31:48,668 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [955907259] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:31:48,668 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:31:48,668 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-08 14:31:48,668 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [850201736] [2025-02-08 14:31:48,668 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:31:48,669 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-08 14:31:48,669 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:31:48,669 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-08 14:31:48,669 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-08 14:31:48,669 INFO L87 Difference]: Start difference. First operand 43009 states and 61441 transitions. cyclomatic complexity: 19456 Second operand has 3 states, 3 states have (on average 11.333333333333334) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:31:48,984 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:31:48,984 INFO L93 Difference]: Finished difference Result 84993 states and 119809 transitions. [2025-02-08 14:31:48,984 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 84993 states and 119809 transitions. [2025-02-08 14:31:49,328 INFO L131 ngComponentsAnalysis]: Automaton has 2048 accepting balls. 84992 [2025-02-08 14:31:49,659 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 84993 states to 84993 states and 119809 transitions. [2025-02-08 14:31:49,660 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 84993 [2025-02-08 14:31:49,726 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 84993 [2025-02-08 14:31:49,726 INFO L73 IsDeterministic]: Start isDeterministic. Operand 84993 states and 119809 transitions. [2025-02-08 14:31:49,806 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:31:49,806 INFO L218 hiAutomatonCegarLoop]: Abstraction has 84993 states and 119809 transitions. [2025-02-08 14:31:49,850 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84993 states and 119809 transitions. [2025-02-08 14:31:50,645 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84993 to 84993. [2025-02-08 14:31:50,741 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 84993 states, 84993 states have (on average 1.4096337345428447) internal successors, (119809), 84992 states have internal predecessors, (119809), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:31:51,076 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84993 states to 84993 states and 119809 transitions. [2025-02-08 14:31:51,076 INFO L240 hiAutomatonCegarLoop]: Abstraction has 84993 states and 119809 transitions. [2025-02-08 14:31:51,076 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-08 14:31:51,079 INFO L432 stractBuchiCegarLoop]: Abstraction has 84993 states and 119809 transitions. [2025-02-08 14:31:51,079 INFO L338 stractBuchiCegarLoop]: ======== Iteration 12 ============ [2025-02-08 14:31:51,079 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 84993 states and 119809 transitions. [2025-02-08 14:31:51,343 INFO L131 ngComponentsAnalysis]: Automaton has 2048 accepting balls. 84992 [2025-02-08 14:31:51,344 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:31:51,344 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:31:51,345 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 14:31:51,348 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:31:51,349 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-02-08 14:31:51,349 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume 0 != main_~p13~0#1;main_~lk13~0#1 := 1;" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-02-08 14:31:51,349 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:31:51,349 INFO L85 PathProgramCache]: Analyzing trace with hash 179, now seen corresponding path program 12 times [2025-02-08 14:31:51,349 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:31:51,349 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1531949336] [2025-02-08 14:31:51,349 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-08 14:31:51,349 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:31:51,352 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:31:51,358 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:31:51,359 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-02-08 14:31:51,359 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:31:51,359 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:31:51,360 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:31:51,364 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:31:51,364 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:31:51,364 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:31:51,365 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:31:51,366 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:31:51,366 INFO L85 PathProgramCache]: Analyzing trace with hash 1433425278, now seen corresponding path program 1 times [2025-02-08 14:31:51,367 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:31:51,367 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1968572105] [2025-02-08 14:31:51,367 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:31:51,367 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:31:51,374 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-02-08 14:31:51,375 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-02-08 14:31:51,378 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:31:51,378 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:31:51,407 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:31:51,408 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:31:51,412 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1968572105] [2025-02-08 14:31:51,412 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1968572105] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:31:51,412 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:31:51,413 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-08 14:31:51,413 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [888757925] [2025-02-08 14:31:51,413 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:31:51,413 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-08 14:31:51,413 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:31:51,413 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-08 14:31:51,413 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-08 14:31:51,413 INFO L87 Difference]: Start difference. First operand 84993 states and 119809 transitions. cyclomatic complexity: 36864 Second operand has 3 states, 3 states have (on average 11.333333333333334) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:31:52,023 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:31:52,024 INFO L93 Difference]: Finished difference Result 167937 states and 233473 transitions. [2025-02-08 14:31:52,024 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 167937 states and 233473 transitions. [2025-02-08 14:31:52,850 INFO L131 ngComponentsAnalysis]: Automaton has 4096 accepting balls. 167936 [2025-02-08 14:31:53,569 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 167937 states to 167937 states and 233473 transitions. [2025-02-08 14:31:53,570 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 167937 [2025-02-08 14:31:53,643 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 167937 [2025-02-08 14:31:53,644 INFO L73 IsDeterministic]: Start isDeterministic. Operand 167937 states and 233473 transitions. [2025-02-08 14:31:53,699 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:31:53,699 INFO L218 hiAutomatonCegarLoop]: Abstraction has 167937 states and 233473 transitions. [2025-02-08 14:31:53,755 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167937 states and 233473 transitions. [2025-02-08 14:31:55,402 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167937 to 167937. [2025-02-08 14:31:55,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 167937 states, 167937 states have (on average 1.3902415786872457) internal successors, (233473), 167936 states have internal predecessors, (233473), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:31:55,907 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167937 states to 167937 states and 233473 transitions. [2025-02-08 14:31:55,908 INFO L240 hiAutomatonCegarLoop]: Abstraction has 167937 states and 233473 transitions. [2025-02-08 14:31:55,911 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-08 14:31:55,912 INFO L432 stractBuchiCegarLoop]: Abstraction has 167937 states and 233473 transitions. [2025-02-08 14:31:55,912 INFO L338 stractBuchiCegarLoop]: ======== Iteration 13 ============ [2025-02-08 14:31:55,913 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 167937 states and 233473 transitions. [2025-02-08 14:31:56,732 INFO L131 ngComponentsAnalysis]: Automaton has 4096 accepting balls. 167936 [2025-02-08 14:31:56,732 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:31:56,733 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:31:56,735 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 14:31:56,735 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:31:56,735 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-02-08 14:31:56,735 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume 0 != main_~p15~0#1;main_~lk15~0#1 := 1;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-02-08 14:31:56,736 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:31:56,736 INFO L85 PathProgramCache]: Analyzing trace with hash 179, now seen corresponding path program 13 times [2025-02-08 14:31:56,736 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:31:56,736 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [470025090] [2025-02-08 14:31:56,736 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-02-08 14:31:56,736 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:31:56,741 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:31:56,742 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:31:56,742 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:31:56,742 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:31:56,742 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:31:56,743 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:31:56,744 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:31:56,744 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:31:56,745 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:31:56,746 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:31:56,746 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:31:56,747 INFO L85 PathProgramCache]: Analyzing trace with hash 1024601053, now seen corresponding path program 1 times [2025-02-08 14:31:56,747 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:31:56,747 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1892405633] [2025-02-08 14:31:56,747 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:31:56,747 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:31:56,751 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-02-08 14:31:56,752 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-02-08 14:31:56,753 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:31:56,753 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:31:56,768 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:31:56,768 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:31:56,768 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1892405633] [2025-02-08 14:31:56,768 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1892405633] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:31:56,768 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:31:56,768 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-02-08 14:31:56,768 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [975288888] [2025-02-08 14:31:56,769 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:31:56,769 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-08 14:31:56,769 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:31:56,769 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-08 14:31:56,769 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-08 14:31:56,769 INFO L87 Difference]: Start difference. First operand 167937 states and 233473 transitions. cyclomatic complexity: 69632 Second operand has 3 states, 2 states have (on average 17.0) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:31:58,194 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:31:58,194 INFO L93 Difference]: Finished difference Result 331777 states and 454657 transitions. [2025-02-08 14:31:58,194 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 331777 states and 454657 transitions. [2025-02-08 14:32:00,188 INFO L131 ngComponentsAnalysis]: Automaton has 8192 accepting balls. 331776 [2025-02-08 14:32:01,396 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 331777 states to 331777 states and 454657 transitions. [2025-02-08 14:32:01,397 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 331777 [2025-02-08 14:32:01,601 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 331777 [2025-02-08 14:32:01,602 INFO L73 IsDeterministic]: Start isDeterministic. Operand 331777 states and 454657 transitions. [2025-02-08 14:32:02,063 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:32:02,064 INFO L218 hiAutomatonCegarLoop]: Abstraction has 331777 states and 454657 transitions. [2025-02-08 14:32:02,151 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 331777 states and 454657 transitions. [2025-02-08 14:32:04,335 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 331777 to 331777. [2025-02-08 14:32:05,125 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 331777 states, 331777 states have (on average 1.3703692540471462) internal successors, (454657), 331776 states have internal predecessors, (454657), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:32:06,029 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 331777 states to 331777 states and 454657 transitions. [2025-02-08 14:32:06,030 INFO L240 hiAutomatonCegarLoop]: Abstraction has 331777 states and 454657 transitions. [2025-02-08 14:32:06,030 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-08 14:32:06,031 INFO L432 stractBuchiCegarLoop]: Abstraction has 331777 states and 454657 transitions. [2025-02-08 14:32:06,031 INFO L338 stractBuchiCegarLoop]: ======== Iteration 14 ============ [2025-02-08 14:32:06,032 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 331777 states and 454657 transitions. [2025-02-08 14:32:07,485 INFO L131 ngComponentsAnalysis]: Automaton has 8192 accepting balls. 331776 [2025-02-08 14:32:07,485 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:32:07,486 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:32:07,489 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1] [2025-02-08 14:32:07,489 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:32:07,489 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(18, 2);call #Ultimate.allocInit(12, 3);assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_#t~nondet4#1, main_#t~nondet5#1, main_#t~nondet6#1, main_#t~nondet7#1, main_#t~nondet8#1, main_#t~nondet9#1, main_#t~nondet10#1, main_#t~nondet11#1, main_#t~nondet12#1, main_#t~nondet13#1, main_#t~nondet14#1, main_#t~nondet15#1, main_#t~nondet16#1, main_#t~nondet17#1, main_#t~nondet18#1, main_#t~nondet19#1, main_~p1~0#1, main_~lk1~0#1, main_~p2~0#1, main_~lk2~0#1, main_~p3~0#1, main_~lk3~0#1, main_~p4~0#1, main_~lk4~0#1, main_~p5~0#1, main_~lk5~0#1, main_~p6~0#1, main_~lk6~0#1, main_~p7~0#1, main_~lk7~0#1, main_~p8~0#1, main_~lk8~0#1, main_~p9~0#1, main_~lk9~0#1, main_~p10~0#1, main_~lk10~0#1, main_~p11~0#1, main_~lk11~0#1, main_~p12~0#1, main_~lk12~0#1, main_~p13~0#1, main_~lk13~0#1, main_~p14~0#1, main_~lk14~0#1, main_~p15~0#1, main_~lk15~0#1, main_~cond~0#1;havoc main_#t~nondet4#1;main_~p1~0#1 := main_#t~nondet4#1;havoc main_#t~nondet4#1;havoc main_~lk1~0#1;havoc main_#t~nondet5#1;main_~p2~0#1 := main_#t~nondet5#1;havoc main_#t~nondet5#1;havoc main_~lk2~0#1;havoc main_#t~nondet6#1;main_~p3~0#1 := main_#t~nondet6#1;havoc main_#t~nondet6#1;havoc main_~lk3~0#1;havoc main_#t~nondet7#1;main_~p4~0#1 := main_#t~nondet7#1;havoc main_#t~nondet7#1;havoc main_~lk4~0#1;havoc main_#t~nondet8#1;main_~p5~0#1 := main_#t~nondet8#1;havoc main_#t~nondet8#1;havoc main_~lk5~0#1;havoc main_#t~nondet9#1;main_~p6~0#1 := main_#t~nondet9#1;havoc main_#t~nondet9#1;havoc main_~lk6~0#1;havoc main_#t~nondet10#1;main_~p7~0#1 := main_#t~nondet10#1;havoc main_#t~nondet10#1;havoc main_~lk7~0#1;havoc main_#t~nondet11#1;main_~p8~0#1 := main_#t~nondet11#1;havoc main_#t~nondet11#1;havoc main_~lk8~0#1;havoc main_#t~nondet12#1;main_~p9~0#1 := main_#t~nondet12#1;havoc main_#t~nondet12#1;havoc main_~lk9~0#1;havoc main_#t~nondet13#1;main_~p10~0#1 := main_#t~nondet13#1;havoc main_#t~nondet13#1;havoc main_~lk10~0#1;havoc main_#t~nondet14#1;main_~p11~0#1 := main_#t~nondet14#1;havoc main_#t~nondet14#1;havoc main_~lk11~0#1;havoc main_#t~nondet15#1;main_~p12~0#1 := main_#t~nondet15#1;havoc main_#t~nondet15#1;havoc main_~lk12~0#1;havoc main_#t~nondet16#1;main_~p13~0#1 := main_#t~nondet16#1;havoc main_#t~nondet16#1;havoc main_~lk13~0#1;havoc main_#t~nondet17#1;main_~p14~0#1 := main_#t~nondet17#1;havoc main_#t~nondet17#1;havoc main_~lk14~0#1;havoc main_#t~nondet18#1;main_~p15~0#1 := main_#t~nondet18#1;havoc main_#t~nondet18#1;havoc main_~lk15~0#1;havoc main_~cond~0#1;" [2025-02-08 14:32:07,489 INFO L754 eck$LassoCheckResult]: Loop: "assume true;havoc main_#t~nondet19#1;main_~cond~0#1 := main_#t~nondet19#1;havoc main_#t~nondet19#1;" "assume !(0 == main_~cond~0#1);main_~lk1~0#1 := 0;main_~lk2~0#1 := 0;main_~lk3~0#1 := 0;main_~lk4~0#1 := 0;main_~lk5~0#1 := 0;main_~lk6~0#1 := 0;main_~lk7~0#1 := 0;main_~lk8~0#1 := 0;main_~lk9~0#1 := 0;main_~lk10~0#1 := 0;main_~lk11~0#1 := 0;main_~lk12~0#1 := 0;main_~lk13~0#1 := 0;main_~lk14~0#1 := 0;main_~lk15~0#1 := 0;" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;main_~lk2~0#1 := 1;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;main_~lk14~0#1 := 1;" "assume !(0 != main_~p15~0#1);" "assume !(0 != main_~p1~0#1);" "assume 0 != main_~p2~0#1;" "assume !(1 != main_~lk2~0#1);main_~lk2~0#1 := 0;" "assume !(0 != main_~p3~0#1);" "assume !(0 != main_~p4~0#1);" "assume !(0 != main_~p5~0#1);" "assume !(0 != main_~p6~0#1);" "assume !(0 != main_~p7~0#1);" "assume !(0 != main_~p8~0#1);" "assume !(0 != main_~p9~0#1);" "assume !(0 != main_~p10~0#1);" "assume !(0 != main_~p11~0#1);" "assume !(0 != main_~p12~0#1);" "assume !(0 != main_~p13~0#1);" "assume 0 != main_~p14~0#1;" "assume !(1 != main_~lk14~0#1);main_~lk14~0#1 := 0;" "assume !(0 != main_~p15~0#1);" [2025-02-08 14:32:07,490 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:32:07,490 INFO L85 PathProgramCache]: Analyzing trace with hash 179, now seen corresponding path program 14 times [2025-02-08 14:32:07,490 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:32:07,490 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1696276278] [2025-02-08 14:32:07,490 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-08 14:32:07,490 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:32:07,495 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:32:07,497 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:32:07,499 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-08 14:32:07,500 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:32:07,500 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:32:07,500 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:32:07,501 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:32:07,501 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:32:07,501 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:32:07,504 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:32:07,508 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:32:07,508 INFO L85 PathProgramCache]: Analyzing trace with hash 27528700, now seen corresponding path program 1 times [2025-02-08 14:32:07,508 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:32:07,508 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [120917503] [2025-02-08 14:32:07,508 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:32:07,508 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:32:07,511 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-02-08 14:32:07,513 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-02-08 14:32:07,513 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:32:07,513 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:32:07,513 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:32:07,514 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-02-08 14:32:07,515 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-02-08 14:32:07,515 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:32:07,515 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:32:07,535 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:32:07,536 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:32:07,536 INFO L85 PathProgramCache]: Analyzing trace with hash -2074516946, now seen corresponding path program 1 times [2025-02-08 14:32:07,536 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:32:07,536 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [221109452] [2025-02-08 14:32:07,536 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:32:07,536 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:32:07,546 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 35 statements into 1 equivalence classes. [2025-02-08 14:32:07,551 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 35 of 35 statements. [2025-02-08 14:32:07,554 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:32:07,555 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:32:07,555 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:32:07,556 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 35 statements into 1 equivalence classes. [2025-02-08 14:32:07,558 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 35 of 35 statements. [2025-02-08 14:32:07,558 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:32:07,558 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:32:07,567 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:32:08,348 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:32:08,350 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:32:08,350 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:32:08,350 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:32:08,350 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:32:08,357 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 1 statements into 1 equivalence classes. [2025-02-08 14:32:08,358 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 1 of 1 statements. [2025-02-08 14:32:08,358 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:32:08,358 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:32:08,412 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 08.02 02:32:08 BoogieIcfgContainer [2025-02-08 14:32:08,413 INFO L131 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2025-02-08 14:32:08,414 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-02-08 14:32:08,417 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-02-08 14:32:08,418 INFO L274 PluginConnector]: Witness Printer initialized [2025-02-08 14:32:08,418 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 08.02 02:31:44" (3/4) ... [2025-02-08 14:32:08,420 INFO L143 WitnessPrinter]: Generating witness for non-termination counterexample [2025-02-08 14:32:08,480 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/witness.graphml [2025-02-08 14:32:08,483 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-02-08 14:32:08,484 INFO L158 Benchmark]: Toolchain (without parser) took 24991.71ms. Allocated memory was 142.6MB in the beginning and 12.2GB in the end (delta: 12.1GB). Free memory was 112.2MB in the beginning and 9.6GB in the end (delta: -9.5GB). Peak memory consumption was 2.6GB. Max. memory is 16.1GB. [2025-02-08 14:32:08,484 INFO L158 Benchmark]: CDTParser took 0.20ms. Allocated memory is still 201.3MB. Free memory is still 124.7MB. There was no memory consumed. Max. memory is 16.1GB. [2025-02-08 14:32:08,484 INFO L158 Benchmark]: CACSL2BoogieTranslator took 186.60ms. Allocated memory is still 142.6MB. Free memory was 112.2MB in the beginning and 100.7MB in the end (delta: 11.5MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-02-08 14:32:08,485 INFO L158 Benchmark]: Boogie Procedure Inliner took 19.73ms. Allocated memory is still 142.6MB. Free memory was 100.5MB in the beginning and 99.1MB in the end (delta: 1.4MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-02-08 14:32:08,485 INFO L158 Benchmark]: Boogie Preprocessor took 29.36ms. Allocated memory is still 142.6MB. Free memory was 99.1MB in the beginning and 97.7MB in the end (delta: 1.4MB). There was no memory consumed. Max. memory is 16.1GB. [2025-02-08 14:32:08,485 INFO L158 Benchmark]: IcfgBuilder took 340.65ms. Allocated memory is still 142.6MB. Free memory was 97.7MB in the beginning and 80.1MB in the end (delta: 17.6MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-02-08 14:32:08,485 INFO L158 Benchmark]: BuchiAutomizer took 24340.06ms. Allocated memory was 142.6MB in the beginning and 12.2GB in the end (delta: 12.1GB). Free memory was 80.1MB in the beginning and 9.6GB in the end (delta: -9.5GB). Peak memory consumption was 2.5GB. Max. memory is 16.1GB. [2025-02-08 14:32:08,485 INFO L158 Benchmark]: Witness Printer took 69.56ms. Allocated memory is still 12.2GB. Free memory was 9.6GB in the beginning and 9.6GB in the end (delta: 4.4MB). There was no memory consumed. Max. memory is 16.1GB. [2025-02-08 14:32:08,486 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20ms. Allocated memory is still 201.3MB. Free memory is still 124.7MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 186.60ms. Allocated memory is still 142.6MB. Free memory was 112.2MB in the beginning and 100.7MB in the end (delta: 11.5MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 19.73ms. Allocated memory is still 142.6MB. Free memory was 100.5MB in the beginning and 99.1MB in the end (delta: 1.4MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Boogie Preprocessor took 29.36ms. Allocated memory is still 142.6MB. Free memory was 99.1MB in the beginning and 97.7MB in the end (delta: 1.4MB). There was no memory consumed. Max. memory is 16.1GB. * IcfgBuilder took 340.65ms. Allocated memory is still 142.6MB. Free memory was 97.7MB in the beginning and 80.1MB in the end (delta: 17.6MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * BuchiAutomizer took 24340.06ms. Allocated memory was 142.6MB in the beginning and 12.2GB in the end (delta: 12.1GB). Free memory was 80.1MB in the beginning and 9.6GB in the end (delta: -9.5GB). Peak memory consumption was 2.5GB. Max. memory is 16.1GB. * Witness Printer took 69.56ms. Allocated memory is still 12.2GB. Free memory was 9.6GB in the beginning and 9.6GB in the end (delta: 4.4MB). There was no memory consumed. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 13 terminating modules (13 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.13 modules have a trivial ranking function, the largest among these consists of 3 locations. The remainder module has 331777 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 24.2s and 14 iterations. TraceHistogramMax:1. Analysis of lassos took 1.6s. Construction of modules took 0.1s. Büchi inclusion checks took 19.3s. Highest rank in rank-based complementation 0. Minimization of det autom 13. Minimization of nondet autom 0. Automata minimization 8.9s AutomataMinimizationTime, 13 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations. Non-live state removal took 6.4s Buchi closure took 0.3s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 759 SdHoareTripleChecker+Valid, 0.2s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 759 mSDsluCounter, 2405 SdHoareTripleChecker+Invalid, 0.1s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 927 mSDsCounter, 26 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 65 IncrementalHoareTripleChecker+Invalid, 91 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 26 mSolverCounterUnsat, 1478 mSDtfsCounter, 65 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont1 unkn0 SFLI13 SFLT0 conc0 concLT0 SILN0 SILU0 SILI0 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - LassoShapedNonTerminationArgument [Line: 56]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite program execution. Stem: [L8] int p1 = __VERIFIER_nondet_int(); [L9] int lk1; [L11] int p2 = __VERIFIER_nondet_int(); [L12] int lk2; [L14] int p3 = __VERIFIER_nondet_int(); [L15] int lk3; [L17] int p4 = __VERIFIER_nondet_int(); [L18] int lk4; [L20] int p5 = __VERIFIER_nondet_int(); [L21] int lk5; [L23] int p6 = __VERIFIER_nondet_int(); [L24] int lk6; [L26] int p7 = __VERIFIER_nondet_int(); [L27] int lk7; [L29] int p8 = __VERIFIER_nondet_int(); [L30] int lk8; [L32] int p9 = __VERIFIER_nondet_int(); [L33] int lk9; [L35] int p10 = __VERIFIER_nondet_int(); [L36] int lk10; [L38] int p11 = __VERIFIER_nondet_int(); [L39] int lk11; [L41] int p12 = __VERIFIER_nondet_int(); [L42] int lk12; [L44] int p13 = __VERIFIER_nondet_int(); [L45] int lk13; [L47] int p14 = __VERIFIER_nondet_int(); [L48] int lk14; [L50] int p15 = __VERIFIER_nondet_int(); [L51] int lk15; [L54] int cond; Loop: [L56] COND TRUE 1 [L57] cond = __VERIFIER_nondet_int() [L58] COND FALSE !(cond == 0) [L61] lk1 = 0 [L63] lk2 = 0 [L65] lk3 = 0 [L67] lk4 = 0 [L69] lk5 = 0 [L71] lk6 = 0 [L73] lk7 = 0 [L75] lk8 = 0 [L77] lk9 = 0 [L79] lk10 = 0 [L81] lk11 = 0 [L83] lk12 = 0 [L85] lk13 = 0 [L87] lk14 = 0 [L89] lk15 = 0 [L93] COND FALSE !(p1 != 0) [L97] COND TRUE p2 != 0 [L98] lk2 = 1 [L101] COND FALSE !(p3 != 0) [L105] COND FALSE !(p4 != 0) [L109] COND FALSE !(p5 != 0) [L113] COND FALSE !(p6 != 0) [L117] COND FALSE !(p7 != 0) [L121] COND FALSE !(p8 != 0) [L125] COND FALSE !(p9 != 0) [L129] COND FALSE !(p10 != 0) [L133] COND FALSE !(p11 != 0) [L137] COND FALSE !(p12 != 0) [L141] COND FALSE !(p13 != 0) [L145] COND TRUE p14 != 0 [L146] lk14 = 1 [L149] COND FALSE !(p15 != 0) [L155] COND FALSE !(p1 != 0) [L160] COND TRUE p2 != 0 [L161] COND FALSE !(lk2 != 1) [L162] lk2 = 0 [L165] COND FALSE !(p3 != 0) [L170] COND FALSE !(p4 != 0) [L175] COND FALSE !(p5 != 0) [L180] COND FALSE !(p6 != 0) [L185] COND FALSE !(p7 != 0) [L190] COND FALSE !(p8 != 0) [L195] COND FALSE !(p9 != 0) [L200] COND FALSE !(p10 != 0) [L205] COND FALSE !(p11 != 0) [L210] COND FALSE !(p12 != 0) [L215] COND FALSE !(p13 != 0) [L220] COND TRUE p14 != 0 [L221] COND FALSE !(lk14 != 1) [L222] lk14 = 0 [L225] COND FALSE !(p15 != 0) End of lasso representation. - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 56]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L8] int p1 = __VERIFIER_nondet_int(); [L9] int lk1; [L11] int p2 = __VERIFIER_nondet_int(); [L12] int lk2; [L14] int p3 = __VERIFIER_nondet_int(); [L15] int lk3; [L17] int p4 = __VERIFIER_nondet_int(); [L18] int lk4; [L20] int p5 = __VERIFIER_nondet_int(); [L21] int lk5; [L23] int p6 = __VERIFIER_nondet_int(); [L24] int lk6; [L26] int p7 = __VERIFIER_nondet_int(); [L27] int lk7; [L29] int p8 = __VERIFIER_nondet_int(); [L30] int lk8; [L32] int p9 = __VERIFIER_nondet_int(); [L33] int lk9; [L35] int p10 = __VERIFIER_nondet_int(); [L36] int lk10; [L38] int p11 = __VERIFIER_nondet_int(); [L39] int lk11; [L41] int p12 = __VERIFIER_nondet_int(); [L42] int lk12; [L44] int p13 = __VERIFIER_nondet_int(); [L45] int lk13; [L47] int p14 = __VERIFIER_nondet_int(); [L48] int lk14; [L50] int p15 = __VERIFIER_nondet_int(); [L51] int lk15; [L54] int cond; Loop: [L56] COND TRUE 1 [L57] cond = __VERIFIER_nondet_int() [L58] COND FALSE !(cond == 0) [L61] lk1 = 0 [L63] lk2 = 0 [L65] lk3 = 0 [L67] lk4 = 0 [L69] lk5 = 0 [L71] lk6 = 0 [L73] lk7 = 0 [L75] lk8 = 0 [L77] lk9 = 0 [L79] lk10 = 0 [L81] lk11 = 0 [L83] lk12 = 0 [L85] lk13 = 0 [L87] lk14 = 0 [L89] lk15 = 0 [L93] COND FALSE !(p1 != 0) [L97] COND TRUE p2 != 0 [L98] lk2 = 1 [L101] COND FALSE !(p3 != 0) [L105] COND FALSE !(p4 != 0) [L109] COND FALSE !(p5 != 0) [L113] COND FALSE !(p6 != 0) [L117] COND FALSE !(p7 != 0) [L121] COND FALSE !(p8 != 0) [L125] COND FALSE !(p9 != 0) [L129] COND FALSE !(p10 != 0) [L133] COND FALSE !(p11 != 0) [L137] COND FALSE !(p12 != 0) [L141] COND FALSE !(p13 != 0) [L145] COND TRUE p14 != 0 [L146] lk14 = 1 [L149] COND FALSE !(p15 != 0) [L155] COND FALSE !(p1 != 0) [L160] COND TRUE p2 != 0 [L161] COND FALSE !(lk2 != 1) [L162] lk2 = 0 [L165] COND FALSE !(p3 != 0) [L170] COND FALSE !(p4 != 0) [L175] COND FALSE !(p5 != 0) [L180] COND FALSE !(p6 != 0) [L185] COND FALSE !(p7 != 0) [L190] COND FALSE !(p8 != 0) [L195] COND FALSE !(p9 != 0) [L200] COND FALSE !(p10 != 0) [L205] COND FALSE !(p11 != 0) [L210] COND FALSE !(p12 != 0) [L215] COND FALSE !(p13 != 0) [L220] COND TRUE p14 != 0 [L221] COND FALSE !(lk14 != 1) [L222] lk14 = 0 [L225] COND FALSE !(p15 != 0) End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2025-02-08 14:32:08,518 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM)