./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/systemc/toy1.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 48c9605d Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/systemc/toy1.cil.c -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash c40ed6d21fe4d61cae011269f1fdb95d05149cea0f3470f42c6e8f2fc8fb0d6a --- Real Ultimate output --- This is Ultimate 0.3.0-?-48c9605-m [2025-02-08 14:52:15,355 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-02-08 14:52:15,418 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2025-02-08 14:52:15,422 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-02-08 14:52:15,423 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-02-08 14:52:15,423 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-02-08 14:52:15,443 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-02-08 14:52:15,443 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-02-08 14:52:15,444 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-02-08 14:52:15,444 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-02-08 14:52:15,445 INFO L153 SettingsManager]: * Use memory slicer=true [2025-02-08 14:52:15,445 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-02-08 14:52:15,445 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-02-08 14:52:15,445 INFO L153 SettingsManager]: * Use SBE=true [2025-02-08 14:52:15,445 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-02-08 14:52:15,445 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-02-08 14:52:15,446 INFO L153 SettingsManager]: * Use old map elimination=false [2025-02-08 14:52:15,446 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-02-08 14:52:15,446 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-02-08 14:52:15,447 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-02-08 14:52:15,447 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-02-08 14:52:15,447 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-02-08 14:52:15,447 INFO L153 SettingsManager]: * sizeof long=4 [2025-02-08 14:52:15,447 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-02-08 14:52:15,447 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-02-08 14:52:15,447 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-02-08 14:52:15,448 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-02-08 14:52:15,448 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-02-08 14:52:15,448 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-02-08 14:52:15,448 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-02-08 14:52:15,448 INFO L153 SettingsManager]: * sizeof long double=12 [2025-02-08 14:52:15,448 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-02-08 14:52:15,448 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-02-08 14:52:15,448 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-02-08 14:52:15,448 INFO L153 SettingsManager]: * Use constant arrays=true [2025-02-08 14:52:15,448 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-02-08 14:52:15,448 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-02-08 14:52:15,448 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-02-08 14:52:15,449 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-02-08 14:52:15,449 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-02-08 14:52:15,449 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> c40ed6d21fe4d61cae011269f1fdb95d05149cea0f3470f42c6e8f2fc8fb0d6a [2025-02-08 14:52:15,643 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-02-08 14:52:15,658 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-02-08 14:52:15,660 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-02-08 14:52:15,660 INFO L270 PluginConnector]: Initializing CDTParser... [2025-02-08 14:52:15,666 INFO L274 PluginConnector]: CDTParser initialized [2025-02-08 14:52:15,666 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/systemc/toy1.cil.c [2025-02-08 14:52:16,879 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/14446eb54/f1364fbc2ecb4a7a8664d0561c7478ac/FLAG087a11ede [2025-02-08 14:52:17,085 INFO L384 CDTParser]: Found 1 translation units. [2025-02-08 14:52:17,086 INFO L180 CDTParser]: Scanning /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/systemc/toy1.cil.c [2025-02-08 14:52:17,106 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/14446eb54/f1364fbc2ecb4a7a8664d0561c7478ac/FLAG087a11ede [2025-02-08 14:52:17,122 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/14446eb54/f1364fbc2ecb4a7a8664d0561c7478ac [2025-02-08 14:52:17,125 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-02-08 14:52:17,126 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-02-08 14:52:17,127 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-02-08 14:52:17,127 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-02-08 14:52:17,130 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-02-08 14:52:17,131 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.02 02:52:17" (1/1) ... [2025-02-08 14:52:17,131 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@79da9237 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:52:17, skipping insertion in model container [2025-02-08 14:52:17,131 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.02 02:52:17" (1/1) ... [2025-02-08 14:52:17,150 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-02-08 14:52:17,292 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-08 14:52:17,307 INFO L200 MainTranslator]: Completed pre-run [2025-02-08 14:52:17,338 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-08 14:52:17,352 INFO L204 MainTranslator]: Completed translation [2025-02-08 14:52:17,352 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:52:17 WrapperNode [2025-02-08 14:52:17,352 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-02-08 14:52:17,353 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-02-08 14:52:17,353 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-02-08 14:52:17,353 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-02-08 14:52:17,357 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:52:17" (1/1) ... [2025-02-08 14:52:17,361 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:52:17" (1/1) ... [2025-02-08 14:52:17,380 INFO L138 Inliner]: procedures = 20, calls = 17, calls flagged for inlining = 12, calls inlined = 13, statements flattened = 351 [2025-02-08 14:52:17,383 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-02-08 14:52:17,383 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-02-08 14:52:17,383 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-02-08 14:52:17,383 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-02-08 14:52:17,389 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:52:17" (1/1) ... [2025-02-08 14:52:17,389 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:52:17" (1/1) ... [2025-02-08 14:52:17,391 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:52:17" (1/1) ... [2025-02-08 14:52:17,405 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-02-08 14:52:17,408 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:52:17" (1/1) ... [2025-02-08 14:52:17,409 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:52:17" (1/1) ... [2025-02-08 14:52:17,411 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:52:17" (1/1) ... [2025-02-08 14:52:17,416 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:52:17" (1/1) ... [2025-02-08 14:52:17,417 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:52:17" (1/1) ... [2025-02-08 14:52:17,417 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:52:17" (1/1) ... [2025-02-08 14:52:17,418 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-02-08 14:52:17,419 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-02-08 14:52:17,422 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-02-08 14:52:17,422 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-02-08 14:52:17,423 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:52:17" (1/1) ... [2025-02-08 14:52:17,428 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-08 14:52:17,437 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 14:52:17,448 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-08 14:52:17,450 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-02-08 14:52:17,465 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-02-08 14:52:17,465 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-02-08 14:52:17,466 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-02-08 14:52:17,466 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-02-08 14:52:17,523 INFO L257 CfgBuilder]: Building ICFG [2025-02-08 14:52:17,524 INFO L287 CfgBuilder]: Building CFG for each procedure with an implementation [2025-02-08 14:52:17,787 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L126: assume { :end_inline_error } true; [2025-02-08 14:52:17,787 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L605: assume 2 == ~wl_pc~0; [2025-02-08 14:52:17,788 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L605: assume !(2 == ~wl_pc~0); [2025-02-08 14:52:17,788 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L93: assume 1 == ~c1_pc~0; [2025-02-08 14:52:17,788 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L93: assume !(1 == ~c1_pc~0); [2025-02-08 14:52:17,788 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L572: assume 0 == ~e_f~0;~e_f~0 := 1; [2025-02-08 14:52:17,788 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L572: assume !(0 == ~e_f~0); [2025-02-08 14:52:17,788 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L118: write_loop_~t~0#1 := ~t_b~0; [2025-02-08 14:52:17,788 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L597: assume 1 == ~wl_pc~0; [2025-02-08 14:52:17,788 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L597: assume !(1 == ~wl_pc~0); [2025-02-08 14:52:17,788 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L366: assume { :end_inline_compute2 } true; [2025-02-08 14:52:17,788 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L647: assume 1 == ~e_e~0;~e_e~0 := 2; [2025-02-08 14:52:17,788 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L647: assume !(1 == ~e_e~0); [2025-02-08 14:52:17,788 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L102: assume 1 == ~c2_pc~0; [2025-02-08 14:52:17,789 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L102: assume !(1 == ~c2_pc~0); [2025-02-08 14:52:17,789 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L672: assume 0 == ~wl_st~0; [2025-02-08 14:52:17,789 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L672: assume !(0 == ~wl_st~0); [2025-02-08 14:52:17,789 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L606: assume 1 == ~e_e~0;~wl_st~0 := 0; [2025-02-08 14:52:17,789 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L606: assume !(1 == ~e_e~0); [2025-02-08 14:52:17,789 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L94: assume 1 == ~e_f~0;~c1_st~0 := 0; [2025-02-08 14:52:17,789 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L94: assume !(1 == ~e_f~0); [2025-02-08 14:52:17,789 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L119: assume ~d~0 == 1 + write_loop_~t~0#1; [2025-02-08 14:52:17,789 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L119: assume !(~d~0 == 1 + write_loop_~t~0#1); [2025-02-08 14:52:17,789 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L598: assume 1 == ~e_wl~0;~wl_st~0 := 0; [2025-02-08 14:52:17,789 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L598: assume !(1 == ~e_wl~0); [2025-02-08 14:52:17,789 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L111: ~e_f~0 := 2;~wl_st~0 := 2;~wl_pc~0 := 2;~t_b~0 := write_loop_~t~0#1; [2025-02-08 14:52:17,790 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L557: havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2; [2025-02-08 14:52:17,790 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L681: assume 0 == ~wb_st~0; [2025-02-08 14:52:17,790 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L681: assume !(0 == ~wb_st~0); [2025-02-08 14:52:17,790 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L615: assume 1 == ~c1_pc~0; [2025-02-08 14:52:17,790 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L615: assume !(1 == ~c1_pc~0); [2025-02-08 14:52:17,790 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L103: assume 1 == ~e_f~0;~c2_st~0 := 0; [2025-02-08 14:52:17,790 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L103: assume !(1 == ~e_f~0); [2025-02-08 14:52:17,790 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L582: assume 0 == ~e_e~0;~e_e~0 := 1; [2025-02-08 14:52:17,790 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L582: assume !(0 == ~e_e~0); [2025-02-08 14:52:17,790 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L351: assume { :end_inline_compute1 } true; [2025-02-08 14:52:17,790 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L87: assume true;write_loop_~t~0#1 := ~d~0;~data~0 := ~d~0;~processed~0 := 0;~e_f~0 := 1; [2025-02-08 14:52:17,791 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L87: assume !true; [2025-02-08 14:52:17,791 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L657: assume 1 == ~e_g~0;~e_g~0 := 2; [2025-02-08 14:52:17,791 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L657: assume !(1 == ~e_g~0); [2025-02-08 14:52:17,791 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L624: assume 1 == ~c2_pc~0; [2025-02-08 14:52:17,791 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L624: assume !(1 == ~c2_pc~0); [2025-02-08 14:52:17,791 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L170: assume 1 == ~wb_pc~0; [2025-02-08 14:52:17,791 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L170: assume !(1 == ~wb_pc~0); [2025-02-08 14:52:17,791 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L616: assume 1 == ~e_f~0;~c1_st~0 := 0; [2025-02-08 14:52:17,791 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L616: assume !(1 == ~e_f~0); [2025-02-08 14:52:17,791 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L633: assume 1 == ~wb_pc~0; [2025-02-08 14:52:17,791 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L633: assume !(1 == ~wb_pc~0); [2025-02-08 14:52:17,791 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L567: ~c_req_up~0 := 0; [2025-02-08 14:52:17,791 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L212: assume 0 == ~processed~0;~data~0 := 1 + ~data~0;~e_g~0 := 1; [2025-02-08 14:52:17,792 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L212: assume !(0 == ~processed~0); [2025-02-08 14:52:17,792 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L179: ~e_g~0 := 2; [2025-02-08 14:52:17,792 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L625: assume 1 == ~e_f~0;~c2_st~0 := 0; [2025-02-08 14:52:17,792 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L625: assume !(1 == ~e_f~0); [2025-02-08 14:52:17,792 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L592: assume 0 == ~e_wl~0;~e_wl~0 := 1; [2025-02-08 14:52:17,792 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L592: assume !(0 == ~e_wl~0); [2025-02-08 14:52:17,792 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L336: havoc write_loop_~t~0#1;assume { :end_inline_write_loop } true; [2025-02-08 14:52:17,792 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L171: assume 1 == ~e_g~0;~wb_st~0 := 0; [2025-02-08 14:52:17,792 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L171: assume !(1 == ~e_g~0); [2025-02-08 14:52:17,792 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L675: assume 0 == ~c1_st~0; [2025-02-08 14:52:17,792 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L675: assume !(0 == ~c1_st~0); [2025-02-08 14:52:17,792 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L642: assume 1 == ~e_c~0;~r_st~0 := 0; [2025-02-08 14:52:17,793 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L642: assume !(1 == ~e_c~0); [2025-02-08 14:52:17,793 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L130: assume ~d~0 == 1 + write_loop_~t~0#1; [2025-02-08 14:52:17,793 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L130: assume !(~d~0 == 1 + write_loop_~t~0#1);assume { :begin_inline_error } true;assume { :begin_inline_reach_error } true;assume false;assume { :end_inline_reach_error } true;assume false; [2025-02-08 14:52:17,793 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L667: assume 1 == ~e_wl~0;~e_wl~0 := 2; [2025-02-08 14:52:17,793 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L667: assume !(1 == ~e_wl~0); [2025-02-08 14:52:17,793 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L634: assume 1 == ~e_g~0;~wb_st~0 := 0; [2025-02-08 14:52:17,793 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L634: assume !(1 == ~e_g~0); [2025-02-08 14:52:17,793 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L122: assume ~d~0 == 2 + write_loop_~t~0#1; [2025-02-08 14:52:17,793 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L122: assume !(~d~0 == 2 + write_loop_~t~0#1);assume { :begin_inline_error } true;assume { :begin_inline_reach_error } true;assume false;assume { :end_inline_reach_error } true;assume false; [2025-02-08 14:52:17,793 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L560: assume 1 == ~c_req_up~0; [2025-02-08 14:52:17,793 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L560: assume !(1 == ~c_req_up~0); [2025-02-08 14:52:17,793 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L684: assume 0 == ~r_st~0; [2025-02-08 14:52:17,794 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L684: assume !(0 == ~r_st~0); [2025-02-08 14:52:17,794 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L577: assume 0 == ~e_g~0;~e_g~0 := 1; [2025-02-08 14:52:17,794 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L577: assume !(0 == ~e_g~0); [2025-02-08 14:52:17,794 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L561: assume ~c~0 != ~c_t~0;~c~0 := ~c_t~0;~e_c~0 := 0; [2025-02-08 14:52:17,794 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L561: assume !(~c~0 != ~c_t~0); [2025-02-08 14:52:17,794 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L652: assume 1 == ~e_f~0;~e_f~0 := 2; [2025-02-08 14:52:17,794 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L652: assume !(1 == ~e_f~0); [2025-02-08 14:52:17,794 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L396: assume { :end_inline_read } true; [2025-02-08 14:52:17,794 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L215: assume 1 == ~wb_pc~0; [2025-02-08 14:52:17,794 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L215: assume !(1 == ~wb_pc~0); [2025-02-08 14:52:17,794 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L587: assume 0 == ~e_c~0;~e_c~0 := 1; [2025-02-08 14:52:17,794 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L587: assume !(0 == ~e_c~0); [2025-02-08 14:52:17,794 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L678: assume 0 == ~c2_st~0; [2025-02-08 14:52:17,795 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L678: assume !(0 == ~c2_st~0); [2025-02-08 14:52:17,795 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L257: ~c_t~0 := ~data~0;~c_req_up~0 := 1;~processed~0 := 1; [2025-02-08 14:52:17,795 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L224: ~e_g~0 := 2; [2025-02-08 14:52:17,795 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L381: assume { :end_inline_write_back } true; [2025-02-08 14:52:17,795 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L571: start_simulation_~kernel_st~0#1 := 3; [2025-02-08 14:52:17,795 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L216: assume 1 == ~e_g~0;~wb_st~0 := 0; [2025-02-08 14:52:17,795 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L216: assume !(1 == ~e_g~0); [2025-02-08 14:52:17,795 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L662: assume 1 == ~e_c~0;~e_c~0 := 2; [2025-02-08 14:52:17,795 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L662: assume !(1 == ~e_c~0); [2025-02-08 14:52:17,795 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L167: assume 0 == ~processed~0;~data~0 := 1 + ~data~0;~e_g~0 := 1; [2025-02-08 14:52:17,795 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L167: assume !(0 == ~processed~0); [2025-02-08 14:52:17,795 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L134: assume { :end_inline_error } true; [2025-02-08 14:52:17,804 INFO L? ?]: Removed 12 outVars from TransFormulas that were not future-live. [2025-02-08 14:52:17,804 INFO L308 CfgBuilder]: Performing block encoding [2025-02-08 14:52:17,809 INFO L332 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-02-08 14:52:17,810 INFO L337 CfgBuilder]: Removed 0 assume(true) statements. [2025-02-08 14:52:17,810 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 08.02 02:52:17 BoogieIcfgContainer [2025-02-08 14:52:17,810 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-02-08 14:52:17,811 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-02-08 14:52:17,811 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-02-08 14:52:17,814 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-02-08 14:52:17,815 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-08 14:52:17,815 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 08.02 02:52:17" (1/3) ... [2025-02-08 14:52:17,815 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@744bfe4a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 08.02 02:52:17, skipping insertion in model container [2025-02-08 14:52:17,815 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-08 14:52:17,816 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:52:17" (2/3) ... [2025-02-08 14:52:17,816 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@744bfe4a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 08.02 02:52:17, skipping insertion in model container [2025-02-08 14:52:17,816 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-08 14:52:17,816 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 08.02 02:52:17" (3/3) ... [2025-02-08 14:52:17,817 INFO L363 chiAutomizerObserver]: Analyzing ICFG toy1.cil.c [2025-02-08 14:52:17,848 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-02-08 14:52:17,848 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-02-08 14:52:17,848 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-02-08 14:52:17,848 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-02-08 14:52:17,848 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-02-08 14:52:17,848 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-02-08 14:52:17,849 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-02-08 14:52:17,849 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-02-08 14:52:17,853 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 87 states, 65 states have (on average 1.9384615384615385) internal successors, (126), 86 states have internal predecessors, (126), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:17,870 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 16 [2025-02-08 14:52:17,870 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:52:17,870 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:52:17,876 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:17,876 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:17,877 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-02-08 14:52:17,877 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 87 states, 65 states have (on average 1.9384615384615385) internal successors, (126), 86 states have internal predecessors, (126), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:17,882 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 16 [2025-02-08 14:52:17,882 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:52:17,882 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:52:17,883 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:17,883 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:17,890 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);call #Ultimate.allocInit(12, 3);~c~0 := 0;~c_t~0 := 0;~c_req_up~0 := 0;~p_in~0 := 0;~p_out~0 := 0;~wl_st~0 := 0;~c1_st~0 := 0;~c2_st~0 := 0;~wb_st~0 := 0;~r_st~0 := 0;~wl_i~0 := 0;~c1_i~0 := 0;~c2_i~0 := 0;~wb_i~0 := 0;~r_i~0 := 0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~e_e~0 := 0;~e_f~0 := 0;~e_g~0 := 0;~e_c~0 := 0;~e_p_in~0 := 0;~e_wl~0 := 0;~d~0 := 0;~data~0 := 0;~processed~0 := 0;~t_b~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~__retres1~0#1;havoc main_~__retres1~0#1;~e_wl~0 := 2;~e_c~0 := ~e_wl~0;~e_g~0 := ~e_c~0;~e_f~0 := ~e_g~0;~e_e~0 := ~e_f~0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~wb_i~0 := 1;~c2_i~0 := ~wb_i~0;~c1_i~0 := ~c2_i~0;~wl_i~0 := ~c1_i~0;~r_i~0 := 0;~c_req_up~0 := 0;~d~0 := 0;~c~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~c_req_up~0);" "assume !(1 == ~wl_i~0);~wl_st~0 := 2;" "assume !(1 == ~c1_i~0);~c1_st~0 := 2;" "assume !(1 == ~c2_i~0);~c2_st~0 := 2;" "assume 1 == ~wb_i~0;~wb_st~0 := 0;" "assume !(1 == ~r_i~0);~r_st~0 := 2;" "assume !(0 == ~e_f~0);" "assume !(0 == ~e_g~0);" "assume !(0 == ~e_e~0);" "assume !(0 == ~e_c~0);" "assume !(0 == ~e_wl~0);" "assume 1 == ~wl_pc~0;" "assume 1 == ~e_wl~0;~wl_st~0 := 0;" "assume !(1 == ~c1_pc~0);" "assume !(1 == ~c2_pc~0);" "assume !(1 == ~wb_pc~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_e~0);" "assume !(1 == ~e_f~0);" "assume !(1 == ~e_g~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_wl~0);" "assume true;start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" [2025-02-08 14:52:17,890 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "assume 0 == ~wl_st~0;" "assume !(0 == ~wl_st~0);" "assume !(0 == ~c1_st~0);" "assume !(0 == ~c2_st~0);" "assume !(0 == ~wb_st~0);" "assume !(0 == ~r_st~0);" [2025-02-08 14:52:17,893 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:17,894 INFO L85 PathProgramCache]: Analyzing trace with hash 908782432, now seen corresponding path program 1 times [2025-02-08 14:52:17,898 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:17,898 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2078248483] [2025-02-08 14:52:17,898 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:52:17,900 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:17,959 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 24 statements into 1 equivalence classes. [2025-02-08 14:52:17,975 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 24 of 24 statements. [2025-02-08 14:52:17,976 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:17,976 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:52:18,117 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:52:18,117 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:52:18,117 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [2078248483] [2025-02-08 14:52:18,118 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [2078248483] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:52:18,118 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:52:18,118 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-02-08 14:52:18,120 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [927850716] [2025-02-08 14:52:18,121 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:52:18,123 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-08 14:52:18,124 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:18,124 INFO L85 PathProgramCache]: Analyzing trace with hash 742799694, now seen corresponding path program 1 times [2025-02-08 14:52:18,124 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:18,124 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [319176392] [2025-02-08 14:52:18,124 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:52:18,124 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:18,127 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 7 statements into 1 equivalence classes. [2025-02-08 14:52:18,130 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 7 of 7 statements. [2025-02-08 14:52:18,130 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:18,131 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:52:18,142 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:52:18,143 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:52:18,143 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [319176392] [2025-02-08 14:52:18,144 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [319176392] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:52:18,144 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:52:18,144 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-08 14:52:18,144 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [564993150] [2025-02-08 14:52:18,144 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:52:18,145 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-08 14:52:18,145 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:52:18,162 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-08 14:52:18,162 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-08 14:52:18,164 INFO L87 Difference]: Start difference. First operand has 87 states, 65 states have (on average 1.9384615384615385) internal successors, (126), 86 states have internal predecessors, (126), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:18,207 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:52:18,208 INFO L93 Difference]: Finished difference Result 144 states and 214 transitions. [2025-02-08 14:52:18,208 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 144 states and 214 transitions. [2025-02-08 14:52:18,211 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 27 [2025-02-08 14:52:18,215 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 144 states to 84 states and 148 transitions. [2025-02-08 14:52:18,215 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 84 [2025-02-08 14:52:18,215 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 84 [2025-02-08 14:52:18,216 INFO L73 IsDeterministic]: Start isDeterministic. Operand 84 states and 148 transitions. [2025-02-08 14:52:18,216 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:52:18,216 INFO L218 hiAutomatonCegarLoop]: Abstraction has 84 states and 148 transitions. [2025-02-08 14:52:18,224 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states and 148 transitions. [2025-02-08 14:52:18,231 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 83. [2025-02-08 14:52:18,231 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 83 states, 83 states have (on average 1.7710843373493976) internal successors, (147), 82 states have internal predecessors, (147), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:18,232 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 147 transitions. [2025-02-08 14:52:18,233 INFO L240 hiAutomatonCegarLoop]: Abstraction has 83 states and 147 transitions. [2025-02-08 14:52:18,233 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-08 14:52:18,235 INFO L432 stractBuchiCegarLoop]: Abstraction has 83 states and 147 transitions. [2025-02-08 14:52:18,235 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-02-08 14:52:18,235 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 83 states and 147 transitions. [2025-02-08 14:52:18,236 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 27 [2025-02-08 14:52:18,236 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:52:18,236 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:52:18,237 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:18,237 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:18,237 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);call #Ultimate.allocInit(12, 3);~c~0 := 0;~c_t~0 := 0;~c_req_up~0 := 0;~p_in~0 := 0;~p_out~0 := 0;~wl_st~0 := 0;~c1_st~0 := 0;~c2_st~0 := 0;~wb_st~0 := 0;~r_st~0 := 0;~wl_i~0 := 0;~c1_i~0 := 0;~c2_i~0 := 0;~wb_i~0 := 0;~r_i~0 := 0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~e_e~0 := 0;~e_f~0 := 0;~e_g~0 := 0;~e_c~0 := 0;~e_p_in~0 := 0;~e_wl~0 := 0;~d~0 := 0;~data~0 := 0;~processed~0 := 0;~t_b~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~__retres1~0#1;havoc main_~__retres1~0#1;~e_wl~0 := 2;~e_c~0 := ~e_wl~0;~e_g~0 := ~e_c~0;~e_f~0 := ~e_g~0;~e_e~0 := ~e_f~0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~wb_i~0 := 1;~c2_i~0 := ~wb_i~0;~c1_i~0 := ~c2_i~0;~wl_i~0 := ~c1_i~0;~r_i~0 := 0;~c_req_up~0 := 0;~d~0 := 0;~c~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~c_req_up~0);" "assume 1 == ~wl_i~0;~wl_st~0 := 0;" "assume !(1 == ~c1_i~0);~c1_st~0 := 2;" "assume !(1 == ~c2_i~0);~c2_st~0 := 2;" "assume 1 == ~wb_i~0;~wb_st~0 := 0;" "assume !(1 == ~r_i~0);~r_st~0 := 2;" "assume !(0 == ~e_f~0);" "assume !(0 == ~e_g~0);" "assume !(0 == ~e_e~0);" "assume !(0 == ~e_c~0);" "assume !(0 == ~e_wl~0);" "assume 1 == ~wl_pc~0;" "assume 1 == ~e_wl~0;~wl_st~0 := 0;" "assume !(1 == ~c1_pc~0);" "assume !(1 == ~c2_pc~0);" "assume !(1 == ~wb_pc~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_e~0);" "assume !(1 == ~e_f~0);" "assume !(1 == ~e_g~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_wl~0);" "assume true;start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" [2025-02-08 14:52:18,237 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "assume 0 == ~wl_st~0;" "assume 0 == ~wl_st~0;havoc eval_#t~nondet4#1;eval_~tmp~0#1 := eval_#t~nondet4#1;havoc eval_#t~nondet4#1;" "assume !(0 != eval_~tmp~0#1);" "assume !(0 == ~c1_st~0);" "assume !(0 == ~c2_st~0);" "assume !(0 == ~wb_st~0);" "assume !(0 == ~r_st~0);" [2025-02-08 14:52:18,238 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:18,238 INFO L85 PathProgramCache]: Analyzing trace with hash -1348128575, now seen corresponding path program 1 times [2025-02-08 14:52:18,238 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:18,238 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1992250091] [2025-02-08 14:52:18,238 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:52:18,238 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:18,244 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 24 statements into 1 equivalence classes. [2025-02-08 14:52:18,250 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 24 of 24 statements. [2025-02-08 14:52:18,250 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:18,250 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:52:18,280 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:52:18,280 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:52:18,280 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1992250091] [2025-02-08 14:52:18,280 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1992250091] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:52:18,280 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:52:18,281 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-02-08 14:52:18,281 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1726016132] [2025-02-08 14:52:18,281 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:52:18,281 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-08 14:52:18,281 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:18,281 INFO L85 PathProgramCache]: Analyzing trace with hash 1560019320, now seen corresponding path program 1 times [2025-02-08 14:52:18,282 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:18,282 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [103974859] [2025-02-08 14:52:18,282 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:52:18,282 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:18,284 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 8 statements into 1 equivalence classes. [2025-02-08 14:52:18,285 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-02-08 14:52:18,285 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:18,285 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:18,285 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:52:18,286 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 8 statements into 1 equivalence classes. [2025-02-08 14:52:18,287 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-02-08 14:52:18,287 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:18,287 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:18,300 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:52:18,337 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:52:18,337 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-08 14:52:18,337 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-08 14:52:18,337 INFO L87 Difference]: Start difference. First operand 83 states and 147 transitions. cyclomatic complexity: 66 Second operand has 3 states, 3 states have (on average 8.0) internal successors, (24), 2 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:18,342 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:52:18,342 INFO L93 Difference]: Finished difference Result 83 states and 145 transitions. [2025-02-08 14:52:18,342 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 83 states and 145 transitions. [2025-02-08 14:52:18,343 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 27 [2025-02-08 14:52:18,343 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 83 states to 83 states and 145 transitions. [2025-02-08 14:52:18,344 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 83 [2025-02-08 14:52:18,344 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 83 [2025-02-08 14:52:18,344 INFO L73 IsDeterministic]: Start isDeterministic. Operand 83 states and 145 transitions. [2025-02-08 14:52:18,344 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:52:18,344 INFO L218 hiAutomatonCegarLoop]: Abstraction has 83 states and 145 transitions. [2025-02-08 14:52:18,344 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states and 145 transitions. [2025-02-08 14:52:18,346 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 83. [2025-02-08 14:52:18,347 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 83 states, 83 states have (on average 1.7469879518072289) internal successors, (145), 82 states have internal predecessors, (145), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:18,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 145 transitions. [2025-02-08 14:52:18,347 INFO L240 hiAutomatonCegarLoop]: Abstraction has 83 states and 145 transitions. [2025-02-08 14:52:18,348 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-08 14:52:18,348 INFO L432 stractBuchiCegarLoop]: Abstraction has 83 states and 145 transitions. [2025-02-08 14:52:18,348 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-02-08 14:52:18,348 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 83 states and 145 transitions. [2025-02-08 14:52:18,349 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 27 [2025-02-08 14:52:18,349 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:52:18,349 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:52:18,349 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:18,350 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:18,350 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);call #Ultimate.allocInit(12, 3);~c~0 := 0;~c_t~0 := 0;~c_req_up~0 := 0;~p_in~0 := 0;~p_out~0 := 0;~wl_st~0 := 0;~c1_st~0 := 0;~c2_st~0 := 0;~wb_st~0 := 0;~r_st~0 := 0;~wl_i~0 := 0;~c1_i~0 := 0;~c2_i~0 := 0;~wb_i~0 := 0;~r_i~0 := 0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~e_e~0 := 0;~e_f~0 := 0;~e_g~0 := 0;~e_c~0 := 0;~e_p_in~0 := 0;~e_wl~0 := 0;~d~0 := 0;~data~0 := 0;~processed~0 := 0;~t_b~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~__retres1~0#1;havoc main_~__retres1~0#1;~e_wl~0 := 2;~e_c~0 := ~e_wl~0;~e_g~0 := ~e_c~0;~e_f~0 := ~e_g~0;~e_e~0 := ~e_f~0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~wb_i~0 := 1;~c2_i~0 := ~wb_i~0;~c1_i~0 := ~c2_i~0;~wl_i~0 := ~c1_i~0;~r_i~0 := 0;~c_req_up~0 := 0;~d~0 := 0;~c~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~c_req_up~0);" "assume 1 == ~wl_i~0;~wl_st~0 := 0;" "assume 1 == ~c1_i~0;~c1_st~0 := 0;" "assume !(1 == ~c2_i~0);~c2_st~0 := 2;" "assume 1 == ~wb_i~0;~wb_st~0 := 0;" "assume !(1 == ~r_i~0);~r_st~0 := 2;" "assume !(0 == ~e_f~0);" "assume !(0 == ~e_g~0);" "assume !(0 == ~e_e~0);" "assume !(0 == ~e_c~0);" "assume !(0 == ~e_wl~0);" "assume 1 == ~wl_pc~0;" "assume 1 == ~e_wl~0;~wl_st~0 := 0;" "assume !(1 == ~c1_pc~0);" "assume !(1 == ~c2_pc~0);" "assume !(1 == ~wb_pc~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_e~0);" "assume !(1 == ~e_f~0);" "assume !(1 == ~e_g~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_wl~0);" "assume true;start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" [2025-02-08 14:52:18,350 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "assume 0 == ~wl_st~0;" "assume 0 == ~wl_st~0;havoc eval_#t~nondet4#1;eval_~tmp~0#1 := eval_#t~nondet4#1;havoc eval_#t~nondet4#1;" "assume !(0 != eval_~tmp~0#1);" "assume !(0 == ~c1_st~0);" "assume !(0 == ~c2_st~0);" "assume !(0 == ~wb_st~0);" "assume !(0 == ~r_st~0);" [2025-02-08 14:52:18,350 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:18,350 INFO L85 PathProgramCache]: Analyzing trace with hash -1559479488, now seen corresponding path program 1 times [2025-02-08 14:52:18,350 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:18,350 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1479180425] [2025-02-08 14:52:18,350 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:52:18,351 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:18,356 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 24 statements into 1 equivalence classes. [2025-02-08 14:52:18,359 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 24 of 24 statements. [2025-02-08 14:52:18,359 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:18,359 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:52:18,409 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:52:18,409 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:52:18,409 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1479180425] [2025-02-08 14:52:18,409 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1479180425] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:52:18,410 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:52:18,410 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-02-08 14:52:18,410 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [302456934] [2025-02-08 14:52:18,410 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:52:18,410 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-08 14:52:18,410 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:18,410 INFO L85 PathProgramCache]: Analyzing trace with hash 1560019320, now seen corresponding path program 2 times [2025-02-08 14:52:18,410 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:18,411 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [257441671] [2025-02-08 14:52:18,411 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-08 14:52:18,411 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:18,413 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 8 statements into 1 equivalence classes. [2025-02-08 14:52:18,414 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-02-08 14:52:18,414 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-08 14:52:18,414 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:18,414 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:52:18,416 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 8 statements into 1 equivalence classes. [2025-02-08 14:52:18,416 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-02-08 14:52:18,416 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:18,416 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:18,418 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:52:18,443 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:52:18,443 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-08 14:52:18,443 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-08 14:52:18,443 INFO L87 Difference]: Start difference. First operand 83 states and 145 transitions. cyclomatic complexity: 64 Second operand has 3 states, 3 states have (on average 8.0) internal successors, (24), 2 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:18,448 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:52:18,448 INFO L93 Difference]: Finished difference Result 83 states and 143 transitions. [2025-02-08 14:52:18,448 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 83 states and 143 transitions. [2025-02-08 14:52:18,449 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 27 [2025-02-08 14:52:18,449 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 83 states to 83 states and 143 transitions. [2025-02-08 14:52:18,449 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 83 [2025-02-08 14:52:18,450 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 83 [2025-02-08 14:52:18,450 INFO L73 IsDeterministic]: Start isDeterministic. Operand 83 states and 143 transitions. [2025-02-08 14:52:18,450 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:52:18,450 INFO L218 hiAutomatonCegarLoop]: Abstraction has 83 states and 143 transitions. [2025-02-08 14:52:18,450 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states and 143 transitions. [2025-02-08 14:52:18,452 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 83. [2025-02-08 14:52:18,452 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 83 states, 83 states have (on average 1.7228915662650603) internal successors, (143), 82 states have internal predecessors, (143), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:18,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 143 transitions. [2025-02-08 14:52:18,453 INFO L240 hiAutomatonCegarLoop]: Abstraction has 83 states and 143 transitions. [2025-02-08 14:52:18,453 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-08 14:52:18,454 INFO L432 stractBuchiCegarLoop]: Abstraction has 83 states and 143 transitions. [2025-02-08 14:52:18,454 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-02-08 14:52:18,454 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 83 states and 143 transitions. [2025-02-08 14:52:18,454 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 27 [2025-02-08 14:52:18,454 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:52:18,454 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:52:18,455 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:18,455 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:18,455 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);call #Ultimate.allocInit(12, 3);~c~0 := 0;~c_t~0 := 0;~c_req_up~0 := 0;~p_in~0 := 0;~p_out~0 := 0;~wl_st~0 := 0;~c1_st~0 := 0;~c2_st~0 := 0;~wb_st~0 := 0;~r_st~0 := 0;~wl_i~0 := 0;~c1_i~0 := 0;~c2_i~0 := 0;~wb_i~0 := 0;~r_i~0 := 0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~e_e~0 := 0;~e_f~0 := 0;~e_g~0 := 0;~e_c~0 := 0;~e_p_in~0 := 0;~e_wl~0 := 0;~d~0 := 0;~data~0 := 0;~processed~0 := 0;~t_b~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~__retres1~0#1;havoc main_~__retres1~0#1;~e_wl~0 := 2;~e_c~0 := ~e_wl~0;~e_g~0 := ~e_c~0;~e_f~0 := ~e_g~0;~e_e~0 := ~e_f~0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~wb_i~0 := 1;~c2_i~0 := ~wb_i~0;~c1_i~0 := ~c2_i~0;~wl_i~0 := ~c1_i~0;~r_i~0 := 0;~c_req_up~0 := 0;~d~0 := 0;~c~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~c_req_up~0);" "assume 1 == ~wl_i~0;~wl_st~0 := 0;" "assume 1 == ~c1_i~0;~c1_st~0 := 0;" "assume 1 == ~c2_i~0;~c2_st~0 := 0;" "assume 1 == ~wb_i~0;~wb_st~0 := 0;" "assume !(1 == ~r_i~0);~r_st~0 := 2;" "assume !(0 == ~e_f~0);" "assume !(0 == ~e_g~0);" "assume !(0 == ~e_e~0);" "assume !(0 == ~e_c~0);" "assume !(0 == ~e_wl~0);" "assume 1 == ~wl_pc~0;" "assume 1 == ~e_wl~0;~wl_st~0 := 0;" "assume !(1 == ~c1_pc~0);" "assume !(1 == ~c2_pc~0);" "assume !(1 == ~wb_pc~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_e~0);" "assume !(1 == ~e_f~0);" "assume !(1 == ~e_g~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_wl~0);" "assume true;start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" [2025-02-08 14:52:18,455 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "assume 0 == ~wl_st~0;" "assume 0 == ~wl_st~0;havoc eval_#t~nondet4#1;eval_~tmp~0#1 := eval_#t~nondet4#1;havoc eval_#t~nondet4#1;" "assume !(0 != eval_~tmp~0#1);" "assume !(0 == ~c1_st~0);" "assume !(0 == ~c2_st~0);" "assume !(0 == ~wb_st~0);" "assume !(0 == ~r_st~0);" [2025-02-08 14:52:18,456 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:18,456 INFO L85 PathProgramCache]: Analyzing trace with hash -1150655263, now seen corresponding path program 1 times [2025-02-08 14:52:18,456 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:18,456 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1052292028] [2025-02-08 14:52:18,456 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:52:18,456 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:18,460 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 24 statements into 1 equivalence classes. [2025-02-08 14:52:18,463 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 24 of 24 statements. [2025-02-08 14:52:18,463 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:18,463 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:52:18,501 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:52:18,501 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:52:18,501 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1052292028] [2025-02-08 14:52:18,501 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1052292028] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:52:18,501 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:52:18,501 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-08 14:52:18,501 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1446833232] [2025-02-08 14:52:18,502 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:52:18,502 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-08 14:52:18,502 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:18,502 INFO L85 PathProgramCache]: Analyzing trace with hash 1560019320, now seen corresponding path program 3 times [2025-02-08 14:52:18,502 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:18,502 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1962113851] [2025-02-08 14:52:18,502 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-08 14:52:18,503 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:18,505 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 8 statements into 1 equivalence classes. [2025-02-08 14:52:18,506 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-02-08 14:52:18,506 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-08 14:52:18,506 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:18,506 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:52:18,507 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 8 statements into 1 equivalence classes. [2025-02-08 14:52:18,508 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-02-08 14:52:18,508 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:18,508 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:18,509 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:52:18,535 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:52:18,535 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-08 14:52:18,535 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-08 14:52:18,535 INFO L87 Difference]: Start difference. First operand 83 states and 143 transitions. cyclomatic complexity: 62 Second operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:18,549 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:52:18,549 INFO L93 Difference]: Finished difference Result 80 states and 136 transitions. [2025-02-08 14:52:18,549 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 80 states and 136 transitions. [2025-02-08 14:52:18,550 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 27 [2025-02-08 14:52:18,550 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 80 states to 80 states and 136 transitions. [2025-02-08 14:52:18,551 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 80 [2025-02-08 14:52:18,554 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 80 [2025-02-08 14:52:18,555 INFO L73 IsDeterministic]: Start isDeterministic. Operand 80 states and 136 transitions. [2025-02-08 14:52:18,555 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:52:18,555 INFO L218 hiAutomatonCegarLoop]: Abstraction has 80 states and 136 transitions. [2025-02-08 14:52:18,555 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states and 136 transitions. [2025-02-08 14:52:18,557 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 80. [2025-02-08 14:52:18,558 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 80 states, 80 states have (on average 1.7) internal successors, (136), 79 states have internal predecessors, (136), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:18,558 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 136 transitions. [2025-02-08 14:52:18,558 INFO L240 hiAutomatonCegarLoop]: Abstraction has 80 states and 136 transitions. [2025-02-08 14:52:18,558 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-08 14:52:18,559 INFO L432 stractBuchiCegarLoop]: Abstraction has 80 states and 136 transitions. [2025-02-08 14:52:18,559 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-02-08 14:52:18,559 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 80 states and 136 transitions. [2025-02-08 14:52:18,560 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 27 [2025-02-08 14:52:18,560 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:52:18,560 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:52:18,560 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:18,560 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:18,560 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);call #Ultimate.allocInit(12, 3);~c~0 := 0;~c_t~0 := 0;~c_req_up~0 := 0;~p_in~0 := 0;~p_out~0 := 0;~wl_st~0 := 0;~c1_st~0 := 0;~c2_st~0 := 0;~wb_st~0 := 0;~r_st~0 := 0;~wl_i~0 := 0;~c1_i~0 := 0;~c2_i~0 := 0;~wb_i~0 := 0;~r_i~0 := 0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~e_e~0 := 0;~e_f~0 := 0;~e_g~0 := 0;~e_c~0 := 0;~e_p_in~0 := 0;~e_wl~0 := 0;~d~0 := 0;~data~0 := 0;~processed~0 := 0;~t_b~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~__retres1~0#1;havoc main_~__retres1~0#1;~e_wl~0 := 2;~e_c~0 := ~e_wl~0;~e_g~0 := ~e_c~0;~e_f~0 := ~e_g~0;~e_e~0 := ~e_f~0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~wb_i~0 := 1;~c2_i~0 := ~wb_i~0;~c1_i~0 := ~c2_i~0;~wl_i~0 := ~c1_i~0;~r_i~0 := 0;~c_req_up~0 := 0;~d~0 := 0;~c~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~c_req_up~0);" "assume 1 == ~wl_i~0;~wl_st~0 := 0;" "assume 1 == ~c1_i~0;~c1_st~0 := 0;" "assume 1 == ~c2_i~0;~c2_st~0 := 0;" "assume 1 == ~wb_i~0;~wb_st~0 := 0;" "assume !(1 == ~r_i~0);~r_st~0 := 2;" "assume !(0 == ~e_f~0);" "assume !(0 == ~e_g~0);" "assume !(0 == ~e_e~0);" "assume !(0 == ~e_c~0);" "assume !(0 == ~e_wl~0);" "assume !(1 == ~wl_pc~0);" "assume !(2 == ~wl_pc~0);" "assume !(1 == ~c1_pc~0);" "assume !(1 == ~c2_pc~0);" "assume !(1 == ~wb_pc~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_e~0);" "assume !(1 == ~e_f~0);" "assume !(1 == ~e_g~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_wl~0);" "assume true;start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" [2025-02-08 14:52:18,560 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "assume 0 == ~wl_st~0;" "assume 0 == ~wl_st~0;havoc eval_#t~nondet4#1;eval_~tmp~0#1 := eval_#t~nondet4#1;havoc eval_#t~nondet4#1;" "assume !(0 != eval_~tmp~0#1);" "assume !(0 == ~c1_st~0);" "assume !(0 == ~c2_st~0);" "assume !(0 == ~wb_st~0);" "assume !(0 == ~r_st~0);" [2025-02-08 14:52:18,560 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:18,560 INFO L85 PathProgramCache]: Analyzing trace with hash 1081621190, now seen corresponding path program 1 times [2025-02-08 14:52:18,561 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:18,561 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1073072882] [2025-02-08 14:52:18,561 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:52:18,561 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:18,568 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 24 statements into 1 equivalence classes. [2025-02-08 14:52:18,572 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 24 of 24 statements. [2025-02-08 14:52:18,572 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:18,572 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:18,572 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:52:18,574 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 24 statements into 1 equivalence classes. [2025-02-08 14:52:18,577 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 24 of 24 statements. [2025-02-08 14:52:18,577 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:18,577 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:18,583 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:52:18,583 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:18,584 INFO L85 PathProgramCache]: Analyzing trace with hash 1560019320, now seen corresponding path program 4 times [2025-02-08 14:52:18,584 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:18,584 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [693636581] [2025-02-08 14:52:18,584 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-08 14:52:18,584 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:18,586 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 8 statements into 2 equivalence classes. [2025-02-08 14:52:18,587 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 8 of 8 statements. [2025-02-08 14:52:18,587 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-08 14:52:18,587 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:18,587 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:52:18,588 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 8 statements into 1 equivalence classes. [2025-02-08 14:52:18,589 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-02-08 14:52:18,589 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:18,589 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:18,590 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:52:18,590 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:18,590 INFO L85 PathProgramCache]: Analyzing trace with hash 1061398333, now seen corresponding path program 1 times [2025-02-08 14:52:18,590 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:18,590 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [9584156] [2025-02-08 14:52:18,591 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:52:18,591 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:18,594 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 32 statements into 1 equivalence classes. [2025-02-08 14:52:18,597 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 32 of 32 statements. [2025-02-08 14:52:18,597 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:18,597 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:52:18,614 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:52:18,614 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:52:18,615 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [9584156] [2025-02-08 14:52:18,615 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [9584156] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:52:18,615 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:52:18,615 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-08 14:52:18,615 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [619060982] [2025-02-08 14:52:18,615 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:52:18,639 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:52:18,639 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-08 14:52:18,639 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-08 14:52:18,639 INFO L87 Difference]: Start difference. First operand 80 states and 136 transitions. cyclomatic complexity: 58 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:18,646 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:52:18,646 INFO L93 Difference]: Finished difference Result 77 states and 128 transitions. [2025-02-08 14:52:18,646 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 77 states and 128 transitions. [2025-02-08 14:52:18,647 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 24 [2025-02-08 14:52:18,648 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 77 states to 77 states and 128 transitions. [2025-02-08 14:52:18,648 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 77 [2025-02-08 14:52:18,648 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 77 [2025-02-08 14:52:18,648 INFO L73 IsDeterministic]: Start isDeterministic. Operand 77 states and 128 transitions. [2025-02-08 14:52:18,648 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:52:18,648 INFO L218 hiAutomatonCegarLoop]: Abstraction has 77 states and 128 transitions. [2025-02-08 14:52:18,648 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states and 128 transitions. [2025-02-08 14:52:18,650 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 77. [2025-02-08 14:52:18,650 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 77 states, 77 states have (on average 1.6623376623376624) internal successors, (128), 76 states have internal predecessors, (128), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:18,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 128 transitions. [2025-02-08 14:52:18,651 INFO L240 hiAutomatonCegarLoop]: Abstraction has 77 states and 128 transitions. [2025-02-08 14:52:18,651 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-08 14:52:18,651 INFO L432 stractBuchiCegarLoop]: Abstraction has 77 states and 128 transitions. [2025-02-08 14:52:18,651 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-02-08 14:52:18,651 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 77 states and 128 transitions. [2025-02-08 14:52:18,652 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 24 [2025-02-08 14:52:18,652 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:52:18,652 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:52:18,652 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:18,652 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:18,653 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);call #Ultimate.allocInit(12, 3);~c~0 := 0;~c_t~0 := 0;~c_req_up~0 := 0;~p_in~0 := 0;~p_out~0 := 0;~wl_st~0 := 0;~c1_st~0 := 0;~c2_st~0 := 0;~wb_st~0 := 0;~r_st~0 := 0;~wl_i~0 := 0;~c1_i~0 := 0;~c2_i~0 := 0;~wb_i~0 := 0;~r_i~0 := 0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~e_e~0 := 0;~e_f~0 := 0;~e_g~0 := 0;~e_c~0 := 0;~e_p_in~0 := 0;~e_wl~0 := 0;~d~0 := 0;~data~0 := 0;~processed~0 := 0;~t_b~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~__retres1~0#1;havoc main_~__retres1~0#1;~e_wl~0 := 2;~e_c~0 := ~e_wl~0;~e_g~0 := ~e_c~0;~e_f~0 := ~e_g~0;~e_e~0 := ~e_f~0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~wb_i~0 := 1;~c2_i~0 := ~wb_i~0;~c1_i~0 := ~c2_i~0;~wl_i~0 := ~c1_i~0;~r_i~0 := 0;~c_req_up~0 := 0;~d~0 := 0;~c~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~c_req_up~0);" "assume 1 == ~wl_i~0;~wl_st~0 := 0;" "assume 1 == ~c1_i~0;~c1_st~0 := 0;" "assume 1 == ~c2_i~0;~c2_st~0 := 0;" "assume 1 == ~wb_i~0;~wb_st~0 := 0;" "assume !(1 == ~r_i~0);~r_st~0 := 2;" "assume !(0 == ~e_f~0);" "assume !(0 == ~e_g~0);" "assume !(0 == ~e_e~0);" "assume !(0 == ~e_c~0);" "assume !(0 == ~e_wl~0);" "assume !(1 == ~wl_pc~0);" "assume !(2 == ~wl_pc~0);" "assume !(1 == ~c1_pc~0);" "assume !(1 == ~c2_pc~0);" "assume !(1 == ~wb_pc~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_e~0);" "assume !(1 == ~e_f~0);" "assume !(1 == ~e_g~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_wl~0);" "assume true;start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" [2025-02-08 14:52:18,653 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "assume 0 == ~wl_st~0;" "assume 0 == ~wl_st~0;havoc eval_#t~nondet4#1;eval_~tmp~0#1 := eval_#t~nondet4#1;havoc eval_#t~nondet4#1;" "assume !(0 != eval_~tmp~0#1);" "assume 0 == ~c1_st~0;havoc eval_#t~nondet5#1;eval_~tmp___0~0#1 := eval_#t~nondet5#1;havoc eval_#t~nondet5#1;" "assume !(0 != eval_~tmp___0~0#1);" "assume !(0 == ~c2_st~0);" "assume !(0 == ~wb_st~0);" "assume !(0 == ~r_st~0);" [2025-02-08 14:52:18,653 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:18,653 INFO L85 PathProgramCache]: Analyzing trace with hash 1081621190, now seen corresponding path program 2 times [2025-02-08 14:52:18,653 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:18,653 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1954606034] [2025-02-08 14:52:18,653 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-08 14:52:18,653 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:18,657 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 24 statements into 1 equivalence classes. [2025-02-08 14:52:18,660 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 24 of 24 statements. [2025-02-08 14:52:18,660 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-08 14:52:18,660 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:18,660 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:52:18,662 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 24 statements into 1 equivalence classes. [2025-02-08 14:52:18,664 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 24 of 24 statements. [2025-02-08 14:52:18,664 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:18,664 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:18,668 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:52:18,668 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:18,668 INFO L85 PathProgramCache]: Analyzing trace with hash 1115652679, now seen corresponding path program 1 times [2025-02-08 14:52:18,668 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:18,668 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [2017194477] [2025-02-08 14:52:18,668 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:52:18,668 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:18,670 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 9 statements into 1 equivalence classes. [2025-02-08 14:52:18,670 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 9 of 9 statements. [2025-02-08 14:52:18,670 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:18,671 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:18,671 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:52:18,671 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 9 statements into 1 equivalence classes. [2025-02-08 14:52:18,672 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 9 of 9 statements. [2025-02-08 14:52:18,672 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:18,672 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:18,673 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:52:18,673 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:18,673 INFO L85 PathProgramCache]: Analyzing trace with hash -1456696030, now seen corresponding path program 1 times [2025-02-08 14:52:18,673 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:18,673 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [521402764] [2025-02-08 14:52:18,673 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:52:18,673 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:18,677 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 33 statements into 1 equivalence classes. [2025-02-08 14:52:18,679 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 33 of 33 statements. [2025-02-08 14:52:18,679 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:18,679 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:52:18,696 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:52:18,696 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:52:18,696 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [521402764] [2025-02-08 14:52:18,696 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [521402764] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:52:18,696 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:52:18,696 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-08 14:52:18,697 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1135840197] [2025-02-08 14:52:18,697 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:52:18,722 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:52:18,722 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-08 14:52:18,722 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-08 14:52:18,722 INFO L87 Difference]: Start difference. First operand 77 states and 128 transitions. cyclomatic complexity: 53 Second operand has 3 states, 3 states have (on average 11.0) internal successors, (33), 3 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:18,731 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:52:18,731 INFO L93 Difference]: Finished difference Result 77 states and 126 transitions. [2025-02-08 14:52:18,731 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 77 states and 126 transitions. [2025-02-08 14:52:18,732 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 24 [2025-02-08 14:52:18,732 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 77 states to 77 states and 126 transitions. [2025-02-08 14:52:18,732 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 77 [2025-02-08 14:52:18,732 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 77 [2025-02-08 14:52:18,732 INFO L73 IsDeterministic]: Start isDeterministic. Operand 77 states and 126 transitions. [2025-02-08 14:52:18,733 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:52:18,733 INFO L218 hiAutomatonCegarLoop]: Abstraction has 77 states and 126 transitions. [2025-02-08 14:52:18,733 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states and 126 transitions. [2025-02-08 14:52:18,734 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 77. [2025-02-08 14:52:18,735 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 77 states, 77 states have (on average 1.6363636363636365) internal successors, (126), 76 states have internal predecessors, (126), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:18,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 126 transitions. [2025-02-08 14:52:18,735 INFO L240 hiAutomatonCegarLoop]: Abstraction has 77 states and 126 transitions. [2025-02-08 14:52:18,735 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-08 14:52:18,736 INFO L432 stractBuchiCegarLoop]: Abstraction has 77 states and 126 transitions. [2025-02-08 14:52:18,736 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-02-08 14:52:18,736 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 77 states and 126 transitions. [2025-02-08 14:52:18,736 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 24 [2025-02-08 14:52:18,736 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:52:18,736 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:52:18,737 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:18,737 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:18,737 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);call #Ultimate.allocInit(12, 3);~c~0 := 0;~c_t~0 := 0;~c_req_up~0 := 0;~p_in~0 := 0;~p_out~0 := 0;~wl_st~0 := 0;~c1_st~0 := 0;~c2_st~0 := 0;~wb_st~0 := 0;~r_st~0 := 0;~wl_i~0 := 0;~c1_i~0 := 0;~c2_i~0 := 0;~wb_i~0 := 0;~r_i~0 := 0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~e_e~0 := 0;~e_f~0 := 0;~e_g~0 := 0;~e_c~0 := 0;~e_p_in~0 := 0;~e_wl~0 := 0;~d~0 := 0;~data~0 := 0;~processed~0 := 0;~t_b~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~__retres1~0#1;havoc main_~__retres1~0#1;~e_wl~0 := 2;~e_c~0 := ~e_wl~0;~e_g~0 := ~e_c~0;~e_f~0 := ~e_g~0;~e_e~0 := ~e_f~0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~wb_i~0 := 1;~c2_i~0 := ~wb_i~0;~c1_i~0 := ~c2_i~0;~wl_i~0 := ~c1_i~0;~r_i~0 := 0;~c_req_up~0 := 0;~d~0 := 0;~c~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~c_req_up~0);" "assume 1 == ~wl_i~0;~wl_st~0 := 0;" "assume 1 == ~c1_i~0;~c1_st~0 := 0;" "assume 1 == ~c2_i~0;~c2_st~0 := 0;" "assume 1 == ~wb_i~0;~wb_st~0 := 0;" "assume !(1 == ~r_i~0);~r_st~0 := 2;" "assume !(0 == ~e_f~0);" "assume !(0 == ~e_g~0);" "assume !(0 == ~e_e~0);" "assume !(0 == ~e_c~0);" "assume !(0 == ~e_wl~0);" "assume !(1 == ~wl_pc~0);" "assume !(2 == ~wl_pc~0);" "assume !(1 == ~c1_pc~0);" "assume !(1 == ~c2_pc~0);" "assume !(1 == ~wb_pc~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_e~0);" "assume !(1 == ~e_f~0);" "assume !(1 == ~e_g~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_wl~0);" "assume true;start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" [2025-02-08 14:52:18,737 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "assume 0 == ~wl_st~0;" "assume 0 == ~wl_st~0;havoc eval_#t~nondet4#1;eval_~tmp~0#1 := eval_#t~nondet4#1;havoc eval_#t~nondet4#1;" "assume !(0 != eval_~tmp~0#1);" "assume 0 == ~c1_st~0;havoc eval_#t~nondet5#1;eval_~tmp___0~0#1 := eval_#t~nondet5#1;havoc eval_#t~nondet5#1;" "assume !(0 != eval_~tmp___0~0#1);" "assume 0 == ~c2_st~0;havoc eval_#t~nondet6#1;eval_~tmp___1~0#1 := eval_#t~nondet6#1;havoc eval_#t~nondet6#1;" "assume !(0 != eval_~tmp___1~0#1);" "assume !(0 == ~wb_st~0);" "assume !(0 == ~r_st~0);" [2025-02-08 14:52:18,737 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:18,738 INFO L85 PathProgramCache]: Analyzing trace with hash 1081621190, now seen corresponding path program 3 times [2025-02-08 14:52:18,738 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:18,738 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [510784571] [2025-02-08 14:52:18,738 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-08 14:52:18,738 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:18,742 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 24 statements into 1 equivalence classes. [2025-02-08 14:52:18,745 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 24 of 24 statements. [2025-02-08 14:52:18,745 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-08 14:52:18,745 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:18,745 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:52:18,746 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 24 statements into 1 equivalence classes. [2025-02-08 14:52:18,748 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 24 of 24 statements. [2025-02-08 14:52:18,748 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:18,748 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:18,756 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:52:18,756 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:18,756 INFO L85 PathProgramCache]: Analyzing trace with hash 225484684, now seen corresponding path program 1 times [2025-02-08 14:52:18,756 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:18,756 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1690612780] [2025-02-08 14:52:18,756 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:52:18,756 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:18,758 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 10 statements into 1 equivalence classes. [2025-02-08 14:52:18,758 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 10 of 10 statements. [2025-02-08 14:52:18,758 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:18,759 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:18,759 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:52:18,759 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 10 statements into 1 equivalence classes. [2025-02-08 14:52:18,760 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 10 of 10 statements. [2025-02-08 14:52:18,760 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:18,760 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:18,761 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:52:18,761 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:18,761 INFO L85 PathProgramCache]: Analyzing trace with hash 2087053329, now seen corresponding path program 1 times [2025-02-08 14:52:18,761 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:18,762 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [716639659] [2025-02-08 14:52:18,762 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:52:18,762 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:18,765 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-02-08 14:52:18,767 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-02-08 14:52:18,767 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:18,767 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:52:18,783 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:52:18,783 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:52:18,783 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [716639659] [2025-02-08 14:52:18,783 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [716639659] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:52:18,783 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:52:18,783 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-08 14:52:18,783 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [834812491] [2025-02-08 14:52:18,783 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:52:18,810 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:52:18,810 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-08 14:52:18,811 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-08 14:52:18,811 INFO L87 Difference]: Start difference. First operand 77 states and 126 transitions. cyclomatic complexity: 51 Second operand has 3 states, 3 states have (on average 11.333333333333334) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:18,819 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:52:18,819 INFO L93 Difference]: Finished difference Result 143 states and 236 transitions. [2025-02-08 14:52:18,819 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 143 states and 236 transitions. [2025-02-08 14:52:18,820 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 46 [2025-02-08 14:52:18,821 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 143 states to 143 states and 236 transitions. [2025-02-08 14:52:18,821 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 143 [2025-02-08 14:52:18,821 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 143 [2025-02-08 14:52:18,821 INFO L73 IsDeterministic]: Start isDeterministic. Operand 143 states and 236 transitions. [2025-02-08 14:52:18,822 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:52:18,822 INFO L218 hiAutomatonCegarLoop]: Abstraction has 143 states and 236 transitions. [2025-02-08 14:52:18,822 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states and 236 transitions. [2025-02-08 14:52:18,825 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 143. [2025-02-08 14:52:18,825 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 143 states, 143 states have (on average 1.6503496503496504) internal successors, (236), 142 states have internal predecessors, (236), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:18,826 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 236 transitions. [2025-02-08 14:52:18,826 INFO L240 hiAutomatonCegarLoop]: Abstraction has 143 states and 236 transitions. [2025-02-08 14:52:18,826 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-08 14:52:18,827 INFO L432 stractBuchiCegarLoop]: Abstraction has 143 states and 236 transitions. [2025-02-08 14:52:18,827 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-02-08 14:52:18,829 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 143 states and 236 transitions. [2025-02-08 14:52:18,830 INFO L131 ngComponentsAnalysis]: Automaton has 4 accepting balls. 46 [2025-02-08 14:52:18,830 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:52:18,830 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:52:18,830 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:18,830 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:18,831 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);call #Ultimate.allocInit(12, 3);~c~0 := 0;~c_t~0 := 0;~c_req_up~0 := 0;~p_in~0 := 0;~p_out~0 := 0;~wl_st~0 := 0;~c1_st~0 := 0;~c2_st~0 := 0;~wb_st~0 := 0;~r_st~0 := 0;~wl_i~0 := 0;~c1_i~0 := 0;~c2_i~0 := 0;~wb_i~0 := 0;~r_i~0 := 0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~e_e~0 := 0;~e_f~0 := 0;~e_g~0 := 0;~e_c~0 := 0;~e_p_in~0 := 0;~e_wl~0 := 0;~d~0 := 0;~data~0 := 0;~processed~0 := 0;~t_b~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~__retres1~0#1;havoc main_~__retres1~0#1;~e_wl~0 := 2;~e_c~0 := ~e_wl~0;~e_g~0 := ~e_c~0;~e_f~0 := ~e_g~0;~e_e~0 := ~e_f~0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~wb_i~0 := 1;~c2_i~0 := ~wb_i~0;~c1_i~0 := ~c2_i~0;~wl_i~0 := ~c1_i~0;~r_i~0 := 0;~c_req_up~0 := 0;~d~0 := 0;~c~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~c_req_up~0);" "assume 1 == ~wl_i~0;~wl_st~0 := 0;" "assume 1 == ~c1_i~0;~c1_st~0 := 0;" "assume 1 == ~c2_i~0;~c2_st~0 := 0;" "assume !(1 == ~wb_i~0);~wb_st~0 := 2;" "assume !(1 == ~r_i~0);~r_st~0 := 2;" "assume !(0 == ~e_f~0);" "assume !(0 == ~e_g~0);" "assume !(0 == ~e_e~0);" "assume !(0 == ~e_c~0);" "assume !(0 == ~e_wl~0);" "assume !(1 == ~wl_pc~0);" "assume !(2 == ~wl_pc~0);" "assume !(1 == ~c1_pc~0);" "assume !(1 == ~c2_pc~0);" "assume !(1 == ~wb_pc~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_e~0);" "assume !(1 == ~e_f~0);" "assume !(1 == ~e_g~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_wl~0);" "assume true;start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" [2025-02-08 14:52:18,831 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "assume 0 == ~wl_st~0;" "assume 0 == ~wl_st~0;havoc eval_#t~nondet4#1;eval_~tmp~0#1 := eval_#t~nondet4#1;havoc eval_#t~nondet4#1;" "assume !(0 != eval_~tmp~0#1);" "assume 0 == ~c1_st~0;havoc eval_#t~nondet5#1;eval_~tmp___0~0#1 := eval_#t~nondet5#1;havoc eval_#t~nondet5#1;" "assume !(0 != eval_~tmp___0~0#1);" "assume 0 == ~c2_st~0;havoc eval_#t~nondet6#1;eval_~tmp___1~0#1 := eval_#t~nondet6#1;havoc eval_#t~nondet6#1;" "assume !(0 != eval_~tmp___1~0#1);" "assume !(0 == ~wb_st~0);" "assume !(0 == ~r_st~0);" [2025-02-08 14:52:18,831 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:18,831 INFO L85 PathProgramCache]: Analyzing trace with hash 237149319, now seen corresponding path program 1 times [2025-02-08 14:52:18,831 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:18,831 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [303791776] [2025-02-08 14:52:18,831 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:52:18,831 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:18,835 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 24 statements into 1 equivalence classes. [2025-02-08 14:52:18,836 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 24 of 24 statements. [2025-02-08 14:52:18,836 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:18,837 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:52:18,847 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:52:18,847 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:52:18,847 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [303791776] [2025-02-08 14:52:18,847 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [303791776] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:52:18,847 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:52:18,847 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-02-08 14:52:18,847 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [601540091] [2025-02-08 14:52:18,847 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:52:18,847 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-08 14:52:18,847 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:18,847 INFO L85 PathProgramCache]: Analyzing trace with hash 225484684, now seen corresponding path program 2 times [2025-02-08 14:52:18,847 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:18,847 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [340651584] [2025-02-08 14:52:18,847 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-08 14:52:18,847 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:18,849 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 10 statements into 1 equivalence classes. [2025-02-08 14:52:18,849 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 10 of 10 statements. [2025-02-08 14:52:18,849 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-08 14:52:18,849 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:18,849 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:52:18,850 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 10 statements into 1 equivalence classes. [2025-02-08 14:52:18,850 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 10 of 10 statements. [2025-02-08 14:52:18,850 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:18,850 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:18,852 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:52:18,880 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:52:18,880 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-08 14:52:18,880 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-08 14:52:18,881 INFO L87 Difference]: Start difference. First operand 143 states and 236 transitions. cyclomatic complexity: 97 Second operand has 3 states, 3 states have (on average 8.0) internal successors, (24), 2 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:18,882 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:52:18,882 INFO L93 Difference]: Finished difference Result 77 states and 122 transitions. [2025-02-08 14:52:18,882 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 77 states and 122 transitions. [2025-02-08 14:52:18,883 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 24 [2025-02-08 14:52:18,883 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 77 states to 77 states and 122 transitions. [2025-02-08 14:52:18,883 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 77 [2025-02-08 14:52:18,883 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 77 [2025-02-08 14:52:18,884 INFO L73 IsDeterministic]: Start isDeterministic. Operand 77 states and 122 transitions. [2025-02-08 14:52:18,884 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:52:18,884 INFO L218 hiAutomatonCegarLoop]: Abstraction has 77 states and 122 transitions. [2025-02-08 14:52:18,884 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states and 122 transitions. [2025-02-08 14:52:18,885 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 77. [2025-02-08 14:52:18,885 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 77 states, 77 states have (on average 1.5844155844155845) internal successors, (122), 76 states have internal predecessors, (122), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:18,886 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 122 transitions. [2025-02-08 14:52:18,886 INFO L240 hiAutomatonCegarLoop]: Abstraction has 77 states and 122 transitions. [2025-02-08 14:52:18,886 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-08 14:52:18,886 INFO L432 stractBuchiCegarLoop]: Abstraction has 77 states and 122 transitions. [2025-02-08 14:52:18,886 INFO L338 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2025-02-08 14:52:18,887 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 77 states and 122 transitions. [2025-02-08 14:52:18,887 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 24 [2025-02-08 14:52:18,887 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:52:18,887 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:52:18,887 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:18,887 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:18,888 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);call #Ultimate.allocInit(12, 3);~c~0 := 0;~c_t~0 := 0;~c_req_up~0 := 0;~p_in~0 := 0;~p_out~0 := 0;~wl_st~0 := 0;~c1_st~0 := 0;~c2_st~0 := 0;~wb_st~0 := 0;~r_st~0 := 0;~wl_i~0 := 0;~c1_i~0 := 0;~c2_i~0 := 0;~wb_i~0 := 0;~r_i~0 := 0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~e_e~0 := 0;~e_f~0 := 0;~e_g~0 := 0;~e_c~0 := 0;~e_p_in~0 := 0;~e_wl~0 := 0;~d~0 := 0;~data~0 := 0;~processed~0 := 0;~t_b~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~__retres1~0#1;havoc main_~__retres1~0#1;~e_wl~0 := 2;~e_c~0 := ~e_wl~0;~e_g~0 := ~e_c~0;~e_f~0 := ~e_g~0;~e_e~0 := ~e_f~0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~wb_i~0 := 1;~c2_i~0 := ~wb_i~0;~c1_i~0 := ~c2_i~0;~wl_i~0 := ~c1_i~0;~r_i~0 := 0;~c_req_up~0 := 0;~d~0 := 0;~c~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~c_req_up~0);" "assume 1 == ~wl_i~0;~wl_st~0 := 0;" "assume 1 == ~c1_i~0;~c1_st~0 := 0;" "assume 1 == ~c2_i~0;~c2_st~0 := 0;" "assume 1 == ~wb_i~0;~wb_st~0 := 0;" "assume !(1 == ~r_i~0);~r_st~0 := 2;" "assume !(0 == ~e_f~0);" "assume !(0 == ~e_g~0);" "assume !(0 == ~e_e~0);" "assume !(0 == ~e_c~0);" "assume !(0 == ~e_wl~0);" "assume !(1 == ~wl_pc~0);" "assume !(2 == ~wl_pc~0);" "assume !(1 == ~c1_pc~0);" "assume !(1 == ~c2_pc~0);" "assume !(1 == ~wb_pc~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_e~0);" "assume !(1 == ~e_f~0);" "assume !(1 == ~e_g~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_wl~0);" "assume true;start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" [2025-02-08 14:52:18,888 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "assume 0 == ~wl_st~0;" "assume 0 == ~wl_st~0;havoc eval_#t~nondet4#1;eval_~tmp~0#1 := eval_#t~nondet4#1;havoc eval_#t~nondet4#1;" "assume !(0 != eval_~tmp~0#1);" "assume 0 == ~c1_st~0;havoc eval_#t~nondet5#1;eval_~tmp___0~0#1 := eval_#t~nondet5#1;havoc eval_#t~nondet5#1;" "assume !(0 != eval_~tmp___0~0#1);" "assume 0 == ~c2_st~0;havoc eval_#t~nondet6#1;eval_~tmp___1~0#1 := eval_#t~nondet6#1;havoc eval_#t~nondet6#1;" "assume !(0 != eval_~tmp___1~0#1);" "assume 0 == ~wb_st~0;havoc eval_#t~nondet7#1;eval_~tmp___2~0#1 := eval_#t~nondet7#1;havoc eval_#t~nondet7#1;" "assume !(0 != eval_~tmp___2~0#1);" "assume !(0 == ~r_st~0);" [2025-02-08 14:52:18,888 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:18,888 INFO L85 PathProgramCache]: Analyzing trace with hash 1081621190, now seen corresponding path program 4 times [2025-02-08 14:52:18,888 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:18,888 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1643998677] [2025-02-08 14:52:18,888 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-08 14:52:18,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:18,891 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 24 statements into 2 equivalence classes. [2025-02-08 14:52:18,894 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 24 of 24 statements. [2025-02-08 14:52:18,894 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-08 14:52:18,894 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:18,894 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:52:18,895 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 24 statements into 1 equivalence classes. [2025-02-08 14:52:18,897 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 24 of 24 statements. [2025-02-08 14:52:18,897 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:18,897 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:18,900 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:52:18,900 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:18,900 INFO L85 PathProgramCache]: Analyzing trace with hash -1599909837, now seen corresponding path program 1 times [2025-02-08 14:52:18,900 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:18,900 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1866025533] [2025-02-08 14:52:18,900 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:52:18,900 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:18,902 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 11 statements into 1 equivalence classes. [2025-02-08 14:52:18,902 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 11 of 11 statements. [2025-02-08 14:52:18,902 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:18,902 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:18,902 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:52:18,903 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 11 statements into 1 equivalence classes. [2025-02-08 14:52:18,907 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 11 of 11 statements. [2025-02-08 14:52:18,907 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:18,907 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:18,908 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:52:18,908 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:18,908 INFO L85 PathProgramCache]: Analyzing trace with hash 274143310, now seen corresponding path program 1 times [2025-02-08 14:52:18,908 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:18,908 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [87861491] [2025-02-08 14:52:18,908 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:52:18,908 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:18,915 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 35 statements into 1 equivalence classes. [2025-02-08 14:52:18,917 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 35 of 35 statements. [2025-02-08 14:52:18,917 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:18,917 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:18,917 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:52:18,918 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 35 statements into 1 equivalence classes. [2025-02-08 14:52:18,921 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 35 of 35 statements. [2025-02-08 14:52:18,921 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:18,921 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:18,924 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:52:19,666 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 24 statements into 1 equivalence classes. [2025-02-08 14:52:19,673 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 24 of 24 statements. [2025-02-08 14:52:19,674 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:19,674 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:19,674 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:52:19,681 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 24 statements into 1 equivalence classes. [2025-02-08 14:52:19,684 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 24 of 24 statements. [2025-02-08 14:52:19,684 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:19,684 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:19,783 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 08.02 02:52:19 BoogieIcfgContainer [2025-02-08 14:52:19,783 INFO L131 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2025-02-08 14:52:19,786 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-02-08 14:52:19,786 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-02-08 14:52:19,786 INFO L274 PluginConnector]: Witness Printer initialized [2025-02-08 14:52:19,787 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 08.02 02:52:17" (3/4) ... [2025-02-08 14:52:19,788 INFO L143 WitnessPrinter]: Generating witness for non-termination counterexample [2025-02-08 14:52:19,849 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/witness.graphml [2025-02-08 14:52:19,850 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-02-08 14:52:19,851 INFO L158 Benchmark]: Toolchain (without parser) took 2723.93ms. Allocated memory was 167.8MB in the beginning and 335.5MB in the end (delta: 167.8MB). Free memory was 131.0MB in the beginning and 250.2MB in the end (delta: -119.2MB). Peak memory consumption was 46.1MB. Max. memory is 16.1GB. [2025-02-08 14:52:19,852 INFO L158 Benchmark]: CDTParser took 0.18ms. Allocated memory is still 226.5MB. Free memory is still 149.5MB. There was no memory consumed. Max. memory is 16.1GB. [2025-02-08 14:52:19,852 INFO L158 Benchmark]: CACSL2BoogieTranslator took 225.72ms. Allocated memory is still 167.8MB. Free memory was 131.0MB in the beginning and 116.7MB in the end (delta: 14.2MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-02-08 14:52:19,852 INFO L158 Benchmark]: Boogie Procedure Inliner took 29.47ms. Allocated memory is still 167.8MB. Free memory was 116.7MB in the beginning and 114.4MB in the end (delta: 2.4MB). There was no memory consumed. Max. memory is 16.1GB. [2025-02-08 14:52:19,852 INFO L158 Benchmark]: Boogie Preprocessor took 35.30ms. Allocated memory is still 167.8MB. Free memory was 114.4MB in the beginning and 112.9MB in the end (delta: 1.5MB). There was no memory consumed. Max. memory is 16.1GB. [2025-02-08 14:52:19,852 INFO L158 Benchmark]: IcfgBuilder took 391.25ms. Allocated memory is still 167.8MB. Free memory was 112.9MB in the beginning and 88.3MB in the end (delta: 24.6MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. [2025-02-08 14:52:19,853 INFO L158 Benchmark]: BuchiAutomizer took 1972.44ms. Allocated memory was 167.8MB in the beginning and 335.5MB in the end (delta: 167.8MB). Free memory was 88.3MB in the beginning and 258.2MB in the end (delta: -170.0MB). There was no memory consumed. Max. memory is 16.1GB. [2025-02-08 14:52:19,853 INFO L158 Benchmark]: Witness Printer took 63.66ms. Allocated memory is still 335.5MB. Free memory was 258.2MB in the beginning and 250.2MB in the end (delta: 8.0MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-02-08 14:52:19,854 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18ms. Allocated memory is still 226.5MB. Free memory is still 149.5MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 225.72ms. Allocated memory is still 167.8MB. Free memory was 131.0MB in the beginning and 116.7MB in the end (delta: 14.2MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 29.47ms. Allocated memory is still 167.8MB. Free memory was 116.7MB in the beginning and 114.4MB in the end (delta: 2.4MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 35.30ms. Allocated memory is still 167.8MB. Free memory was 114.4MB in the beginning and 112.9MB in the end (delta: 1.5MB). There was no memory consumed. Max. memory is 16.1GB. * IcfgBuilder took 391.25ms. Allocated memory is still 167.8MB. Free memory was 112.9MB in the beginning and 88.3MB in the end (delta: 24.6MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. * BuchiAutomizer took 1972.44ms. Allocated memory was 167.8MB in the beginning and 335.5MB in the end (delta: 167.8MB). Free memory was 88.3MB in the beginning and 258.2MB in the end (delta: -170.0MB). There was no memory consumed. Max. memory is 16.1GB. * Witness Printer took 63.66ms. Allocated memory is still 335.5MB. Free memory was 258.2MB in the beginning and 250.2MB in the end (delta: 8.0MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 8 terminating modules (8 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.8 modules have a trivial ranking function, the largest among these consists of 4 locations. The remainder module has 77 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 1.8s and 9 iterations. TraceHistogramMax:1. Analysis of lassos took 1.6s. Construction of modules took 0.0s. Büchi inclusion checks took 0.1s. Highest rank in rank-based complementation 0. Minimization of det autom 8. Minimization of nondet autom 0. Automata minimization 0.0s AutomataMinimizationTime, 8 MinimizatonAttempts, 1 StatesRemovedByMinimization, 1 NontrivialMinimizations. Non-live state removal took 0.0s Buchi closure took 0.0s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 563 SdHoareTripleChecker+Valid, 0.0s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 563 mSDsluCounter, 825 SdHoareTripleChecker+Invalid, 0.0s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 156 mSDsCounter, 22 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 20 IncrementalHoareTripleChecker+Invalid, 42 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 22 mSolverCounterUnsat, 669 mSDtfsCounter, 20 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont1 unkn0 SFLI0 SFLT0 conc3 concLT0 SILN4 SILU0 SILI1 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - LassoShapedNonTerminationArgument [Line: 306]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite program execution. Stem: [L28] int c ; [L29] int c_t ; [L30] int c_req_up ; [L31] int p_in ; [L32] int p_out ; [L33] int wl_st ; [L34] int c1_st ; [L35] int c2_st ; [L36] int wb_st ; [L37] int r_st ; [L38] int wl_i ; [L39] int c1_i ; [L40] int c2_i ; [L41] int wb_i ; [L42] int r_i ; [L43] int wl_pc ; [L44] int c1_pc ; [L45] int c2_pc ; [L46] int wb_pc ; [L47] int e_e ; [L48] int e_f ; [L49] int e_g ; [L50] int e_c ; [L51] int e_p_in ; [L52] int e_wl ; [L58] int d ; [L59] int data ; [L60] int processed ; [L61] static int t_b ; [L701] int __retres1 ; [L705] e_wl = 2 [L706] e_c = e_wl [L707] e_g = e_c [L708] e_f = e_g [L709] e_e = e_f [L710] wl_pc = 0 [L711] c1_pc = 0 [L712] c2_pc = 0 [L713] wb_pc = 0 [L714] wb_i = 1 [L715] c2_i = wb_i [L716] c1_i = c2_i [L717] wl_i = c1_i [L718] r_i = 0 [L719] c_req_up = 0 [L720] d = 0 [L721] c = 0 [L722] CALL start_simulation() [L412] int kernel_st ; [L415] kernel_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L416] COND FALSE !((int )c_req_up == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L427] COND TRUE (int )wl_i == 1 [L428] wl_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L432] COND TRUE (int )c1_i == 1 [L433] c1_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L437] COND TRUE (int )c2_i == 1 [L438] c2_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L442] COND TRUE (int )wb_i == 1 [L443] wb_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L447] COND FALSE !((int )r_i == 1) [L450] r_st = 2 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L452] COND FALSE !((int )e_f == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L457] COND FALSE !((int )e_g == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L462] COND FALSE !((int )e_e == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L467] COND FALSE !((int )e_c == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L472] COND FALSE !((int )e_wl == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L477] COND FALSE !((int )wl_pc == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L485] COND FALSE !((int )wl_pc == 2) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L495] COND FALSE !((int )c1_pc == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L504] COND FALSE !((int )c2_pc == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L513] COND FALSE !((int )wb_pc == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L522] COND FALSE !((int )e_c == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L527] COND FALSE !((int )e_e == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L532] COND FALSE !((int )e_f == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L537] COND FALSE !((int )e_g == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L542] COND FALSE !((int )e_c == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L547] COND FALSE !((int )e_wl == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L553] COND TRUE 1 [L556] kernel_st = 1 [L557] CALL eval() [L298] int tmp ; [L299] int tmp___0 ; [L300] int tmp___1 ; [L301] int tmp___2 ; [L302] int tmp___3 ; VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] Loop: [L306] COND TRUE 1 [L308] COND TRUE (int )wl_st == 0 [L329] COND TRUE (int )wl_st == 0 [L331] tmp = __VERIFIER_nondet_int() [L333] COND FALSE !(\read(tmp)) [L344] COND TRUE (int )c1_st == 0 [L346] tmp___0 = __VERIFIER_nondet_int() [L348] COND FALSE !(\read(tmp___0)) [L359] COND TRUE (int )c2_st == 0 [L361] tmp___1 = __VERIFIER_nondet_int() [L363] COND FALSE !(\read(tmp___1)) [L374] COND TRUE (int )wb_st == 0 [L376] tmp___2 = __VERIFIER_nondet_int() [L378] COND FALSE !(\read(tmp___2)) [L389] COND FALSE !((int )r_st == 0) End of lasso representation. - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 306]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L28] int c ; [L29] int c_t ; [L30] int c_req_up ; [L31] int p_in ; [L32] int p_out ; [L33] int wl_st ; [L34] int c1_st ; [L35] int c2_st ; [L36] int wb_st ; [L37] int r_st ; [L38] int wl_i ; [L39] int c1_i ; [L40] int c2_i ; [L41] int wb_i ; [L42] int r_i ; [L43] int wl_pc ; [L44] int c1_pc ; [L45] int c2_pc ; [L46] int wb_pc ; [L47] int e_e ; [L48] int e_f ; [L49] int e_g ; [L50] int e_c ; [L51] int e_p_in ; [L52] int e_wl ; [L58] int d ; [L59] int data ; [L60] int processed ; [L61] static int t_b ; [L701] int __retres1 ; [L705] e_wl = 2 [L706] e_c = e_wl [L707] e_g = e_c [L708] e_f = e_g [L709] e_e = e_f [L710] wl_pc = 0 [L711] c1_pc = 0 [L712] c2_pc = 0 [L713] wb_pc = 0 [L714] wb_i = 1 [L715] c2_i = wb_i [L716] c1_i = c2_i [L717] wl_i = c1_i [L718] r_i = 0 [L719] c_req_up = 0 [L720] d = 0 [L721] c = 0 [L722] CALL start_simulation() [L412] int kernel_st ; [L415] kernel_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L416] COND FALSE !((int )c_req_up == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L427] COND TRUE (int )wl_i == 1 [L428] wl_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L432] COND TRUE (int )c1_i == 1 [L433] c1_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L437] COND TRUE (int )c2_i == 1 [L438] c2_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L442] COND TRUE (int )wb_i == 1 [L443] wb_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L447] COND FALSE !((int )r_i == 1) [L450] r_st = 2 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L452] COND FALSE !((int )e_f == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L457] COND FALSE !((int )e_g == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L462] COND FALSE !((int )e_e == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L467] COND FALSE !((int )e_c == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L472] COND FALSE !((int )e_wl == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L477] COND FALSE !((int )wl_pc == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L485] COND FALSE !((int )wl_pc == 2) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L495] COND FALSE !((int )c1_pc == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L504] COND FALSE !((int )c2_pc == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L513] COND FALSE !((int )wb_pc == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L522] COND FALSE !((int )e_c == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L527] COND FALSE !((int )e_e == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L532] COND FALSE !((int )e_f == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L537] COND FALSE !((int )e_g == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L542] COND FALSE !((int )e_c == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L547] COND FALSE !((int )e_wl == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L553] COND TRUE 1 [L556] kernel_st = 1 [L557] CALL eval() [L298] int tmp ; [L299] int tmp___0 ; [L300] int tmp___1 ; [L301] int tmp___2 ; [L302] int tmp___3 ; VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] Loop: [L306] COND TRUE 1 [L308] COND TRUE (int )wl_st == 0 [L329] COND TRUE (int )wl_st == 0 [L331] tmp = __VERIFIER_nondet_int() [L333] COND FALSE !(\read(tmp)) [L344] COND TRUE (int )c1_st == 0 [L346] tmp___0 = __VERIFIER_nondet_int() [L348] COND FALSE !(\read(tmp___0)) [L359] COND TRUE (int )c2_st == 0 [L361] tmp___1 = __VERIFIER_nondet_int() [L363] COND FALSE !(\read(tmp___1)) [L374] COND TRUE (int )wb_st == 0 [L376] tmp___2 = __VERIFIER_nondet_int() [L378] COND FALSE !(\read(tmp___2)) [L389] COND FALSE !((int )r_st == 0) End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2025-02-08 14:52:19,874 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM)