./Ultimate.py --spec ../sv-benchmarks/c/properties/termination.prp --file ../sv-benchmarks/c/systemc/toy2.cil.c --full-output --architecture 32bit -------------------------------------------------------------------------------- Checking for termination Using default analysis Version 48c9605d Calling Ultimate with: /root/.sdkman/candidates/java/21.0.5-tem/bin/java -Dosgi.configuration.area=/storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/config -Xmx15G -Xms4m -jar /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/plugins/org.eclipse.equinox.launcher_1.6.800.v20240513-1750.jar -data @noDefault -ultimatedata /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data -tc /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/AutomizerTermination.xml -i ../sv-benchmarks/c/systemc/toy2.cil.c -s /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf --cacsl2boogietranslator.entry.function main --witnessprinter.witness.directory /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux --witnessprinter.witness.filename witness --witnessprinter.write.witness.besides.input.file false --witnessprinter.graph.data.specification CHECK( init(main()), LTL(F end) ) --witnessprinter.graph.data.producer Automizer --witnessprinter.graph.data.architecture 32bit --witnessprinter.graph.data.programhash a77d6f304c19846fdc8cd5bba9216d69953659ded966cffbf7faa285e2d864a4 --- Real Ultimate output --- This is Ultimate 0.3.0-?-48c9605-m [2025-02-08 14:52:15,679 INFO L188 SettingsManager]: Resetting all preferences to default values... [2025-02-08 14:52:15,729 INFO L114 SettingsManager]: Loading settings from /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/config/svcomp-Termination-32bit-Automizer_Default.epf [2025-02-08 14:52:15,733 WARN L101 SettingsManager]: Preference file contains the following unknown settings: [2025-02-08 14:52:15,733 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.core.Log level for class [2025-02-08 14:52:15,733 WARN L103 SettingsManager]: * de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder.Remove goto edges from RCFG [2025-02-08 14:52:15,757 INFO L130 SettingsManager]: Preferences different from defaults after loading the file: [2025-02-08 14:52:15,758 INFO L151 SettingsManager]: Preferences of UltimateCore differ from their defaults: [2025-02-08 14:52:15,759 INFO L153 SettingsManager]: * Log level for class=de.uni_freiburg.informatik.ultimate.lib.smtlibutils.quantifier.QuantifierPusher=ERROR; [2025-02-08 14:52:15,759 INFO L151 SettingsManager]: Preferences of Boogie Preprocessor differ from their defaults: [2025-02-08 14:52:15,759 INFO L153 SettingsManager]: * Use memory slicer=true [2025-02-08 14:52:15,760 INFO L151 SettingsManager]: Preferences of BlockEncodingV2 differ from their defaults: [2025-02-08 14:52:15,760 INFO L153 SettingsManager]: * Create parallel compositions if possible=false [2025-02-08 14:52:15,760 INFO L153 SettingsManager]: * Use SBE=true [2025-02-08 14:52:15,760 INFO L151 SettingsManager]: Preferences of BuchiAutomizer differ from their defaults: [2025-02-08 14:52:15,760 INFO L153 SettingsManager]: * NCSB implementation=INTSET_LAZY3 [2025-02-08 14:52:15,760 INFO L153 SettingsManager]: * Use old map elimination=false [2025-02-08 14:52:15,760 INFO L153 SettingsManager]: * Use external solver (rank synthesis)=false [2025-02-08 14:52:15,760 INFO L153 SettingsManager]: * Use only trivial implications for array writes=true [2025-02-08 14:52:15,760 INFO L153 SettingsManager]: * Rank analysis=LINEAR_WITH_GUESSES [2025-02-08 14:52:15,761 INFO L151 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2025-02-08 14:52:15,761 INFO L153 SettingsManager]: * Pointer base address is valid at dereference=ASSUME [2025-02-08 14:52:15,761 INFO L153 SettingsManager]: * sizeof long=4 [2025-02-08 14:52:15,761 INFO L153 SettingsManager]: * Overapproximate operations on floating types=true [2025-02-08 14:52:15,761 INFO L153 SettingsManager]: * sizeof POINTER=4 [2025-02-08 14:52:15,761 INFO L153 SettingsManager]: * Check division by zero=IGNORE [2025-02-08 14:52:15,761 INFO L153 SettingsManager]: * Pointer to allocated memory at dereference=ASSUME [2025-02-08 14:52:15,761 INFO L153 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=ASSUME [2025-02-08 14:52:15,761 INFO L153 SettingsManager]: * Check array bounds for arrays that are off heap=ASSUME [2025-02-08 14:52:15,761 INFO L153 SettingsManager]: * Check unreachability of reach_error function=false [2025-02-08 14:52:15,761 INFO L153 SettingsManager]: * sizeof long double=12 [2025-02-08 14:52:15,762 INFO L153 SettingsManager]: * Check if freed pointer was valid=false [2025-02-08 14:52:15,762 INFO L153 SettingsManager]: * Assume nondeterminstic values are in range=false [2025-02-08 14:52:15,762 INFO L153 SettingsManager]: * Behaviour of calls to undefined functions=OVERAPPROXIMATE_BEHAVIOUR [2025-02-08 14:52:15,762 INFO L153 SettingsManager]: * Use constant arrays=true [2025-02-08 14:52:15,762 INFO L151 SettingsManager]: Preferences of IcfgBuilder differ from their defaults: [2025-02-08 14:52:15,762 INFO L153 SettingsManager]: * Size of a code block=SequenceOfStatements [2025-02-08 14:52:15,762 INFO L151 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2025-02-08 14:52:15,762 INFO L153 SettingsManager]: * Trace refinement strategy=CAMEL [2025-02-08 14:52:15,762 INFO L151 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2025-02-08 14:52:15,763 INFO L153 SettingsManager]: * TransformationType=MODULO_NEIGHBOR Applying setting for plugin de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator: Entry function -> main Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness directory -> /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Witness filename -> witness Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Write witness besides input file -> false Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data specification -> CHECK( init(main()), LTL(F end) ) Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data producer -> Automizer Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data architecture -> 32bit Applying setting for plugin de.uni_freiburg.informatik.ultimate.witnessprinter: Graph data programhash -> a77d6f304c19846fdc8cd5bba9216d69953659ded966cffbf7faa285e2d864a4 [2025-02-08 14:52:16,005 INFO L75 nceAwareModelManager]: Repository-Root is: /tmp [2025-02-08 14:52:16,011 INFO L261 ainManager$Toolchain]: [Toolchain 1]: Applicable parser(s) successfully (re)initialized [2025-02-08 14:52:16,012 INFO L217 ainManager$Toolchain]: [Toolchain 1]: Toolchain selected. [2025-02-08 14:52:16,015 INFO L270 PluginConnector]: Initializing CDTParser... [2025-02-08 14:52:16,015 INFO L274 PluginConnector]: CDTParser initialized [2025-02-08 14:52:16,016 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/../sv-benchmarks/c/systemc/toy2.cil.c [2025-02-08 14:52:17,084 INFO L533 CDTParser]: Created temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/6ef9ba130/9ec92f6c583644bfb860f7e52824c2aa/FLAGdd8986da1 [2025-02-08 14:52:17,320 INFO L384 CDTParser]: Found 1 translation units. [2025-02-08 14:52:17,321 INFO L180 CDTParser]: Scanning /storage/repos/ultimate-jdk21/releaseScripts/default/sv-benchmarks/c/systemc/toy2.cil.c [2025-02-08 14:52:17,327 INFO L427 CDTParser]: About to delete temporary CDT project at /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/6ef9ba130/9ec92f6c583644bfb860f7e52824c2aa/FLAGdd8986da1 [2025-02-08 14:52:17,654 INFO L435 CDTParser]: Successfully deleted /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/data/6ef9ba130/9ec92f6c583644bfb860f7e52824c2aa [2025-02-08 14:52:17,656 INFO L299 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2025-02-08 14:52:17,658 INFO L133 ToolchainWalker]: Walking toolchain with 6 elements. [2025-02-08 14:52:17,659 INFO L112 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2025-02-08 14:52:17,659 INFO L270 PluginConnector]: Initializing CACSL2BoogieTranslator... [2025-02-08 14:52:17,662 INFO L274 PluginConnector]: CACSL2BoogieTranslator initialized [2025-02-08 14:52:17,663 INFO L184 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.02 02:52:17" (1/1) ... [2025-02-08 14:52:17,664 INFO L204 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7f460129 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:52:17, skipping insertion in model container [2025-02-08 14:52:17,664 INFO L184 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 08.02 02:52:17" (1/1) ... [2025-02-08 14:52:17,684 INFO L175 MainTranslator]: Built tables and reachable declarations [2025-02-08 14:52:17,822 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-08 14:52:17,837 INFO L200 MainTranslator]: Completed pre-run [2025-02-08 14:52:17,881 INFO L210 PostProcessor]: Analyzing one entry point: main [2025-02-08 14:52:17,900 INFO L204 MainTranslator]: Completed translation [2025-02-08 14:52:17,900 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:52:17 WrapperNode [2025-02-08 14:52:17,900 INFO L131 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2025-02-08 14:52:17,901 INFO L112 PluginConnector]: ------------------------Boogie Procedure Inliner---------------------------- [2025-02-08 14:52:17,901 INFO L270 PluginConnector]: Initializing Boogie Procedure Inliner... [2025-02-08 14:52:17,901 INFO L274 PluginConnector]: Boogie Procedure Inliner initialized [2025-02-08 14:52:17,905 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:52:17" (1/1) ... [2025-02-08 14:52:17,911 INFO L184 PluginConnector]: Executing the observer Inliner from plugin Boogie Procedure Inliner for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:52:17" (1/1) ... [2025-02-08 14:52:17,931 INFO L138 Inliner]: procedures = 20, calls = 16, calls flagged for inlining = 11, calls inlined = 11, statements flattened = 343 [2025-02-08 14:52:17,934 INFO L131 PluginConnector]: ------------------------ END Boogie Procedure Inliner---------------------------- [2025-02-08 14:52:17,934 INFO L112 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2025-02-08 14:52:17,935 INFO L270 PluginConnector]: Initializing Boogie Preprocessor... [2025-02-08 14:52:17,935 INFO L274 PluginConnector]: Boogie Preprocessor initialized [2025-02-08 14:52:17,941 INFO L184 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:52:17" (1/1) ... [2025-02-08 14:52:17,942 INFO L184 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:52:17" (1/1) ... [2025-02-08 14:52:17,947 INFO L184 PluginConnector]: Executing the observer MemorySlicer from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:52:17" (1/1) ... [2025-02-08 14:52:17,963 INFO L175 MemorySlicer]: Split 2 memory accesses to 1 slices as follows [2]. 100 percent of accesses are in the largest equivalence class. The 2 initializations are split as follows [2]. The 0 writes are split as follows [0]. [2025-02-08 14:52:17,966 INFO L184 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:52:17" (1/1) ... [2025-02-08 14:52:17,967 INFO L184 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:52:17" (1/1) ... [2025-02-08 14:52:17,970 INFO L184 PluginConnector]: Executing the observer ReplaceArrayAssignments from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:52:17" (1/1) ... [2025-02-08 14:52:17,973 INFO L184 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:52:17" (1/1) ... [2025-02-08 14:52:17,974 INFO L184 PluginConnector]: Executing the observer LTLStepAnnotator from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:52:17" (1/1) ... [2025-02-08 14:52:17,975 INFO L184 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:52:17" (1/1) ... [2025-02-08 14:52:17,979 INFO L131 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2025-02-08 14:52:17,980 INFO L112 PluginConnector]: ------------------------IcfgBuilder---------------------------- [2025-02-08 14:52:17,980 INFO L270 PluginConnector]: Initializing IcfgBuilder... [2025-02-08 14:52:17,980 INFO L274 PluginConnector]: IcfgBuilder initialized [2025-02-08 14:52:17,981 INFO L184 PluginConnector]: Executing the observer IcfgBuilderObserver from plugin IcfgBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:52:17" (1/1) ... [2025-02-08 14:52:17,989 INFO L173 SolverBuilder]: Constructing external solver with command: z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 [2025-02-08 14:52:18,000 INFO L189 MonitoredProcess]: No working directory specified, using /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 [2025-02-08 14:52:18,011 INFO L229 MonitoredProcess]: Starting monitored process 1 with /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (exit command is (exit), workingDir is null) [2025-02-08 14:52:18,013 INFO L327 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Waiting until timeout for monitored process [2025-02-08 14:52:18,029 INFO L130 BoogieDeclarations]: Found specification of procedure #Ultimate.allocInit [2025-02-08 14:52:18,029 INFO L130 BoogieDeclarations]: Found specification of procedure write~init~int#0 [2025-02-08 14:52:18,029 INFO L130 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2025-02-08 14:52:18,029 INFO L138 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2025-02-08 14:52:18,075 INFO L257 CfgBuilder]: Building ICFG [2025-02-08 14:52:18,076 INFO L287 CfgBuilder]: Building CFG for each procedure with an implementation [2025-02-08 14:52:18,358 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L159: assume 1 == ~e_g~0;~wb_st~0 := 0; [2025-02-08 14:52:18,358 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L159: assume !(1 == ~e_g~0); [2025-02-08 14:52:18,358 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L93: assume 1 == ~c1_pc~0; [2025-02-08 14:52:18,358 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L93: assume !(1 == ~c1_pc~0); [2025-02-08 14:52:18,358 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L663: assume 0 == ~c1_st~0; [2025-02-08 14:52:18,358 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L663: assume !(0 == ~c1_st~0); [2025-02-08 14:52:18,358 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L630: assume 1 == ~e_c~0;~r_st~0 := 0; [2025-02-08 14:52:18,358 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L630: assume !(1 == ~e_c~0); [2025-02-08 14:52:18,358 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L118: write_loop_~t~0#1 := ~t_b~0; [2025-02-08 14:52:18,358 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L655: assume 1 == ~e_wl~0;~e_wl~0 := 2; [2025-02-08 14:52:18,359 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L655: assume !(1 == ~e_wl~0); [2025-02-08 14:52:18,359 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L622: assume 1 == ~e_g~0;~wb_st~0 := 0; [2025-02-08 14:52:18,359 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L622: assume !(1 == ~e_g~0); [2025-02-08 14:52:18,359 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L102: assume 1 == ~c2_pc~0; [2025-02-08 14:52:18,359 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L102: assume !(1 == ~c2_pc~0); [2025-02-08 14:52:18,359 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L548: assume 1 == ~c_req_up~0; [2025-02-08 14:52:18,359 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L548: assume !(1 == ~c_req_up~0); [2025-02-08 14:52:18,359 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L672: assume 0 == ~r_st~0; [2025-02-08 14:52:18,359 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L672: assume !(0 == ~r_st~0); [2025-02-08 14:52:18,359 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L94: assume 1 == ~e_f~0;~c1_st~0 := 0; [2025-02-08 14:52:18,359 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L94: assume !(1 == ~e_f~0); [2025-02-08 14:52:18,359 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L119: assume ~d~0 == 1 + write_loop_~t~0#1; [2025-02-08 14:52:18,359 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L119: assume !(~d~0 == 1 + write_loop_~t~0#1);assume { :begin_inline_error } true;assume { :begin_inline_reach_error } true;assume false;assume { :end_inline_reach_error } true;assume false; [2025-02-08 14:52:18,359 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L565: assume 0 == ~e_g~0;~e_g~0 := 1; [2025-02-08 14:52:18,359 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L565: assume !(0 == ~e_g~0); [2025-02-08 14:52:18,359 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L111: ~e_f~0 := 2;~wl_st~0 := 2;~wl_pc~0 := 2;~t_b~0 := write_loop_~t~0#1; [2025-02-08 14:52:18,359 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L103: assume 1 == ~e_f~0;~c2_st~0 := 0; [2025-02-08 14:52:18,359 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L103: assume !(1 == ~e_f~0); [2025-02-08 14:52:18,359 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L549: assume ~c~0 != ~c_t~0;~c~0 := ~c_t~0;~e_c~0 := 0; [2025-02-08 14:52:18,359 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L549: assume !(~c~0 != ~c_t~0); [2025-02-08 14:52:18,359 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L640: assume 1 == ~e_f~0;~e_f~0 := 2; [2025-02-08 14:52:18,359 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L640: assume !(1 == ~e_f~0); [2025-02-08 14:52:18,359 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L384: assume { :end_inline_read } true; [2025-02-08 14:52:18,359 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L87: assume true;write_loop_~t~0#1 := ~d~0;~data~0 := ~d~0;~processed~0 := 0;~e_f~0 := 1; [2025-02-08 14:52:18,360 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L87: assume !true; [2025-02-08 14:52:18,360 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L203: assume 1 == ~wb_pc~0; [2025-02-08 14:52:18,360 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L203: assume !(1 == ~wb_pc~0); [2025-02-08 14:52:18,360 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L575: assume 0 == ~e_c~0;~e_c~0 := 1; [2025-02-08 14:52:18,360 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L575: assume !(0 == ~e_c~0); [2025-02-08 14:52:18,360 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L666: assume 0 == ~c2_st~0; [2025-02-08 14:52:18,360 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L666: assume !(0 == ~c2_st~0); [2025-02-08 14:52:18,360 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L245: ~c_t~0 := ~data~0;~c_req_up~0 := 1;~processed~0 := 1; [2025-02-08 14:52:18,360 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L212: ~e_g~0 := 2; [2025-02-08 14:52:18,360 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L369: assume { :end_inline_write_back } true; [2025-02-08 14:52:18,360 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L559: start_simulation_~kernel_st~0#1 := 3; [2025-02-08 14:52:18,360 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L204: assume 1 == ~e_g~0;~wb_st~0 := 0; [2025-02-08 14:52:18,360 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L204: assume !(1 == ~e_g~0); [2025-02-08 14:52:18,360 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L650: assume 1 == ~e_c~0;~e_c~0 := 2; [2025-02-08 14:52:18,360 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L650: assume !(1 == ~e_c~0); [2025-02-08 14:52:18,360 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L155: assume 0 == ~processed~0;~data~0 := 1 + ~data~0;~e_g~0 := 1; [2025-02-08 14:52:18,360 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L155: assume !(0 == ~processed~0); [2025-02-08 14:52:18,360 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L593: assume 2 == ~wl_pc~0; [2025-02-08 14:52:18,360 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L593: assume !(2 == ~wl_pc~0); [2025-02-08 14:52:18,360 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L560: assume 0 == ~e_f~0;~e_f~0 := 1; [2025-02-08 14:52:18,360 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L560: assume !(0 == ~e_f~0); [2025-02-08 14:52:18,362 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L585: assume 1 == ~wl_pc~0; [2025-02-08 14:52:18,362 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L585: assume !(1 == ~wl_pc~0); [2025-02-08 14:52:18,362 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L354: assume { :end_inline_compute2 } true; [2025-02-08 14:52:18,362 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L635: assume 1 == ~e_e~0;~e_e~0 := 2; [2025-02-08 14:52:18,362 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L635: assume !(1 == ~e_e~0); [2025-02-08 14:52:18,362 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L123: assume { :end_inline_error } true; [2025-02-08 14:52:18,362 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L660: assume 0 == ~wl_st~0; [2025-02-08 14:52:18,362 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L660: assume !(0 == ~wl_st~0); [2025-02-08 14:52:18,362 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L594: assume 1 == ~e_e~0;~wl_st~0 := 0; [2025-02-08 14:52:18,362 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L594: assume !(1 == ~e_e~0); [2025-02-08 14:52:18,363 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L586: assume 1 == ~e_wl~0;~wl_st~0 := 0; [2025-02-08 14:52:18,363 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L586: assume !(1 == ~e_wl~0); [2025-02-08 14:52:18,363 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L545: havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;assume { :end_inline_eval } true;start_simulation_~kernel_st~0#1 := 2; [2025-02-08 14:52:18,363 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L669: assume 0 == ~wb_st~0; [2025-02-08 14:52:18,363 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L669: assume !(0 == ~wb_st~0); [2025-02-08 14:52:18,366 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L603: assume 1 == ~c1_pc~0; [2025-02-08 14:52:18,366 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L603: assume !(1 == ~c1_pc~0); [2025-02-08 14:52:18,366 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L570: assume 0 == ~e_e~0;~e_e~0 := 1; [2025-02-08 14:52:18,366 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L570: assume !(0 == ~e_e~0); [2025-02-08 14:52:18,366 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L339: assume { :end_inline_compute1 } true; [2025-02-08 14:52:18,366 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L645: assume 1 == ~e_g~0;~e_g~0 := 2; [2025-02-08 14:52:18,367 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L645: assume !(1 == ~e_g~0); [2025-02-08 14:52:18,367 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L612: assume 1 == ~c2_pc~0; [2025-02-08 14:52:18,367 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L612: assume !(1 == ~c2_pc~0); [2025-02-08 14:52:18,367 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L158: assume 1 == ~wb_pc~0; [2025-02-08 14:52:18,367 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L158: assume !(1 == ~wb_pc~0); [2025-02-08 14:52:18,367 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L604: assume 1 == ~e_f~0;~c1_st~0 := 0; [2025-02-08 14:52:18,367 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L604: assume !(1 == ~e_f~0); [2025-02-08 14:52:18,367 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L621: assume 1 == ~wb_pc~0; [2025-02-08 14:52:18,367 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L621: assume !(1 == ~wb_pc~0); [2025-02-08 14:52:18,367 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L555: ~c_req_up~0 := 0; [2025-02-08 14:52:18,367 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L200: assume 0 == ~processed~0;~data~0 := 1 + ~data~0;~e_g~0 := 1; [2025-02-08 14:52:18,367 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L200: assume !(0 == ~processed~0); [2025-02-08 14:52:18,367 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L167: ~e_g~0 := 2; [2025-02-08 14:52:18,367 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L613: assume 1 == ~e_f~0;~c2_st~0 := 0; [2025-02-08 14:52:18,367 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L613: assume !(1 == ~e_f~0); [2025-02-08 14:52:18,367 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L580: assume 0 == ~e_wl~0;~e_wl~0 := 1; [2025-02-08 14:52:18,367 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L580: assume !(0 == ~e_wl~0); [2025-02-08 14:52:18,367 INFO L1324 $ProcedureCfgBuilder]: dead code at ProgramPoint L324: havoc write_loop_~t~0#1;assume { :end_inline_write_loop } true; [2025-02-08 14:52:18,380 INFO L? ?]: Removed 12 outVars from TransFormulas that were not future-live. [2025-02-08 14:52:18,380 INFO L308 CfgBuilder]: Performing block encoding [2025-02-08 14:52:18,387 INFO L332 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2025-02-08 14:52:18,387 INFO L337 CfgBuilder]: Removed 0 assume(true) statements. [2025-02-08 14:52:18,387 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 08.02 02:52:18 BoogieIcfgContainer [2025-02-08 14:52:18,388 INFO L131 PluginConnector]: ------------------------ END IcfgBuilder---------------------------- [2025-02-08 14:52:18,388 INFO L112 PluginConnector]: ------------------------BuchiAutomizer---------------------------- [2025-02-08 14:52:18,389 INFO L270 PluginConnector]: Initializing BuchiAutomizer... [2025-02-08 14:52:18,393 INFO L274 PluginConnector]: BuchiAutomizer initialized [2025-02-08 14:52:18,393 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-08 14:52:18,393 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "CDTParser AST 08.02 02:52:17" (1/3) ... [2025-02-08 14:52:18,394 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@1a703aa and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 08.02 02:52:18, skipping insertion in model container [2025-02-08 14:52:18,394 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-08 14:52:18,394 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 08.02 02:52:17" (2/3) ... [2025-02-08 14:52:18,394 INFO L204 PluginConnector]: Invalid model from BuchiAutomizer for observer de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer.BuchiAutomizerObserver@1a703aa and model type de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer AST 08.02 02:52:18, skipping insertion in model container [2025-02-08 14:52:18,394 INFO L99 BuchiAutomizer]: Safety of program was proven or not checked, starting termination analysis [2025-02-08 14:52:18,394 INFO L184 PluginConnector]: Executing the observer BuchiAutomizerObserver from plugin BuchiAutomizer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 08.02 02:52:18" (3/3) ... [2025-02-08 14:52:18,395 INFO L363 chiAutomizerObserver]: Analyzing ICFG toy2.cil.c [2025-02-08 14:52:18,430 INFO L306 stractBuchiCegarLoop]: Interprodecural is true [2025-02-08 14:52:18,430 INFO L307 stractBuchiCegarLoop]: Hoare is None [2025-02-08 14:52:18,430 INFO L308 stractBuchiCegarLoop]: Compute interpolants for ForwardPredicates [2025-02-08 14:52:18,430 INFO L309 stractBuchiCegarLoop]: Backedges is STRAIGHT_LINE [2025-02-08 14:52:18,430 INFO L310 stractBuchiCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2025-02-08 14:52:18,430 INFO L311 stractBuchiCegarLoop]: Difference is false [2025-02-08 14:52:18,430 INFO L312 stractBuchiCegarLoop]: Minimize is MINIMIZE_SEVPA [2025-02-08 14:52:18,430 INFO L316 stractBuchiCegarLoop]: ======== Iteration 0 == of CEGAR loop == BuchiAutomatonCegarLoop ======== [2025-02-08 14:52:18,434 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 87 states, 65 states have (on average 1.9384615384615385) internal successors, (126), 86 states have internal predecessors, (126), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:18,447 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 16 [2025-02-08 14:52:18,447 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:52:18,447 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:52:18,452 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:18,452 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:18,453 INFO L338 stractBuchiCegarLoop]: ======== Iteration 1 ============ [2025-02-08 14:52:18,454 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand has 87 states, 65 states have (on average 1.9384615384615385) internal successors, (126), 86 states have internal predecessors, (126), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:18,459 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 16 [2025-02-08 14:52:18,460 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:52:18,460 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:52:18,461 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:18,461 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:18,465 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);call #Ultimate.allocInit(12, 3);~c~0 := 0;~c_t~0 := 0;~c_req_up~0 := 0;~p_in~0 := 0;~p_out~0 := 0;~wl_st~0 := 0;~c1_st~0 := 0;~c2_st~0 := 0;~wb_st~0 := 0;~r_st~0 := 0;~wl_i~0 := 0;~c1_i~0 := 0;~c2_i~0 := 0;~wb_i~0 := 0;~r_i~0 := 0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~e_e~0 := 0;~e_f~0 := 0;~e_g~0 := 0;~e_c~0 := 0;~e_p_in~0 := 0;~e_wl~0 := 0;~d~0 := 0;~data~0 := 0;~processed~0 := 0;~t_b~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~__retres1~0#1;havoc main_~__retres1~0#1;~e_wl~0 := 2;~e_c~0 := ~e_wl~0;~e_g~0 := ~e_c~0;~e_f~0 := ~e_g~0;~e_e~0 := ~e_f~0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~wb_i~0 := 1;~c2_i~0 := ~wb_i~0;~c1_i~0 := ~c2_i~0;~wl_i~0 := ~c1_i~0;~r_i~0 := 0;~c_req_up~0 := 0;~d~0 := 0;~c~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~c_req_up~0);" "assume 1 == ~wl_i~0;~wl_st~0 := 0;" "assume !(1 == ~c1_i~0);~c1_st~0 := 2;" "assume !(1 == ~c2_i~0);~c2_st~0 := 2;" "assume !(1 == ~wb_i~0);~wb_st~0 := 2;" "assume !(1 == ~r_i~0);~r_st~0 := 2;" "assume !(0 == ~e_f~0);" "assume !(0 == ~e_g~0);" "assume !(0 == ~e_e~0);" "assume 0 == ~e_c~0;~e_c~0 := 1;" "assume !(0 == ~e_wl~0);" "assume 1 == ~wl_pc~0;" "assume 1 == ~e_wl~0;~wl_st~0 := 0;" "assume !(1 == ~c1_pc~0);" "assume !(1 == ~c2_pc~0);" "assume !(1 == ~wb_pc~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_e~0);" "assume !(1 == ~e_f~0);" "assume !(1 == ~e_g~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_wl~0);" "assume true;start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" [2025-02-08 14:52:18,465 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "assume 0 == ~wl_st~0;" "assume !(0 == ~wl_st~0);" "assume !(0 == ~c1_st~0);" "assume !(0 == ~c2_st~0);" "assume !(0 == ~wb_st~0);" "assume !(0 == ~r_st~0);" [2025-02-08 14:52:18,469 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:18,469 INFO L85 PathProgramCache]: Analyzing trace with hash -412606493, now seen corresponding path program 1 times [2025-02-08 14:52:18,474 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:18,474 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [451440129] [2025-02-08 14:52:18,475 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:52:18,475 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:18,524 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 24 statements into 1 equivalence classes. [2025-02-08 14:52:18,544 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 24 of 24 statements. [2025-02-08 14:52:18,545 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:18,545 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:52:18,676 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:52:18,677 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:52:18,677 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [451440129] [2025-02-08 14:52:18,678 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [451440129] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:52:18,678 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:52:18,678 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-02-08 14:52:18,679 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1531752318] [2025-02-08 14:52:18,680 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:52:18,682 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-08 14:52:18,683 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:18,683 INFO L85 PathProgramCache]: Analyzing trace with hash -464571128, now seen corresponding path program 1 times [2025-02-08 14:52:18,684 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:18,684 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [306575336] [2025-02-08 14:52:18,684 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:52:18,684 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:18,687 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 7 statements into 1 equivalence classes. [2025-02-08 14:52:18,688 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 7 of 7 statements. [2025-02-08 14:52:18,689 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:18,689 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:52:18,707 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:52:18,708 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:52:18,708 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [306575336] [2025-02-08 14:52:18,708 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [306575336] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:52:18,708 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:52:18,708 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-08 14:52:18,708 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1581115038] [2025-02-08 14:52:18,708 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:52:18,709 INFO L769 eck$LassoCheckResult]: loop already infeasible [2025-02-08 14:52:18,710 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:52:18,728 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-08 14:52:18,728 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-08 14:52:18,730 INFO L87 Difference]: Start difference. First operand has 87 states, 65 states have (on average 1.9384615384615385) internal successors, (126), 86 states have internal predecessors, (126), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) Second operand has 3 states, 3 states have (on average 2.3333333333333335) internal successors, (7), 3 states have internal predecessors, (7), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:18,777 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:52:18,779 INFO L93 Difference]: Finished difference Result 144 states and 214 transitions. [2025-02-08 14:52:18,781 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 144 states and 214 transitions. [2025-02-08 14:52:18,786 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 27 [2025-02-08 14:52:18,793 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 144 states to 84 states and 148 transitions. [2025-02-08 14:52:18,793 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 84 [2025-02-08 14:52:18,794 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 84 [2025-02-08 14:52:18,794 INFO L73 IsDeterministic]: Start isDeterministic. Operand 84 states and 148 transitions. [2025-02-08 14:52:18,796 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:52:18,796 INFO L218 hiAutomatonCegarLoop]: Abstraction has 84 states and 148 transitions. [2025-02-08 14:52:18,805 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states and 148 transitions. [2025-02-08 14:52:18,817 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 83. [2025-02-08 14:52:18,818 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 83 states, 83 states have (on average 1.7710843373493976) internal successors, (147), 82 states have internal predecessors, (147), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:18,820 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 147 transitions. [2025-02-08 14:52:18,821 INFO L240 hiAutomatonCegarLoop]: Abstraction has 83 states and 147 transitions. [2025-02-08 14:52:18,823 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-08 14:52:18,825 INFO L432 stractBuchiCegarLoop]: Abstraction has 83 states and 147 transitions. [2025-02-08 14:52:18,825 INFO L338 stractBuchiCegarLoop]: ======== Iteration 2 ============ [2025-02-08 14:52:18,826 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 83 states and 147 transitions. [2025-02-08 14:52:18,828 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 27 [2025-02-08 14:52:18,829 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:52:18,829 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:52:18,829 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:18,829 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:18,829 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);call #Ultimate.allocInit(12, 3);~c~0 := 0;~c_t~0 := 0;~c_req_up~0 := 0;~p_in~0 := 0;~p_out~0 := 0;~wl_st~0 := 0;~c1_st~0 := 0;~c2_st~0 := 0;~wb_st~0 := 0;~r_st~0 := 0;~wl_i~0 := 0;~c1_i~0 := 0;~c2_i~0 := 0;~wb_i~0 := 0;~r_i~0 := 0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~e_e~0 := 0;~e_f~0 := 0;~e_g~0 := 0;~e_c~0 := 0;~e_p_in~0 := 0;~e_wl~0 := 0;~d~0 := 0;~data~0 := 0;~processed~0 := 0;~t_b~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~__retres1~0#1;havoc main_~__retres1~0#1;~e_wl~0 := 2;~e_c~0 := ~e_wl~0;~e_g~0 := ~e_c~0;~e_f~0 := ~e_g~0;~e_e~0 := ~e_f~0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~wb_i~0 := 1;~c2_i~0 := ~wb_i~0;~c1_i~0 := ~c2_i~0;~wl_i~0 := ~c1_i~0;~r_i~0 := 0;~c_req_up~0 := 0;~d~0 := 0;~c~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~c_req_up~0);" "assume !(1 == ~wl_i~0);~wl_st~0 := 2;" "assume !(1 == ~c1_i~0);~c1_st~0 := 2;" "assume !(1 == ~c2_i~0);~c2_st~0 := 2;" "assume !(1 == ~wb_i~0);~wb_st~0 := 2;" "assume !(1 == ~r_i~0);~r_st~0 := 2;" "assume !(0 == ~e_f~0);" "assume !(0 == ~e_g~0);" "assume !(0 == ~e_e~0);" "assume 0 == ~e_c~0;~e_c~0 := 1;" "assume !(0 == ~e_wl~0);" "assume 1 == ~wl_pc~0;" "assume 1 == ~e_wl~0;~wl_st~0 := 0;" "assume !(1 == ~c1_pc~0);" "assume !(1 == ~c2_pc~0);" "assume !(1 == ~wb_pc~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_e~0);" "assume !(1 == ~e_f~0);" "assume !(1 == ~e_g~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_wl~0);" "assume true;start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" [2025-02-08 14:52:18,829 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "assume 0 == ~wl_st~0;" "assume 0 == ~wl_st~0;havoc eval_#t~nondet4#1;eval_~tmp~0#1 := eval_#t~nondet4#1;havoc eval_#t~nondet4#1;" "assume !(0 != eval_~tmp~0#1);" "assume !(0 == ~c1_st~0);" "assume !(0 == ~c2_st~0);" "assume !(0 == ~wb_st~0);" "assume !(0 == ~r_st~0);" [2025-02-08 14:52:18,830 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:18,830 INFO L85 PathProgramCache]: Analyzing trace with hash 1844304514, now seen corresponding path program 1 times [2025-02-08 14:52:18,830 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:18,830 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1067613986] [2025-02-08 14:52:18,830 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:52:18,830 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:18,838 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 24 statements into 1 equivalence classes. [2025-02-08 14:52:18,847 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 24 of 24 statements. [2025-02-08 14:52:18,848 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:18,848 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:52:18,933 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:52:18,933 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:52:18,933 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1067613986] [2025-02-08 14:52:18,933 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1067613986] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:52:18,933 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:52:18,933 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-02-08 14:52:18,933 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1012168934] [2025-02-08 14:52:18,933 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:52:18,934 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-08 14:52:18,934 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:18,934 INFO L85 PathProgramCache]: Analyzing trace with hash -1514278920, now seen corresponding path program 1 times [2025-02-08 14:52:18,934 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:18,934 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1243426074] [2025-02-08 14:52:18,934 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:52:18,934 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:18,936 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 8 statements into 1 equivalence classes. [2025-02-08 14:52:18,939 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-02-08 14:52:18,939 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:18,940 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:18,940 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:52:18,941 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 8 statements into 1 equivalence classes. [2025-02-08 14:52:18,943 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-02-08 14:52:18,943 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:18,943 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:18,956 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:52:18,999 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:52:19,000 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-08 14:52:19,000 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-08 14:52:19,000 INFO L87 Difference]: Start difference. First operand 83 states and 147 transitions. cyclomatic complexity: 66 Second operand has 3 states, 3 states have (on average 8.0) internal successors, (24), 2 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:19,007 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:52:19,007 INFO L93 Difference]: Finished difference Result 43 states and 73 transitions. [2025-02-08 14:52:19,007 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 43 states and 73 transitions. [2025-02-08 14:52:19,009 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 12 [2025-02-08 14:52:19,009 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 43 states to 43 states and 73 transitions. [2025-02-08 14:52:19,009 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 43 [2025-02-08 14:52:19,009 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 43 [2025-02-08 14:52:19,009 INFO L73 IsDeterministic]: Start isDeterministic. Operand 43 states and 73 transitions. [2025-02-08 14:52:19,009 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:52:19,009 INFO L218 hiAutomatonCegarLoop]: Abstraction has 43 states and 73 transitions. [2025-02-08 14:52:19,010 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states and 73 transitions. [2025-02-08 14:52:19,010 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 43. [2025-02-08 14:52:19,011 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 43 states have (on average 1.697674418604651) internal successors, (73), 42 states have internal predecessors, (73), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:19,011 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 73 transitions. [2025-02-08 14:52:19,011 INFO L240 hiAutomatonCegarLoop]: Abstraction has 43 states and 73 transitions. [2025-02-08 14:52:19,012 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-08 14:52:19,013 INFO L432 stractBuchiCegarLoop]: Abstraction has 43 states and 73 transitions. [2025-02-08 14:52:19,013 INFO L338 stractBuchiCegarLoop]: ======== Iteration 3 ============ [2025-02-08 14:52:19,013 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 43 states and 73 transitions. [2025-02-08 14:52:19,013 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 12 [2025-02-08 14:52:19,014 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:52:19,014 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:52:19,014 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:19,014 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:19,014 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);call #Ultimate.allocInit(12, 3);~c~0 := 0;~c_t~0 := 0;~c_req_up~0 := 0;~p_in~0 := 0;~p_out~0 := 0;~wl_st~0 := 0;~c1_st~0 := 0;~c2_st~0 := 0;~wb_st~0 := 0;~r_st~0 := 0;~wl_i~0 := 0;~c1_i~0 := 0;~c2_i~0 := 0;~wb_i~0 := 0;~r_i~0 := 0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~e_e~0 := 0;~e_f~0 := 0;~e_g~0 := 0;~e_c~0 := 0;~e_p_in~0 := 0;~e_wl~0 := 0;~d~0 := 0;~data~0 := 0;~processed~0 := 0;~t_b~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~__retres1~0#1;havoc main_~__retres1~0#1;~e_wl~0 := 2;~e_c~0 := ~e_wl~0;~e_g~0 := ~e_c~0;~e_f~0 := ~e_g~0;~e_e~0 := ~e_f~0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~wb_i~0 := 1;~c2_i~0 := ~wb_i~0;~c1_i~0 := ~c2_i~0;~wl_i~0 := ~c1_i~0;~r_i~0 := 0;~c_req_up~0 := 0;~d~0 := 0;~c~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~c_req_up~0);" "assume 1 == ~wl_i~0;~wl_st~0 := 0;" "assume !(1 == ~c1_i~0);~c1_st~0 := 2;" "assume !(1 == ~c2_i~0);~c2_st~0 := 2;" "assume !(1 == ~wb_i~0);~wb_st~0 := 2;" "assume !(1 == ~r_i~0);~r_st~0 := 2;" "assume !(0 == ~e_f~0);" "assume !(0 == ~e_g~0);" "assume !(0 == ~e_e~0);" "assume 0 == ~e_c~0;~e_c~0 := 1;" "assume !(0 == ~e_wl~0);" "assume 1 == ~wl_pc~0;" "assume 1 == ~e_wl~0;~wl_st~0 := 0;" "assume !(1 == ~c1_pc~0);" "assume !(1 == ~c2_pc~0);" "assume !(1 == ~wb_pc~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_e~0);" "assume !(1 == ~e_f~0);" "assume !(1 == ~e_g~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_wl~0);" "assume true;start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" [2025-02-08 14:52:19,014 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "assume 0 == ~wl_st~0;" "assume 0 == ~wl_st~0;havoc eval_#t~nondet4#1;eval_~tmp~0#1 := eval_#t~nondet4#1;havoc eval_#t~nondet4#1;" "assume !(0 != eval_~tmp~0#1);" "assume !(0 == ~c1_st~0);" "assume !(0 == ~c2_st~0);" "assume !(0 == ~wb_st~0);" "assume !(0 == ~r_st~0);" [2025-02-08 14:52:19,016 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:19,016 INFO L85 PathProgramCache]: Analyzing trace with hash -412606493, now seen corresponding path program 2 times [2025-02-08 14:52:19,016 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:19,016 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [571367291] [2025-02-08 14:52:19,016 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-08 14:52:19,016 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:19,026 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 24 statements into 1 equivalence classes. [2025-02-08 14:52:19,031 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 24 of 24 statements. [2025-02-08 14:52:19,032 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-08 14:52:19,032 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:52:19,080 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:52:19,080 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:52:19,080 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [571367291] [2025-02-08 14:52:19,081 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [571367291] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:52:19,081 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:52:19,081 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-02-08 14:52:19,081 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1199739403] [2025-02-08 14:52:19,081 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:52:19,081 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-08 14:52:19,081 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:19,081 INFO L85 PathProgramCache]: Analyzing trace with hash -1514278920, now seen corresponding path program 2 times [2025-02-08 14:52:19,082 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:19,082 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1202519619] [2025-02-08 14:52:19,082 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-08 14:52:19,082 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:19,084 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 8 statements into 1 equivalence classes. [2025-02-08 14:52:19,085 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-02-08 14:52:19,085 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-08 14:52:19,085 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:19,085 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:52:19,086 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 8 statements into 1 equivalence classes. [2025-02-08 14:52:19,086 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-02-08 14:52:19,086 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:19,086 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:19,088 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:52:19,113 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:52:19,114 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-08 14:52:19,114 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-08 14:52:19,114 INFO L87 Difference]: Start difference. First operand 43 states and 73 transitions. cyclomatic complexity: 31 Second operand has 3 states, 3 states have (on average 8.0) internal successors, (24), 2 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:19,118 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:52:19,118 INFO L93 Difference]: Finished difference Result 43 states and 72 transitions. [2025-02-08 14:52:19,118 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 43 states and 72 transitions. [2025-02-08 14:52:19,118 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 12 [2025-02-08 14:52:19,119 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 43 states to 43 states and 72 transitions. [2025-02-08 14:52:19,119 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 43 [2025-02-08 14:52:19,119 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 43 [2025-02-08 14:52:19,119 INFO L73 IsDeterministic]: Start isDeterministic. Operand 43 states and 72 transitions. [2025-02-08 14:52:19,119 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:52:19,119 INFO L218 hiAutomatonCegarLoop]: Abstraction has 43 states and 72 transitions. [2025-02-08 14:52:19,119 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states and 72 transitions. [2025-02-08 14:52:19,120 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 43. [2025-02-08 14:52:19,121 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 43 states have (on average 1.6744186046511629) internal successors, (72), 42 states have internal predecessors, (72), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:19,122 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 72 transitions. [2025-02-08 14:52:19,122 INFO L240 hiAutomatonCegarLoop]: Abstraction has 43 states and 72 transitions. [2025-02-08 14:52:19,122 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-08 14:52:19,124 INFO L432 stractBuchiCegarLoop]: Abstraction has 43 states and 72 transitions. [2025-02-08 14:52:19,124 INFO L338 stractBuchiCegarLoop]: ======== Iteration 4 ============ [2025-02-08 14:52:19,124 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 43 states and 72 transitions. [2025-02-08 14:52:19,124 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 12 [2025-02-08 14:52:19,124 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:52:19,124 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:52:19,125 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:19,125 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:19,125 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);call #Ultimate.allocInit(12, 3);~c~0 := 0;~c_t~0 := 0;~c_req_up~0 := 0;~p_in~0 := 0;~p_out~0 := 0;~wl_st~0 := 0;~c1_st~0 := 0;~c2_st~0 := 0;~wb_st~0 := 0;~r_st~0 := 0;~wl_i~0 := 0;~c1_i~0 := 0;~c2_i~0 := 0;~wb_i~0 := 0;~r_i~0 := 0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~e_e~0 := 0;~e_f~0 := 0;~e_g~0 := 0;~e_c~0 := 0;~e_p_in~0 := 0;~e_wl~0 := 0;~d~0 := 0;~data~0 := 0;~processed~0 := 0;~t_b~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~__retres1~0#1;havoc main_~__retres1~0#1;~e_wl~0 := 2;~e_c~0 := ~e_wl~0;~e_g~0 := ~e_c~0;~e_f~0 := ~e_g~0;~e_e~0 := ~e_f~0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~wb_i~0 := 1;~c2_i~0 := ~wb_i~0;~c1_i~0 := ~c2_i~0;~wl_i~0 := ~c1_i~0;~r_i~0 := 0;~c_req_up~0 := 0;~d~0 := 0;~c~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~c_req_up~0);" "assume 1 == ~wl_i~0;~wl_st~0 := 0;" "assume 1 == ~c1_i~0;~c1_st~0 := 0;" "assume !(1 == ~c2_i~0);~c2_st~0 := 2;" "assume !(1 == ~wb_i~0);~wb_st~0 := 2;" "assume !(1 == ~r_i~0);~r_st~0 := 2;" "assume !(0 == ~e_f~0);" "assume !(0 == ~e_g~0);" "assume !(0 == ~e_e~0);" "assume 0 == ~e_c~0;~e_c~0 := 1;" "assume !(0 == ~e_wl~0);" "assume 1 == ~wl_pc~0;" "assume 1 == ~e_wl~0;~wl_st~0 := 0;" "assume !(1 == ~c1_pc~0);" "assume !(1 == ~c2_pc~0);" "assume !(1 == ~wb_pc~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_e~0);" "assume !(1 == ~e_f~0);" "assume !(1 == ~e_g~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_wl~0);" "assume true;start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" [2025-02-08 14:52:19,125 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "assume 0 == ~wl_st~0;" "assume 0 == ~wl_st~0;havoc eval_#t~nondet4#1;eval_~tmp~0#1 := eval_#t~nondet4#1;havoc eval_#t~nondet4#1;" "assume !(0 != eval_~tmp~0#1);" "assume !(0 == ~c1_st~0);" "assume !(0 == ~c2_st~0);" "assume !(0 == ~wb_st~0);" "assume !(0 == ~r_st~0);" [2025-02-08 14:52:19,125 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:19,125 INFO L85 PathProgramCache]: Analyzing trace with hash -623957406, now seen corresponding path program 1 times [2025-02-08 14:52:19,125 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:19,125 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [859258139] [2025-02-08 14:52:19,125 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:52:19,126 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:19,135 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 24 statements into 1 equivalence classes. [2025-02-08 14:52:19,141 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 24 of 24 statements. [2025-02-08 14:52:19,142 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:19,142 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:52:19,174 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:52:19,175 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:52:19,175 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [859258139] [2025-02-08 14:52:19,175 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [859258139] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:52:19,175 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:52:19,175 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-02-08 14:52:19,175 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [520233543] [2025-02-08 14:52:19,175 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:52:19,175 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-08 14:52:19,175 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:19,175 INFO L85 PathProgramCache]: Analyzing trace with hash -1514278920, now seen corresponding path program 3 times [2025-02-08 14:52:19,175 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:19,175 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [860760842] [2025-02-08 14:52:19,175 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-08 14:52:19,176 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:19,178 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 8 statements into 1 equivalence classes. [2025-02-08 14:52:19,179 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-02-08 14:52:19,179 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-08 14:52:19,179 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:19,179 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:52:19,183 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 8 statements into 1 equivalence classes. [2025-02-08 14:52:19,183 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-02-08 14:52:19,183 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:19,183 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:19,187 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:52:19,216 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:52:19,216 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-08 14:52:19,216 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-08 14:52:19,216 INFO L87 Difference]: Start difference. First operand 43 states and 72 transitions. cyclomatic complexity: 30 Second operand has 3 states, 3 states have (on average 8.0) internal successors, (24), 2 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:19,219 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:52:19,219 INFO L93 Difference]: Finished difference Result 43 states and 71 transitions. [2025-02-08 14:52:19,219 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 43 states and 71 transitions. [2025-02-08 14:52:19,220 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 12 [2025-02-08 14:52:19,220 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 43 states to 43 states and 71 transitions. [2025-02-08 14:52:19,220 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 43 [2025-02-08 14:52:19,220 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 43 [2025-02-08 14:52:19,220 INFO L73 IsDeterministic]: Start isDeterministic. Operand 43 states and 71 transitions. [2025-02-08 14:52:19,220 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:52:19,220 INFO L218 hiAutomatonCegarLoop]: Abstraction has 43 states and 71 transitions. [2025-02-08 14:52:19,221 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states and 71 transitions. [2025-02-08 14:52:19,223 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 43. [2025-02-08 14:52:19,223 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 43 states have (on average 1.6511627906976745) internal successors, (71), 42 states have internal predecessors, (71), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:19,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 71 transitions. [2025-02-08 14:52:19,223 INFO L240 hiAutomatonCegarLoop]: Abstraction has 43 states and 71 transitions. [2025-02-08 14:52:19,225 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-08 14:52:19,225 INFO L432 stractBuchiCegarLoop]: Abstraction has 43 states and 71 transitions. [2025-02-08 14:52:19,226 INFO L338 stractBuchiCegarLoop]: ======== Iteration 5 ============ [2025-02-08 14:52:19,226 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 43 states and 71 transitions. [2025-02-08 14:52:19,227 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 12 [2025-02-08 14:52:19,229 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:52:19,229 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:52:19,229 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:19,229 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:19,229 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);call #Ultimate.allocInit(12, 3);~c~0 := 0;~c_t~0 := 0;~c_req_up~0 := 0;~p_in~0 := 0;~p_out~0 := 0;~wl_st~0 := 0;~c1_st~0 := 0;~c2_st~0 := 0;~wb_st~0 := 0;~r_st~0 := 0;~wl_i~0 := 0;~c1_i~0 := 0;~c2_i~0 := 0;~wb_i~0 := 0;~r_i~0 := 0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~e_e~0 := 0;~e_f~0 := 0;~e_g~0 := 0;~e_c~0 := 0;~e_p_in~0 := 0;~e_wl~0 := 0;~d~0 := 0;~data~0 := 0;~processed~0 := 0;~t_b~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~__retres1~0#1;havoc main_~__retres1~0#1;~e_wl~0 := 2;~e_c~0 := ~e_wl~0;~e_g~0 := ~e_c~0;~e_f~0 := ~e_g~0;~e_e~0 := ~e_f~0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~wb_i~0 := 1;~c2_i~0 := ~wb_i~0;~c1_i~0 := ~c2_i~0;~wl_i~0 := ~c1_i~0;~r_i~0 := 0;~c_req_up~0 := 0;~d~0 := 0;~c~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~c_req_up~0);" "assume 1 == ~wl_i~0;~wl_st~0 := 0;" "assume 1 == ~c1_i~0;~c1_st~0 := 0;" "assume 1 == ~c2_i~0;~c2_st~0 := 0;" "assume !(1 == ~wb_i~0);~wb_st~0 := 2;" "assume !(1 == ~r_i~0);~r_st~0 := 2;" "assume !(0 == ~e_f~0);" "assume !(0 == ~e_g~0);" "assume !(0 == ~e_e~0);" "assume 0 == ~e_c~0;~e_c~0 := 1;" "assume !(0 == ~e_wl~0);" "assume 1 == ~wl_pc~0;" "assume 1 == ~e_wl~0;~wl_st~0 := 0;" "assume !(1 == ~c1_pc~0);" "assume !(1 == ~c2_pc~0);" "assume !(1 == ~wb_pc~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_e~0);" "assume !(1 == ~e_f~0);" "assume !(1 == ~e_g~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_wl~0);" "assume true;start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" [2025-02-08 14:52:19,230 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "assume 0 == ~wl_st~0;" "assume 0 == ~wl_st~0;havoc eval_#t~nondet4#1;eval_~tmp~0#1 := eval_#t~nondet4#1;havoc eval_#t~nondet4#1;" "assume !(0 != eval_~tmp~0#1);" "assume !(0 == ~c1_st~0);" "assume !(0 == ~c2_st~0);" "assume !(0 == ~wb_st~0);" "assume !(0 == ~r_st~0);" [2025-02-08 14:52:19,230 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:19,230 INFO L85 PathProgramCache]: Analyzing trace with hash -215133181, now seen corresponding path program 1 times [2025-02-08 14:52:19,230 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:19,230 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1637773643] [2025-02-08 14:52:19,230 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:52:19,230 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:19,235 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 24 statements into 1 equivalence classes. [2025-02-08 14:52:19,238 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 24 of 24 statements. [2025-02-08 14:52:19,238 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:19,238 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:52:19,264 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:52:19,264 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:52:19,264 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1637773643] [2025-02-08 14:52:19,264 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1637773643] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:52:19,264 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:52:19,264 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-02-08 14:52:19,264 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [642582599] [2025-02-08 14:52:19,264 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:52:19,265 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-08 14:52:19,265 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:19,265 INFO L85 PathProgramCache]: Analyzing trace with hash -1514278920, now seen corresponding path program 4 times [2025-02-08 14:52:19,265 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:19,265 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [135938086] [2025-02-08 14:52:19,265 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-08 14:52:19,265 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:19,267 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 8 statements into 2 equivalence classes. [2025-02-08 14:52:19,270 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 8 of 8 statements. [2025-02-08 14:52:19,270 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-08 14:52:19,270 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:19,270 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:52:19,271 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 8 statements into 1 equivalence classes. [2025-02-08 14:52:19,271 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-02-08 14:52:19,271 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:19,271 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:19,272 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:52:19,311 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:52:19,312 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-08 14:52:19,312 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-08 14:52:19,312 INFO L87 Difference]: Start difference. First operand 43 states and 71 transitions. cyclomatic complexity: 29 Second operand has 3 states, 3 states have (on average 8.0) internal successors, (24), 2 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:19,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:52:19,316 INFO L93 Difference]: Finished difference Result 43 states and 70 transitions. [2025-02-08 14:52:19,316 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 43 states and 70 transitions. [2025-02-08 14:52:19,317 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 12 [2025-02-08 14:52:19,317 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 43 states to 43 states and 70 transitions. [2025-02-08 14:52:19,317 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 43 [2025-02-08 14:52:19,317 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 43 [2025-02-08 14:52:19,318 INFO L73 IsDeterministic]: Start isDeterministic. Operand 43 states and 70 transitions. [2025-02-08 14:52:19,318 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:52:19,318 INFO L218 hiAutomatonCegarLoop]: Abstraction has 43 states and 70 transitions. [2025-02-08 14:52:19,318 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states and 70 transitions. [2025-02-08 14:52:19,319 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 43. [2025-02-08 14:52:19,319 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 43 states, 43 states have (on average 1.627906976744186) internal successors, (70), 42 states have internal predecessors, (70), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:19,319 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 70 transitions. [2025-02-08 14:52:19,319 INFO L240 hiAutomatonCegarLoop]: Abstraction has 43 states and 70 transitions. [2025-02-08 14:52:19,320 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-08 14:52:19,320 INFO L432 stractBuchiCegarLoop]: Abstraction has 43 states and 70 transitions. [2025-02-08 14:52:19,320 INFO L338 stractBuchiCegarLoop]: ======== Iteration 6 ============ [2025-02-08 14:52:19,320 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 43 states and 70 transitions. [2025-02-08 14:52:19,321 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 12 [2025-02-08 14:52:19,321 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:52:19,321 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:52:19,321 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:19,321 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:19,321 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);call #Ultimate.allocInit(12, 3);~c~0 := 0;~c_t~0 := 0;~c_req_up~0 := 0;~p_in~0 := 0;~p_out~0 := 0;~wl_st~0 := 0;~c1_st~0 := 0;~c2_st~0 := 0;~wb_st~0 := 0;~r_st~0 := 0;~wl_i~0 := 0;~c1_i~0 := 0;~c2_i~0 := 0;~wb_i~0 := 0;~r_i~0 := 0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~e_e~0 := 0;~e_f~0 := 0;~e_g~0 := 0;~e_c~0 := 0;~e_p_in~0 := 0;~e_wl~0 := 0;~d~0 := 0;~data~0 := 0;~processed~0 := 0;~t_b~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~__retres1~0#1;havoc main_~__retres1~0#1;~e_wl~0 := 2;~e_c~0 := ~e_wl~0;~e_g~0 := ~e_c~0;~e_f~0 := ~e_g~0;~e_e~0 := ~e_f~0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~wb_i~0 := 1;~c2_i~0 := ~wb_i~0;~c1_i~0 := ~c2_i~0;~wl_i~0 := ~c1_i~0;~r_i~0 := 0;~c_req_up~0 := 0;~d~0 := 0;~c~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~c_req_up~0);" "assume 1 == ~wl_i~0;~wl_st~0 := 0;" "assume 1 == ~c1_i~0;~c1_st~0 := 0;" "assume 1 == ~c2_i~0;~c2_st~0 := 0;" "assume 1 == ~wb_i~0;~wb_st~0 := 0;" "assume !(1 == ~r_i~0);~r_st~0 := 2;" "assume !(0 == ~e_f~0);" "assume !(0 == ~e_g~0);" "assume !(0 == ~e_e~0);" "assume 0 == ~e_c~0;~e_c~0 := 1;" "assume !(0 == ~e_wl~0);" "assume 1 == ~wl_pc~0;" "assume 1 == ~e_wl~0;~wl_st~0 := 0;" "assume !(1 == ~c1_pc~0);" "assume !(1 == ~c2_pc~0);" "assume !(1 == ~wb_pc~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_e~0);" "assume !(1 == ~e_f~0);" "assume !(1 == ~e_g~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_wl~0);" "assume true;start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" [2025-02-08 14:52:19,321 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "assume 0 == ~wl_st~0;" "assume 0 == ~wl_st~0;havoc eval_#t~nondet4#1;eval_~tmp~0#1 := eval_#t~nondet4#1;havoc eval_#t~nondet4#1;" "assume !(0 != eval_~tmp~0#1);" "assume !(0 == ~c1_st~0);" "assume !(0 == ~c2_st~0);" "assume !(0 == ~wb_st~0);" "assume !(0 == ~r_st~0);" [2025-02-08 14:52:19,322 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:19,322 INFO L85 PathProgramCache]: Analyzing trace with hash 629338690, now seen corresponding path program 1 times [2025-02-08 14:52:19,322 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:19,322 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1071674477] [2025-02-08 14:52:19,322 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:52:19,322 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:19,326 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 24 statements into 1 equivalence classes. [2025-02-08 14:52:19,331 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 24 of 24 statements. [2025-02-08 14:52:19,333 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:19,333 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:52:19,376 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:52:19,376 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:52:19,376 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1071674477] [2025-02-08 14:52:19,376 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1071674477] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:52:19,376 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:52:19,376 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2025-02-08 14:52:19,376 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [942441853] [2025-02-08 14:52:19,376 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:52:19,377 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-08 14:52:19,377 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:19,377 INFO L85 PathProgramCache]: Analyzing trace with hash -1514278920, now seen corresponding path program 5 times [2025-02-08 14:52:19,377 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:19,377 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1066765828] [2025-02-08 14:52:19,377 INFO L95 rtionOrderModulation]: Changing assertion order to INSIDE_LOOP_FIRST1 [2025-02-08 14:52:19,377 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:19,381 INFO L108 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 partitioned 8 statements into 1 equivalence classes. [2025-02-08 14:52:19,383 INFO L111 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-02-08 14:52:19,383 INFO L114 AnnotateAndAsserter]: Assert order INSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-08 14:52:19,383 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:19,383 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:52:19,387 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 8 statements into 1 equivalence classes. [2025-02-08 14:52:19,388 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-02-08 14:52:19,388 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:19,388 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:19,389 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:52:19,418 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:52:19,419 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-08 14:52:19,419 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-08 14:52:19,419 INFO L87 Difference]: Start difference. First operand 43 states and 70 transitions. cyclomatic complexity: 28 Second operand has 3 states, 3 states have (on average 8.0) internal successors, (24), 2 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:19,437 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:52:19,438 INFO L93 Difference]: Finished difference Result 83 states and 132 transitions. [2025-02-08 14:52:19,438 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 83 states and 132 transitions. [2025-02-08 14:52:19,440 INFO L131 ngComponentsAnalysis]: Automaton has 2 accepting balls. 24 [2025-02-08 14:52:19,441 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 83 states to 83 states and 132 transitions. [2025-02-08 14:52:19,441 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 83 [2025-02-08 14:52:19,441 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 83 [2025-02-08 14:52:19,441 INFO L73 IsDeterministic]: Start isDeterministic. Operand 83 states and 132 transitions. [2025-02-08 14:52:19,441 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:52:19,441 INFO L218 hiAutomatonCegarLoop]: Abstraction has 83 states and 132 transitions. [2025-02-08 14:52:19,441 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states and 132 transitions. [2025-02-08 14:52:19,443 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 69. [2025-02-08 14:52:19,443 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 69 states, 69 states have (on average 1.6376811594202898) internal successors, (113), 68 states have internal predecessors, (113), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:19,444 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 113 transitions. [2025-02-08 14:52:19,444 INFO L240 hiAutomatonCegarLoop]: Abstraction has 69 states and 113 transitions. [2025-02-08 14:52:19,444 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-08 14:52:19,445 INFO L432 stractBuchiCegarLoop]: Abstraction has 69 states and 113 transitions. [2025-02-08 14:52:19,445 INFO L338 stractBuchiCegarLoop]: ======== Iteration 7 ============ [2025-02-08 14:52:19,445 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 69 states and 113 transitions. [2025-02-08 14:52:19,445 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 12 [2025-02-08 14:52:19,445 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:52:19,445 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:52:19,446 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:19,446 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:19,446 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);call #Ultimate.allocInit(12, 3);~c~0 := 0;~c_t~0 := 0;~c_req_up~0 := 0;~p_in~0 := 0;~p_out~0 := 0;~wl_st~0 := 0;~c1_st~0 := 0;~c2_st~0 := 0;~wb_st~0 := 0;~r_st~0 := 0;~wl_i~0 := 0;~c1_i~0 := 0;~c2_i~0 := 0;~wb_i~0 := 0;~r_i~0 := 0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~e_e~0 := 0;~e_f~0 := 0;~e_g~0 := 0;~e_c~0 := 0;~e_p_in~0 := 0;~e_wl~0 := 0;~d~0 := 0;~data~0 := 0;~processed~0 := 0;~t_b~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~__retres1~0#1;havoc main_~__retres1~0#1;~e_wl~0 := 2;~e_c~0 := ~e_wl~0;~e_g~0 := ~e_c~0;~e_f~0 := ~e_g~0;~e_e~0 := ~e_f~0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~wb_i~0 := 1;~c2_i~0 := ~wb_i~0;~c1_i~0 := ~c2_i~0;~wl_i~0 := ~c1_i~0;~r_i~0 := 0;~c_req_up~0 := 0;~d~0 := 0;~c~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~c_req_up~0);" "assume 1 == ~wl_i~0;~wl_st~0 := 0;" "assume 1 == ~c1_i~0;~c1_st~0 := 0;" "assume 1 == ~c2_i~0;~c2_st~0 := 0;" "assume 1 == ~wb_i~0;~wb_st~0 := 0;" "assume !(1 == ~r_i~0);~r_st~0 := 2;" "assume !(0 == ~e_f~0);" "assume !(0 == ~e_g~0);" "assume !(0 == ~e_e~0);" "assume !(0 == ~e_c~0);" "assume !(0 == ~e_wl~0);" "assume 1 == ~wl_pc~0;" "assume 1 == ~e_wl~0;~wl_st~0 := 0;" "assume !(1 == ~c1_pc~0);" "assume !(1 == ~c2_pc~0);" "assume !(1 == ~wb_pc~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_e~0);" "assume !(1 == ~e_f~0);" "assume !(1 == ~e_g~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_wl~0);" "assume true;start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" [2025-02-08 14:52:19,446 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "assume 0 == ~wl_st~0;" "assume 0 == ~wl_st~0;havoc eval_#t~nondet4#1;eval_~tmp~0#1 := eval_#t~nondet4#1;havoc eval_#t~nondet4#1;" "assume !(0 != eval_~tmp~0#1);" "assume !(0 == ~c1_st~0);" "assume !(0 == ~c2_st~0);" "assume !(0 == ~wb_st~0);" "assume !(0 == ~r_st~0);" [2025-02-08 14:52:19,446 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:19,446 INFO L85 PathProgramCache]: Analyzing trace with hash 123780065, now seen corresponding path program 1 times [2025-02-08 14:52:19,446 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:19,447 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [599723575] [2025-02-08 14:52:19,447 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:52:19,447 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:19,450 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 24 statements into 1 equivalence classes. [2025-02-08 14:52:19,456 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 24 of 24 statements. [2025-02-08 14:52:19,456 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:19,456 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:52:19,496 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:52:19,496 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:52:19,496 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [599723575] [2025-02-08 14:52:19,497 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [599723575] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:52:19,497 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:52:19,497 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-08 14:52:19,497 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1908463621] [2025-02-08 14:52:19,497 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:52:19,498 INFO L757 eck$LassoCheckResult]: stem already infeasible [2025-02-08 14:52:19,498 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:19,499 INFO L85 PathProgramCache]: Analyzing trace with hash -1514278920, now seen corresponding path program 6 times [2025-02-08 14:52:19,499 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:19,499 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1269505535] [2025-02-08 14:52:19,499 INFO L95 rtionOrderModulation]: Changing assertion order to MIX_INSIDE_OUTSIDE [2025-02-08 14:52:19,499 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:19,501 INFO L108 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE partitioned 8 statements into 1 equivalence classes. [2025-02-08 14:52:19,502 INFO L111 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-02-08 14:52:19,502 INFO L114 AnnotateAndAsserter]: Assert order MIX_INSIDE_OUTSIDE issued 1 check-sat command(s) [2025-02-08 14:52:19,502 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:19,502 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:52:19,503 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 8 statements into 1 equivalence classes. [2025-02-08 14:52:19,503 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-02-08 14:52:19,503 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:19,503 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:19,504 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:52:19,531 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:52:19,531 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2025-02-08 14:52:19,531 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2025-02-08 14:52:19,531 INFO L87 Difference]: Start difference. First operand 69 states and 113 transitions. cyclomatic complexity: 45 Second operand has 4 states, 4 states have (on average 6.0) internal successors, (24), 3 states have internal predecessors, (24), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:19,547 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:52:19,547 INFO L93 Difference]: Finished difference Result 40 states and 61 transitions. [2025-02-08 14:52:19,547 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 40 states and 61 transitions. [2025-02-08 14:52:19,548 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 12 [2025-02-08 14:52:19,548 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 40 states to 40 states and 61 transitions. [2025-02-08 14:52:19,548 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 40 [2025-02-08 14:52:19,548 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 40 [2025-02-08 14:52:19,548 INFO L73 IsDeterministic]: Start isDeterministic. Operand 40 states and 61 transitions. [2025-02-08 14:52:19,548 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:52:19,548 INFO L218 hiAutomatonCegarLoop]: Abstraction has 40 states and 61 transitions. [2025-02-08 14:52:19,548 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states and 61 transitions. [2025-02-08 14:52:19,549 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. [2025-02-08 14:52:19,549 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 40 states, 40 states have (on average 1.525) internal successors, (61), 39 states have internal predecessors, (61), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:19,549 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 61 transitions. [2025-02-08 14:52:19,549 INFO L240 hiAutomatonCegarLoop]: Abstraction has 40 states and 61 transitions. [2025-02-08 14:52:19,552 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-08 14:52:19,552 INFO L432 stractBuchiCegarLoop]: Abstraction has 40 states and 61 transitions. [2025-02-08 14:52:19,552 INFO L338 stractBuchiCegarLoop]: ======== Iteration 8 ============ [2025-02-08 14:52:19,552 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 40 states and 61 transitions. [2025-02-08 14:52:19,553 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 12 [2025-02-08 14:52:19,553 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:52:19,553 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:52:19,553 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:19,553 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:19,553 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);call #Ultimate.allocInit(12, 3);~c~0 := 0;~c_t~0 := 0;~c_req_up~0 := 0;~p_in~0 := 0;~p_out~0 := 0;~wl_st~0 := 0;~c1_st~0 := 0;~c2_st~0 := 0;~wb_st~0 := 0;~r_st~0 := 0;~wl_i~0 := 0;~c1_i~0 := 0;~c2_i~0 := 0;~wb_i~0 := 0;~r_i~0 := 0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~e_e~0 := 0;~e_f~0 := 0;~e_g~0 := 0;~e_c~0 := 0;~e_p_in~0 := 0;~e_wl~0 := 0;~d~0 := 0;~data~0 := 0;~processed~0 := 0;~t_b~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~__retres1~0#1;havoc main_~__retres1~0#1;~e_wl~0 := 2;~e_c~0 := ~e_wl~0;~e_g~0 := ~e_c~0;~e_f~0 := ~e_g~0;~e_e~0 := ~e_f~0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~wb_i~0 := 1;~c2_i~0 := ~wb_i~0;~c1_i~0 := ~c2_i~0;~wl_i~0 := ~c1_i~0;~r_i~0 := 0;~c_req_up~0 := 0;~d~0 := 0;~c~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~c_req_up~0);" "assume 1 == ~wl_i~0;~wl_st~0 := 0;" "assume 1 == ~c1_i~0;~c1_st~0 := 0;" "assume 1 == ~c2_i~0;~c2_st~0 := 0;" "assume 1 == ~wb_i~0;~wb_st~0 := 0;" "assume !(1 == ~r_i~0);~r_st~0 := 2;" "assume !(0 == ~e_f~0);" "assume !(0 == ~e_g~0);" "assume !(0 == ~e_e~0);" "assume !(0 == ~e_c~0);" "assume !(0 == ~e_wl~0);" "assume !(1 == ~wl_pc~0);" "assume !(2 == ~wl_pc~0);" "assume !(1 == ~c1_pc~0);" "assume !(1 == ~c2_pc~0);" "assume !(1 == ~wb_pc~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_e~0);" "assume !(1 == ~e_f~0);" "assume !(1 == ~e_g~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_wl~0);" "assume true;start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" [2025-02-08 14:52:19,553 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "assume 0 == ~wl_st~0;" "assume 0 == ~wl_st~0;havoc eval_#t~nondet4#1;eval_~tmp~0#1 := eval_#t~nondet4#1;havoc eval_#t~nondet4#1;" "assume !(0 != eval_~tmp~0#1);" "assume !(0 == ~c1_st~0);" "assume !(0 == ~c2_st~0);" "assume !(0 == ~wb_st~0);" "assume !(0 == ~r_st~0);" [2025-02-08 14:52:19,553 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:19,553 INFO L85 PathProgramCache]: Analyzing trace with hash -1938910778, now seen corresponding path program 1 times [2025-02-08 14:52:19,553 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:19,553 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1537209699] [2025-02-08 14:52:19,553 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:52:19,553 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:19,559 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 24 statements into 1 equivalence classes. [2025-02-08 14:52:19,563 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 24 of 24 statements. [2025-02-08 14:52:19,563 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:19,563 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:19,563 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:52:19,565 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 24 statements into 1 equivalence classes. [2025-02-08 14:52:19,568 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 24 of 24 statements. [2025-02-08 14:52:19,570 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:19,570 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:19,575 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:52:19,576 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:19,576 INFO L85 PathProgramCache]: Analyzing trace with hash -1514278920, now seen corresponding path program 7 times [2025-02-08 14:52:19,576 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:19,576 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1350702180] [2025-02-08 14:52:19,576 INFO L95 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2025-02-08 14:52:19,576 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:19,578 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 8 statements into 1 equivalence classes. [2025-02-08 14:52:19,579 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-02-08 14:52:19,579 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:19,579 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:19,579 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:52:19,579 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 8 statements into 1 equivalence classes. [2025-02-08 14:52:19,580 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 8 of 8 statements. [2025-02-08 14:52:19,580 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:19,580 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:19,581 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:52:19,581 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:19,581 INFO L85 PathProgramCache]: Analyzing trace with hash -1078661955, now seen corresponding path program 1 times [2025-02-08 14:52:19,581 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:19,582 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1371246672] [2025-02-08 14:52:19,582 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:52:19,582 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:19,602 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 32 statements into 1 equivalence classes. [2025-02-08 14:52:19,608 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 32 of 32 statements. [2025-02-08 14:52:19,608 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:19,608 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:52:19,628 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:52:19,628 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:52:19,628 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1371246672] [2025-02-08 14:52:19,628 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1371246672] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:52:19,628 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:52:19,629 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-08 14:52:19,629 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [480302016] [2025-02-08 14:52:19,629 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:52:19,654 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:52:19,655 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-08 14:52:19,655 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-08 14:52:19,655 INFO L87 Difference]: Start difference. First operand 40 states and 61 transitions. cyclomatic complexity: 22 Second operand has 3 states, 3 states have (on average 10.666666666666666) internal successors, (32), 3 states have internal predecessors, (32), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:19,660 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:52:19,660 INFO L93 Difference]: Finished difference Result 40 states and 60 transitions. [2025-02-08 14:52:19,660 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 40 states and 60 transitions. [2025-02-08 14:52:19,660 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 12 [2025-02-08 14:52:19,661 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 40 states to 40 states and 60 transitions. [2025-02-08 14:52:19,661 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 40 [2025-02-08 14:52:19,661 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 40 [2025-02-08 14:52:19,661 INFO L73 IsDeterministic]: Start isDeterministic. Operand 40 states and 60 transitions. [2025-02-08 14:52:19,661 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:52:19,661 INFO L218 hiAutomatonCegarLoop]: Abstraction has 40 states and 60 transitions. [2025-02-08 14:52:19,661 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states and 60 transitions. [2025-02-08 14:52:19,662 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. [2025-02-08 14:52:19,662 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 40 states, 40 states have (on average 1.5) internal successors, (60), 39 states have internal predecessors, (60), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:19,662 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 60 transitions. [2025-02-08 14:52:19,662 INFO L240 hiAutomatonCegarLoop]: Abstraction has 40 states and 60 transitions. [2025-02-08 14:52:19,665 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-08 14:52:19,665 INFO L432 stractBuchiCegarLoop]: Abstraction has 40 states and 60 transitions. [2025-02-08 14:52:19,665 INFO L338 stractBuchiCegarLoop]: ======== Iteration 9 ============ [2025-02-08 14:52:19,665 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 40 states and 60 transitions. [2025-02-08 14:52:19,666 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 12 [2025-02-08 14:52:19,666 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:52:19,666 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:52:19,666 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:19,666 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:19,666 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);call #Ultimate.allocInit(12, 3);~c~0 := 0;~c_t~0 := 0;~c_req_up~0 := 0;~p_in~0 := 0;~p_out~0 := 0;~wl_st~0 := 0;~c1_st~0 := 0;~c2_st~0 := 0;~wb_st~0 := 0;~r_st~0 := 0;~wl_i~0 := 0;~c1_i~0 := 0;~c2_i~0 := 0;~wb_i~0 := 0;~r_i~0 := 0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~e_e~0 := 0;~e_f~0 := 0;~e_g~0 := 0;~e_c~0 := 0;~e_p_in~0 := 0;~e_wl~0 := 0;~d~0 := 0;~data~0 := 0;~processed~0 := 0;~t_b~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~__retres1~0#1;havoc main_~__retres1~0#1;~e_wl~0 := 2;~e_c~0 := ~e_wl~0;~e_g~0 := ~e_c~0;~e_f~0 := ~e_g~0;~e_e~0 := ~e_f~0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~wb_i~0 := 1;~c2_i~0 := ~wb_i~0;~c1_i~0 := ~c2_i~0;~wl_i~0 := ~c1_i~0;~r_i~0 := 0;~c_req_up~0 := 0;~d~0 := 0;~c~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~c_req_up~0);" "assume 1 == ~wl_i~0;~wl_st~0 := 0;" "assume 1 == ~c1_i~0;~c1_st~0 := 0;" "assume 1 == ~c2_i~0;~c2_st~0 := 0;" "assume 1 == ~wb_i~0;~wb_st~0 := 0;" "assume !(1 == ~r_i~0);~r_st~0 := 2;" "assume !(0 == ~e_f~0);" "assume !(0 == ~e_g~0);" "assume !(0 == ~e_e~0);" "assume !(0 == ~e_c~0);" "assume !(0 == ~e_wl~0);" "assume !(1 == ~wl_pc~0);" "assume !(2 == ~wl_pc~0);" "assume !(1 == ~c1_pc~0);" "assume !(1 == ~c2_pc~0);" "assume !(1 == ~wb_pc~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_e~0);" "assume !(1 == ~e_f~0);" "assume !(1 == ~e_g~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_wl~0);" "assume true;start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" [2025-02-08 14:52:19,666 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "assume 0 == ~wl_st~0;" "assume 0 == ~wl_st~0;havoc eval_#t~nondet4#1;eval_~tmp~0#1 := eval_#t~nondet4#1;havoc eval_#t~nondet4#1;" "assume !(0 != eval_~tmp~0#1);" "assume 0 == ~c1_st~0;havoc eval_#t~nondet5#1;eval_~tmp___0~0#1 := eval_#t~nondet5#1;havoc eval_#t~nondet5#1;" "assume !(0 != eval_~tmp___0~0#1);" "assume !(0 == ~c2_st~0);" "assume !(0 == ~wb_st~0);" "assume !(0 == ~r_st~0);" [2025-02-08 14:52:19,666 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:19,666 INFO L85 PathProgramCache]: Analyzing trace with hash -1938910778, now seen corresponding path program 2 times [2025-02-08 14:52:19,666 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:19,667 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [518893189] [2025-02-08 14:52:19,667 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST1 [2025-02-08 14:52:19,667 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:19,671 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 partitioned 24 statements into 1 equivalence classes. [2025-02-08 14:52:19,676 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) and asserted 24 of 24 statements. [2025-02-08 14:52:19,676 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST1 issued 1 check-sat command(s) [2025-02-08 14:52:19,676 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:19,676 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:52:19,678 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 24 statements into 1 equivalence classes. [2025-02-08 14:52:19,682 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 24 of 24 statements. [2025-02-08 14:52:19,682 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:19,682 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:19,687 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:52:19,687 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:19,688 INFO L85 PathProgramCache]: Analyzing trace with hash 301687751, now seen corresponding path program 1 times [2025-02-08 14:52:19,688 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:19,688 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [845449049] [2025-02-08 14:52:19,688 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:52:19,688 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:19,690 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 9 statements into 1 equivalence classes. [2025-02-08 14:52:19,690 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 9 of 9 statements. [2025-02-08 14:52:19,690 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:19,690 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:19,691 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:52:19,691 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 9 statements into 1 equivalence classes. [2025-02-08 14:52:19,692 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 9 of 9 statements. [2025-02-08 14:52:19,692 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:19,692 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:19,693 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:52:19,693 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:19,693 INFO L85 PathProgramCache]: Analyzing trace with hash 920911778, now seen corresponding path program 1 times [2025-02-08 14:52:19,693 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:19,693 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1529509389] [2025-02-08 14:52:19,693 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:52:19,693 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:19,700 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 33 statements into 1 equivalence classes. [2025-02-08 14:52:19,704 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 33 of 33 statements. [2025-02-08 14:52:19,704 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:19,704 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:52:19,725 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:52:19,725 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:52:19,725 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1529509389] [2025-02-08 14:52:19,725 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1529509389] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:52:19,725 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:52:19,725 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-08 14:52:19,726 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [1130185241] [2025-02-08 14:52:19,726 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:52:19,757 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:52:19,757 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-08 14:52:19,757 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-08 14:52:19,757 INFO L87 Difference]: Start difference. First operand 40 states and 60 transitions. cyclomatic complexity: 21 Second operand has 3 states, 3 states have (on average 11.0) internal successors, (33), 3 states have internal predecessors, (33), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:19,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:52:19,764 INFO L93 Difference]: Finished difference Result 40 states and 59 transitions. [2025-02-08 14:52:19,764 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 40 states and 59 transitions. [2025-02-08 14:52:19,764 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 12 [2025-02-08 14:52:19,765 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 40 states to 40 states and 59 transitions. [2025-02-08 14:52:19,765 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 40 [2025-02-08 14:52:19,765 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 40 [2025-02-08 14:52:19,765 INFO L73 IsDeterministic]: Start isDeterministic. Operand 40 states and 59 transitions. [2025-02-08 14:52:19,765 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:52:19,765 INFO L218 hiAutomatonCegarLoop]: Abstraction has 40 states and 59 transitions. [2025-02-08 14:52:19,765 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states and 59 transitions. [2025-02-08 14:52:19,766 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. [2025-02-08 14:52:19,766 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 40 states, 40 states have (on average 1.475) internal successors, (59), 39 states have internal predecessors, (59), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:19,766 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 59 transitions. [2025-02-08 14:52:19,766 INFO L240 hiAutomatonCegarLoop]: Abstraction has 40 states and 59 transitions. [2025-02-08 14:52:19,767 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-08 14:52:19,768 INFO L432 stractBuchiCegarLoop]: Abstraction has 40 states and 59 transitions. [2025-02-08 14:52:19,768 INFO L338 stractBuchiCegarLoop]: ======== Iteration 10 ============ [2025-02-08 14:52:19,768 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 40 states and 59 transitions. [2025-02-08 14:52:19,768 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 12 [2025-02-08 14:52:19,768 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:52:19,768 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:52:19,769 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:19,769 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:19,769 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);call #Ultimate.allocInit(12, 3);~c~0 := 0;~c_t~0 := 0;~c_req_up~0 := 0;~p_in~0 := 0;~p_out~0 := 0;~wl_st~0 := 0;~c1_st~0 := 0;~c2_st~0 := 0;~wb_st~0 := 0;~r_st~0 := 0;~wl_i~0 := 0;~c1_i~0 := 0;~c2_i~0 := 0;~wb_i~0 := 0;~r_i~0 := 0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~e_e~0 := 0;~e_f~0 := 0;~e_g~0 := 0;~e_c~0 := 0;~e_p_in~0 := 0;~e_wl~0 := 0;~d~0 := 0;~data~0 := 0;~processed~0 := 0;~t_b~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~__retres1~0#1;havoc main_~__retres1~0#1;~e_wl~0 := 2;~e_c~0 := ~e_wl~0;~e_g~0 := ~e_c~0;~e_f~0 := ~e_g~0;~e_e~0 := ~e_f~0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~wb_i~0 := 1;~c2_i~0 := ~wb_i~0;~c1_i~0 := ~c2_i~0;~wl_i~0 := ~c1_i~0;~r_i~0 := 0;~c_req_up~0 := 0;~d~0 := 0;~c~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~c_req_up~0);" "assume 1 == ~wl_i~0;~wl_st~0 := 0;" "assume 1 == ~c1_i~0;~c1_st~0 := 0;" "assume 1 == ~c2_i~0;~c2_st~0 := 0;" "assume 1 == ~wb_i~0;~wb_st~0 := 0;" "assume !(1 == ~r_i~0);~r_st~0 := 2;" "assume !(0 == ~e_f~0);" "assume !(0 == ~e_g~0);" "assume !(0 == ~e_e~0);" "assume !(0 == ~e_c~0);" "assume !(0 == ~e_wl~0);" "assume !(1 == ~wl_pc~0);" "assume !(2 == ~wl_pc~0);" "assume !(1 == ~c1_pc~0);" "assume !(1 == ~c2_pc~0);" "assume !(1 == ~wb_pc~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_e~0);" "assume !(1 == ~e_f~0);" "assume !(1 == ~e_g~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_wl~0);" "assume true;start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" [2025-02-08 14:52:19,769 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "assume 0 == ~wl_st~0;" "assume 0 == ~wl_st~0;havoc eval_#t~nondet4#1;eval_~tmp~0#1 := eval_#t~nondet4#1;havoc eval_#t~nondet4#1;" "assume !(0 != eval_~tmp~0#1);" "assume 0 == ~c1_st~0;havoc eval_#t~nondet5#1;eval_~tmp___0~0#1 := eval_#t~nondet5#1;havoc eval_#t~nondet5#1;" "assume !(0 != eval_~tmp___0~0#1);" "assume 0 == ~c2_st~0;havoc eval_#t~nondet6#1;eval_~tmp___1~0#1 := eval_#t~nondet6#1;havoc eval_#t~nondet6#1;" "assume !(0 != eval_~tmp___1~0#1);" "assume !(0 == ~wb_st~0);" "assume !(0 == ~r_st~0);" [2025-02-08 14:52:19,769 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:19,769 INFO L85 PathProgramCache]: Analyzing trace with hash -1938910778, now seen corresponding path program 3 times [2025-02-08 14:52:19,769 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:19,769 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [936198360] [2025-02-08 14:52:19,769 INFO L95 rtionOrderModulation]: Changing assertion order to OUTSIDE_LOOP_FIRST2 [2025-02-08 14:52:19,769 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:19,773 INFO L108 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 partitioned 24 statements into 1 equivalence classes. [2025-02-08 14:52:19,776 INFO L111 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) and asserted 24 of 24 statements. [2025-02-08 14:52:19,776 INFO L114 AnnotateAndAsserter]: Assert order OUTSIDE_LOOP_FIRST2 issued 1 check-sat command(s) [2025-02-08 14:52:19,776 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:19,776 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:52:19,778 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 24 statements into 1 equivalence classes. [2025-02-08 14:52:19,783 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 24 of 24 statements. [2025-02-08 14:52:19,783 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:19,783 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:19,789 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:52:19,789 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:19,789 INFO L85 PathProgramCache]: Analyzing trace with hash 762375692, now seen corresponding path program 1 times [2025-02-08 14:52:19,789 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:19,790 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [722076408] [2025-02-08 14:52:19,790 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:52:19,790 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:19,792 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 10 statements into 1 equivalence classes. [2025-02-08 14:52:19,793 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 10 of 10 statements. [2025-02-08 14:52:19,793 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:19,793 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:19,793 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:52:19,793 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 10 statements into 1 equivalence classes. [2025-02-08 14:52:19,796 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 10 of 10 statements. [2025-02-08 14:52:19,796 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:19,796 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:19,797 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:52:19,797 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:19,797 INFO L85 PathProgramCache]: Analyzing trace with hash -1516515951, now seen corresponding path program 1 times [2025-02-08 14:52:19,797 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:19,797 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1601739535] [2025-02-08 14:52:19,797 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:52:19,797 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:19,801 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 34 statements into 1 equivalence classes. [2025-02-08 14:52:19,804 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 34 of 34 statements. [2025-02-08 14:52:19,805 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:19,805 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is unsat [2025-02-08 14:52:19,823 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2025-02-08 14:52:19,823 INFO L136 FreeRefinementEngine]: Strategy CAMEL found an infeasible trace [2025-02-08 14:52:19,824 INFO L334 FreeRefinementEngine]: Using interpolant generator IpTcStrategyModuleSmtInterpolCraig [1601739535] [2025-02-08 14:52:19,824 INFO L158 FreeRefinementEngine]: IpTcStrategyModuleSmtInterpolCraig [1601739535] provided 1 perfect and 0 imperfect interpolant sequences [2025-02-08 14:52:19,824 INFO L185 FreeRefinementEngine]: Found 1 perfect and 0 imperfect interpolant sequences. [2025-02-08 14:52:19,824 INFO L198 FreeRefinementEngine]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2025-02-08 14:52:19,824 INFO L121 tionRefinementEngine]: Using interpolant automaton builder IpAbStrategyModuleStraightlineAll [51342679] [2025-02-08 14:52:19,824 INFO L85 oduleStraightlineAll]: Using 1 perfect interpolants to construct interpolant automaton [2025-02-08 14:52:19,859 INFO L100 FreeRefinementEngine]: Using predicate unifier PredicateUnifier provided by strategy CAMEL [2025-02-08 14:52:19,859 INFO L144 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2025-02-08 14:52:19,859 INFO L146 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2025-02-08 14:52:19,859 INFO L87 Difference]: Start difference. First operand 40 states and 59 transitions. cyclomatic complexity: 20 Second operand has 3 states, 3 states have (on average 11.333333333333334) internal successors, (34), 3 states have internal predecessors, (34), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:19,865 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2025-02-08 14:52:19,865 INFO L93 Difference]: Finished difference Result 40 states and 58 transitions. [2025-02-08 14:52:19,865 INFO L82 GeneralOperation]: Start removeNonLiveStates. Operand 40 states and 58 transitions. [2025-02-08 14:52:19,865 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 12 [2025-02-08 14:52:19,866 INFO L88 GeneralOperation]: Finished removeNonLiveStates. Reduced from 40 states to 40 states and 58 transitions. [2025-02-08 14:52:19,866 INFO L87 BuchiClosureNwa]: Accepting states before buchiClosure: 40 [2025-02-08 14:52:19,866 INFO L106 BuchiClosureNwa]: Accepting states after buchiClosure: 40 [2025-02-08 14:52:19,866 INFO L73 IsDeterministic]: Start isDeterministic. Operand 40 states and 58 transitions. [2025-02-08 14:52:19,866 INFO L80 IsDeterministic]: Finished isDeterministic. Operand is deterministic. [2025-02-08 14:52:19,866 INFO L218 hiAutomatonCegarLoop]: Abstraction has 40 states and 58 transitions. [2025-02-08 14:52:19,866 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states and 58 transitions. [2025-02-08 14:52:19,867 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. [2025-02-08 14:52:19,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand has 40 states, 40 states have (on average 1.45) internal successors, (58), 39 states have internal predecessors, (58), 0 states have call successors, (0), 0 states have call predecessors, (0), 0 states have return successors, (0), 0 states have call predecessors, (0), 0 states have call successors, (0) [2025-02-08 14:52:19,867 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 58 transitions. [2025-02-08 14:52:19,867 INFO L240 hiAutomatonCegarLoop]: Abstraction has 40 states and 58 transitions. [2025-02-08 14:52:19,869 INFO L141 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2025-02-08 14:52:19,869 INFO L432 stractBuchiCegarLoop]: Abstraction has 40 states and 58 transitions. [2025-02-08 14:52:19,869 INFO L338 stractBuchiCegarLoop]: ======== Iteration 11 ============ [2025-02-08 14:52:19,869 INFO L72 BuchiIsEmpty]: Start buchiIsEmpty. Operand 40 states and 58 transitions. [2025-02-08 14:52:19,869 INFO L131 ngComponentsAnalysis]: Automaton has 1 accepting balls. 12 [2025-02-08 14:52:19,869 INFO L87 BuchiIsEmpty]: Finished buchiIsEmpty Result is false [2025-02-08 14:52:19,869 INFO L119 BuchiIsEmpty]: Starting construction of run [2025-02-08 14:52:19,870 INFO L148 hiAutomatonCegarLoop]: Counterexample stem histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:19,870 INFO L149 hiAutomatonCegarLoop]: Counterexample loop histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2025-02-08 14:52:19,870 INFO L752 eck$LassoCheckResult]: Stem: "assume { :begin_inline_ULTIMATE.init } true;assume 0 == #valid[0];assume 0 < #StackHeapBarrier;call #Ultimate.allocInit(2, 1);call write~init~int#0(48, 1, 0, 1);call write~init~int#0(0, 1, 1, 1);call #Ultimate.allocInit(11, 2);call #Ultimate.allocInit(12, 3);~c~0 := 0;~c_t~0 := 0;~c_req_up~0 := 0;~p_in~0 := 0;~p_out~0 := 0;~wl_st~0 := 0;~c1_st~0 := 0;~c2_st~0 := 0;~wb_st~0 := 0;~r_st~0 := 0;~wl_i~0 := 0;~c1_i~0 := 0;~c2_i~0 := 0;~wb_i~0 := 0;~r_i~0 := 0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~e_e~0 := 0;~e_f~0 := 0;~e_g~0 := 0;~e_c~0 := 0;~e_p_in~0 := 0;~e_wl~0 := 0;~d~0 := 0;~data~0 := 0;~processed~0 := 0;~t_b~0 := 0;assume { :end_inline_ULTIMATE.init } true;assume { :begin_inline_main } true;havoc main_#res#1;havoc main_~__retres1~0#1;havoc main_~__retres1~0#1;~e_wl~0 := 2;~e_c~0 := ~e_wl~0;~e_g~0 := ~e_c~0;~e_f~0 := ~e_g~0;~e_e~0 := ~e_f~0;~wl_pc~0 := 0;~c1_pc~0 := 0;~c2_pc~0 := 0;~wb_pc~0 := 0;~wb_i~0 := 1;~c2_i~0 := ~wb_i~0;~c1_i~0 := ~c2_i~0;~wl_i~0 := ~c1_i~0;~r_i~0 := 0;~c_req_up~0 := 0;~d~0 := 0;~c~0 := 0;assume { :begin_inline_start_simulation } true;havoc start_simulation_~kernel_st~0#1;havoc start_simulation_~kernel_st~0#1;start_simulation_~kernel_st~0#1 := 0;" "assume !(1 == ~c_req_up~0);" "assume 1 == ~wl_i~0;~wl_st~0 := 0;" "assume 1 == ~c1_i~0;~c1_st~0 := 0;" "assume 1 == ~c2_i~0;~c2_st~0 := 0;" "assume 1 == ~wb_i~0;~wb_st~0 := 0;" "assume !(1 == ~r_i~0);~r_st~0 := 2;" "assume !(0 == ~e_f~0);" "assume !(0 == ~e_g~0);" "assume !(0 == ~e_e~0);" "assume !(0 == ~e_c~0);" "assume !(0 == ~e_wl~0);" "assume !(1 == ~wl_pc~0);" "assume !(2 == ~wl_pc~0);" "assume !(1 == ~c1_pc~0);" "assume !(1 == ~c2_pc~0);" "assume !(1 == ~wb_pc~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_e~0);" "assume !(1 == ~e_f~0);" "assume !(1 == ~e_g~0);" "assume !(1 == ~e_c~0);" "assume !(1 == ~e_wl~0);" "assume true;start_simulation_~kernel_st~0#1 := 1;assume { :begin_inline_eval } true;havoc eval_#t~nondet4#1, eval_#t~nondet5#1, eval_#t~nondet6#1, eval_#t~nondet7#1, eval_#t~nondet8#1, eval_~tmp~0#1, eval_~tmp___0~0#1, eval_~tmp___1~0#1, eval_~tmp___2~0#1, eval_~tmp___3~0#1;havoc eval_~tmp~0#1;havoc eval_~tmp___0~0#1;havoc eval_~tmp___1~0#1;havoc eval_~tmp___2~0#1;havoc eval_~tmp___3~0#1;" [2025-02-08 14:52:19,870 INFO L754 eck$LassoCheckResult]: Loop: "assume true;" "assume 0 == ~wl_st~0;" "assume 0 == ~wl_st~0;havoc eval_#t~nondet4#1;eval_~tmp~0#1 := eval_#t~nondet4#1;havoc eval_#t~nondet4#1;" "assume !(0 != eval_~tmp~0#1);" "assume 0 == ~c1_st~0;havoc eval_#t~nondet5#1;eval_~tmp___0~0#1 := eval_#t~nondet5#1;havoc eval_#t~nondet5#1;" "assume !(0 != eval_~tmp___0~0#1);" "assume 0 == ~c2_st~0;havoc eval_#t~nondet6#1;eval_~tmp___1~0#1 := eval_#t~nondet6#1;havoc eval_#t~nondet6#1;" "assume !(0 != eval_~tmp___1~0#1);" "assume 0 == ~wb_st~0;havoc eval_#t~nondet7#1;eval_~tmp___2~0#1 := eval_#t~nondet7#1;havoc eval_#t~nondet7#1;" "assume !(0 != eval_~tmp___2~0#1);" "assume !(0 == ~r_st~0);" [2025-02-08 14:52:19,870 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:19,870 INFO L85 PathProgramCache]: Analyzing trace with hash -1938910778, now seen corresponding path program 4 times [2025-02-08 14:52:19,870 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:19,870 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [128527240] [2025-02-08 14:52:19,870 INFO L95 rtionOrderModulation]: Changing assertion order to TERMS_WITH_SMALL_CONSTANTS_FIRST [2025-02-08 14:52:19,870 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:19,876 INFO L108 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST partitioned 24 statements into 2 equivalence classes. [2025-02-08 14:52:19,880 INFO L111 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) and asserted 24 of 24 statements. [2025-02-08 14:52:19,880 INFO L114 AnnotateAndAsserter]: Assert order TERMS_WITH_SMALL_CONSTANTS_FIRST issued 2 check-sat command(s) [2025-02-08 14:52:19,880 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:19,880 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:52:19,881 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 24 statements into 1 equivalence classes. [2025-02-08 14:52:19,884 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 24 of 24 statements. [2025-02-08 14:52:19,884 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:19,884 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:19,887 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:52:19,887 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:19,887 INFO L85 PathProgramCache]: Analyzing trace with hash -2136157773, now seen corresponding path program 1 times [2025-02-08 14:52:19,888 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:19,888 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1184758543] [2025-02-08 14:52:19,888 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:52:19,888 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:19,890 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 11 statements into 1 equivalence classes. [2025-02-08 14:52:19,891 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 11 of 11 statements. [2025-02-08 14:52:19,891 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:19,891 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:19,891 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:52:19,891 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 11 statements into 1 equivalence classes. [2025-02-08 14:52:19,892 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 11 of 11 statements. [2025-02-08 14:52:19,892 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:19,892 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:19,894 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:52:19,895 INFO L157 PredicateUnifier]: Initialized classic predicate unifier [2025-02-08 14:52:19,895 INFO L85 PathProgramCache]: Analyzing trace with hash 232645326, now seen corresponding path program 1 times [2025-02-08 14:52:19,895 INFO L118 FreeRefinementEngine]: Executing refinement strategy CAMEL [2025-02-08 14:52:19,895 INFO L334 FreeRefinementEngine]: Using trace check IpTcStrategyModuleSmtInterpolCraig [1891355261] [2025-02-08 14:52:19,895 INFO L97 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2025-02-08 14:52:19,895 INFO L127 SolverBuilder]: Constructing new instance of SMTInterpol with explicit timeout -1 ms and remaining time -1 ms [2025-02-08 14:52:19,900 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 35 statements into 1 equivalence classes. [2025-02-08 14:52:19,902 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 35 of 35 statements. [2025-02-08 14:52:19,902 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:19,902 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:19,902 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:52:19,904 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 35 statements into 1 equivalence classes. [2025-02-08 14:52:19,907 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 35 of 35 statements. [2025-02-08 14:52:19,907 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:19,907 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:19,910 INFO L130 FreeRefinementEngine]: Strategy CAMEL found a feasible trace [2025-02-08 14:52:20,562 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 24 statements into 1 equivalence classes. [2025-02-08 14:52:20,565 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 24 of 24 statements. [2025-02-08 14:52:20,565 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:20,565 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:20,565 INFO L348 TraceCheck]: Trace is feasible, we will do another trace check, this time with branch encoders. [2025-02-08 14:52:20,571 INFO L108 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY partitioned 24 statements into 1 equivalence classes. [2025-02-08 14:52:20,575 INFO L111 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) and asserted 24 of 24 statements. [2025-02-08 14:52:20,575 INFO L114 AnnotateAndAsserter]: Assert order NOT_INCREMENTALLY issued 1 check-sat command(s) [2025-02-08 14:52:20,575 INFO L115 AnnotateAndAsserter]: Conjunction of SSA is sat [2025-02-08 14:52:20,664 INFO L201 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.buchiautomizer CFG 08.02 02:52:20 BoogieIcfgContainer [2025-02-08 14:52:20,665 INFO L131 PluginConnector]: ------------------------ END BuchiAutomizer---------------------------- [2025-02-08 14:52:20,665 INFO L112 PluginConnector]: ------------------------Witness Printer---------------------------- [2025-02-08 14:52:20,665 INFO L270 PluginConnector]: Initializing Witness Printer... [2025-02-08 14:52:20,665 INFO L274 PluginConnector]: Witness Printer initialized [2025-02-08 14:52:20,666 INFO L184 PluginConnector]: Executing the observer RCFGCatcher from plugin Witness Printer for "de.uni_freiburg.informatik.ultimate.plugins.generator.icfgbuilder CFG 08.02 02:52:18" (3/4) ... [2025-02-08 14:52:20,667 INFO L143 WitnessPrinter]: Generating witness for non-termination counterexample [2025-02-08 14:52:20,717 INFO L149 WitnessManager]: Wrote witness to /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/witness.graphml [2025-02-08 14:52:20,717 INFO L131 PluginConnector]: ------------------------ END Witness Printer---------------------------- [2025-02-08 14:52:20,718 INFO L158 Benchmark]: Toolchain (without parser) took 3060.18ms. Allocated memory is still 142.6MB. Free memory was 113.2MB in the beginning and 68.8MB in the end (delta: 44.4MB). Peak memory consumption was 39.2MB. Max. memory is 16.1GB. [2025-02-08 14:52:20,718 INFO L158 Benchmark]: CDTParser took 0.22ms. Allocated memory is still 226.5MB. Free memory is still 148.6MB. There was no memory consumed. Max. memory is 16.1GB. [2025-02-08 14:52:20,718 INFO L158 Benchmark]: CACSL2BoogieTranslator took 241.90ms. Allocated memory is still 142.6MB. Free memory was 112.6MB in the beginning and 98.4MB in the end (delta: 14.3MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. [2025-02-08 14:52:20,718 INFO L158 Benchmark]: Boogie Procedure Inliner took 33.16ms. Allocated memory is still 142.6MB. Free memory was 98.4MB in the beginning and 96.1MB in the end (delta: 2.2MB). There was no memory consumed. Max. memory is 16.1GB. [2025-02-08 14:52:20,719 INFO L158 Benchmark]: Boogie Preprocessor took 45.06ms. Allocated memory is still 142.6MB. Free memory was 96.1MB in the beginning and 94.5MB in the end (delta: 1.6MB). There was no memory consumed. Max. memory is 16.1GB. [2025-02-08 14:52:20,719 INFO L158 Benchmark]: IcfgBuilder took 407.89ms. Allocated memory is still 142.6MB. Free memory was 94.5MB in the beginning and 70.5MB in the end (delta: 24.0MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. [2025-02-08 14:52:20,719 INFO L158 Benchmark]: BuchiAutomizer took 2276.18ms. Allocated memory is still 142.6MB. Free memory was 70.5MB in the beginning and 76.5MB in the end (delta: -6.0MB). There was no memory consumed. Max. memory is 16.1GB. [2025-02-08 14:52:20,719 INFO L158 Benchmark]: Witness Printer took 52.20ms. Allocated memory is still 142.6MB. Free memory was 76.5MB in the beginning and 68.8MB in the end (delta: 7.7MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. [2025-02-08 14:52:20,720 INFO L338 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.22ms. Allocated memory is still 226.5MB. Free memory is still 148.6MB. There was no memory consumed. Max. memory is 16.1GB. * CACSL2BoogieTranslator took 241.90ms. Allocated memory is still 142.6MB. Free memory was 112.6MB in the beginning and 98.4MB in the end (delta: 14.3MB). Peak memory consumption was 16.8MB. Max. memory is 16.1GB. * Boogie Procedure Inliner took 33.16ms. Allocated memory is still 142.6MB. Free memory was 98.4MB in the beginning and 96.1MB in the end (delta: 2.2MB). There was no memory consumed. Max. memory is 16.1GB. * Boogie Preprocessor took 45.06ms. Allocated memory is still 142.6MB. Free memory was 96.1MB in the beginning and 94.5MB in the end (delta: 1.6MB). There was no memory consumed. Max. memory is 16.1GB. * IcfgBuilder took 407.89ms. Allocated memory is still 142.6MB. Free memory was 94.5MB in the beginning and 70.5MB in the end (delta: 24.0MB). Peak memory consumption was 25.2MB. Max. memory is 16.1GB. * BuchiAutomizer took 2276.18ms. Allocated memory is still 142.6MB. Free memory was 70.5MB in the beginning and 76.5MB in the end (delta: -6.0MB). There was no memory consumed. Max. memory is 16.1GB. * Witness Printer took 52.20ms. Allocated memory is still 142.6MB. Free memory was 76.5MB in the beginning and 68.8MB in the end (delta: 7.7MB). Peak memory consumption was 8.4MB. Max. memory is 16.1GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - StatisticsResult: Constructed decomposition of program Your program was decomposed into 10 terminating modules (10 trivial, 0 deterministic, 0 nondeterministic) and one nonterminating remainder module.10 modules have a trivial ranking function, the largest among these consists of 4 locations. The remainder module has 40 locations. - StatisticsResult: Timing statistics BüchiAutomizer plugin needed 2.1s and 11 iterations. TraceHistogramMax:1. Analysis of lassos took 1.8s. Construction of modules took 0.0s. Büchi inclusion checks took 0.1s. Highest rank in rank-based complementation 0. Minimization of det autom 10. Minimization of nondet autom 0. Automata minimization 0.0s AutomataMinimizationTime, 10 MinimizatonAttempts, 15 StatesRemovedByMinimization, 2 NontrivialMinimizations. Non-live state removal took 0.0s Buchi closure took 0.0s. Biggest automaton had -1 states and ocurred in iteration -1. Nontrivial modules had stage [0, 0, 0, 0, 0]. InterpolantCoveringCapabilityFinite: 0/0 InterpolantCoveringCapabilityBuchi: 0/0 HoareTripleCheckerStatistics: 0 mSolverCounterUnknown, 625 SdHoareTripleChecker+Valid, 0.1s IncrementalHoareTripleChecker+Time, 0 mSdLazyCounter, 625 mSDsluCounter, 885 SdHoareTripleChecker+Invalid, 0.1s Time, 0 mProtectedAction, 0 SdHoareTripleChecker+Unchecked, 0 IncrementalHoareTripleChecker+Unchecked, 160 mSDsCounter, 21 IncrementalHoareTripleChecker+Valid, 0 mProtectedPredicate, 27 IncrementalHoareTripleChecker+Invalid, 48 SdHoareTripleChecker+Unknown, 0 mSolverCounterNotChecked, 21 mSolverCounterUnsat, 725 mSDtfsCounter, 27 mSolverCounterSat, 0.0s SdHoareTripleChecker+Time, 0 IncrementalHoareTripleChecker+Unknown LassoAnalysisResults: nont1 unkn0 SFLI0 SFLT0 conc3 concLT0 SILN6 SILU0 SILI1 SILT0 lasso0 LassoPreprocessingBenchmarks: LassoTerminationAnalysisBenchmarks: not availableLassoTerminationAnalysisBenchmarks: LassoNonterminationAnalysisSatFixpoint: 0 LassoNonterminationAnalysisSatUnbounded: 0 LassoNonterminationAnalysisUnsat: 0 LassoNonterminationAnalysisUnknown: 0 LassoNonterminationAnalysisTime: 0.0s InitialAbstractionConstructionTime: 0.0s - TerminationAnalysisResult: Nontermination possible Buchi Automizer proved that your program is nonterminating for some inputs - LassoShapedNonTerminationArgument [Line: 294]: Nontermination argument in form of an infinite program execution. Nontermination argument in form of an infinite program execution. Stem: [L28] int c ; [L29] int c_t ; [L30] int c_req_up ; [L31] int p_in ; [L32] int p_out ; [L33] int wl_st ; [L34] int c1_st ; [L35] int c2_st ; [L36] int wb_st ; [L37] int r_st ; [L38] int wl_i ; [L39] int c1_i ; [L40] int c2_i ; [L41] int wb_i ; [L42] int r_i ; [L43] int wl_pc ; [L44] int c1_pc ; [L45] int c2_pc ; [L46] int wb_pc ; [L47] int e_e ; [L48] int e_f ; [L49] int e_g ; [L50] int e_c ; [L51] int e_p_in ; [L52] int e_wl ; [L58] int d ; [L59] int data ; [L60] int processed ; [L61] static int t_b ; [L689] int __retres1 ; [L693] e_wl = 2 [L694] e_c = e_wl [L695] e_g = e_c [L696] e_f = e_g [L697] e_e = e_f [L698] wl_pc = 0 [L699] c1_pc = 0 [L700] c2_pc = 0 [L701] wb_pc = 0 [L702] wb_i = 1 [L703] c2_i = wb_i [L704] c1_i = c2_i [L705] wl_i = c1_i [L706] r_i = 0 [L707] c_req_up = 0 [L708] d = 0 [L709] c = 0 [L710] CALL start_simulation() [L400] int kernel_st ; [L403] kernel_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L404] COND FALSE !((int )c_req_up == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L415] COND TRUE (int )wl_i == 1 [L416] wl_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L420] COND TRUE (int )c1_i == 1 [L421] c1_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L425] COND TRUE (int )c2_i == 1 [L426] c2_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L430] COND TRUE (int )wb_i == 1 [L431] wb_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L435] COND FALSE !((int )r_i == 1) [L438] r_st = 2 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L440] COND FALSE !((int )e_f == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L445] COND FALSE !((int )e_g == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L450] COND FALSE !((int )e_e == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L455] COND FALSE !((int )e_c == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L460] COND FALSE !((int )e_wl == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L465] COND FALSE !((int )wl_pc == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L473] COND FALSE !((int )wl_pc == 2) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L483] COND FALSE !((int )c1_pc == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L492] COND FALSE !((int )c2_pc == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L501] COND FALSE !((int )wb_pc == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L510] COND FALSE !((int )e_c == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L515] COND FALSE !((int )e_e == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L520] COND FALSE !((int )e_f == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L525] COND FALSE !((int )e_g == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L530] COND FALSE !((int )e_c == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L535] COND FALSE !((int )e_wl == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L541] COND TRUE 1 [L544] kernel_st = 1 [L545] CALL eval() [L286] int tmp ; [L287] int tmp___0 ; [L288] int tmp___1 ; [L289] int tmp___2 ; [L290] int tmp___3 ; VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] Loop: [L294] COND TRUE 1 [L296] COND TRUE (int )wl_st == 0 [L317] COND TRUE (int )wl_st == 0 [L319] tmp = __VERIFIER_nondet_int() [L321] COND FALSE !(\read(tmp)) [L332] COND TRUE (int )c1_st == 0 [L334] tmp___0 = __VERIFIER_nondet_int() [L336] COND FALSE !(\read(tmp___0)) [L347] COND TRUE (int )c2_st == 0 [L349] tmp___1 = __VERIFIER_nondet_int() [L351] COND FALSE !(\read(tmp___1)) [L362] COND TRUE (int )wb_st == 0 [L364] tmp___2 = __VERIFIER_nondet_int() [L366] COND FALSE !(\read(tmp___2)) [L377] COND FALSE !((int )r_st == 0) End of lasso representation. - StatisticsResult: NonterminationArgumentStatistics Fixpoint - NonterminatingLassoResult [Line: 294]: Nonterminating execution Found a nonterminating execution for the following lasso shaped sequence of statements. Stem: [L28] int c ; [L29] int c_t ; [L30] int c_req_up ; [L31] int p_in ; [L32] int p_out ; [L33] int wl_st ; [L34] int c1_st ; [L35] int c2_st ; [L36] int wb_st ; [L37] int r_st ; [L38] int wl_i ; [L39] int c1_i ; [L40] int c2_i ; [L41] int wb_i ; [L42] int r_i ; [L43] int wl_pc ; [L44] int c1_pc ; [L45] int c2_pc ; [L46] int wb_pc ; [L47] int e_e ; [L48] int e_f ; [L49] int e_g ; [L50] int e_c ; [L51] int e_p_in ; [L52] int e_wl ; [L58] int d ; [L59] int data ; [L60] int processed ; [L61] static int t_b ; [L689] int __retres1 ; [L693] e_wl = 2 [L694] e_c = e_wl [L695] e_g = e_c [L696] e_f = e_g [L697] e_e = e_f [L698] wl_pc = 0 [L699] c1_pc = 0 [L700] c2_pc = 0 [L701] wb_pc = 0 [L702] wb_i = 1 [L703] c2_i = wb_i [L704] c1_i = c2_i [L705] wl_i = c1_i [L706] r_i = 0 [L707] c_req_up = 0 [L708] d = 0 [L709] c = 0 [L710] CALL start_simulation() [L400] int kernel_st ; [L403] kernel_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L404] COND FALSE !((int )c_req_up == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L415] COND TRUE (int )wl_i == 1 [L416] wl_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L420] COND TRUE (int )c1_i == 1 [L421] c1_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L425] COND TRUE (int )c2_i == 1 [L426] c2_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L430] COND TRUE (int )wb_i == 1 [L431] wb_st = 0 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=0, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L435] COND FALSE !((int )r_i == 1) [L438] r_st = 2 VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L440] COND FALSE !((int )e_f == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L445] COND FALSE !((int )e_g == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L450] COND FALSE !((int )e_e == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L455] COND FALSE !((int )e_c == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L460] COND FALSE !((int )e_wl == 0) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L465] COND FALSE !((int )wl_pc == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L473] COND FALSE !((int )wl_pc == 2) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L483] COND FALSE !((int )c1_pc == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L492] COND FALSE !((int )c2_pc == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L501] COND FALSE !((int )wb_pc == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L510] COND FALSE !((int )e_c == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L515] COND FALSE !((int )e_e == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L520] COND FALSE !((int )e_f == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L525] COND FALSE !((int )e_g == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L530] COND FALSE !((int )e_c == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L535] COND FALSE !((int )e_wl == 1) VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] [L541] COND TRUE 1 [L544] kernel_st = 1 [L545] CALL eval() [L286] int tmp ; [L287] int tmp___0 ; [L288] int tmp___1 ; [L289] int tmp___2 ; [L290] int tmp___3 ; VAL [c1_i=1, c1_pc=0, c1_st=0, c2_i=1, c2_pc=0, c2_st=0, c=0, c_req_up=0, c_t=0, d=0, data=0, e_c=2, e_e=2, e_f=2, e_g=2, e_p_in=0, e_wl=2, p_in=0, p_out=0, processed=0, r_i=0, r_st=2, t_b=0, wb_i=1, wb_pc=0, wb_st=0, wl_i=1, wl_pc=0, wl_st=0] Loop: [L294] COND TRUE 1 [L296] COND TRUE (int )wl_st == 0 [L317] COND TRUE (int )wl_st == 0 [L319] tmp = __VERIFIER_nondet_int() [L321] COND FALSE !(\read(tmp)) [L332] COND TRUE (int )c1_st == 0 [L334] tmp___0 = __VERIFIER_nondet_int() [L336] COND FALSE !(\read(tmp___0)) [L347] COND TRUE (int )c2_st == 0 [L349] tmp___1 = __VERIFIER_nondet_int() [L351] COND FALSE !(\read(tmp___1)) [L362] COND TRUE (int )wb_st == 0 [L364] tmp___2 = __VERIFIER_nondet_int() [L366] COND FALSE !(\read(tmp___2)) [L377] COND FALSE !((int )r_st == 0) End of lasso representation. RESULT: Ultimate proved your program to be incorrect! [2025-02-08 14:52:20,735 INFO L552 MonitoredProcess]: [MP /storage/repos/ultimate-jdk21/releaseScripts/default/UAutomizer-linux/z3 SMTLIB2_COMPLIANT=true -memory:1024 -smt2 -in -t:12000 (1)] Ended with exit code 0 Received shutdown request... --- End real Ultimate output --- Execution finished normally Writing output log to file Ultimate.log Writing human readable error path to file UltimateCounterExample.errorpath Result: FALSE(TERM)